wasmtime 9.0.4 → 10.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +184 -101
- data/ext/Cargo.toml +6 -6
- data/ext/build.rs +2 -2
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/Cargo.toml +31 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/Cargo.toml +158 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/benches/x64-evex-encoding.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/ir/trapcode.rs +144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/abi.rs +1294 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit.rs +3684 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit_tests.rs +7895 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/imms.rs +1210 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/mod.rs +2966 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst.isle +4037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower/isle.rs +816 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower.isle +2906 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/mod.rs +238 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/mod.rs +424 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/abi.rs +825 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/args.rs +1812 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit.rs +3008 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit_tests.rs +2338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/encode.rs +262 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/imms.rs +250 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/mod.rs +1963 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/regs.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/vector.rs +669 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst.isle +2915 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst_vector.isle +760 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower/isle.rs +553 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower.isle +1409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/mod.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/abi.rs +957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit.rs +3707 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit_tests.rs +13409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/mod.rs +3426 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst.isle +5046 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/lower.isle +3991 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/mod.rs +213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/abi.rs +985 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/evex.rs +749 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/rex.rs +588 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/vex.rs +492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/args.rs +2193 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit.rs +4090 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit_tests.rs +5674 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/mod.rs +2667 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst.isle +5104 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower/isle.rs +1148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.isle +4481 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.rs +328 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/mod.rs +251 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isle_prelude.rs +862 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/abi.rs +2455 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/buffer.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/compile.rs +92 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/isle.rs +827 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/lower.rs +1388 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/mod.rs +549 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/reg.rs +537 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/vcode.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude.isle +578 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude_lower.isle +1012 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/settings.rs +600 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/verifier/mod.rs +1884 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/Cargo.toml +23 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/isa/x86.rs +444 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/chaos.rs +125 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/lib.rs +45 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/zero_sized.rs +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/src/list.rs +955 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/Cargo.toml +37 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/Cargo.toml +38 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/src/lib.rs +215 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/Cargo.toml +85 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/code_translator.rs +3538 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/dummy.rs +924 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/spec.rs +834 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/func_translator.rs +440 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/sections_translator.rs +417 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/translation_utils.rs +99 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/CONTRIBUTING.md +48 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/COPYRIGHT +17 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Cargo.toml +84 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Ideas.md +106 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-WHATWG +26 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/README.md +827 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/ci/miri.sh +14 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Big5.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-JP.txt +12 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-KR.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/GBK.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/IBM866.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-2022-JP.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-10.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-13.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-14.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-15.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-16.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-2.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-3.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-4.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-5.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-6.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-7.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8-I.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-R.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-U.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Shift_JIS.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16BE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16LE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-8.txt +5 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/gb18030.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/macintosh.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/replacement.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1250.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1251.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1252.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1253.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1254.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1255.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1256.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1257.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1258.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-874.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-mac-cyrillic.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-user-defined.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/generate-encoding-data.py +2008 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/rustfmt.toml +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/ascii.rs +1546 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/big5.rs +427 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/data.rs +114378 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_jp.rs +469 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_kr.rs +442 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/gb18030.rs +767 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/handles.rs +1969 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/iso_2022_jp.rs +1068 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/lib.rs +6133 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/macros.rs +1622 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/mem.rs +3354 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/replacement.rs +104 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/shift_jis.rs +426 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/simd_funcs.rs +453 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/single_byte.rs +714 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in_ref.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out_ref.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in_ref.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out.txt +17053 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in.txt +23945 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out.txt +23944 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out.txt +7404 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in.txt +11285 -0
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|
-
frame::{DefinedLocals, Frame},
|
6
|
-
isa::{Builder, CallingConvention, TargetIsa},
|
7
|
-
masm::MacroAssembler,
|
8
|
-
regalloc::RegAlloc,
|
9
|
-
regset::RegSet,
|
10
|
-
stack::Stack,
|
11
|
-
FuncEnv,
|
12
|
-
};
|
13
|
-
use anyhow::Result;
|
14
|
-
use cranelift_codegen::settings::{self, Flags};
|
15
|
-
use cranelift_codegen::{isa::aarch64::settings as aarch64_settings, Final, MachBufferFinalized};
|
16
|
-
use cranelift_codegen::{MachTextSectionBuilder, TextSectionBuilder};
|
17
|
-
use masm::MacroAssembler as Aarch64Masm;
|
18
|
-
use target_lexicon::Triple;
|
19
|
-
use wasmparser::{FuncType, FuncValidator, FunctionBody, ValidatorResources};
|
20
|
-
|
21
|
-
mod abi;
|
22
|
-
mod address;
|
23
|
-
mod asm;
|
24
|
-
mod masm;
|
25
|
-
mod regs;
|
26
|
-
|
27
|
-
/// Create an ISA from the given triple.
|
28
|
-
pub(crate) fn isa_builder(triple: Triple) -> Builder {
|
29
|
-
Builder::new(
|
30
|
-
triple,
|
31
|
-
aarch64_settings::builder(),
|
32
|
-
|triple, shared_flags, settings| {
|
33
|
-
let isa_flags = aarch64_settings::Flags::new(&shared_flags, settings);
|
34
|
-
let isa = Aarch64::new(triple, shared_flags, isa_flags);
|
35
|
-
Ok(Box::new(isa))
|
36
|
-
},
|
37
|
-
)
|
38
|
-
}
|
39
|
-
|
40
|
-
/// Aarch64 ISA.
|
41
|
-
// Until Aarch64 emission is supported.
|
42
|
-
#[allow(dead_code)]
|
43
|
-
pub(crate) struct Aarch64 {
|
44
|
-
/// The target triple.
|
45
|
-
triple: Triple,
|
46
|
-
/// ISA specific flags.
|
47
|
-
isa_flags: aarch64_settings::Flags,
|
48
|
-
/// Shared flags.
|
49
|
-
shared_flags: Flags,
|
50
|
-
}
|
51
|
-
|
52
|
-
impl Aarch64 {
|
53
|
-
/// Create an Aarch64 ISA.
|
54
|
-
pub fn new(triple: Triple, shared_flags: Flags, isa_flags: aarch64_settings::Flags) -> Self {
|
55
|
-
Self {
|
56
|
-
isa_flags,
|
57
|
-
shared_flags,
|
58
|
-
triple,
|
59
|
-
}
|
60
|
-
}
|
61
|
-
}
|
62
|
-
|
63
|
-
impl TargetIsa for Aarch64 {
|
64
|
-
fn name(&self) -> &'static str {
|
65
|
-
"aarch64"
|
66
|
-
}
|
67
|
-
|
68
|
-
fn triple(&self) -> &Triple {
|
69
|
-
&self.triple
|
70
|
-
}
|
71
|
-
|
72
|
-
fn flags(&self) -> &settings::Flags {
|
73
|
-
&self.shared_flags
|
74
|
-
}
|
75
|
-
|
76
|
-
fn isa_flags(&self) -> Vec<settings::Value> {
|
77
|
-
self.isa_flags.iter().collect()
|
78
|
-
}
|
79
|
-
|
80
|
-
fn is_branch_protection_enabled(&self) -> bool {
|
81
|
-
self.isa_flags.use_bti()
|
82
|
-
}
|
83
|
-
|
84
|
-
fn compile_function(
|
85
|
-
&self,
|
86
|
-
sig: &FuncType,
|
87
|
-
body: &FunctionBody,
|
88
|
-
env: &dyn FuncEnv,
|
89
|
-
validator: &mut FuncValidator<ValidatorResources>,
|
90
|
-
) -> Result<MachBufferFinalized<Final>> {
|
91
|
-
let mut body = body.get_binary_reader();
|
92
|
-
let mut masm = Aarch64Masm::new(self.shared_flags.clone());
|
93
|
-
let stack = Stack::new();
|
94
|
-
let abi = abi::Aarch64ABI::default();
|
95
|
-
let abi_sig = abi.sig(sig, &CallingConvention::Default);
|
96
|
-
|
97
|
-
let defined_locals = DefinedLocals::new(&mut body, validator)?;
|
98
|
-
let frame = Frame::new(&abi_sig, &defined_locals, &abi)?;
|
99
|
-
// TODO: Add floating point bitmask
|
100
|
-
let regalloc = RegAlloc::new(RegSet::new(ALL_GPR, 0), scratch());
|
101
|
-
let codegen_context = CodeGenContext::new(regalloc, stack, &frame);
|
102
|
-
let mut codegen = CodeGen::new(&mut masm, &abi, codegen_context, env, abi_sig);
|
103
|
-
|
104
|
-
codegen.emit(&mut body, validator)?;
|
105
|
-
Ok(masm.finalize())
|
106
|
-
}
|
107
|
-
|
108
|
-
fn text_section_builder(&self, num_funcs: usize) -> Box<dyn TextSectionBuilder> {
|
109
|
-
Box::new(MachTextSectionBuilder::<
|
110
|
-
cranelift_codegen::isa::aarch64::inst::Inst,
|
111
|
-
>::new(num_funcs))
|
112
|
-
}
|
113
|
-
|
114
|
-
fn function_alignment(&self) -> u32 {
|
115
|
-
// See `cranelift_codegen::isa::TargetIsa::function_alignment`.
|
116
|
-
32
|
117
|
-
}
|
118
|
-
|
119
|
-
fn host_to_wasm_trampoline(&self, _ty: &FuncType) -> Result<MachBufferFinalized<Final>> {
|
120
|
-
todo!()
|
121
|
-
}
|
122
|
-
}
|
@@ -1,160 +0,0 @@
|
|
1
|
-
//! AArch64 register definition.
|
2
|
-
|
3
|
-
use crate::isa::reg::Reg;
|
4
|
-
use regalloc2::{PReg, RegClass};
|
5
|
-
use smallvec::{smallvec, SmallVec};
|
6
|
-
|
7
|
-
/// Construct a X-register from an index.
|
8
|
-
pub(crate) const fn xreg(num: u8) -> Reg {
|
9
|
-
assert!(num < 32);
|
10
|
-
Reg::new(PReg::new(num as usize, RegClass::Int))
|
11
|
-
}
|
12
|
-
|
13
|
-
/// Construct a V-register from an index.
|
14
|
-
pub(crate) const fn vreg(num: u8) -> Reg {
|
15
|
-
assert!(num < 32);
|
16
|
-
Reg::new(PReg::new(num as usize, RegClass::Float))
|
17
|
-
}
|
18
|
-
|
19
|
-
/// Scratch register.
|
20
|
-
/// Intra-procedure-call corruptible register.
|
21
|
-
pub(crate) const fn ip0() -> Reg {
|
22
|
-
xreg(16)
|
23
|
-
}
|
24
|
-
|
25
|
-
/// Alias to the IP0 register.
|
26
|
-
pub(crate) const fn scratch() -> Reg {
|
27
|
-
ip0()
|
28
|
-
}
|
29
|
-
|
30
|
-
/// Scratch register.
|
31
|
-
/// Intra-procedure-call corruptible register.
|
32
|
-
pub(crate) const fn ip1() -> Reg {
|
33
|
-
xreg(17)
|
34
|
-
}
|
35
|
-
|
36
|
-
/// Register used to carry platform state.
|
37
|
-
const fn platform() -> Reg {
|
38
|
-
xreg(18)
|
39
|
-
}
|
40
|
-
|
41
|
-
/// Frame pointer register.
|
42
|
-
pub(crate) const fn fp() -> Reg {
|
43
|
-
xreg(29)
|
44
|
-
}
|
45
|
-
|
46
|
-
/// Link register for function calls.
|
47
|
-
pub(crate) const fn lr() -> Reg {
|
48
|
-
xreg(30)
|
49
|
-
}
|
50
|
-
|
51
|
-
/// Zero register.
|
52
|
-
pub(crate) const fn zero() -> Reg {
|
53
|
-
xreg(31)
|
54
|
-
}
|
55
|
-
|
56
|
-
/// Stack pointer register.
|
57
|
-
///
|
58
|
-
/// In aarch64 the zero and stack pointer registers are contextually
|
59
|
-
/// different but have the same hardware encoding; to differentiate
|
60
|
-
/// them, we are following Cranelift's encoding and representing it as
|
61
|
-
/// 31 + 32. Ref:
|
62
|
-
/// https://github.com/bytecodealliance/wasmtime/blob/main/cranelift/codegen/src/isa/aarch64/inst/regs.rs#L70
|
63
|
-
pub(crate) const fn sp() -> Reg {
|
64
|
-
Reg::new(PReg::new(31 + 32, RegClass::Int))
|
65
|
-
}
|
66
|
-
|
67
|
-
/// Shadow stack pointer register.
|
68
|
-
///
|
69
|
-
/// The shadow stack pointer is used as the base for memory addressing
|
70
|
-
/// to workaround Aarch64's constraint on the stack pointer 16-byte
|
71
|
-
/// alignment for memory addressing. This allows word-size loads and
|
72
|
-
/// stores. It's always assumed that the real stack pointer is
|
73
|
-
/// 16-byte unaligned; the only exceptions to this assumption are the function
|
74
|
-
/// prologue and epilogue in which we use the real stack pointer for
|
75
|
-
/// addressing, assuming that the 16-byte alignment is respected.
|
76
|
-
///
|
77
|
-
/// The fact that the shadow stack pointer is used for memory
|
78
|
-
/// addressing, doesn't change the meaning of the real stack pointer,
|
79
|
-
/// which should always be used to allocate and deallocate stack
|
80
|
-
/// space. The real stack pointer is always treated as "primary".
|
81
|
-
/// Throughout the code generation any change to the stack pointer is
|
82
|
-
/// reflected in the shadow stack pointer via the
|
83
|
-
/// [MacroAssembler::move_sp_to_shadow_sp] function.
|
84
|
-
///
|
85
|
-
/// This approach, requires copying the real stack pointer value into
|
86
|
-
/// x28 everytime the real stack pointer moves, which involves
|
87
|
-
/// emitting one more instruction. For example, this is generally how
|
88
|
-
/// the real stack pointer and x28 will look like during a function:
|
89
|
-
///
|
90
|
-
/// +-----------+
|
91
|
-
/// | | Save x28 (callee-saved)
|
92
|
-
/// +-----------+----- SP at function entry (after epilogue, slots for FP and LR)
|
93
|
-
/// | | Copy the value of SP to x28
|
94
|
-
/// | |
|
95
|
-
/// +-----------+----- SP after reserving stack space for locals and arguments
|
96
|
-
/// | | Copy the value of SP to x28
|
97
|
-
/// | |
|
98
|
-
/// +-----------+----- SP after a push
|
99
|
-
/// | | Copy the value of SP to x28 (similar after a pop)
|
100
|
-
/// | |
|
101
|
-
/// | |
|
102
|
-
/// | |
|
103
|
-
/// | |
|
104
|
-
/// +-----------+----- At epilogue restore x28 (callee-saved)
|
105
|
-
/// +-----------+
|
106
|
-
///
|
107
|
-
/// In summary, the following invariants must be respected:
|
108
|
-
///
|
109
|
-
/// * The real stack pointer is always primary, and must be used to
|
110
|
-
/// allocate and deallocate stack space(e.g. push, pop). This
|
111
|
-
/// operation must always be followed by a copy of the real stack
|
112
|
-
/// pointer to x28.
|
113
|
-
/// * The real stack pointer must never be used to
|
114
|
-
/// address memory except when we are certain that the required
|
115
|
-
/// alignment is respected (e.g. during the prologue and epilogue)
|
116
|
-
/// * The value of the real stack pointer is copied to x28 when
|
117
|
-
/// entering a function.
|
118
|
-
/// * The value of x28 doesn't change between
|
119
|
-
/// function calls (as it's callee saved), compliant with
|
120
|
-
/// Aarch64's ABI.
|
121
|
-
/// * x28 is not available during register allocation.
|
122
|
-
/// * Since the real stack pointer is always primary, there's no need
|
123
|
-
/// to copy the shadow stack pointer into the real stack
|
124
|
-
/// pointer. The copy is only done SP -> Shadow SP direction.
|
125
|
-
pub(crate) const fn shadow_sp() -> Reg {
|
126
|
-
xreg(28)
|
127
|
-
}
|
128
|
-
|
129
|
-
const NON_ALLOCATABLE_GPR: u32 = (1 << ip0().hw_enc())
|
130
|
-
| (1 << ip1().hw_enc())
|
131
|
-
| (1 << platform().hw_enc())
|
132
|
-
| (1 << fp().hw_enc())
|
133
|
-
| (1 << lr().hw_enc())
|
134
|
-
| (1 << zero().hw_enc())
|
135
|
-
| (1 << shadow_sp().hw_enc());
|
136
|
-
|
137
|
-
/// Bitmask to represent the available general purpose registers.
|
138
|
-
pub(crate) const ALL_GPR: u32 = u32::MAX & !NON_ALLOCATABLE_GPR;
|
139
|
-
|
140
|
-
/// Returns the callee-saved registers.
|
141
|
-
///
|
142
|
-
/// This function will return the set of registers that need to be saved
|
143
|
-
/// according to the system ABI and that are known not to be saved during the
|
144
|
-
/// prologue emission.
|
145
|
-
// TODO: Once float registers are supported,
|
146
|
-
// account for callee-saved float registers.
|
147
|
-
pub(crate) fn callee_saved() -> SmallVec<[Reg; 9]> {
|
148
|
-
smallvec![
|
149
|
-
xreg(19),
|
150
|
-
xreg(20),
|
151
|
-
xreg(21),
|
152
|
-
xreg(22),
|
153
|
-
xreg(23),
|
154
|
-
xreg(24),
|
155
|
-
xreg(25),
|
156
|
-
xreg(26),
|
157
|
-
xreg(27),
|
158
|
-
xreg(28),
|
159
|
-
]
|
160
|
-
}
|
@@ -1,202 +0,0 @@
|
|
1
|
-
use anyhow::{anyhow, Result};
|
2
|
-
use core::fmt::Formatter;
|
3
|
-
use cranelift_codegen::isa::{CallConv, IsaBuilder};
|
4
|
-
use cranelift_codegen::settings;
|
5
|
-
use cranelift_codegen::{Final, MachBufferFinalized, TextSectionBuilder};
|
6
|
-
use std::{
|
7
|
-
error,
|
8
|
-
fmt::{self, Debug, Display},
|
9
|
-
};
|
10
|
-
use target_lexicon::{Architecture, Triple};
|
11
|
-
use wasmparser::{FuncType, FuncValidator, FunctionBody, ValidatorResources};
|
12
|
-
|
13
|
-
use crate::FuncEnv;
|
14
|
-
|
15
|
-
#[cfg(feature = "x64")]
|
16
|
-
pub(crate) mod x64;
|
17
|
-
|
18
|
-
#[cfg(feature = "arm64")]
|
19
|
-
pub(crate) mod aarch64;
|
20
|
-
|
21
|
-
pub(crate) mod reg;
|
22
|
-
|
23
|
-
macro_rules! isa_builder {
|
24
|
-
($name: ident, $cfg_terms: tt, $triple: ident) => {{
|
25
|
-
#[cfg $cfg_terms]
|
26
|
-
{
|
27
|
-
Ok($name::isa_builder($triple))
|
28
|
-
}
|
29
|
-
#[cfg(not $cfg_terms)]
|
30
|
-
{
|
31
|
-
Err(anyhow!(LookupError::SupportDisabled))
|
32
|
-
}
|
33
|
-
}};
|
34
|
-
}
|
35
|
-
|
36
|
-
pub type Builder = IsaBuilder<Result<Box<dyn TargetIsa>>>;
|
37
|
-
|
38
|
-
/// Look for an ISA builder for the given target triple.
|
39
|
-
pub fn lookup(triple: Triple) -> Result<Builder> {
|
40
|
-
match triple.architecture {
|
41
|
-
Architecture::X86_64 => {
|
42
|
-
isa_builder!(x64, (feature = "x64"), triple)
|
43
|
-
}
|
44
|
-
Architecture::Aarch64 { .. } => {
|
45
|
-
isa_builder!(aarch64, (feature = "arm64"), triple)
|
46
|
-
}
|
47
|
-
|
48
|
-
_ => Err(anyhow!(LookupError::Unsupported)),
|
49
|
-
}
|
50
|
-
}
|
51
|
-
|
52
|
-
impl error::Error for LookupError {}
|
53
|
-
impl Display for LookupError {
|
54
|
-
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
|
55
|
-
match self {
|
56
|
-
LookupError::Unsupported => write!(f, "This target is not supported yet"),
|
57
|
-
LookupError::SupportDisabled => write!(f, "Support for this target was disabled"),
|
58
|
-
}
|
59
|
-
}
|
60
|
-
}
|
61
|
-
|
62
|
-
#[derive(Debug)]
|
63
|
-
pub(crate) enum LookupError {
|
64
|
-
Unsupported,
|
65
|
-
// This directive covers the case in which the consumer
|
66
|
-
// enables the `all-arch` feature; in such case, this variant
|
67
|
-
// will never be used. This is most likely going to change
|
68
|
-
// in the future; this is one of the simplest options for now.
|
69
|
-
#[allow(dead_code)]
|
70
|
-
SupportDisabled,
|
71
|
-
}
|
72
|
-
|
73
|
-
/// Calling conventions supported by Winch. Winch supports the `Wasmtime*`
|
74
|
-
/// variations of the system's ABI calling conventions and an internal default
|
75
|
-
/// calling convention.
|
76
|
-
///
|
77
|
-
/// This enum is a reduced subset of the calling conventions defined in
|
78
|
-
/// [cranelift_codegen::isa::CallConv]. Introducing this enum makes it easier
|
79
|
-
/// to enforce the invariant of all the calling conventions supported by Winch.
|
80
|
-
pub enum CallingConvention {
|
81
|
-
/// See [cranelift_codegen::isa::CallConv::WasmtimeSystemV]
|
82
|
-
WasmtimeSystemV,
|
83
|
-
/// See [cranelift_codegen::isa::CallConv::WasmtimeFastcall]
|
84
|
-
WasmtimeFastcall,
|
85
|
-
/// See [cranelift_codegen::isa::CallConv::WasmtimeAppleAarch64]
|
86
|
-
WasmtimeAppleAarch64,
|
87
|
-
/// The default calling convention for Winch. It largely follows SystemV
|
88
|
-
/// for parameter and result handling. This calling convention is part of
|
89
|
-
/// Winch's default ABI [crate::abi::ABI].
|
90
|
-
Default,
|
91
|
-
}
|
92
|
-
|
93
|
-
impl CallingConvention {
|
94
|
-
/// Returns true if the current calling convention is `WasmtimeFastcall`.
|
95
|
-
fn is_fastcall(&self) -> bool {
|
96
|
-
match &self {
|
97
|
-
CallingConvention::WasmtimeFastcall => true,
|
98
|
-
_ => false,
|
99
|
-
}
|
100
|
-
}
|
101
|
-
|
102
|
-
/// Returns true if the current calling convention is `WasmtimeSystemV`.
|
103
|
-
fn is_systemv(&self) -> bool {
|
104
|
-
match &self {
|
105
|
-
CallingConvention::WasmtimeSystemV => true,
|
106
|
-
_ => false,
|
107
|
-
}
|
108
|
-
}
|
109
|
-
|
110
|
-
/// Returns true if the current calling convention is `WasmtimeAppleAarch64`.
|
111
|
-
fn is_apple_aarch64(&self) -> bool {
|
112
|
-
match &self {
|
113
|
-
CallingConvention::WasmtimeAppleAarch64 => true,
|
114
|
-
_ => false,
|
115
|
-
}
|
116
|
-
}
|
117
|
-
|
118
|
-
/// Returns true if the current calling convention is `Default`.
|
119
|
-
fn is_default(&self) -> bool {
|
120
|
-
match &self {
|
121
|
-
CallingConvention::Default => true,
|
122
|
-
_ => false,
|
123
|
-
}
|
124
|
-
}
|
125
|
-
}
|
126
|
-
|
127
|
-
/// A trait representing commonalities between the supported
|
128
|
-
/// instruction set architectures.
|
129
|
-
pub trait TargetIsa: Send + Sync {
|
130
|
-
/// Get the name of the ISA.
|
131
|
-
fn name(&self) -> &'static str;
|
132
|
-
|
133
|
-
/// Get the target triple of the ISA.
|
134
|
-
fn triple(&self) -> &Triple;
|
135
|
-
|
136
|
-
/// Get the ISA-independent flags that were used to make this trait object.
|
137
|
-
fn flags(&self) -> &settings::Flags;
|
138
|
-
|
139
|
-
/// Get the ISA-dependent flag values that were used to make this trait object.
|
140
|
-
fn isa_flags(&self) -> Vec<settings::Value>;
|
141
|
-
|
142
|
-
/// Get a flag indicating whether branch protection is enabled.
|
143
|
-
fn is_branch_protection_enabled(&self) -> bool {
|
144
|
-
false
|
145
|
-
}
|
146
|
-
|
147
|
-
/// Compile a function.
|
148
|
-
fn compile_function(
|
149
|
-
&self,
|
150
|
-
sig: &FuncType,
|
151
|
-
body: &FunctionBody,
|
152
|
-
env: &dyn FuncEnv,
|
153
|
-
validator: &mut FuncValidator<ValidatorResources>,
|
154
|
-
) -> Result<MachBufferFinalized<Final>>;
|
155
|
-
|
156
|
-
/// Get the default calling convention of the underlying target triple.
|
157
|
-
fn default_call_conv(&self) -> CallConv {
|
158
|
-
CallConv::triple_default(&self.triple())
|
159
|
-
}
|
160
|
-
|
161
|
-
/// Derive Wasmtime's calling convention from the triple's default
|
162
|
-
/// calling convention.
|
163
|
-
fn wasmtime_call_conv(&self) -> CallingConvention {
|
164
|
-
match self.default_call_conv() {
|
165
|
-
CallConv::AppleAarch64 => CallingConvention::WasmtimeAppleAarch64,
|
166
|
-
CallConv::SystemV => CallingConvention::WasmtimeSystemV,
|
167
|
-
CallConv::WindowsFastcall => CallingConvention::WasmtimeFastcall,
|
168
|
-
cc => unimplemented!("calling convention: {:?}", cc),
|
169
|
-
}
|
170
|
-
}
|
171
|
-
|
172
|
-
/// Get the endianess of the underlying target triple.
|
173
|
-
fn endianness(&self) -> target_lexicon::Endianness {
|
174
|
-
self.triple().endianness().unwrap()
|
175
|
-
}
|
176
|
-
|
177
|
-
/// See `cranelift_codegen::isa::TargetIsa::create_systemv_cie`.
|
178
|
-
fn create_systemv_cie(&self) -> Option<gimli::write::CommonInformationEntry> {
|
179
|
-
// By default, an ISA cannot create a System V CIE.
|
180
|
-
None
|
181
|
-
}
|
182
|
-
|
183
|
-
/// See `cranelift_codegen::isa::TargetIsa::text_section_builder`.
|
184
|
-
fn text_section_builder(&self, num_labeled_funcs: usize) -> Box<dyn TextSectionBuilder>;
|
185
|
-
|
186
|
-
/// See `cranelift_codegen::isa::TargetIsa::function_alignment`.
|
187
|
-
fn function_alignment(&self) -> u32;
|
188
|
-
|
189
|
-
/// Generate a trampoline that can be used to call a wasm function from wasmtime.
|
190
|
-
fn host_to_wasm_trampoline(&self, ty: &FuncType) -> Result<MachBufferFinalized<Final>>;
|
191
|
-
}
|
192
|
-
|
193
|
-
impl Debug for &dyn TargetIsa {
|
194
|
-
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
|
195
|
-
write!(
|
196
|
-
f,
|
197
|
-
"Target ISA {{ triple: {:?}, calling convention: {:?} }}",
|
198
|
-
self.triple(),
|
199
|
-
self.default_call_conv()
|
200
|
-
)
|
201
|
-
}
|
202
|
-
}
|