wasmtime 9.0.4 → 10.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +184 -101
- data/ext/Cargo.toml +6 -6
- data/ext/build.rs +2 -2
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/Cargo.toml +31 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/Cargo.toml +158 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/benches/x64-evex-encoding.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/ir/trapcode.rs +144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/abi.rs +1294 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit.rs +3684 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit_tests.rs +7895 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/imms.rs +1210 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/mod.rs +2966 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst.isle +4037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower/isle.rs +816 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower.isle +2906 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/mod.rs +238 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/mod.rs +424 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/abi.rs +825 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/args.rs +1812 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit.rs +3008 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit_tests.rs +2338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/encode.rs +262 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/imms.rs +250 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/mod.rs +1963 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/regs.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/vector.rs +669 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst.isle +2915 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst_vector.isle +760 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower/isle.rs +553 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower.isle +1409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/mod.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/abi.rs +957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit.rs +3707 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit_tests.rs +13409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/mod.rs +3426 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst.isle +5046 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/lower.isle +3991 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/mod.rs +213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/abi.rs +985 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/evex.rs +749 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/rex.rs +588 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/vex.rs +492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/args.rs +2193 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit.rs +4090 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit_tests.rs +5674 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/mod.rs +2667 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst.isle +5104 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower/isle.rs +1148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.isle +4481 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.rs +328 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/mod.rs +251 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isle_prelude.rs +862 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/abi.rs +2455 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/buffer.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/compile.rs +92 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/isle.rs +827 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/lower.rs +1388 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/mod.rs +549 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/reg.rs +537 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/vcode.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude.isle +578 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude_lower.isle +1012 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/settings.rs +600 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/verifier/mod.rs +1884 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/Cargo.toml +23 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/isa/x86.rs +444 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/chaos.rs +125 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/lib.rs +45 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/zero_sized.rs +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/src/list.rs +955 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/Cargo.toml +37 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/Cargo.toml +38 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/src/lib.rs +215 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/Cargo.toml +85 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/code_translator.rs +3538 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/dummy.rs +924 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/spec.rs +834 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/func_translator.rs +440 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/sections_translator.rs +417 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/translation_utils.rs +99 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/CONTRIBUTING.md +48 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/COPYRIGHT +17 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Cargo.toml +84 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Ideas.md +106 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-WHATWG +26 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/README.md +827 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/ci/miri.sh +14 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Big5.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-JP.txt +12 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-KR.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/GBK.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/IBM866.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-2022-JP.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-10.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-13.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-14.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-15.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-16.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-2.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-3.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-4.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-5.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-6.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-7.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8-I.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-R.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-U.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Shift_JIS.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16BE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16LE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-8.txt +5 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/gb18030.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/macintosh.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/replacement.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1250.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1251.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1252.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1253.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1254.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1255.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1256.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1257.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1258.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-874.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-mac-cyrillic.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-user-defined.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/generate-encoding-data.py +2008 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/rustfmt.toml +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/ascii.rs +1546 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/big5.rs +427 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/data.rs +114378 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_jp.rs +469 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_kr.rs +442 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/gb18030.rs +767 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/handles.rs +1969 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/iso_2022_jp.rs +1068 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/lib.rs +6133 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/macros.rs +1622 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/mem.rs +3354 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/replacement.rs +104 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/shift_jis.rs +426 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/simd_funcs.rs +453 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/single_byte.rs +714 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in_ref.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out_ref.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in_ref.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out.txt +17053 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in.txt +23945 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out.txt +23944 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out.txt +7404 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in.txt +11285 -0
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/// Helper macro to define methods in `prelude.isle` within `impl Context for
|
5
|
+
/// ...` for each backend. These methods are shared amongst all backends.
|
6
|
+
#[macro_export]
|
7
|
+
#[doc(hidden)]
|
8
|
+
macro_rules! isle_common_prelude_methods {
|
9
|
+
() => {
|
10
|
+
/// We don't have a way of making a `()` value in isle directly.
|
11
|
+
#[inline]
|
12
|
+
fn unit(&mut self) -> Unit {
|
13
|
+
()
|
14
|
+
}
|
15
|
+
|
16
|
+
#[inline]
|
17
|
+
fn u8_as_u32(&mut self, x: u8) -> u32 {
|
18
|
+
x.into()
|
19
|
+
}
|
20
|
+
|
21
|
+
#[inline]
|
22
|
+
fn u8_as_u64(&mut self, x: u8) -> u64 {
|
23
|
+
x.into()
|
24
|
+
}
|
25
|
+
|
26
|
+
#[inline]
|
27
|
+
fn u16_as_u64(&mut self, x: u16) -> u64 {
|
28
|
+
x.into()
|
29
|
+
}
|
30
|
+
|
31
|
+
#[inline]
|
32
|
+
fn u32_as_u64(&mut self, x: u32) -> u64 {
|
33
|
+
x.into()
|
34
|
+
}
|
35
|
+
|
36
|
+
#[inline]
|
37
|
+
fn i64_as_u64(&mut self, x: i64) -> u64 {
|
38
|
+
x as u64
|
39
|
+
}
|
40
|
+
|
41
|
+
#[inline]
|
42
|
+
fn u64_as_i32(&mut self, x: u64) -> i32 {
|
43
|
+
x as i32
|
44
|
+
}
|
45
|
+
|
46
|
+
#[inline]
|
47
|
+
fn i64_neg(&mut self, x: i64) -> i64 {
|
48
|
+
x.wrapping_neg()
|
49
|
+
}
|
50
|
+
|
51
|
+
#[inline]
|
52
|
+
fn u64_add(&mut self, x: u64, y: u64) -> u64 {
|
53
|
+
x.wrapping_add(y)
|
54
|
+
}
|
55
|
+
|
56
|
+
#[inline]
|
57
|
+
fn u64_sub(&mut self, x: u64, y: u64) -> u64 {
|
58
|
+
x.wrapping_sub(y)
|
59
|
+
}
|
60
|
+
|
61
|
+
#[inline]
|
62
|
+
fn u64_mul(&mut self, x: u64, y: u64) -> u64 {
|
63
|
+
x.wrapping_mul(y)
|
64
|
+
}
|
65
|
+
|
66
|
+
#[inline]
|
67
|
+
fn u64_sdiv(&mut self, x: u64, y: u64) -> Option<u64> {
|
68
|
+
let x = x as i64;
|
69
|
+
let y = y as i64;
|
70
|
+
x.checked_div(y).map(|d| d as u64)
|
71
|
+
}
|
72
|
+
|
73
|
+
#[inline]
|
74
|
+
fn u64_udiv(&mut self, x: u64, y: u64) -> Option<u64> {
|
75
|
+
x.checked_div(y)
|
76
|
+
}
|
77
|
+
|
78
|
+
#[inline]
|
79
|
+
fn u64_and(&mut self, x: u64, y: u64) -> u64 {
|
80
|
+
x & y
|
81
|
+
}
|
82
|
+
|
83
|
+
#[inline]
|
84
|
+
fn u64_or(&mut self, x: u64, y: u64) -> u64 {
|
85
|
+
x | y
|
86
|
+
}
|
87
|
+
|
88
|
+
#[inline]
|
89
|
+
fn u64_xor(&mut self, x: u64, y: u64) -> u64 {
|
90
|
+
x ^ y
|
91
|
+
}
|
92
|
+
|
93
|
+
#[inline]
|
94
|
+
fn u64_shl(&mut self, x: u64, y: u64) -> u64 {
|
95
|
+
x << y
|
96
|
+
}
|
97
|
+
|
98
|
+
#[inline]
|
99
|
+
fn imm64_shl(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
|
100
|
+
// Mask off any excess shift bits.
|
101
|
+
let shift_mask = (ty.bits() - 1) as u64;
|
102
|
+
let y = (y.bits() as u64) & shift_mask;
|
103
|
+
|
104
|
+
// Mask the result to `ty` bits.
|
105
|
+
let ty_mask = self.ty_mask(ty) as i64;
|
106
|
+
Imm64::new((x.bits() << y) & ty_mask)
|
107
|
+
}
|
108
|
+
|
109
|
+
#[inline]
|
110
|
+
fn imm64_ushr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
|
111
|
+
let ty_mask = self.ty_mask(ty);
|
112
|
+
let x = (x.bits() as u64) & ty_mask;
|
113
|
+
|
114
|
+
// Mask off any excess shift bits.
|
115
|
+
let shift_mask = (ty.bits() - 1) as u64;
|
116
|
+
let y = (y.bits() as u64) & shift_mask;
|
117
|
+
|
118
|
+
// NB: No need to mask off high bits because they are already zero.
|
119
|
+
Imm64::new((x >> y) as i64)
|
120
|
+
}
|
121
|
+
|
122
|
+
#[inline]
|
123
|
+
fn imm64_sshr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
|
124
|
+
// Sign extend `x` from `ty.bits()`-width to the full 64 bits.
|
125
|
+
let shift = u32::checked_sub(64, ty.bits()).unwrap_or(0);
|
126
|
+
let x = (x.bits() << shift) >> shift;
|
127
|
+
|
128
|
+
// Mask off any excess shift bits.
|
129
|
+
let shift_mask = (ty.bits() - 1) as i64;
|
130
|
+
let y = y.bits() & shift_mask;
|
131
|
+
|
132
|
+
// Mask off sign bits that aren't part of `ty`.
|
133
|
+
let ty_mask = self.ty_mask(ty) as i64;
|
134
|
+
Imm64::new((x >> y) & ty_mask)
|
135
|
+
}
|
136
|
+
|
137
|
+
#[inline]
|
138
|
+
fn u64_not(&mut self, x: u64) -> u64 {
|
139
|
+
!x
|
140
|
+
}
|
141
|
+
|
142
|
+
#[inline]
|
143
|
+
fn u64_eq(&mut self, x: u64, y: u64) -> bool {
|
144
|
+
x == y
|
145
|
+
}
|
146
|
+
|
147
|
+
#[inline]
|
148
|
+
fn u64_le(&mut self, x: u64, y: u64) -> bool {
|
149
|
+
x <= y
|
150
|
+
}
|
151
|
+
|
152
|
+
#[inline]
|
153
|
+
fn u64_lt(&mut self, x: u64, y: u64) -> bool {
|
154
|
+
x < y
|
155
|
+
}
|
156
|
+
|
157
|
+
#[inline]
|
158
|
+
fn u64_is_zero(&mut self, value: u64) -> bool {
|
159
|
+
0 == value
|
160
|
+
}
|
161
|
+
|
162
|
+
#[inline]
|
163
|
+
fn u64_is_odd(&mut self, x: u64) -> bool {
|
164
|
+
x & 1 == 1
|
165
|
+
}
|
166
|
+
|
167
|
+
#[inline]
|
168
|
+
fn i64_sextend_imm64(&mut self, ty: Type, mut x: Imm64) -> i64 {
|
169
|
+
x.sign_extend_from_width(ty.bits());
|
170
|
+
x.bits()
|
171
|
+
}
|
172
|
+
|
173
|
+
#[inline]
|
174
|
+
fn u64_uextend_imm64(&mut self, ty: Type, x: Imm64) -> u64 {
|
175
|
+
(x.bits() as u64) & self.ty_mask(ty)
|
176
|
+
}
|
177
|
+
|
178
|
+
#[inline]
|
179
|
+
fn imm64_icmp(&mut self, ty: Type, cc: &IntCC, x: Imm64, y: Imm64) -> Imm64 {
|
180
|
+
let ux = self.u64_uextend_imm64(ty, x);
|
181
|
+
let uy = self.u64_uextend_imm64(ty, y);
|
182
|
+
let sx = self.i64_sextend_imm64(ty, x);
|
183
|
+
let sy = self.i64_sextend_imm64(ty, y);
|
184
|
+
let result = match cc {
|
185
|
+
IntCC::Equal => ux == uy,
|
186
|
+
IntCC::NotEqual => ux != uy,
|
187
|
+
IntCC::UnsignedGreaterThanOrEqual => ux >= uy,
|
188
|
+
IntCC::UnsignedGreaterThan => ux > uy,
|
189
|
+
IntCC::UnsignedLessThanOrEqual => ux <= uy,
|
190
|
+
IntCC::UnsignedLessThan => ux < uy,
|
191
|
+
IntCC::SignedGreaterThanOrEqual => sx >= sy,
|
192
|
+
IntCC::SignedGreaterThan => sx > sy,
|
193
|
+
IntCC::SignedLessThanOrEqual => sx <= sy,
|
194
|
+
IntCC::SignedLessThan => sx < sy,
|
195
|
+
};
|
196
|
+
Imm64::new(result.into())
|
197
|
+
}
|
198
|
+
|
199
|
+
#[inline]
|
200
|
+
fn ty_bits(&mut self, ty: Type) -> u8 {
|
201
|
+
use std::convert::TryInto;
|
202
|
+
ty.bits().try_into().unwrap()
|
203
|
+
}
|
204
|
+
|
205
|
+
#[inline]
|
206
|
+
fn ty_bits_u16(&mut self, ty: Type) -> u16 {
|
207
|
+
ty.bits() as u16
|
208
|
+
}
|
209
|
+
|
210
|
+
#[inline]
|
211
|
+
fn ty_bits_u64(&mut self, ty: Type) -> u64 {
|
212
|
+
ty.bits() as u64
|
213
|
+
}
|
214
|
+
|
215
|
+
#[inline]
|
216
|
+
fn ty_bytes(&mut self, ty: Type) -> u16 {
|
217
|
+
u16::try_from(ty.bytes()).unwrap()
|
218
|
+
}
|
219
|
+
|
220
|
+
#[inline]
|
221
|
+
fn ty_mask(&mut self, ty: Type) -> u64 {
|
222
|
+
let ty_bits = ty.bits();
|
223
|
+
debug_assert_ne!(ty_bits, 0);
|
224
|
+
let shift = 64_u64
|
225
|
+
.checked_sub(ty_bits.into())
|
226
|
+
.expect("unimplemented for > 64 bits");
|
227
|
+
u64::MAX >> shift
|
228
|
+
}
|
229
|
+
|
230
|
+
#[inline]
|
231
|
+
fn ty_lane_mask(&mut self, ty: Type) -> u64 {
|
232
|
+
let ty_lane_count = ty.lane_count();
|
233
|
+
debug_assert_ne!(ty_lane_count, 0);
|
234
|
+
let shift = 64_u64
|
235
|
+
.checked_sub(ty_lane_count.into())
|
236
|
+
.expect("unimplemented for > 64 bits");
|
237
|
+
u64::MAX >> shift
|
238
|
+
}
|
239
|
+
|
240
|
+
#[inline]
|
241
|
+
fn ty_umin(&mut self, _ty: Type) -> u64 {
|
242
|
+
0
|
243
|
+
}
|
244
|
+
|
245
|
+
#[inline]
|
246
|
+
fn ty_umax(&mut self, ty: Type) -> u64 {
|
247
|
+
self.ty_mask(ty)
|
248
|
+
}
|
249
|
+
|
250
|
+
#[inline]
|
251
|
+
fn ty_smin(&mut self, ty: Type) -> u64 {
|
252
|
+
let ty_bits = ty.bits();
|
253
|
+
debug_assert_ne!(ty_bits, 0);
|
254
|
+
let shift = 64_u64
|
255
|
+
.checked_sub(ty_bits.into())
|
256
|
+
.expect("unimplemented for > 64 bits");
|
257
|
+
(i64::MIN as u64) >> shift
|
258
|
+
}
|
259
|
+
|
260
|
+
#[inline]
|
261
|
+
fn ty_smax(&mut self, ty: Type) -> u64 {
|
262
|
+
let ty_bits = ty.bits();
|
263
|
+
debug_assert_ne!(ty_bits, 0);
|
264
|
+
let shift = 64_u64
|
265
|
+
.checked_sub(ty_bits.into())
|
266
|
+
.expect("unimplemented for > 64 bits");
|
267
|
+
(i64::MAX as u64) >> shift
|
268
|
+
}
|
269
|
+
|
270
|
+
fn fits_in_16(&mut self, ty: Type) -> Option<Type> {
|
271
|
+
if ty.bits() <= 16 && !ty.is_dynamic_vector() {
|
272
|
+
Some(ty)
|
273
|
+
} else {
|
274
|
+
None
|
275
|
+
}
|
276
|
+
}
|
277
|
+
|
278
|
+
#[inline]
|
279
|
+
fn fits_in_32(&mut self, ty: Type) -> Option<Type> {
|
280
|
+
if ty.bits() <= 32 && !ty.is_dynamic_vector() {
|
281
|
+
Some(ty)
|
282
|
+
} else {
|
283
|
+
None
|
284
|
+
}
|
285
|
+
}
|
286
|
+
|
287
|
+
#[inline]
|
288
|
+
fn lane_fits_in_32(&mut self, ty: Type) -> Option<Type> {
|
289
|
+
if !ty.is_vector() && !ty.is_dynamic_vector() {
|
290
|
+
None
|
291
|
+
} else if ty.lane_type().bits() <= 32 {
|
292
|
+
Some(ty)
|
293
|
+
} else {
|
294
|
+
None
|
295
|
+
}
|
296
|
+
}
|
297
|
+
|
298
|
+
#[inline]
|
299
|
+
fn fits_in_64(&mut self, ty: Type) -> Option<Type> {
|
300
|
+
if ty.bits() <= 64 && !ty.is_dynamic_vector() {
|
301
|
+
Some(ty)
|
302
|
+
} else {
|
303
|
+
None
|
304
|
+
}
|
305
|
+
}
|
306
|
+
|
307
|
+
#[inline]
|
308
|
+
fn ty_int_ref_scalar_64(&mut self, ty: Type) -> Option<Type> {
|
309
|
+
if ty.bits() <= 64 && !ty.is_float() && !ty.is_vector() {
|
310
|
+
Some(ty)
|
311
|
+
} else {
|
312
|
+
None
|
313
|
+
}
|
314
|
+
}
|
315
|
+
|
316
|
+
#[inline]
|
317
|
+
fn ty_int_ref_scalar_64_extract(&mut self, ty: Type) -> Option<Type> {
|
318
|
+
self.ty_int_ref_scalar_64(ty)
|
319
|
+
}
|
320
|
+
|
321
|
+
#[inline]
|
322
|
+
fn ty_32(&mut self, ty: Type) -> Option<Type> {
|
323
|
+
if ty.bits() == 32 {
|
324
|
+
Some(ty)
|
325
|
+
} else {
|
326
|
+
None
|
327
|
+
}
|
328
|
+
}
|
329
|
+
|
330
|
+
#[inline]
|
331
|
+
fn ty_64(&mut self, ty: Type) -> Option<Type> {
|
332
|
+
if ty.bits() == 64 {
|
333
|
+
Some(ty)
|
334
|
+
} else {
|
335
|
+
None
|
336
|
+
}
|
337
|
+
}
|
338
|
+
|
339
|
+
#[inline]
|
340
|
+
fn ty_32_or_64(&mut self, ty: Type) -> Option<Type> {
|
341
|
+
if ty.bits() == 32 || ty.bits() == 64 {
|
342
|
+
Some(ty)
|
343
|
+
} else {
|
344
|
+
None
|
345
|
+
}
|
346
|
+
}
|
347
|
+
|
348
|
+
#[inline]
|
349
|
+
fn ty_8_or_16(&mut self, ty: Type) -> Option<Type> {
|
350
|
+
if ty.bits() == 8 || ty.bits() == 16 {
|
351
|
+
Some(ty)
|
352
|
+
} else {
|
353
|
+
None
|
354
|
+
}
|
355
|
+
}
|
356
|
+
|
357
|
+
#[inline]
|
358
|
+
fn int_fits_in_32(&mut self, ty: Type) -> Option<Type> {
|
359
|
+
match ty {
|
360
|
+
I8 | I16 | I32 => Some(ty),
|
361
|
+
_ => None,
|
362
|
+
}
|
363
|
+
}
|
364
|
+
|
365
|
+
#[inline]
|
366
|
+
fn ty_int_ref_64(&mut self, ty: Type) -> Option<Type> {
|
367
|
+
match ty {
|
368
|
+
I64 | R64 => Some(ty),
|
369
|
+
_ => None,
|
370
|
+
}
|
371
|
+
}
|
372
|
+
|
373
|
+
#[inline]
|
374
|
+
fn ty_int_ref_16_to_64(&mut self, ty: Type) -> Option<Type> {
|
375
|
+
match ty {
|
376
|
+
I16 | I32 | I64 | R64 => Some(ty),
|
377
|
+
_ => None,
|
378
|
+
}
|
379
|
+
}
|
380
|
+
|
381
|
+
#[inline]
|
382
|
+
fn ty_int(&mut self, ty: Type) -> Option<Type> {
|
383
|
+
ty.is_int().then(|| ty)
|
384
|
+
}
|
385
|
+
|
386
|
+
#[inline]
|
387
|
+
fn ty_scalar(&mut self, ty: Type) -> Option<Type> {
|
388
|
+
if ty.lane_count() == 1 {
|
389
|
+
Some(ty)
|
390
|
+
} else {
|
391
|
+
None
|
392
|
+
}
|
393
|
+
}
|
394
|
+
|
395
|
+
#[inline]
|
396
|
+
fn ty_scalar_float(&mut self, ty: Type) -> Option<Type> {
|
397
|
+
match ty {
|
398
|
+
F32 | F64 => Some(ty),
|
399
|
+
_ => None,
|
400
|
+
}
|
401
|
+
}
|
402
|
+
|
403
|
+
#[inline]
|
404
|
+
fn ty_float_or_vec(&mut self, ty: Type) -> Option<Type> {
|
405
|
+
match ty {
|
406
|
+
F32 | F64 => Some(ty),
|
407
|
+
ty if ty.is_vector() => Some(ty),
|
408
|
+
_ => None,
|
409
|
+
}
|
410
|
+
}
|
411
|
+
|
412
|
+
fn ty_vector_float(&mut self, ty: Type) -> Option<Type> {
|
413
|
+
if ty.is_vector() && ty.lane_type().is_float() {
|
414
|
+
Some(ty)
|
415
|
+
} else {
|
416
|
+
None
|
417
|
+
}
|
418
|
+
}
|
419
|
+
|
420
|
+
#[inline]
|
421
|
+
fn ty_vector_not_float(&mut self, ty: Type) -> Option<Type> {
|
422
|
+
if ty.is_vector() && !ty.lane_type().is_float() {
|
423
|
+
Some(ty)
|
424
|
+
} else {
|
425
|
+
None
|
426
|
+
}
|
427
|
+
}
|
428
|
+
|
429
|
+
#[inline]
|
430
|
+
fn ty_vec64_ctor(&mut self, ty: Type) -> Option<Type> {
|
431
|
+
if ty.is_vector() && ty.bits() == 64 {
|
432
|
+
Some(ty)
|
433
|
+
} else {
|
434
|
+
None
|
435
|
+
}
|
436
|
+
}
|
437
|
+
|
438
|
+
#[inline]
|
439
|
+
fn ty_vec64(&mut self, ty: Type) -> Option<Type> {
|
440
|
+
if ty.is_vector() && ty.bits() == 64 {
|
441
|
+
Some(ty)
|
442
|
+
} else {
|
443
|
+
None
|
444
|
+
}
|
445
|
+
}
|
446
|
+
|
447
|
+
#[inline]
|
448
|
+
fn ty_vec128(&mut self, ty: Type) -> Option<Type> {
|
449
|
+
if ty.is_vector() && ty.bits() == 128 {
|
450
|
+
Some(ty)
|
451
|
+
} else {
|
452
|
+
None
|
453
|
+
}
|
454
|
+
}
|
455
|
+
|
456
|
+
#[inline]
|
457
|
+
fn ty_dyn_vec64(&mut self, ty: Type) -> Option<Type> {
|
458
|
+
if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 64 {
|
459
|
+
Some(ty)
|
460
|
+
} else {
|
461
|
+
None
|
462
|
+
}
|
463
|
+
}
|
464
|
+
|
465
|
+
#[inline]
|
466
|
+
fn ty_dyn_vec128(&mut self, ty: Type) -> Option<Type> {
|
467
|
+
if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 128 {
|
468
|
+
Some(ty)
|
469
|
+
} else {
|
470
|
+
None
|
471
|
+
}
|
472
|
+
}
|
473
|
+
|
474
|
+
#[inline]
|
475
|
+
fn ty_vec64_int(&mut self, ty: Type) -> Option<Type> {
|
476
|
+
if ty.is_vector() && ty.bits() == 64 && ty.lane_type().is_int() {
|
477
|
+
Some(ty)
|
478
|
+
} else {
|
479
|
+
None
|
480
|
+
}
|
481
|
+
}
|
482
|
+
|
483
|
+
#[inline]
|
484
|
+
fn ty_vec128_int(&mut self, ty: Type) -> Option<Type> {
|
485
|
+
if ty.is_vector() && ty.bits() == 128 && ty.lane_type().is_int() {
|
486
|
+
Some(ty)
|
487
|
+
} else {
|
488
|
+
None
|
489
|
+
}
|
490
|
+
}
|
491
|
+
|
492
|
+
#[inline]
|
493
|
+
fn ty_addr64(&mut self, ty: Type) -> Option<Type> {
|
494
|
+
match ty {
|
495
|
+
I64 | R64 => Some(ty),
|
496
|
+
_ => None,
|
497
|
+
}
|
498
|
+
}
|
499
|
+
|
500
|
+
#[inline]
|
501
|
+
fn u64_from_imm64(&mut self, imm: Imm64) -> u64 {
|
502
|
+
imm.bits() as u64
|
503
|
+
}
|
504
|
+
|
505
|
+
#[inline]
|
506
|
+
fn imm64_power_of_two(&mut self, x: Imm64) -> Option<u64> {
|
507
|
+
let x = i64::from(x);
|
508
|
+
let x = u64::try_from(x).ok()?;
|
509
|
+
if x.is_power_of_two() {
|
510
|
+
Some(x.trailing_zeros().into())
|
511
|
+
} else {
|
512
|
+
None
|
513
|
+
}
|
514
|
+
}
|
515
|
+
|
516
|
+
#[inline]
|
517
|
+
fn u64_from_bool(&mut self, b: bool) -> u64 {
|
518
|
+
if b {
|
519
|
+
u64::MAX
|
520
|
+
} else {
|
521
|
+
0
|
522
|
+
}
|
523
|
+
}
|
524
|
+
|
525
|
+
#[inline]
|
526
|
+
fn multi_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
|
527
|
+
if ty.lane_count() > 1 {
|
528
|
+
Some((ty.lane_bits(), ty.lane_count()))
|
529
|
+
} else {
|
530
|
+
None
|
531
|
+
}
|
532
|
+
}
|
533
|
+
|
534
|
+
#[inline]
|
535
|
+
fn dynamic_lane(&mut self, ty: Type) -> Option<(u32, u32)> {
|
536
|
+
if ty.is_dynamic_vector() {
|
537
|
+
Some((ty.lane_bits(), ty.min_lane_count()))
|
538
|
+
} else {
|
539
|
+
None
|
540
|
+
}
|
541
|
+
}
|
542
|
+
|
543
|
+
#[inline]
|
544
|
+
fn dynamic_int_lane(&mut self, ty: Type) -> Option<u32> {
|
545
|
+
if ty.is_dynamic_vector() && crate::machinst::ty_has_int_representation(ty.lane_type())
|
546
|
+
{
|
547
|
+
Some(ty.lane_bits())
|
548
|
+
} else {
|
549
|
+
None
|
550
|
+
}
|
551
|
+
}
|
552
|
+
|
553
|
+
#[inline]
|
554
|
+
fn dynamic_fp_lane(&mut self, ty: Type) -> Option<u32> {
|
555
|
+
if ty.is_dynamic_vector()
|
556
|
+
&& crate::machinst::ty_has_float_or_vec_representation(ty.lane_type())
|
557
|
+
{
|
558
|
+
Some(ty.lane_bits())
|
559
|
+
} else {
|
560
|
+
None
|
561
|
+
}
|
562
|
+
}
|
563
|
+
|
564
|
+
#[inline]
|
565
|
+
fn ty_dyn64_int(&mut self, ty: Type) -> Option<Type> {
|
566
|
+
if ty.is_dynamic_vector() && ty.min_bits() == 64 && ty.lane_type().is_int() {
|
567
|
+
Some(ty)
|
568
|
+
} else {
|
569
|
+
None
|
570
|
+
}
|
571
|
+
}
|
572
|
+
|
573
|
+
#[inline]
|
574
|
+
fn ty_dyn128_int(&mut self, ty: Type) -> Option<Type> {
|
575
|
+
if ty.is_dynamic_vector() && ty.min_bits() == 128 && ty.lane_type().is_int() {
|
576
|
+
Some(ty)
|
577
|
+
} else {
|
578
|
+
None
|
579
|
+
}
|
580
|
+
}
|
581
|
+
|
582
|
+
fn u32_from_ieee32(&mut self, val: Ieee32) -> u32 {
|
583
|
+
val.bits()
|
584
|
+
}
|
585
|
+
|
586
|
+
fn u64_from_ieee64(&mut self, val: Ieee64) -> u64 {
|
587
|
+
val.bits()
|
588
|
+
}
|
589
|
+
|
590
|
+
fn u8_from_uimm8(&mut self, val: Uimm8) -> u8 {
|
591
|
+
val
|
592
|
+
}
|
593
|
+
|
594
|
+
fn not_vec32x2(&mut self, ty: Type) -> Option<Type> {
|
595
|
+
if ty.lane_bits() == 32 && ty.lane_count() == 2 {
|
596
|
+
None
|
597
|
+
} else {
|
598
|
+
Some(ty)
|
599
|
+
}
|
600
|
+
}
|
601
|
+
|
602
|
+
fn not_i64x2(&mut self, ty: Type) -> Option<()> {
|
603
|
+
if ty == I64X2 {
|
604
|
+
None
|
605
|
+
} else {
|
606
|
+
Some(())
|
607
|
+
}
|
608
|
+
}
|
609
|
+
|
610
|
+
fn trap_code_division_by_zero(&mut self) -> TrapCode {
|
611
|
+
TrapCode::IntegerDivisionByZero
|
612
|
+
}
|
613
|
+
|
614
|
+
fn trap_code_integer_overflow(&mut self) -> TrapCode {
|
615
|
+
TrapCode::IntegerOverflow
|
616
|
+
}
|
617
|
+
|
618
|
+
fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode {
|
619
|
+
TrapCode::BadConversionToInteger
|
620
|
+
}
|
621
|
+
|
622
|
+
fn nonzero_u64_from_imm64(&mut self, val: Imm64) -> Option<u64> {
|
623
|
+
match val.bits() {
|
624
|
+
0 => None,
|
625
|
+
n => Some(n as u64),
|
626
|
+
}
|
627
|
+
}
|
628
|
+
|
629
|
+
#[inline]
|
630
|
+
fn u32_add(&mut self, a: u32, b: u32) -> u32 {
|
631
|
+
a.wrapping_add(b)
|
632
|
+
}
|
633
|
+
|
634
|
+
#[inline]
|
635
|
+
fn u32_sub(&mut self, a: u32, b: u32) -> u32 {
|
636
|
+
a.wrapping_sub(b)
|
637
|
+
}
|
638
|
+
|
639
|
+
#[inline]
|
640
|
+
fn u32_and(&mut self, a: u32, b: u32) -> u32 {
|
641
|
+
a & b
|
642
|
+
}
|
643
|
+
|
644
|
+
#[inline]
|
645
|
+
fn s32_add_fallible(&mut self, a: u32, b: u32) -> Option<u32> {
|
646
|
+
let a = a as i32;
|
647
|
+
let b = b as i32;
|
648
|
+
a.checked_add(b).map(|sum| sum as u32)
|
649
|
+
}
|
650
|
+
|
651
|
+
#[inline]
|
652
|
+
fn u32_nonnegative(&mut self, x: u32) -> Option<u32> {
|
653
|
+
if (x as i32) >= 0 {
|
654
|
+
Some(x)
|
655
|
+
} else {
|
656
|
+
None
|
657
|
+
}
|
658
|
+
}
|
659
|
+
|
660
|
+
#[inline]
|
661
|
+
fn u32_lteq(&mut self, a: u32, b: u32) -> Option<()> {
|
662
|
+
if a <= b {
|
663
|
+
Some(())
|
664
|
+
} else {
|
665
|
+
None
|
666
|
+
}
|
667
|
+
}
|
668
|
+
|
669
|
+
#[inline]
|
670
|
+
fn u8_lteq(&mut self, a: u8, b: u8) -> Option<()> {
|
671
|
+
if a <= b {
|
672
|
+
Some(())
|
673
|
+
} else {
|
674
|
+
None
|
675
|
+
}
|
676
|
+
}
|
677
|
+
|
678
|
+
#[inline]
|
679
|
+
fn u8_lt(&mut self, a: u8, b: u8) -> Option<()> {
|
680
|
+
if a < b {
|
681
|
+
Some(())
|
682
|
+
} else {
|
683
|
+
None
|
684
|
+
}
|
685
|
+
}
|
686
|
+
|
687
|
+
#[inline]
|
688
|
+
fn imm64(&mut self, x: u64) -> Imm64 {
|
689
|
+
Imm64::new(x as i64)
|
690
|
+
}
|
691
|
+
|
692
|
+
#[inline]
|
693
|
+
fn imm64_masked(&mut self, ty: Type, x: u64) -> Imm64 {
|
694
|
+
Imm64::new((x & self.ty_mask(ty)) as i64)
|
695
|
+
}
|
696
|
+
|
697
|
+
#[inline]
|
698
|
+
fn simm32(&mut self, x: Imm64) -> Option<u32> {
|
699
|
+
let x64: i64 = x.into();
|
700
|
+
let x32: i32 = x64.try_into().ok()?;
|
701
|
+
Some(x32 as u32)
|
702
|
+
}
|
703
|
+
|
704
|
+
#[inline]
|
705
|
+
fn uimm8(&mut self, x: Imm64) -> Option<u8> {
|
706
|
+
let x64: i64 = x.into();
|
707
|
+
let x8: u8 = x64.try_into().ok()?;
|
708
|
+
Some(x8)
|
709
|
+
}
|
710
|
+
|
711
|
+
#[inline]
|
712
|
+
fn offset32(&mut self, x: Offset32) -> u32 {
|
713
|
+
let x: i32 = x.into();
|
714
|
+
x as u32
|
715
|
+
}
|
716
|
+
|
717
|
+
#[inline]
|
718
|
+
fn u8_and(&mut self, a: u8, b: u8) -> u8 {
|
719
|
+
a & b
|
720
|
+
}
|
721
|
+
|
722
|
+
#[inline]
|
723
|
+
fn u8_shl(&mut self, a: u8, b: u8) -> u8 {
|
724
|
+
a << b
|
725
|
+
}
|
726
|
+
|
727
|
+
#[inline]
|
728
|
+
fn u8_shr(&mut self, a: u8, b: u8) -> u8 {
|
729
|
+
a >> b
|
730
|
+
}
|
731
|
+
|
732
|
+
#[inline]
|
733
|
+
fn lane_type(&mut self, ty: Type) -> Type {
|
734
|
+
ty.lane_type()
|
735
|
+
}
|
736
|
+
|
737
|
+
#[inline]
|
738
|
+
fn offset32_to_u32(&mut self, offset: Offset32) -> u32 {
|
739
|
+
let offset: i32 = offset.into();
|
740
|
+
offset as u32
|
741
|
+
}
|
742
|
+
|
743
|
+
#[inline]
|
744
|
+
fn u32_to_offset32(&mut self, offset: u32) -> Offset32 {
|
745
|
+
Offset32::new(offset as i32)
|
746
|
+
}
|
747
|
+
|
748
|
+
fn range(&mut self, start: usize, end: usize) -> Range {
|
749
|
+
(start, end)
|
750
|
+
}
|
751
|
+
|
752
|
+
fn range_view(&mut self, (start, end): Range) -> RangeView {
|
753
|
+
if start >= end {
|
754
|
+
RangeView::Empty
|
755
|
+
} else {
|
756
|
+
RangeView::NonEmpty {
|
757
|
+
index: start,
|
758
|
+
rest: (start + 1, end),
|
759
|
+
}
|
760
|
+
}
|
761
|
+
}
|
762
|
+
|
763
|
+
#[inline]
|
764
|
+
fn mem_flags_trusted(&mut self) -> MemFlags {
|
765
|
+
MemFlags::trusted()
|
766
|
+
}
|
767
|
+
|
768
|
+
#[inline]
|
769
|
+
fn intcc_unsigned(&mut self, x: &IntCC) -> IntCC {
|
770
|
+
x.unsigned()
|
771
|
+
}
|
772
|
+
|
773
|
+
#[inline]
|
774
|
+
fn signed_cond_code(&mut self, cc: &condcodes::IntCC) -> Option<condcodes::IntCC> {
|
775
|
+
match cc {
|
776
|
+
IntCC::Equal
|
777
|
+
| IntCC::UnsignedGreaterThanOrEqual
|
778
|
+
| IntCC::UnsignedGreaterThan
|
779
|
+
| IntCC::UnsignedLessThanOrEqual
|
780
|
+
| IntCC::UnsignedLessThan
|
781
|
+
| IntCC::NotEqual => None,
|
782
|
+
IntCC::SignedGreaterThanOrEqual
|
783
|
+
| IntCC::SignedGreaterThan
|
784
|
+
| IntCC::SignedLessThanOrEqual
|
785
|
+
| IntCC::SignedLessThan => Some(*cc),
|
786
|
+
}
|
787
|
+
}
|
788
|
+
|
789
|
+
#[inline]
|
790
|
+
fn intcc_reverse(&mut self, cc: &IntCC) -> IntCC {
|
791
|
+
cc.reverse()
|
792
|
+
}
|
793
|
+
|
794
|
+
#[inline]
|
795
|
+
fn intcc_inverse(&mut self, cc: &IntCC) -> IntCC {
|
796
|
+
cc.inverse()
|
797
|
+
}
|
798
|
+
|
799
|
+
#[inline]
|
800
|
+
fn floatcc_reverse(&mut self, cc: &FloatCC) -> FloatCC {
|
801
|
+
cc.reverse()
|
802
|
+
}
|
803
|
+
|
804
|
+
#[inline]
|
805
|
+
fn floatcc_inverse(&mut self, cc: &FloatCC) -> FloatCC {
|
806
|
+
cc.inverse()
|
807
|
+
}
|
808
|
+
|
809
|
+
fn floatcc_unordered(&mut self, cc: &FloatCC) -> bool {
|
810
|
+
match *cc {
|
811
|
+
FloatCC::Unordered
|
812
|
+
| FloatCC::UnorderedOrEqual
|
813
|
+
| FloatCC::UnorderedOrLessThan
|
814
|
+
| FloatCC::UnorderedOrLessThanOrEqual
|
815
|
+
| FloatCC::UnorderedOrGreaterThan
|
816
|
+
| FloatCC::UnorderedOrGreaterThanOrEqual => true,
|
817
|
+
_ => false,
|
818
|
+
}
|
819
|
+
}
|
820
|
+
|
821
|
+
#[inline]
|
822
|
+
fn unpack_value_array_2(&mut self, arr: &ValueArray2) -> (Value, Value) {
|
823
|
+
let [a, b] = *arr;
|
824
|
+
(a, b)
|
825
|
+
}
|
826
|
+
|
827
|
+
#[inline]
|
828
|
+
fn pack_value_array_2(&mut self, a: Value, b: Value) -> ValueArray2 {
|
829
|
+
[a, b]
|
830
|
+
}
|
831
|
+
|
832
|
+
#[inline]
|
833
|
+
fn unpack_value_array_3(&mut self, arr: &ValueArray3) -> (Value, Value, Value) {
|
834
|
+
let [a, b, c] = *arr;
|
835
|
+
(a, b, c)
|
836
|
+
}
|
837
|
+
|
838
|
+
#[inline]
|
839
|
+
fn pack_value_array_3(&mut self, a: Value, b: Value, c: Value) -> ValueArray3 {
|
840
|
+
[a, b, c]
|
841
|
+
}
|
842
|
+
|
843
|
+
#[inline]
|
844
|
+
fn unpack_block_array_2(&mut self, arr: &BlockArray2) -> (BlockCall, BlockCall) {
|
845
|
+
let [a, b] = *arr;
|
846
|
+
(a, b)
|
847
|
+
}
|
848
|
+
|
849
|
+
#[inline]
|
850
|
+
fn pack_block_array_2(&mut self, a: BlockCall, b: BlockCall) -> BlockArray2 {
|
851
|
+
[a, b]
|
852
|
+
}
|
853
|
+
|
854
|
+
fn u128_as_u64(&mut self, val: u128) -> Option<u64> {
|
855
|
+
u64::try_from(val).ok()
|
856
|
+
}
|
857
|
+
|
858
|
+
fn u64_as_u32(&mut self, val: u64) -> Option<u32> {
|
859
|
+
u32::try_from(val).ok()
|
860
|
+
}
|
861
|
+
};
|
862
|
+
}
|