wasmtime 9.0.4 → 10.0.1

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Files changed (1933) hide show
  1. checksums.yaml +4 -4
  2. data/Cargo.lock +184 -101
  3. data/ext/Cargo.toml +6 -6
  4. data/ext/build.rs +2 -2
  5. data/ext/cargo-vendor/cranelift-bforest-0.97.1/.cargo-checksum.json +1 -0
  6. data/ext/cargo-vendor/cranelift-bforest-0.97.1/Cargo.toml +31 -0
  7. data/ext/cargo-vendor/cranelift-codegen-0.97.1/.cargo-checksum.json +1 -0
  8. data/ext/cargo-vendor/cranelift-codegen-0.97.1/Cargo.toml +158 -0
  9. data/ext/cargo-vendor/cranelift-codegen-0.97.1/benches/x64-evex-encoding.rs +52 -0
  10. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/ir/trapcode.rs +144 -0
  11. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/abi.rs +1294 -0
  12. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit.rs +3684 -0
  13. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit_tests.rs +7895 -0
  14. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/imms.rs +1210 -0
  15. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/mod.rs +2966 -0
  16. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst.isle +4037 -0
  17. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower/isle.rs +816 -0
  18. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower.isle +2906 -0
  19. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/mod.rs +238 -0
  20. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/mod.rs +424 -0
  21. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/abi.rs +825 -0
  22. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/args.rs +1812 -0
  23. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit.rs +3008 -0
  24. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit_tests.rs +2338 -0
  25. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/encode.rs +262 -0
  26. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/imms.rs +250 -0
  27. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/mod.rs +1963 -0
  28. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/regs.rs +223 -0
  29. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/unwind/systemv.rs +174 -0
  30. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/vector.rs +669 -0
  31. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst.isle +2915 -0
  32. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst_vector.isle +760 -0
  33. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower/isle.rs +553 -0
  34. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower.isle +1409 -0
  35. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/mod.rs +216 -0
  36. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/abi.rs +957 -0
  37. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit.rs +3707 -0
  38. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit_tests.rs +13409 -0
  39. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/mod.rs +3426 -0
  40. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst.isle +5046 -0
  41. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/lower.isle +3991 -0
  42. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/mod.rs +213 -0
  43. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/abi.rs +985 -0
  44. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/evex.rs +749 -0
  45. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/rex.rs +588 -0
  46. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/vex.rs +492 -0
  47. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/args.rs +2193 -0
  48. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit.rs +4090 -0
  49. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit_tests.rs +5674 -0
  50. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/mod.rs +2667 -0
  51. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst.isle +5104 -0
  52. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower/isle.rs +1148 -0
  53. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.isle +4481 -0
  54. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.rs +328 -0
  55. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/mod.rs +251 -0
  56. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isle_prelude.rs +862 -0
  57. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/abi.rs +2455 -0
  58. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/buffer.rs +2277 -0
  59. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/compile.rs +92 -0
  60. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/isle.rs +827 -0
  61. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/lower.rs +1388 -0
  62. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/mod.rs +549 -0
  63. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/reg.rs +537 -0
  64. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/vcode.rs +1580 -0
  65. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude.isle +578 -0
  66. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude_lower.isle +1012 -0
  67. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/settings.rs +600 -0
  68. data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/verifier/mod.rs +1884 -0
  69. data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/.cargo-checksum.json +1 -0
  70. data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/Cargo.toml +23 -0
  71. data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/isa/x86.rs +444 -0
  72. data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/shared/settings.rs +348 -0
  73. data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/.cargo-checksum.json +1 -0
  74. data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/Cargo.toml +22 -0
  75. data/ext/cargo-vendor/cranelift-control-0.97.1/.cargo-checksum.json +1 -0
  76. data/ext/cargo-vendor/cranelift-control-0.97.1/Cargo.toml +30 -0
  77. data/ext/cargo-vendor/cranelift-control-0.97.1/src/chaos.rs +125 -0
  78. data/ext/cargo-vendor/cranelift-control-0.97.1/src/lib.rs +45 -0
  79. data/ext/cargo-vendor/cranelift-control-0.97.1/src/zero_sized.rs +53 -0
  80. data/ext/cargo-vendor/cranelift-entity-0.97.1/.cargo-checksum.json +1 -0
  81. data/ext/cargo-vendor/cranelift-entity-0.97.1/Cargo.toml +35 -0
  82. data/ext/cargo-vendor/cranelift-entity-0.97.1/src/list.rs +955 -0
  83. data/ext/cargo-vendor/cranelift-frontend-0.97.1/.cargo-checksum.json +1 -0
  84. data/ext/cargo-vendor/cranelift-frontend-0.97.1/Cargo.toml +53 -0
  85. data/ext/cargo-vendor/cranelift-isle-0.97.1/.cargo-checksum.json +1 -0
  86. data/ext/cargo-vendor/cranelift-isle-0.97.1/Cargo.toml +37 -0
  87. data/ext/cargo-vendor/cranelift-native-0.97.1/.cargo-checksum.json +1 -0
  88. data/ext/cargo-vendor/cranelift-native-0.97.1/Cargo.toml +38 -0
  89. data/ext/cargo-vendor/cranelift-native-0.97.1/src/lib.rs +215 -0
  90. data/ext/cargo-vendor/cranelift-wasm-0.97.1/.cargo-checksum.json +1 -0
  91. data/ext/cargo-vendor/cranelift-wasm-0.97.1/Cargo.toml +85 -0
  92. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/code_translator.rs +3538 -0
  93. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/dummy.rs +924 -0
  94. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/spec.rs +834 -0
  95. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/func_translator.rs +440 -0
  96. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/sections_translator.rs +417 -0
  97. data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/translation_utils.rs +99 -0
  98. data/ext/cargo-vendor/encoding_rs-0.8.32/.cargo-checksum.json +1 -0
  99. data/ext/cargo-vendor/encoding_rs-0.8.32/CONTRIBUTING.md +48 -0
  100. data/ext/cargo-vendor/encoding_rs-0.8.32/COPYRIGHT +17 -0
  101. data/ext/cargo-vendor/encoding_rs-0.8.32/Cargo.toml +84 -0
  102. data/ext/cargo-vendor/encoding_rs-0.8.32/Ideas.md +106 -0
  103. data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-APACHE +202 -0
  104. data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-MIT +25 -0
  105. data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-WHATWG +26 -0
  106. data/ext/cargo-vendor/encoding_rs-0.8.32/README.md +827 -0
  107. data/ext/cargo-vendor/encoding_rs-0.8.32/ci/miri.sh +14 -0
  108. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Big5.txt +16 -0
  109. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-JP.txt +12 -0
  110. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-KR.txt +10 -0
  111. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/GBK.txt +16 -0
  112. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/IBM866.txt +8 -0
  113. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-2022-JP.txt +10 -0
  114. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-10.txt +8 -0
  115. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-13.txt +8 -0
  116. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-14.txt +8 -0
  117. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-15.txt +7 -0
  118. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-16.txt +8 -0
  119. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-2.txt +6 -0
  120. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-3.txt +6 -0
  121. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-4.txt +6 -0
  122. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-5.txt +6 -0
  123. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-6.txt +7 -0
  124. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-7.txt +11 -0
  125. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8-I.txt +9 -0
  126. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8.txt +9 -0
  127. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-R.txt +6 -0
  128. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-U.txt +6 -0
  129. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Shift_JIS.txt +8 -0
  130. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16BE.txt +8 -0
  131. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16LE.txt +8 -0
  132. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-8.txt +5 -0
  133. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/gb18030.txt +9 -0
  134. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/macintosh.txt +7 -0
  135. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/replacement.txt +10 -0
  136. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1250.txt +6 -0
  137. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1251.txt +6 -0
  138. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1252.txt +7 -0
  139. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1253.txt +8 -0
  140. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1254.txt +7 -0
  141. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1255.txt +8 -0
  142. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1256.txt +6 -0
  143. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1257.txt +7 -0
  144. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1258.txt +11 -0
  145. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-874.txt +7 -0
  146. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-mac-cyrillic.txt +6 -0
  147. data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-user-defined.txt +6 -0
  148. data/ext/cargo-vendor/encoding_rs-0.8.32/generate-encoding-data.py +2008 -0
  149. data/ext/cargo-vendor/encoding_rs-0.8.32/rustfmt.toml +1 -0
  150. data/ext/cargo-vendor/encoding_rs-0.8.32/src/ascii.rs +1546 -0
  151. data/ext/cargo-vendor/encoding_rs-0.8.32/src/big5.rs +427 -0
  152. data/ext/cargo-vendor/encoding_rs-0.8.32/src/data.rs +114378 -0
  153. data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_jp.rs +469 -0
  154. data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_kr.rs +442 -0
  155. data/ext/cargo-vendor/encoding_rs-0.8.32/src/gb18030.rs +767 -0
  156. data/ext/cargo-vendor/encoding_rs-0.8.32/src/handles.rs +1969 -0
  157. data/ext/cargo-vendor/encoding_rs-0.8.32/src/iso_2022_jp.rs +1068 -0
  158. data/ext/cargo-vendor/encoding_rs-0.8.32/src/lib.rs +6133 -0
  159. data/ext/cargo-vendor/encoding_rs-0.8.32/src/macros.rs +1622 -0
  160. data/ext/cargo-vendor/encoding_rs-0.8.32/src/mem.rs +3354 -0
  161. data/ext/cargo-vendor/encoding_rs-0.8.32/src/replacement.rs +104 -0
  162. data/ext/cargo-vendor/encoding_rs-0.8.32/src/shift_jis.rs +426 -0
  163. data/ext/cargo-vendor/encoding_rs-0.8.32/src/simd_funcs.rs +453 -0
  164. data/ext/cargo-vendor/encoding_rs-0.8.32/src/single_byte.rs +714 -0
  165. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in.txt +19787 -0
  166. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in_ref.txt +19787 -0
  167. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out.txt +14601 -0
  168. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out_ref.txt +14601 -0
  169. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in.txt +23945 -0
  170. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in_ref.txt +23945 -0
  171. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out.txt +17053 -0
  172. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out_ref.txt +17053 -0
  173. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in.txt +23945 -0
  174. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in_ref.txt +23945 -0
  175. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out.txt +23944 -0
  176. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out_ref.txt +23944 -0
  177. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_in.txt +8841 -0
  178. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_in_ref.txt +8841 -0
  179. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out.txt +7404 -0
  180. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out_ref.txt +7404 -0
  181. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0208_in.txt +8841 -0
  182. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0208_in_ref.txt +8841 -0
  183. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0208_out.txt +7341 -0
  184. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0208_out_ref.txt +7341 -0
  185. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0212_in.txt +8841 -0
  186. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/jis0212_in_ref.txt +8841 -0
  187. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in.txt +11285 -0
  188. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in_ref.txt +11285 -0
  189. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_out.txt +7355 -0
  190. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_out_ref.txt +7355 -0
  191. data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_labels_names.rs +242 -0
  192. data/ext/cargo-vendor/encoding_rs-0.8.32/src/testing.rs +262 -0
  193. data/ext/cargo-vendor/encoding_rs-0.8.32/src/utf_16.rs +472 -0
  194. data/ext/cargo-vendor/encoding_rs-0.8.32/src/utf_8.rs +1629 -0
  195. data/ext/cargo-vendor/encoding_rs-0.8.32/src/variant.rs +400 -0
  196. data/ext/cargo-vendor/encoding_rs-0.8.32/src/x_user_defined.rs +249 -0
  197. data/ext/cargo-vendor/equivalent-1.0.1/.cargo-checksum.json +1 -0
  198. data/ext/cargo-vendor/equivalent-1.0.1/Cargo.toml +27 -0
  199. data/ext/cargo-vendor/equivalent-1.0.1/LICENSE-APACHE +201 -0
  200. data/ext/cargo-vendor/equivalent-1.0.1/LICENSE-MIT +25 -0
  201. data/ext/cargo-vendor/equivalent-1.0.1/README.md +25 -0
  202. data/ext/cargo-vendor/equivalent-1.0.1/src/lib.rs +113 -0
  203. data/ext/cargo-vendor/file-per-thread-logger-0.2.0/.cargo-checksum.json +1 -0
  204. data/ext/cargo-vendor/file-per-thread-logger-0.2.0/Cargo.toml +36 -0
  205. data/ext/cargo-vendor/file-per-thread-logger-0.2.0/run-tests.sh +12 -0
  206. data/ext/cargo-vendor/file-per-thread-logger-0.2.0/src/lib.rs +200 -0
  207. data/ext/cargo-vendor/file-per-thread-logger-0.2.0/tests/test.rs +323 -0
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  1363. data/ext/cargo-vendor/wit-parser-0.7.1/tests/ui/worlds.wit +0 -40
  1364. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/LICENSE +0 -0
  1365. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/README.md +0 -0
  1366. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/lib.rs +0 -0
  1367. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/map.rs +0 -0
  1368. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/node.rs +0 -0
  1369. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/path.rs +0 -0
  1370. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/pool.rs +0 -0
  1371. /data/ext/cargo-vendor/{cranelift-bforest-0.96.4 → cranelift-bforest-0.97.1}/src/set.rs +0 -0
  1372. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/LICENSE +0 -0
  1373. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/README.md +0 -0
  1374. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/build.rs +0 -0
  1375. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/alias_analysis.rs +0 -0
  1376. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/binemit/mod.rs +0 -0
  1377. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/binemit/stack_map.rs +0 -0
  1378. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/bitset.rs +0 -0
  1379. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/cfg_printer.rs +0 -0
  1380. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/constant_hash.rs +0 -0
  1381. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/context.rs +0 -0
  1382. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ctxhash.rs +0 -0
  1383. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/cursor.rs +0 -0
  1384. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/data_value.rs +0 -0
  1385. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/dbg.rs +0 -0
  1386. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/dce.rs +0 -0
  1387. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/dominator_tree.rs +0 -0
  1388. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/egraph/cost.rs +0 -0
  1389. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/egraph/domtree.rs +0 -0
  1390. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/egraph/elaborate.rs +0 -0
  1391. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/egraph.rs +0 -0
  1392. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/flowgraph.rs +0 -0
  1393. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/fx.rs +0 -0
  1394. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/incremental_cache.rs +0 -0
  1395. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/inst_predicates.rs +0 -0
  1396. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/atomic_rmw_op.rs +0 -0
  1397. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/builder.rs +0 -0
  1398. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/condcodes.rs +0 -0
  1399. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/constant.rs +0 -0
  1400. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/dfg.rs +0 -0
  1401. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/dynamic_type.rs +0 -0
  1402. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/entities.rs +0 -0
  1403. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/extfunc.rs +0 -0
  1404. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/extname.rs +0 -0
  1405. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/function.rs +0 -0
  1406. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/globalvalue.rs +0 -0
  1407. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/immediates.rs +0 -0
  1408. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/instructions.rs +0 -0
  1409. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/jumptable.rs +0 -0
  1410. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/known_symbol.rs +0 -0
  1411. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/layout.rs +0 -0
  1412. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/libcall.rs +0 -0
  1413. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/memflags.rs +0 -0
  1414. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/mod.rs +0 -0
  1415. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/progpoint.rs +0 -0
  1416. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/sourceloc.rs +0 -0
  1417. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/stackslot.rs +0 -0
  1418. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/table.rs +0 -0
  1419. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/ir/types.rs +0 -0
  1420. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/inst/args.rs +0 -0
  1421. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/inst/regs.rs +0 -0
  1422. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/inst/unwind/systemv.rs +0 -0
  1423. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/inst/unwind.rs +0 -0
  1424. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/inst_neon.isle +0 -0
  1425. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/lower/isle/generated_code.rs +0 -0
  1426. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/lower.rs +0 -0
  1427. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/lower_dynamic_neon.isle +0 -0
  1428. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/aarch64/settings.rs +0 -0
  1429. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/call_conv.rs +0 -0
  1430. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/riscv64/inst/unwind.rs +0 -0
  1431. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/riscv64/lower/isle/generated_code.rs +0 -0
  1432. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/riscv64/lower.rs +0 -0
  1433. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/riscv64/settings.rs +0 -0
  1434. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/inst/args.rs +0 -0
  1435. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/inst/imms.rs +0 -0
  1436. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/inst/regs.rs +0 -0
  1437. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/inst/unwind/systemv.rs +0 -0
  1438. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/inst/unwind.rs +0 -0
  1439. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/lower/isle/generated_code.rs +0 -0
  1440. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/lower/isle.rs +0 -0
  1441. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/lower.rs +0 -0
  1442. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/s390x/settings.rs +0 -0
  1443. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/unwind/systemv.rs +0 -0
  1444. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/unwind/winx64.rs +0 -0
  1445. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/unwind.rs +0 -0
  1446. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/encoding/mod.rs +0 -0
  1447. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/inst/regs.rs +0 -0
  1448. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/inst/unwind/systemv.rs +0 -0
  1449. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/inst/unwind/winx64.rs +0 -0
  1450. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/inst/unwind.rs +0 -0
  1451. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/lower/isle/generated_code.rs +0 -0
  1452. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/isa/x64/settings.rs +0 -0
  1453. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/iterators.rs +0 -0
  1454. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/legalizer/globalvalue.rs +0 -0
  1455. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/legalizer/mod.rs +0 -0
  1456. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/legalizer/table.rs +0 -0
  1457. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/lib.rs +0 -0
  1458. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/loop_analysis.rs +0 -0
  1459. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/machinst/blockorder.rs +0 -0
  1460. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/machinst/helpers.rs +0 -0
  1461. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/machinst/inst_common.rs +0 -0
  1462. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/machinst/valueregs.rs +0 -0
  1463. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/nan_canonicalization.rs +0 -0
  1464. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/README.md +0 -0
  1465. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/arithmetic.isle +0 -0
  1466. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/bitops.isle +0 -0
  1467. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/cprop.isle +0 -0
  1468. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/extends.isle +0 -0
  1469. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/generated_code.rs +0 -0
  1470. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/icmp.isle +0 -0
  1471. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/remat.isle +0 -0
  1472. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/selects.isle +0 -0
  1473. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts/shifts.isle +0 -0
  1474. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/opts.rs +0 -0
  1475. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/prelude_opt.isle +0 -0
  1476. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/print_errors.rs +0 -0
  1477. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/remove_constant_phis.rs +0 -0
  1478. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/result.rs +0 -0
  1479. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/scoped_hash_map.rs +0 -0
  1480. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/souper_harvest.rs +0 -0
  1481. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/timing.rs +0 -0
  1482. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/unionfind.rs +0 -0
  1483. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/unreachable_code.rs +0 -0
  1484. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/value_label.rs +0 -0
  1485. /data/ext/cargo-vendor/{cranelift-codegen-0.96.4 → cranelift-codegen-0.97.1}/src/write.rs +0 -0
  1486. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/LICENSE +0 -0
  1487. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/README.md +0 -0
  1488. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/formats.rs +0 -0
  1489. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/instructions.rs +0 -0
  1490. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/isa.rs +0 -0
  1491. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/mod.rs +0 -0
  1492. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/operands.rs +0 -0
  1493. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/settings.rs +0 -0
  1494. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/types.rs +0 -0
  1495. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/cdsl/typevar.rs +0 -0
  1496. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/constant_hash.rs +0 -0
  1497. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/error.rs +0 -0
  1498. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/gen_inst.rs +0 -0
  1499. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/gen_settings.rs +0 -0
  1500. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/gen_types.rs +0 -0
  1501. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/isa/arm64.rs +0 -0
  1502. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/isa/mod.rs +0 -0
  1503. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/isa/riscv64.rs +0 -0
  1504. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/isa/s390x.rs +0 -0
  1505. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/lib.rs +0 -0
  1506. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/entities.rs +0 -0
  1507. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/formats.rs +0 -0
  1508. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/immediates.rs +0 -0
  1509. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/instructions.rs +0 -0
  1510. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/mod.rs +0 -0
  1511. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/shared/types.rs +0 -0
  1512. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/srcgen.rs +0 -0
  1513. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.96.4 → cranelift-codegen-meta-0.97.1}/src/unique_table.rs +0 -0
  1514. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.96.4 → cranelift-codegen-shared-0.97.1}/LICENSE +0 -0
  1515. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.96.4 → cranelift-codegen-shared-0.97.1}/README.md +0 -0
  1516. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.96.4 → cranelift-codegen-shared-0.97.1}/src/constant_hash.rs +0 -0
  1517. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.96.4 → cranelift-codegen-shared-0.97.1}/src/constants.rs +0 -0
  1518. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.96.4 → cranelift-codegen-shared-0.97.1}/src/lib.rs +0 -0
  1519. /data/ext/cargo-vendor/{cranelift-control-0.96.4 → cranelift-control-0.97.1}/LICENSE +0 -0
  1520. /data/ext/cargo-vendor/{cranelift-control-0.96.4 → cranelift-control-0.97.1}/README.md +0 -0
  1521. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/LICENSE +0 -0
  1522. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/README.md +0 -0
  1523. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/boxed_slice.rs +0 -0
  1524. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/iter.rs +0 -0
  1525. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/keys.rs +0 -0
  1526. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/lib.rs +0 -0
  1527. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/map.rs +0 -0
  1528. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/packed_option.rs +0 -0
  1529. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/primary.rs +0 -0
  1530. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/set.rs +0 -0
  1531. /data/ext/cargo-vendor/{cranelift-entity-0.96.4 → cranelift-entity-0.97.1}/src/sparse.rs +0 -0
  1532. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/LICENSE +0 -0
  1533. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/README.md +0 -0
  1534. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/src/frontend.rs +0 -0
  1535. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/src/lib.rs +0 -0
  1536. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/src/ssa.rs +0 -0
  1537. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/src/switch.rs +0 -0
  1538. /data/ext/cargo-vendor/{cranelift-frontend-0.96.4 → cranelift-frontend-0.97.1}/src/variable.rs +0 -0
  1539. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/README.md +0 -0
  1540. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/build.rs +0 -0
  1541. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/bad_converters.isle +0 -0
  1542. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/bound_var_type_mismatch.isle +0 -0
  1543. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/converter_extractor_constructor.isle +0 -0
  1544. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/error1.isle +0 -0
  1545. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/extra_parens.isle +0 -0
  1546. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/impure_expression.isle +0 -0
  1547. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/impure_rhs.isle +0 -0
  1548. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/multi_internal_etor.isle +0 -0
  1549. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/fail/multi_prio.isle +0 -0
  1550. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/borrows.isle +0 -0
  1551. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/borrows_main.rs +0 -0
  1552. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/iflets.isle +0 -0
  1553. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/iflets_main.rs +0 -0
  1554. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/multi_constructor.isle +0 -0
  1555. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/multi_constructor_main.rs +0 -0
  1556. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/multi_extractor.isle +0 -0
  1557. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/multi_extractor_main.rs +0 -0
  1558. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/test.isle +0 -0
  1559. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/link/test_main.rs +0 -0
  1560. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/bound_var.isle +0 -0
  1561. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/construct_and_extract.isle +0 -0
  1562. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/conversions.isle +0 -0
  1563. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/conversions_extern.isle +0 -0
  1564. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/let.isle +0 -0
  1565. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/nodebug.isle +0 -0
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  1567. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/test2.isle +0 -0
  1568. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/test3.isle +0 -0
  1569. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/test4.isle +0 -0
  1570. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/pass/tutorial.isle +0 -0
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  1572. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/run/iconst_main.rs +0 -0
  1573. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/run/let_shadowing.isle +0 -0
  1574. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/isle_examples/run/let_shadowing_main.rs +0 -0
  1575. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/ast.rs +0 -0
  1576. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/codegen.rs +0 -0
  1577. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/compile.rs +0 -0
  1578. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/error.rs +0 -0
  1579. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/lexer.rs +0 -0
  1580. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/lib.rs +0 -0
  1581. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/log.rs +0 -0
  1582. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/overlap.rs +0 -0
  1583. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/parser.rs +0 -0
  1584. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/sema.rs +0 -0
  1585. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/serialize.rs +0 -0
  1586. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/src/trie_again.rs +0 -0
  1587. /data/ext/cargo-vendor/{cranelift-isle-0.96.4 → cranelift-isle-0.97.1}/tests/run_tests.rs +0 -0
  1588. /data/ext/cargo-vendor/{cranelift-native-0.96.4 → cranelift-native-0.97.1}/LICENSE +0 -0
  1589. /data/ext/cargo-vendor/{cranelift-native-0.96.4 → cranelift-native-0.97.1}/README.md +0 -0
  1590. /data/ext/cargo-vendor/{cranelift-native-0.96.4 → cranelift-native-0.97.1}/src/riscv.rs +0 -0
  1591. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/LICENSE +0 -0
  1592. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/README.md +0 -0
  1593. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/code_translator/bounds_checks.rs +0 -0
  1594. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/environ/mod.rs +0 -0
  1595. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/heap.rs +0 -0
  1596. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/lib.rs +0 -0
  1597. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/module_translator.rs +0 -0
  1598. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/src/state.rs +0 -0
  1599. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/tests/wasm_testsuite.rs +0 -0
  1600. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/arith.wat +0 -0
  1601. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/br_table.wat +0 -0
  1602. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/call-simd.wat +0 -0
  1603. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/call.wat +0 -0
  1604. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/embenchen_fannkuch.wat +0 -0
  1605. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/embenchen_fasta.wat +0 -0
  1606. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/embenchen_ifs.wat +0 -0
  1607. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/embenchen_primes.wat +0 -0
  1608. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/fac-multi-value.wat +0 -0
  1609. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/fibonacci.wat +0 -0
  1610. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/globals.wat +0 -0
  1611. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/icall-simd.wat +0 -0
  1612. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/icall.wat +0 -0
  1613. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-0.wat +0 -0
  1614. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-1.wat +0 -0
  1615. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-2.wat +0 -0
  1616. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-3.wat +0 -0
  1617. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-4.wat +0 -0
  1618. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-5.wat +0 -0
  1619. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-reachability-translation-6.wat +0 -0
  1620. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-unreachable-else-params-2.wat +0 -0
  1621. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/if-unreachable-else-params.wat +0 -0
  1622. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/issue-1306-name-section-with-u32-max-function-index.wasm +0 -0
  1623. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/memory.wat +0 -0
  1624. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-0.wat +0 -0
  1625. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-1.wat +0 -0
  1626. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-10.wat +0 -0
  1627. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-11.wat +0 -0
  1628. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-12.wat +0 -0
  1629. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-13.wat +0 -0
  1630. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-14.wat +0 -0
  1631. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-15.wat +0 -0
  1632. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-16.wat +0 -0
  1633. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-17.wat +0 -0
  1634. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-2.wat +0 -0
  1635. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-3.wat +0 -0
  1636. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-4.wat +0 -0
  1637. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-5.wat +0 -0
  1638. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-6.wat +0 -0
  1639. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-7.wat +0 -0
  1640. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-8.wat +0 -0
  1641. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/multi-9.wat +0 -0
  1642. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/nullref.wat +0 -0
  1643. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/passive-data.wat +0 -0
  1644. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/pr2303.wat +0 -0
  1645. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/pr2559.wat +0 -0
  1646. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/ref-func-0.wat +0 -0
  1647. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/rust_fannkuch.wat +0 -0
  1648. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/select.wat +0 -0
  1649. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/simd-store.wat +0 -0
  1650. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/simd.wat +0 -0
  1651. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/table-copy.wat +0 -0
  1652. /data/ext/cargo-vendor/{cranelift-wasm-0.96.4 → cranelift-wasm-0.97.1}/wasmtests/unreachable_code.wat +0 -0
  1653. /data/ext/cargo-vendor/{file-per-thread-logger-0.1.6 → file-per-thread-logger-0.2.0}/LICENSE +0 -0
  1654. /data/ext/cargo-vendor/{file-per-thread-logger-0.1.6 → file-per-thread-logger-0.2.0}/README.md +0 -0
  1655. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/LICENSE +0 -0
  1656. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/README.md +0 -0
  1657. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/doc/DESIGN.md +0 -0
  1658. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/doc/TODO +0 -0
  1659. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/cfg.rs +0 -0
  1660. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/domtree.rs +0 -0
  1661. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/fuzzing/mod.rs +0 -0
  1662. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/indexset.rs +0 -0
  1663. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/ion/dump.rs +0 -0
  1664. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/ion/redundant_moves.rs +0 -0
  1665. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/ion/reg_traversal.rs +0 -0
  1666. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/postorder.rs +0 -0
  1667. /data/ext/cargo-vendor/{regalloc2-0.8.1 → regalloc2-0.9.2}/src/ssa.rs +0 -0
  1668. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/LICENSE +0 -0
  1669. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/README.md +0 -0
  1670. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/clocks.rs +0 -0
  1671. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/file.rs +0 -0
  1672. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/net.rs +0 -0
  1673. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/sched/unix.rs +0 -0
  1674. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/sched/windows.rs +0 -0
  1675. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/sched.rs +0 -0
  1676. /data/ext/cargo-vendor/{wasi-cap-std-sync-9.0.4 → wasi-cap-std-sync-10.0.1}/src/stdio.rs +0 -0
  1677. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/LICENSE +0 -0
  1678. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/README.md +0 -0
  1679. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/README.md +0 -0
  1680. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/docs/README.md +0 -0
  1681. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/README.md +0 -0
  1682. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/docs.md +0 -0
  1683. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/typenames.witx +0 -0
  1684. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_args.witx +0 -0
  1685. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_clock.witx +0 -0
  1686. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_environ.witx +0 -0
  1687. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_fd.witx +0 -0
  1688. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_path.witx +0 -0
  1689. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_poll.witx +0 -0
  1690. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_proc.witx +0 -0
  1691. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_random.witx +0 -0
  1692. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_sched.witx +0 -0
  1693. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/ephemeral/witx/wasi_ephemeral_sock.witx +0 -0
  1694. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/old/snapshot_0/docs.md +0 -0
  1695. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/old/snapshot_0/witx/typenames.witx +0 -0
  1696. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/old/snapshot_0/witx/wasi_unstable.witx +0 -0
  1697. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/snapshot/docs.html +0 -0
  1698. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/snapshot/docs.md +0 -0
  1699. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/snapshot/witx/typenames.witx +0 -0
  1700. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/phases/snapshot/witx/wasi_snapshot_preview1.witx +0 -0
  1701. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/proposal-template/README.md +0 -0
  1702. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/proposals/README.md +0 -0
  1703. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/snapshots/README.md +0 -0
  1704. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/WASI/standard/README.md +0 -0
  1705. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/build.rs +0 -0
  1706. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/clocks.rs +0 -0
  1707. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/dir.rs +0 -0
  1708. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/error.rs +0 -0
  1709. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/lib.rs +0 -0
  1710. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/pipe.rs +0 -0
  1711. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/random.rs +0 -0
  1712. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/sched/subscription.rs +0 -0
  1713. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/sched.rs +0 -0
  1714. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/snapshots/mod.rs +0 -0
  1715. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/snapshots/preview_0.rs +0 -0
  1716. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/snapshots/preview_1/error.rs +0 -0
  1717. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/string_array.rs +0 -0
  1718. /data/ext/cargo-vendor/{wasi-common-9.0.4 → wasi-common-10.0.1}/src/table.rs +0 -0
  1719. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasm-encoder-0.29.0}/LICENSE +0 -0
  1720. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmparser-0.107.0}/LICENSE +0 -0
  1721. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/README.md +0 -0
  1722. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/examples/simple.rs +0 -0
  1723. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/limits.rs +0 -0
  1724. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/component/aliases.rs +0 -0
  1725. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/component/names.rs +0 -0
  1726. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/component/start.rs +0 -0
  1727. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/component.rs +0 -0
  1728. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/code.rs +0 -0
  1729. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/custom.rs +0 -0
  1730. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/data.rs +0 -0
  1731. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/elements.rs +0 -0
  1732. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/exports.rs +0 -0
  1733. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/functions.rs +0 -0
  1734. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/globals.rs +0 -0
  1735. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/imports.rs +0 -0
  1736. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/init.rs +0 -0
  1737. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/memories.rs +0 -0
  1738. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/names.rs +0 -0
  1739. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/operators.rs +0 -0
  1740. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/tables.rs +0 -0
  1741. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers/core/tags.rs +0 -0
  1742. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/readers.rs +0 -0
  1743. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/resources.rs +0 -0
  1744. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/src/validator/func.rs +0 -0
  1745. /data/ext/cargo-vendor/{wasmparser-0.103.0 → wasmparser-0.107.0}/tests/big-module.rs +0 -0
  1746. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmparser-0.111.0}/LICENSE +0 -0
  1747. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmprinter-0.2.63}/LICENSE +0 -0
  1748. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-10.0.1}/LICENSE +0 -0
  1749. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/README.md +0 -0
  1750. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/code.rs +0 -0
  1751. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/func/host.rs +0 -0
  1752. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/func/options.rs +0 -0
  1753. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/func/typed.rs +0 -0
  1754. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/func.rs +0 -0
  1755. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/linker.rs +0 -0
  1756. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/storage.rs +0 -0
  1757. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/store.rs +0 -0
  1758. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/types.rs +0 -0
  1759. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/component/values.rs +0 -0
  1760. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/limits.rs +0 -0
  1761. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/module/registry.rs +0 -0
  1762. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/profiling.rs +0 -0
  1763. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/signatures.rs +0 -0
  1764. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/store/data.rs +0 -0
  1765. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/trampoline/memory.rs +0 -0
  1766. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/trampoline/table.rs +0 -0
  1767. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/trampoline.rs +0 -0
  1768. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/trap.rs +0 -0
  1769. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/unix.rs +0 -0
  1770. /data/ext/cargo-vendor/{wasmtime-9.0.4 → wasmtime-10.0.1}/src/windows.rs +0 -0
  1771. /data/ext/cargo-vendor/{wasmtime-asm-macros-9.0.4 → wasmtime-asm-macros-10.0.1}/src/lib.rs +0 -0
  1772. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-cache-10.0.1}/LICENSE +0 -0
  1773. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/build.rs +0 -0
  1774. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/config/tests.rs +0 -0
  1775. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/config.rs +0 -0
  1776. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/lib.rs +0 -0
  1777. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/tests.rs +0 -0
  1778. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/worker/tests/system_time_stub.rs +0 -0
  1779. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/worker/tests.rs +0 -0
  1780. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/src/worker.rs +0 -0
  1781. /data/ext/cargo-vendor/{wasmtime-cache-9.0.4 → wasmtime-cache-10.0.1}/tests/cache_write_default_config.rs +0 -0
  1782. /data/ext/cargo-vendor/{wasmtime-component-macro-9.0.4 → wasmtime-component-macro-10.0.1}/src/component.rs +0 -0
  1783. /data/ext/cargo-vendor/{wasmtime-component-macro-9.0.4 → wasmtime-component-macro-10.0.1}/src/lib.rs +0 -0
  1784. /data/ext/cargo-vendor/{wasmtime-component-util-9.0.4 → wasmtime-component-util-10.0.1}/src/lib.rs +0 -0
  1785. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-cranelift-10.0.1}/LICENSE +0 -0
  1786. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/SECURITY.md +0 -0
  1787. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/builder.rs +0 -0
  1788. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/compiler/component.rs +0 -0
  1789. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/gc.rs +0 -0
  1790. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/address_transform.rs +0 -0
  1791. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/attr.rs +0 -0
  1792. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/expression.rs +0 -0
  1793. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/line_program.rs +0 -0
  1794. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/mod.rs +0 -0
  1795. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/range_info_builder.rs +0 -0
  1796. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/refs.rs +0 -0
  1797. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/unit.rs +0 -0
  1798. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/transform/utils.rs +0 -0
  1799. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug/write_debuginfo.rs +0 -0
  1800. /data/ext/cargo-vendor/{wasmtime-cranelift-9.0.4 → wasmtime-cranelift-10.0.1}/src/debug.rs +0 -0
  1801. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-9.0.4 → wasmtime-cranelift-shared-10.0.1}/src/compiled_function.rs +0 -0
  1802. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-9.0.4 → wasmtime-cranelift-shared-10.0.1}/src/isa_builder.rs +0 -0
  1803. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-9.0.4 → wasmtime-cranelift-shared-10.0.1}/src/obj.rs +0 -0
  1804. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-environ-10.0.1}/LICENSE +0 -0
  1805. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/examples/factc.rs +0 -0
  1806. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/address_map.rs +0 -0
  1807. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/builtin.rs +0 -0
  1808. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/compilation.rs +0 -0
  1809. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/component/dfg.rs +0 -0
  1810. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/component/info.rs +0 -0
  1811. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/component/translate/adapt.rs +0 -0
  1812. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/component/vmcomponent_offsets.rs +0 -0
  1813. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/component.rs +0 -0
  1814. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/fact/core_types.rs +0 -0
  1815. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/fact/signature.rs +0 -0
  1816. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/fact/trampoline.rs +0 -0
  1817. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/fact/transcode.rs +0 -0
  1818. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/fact/traps.rs +0 -0
  1819. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/lib.rs +0 -0
  1820. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/module_types.rs +0 -0
  1821. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/obj.rs +0 -0
  1822. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/ref_bits.rs +0 -0
  1823. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/scopevec.rs +0 -0
  1824. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/stack_map.rs +0 -0
  1825. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/tunables.rs +0 -0
  1826. /data/ext/cargo-vendor/{wasmtime-environ-9.0.4 → wasmtime-environ-10.0.1}/src/vmoffsets.rs +0 -0
  1827. /data/ext/cargo-vendor/{wasmtime-types-9.0.4 → wasmtime-fiber-10.0.1}/LICENSE +0 -0
  1828. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/build.rs +0 -0
  1829. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/aarch64.rs +0 -0
  1830. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/arm.rs +0 -0
  1831. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/riscv64.rs +0 -0
  1832. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/s390x.S +0 -0
  1833. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/x86.rs +0 -0
  1834. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/unix/x86_64.rs +0 -0
  1835. /data/ext/cargo-vendor/{wasmtime-fiber-9.0.4 → wasmtime-fiber-10.0.1}/src/windows.c +0 -0
  1836. /data/ext/cargo-vendor/{wasmtime-wasi-9.0.4 → wasmtime-jit-10.0.1}/LICENSE +0 -0
  1837. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/code_memory.rs +0 -0
  1838. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/debug.rs +0 -0
  1839. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/demangling.rs +0 -0
  1840. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/unwind/miri.rs +0 -0
  1841. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/unwind/systemv.rs +0 -0
  1842. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/unwind/winx64.rs +0 -0
  1843. /data/ext/cargo-vendor/{wasmtime-jit-9.0.4 → wasmtime-jit-10.0.1}/src/unwind.rs +0 -0
  1844. /data/ext/cargo-vendor/{wasmtime-jit-debug-9.0.4 → wasmtime-jit-debug-10.0.1}/README.md +0 -0
  1845. /data/ext/cargo-vendor/{wasmtime-jit-debug-9.0.4 → wasmtime-jit-debug-10.0.1}/src/gdb_jit_int.rs +0 -0
  1846. /data/ext/cargo-vendor/{wasmtime-jit-debug-9.0.4 → wasmtime-jit-debug-10.0.1}/src/lib.rs +0 -0
  1847. /data/ext/cargo-vendor/{wasmtime-jit-debug-9.0.4 → wasmtime-jit-debug-10.0.1}/src/perf_jitdump.rs +0 -0
  1848. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-9.0.4 → wasmtime-jit-icache-coherence-10.0.1}/src/lib.rs +0 -0
  1849. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-9.0.4 → wasmtime-jit-icache-coherence-10.0.1}/src/libc.rs +0 -0
  1850. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-9.0.4 → wasmtime-jit-icache-coherence-10.0.1}/src/miri.rs +0 -0
  1851. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-9.0.4 → wasmtime-jit-icache-coherence-10.0.1}/src/win.rs +0 -0
  1852. /data/ext/cargo-vendor/{wiggle-9.0.4 → wasmtime-runtime-10.0.1}/LICENSE +0 -0
  1853. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/build.rs +0 -0
  1854. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/component/transcode.rs +0 -0
  1855. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/export.rs +0 -0
  1856. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/helpers.c +0 -0
  1857. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/imports.rs +0 -0
  1858. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/instance/allocator/pooling/index_allocator.rs +0 -0
  1859. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/instance/allocator/pooling/unix.rs +0 -0
  1860. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/instance/allocator/pooling/windows.rs +0 -0
  1861. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/mmap.rs +0 -0
  1862. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/mmap_vec.rs +0 -0
  1863. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/module_id.rs +0 -0
  1864. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/parking_spot.rs +0 -0
  1865. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/store_box.rs +0 -0
  1866. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines/aarch64.rs +0 -0
  1867. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines/riscv64.rs +0 -0
  1868. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines/s390x.S +0 -0
  1869. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines/s390x.rs +0 -0
  1870. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines/x86_64.rs +0 -0
  1871. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/trampolines.rs +0 -0
  1872. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/backtrace/aarch64.rs +0 -0
  1873. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/backtrace/riscv64.rs +0 -0
  1874. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/backtrace/s390x.rs +0 -0
  1875. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/backtrace/x86_64.rs +0 -0
  1876. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/backtrace.rs +0 -0
  1877. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/macos.rs +0 -0
  1878. /data/ext/cargo-vendor/{wasmtime-runtime-9.0.4 → wasmtime-runtime-10.0.1}/src/traphandlers/windows.rs +0 -0
  1879. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wasmtime-types-10.0.1}/LICENSE +0 -0
  1880. /data/ext/cargo-vendor/{wasmtime-types-9.0.4 → wasmtime-types-10.0.1}/src/error.rs +0 -0
  1881. /data/ext/cargo-vendor/{wiggle-macro-9.0.4 → wasmtime-wasi-10.0.1}/LICENSE +0 -0
  1882. /data/ext/cargo-vendor/{wasmtime-wasi-9.0.4 → wasmtime-wasi-10.0.1}/README.md +0 -0
  1883. /data/ext/cargo-vendor/{wasmtime-wasi-9.0.4 → wasmtime-wasi-10.0.1}/build.rs +0 -0
  1884. /data/ext/cargo-vendor/{wasmtime-winch-9.0.4 → wasmtime-winch-10.0.1}/LICENSE +0 -0
  1885. /data/ext/cargo-vendor/{wasmtime-winch-9.0.4 → wasmtime-winch-10.0.1}/src/builder.rs +0 -0
  1886. /data/ext/cargo-vendor/{wasmtime-winch-9.0.4 → wasmtime-winch-10.0.1}/src/lib.rs +0 -0
  1887. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-9.0.4 → wasmtime-wit-bindgen-10.0.1}/src/rust.rs +0 -0
  1888. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-9.0.4 → wasmtime-wit-bindgen-10.0.1}/src/source.rs +0 -0
  1889. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/borrow.rs +0 -0
  1890. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/error.rs +0 -0
  1891. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/guest_type.rs +0 -0
  1892. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/lib.rs +0 -0
  1893. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/region.rs +0 -0
  1894. /data/ext/cargo-vendor/{wiggle-9.0.4 → wiggle-10.0.1}/src/wasmtime.rs +0 -0
  1895. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/README.md +0 -0
  1896. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/codegen_settings.rs +0 -0
  1897. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/config.rs +0 -0
  1898. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/funcs.rs +0 -0
  1899. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/lib.rs +0 -0
  1900. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/lifetimes.rs +0 -0
  1901. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/module_trait.rs +0 -0
  1902. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/names.rs +0 -0
  1903. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/error.rs +0 -0
  1904. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/flags.rs +0 -0
  1905. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/handle.rs +0 -0
  1906. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/mod.rs +0 -0
  1907. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/record.rs +0 -0
  1908. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/types/variant.rs +0 -0
  1909. /data/ext/cargo-vendor/{wiggle-generate-9.0.4 → wiggle-generate-10.0.1}/src/wasmtime.rs +0 -0
  1910. /data/ext/cargo-vendor/{winch-codegen-0.7.4 → winch-codegen-0.8.1}/LICENSE +0 -0
  1911. /data/ext/cargo-vendor/{winch-codegen-0.7.4 → winch-codegen-0.8.1}/build.rs +0 -0
  1912. /data/ext/cargo-vendor/{winch-codegen-0.7.4 → winch-codegen-0.8.1}/src/isa/aarch64/address.rs +0 -0
  1913. /data/ext/cargo-vendor/{winch-codegen-0.7.4 → winch-codegen-0.8.1}/src/isa/reg.rs +0 -0
  1914. /data/ext/cargo-vendor/{winch-codegen-0.7.4 → winch-codegen-0.8.1}/src/regset.rs +0 -0
  1915. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/README.md +0 -0
  1916. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/src/abi.rs +0 -0
  1917. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/src/ast/toposort.rs +0 -0
  1918. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/src/sizealign.rs +0 -0
  1919. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/alias-no-type.wit +0 -0
  1920. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/async.wit.result +0 -0
  1921. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/async1.wit.result +0 -0
  1922. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/bad-list.wit +0 -0
  1923. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/bad-list.wit.result +0 -0
  1924. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/dangling-type.wit +0 -0
  1925. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/dangling-type.wit.result +0 -0
  1926. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/invalid-md.md +0 -0
  1927. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/invalid-toplevel.wit +0 -0
  1928. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/invalid-toplevel.wit.result +0 -0
  1929. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/keyword.wit +0 -0
  1930. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/keyword.wit.result +0 -0
  1931. /data/ext/cargo-vendor/{wit-parser-0.7.1/tests/ui/empty.wit → wit-parser-0.8.0/tests/ui/parse-fail/missing-package.wit} +0 -0
  1932. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/unresolved-use10/foo.wit +0 -0
  1933. /data/ext/cargo-vendor/{wit-parser-0.7.1 → wit-parser-0.8.0}/tests/ui/parse-fail/unterminated-string.wit.result +0 -0
@@ -0,0 +1,2193 @@
1
+ //! Instruction operand sub-components (aka "parts"): definitions and printing.
2
+
3
+ use super::regs::{self};
4
+ use super::EmitState;
5
+ use crate::ir::condcodes::{FloatCC, IntCC};
6
+ use crate::ir::{MemFlags, Type};
7
+ use crate::isa::x64::inst::regs::pretty_print_reg;
8
+ use crate::isa::x64::inst::Inst;
9
+ use crate::machinst::*;
10
+ use regalloc2::VReg;
11
+ use smallvec::{smallvec, SmallVec};
12
+ use std::fmt;
13
+ use std::string::String;
14
+
15
+ pub use crate::isa::x64::lower::isle::generated_code::DivSignedness;
16
+
17
+ /// An extenstion trait for converting `Writable{Xmm,Gpr}` to `Writable<Reg>`.
18
+ pub trait ToWritableReg {
19
+ /// Convert `Writable{Xmm,Gpr}` to `Writable<Reg>`.
20
+ fn to_writable_reg(&self) -> Writable<Reg>;
21
+ }
22
+
23
+ /// An extension trait for converting `Writable<Reg>` to `Writable{Xmm,Gpr}`.
24
+ pub trait FromWritableReg: Sized {
25
+ /// Convert `Writable<Reg>` to `Writable{Xmm,Gpr}`.
26
+ fn from_writable_reg(w: Writable<Reg>) -> Option<Self>;
27
+ }
28
+
29
+ /// A macro for defining a newtype of `Reg` that enforces some invariant about
30
+ /// the wrapped `Reg` (such as that it is of a particular register class).
31
+ macro_rules! newtype_of_reg {
32
+ (
33
+ $newtype_reg:ident,
34
+ $newtype_writable_reg:ident,
35
+ $newtype_option_writable_reg:ident,
36
+ reg_mem: ($($newtype_reg_mem:ident $(aligned:$aligned:ident)?),*),
37
+ reg_mem_imm: ($($newtype_reg_mem_imm:ident $(aligned:$aligned_imm:ident)?),*),
38
+ $newtype_imm8_reg:ident,
39
+ |$check_reg:ident| $check:expr
40
+ ) => {
41
+ /// A newtype wrapper around `Reg`.
42
+ #[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
43
+ pub struct $newtype_reg(Reg);
44
+
45
+ impl PartialEq<Reg> for $newtype_reg {
46
+ fn eq(&self, other: &Reg) -> bool {
47
+ self.0 == *other
48
+ }
49
+ }
50
+
51
+ impl From<$newtype_reg> for Reg {
52
+ fn from(r: $newtype_reg) -> Self {
53
+ r.0
54
+ }
55
+ }
56
+
57
+ impl $newtype_reg {
58
+ /// Create this newtype from the given register, or return `None` if the register
59
+ /// is not a valid instance of this newtype.
60
+ pub fn new($check_reg: Reg) -> Option<Self> {
61
+ if $check {
62
+ Some(Self($check_reg))
63
+ } else {
64
+ None
65
+ }
66
+ }
67
+
68
+ /// Get this newtype's underlying `Reg`.
69
+ pub fn to_reg(self) -> Reg {
70
+ self.0
71
+ }
72
+ }
73
+
74
+ // Convenience impl so that people working with this newtype can use it
75
+ // "just like" a plain `Reg`.
76
+ //
77
+ // NB: We cannot implement `DerefMut` because that would let people do
78
+ // nasty stuff like `*my_gpr.deref_mut() = some_xmm_reg`, breaking the
79
+ // invariants that `Gpr` provides.
80
+ impl std::ops::Deref for $newtype_reg {
81
+ type Target = Reg;
82
+
83
+ fn deref(&self) -> &Reg {
84
+ &self.0
85
+ }
86
+ }
87
+
88
+ /// Writable Gpr.
89
+ pub type $newtype_writable_reg = Writable<$newtype_reg>;
90
+
91
+ #[allow(dead_code)] // Used by some newtypes and not others.
92
+ /// Optional writable Gpr.
93
+ pub type $newtype_option_writable_reg = Option<Writable<$newtype_reg>>;
94
+
95
+ impl ToWritableReg for $newtype_writable_reg {
96
+ fn to_writable_reg(&self) -> Writable<Reg> {
97
+ Writable::from_reg(self.to_reg().to_reg())
98
+ }
99
+ }
100
+
101
+ impl FromWritableReg for $newtype_writable_reg {
102
+ fn from_writable_reg(w: Writable<Reg>) -> Option<Self> {
103
+ Some(Writable::from_reg($newtype_reg::new(w.to_reg())?))
104
+ }
105
+ }
106
+
107
+ $(
108
+ /// A newtype wrapper around `RegMem` for general-purpose registers.
109
+ #[derive(Clone, Debug)]
110
+ pub struct $newtype_reg_mem(RegMem);
111
+
112
+ impl From<$newtype_reg_mem> for RegMem {
113
+ fn from(rm: $newtype_reg_mem) -> Self {
114
+ rm.0
115
+ }
116
+ }
117
+
118
+ impl From<$newtype_reg> for $newtype_reg_mem {
119
+ fn from(r: $newtype_reg) -> Self {
120
+ $newtype_reg_mem(RegMem::reg(r.into()))
121
+ }
122
+ }
123
+
124
+ impl $newtype_reg_mem {
125
+ /// Construct a `RegMem` newtype from the given `RegMem`, or return
126
+ /// `None` if the `RegMem` is not a valid instance of this `RegMem`
127
+ /// newtype.
128
+ pub fn new(rm: RegMem) -> Option<Self> {
129
+ match rm {
130
+ RegMem::Mem { addr } => {
131
+ let mut _allow = true;
132
+ $(
133
+ if $aligned {
134
+ _allow = addr.aligned();
135
+ }
136
+ )?
137
+ if _allow {
138
+ Some(Self(RegMem::Mem { addr }))
139
+ } else {
140
+ None
141
+ }
142
+ }
143
+ RegMem::Reg { reg: $check_reg } if $check => Some(Self(rm)),
144
+ RegMem::Reg { reg: _ } => None,
145
+ }
146
+ }
147
+
148
+ /// Convert this newtype into its underlying `RegMem`.
149
+ pub fn to_reg_mem(self) -> RegMem {
150
+ self.0
151
+ }
152
+
153
+ #[allow(dead_code)] // Used by some newtypes and not others.
154
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
155
+ &self,
156
+ collector: &mut OperandCollector<'_, F>,
157
+ ) {
158
+ self.0.get_operands(collector);
159
+ }
160
+ }
161
+ impl PrettyPrint for $newtype_reg_mem {
162
+ fn pretty_print(&self, size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
163
+ self.0.pretty_print(size, allocs)
164
+ }
165
+ }
166
+ )*
167
+
168
+ $(
169
+ /// A newtype wrapper around `RegMemImm`.
170
+ #[derive(Clone, Debug)]
171
+ pub struct $newtype_reg_mem_imm(RegMemImm);
172
+
173
+ impl From<$newtype_reg_mem_imm> for RegMemImm {
174
+ fn from(rmi: $newtype_reg_mem_imm) -> RegMemImm {
175
+ rmi.0
176
+ }
177
+ }
178
+
179
+ impl From<$newtype_reg> for $newtype_reg_mem_imm {
180
+ fn from(r: $newtype_reg) -> Self {
181
+ $newtype_reg_mem_imm(RegMemImm::reg(r.into()))
182
+ }
183
+ }
184
+
185
+ impl $newtype_reg_mem_imm {
186
+ /// Construct this newtype from the given `RegMemImm`, or return
187
+ /// `None` if the `RegMemImm` is not a valid instance of this
188
+ /// newtype.
189
+ pub fn new(rmi: RegMemImm) -> Option<Self> {
190
+ match rmi {
191
+ RegMemImm::Imm { .. } => Some(Self(rmi)),
192
+ RegMemImm::Mem { addr } => {
193
+ let mut _allow = true;
194
+ $(
195
+ if $aligned_imm {
196
+ _allow = addr.aligned();
197
+ }
198
+ )?
199
+ if _allow {
200
+ Some(Self(RegMemImm::Mem { addr }))
201
+ } else {
202
+ None
203
+ }
204
+ }
205
+ RegMemImm::Reg { reg: $check_reg } if $check => Some(Self(rmi)),
206
+ RegMemImm::Reg { reg: _ } => None,
207
+ }
208
+ }
209
+
210
+ /// Convert this newtype into its underlying `RegMemImm`.
211
+ #[allow(dead_code)] // Used by some newtypes and not others.
212
+ pub fn to_reg_mem_imm(self) -> RegMemImm {
213
+ self.0
214
+ }
215
+
216
+ #[allow(dead_code)] // Used by some newtypes and not others.
217
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
218
+ &self,
219
+ collector: &mut OperandCollector<'_, F>,
220
+ ) {
221
+ self.0.get_operands(collector);
222
+ }
223
+ }
224
+
225
+ impl PrettyPrint for $newtype_reg_mem_imm {
226
+ fn pretty_print(&self, size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
227
+ self.0.pretty_print(size, allocs)
228
+ }
229
+ }
230
+ )*
231
+
232
+ /// A newtype wrapper around `Imm8Reg`.
233
+ #[derive(Clone, Debug)]
234
+ #[allow(dead_code)] // Used by some newtypes and not others.
235
+ pub struct $newtype_imm8_reg(Imm8Reg);
236
+
237
+ impl From<$newtype_reg> for $newtype_imm8_reg {
238
+ fn from(r: $newtype_reg) -> Self {
239
+ Self(Imm8Reg::Reg { reg: r.to_reg() })
240
+ }
241
+ }
242
+
243
+ impl $newtype_imm8_reg {
244
+ /// Construct this newtype from the given `Imm8Reg`, or return
245
+ /// `None` if the `Imm8Reg` is not a valid instance of this newtype.
246
+ #[allow(dead_code)] // Used by some newtypes and not others.
247
+ pub fn new(imm8_reg: Imm8Reg) -> Option<Self> {
248
+ match imm8_reg {
249
+ Imm8Reg::Imm8 { .. } => Some(Self(imm8_reg)),
250
+ Imm8Reg::Reg { reg: $check_reg } if $check => Some(Self(imm8_reg)),
251
+ Imm8Reg::Reg { reg: _ } => None,
252
+ }
253
+ }
254
+
255
+ /// Convert this newtype into its underlying `Imm8Reg`.
256
+ #[allow(dead_code)] // Used by some newtypes and not others.
257
+ pub fn to_imm8_reg(self) -> Imm8Reg {
258
+ self.0
259
+ }
260
+ }
261
+ };
262
+ }
263
+
264
+ // Define a newtype of `Reg` for general-purpose registers.
265
+ newtype_of_reg!(
266
+ Gpr,
267
+ WritableGpr,
268
+ OptionWritableGpr,
269
+ reg_mem: (GprMem),
270
+ reg_mem_imm: (GprMemImm),
271
+ Imm8Gpr,
272
+ |reg| reg.class() == RegClass::Int
273
+ );
274
+
275
+ // Define a newtype of `Reg` for XMM registers.
276
+ newtype_of_reg!(
277
+ Xmm,
278
+ WritableXmm,
279
+ OptionWritableXmm,
280
+ reg_mem: (XmmMem, XmmMemAligned aligned:true),
281
+ reg_mem_imm: (XmmMemImm, XmmMemAlignedImm aligned:true),
282
+ Imm8Xmm,
283
+ |reg| reg.class() == RegClass::Float
284
+ );
285
+
286
+ // N.B.: `Amode` is defined in `inst.isle`. We add some convenience
287
+ // constructors here.
288
+
289
+ // Re-export the type from the ISLE generated code.
290
+ pub use crate::isa::x64::lower::isle::generated_code::Amode;
291
+
292
+ impl Amode {
293
+ /// Create an immediate sign-extended and register addressing mode.
294
+ pub fn imm_reg(simm32: u32, base: Reg) -> Self {
295
+ debug_assert!(base.class() == RegClass::Int);
296
+ Self::ImmReg {
297
+ simm32,
298
+ base,
299
+ flags: MemFlags::trusted(),
300
+ }
301
+ }
302
+
303
+ /// Create a sign-extended-32-to-64 with register and shift addressing mode.
304
+ pub fn imm_reg_reg_shift(simm32: u32, base: Gpr, index: Gpr, shift: u8) -> Self {
305
+ debug_assert!(base.class() == RegClass::Int);
306
+ debug_assert!(index.class() == RegClass::Int);
307
+ debug_assert!(shift <= 3);
308
+ Self::ImmRegRegShift {
309
+ simm32,
310
+ base,
311
+ index,
312
+ shift,
313
+ flags: MemFlags::trusted(),
314
+ }
315
+ }
316
+
317
+ pub(crate) fn rip_relative(target: MachLabel) -> Self {
318
+ Self::RipRelative { target }
319
+ }
320
+
321
+ pub(crate) fn with_flags(&self, flags: MemFlags) -> Self {
322
+ match self {
323
+ &Self::ImmReg { simm32, base, .. } => Self::ImmReg {
324
+ simm32,
325
+ base,
326
+ flags,
327
+ },
328
+ &Self::ImmRegRegShift {
329
+ simm32,
330
+ base,
331
+ index,
332
+ shift,
333
+ ..
334
+ } => Self::ImmRegRegShift {
335
+ simm32,
336
+ base,
337
+ index,
338
+ shift,
339
+ flags,
340
+ },
341
+ _ => panic!("Amode {:?} cannot take memflags", self),
342
+ }
343
+ }
344
+
345
+ /// Add the registers mentioned by `self` to `collector`.
346
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
347
+ &self,
348
+ collector: &mut OperandCollector<'_, F>,
349
+ ) {
350
+ match self {
351
+ Amode::ImmReg { base, .. } => {
352
+ if *base != regs::rbp() && *base != regs::rsp() {
353
+ collector.reg_use(*base);
354
+ }
355
+ }
356
+ Amode::ImmRegRegShift { base, index, .. } => {
357
+ debug_assert_ne!(base.to_reg(), regs::rbp());
358
+ debug_assert_ne!(base.to_reg(), regs::rsp());
359
+ collector.reg_use(base.to_reg());
360
+ debug_assert_ne!(index.to_reg(), regs::rbp());
361
+ debug_assert_ne!(index.to_reg(), regs::rsp());
362
+ collector.reg_use(index.to_reg());
363
+ }
364
+ Amode::RipRelative { .. } => {
365
+ // RIP isn't involved in regalloc.
366
+ }
367
+ }
368
+ }
369
+
370
+ /// Same as `get_operands`, but add the registers in the "late" phase.
371
+ pub(crate) fn get_operands_late<F: Fn(VReg) -> VReg>(
372
+ &self,
373
+ collector: &mut OperandCollector<'_, F>,
374
+ ) {
375
+ match self {
376
+ Amode::ImmReg { base, .. } => {
377
+ collector.reg_late_use(*base);
378
+ }
379
+ Amode::ImmRegRegShift { base, index, .. } => {
380
+ collector.reg_late_use(base.to_reg());
381
+ collector.reg_late_use(index.to_reg());
382
+ }
383
+ Amode::RipRelative { .. } => {
384
+ // RIP isn't involved in regalloc.
385
+ }
386
+ }
387
+ }
388
+
389
+ pub(crate) fn get_flags(&self) -> MemFlags {
390
+ match self {
391
+ Amode::ImmReg { flags, .. } | Amode::ImmRegRegShift { flags, .. } => *flags,
392
+ Amode::RipRelative { .. } => MemFlags::trusted(),
393
+ }
394
+ }
395
+
396
+ pub(crate) fn can_trap(&self) -> bool {
397
+ !self.get_flags().notrap()
398
+ }
399
+
400
+ pub(crate) fn with_allocs(&self, allocs: &mut AllocationConsumer<'_>) -> Self {
401
+ // The order in which we consume allocs here must match the
402
+ // order in which we produce operands in get_operands() above.
403
+ match self {
404
+ &Amode::ImmReg {
405
+ simm32,
406
+ base,
407
+ flags,
408
+ } => {
409
+ let base = if base == regs::rsp() || base == regs::rbp() {
410
+ base
411
+ } else {
412
+ allocs.next(base)
413
+ };
414
+ Amode::ImmReg {
415
+ simm32,
416
+ flags,
417
+ base,
418
+ }
419
+ }
420
+ &Amode::ImmRegRegShift {
421
+ simm32,
422
+ base,
423
+ index,
424
+ shift,
425
+ flags,
426
+ } => Amode::ImmRegRegShift {
427
+ simm32,
428
+ shift,
429
+ flags,
430
+ base: Gpr::new(allocs.next(*base)).unwrap(),
431
+ index: Gpr::new(allocs.next(*index)).unwrap(),
432
+ },
433
+ &Amode::RipRelative { target } => Amode::RipRelative { target },
434
+ }
435
+ }
436
+
437
+ /// Offset the amode by a fixed offset.
438
+ pub(crate) fn offset(&self, offset: u32) -> Self {
439
+ let mut ret = self.clone();
440
+ match &mut ret {
441
+ &mut Amode::ImmReg { ref mut simm32, .. } => *simm32 += offset,
442
+ &mut Amode::ImmRegRegShift { ref mut simm32, .. } => *simm32 += offset,
443
+ _ => panic!("Cannot offset amode: {:?}", self),
444
+ }
445
+ ret
446
+ }
447
+
448
+ pub(crate) fn aligned(&self) -> bool {
449
+ self.get_flags().aligned()
450
+ }
451
+ }
452
+
453
+ impl PrettyPrint for Amode {
454
+ fn pretty_print(&self, _size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
455
+ match self {
456
+ Amode::ImmReg { simm32, base, .. } => {
457
+ // Note: size is always 8; the address is 64 bits,
458
+ // even if the addressed operand is smaller.
459
+ format!("{}({})", *simm32 as i32, pretty_print_reg(*base, 8, allocs))
460
+ }
461
+ Amode::ImmRegRegShift {
462
+ simm32,
463
+ base,
464
+ index,
465
+ shift,
466
+ ..
467
+ } => format!(
468
+ "{}({},{},{})",
469
+ *simm32 as i32,
470
+ pretty_print_reg(base.to_reg(), 8, allocs),
471
+ pretty_print_reg(index.to_reg(), 8, allocs),
472
+ 1 << shift
473
+ ),
474
+ Amode::RipRelative { ref target } => format!("label{}(%rip)", target.get()),
475
+ }
476
+ }
477
+ }
478
+
479
+ /// A Memory Address. These denote a 64-bit value only.
480
+ /// Used for usual addressing modes as well as addressing modes used during compilation, when the
481
+ /// moving SP offset is not known.
482
+ #[derive(Clone, Debug)]
483
+ pub enum SyntheticAmode {
484
+ /// A real amode.
485
+ Real(Amode),
486
+
487
+ /// A (virtual) offset to the "nominal SP" value, which will be recomputed as we push and pop
488
+ /// within the function.
489
+ NominalSPOffset {
490
+ /// The nominal stack pointer value.
491
+ simm32: u32,
492
+ },
493
+
494
+ /// A virtual offset to a constant that will be emitted in the constant section of the buffer.
495
+ ConstantOffset(VCodeConstant),
496
+ }
497
+
498
+ impl SyntheticAmode {
499
+ /// Create a real addressing mode.
500
+ pub fn real(amode: Amode) -> Self {
501
+ Self::Real(amode)
502
+ }
503
+
504
+ pub(crate) fn nominal_sp_offset(simm32: u32) -> Self {
505
+ SyntheticAmode::NominalSPOffset { simm32 }
506
+ }
507
+
508
+ /// Add the registers mentioned by `self` to `collector`.
509
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
510
+ &self,
511
+ collector: &mut OperandCollector<'_, F>,
512
+ ) {
513
+ match self {
514
+ SyntheticAmode::Real(addr) => addr.get_operands(collector),
515
+ SyntheticAmode::NominalSPOffset { .. } => {
516
+ // Nothing to do; the base is SP and isn't involved in regalloc.
517
+ }
518
+ SyntheticAmode::ConstantOffset(_) => {}
519
+ }
520
+ }
521
+
522
+ /// Same as `get_operands`, but add the register in the "late" phase.
523
+ pub(crate) fn get_operands_late<F: Fn(VReg) -> VReg>(
524
+ &self,
525
+ collector: &mut OperandCollector<'_, F>,
526
+ ) {
527
+ match self {
528
+ SyntheticAmode::Real(addr) => addr.get_operands_late(collector),
529
+ SyntheticAmode::NominalSPOffset { .. } => {
530
+ // Nothing to do; the base is SP and isn't involved in regalloc.
531
+ }
532
+ SyntheticAmode::ConstantOffset(_) => {}
533
+ }
534
+ }
535
+
536
+ pub(crate) fn finalize(&self, state: &mut EmitState, buffer: &mut MachBuffer<Inst>) -> Amode {
537
+ match self {
538
+ SyntheticAmode::Real(addr) => addr.clone(),
539
+ SyntheticAmode::NominalSPOffset { simm32 } => {
540
+ let off = *simm32 as i64 + state.virtual_sp_offset;
541
+ // TODO will require a sequence of add etc.
542
+ assert!(
543
+ off <= u32::max_value() as i64,
544
+ "amode finalize: add sequence NYI"
545
+ );
546
+ Amode::imm_reg(off as u32, regs::rsp())
547
+ }
548
+ SyntheticAmode::ConstantOffset(c) => {
549
+ Amode::rip_relative(buffer.get_label_for_constant(*c))
550
+ }
551
+ }
552
+ }
553
+
554
+ pub(crate) fn with_allocs(&self, allocs: &mut AllocationConsumer<'_>) -> Self {
555
+ match self {
556
+ SyntheticAmode::Real(addr) => SyntheticAmode::Real(addr.with_allocs(allocs)),
557
+ &SyntheticAmode::NominalSPOffset { .. } | &SyntheticAmode::ConstantOffset { .. } => {
558
+ self.clone()
559
+ }
560
+ }
561
+ }
562
+
563
+ pub(crate) fn aligned(&self) -> bool {
564
+ match self {
565
+ SyntheticAmode::Real(addr) => addr.aligned(),
566
+ SyntheticAmode::NominalSPOffset { .. } | SyntheticAmode::ConstantOffset { .. } => true,
567
+ }
568
+ }
569
+ }
570
+
571
+ impl Into<SyntheticAmode> for Amode {
572
+ fn into(self) -> SyntheticAmode {
573
+ SyntheticAmode::Real(self)
574
+ }
575
+ }
576
+
577
+ impl Into<SyntheticAmode> for VCodeConstant {
578
+ fn into(self) -> SyntheticAmode {
579
+ SyntheticAmode::ConstantOffset(self)
580
+ }
581
+ }
582
+
583
+ impl PrettyPrint for SyntheticAmode {
584
+ fn pretty_print(&self, _size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
585
+ match self {
586
+ // See note in `Amode` regarding constant size of `8`.
587
+ SyntheticAmode::Real(addr) => addr.pretty_print(8, allocs),
588
+ SyntheticAmode::NominalSPOffset { simm32 } => {
589
+ format!("rsp({} + virtual offset)", *simm32 as i32)
590
+ }
591
+ SyntheticAmode::ConstantOffset(c) => format!("const({})", c.as_u32()),
592
+ }
593
+ }
594
+ }
595
+
596
+ /// An operand which is either an integer Register, a value in Memory or an Immediate. This can
597
+ /// denote an 8, 16, 32 or 64 bit value. For the Immediate form, in the 8- and 16-bit case, only
598
+ /// the lower 8 or 16 bits of `simm32` is relevant. In the 64-bit case, the value denoted by
599
+ /// `simm32` is its sign-extension out to 64 bits.
600
+ #[derive(Clone, Debug)]
601
+ pub enum RegMemImm {
602
+ /// A register operand.
603
+ Reg {
604
+ /// The underlying register.
605
+ reg: Reg,
606
+ },
607
+ /// A memory operand.
608
+ Mem {
609
+ /// The memory address.
610
+ addr: SyntheticAmode,
611
+ },
612
+ /// An immediate operand.
613
+ Imm {
614
+ /// The immediate value.
615
+ simm32: u32,
616
+ },
617
+ }
618
+
619
+ impl RegMemImm {
620
+ /// Create a register operand.
621
+ pub fn reg(reg: Reg) -> Self {
622
+ debug_assert!(reg.class() == RegClass::Int || reg.class() == RegClass::Float);
623
+ Self::Reg { reg }
624
+ }
625
+
626
+ /// Create a memory operand.
627
+ pub fn mem(addr: impl Into<SyntheticAmode>) -> Self {
628
+ Self::Mem { addr: addr.into() }
629
+ }
630
+
631
+ /// Create an immediate operand.
632
+ pub fn imm(simm32: u32) -> Self {
633
+ Self::Imm { simm32 }
634
+ }
635
+
636
+ /// Asserts that in register mode, the reg class is the one that's expected.
637
+ pub(crate) fn assert_regclass_is(&self, expected_reg_class: RegClass) {
638
+ if let Self::Reg { reg } = self {
639
+ debug_assert_eq!(reg.class(), expected_reg_class);
640
+ }
641
+ }
642
+
643
+ /// Add the regs mentioned by `self` to `collector`.
644
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
645
+ &self,
646
+ collector: &mut OperandCollector<'_, F>,
647
+ ) {
648
+ match self {
649
+ Self::Reg { reg } => collector.reg_use(*reg),
650
+ Self::Mem { addr } => addr.get_operands(collector),
651
+ Self::Imm { .. } => {}
652
+ }
653
+ }
654
+
655
+ pub(crate) fn with_allocs(&self, allocs: &mut AllocationConsumer<'_>) -> Self {
656
+ match self {
657
+ Self::Reg { reg } => Self::Reg {
658
+ reg: allocs.next(*reg),
659
+ },
660
+ Self::Mem { addr } => Self::Mem {
661
+ addr: addr.with_allocs(allocs),
662
+ },
663
+ Self::Imm { .. } => self.clone(),
664
+ }
665
+ }
666
+ }
667
+
668
+ impl From<RegMem> for RegMemImm {
669
+ fn from(rm: RegMem) -> RegMemImm {
670
+ match rm {
671
+ RegMem::Reg { reg } => RegMemImm::Reg { reg },
672
+ RegMem::Mem { addr } => RegMemImm::Mem { addr },
673
+ }
674
+ }
675
+ }
676
+
677
+ impl PrettyPrint for RegMemImm {
678
+ fn pretty_print(&self, size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
679
+ match self {
680
+ Self::Reg { reg } => pretty_print_reg(*reg, size, allocs),
681
+ Self::Mem { addr } => addr.pretty_print(size, allocs),
682
+ Self::Imm { simm32 } => format!("${}", *simm32 as i32),
683
+ }
684
+ }
685
+ }
686
+
687
+ /// An operand which is either an 8-bit integer immediate or a register.
688
+ #[derive(Clone, Debug)]
689
+ pub enum Imm8Reg {
690
+ /// 8-bit immediate operand.
691
+ Imm8 {
692
+ /// The 8-bit immediate value.
693
+ imm: u8,
694
+ },
695
+ /// A register operand.
696
+ Reg {
697
+ /// The underlying register.
698
+ reg: Reg,
699
+ },
700
+ }
701
+
702
+ impl From<u8> for Imm8Reg {
703
+ fn from(imm: u8) -> Self {
704
+ Self::Imm8 { imm }
705
+ }
706
+ }
707
+
708
+ impl From<Reg> for Imm8Reg {
709
+ fn from(reg: Reg) -> Self {
710
+ Self::Reg { reg }
711
+ }
712
+ }
713
+
714
+ /// An operand which is either an integer Register or a value in Memory. This can denote an 8, 16,
715
+ /// 32, 64, or 128 bit value.
716
+ #[derive(Clone, Debug)]
717
+ pub enum RegMem {
718
+ /// A register operand.
719
+ Reg {
720
+ /// The underlying register.
721
+ reg: Reg,
722
+ },
723
+ /// A memory operand.
724
+ Mem {
725
+ /// The memory address.
726
+ addr: SyntheticAmode,
727
+ },
728
+ }
729
+
730
+ impl RegMem {
731
+ /// Create a register operand.
732
+ pub fn reg(reg: Reg) -> Self {
733
+ debug_assert!(reg.class() == RegClass::Int || reg.class() == RegClass::Float);
734
+ Self::Reg { reg }
735
+ }
736
+
737
+ /// Create a memory operand.
738
+ pub fn mem(addr: impl Into<SyntheticAmode>) -> Self {
739
+ Self::Mem { addr: addr.into() }
740
+ }
741
+ /// Asserts that in register mode, the reg class is the one that's expected.
742
+ pub(crate) fn assert_regclass_is(&self, expected_reg_class: RegClass) {
743
+ if let Self::Reg { reg } = self {
744
+ debug_assert_eq!(reg.class(), expected_reg_class);
745
+ }
746
+ }
747
+ /// Add the regs mentioned by `self` to `collector`.
748
+ pub(crate) fn get_operands<F: Fn(VReg) -> VReg>(
749
+ &self,
750
+ collector: &mut OperandCollector<'_, F>,
751
+ ) {
752
+ match self {
753
+ RegMem::Reg { reg } => collector.reg_use(*reg),
754
+ RegMem::Mem { addr, .. } => addr.get_operands(collector),
755
+ }
756
+ }
757
+
758
+ pub(crate) fn with_allocs(&self, allocs: &mut AllocationConsumer<'_>) -> Self {
759
+ match self {
760
+ RegMem::Reg { reg } => RegMem::Reg {
761
+ reg: allocs.next(*reg),
762
+ },
763
+ RegMem::Mem { addr } => RegMem::Mem {
764
+ addr: addr.with_allocs(allocs),
765
+ },
766
+ }
767
+ }
768
+ }
769
+
770
+ impl From<Reg> for RegMem {
771
+ fn from(reg: Reg) -> RegMem {
772
+ RegMem::Reg { reg }
773
+ }
774
+ }
775
+
776
+ impl From<Writable<Reg>> for RegMem {
777
+ fn from(r: Writable<Reg>) -> Self {
778
+ RegMem::reg(r.to_reg())
779
+ }
780
+ }
781
+
782
+ impl PrettyPrint for RegMem {
783
+ fn pretty_print(&self, size: u8, allocs: &mut AllocationConsumer<'_>) -> String {
784
+ match self {
785
+ RegMem::Reg { reg } => pretty_print_reg(*reg, size, allocs),
786
+ RegMem::Mem { addr, .. } => addr.pretty_print(size, allocs),
787
+ }
788
+ }
789
+ }
790
+
791
+ /// Some basic ALU operations.
792
+ #[derive(Copy, Clone, PartialEq)]
793
+ pub enum AluRmiROpcode {
794
+ /// Add operation.
795
+ Add,
796
+ /// Add with carry.
797
+ Adc,
798
+ /// Integer subtraction.
799
+ Sub,
800
+ /// Integer subtraction with borrow.
801
+ Sbb,
802
+ /// Bitwise AND operation.
803
+ And,
804
+ /// Bitwise inclusive OR.
805
+ Or,
806
+ /// Bitwise exclusive OR.
807
+ Xor,
808
+ /// The signless, non-extending (N x N -> N, for N in {32,64}) variant.
809
+ Mul,
810
+ }
811
+
812
+ impl fmt::Debug for AluRmiROpcode {
813
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
814
+ let name = match self {
815
+ AluRmiROpcode::Add => "add",
816
+ AluRmiROpcode::Adc => "adc",
817
+ AluRmiROpcode::Sub => "sub",
818
+ AluRmiROpcode::Sbb => "sbb",
819
+ AluRmiROpcode::And => "and",
820
+ AluRmiROpcode::Or => "or",
821
+ AluRmiROpcode::Xor => "xor",
822
+ AluRmiROpcode::Mul => "imul",
823
+ };
824
+ write!(fmt, "{}", name)
825
+ }
826
+ }
827
+
828
+ impl fmt::Display for AluRmiROpcode {
829
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
830
+ fmt::Debug::fmt(self, f)
831
+ }
832
+ }
833
+
834
+ /// ALU operations that don't accept intermediates.
835
+ #[derive(Copy, Clone, PartialEq)]
836
+ pub enum AluRmROpcode {
837
+ /// And with negated second operand.
838
+ Andn,
839
+ }
840
+
841
+ impl AluRmROpcode {
842
+ pub(crate) fn available_from(&self) -> SmallVec<[InstructionSet; 2]> {
843
+ match self {
844
+ AluRmROpcode::Andn => smallvec![InstructionSet::BMI1],
845
+ }
846
+ }
847
+ }
848
+
849
+ impl fmt::Debug for AluRmROpcode {
850
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
851
+ let name = match self {
852
+ AluRmROpcode::Andn => "andn",
853
+ };
854
+ write!(fmt, "{}", name)
855
+ }
856
+ }
857
+
858
+ impl fmt::Display for AluRmROpcode {
859
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
860
+ fmt::Debug::fmt(self, f)
861
+ }
862
+ }
863
+
864
+ #[derive(Clone, PartialEq)]
865
+ /// Unary operations requiring register or memory and register operands.
866
+ pub enum UnaryRmROpcode {
867
+ /// Bit-scan reverse.
868
+ Bsr,
869
+ /// Bit-scan forward.
870
+ Bsf,
871
+ /// Counts leading zeroes (Leading Zero CouNT).
872
+ Lzcnt,
873
+ /// Counts trailing zeroes (Trailing Zero CouNT).
874
+ Tzcnt,
875
+ /// Counts the number of ones (POPulation CouNT).
876
+ Popcnt,
877
+ }
878
+
879
+ impl UnaryRmROpcode {
880
+ pub(crate) fn available_from(&self) -> SmallVec<[InstructionSet; 2]> {
881
+ match self {
882
+ UnaryRmROpcode::Bsr | UnaryRmROpcode::Bsf => smallvec![],
883
+ UnaryRmROpcode::Lzcnt => smallvec![InstructionSet::Lzcnt],
884
+ UnaryRmROpcode::Tzcnt => smallvec![InstructionSet::BMI1],
885
+ UnaryRmROpcode::Popcnt => smallvec![InstructionSet::Popcnt],
886
+ }
887
+ }
888
+ }
889
+
890
+ impl fmt::Debug for UnaryRmROpcode {
891
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
892
+ match self {
893
+ UnaryRmROpcode::Bsr => write!(fmt, "bsr"),
894
+ UnaryRmROpcode::Bsf => write!(fmt, "bsf"),
895
+ UnaryRmROpcode::Lzcnt => write!(fmt, "lzcnt"),
896
+ UnaryRmROpcode::Tzcnt => write!(fmt, "tzcnt"),
897
+ UnaryRmROpcode::Popcnt => write!(fmt, "popcnt"),
898
+ }
899
+ }
900
+ }
901
+
902
+ impl fmt::Display for UnaryRmROpcode {
903
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
904
+ fmt::Debug::fmt(self, f)
905
+ }
906
+ }
907
+
908
+ pub use crate::isa::x64::lower::isle::generated_code::UnaryRmRVexOpcode;
909
+
910
+ impl UnaryRmRVexOpcode {
911
+ pub(crate) fn available_from(&self) -> SmallVec<[InstructionSet; 2]> {
912
+ match self {
913
+ UnaryRmRVexOpcode::Blsi | UnaryRmRVexOpcode::Blsmsk | UnaryRmRVexOpcode::Blsr => {
914
+ smallvec![InstructionSet::BMI1]
915
+ }
916
+ }
917
+ }
918
+ }
919
+
920
+ impl fmt::Display for UnaryRmRVexOpcode {
921
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
922
+ f.write_str(&format!("{self:?}").to_lowercase())
923
+ }
924
+ }
925
+
926
+ #[derive(Clone, Copy, PartialEq)]
927
+ /// Comparison operations.
928
+ pub enum CmpOpcode {
929
+ /// CMP instruction: compute `a - b` and set flags from result.
930
+ Cmp,
931
+ /// TEST instruction: compute `a & b` and set flags from result.
932
+ Test,
933
+ }
934
+
935
+ #[derive(Debug)]
936
+ pub(crate) enum InstructionSet {
937
+ SSE,
938
+ SSE2,
939
+ SSSE3,
940
+ SSE41,
941
+ SSE42,
942
+ Popcnt,
943
+ Lzcnt,
944
+ BMI1,
945
+ #[allow(dead_code)] // never constructed (yet).
946
+ BMI2,
947
+ FMA,
948
+ AVX,
949
+ AVX2,
950
+ AVX512BITALG,
951
+ AVX512DQ,
952
+ AVX512F,
953
+ AVX512VBMI,
954
+ AVX512VL,
955
+ }
956
+
957
+ /// Some SSE operations requiring 2 operands r/m and r.
958
+ #[derive(Clone, Copy, PartialEq)]
959
+ #[allow(dead_code)] // some variants here aren't used just yet
960
+ #[allow(missing_docs)]
961
+ pub enum SseOpcode {
962
+ Addps,
963
+ Addpd,
964
+ Addss,
965
+ Addsd,
966
+ Andps,
967
+ Andpd,
968
+ Andnps,
969
+ Andnpd,
970
+ Blendvpd,
971
+ Blendvps,
972
+ Comiss,
973
+ Comisd,
974
+ Cmpps,
975
+ Cmppd,
976
+ Cmpss,
977
+ Cmpsd,
978
+ Cvtdq2ps,
979
+ Cvtdq2pd,
980
+ Cvtpd2ps,
981
+ Cvtps2pd,
982
+ Cvtsd2ss,
983
+ Cvtsd2si,
984
+ Cvtsi2ss,
985
+ Cvtsi2sd,
986
+ Cvtss2si,
987
+ Cvtss2sd,
988
+ Cvttpd2dq,
989
+ Cvttps2dq,
990
+ Cvttss2si,
991
+ Cvttsd2si,
992
+ Divps,
993
+ Divpd,
994
+ Divss,
995
+ Divsd,
996
+ Insertps,
997
+ Maxps,
998
+ Maxpd,
999
+ Maxss,
1000
+ Maxsd,
1001
+ Minps,
1002
+ Minpd,
1003
+ Minss,
1004
+ Minsd,
1005
+ Movaps,
1006
+ Movapd,
1007
+ Movd,
1008
+ Movdqa,
1009
+ Movdqu,
1010
+ Movlhps,
1011
+ Movmskps,
1012
+ Movmskpd,
1013
+ Movq,
1014
+ Movss,
1015
+ Movsd,
1016
+ Movups,
1017
+ Movupd,
1018
+ Mulps,
1019
+ Mulpd,
1020
+ Mulss,
1021
+ Mulsd,
1022
+ Orps,
1023
+ Orpd,
1024
+ Pabsb,
1025
+ Pabsw,
1026
+ Pabsd,
1027
+ Packssdw,
1028
+ Packsswb,
1029
+ Packusdw,
1030
+ Packuswb,
1031
+ Paddb,
1032
+ Paddd,
1033
+ Paddq,
1034
+ Paddw,
1035
+ Paddsb,
1036
+ Paddsw,
1037
+ Paddusb,
1038
+ Paddusw,
1039
+ Palignr,
1040
+ Pand,
1041
+ Pandn,
1042
+ Pavgb,
1043
+ Pavgw,
1044
+ Pblendvb,
1045
+ Pcmpeqb,
1046
+ Pcmpeqw,
1047
+ Pcmpeqd,
1048
+ Pcmpeqq,
1049
+ Pcmpgtb,
1050
+ Pcmpgtw,
1051
+ Pcmpgtd,
1052
+ Pcmpgtq,
1053
+ Pextrb,
1054
+ Pextrw,
1055
+ Pextrd,
1056
+ Pextrq,
1057
+ Pinsrb,
1058
+ Pinsrw,
1059
+ Pinsrd,
1060
+ Pmaddubsw,
1061
+ Pmaddwd,
1062
+ Pmaxsb,
1063
+ Pmaxsw,
1064
+ Pmaxsd,
1065
+ Pmaxub,
1066
+ Pmaxuw,
1067
+ Pmaxud,
1068
+ Pminsb,
1069
+ Pminsw,
1070
+ Pminsd,
1071
+ Pminub,
1072
+ Pminuw,
1073
+ Pminud,
1074
+ Pmovmskb,
1075
+ Pmovsxbd,
1076
+ Pmovsxbw,
1077
+ Pmovsxbq,
1078
+ Pmovsxwd,
1079
+ Pmovsxwq,
1080
+ Pmovsxdq,
1081
+ Pmovzxbd,
1082
+ Pmovzxbw,
1083
+ Pmovzxbq,
1084
+ Pmovzxwd,
1085
+ Pmovzxwq,
1086
+ Pmovzxdq,
1087
+ Pmuldq,
1088
+ Pmulhw,
1089
+ Pmulhuw,
1090
+ Pmulhrsw,
1091
+ Pmulld,
1092
+ Pmullw,
1093
+ Pmuludq,
1094
+ Por,
1095
+ Pshufb,
1096
+ Pshufd,
1097
+ Psllw,
1098
+ Pslld,
1099
+ Psllq,
1100
+ Psraw,
1101
+ Psrad,
1102
+ Psrlw,
1103
+ Psrld,
1104
+ Psrlq,
1105
+ Psubb,
1106
+ Psubd,
1107
+ Psubq,
1108
+ Psubw,
1109
+ Psubsb,
1110
+ Psubsw,
1111
+ Psubusb,
1112
+ Psubusw,
1113
+ Ptest,
1114
+ Punpckhbw,
1115
+ Punpckhwd,
1116
+ Punpcklbw,
1117
+ Punpcklwd,
1118
+ Pxor,
1119
+ Rcpss,
1120
+ Roundps,
1121
+ Roundpd,
1122
+ Roundss,
1123
+ Roundsd,
1124
+ Rsqrtss,
1125
+ Shufps,
1126
+ Sqrtps,
1127
+ Sqrtpd,
1128
+ Sqrtss,
1129
+ Sqrtsd,
1130
+ Subps,
1131
+ Subpd,
1132
+ Subss,
1133
+ Subsd,
1134
+ Ucomiss,
1135
+ Ucomisd,
1136
+ Unpcklps,
1137
+ Unpckhps,
1138
+ Xorps,
1139
+ Xorpd,
1140
+ Phaddw,
1141
+ Phaddd,
1142
+ Punpckhdq,
1143
+ Punpckldq,
1144
+ Punpckhqdq,
1145
+ Punpcklqdq,
1146
+ Pshuflw,
1147
+ Pshufhw,
1148
+ Pblendw,
1149
+ Movddup,
1150
+ }
1151
+
1152
+ impl SseOpcode {
1153
+ /// Which `InstructionSet` is the first supporting this opcode?
1154
+ pub(crate) fn available_from(&self) -> InstructionSet {
1155
+ use InstructionSet::*;
1156
+ match self {
1157
+ SseOpcode::Addps
1158
+ | SseOpcode::Addss
1159
+ | SseOpcode::Andps
1160
+ | SseOpcode::Andnps
1161
+ | SseOpcode::Comiss
1162
+ | SseOpcode::Cmpps
1163
+ | SseOpcode::Cmpss
1164
+ | SseOpcode::Cvtsi2ss
1165
+ | SseOpcode::Cvtss2si
1166
+ | SseOpcode::Cvttss2si
1167
+ | SseOpcode::Divps
1168
+ | SseOpcode::Divss
1169
+ | SseOpcode::Maxps
1170
+ | SseOpcode::Maxss
1171
+ | SseOpcode::Minps
1172
+ | SseOpcode::Minss
1173
+ | SseOpcode::Movaps
1174
+ | SseOpcode::Movlhps
1175
+ | SseOpcode::Movmskps
1176
+ | SseOpcode::Movss
1177
+ | SseOpcode::Movups
1178
+ | SseOpcode::Mulps
1179
+ | SseOpcode::Mulss
1180
+ | SseOpcode::Orps
1181
+ | SseOpcode::Rcpss
1182
+ | SseOpcode::Rsqrtss
1183
+ | SseOpcode::Shufps
1184
+ | SseOpcode::Sqrtps
1185
+ | SseOpcode::Sqrtss
1186
+ | SseOpcode::Subps
1187
+ | SseOpcode::Subss
1188
+ | SseOpcode::Ucomiss
1189
+ | SseOpcode::Unpcklps
1190
+ | SseOpcode::Unpckhps
1191
+ | SseOpcode::Xorps => SSE,
1192
+
1193
+ SseOpcode::Addpd
1194
+ | SseOpcode::Addsd
1195
+ | SseOpcode::Andpd
1196
+ | SseOpcode::Andnpd
1197
+ | SseOpcode::Cmppd
1198
+ | SseOpcode::Cmpsd
1199
+ | SseOpcode::Comisd
1200
+ | SseOpcode::Cvtdq2ps
1201
+ | SseOpcode::Cvtdq2pd
1202
+ | SseOpcode::Cvtpd2ps
1203
+ | SseOpcode::Cvtps2pd
1204
+ | SseOpcode::Cvtsd2ss
1205
+ | SseOpcode::Cvtsd2si
1206
+ | SseOpcode::Cvtsi2sd
1207
+ | SseOpcode::Cvtss2sd
1208
+ | SseOpcode::Cvttpd2dq
1209
+ | SseOpcode::Cvttps2dq
1210
+ | SseOpcode::Cvttsd2si
1211
+ | SseOpcode::Divpd
1212
+ | SseOpcode::Divsd
1213
+ | SseOpcode::Maxpd
1214
+ | SseOpcode::Maxsd
1215
+ | SseOpcode::Minpd
1216
+ | SseOpcode::Minsd
1217
+ | SseOpcode::Movapd
1218
+ | SseOpcode::Movd
1219
+ | SseOpcode::Movmskpd
1220
+ | SseOpcode::Movq
1221
+ | SseOpcode::Movsd
1222
+ | SseOpcode::Movupd
1223
+ | SseOpcode::Movdqa
1224
+ | SseOpcode::Movdqu
1225
+ | SseOpcode::Mulpd
1226
+ | SseOpcode::Mulsd
1227
+ | SseOpcode::Orpd
1228
+ | SseOpcode::Packssdw
1229
+ | SseOpcode::Packsswb
1230
+ | SseOpcode::Packuswb
1231
+ | SseOpcode::Paddb
1232
+ | SseOpcode::Paddd
1233
+ | SseOpcode::Paddq
1234
+ | SseOpcode::Paddw
1235
+ | SseOpcode::Paddsb
1236
+ | SseOpcode::Paddsw
1237
+ | SseOpcode::Paddusb
1238
+ | SseOpcode::Paddusw
1239
+ | SseOpcode::Pand
1240
+ | SseOpcode::Pandn
1241
+ | SseOpcode::Pavgb
1242
+ | SseOpcode::Pavgw
1243
+ | SseOpcode::Pcmpeqb
1244
+ | SseOpcode::Pcmpeqw
1245
+ | SseOpcode::Pcmpeqd
1246
+ | SseOpcode::Pcmpgtb
1247
+ | SseOpcode::Pcmpgtw
1248
+ | SseOpcode::Pcmpgtd
1249
+ | SseOpcode::Pextrw
1250
+ | SseOpcode::Pinsrw
1251
+ | SseOpcode::Pmaddubsw
1252
+ | SseOpcode::Pmaddwd
1253
+ | SseOpcode::Pmaxsw
1254
+ | SseOpcode::Pmaxub
1255
+ | SseOpcode::Pminsw
1256
+ | SseOpcode::Pminub
1257
+ | SseOpcode::Pmovmskb
1258
+ | SseOpcode::Pmulhw
1259
+ | SseOpcode::Pmulhuw
1260
+ | SseOpcode::Pmullw
1261
+ | SseOpcode::Pmuludq
1262
+ | SseOpcode::Por
1263
+ | SseOpcode::Pshufd
1264
+ | SseOpcode::Psllw
1265
+ | SseOpcode::Pslld
1266
+ | SseOpcode::Psllq
1267
+ | SseOpcode::Psraw
1268
+ | SseOpcode::Psrad
1269
+ | SseOpcode::Psrlw
1270
+ | SseOpcode::Psrld
1271
+ | SseOpcode::Psrlq
1272
+ | SseOpcode::Psubb
1273
+ | SseOpcode::Psubd
1274
+ | SseOpcode::Psubq
1275
+ | SseOpcode::Psubw
1276
+ | SseOpcode::Psubsb
1277
+ | SseOpcode::Psubsw
1278
+ | SseOpcode::Psubusb
1279
+ | SseOpcode::Psubusw
1280
+ | SseOpcode::Punpckhbw
1281
+ | SseOpcode::Punpckhwd
1282
+ | SseOpcode::Punpcklbw
1283
+ | SseOpcode::Punpcklwd
1284
+ | SseOpcode::Pxor
1285
+ | SseOpcode::Sqrtpd
1286
+ | SseOpcode::Sqrtsd
1287
+ | SseOpcode::Subpd
1288
+ | SseOpcode::Subsd
1289
+ | SseOpcode::Ucomisd
1290
+ | SseOpcode::Xorpd
1291
+ | SseOpcode::Punpckldq
1292
+ | SseOpcode::Punpckhdq
1293
+ | SseOpcode::Punpcklqdq
1294
+ | SseOpcode::Punpckhqdq
1295
+ | SseOpcode::Pshuflw
1296
+ | SseOpcode::Pshufhw => SSE2,
1297
+
1298
+ SseOpcode::Pabsb
1299
+ | SseOpcode::Pabsw
1300
+ | SseOpcode::Pabsd
1301
+ | SseOpcode::Palignr
1302
+ | SseOpcode::Pmulhrsw
1303
+ | SseOpcode::Pshufb
1304
+ | SseOpcode::Phaddw
1305
+ | SseOpcode::Phaddd
1306
+ | SseOpcode::Movddup => SSSE3,
1307
+
1308
+ SseOpcode::Blendvpd
1309
+ | SseOpcode::Blendvps
1310
+ | SseOpcode::Insertps
1311
+ | SseOpcode::Packusdw
1312
+ | SseOpcode::Pblendvb
1313
+ | SseOpcode::Pcmpeqq
1314
+ | SseOpcode::Pextrb
1315
+ | SseOpcode::Pextrd
1316
+ | SseOpcode::Pextrq
1317
+ | SseOpcode::Pinsrb
1318
+ | SseOpcode::Pinsrd
1319
+ | SseOpcode::Pmaxsb
1320
+ | SseOpcode::Pmaxsd
1321
+ | SseOpcode::Pmaxuw
1322
+ | SseOpcode::Pmaxud
1323
+ | SseOpcode::Pminsb
1324
+ | SseOpcode::Pminsd
1325
+ | SseOpcode::Pminuw
1326
+ | SseOpcode::Pminud
1327
+ | SseOpcode::Pmovsxbd
1328
+ | SseOpcode::Pmovsxbw
1329
+ | SseOpcode::Pmovsxbq
1330
+ | SseOpcode::Pmovsxwd
1331
+ | SseOpcode::Pmovsxwq
1332
+ | SseOpcode::Pmovsxdq
1333
+ | SseOpcode::Pmovzxbd
1334
+ | SseOpcode::Pmovzxbw
1335
+ | SseOpcode::Pmovzxbq
1336
+ | SseOpcode::Pmovzxwd
1337
+ | SseOpcode::Pmovzxwq
1338
+ | SseOpcode::Pmovzxdq
1339
+ | SseOpcode::Pmuldq
1340
+ | SseOpcode::Pmulld
1341
+ | SseOpcode::Ptest
1342
+ | SseOpcode::Roundps
1343
+ | SseOpcode::Roundpd
1344
+ | SseOpcode::Roundss
1345
+ | SseOpcode::Roundsd
1346
+ | SseOpcode::Pblendw => SSE41,
1347
+
1348
+ SseOpcode::Pcmpgtq => SSE42,
1349
+ }
1350
+ }
1351
+
1352
+ /// Returns the src operand size for an instruction.
1353
+ pub(crate) fn src_size(&self) -> u8 {
1354
+ match self {
1355
+ SseOpcode::Movd => 4,
1356
+ _ => 8,
1357
+ }
1358
+ }
1359
+ }
1360
+
1361
+ impl fmt::Debug for SseOpcode {
1362
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
1363
+ let name = match self {
1364
+ SseOpcode::Addps => "addps",
1365
+ SseOpcode::Addpd => "addpd",
1366
+ SseOpcode::Addss => "addss",
1367
+ SseOpcode::Addsd => "addsd",
1368
+ SseOpcode::Andpd => "andpd",
1369
+ SseOpcode::Andps => "andps",
1370
+ SseOpcode::Andnps => "andnps",
1371
+ SseOpcode::Andnpd => "andnpd",
1372
+ SseOpcode::Blendvpd => "blendvpd",
1373
+ SseOpcode::Blendvps => "blendvps",
1374
+ SseOpcode::Cmpps => "cmpps",
1375
+ SseOpcode::Cmppd => "cmppd",
1376
+ SseOpcode::Cmpss => "cmpss",
1377
+ SseOpcode::Cmpsd => "cmpsd",
1378
+ SseOpcode::Comiss => "comiss",
1379
+ SseOpcode::Comisd => "comisd",
1380
+ SseOpcode::Cvtdq2ps => "cvtdq2ps",
1381
+ SseOpcode::Cvtdq2pd => "cvtdq2pd",
1382
+ SseOpcode::Cvtpd2ps => "cvtpd2ps",
1383
+ SseOpcode::Cvtps2pd => "cvtps2pd",
1384
+ SseOpcode::Cvtsd2ss => "cvtsd2ss",
1385
+ SseOpcode::Cvtsd2si => "cvtsd2si",
1386
+ SseOpcode::Cvtsi2ss => "cvtsi2ss",
1387
+ SseOpcode::Cvtsi2sd => "cvtsi2sd",
1388
+ SseOpcode::Cvtss2si => "cvtss2si",
1389
+ SseOpcode::Cvtss2sd => "cvtss2sd",
1390
+ SseOpcode::Cvttpd2dq => "cvttpd2dq",
1391
+ SseOpcode::Cvttps2dq => "cvttps2dq",
1392
+ SseOpcode::Cvttss2si => "cvttss2si",
1393
+ SseOpcode::Cvttsd2si => "cvttsd2si",
1394
+ SseOpcode::Divps => "divps",
1395
+ SseOpcode::Divpd => "divpd",
1396
+ SseOpcode::Divss => "divss",
1397
+ SseOpcode::Divsd => "divsd",
1398
+ SseOpcode::Insertps => "insertps",
1399
+ SseOpcode::Maxps => "maxps",
1400
+ SseOpcode::Maxpd => "maxpd",
1401
+ SseOpcode::Maxss => "maxss",
1402
+ SseOpcode::Maxsd => "maxsd",
1403
+ SseOpcode::Minps => "minps",
1404
+ SseOpcode::Minpd => "minpd",
1405
+ SseOpcode::Minss => "minss",
1406
+ SseOpcode::Minsd => "minsd",
1407
+ SseOpcode::Movaps => "movaps",
1408
+ SseOpcode::Movapd => "movapd",
1409
+ SseOpcode::Movd => "movd",
1410
+ SseOpcode::Movdqa => "movdqa",
1411
+ SseOpcode::Movdqu => "movdqu",
1412
+ SseOpcode::Movlhps => "movlhps",
1413
+ SseOpcode::Movmskps => "movmskps",
1414
+ SseOpcode::Movmskpd => "movmskpd",
1415
+ SseOpcode::Movq => "movq",
1416
+ SseOpcode::Movss => "movss",
1417
+ SseOpcode::Movsd => "movsd",
1418
+ SseOpcode::Movups => "movups",
1419
+ SseOpcode::Movupd => "movupd",
1420
+ SseOpcode::Mulps => "mulps",
1421
+ SseOpcode::Mulpd => "mulpd",
1422
+ SseOpcode::Mulss => "mulss",
1423
+ SseOpcode::Mulsd => "mulsd",
1424
+ SseOpcode::Orpd => "orpd",
1425
+ SseOpcode::Orps => "orps",
1426
+ SseOpcode::Pabsb => "pabsb",
1427
+ SseOpcode::Pabsw => "pabsw",
1428
+ SseOpcode::Pabsd => "pabsd",
1429
+ SseOpcode::Packssdw => "packssdw",
1430
+ SseOpcode::Packsswb => "packsswb",
1431
+ SseOpcode::Packusdw => "packusdw",
1432
+ SseOpcode::Packuswb => "packuswb",
1433
+ SseOpcode::Paddb => "paddb",
1434
+ SseOpcode::Paddd => "paddd",
1435
+ SseOpcode::Paddq => "paddq",
1436
+ SseOpcode::Paddw => "paddw",
1437
+ SseOpcode::Paddsb => "paddsb",
1438
+ SseOpcode::Paddsw => "paddsw",
1439
+ SseOpcode::Paddusb => "paddusb",
1440
+ SseOpcode::Paddusw => "paddusw",
1441
+ SseOpcode::Palignr => "palignr",
1442
+ SseOpcode::Pand => "pand",
1443
+ SseOpcode::Pandn => "pandn",
1444
+ SseOpcode::Pavgb => "pavgb",
1445
+ SseOpcode::Pavgw => "pavgw",
1446
+ SseOpcode::Pblendvb => "pblendvb",
1447
+ SseOpcode::Pcmpeqb => "pcmpeqb",
1448
+ SseOpcode::Pcmpeqw => "pcmpeqw",
1449
+ SseOpcode::Pcmpeqd => "pcmpeqd",
1450
+ SseOpcode::Pcmpeqq => "pcmpeqq",
1451
+ SseOpcode::Pcmpgtb => "pcmpgtb",
1452
+ SseOpcode::Pcmpgtw => "pcmpgtw",
1453
+ SseOpcode::Pcmpgtd => "pcmpgtd",
1454
+ SseOpcode::Pcmpgtq => "pcmpgtq",
1455
+ SseOpcode::Pextrb => "pextrb",
1456
+ SseOpcode::Pextrw => "pextrw",
1457
+ SseOpcode::Pextrd => "pextrd",
1458
+ SseOpcode::Pextrq => "pextrq",
1459
+ SseOpcode::Pinsrb => "pinsrb",
1460
+ SseOpcode::Pinsrw => "pinsrw",
1461
+ SseOpcode::Pinsrd => "pinsrd",
1462
+ SseOpcode::Pmaddubsw => "pmaddubsw",
1463
+ SseOpcode::Pmaddwd => "pmaddwd",
1464
+ SseOpcode::Pmaxsb => "pmaxsb",
1465
+ SseOpcode::Pmaxsw => "pmaxsw",
1466
+ SseOpcode::Pmaxsd => "pmaxsd",
1467
+ SseOpcode::Pmaxub => "pmaxub",
1468
+ SseOpcode::Pmaxuw => "pmaxuw",
1469
+ SseOpcode::Pmaxud => "pmaxud",
1470
+ SseOpcode::Pminsb => "pminsb",
1471
+ SseOpcode::Pminsw => "pminsw",
1472
+ SseOpcode::Pminsd => "pminsd",
1473
+ SseOpcode::Pminub => "pminub",
1474
+ SseOpcode::Pminuw => "pminuw",
1475
+ SseOpcode::Pminud => "pminud",
1476
+ SseOpcode::Pmovmskb => "pmovmskb",
1477
+ SseOpcode::Pmovsxbd => "pmovsxbd",
1478
+ SseOpcode::Pmovsxbw => "pmovsxbw",
1479
+ SseOpcode::Pmovsxbq => "pmovsxbq",
1480
+ SseOpcode::Pmovsxwd => "pmovsxwd",
1481
+ SseOpcode::Pmovsxwq => "pmovsxwq",
1482
+ SseOpcode::Pmovsxdq => "pmovsxdq",
1483
+ SseOpcode::Pmovzxbd => "pmovzxbd",
1484
+ SseOpcode::Pmovzxbw => "pmovzxbw",
1485
+ SseOpcode::Pmovzxbq => "pmovzxbq",
1486
+ SseOpcode::Pmovzxwd => "pmovzxwd",
1487
+ SseOpcode::Pmovzxwq => "pmovzxwq",
1488
+ SseOpcode::Pmovzxdq => "pmovzxdq",
1489
+ SseOpcode::Pmuldq => "pmuldq",
1490
+ SseOpcode::Pmulhw => "pmulhw",
1491
+ SseOpcode::Pmulhuw => "pmulhuw",
1492
+ SseOpcode::Pmulhrsw => "pmulhrsw",
1493
+ SseOpcode::Pmulld => "pmulld",
1494
+ SseOpcode::Pmullw => "pmullw",
1495
+ SseOpcode::Pmuludq => "pmuludq",
1496
+ SseOpcode::Por => "por",
1497
+ SseOpcode::Pshufb => "pshufb",
1498
+ SseOpcode::Pshufd => "pshufd",
1499
+ SseOpcode::Psllw => "psllw",
1500
+ SseOpcode::Pslld => "pslld",
1501
+ SseOpcode::Psllq => "psllq",
1502
+ SseOpcode::Psraw => "psraw",
1503
+ SseOpcode::Psrad => "psrad",
1504
+ SseOpcode::Psrlw => "psrlw",
1505
+ SseOpcode::Psrld => "psrld",
1506
+ SseOpcode::Psrlq => "psrlq",
1507
+ SseOpcode::Psubb => "psubb",
1508
+ SseOpcode::Psubd => "psubd",
1509
+ SseOpcode::Psubq => "psubq",
1510
+ SseOpcode::Psubw => "psubw",
1511
+ SseOpcode::Psubsb => "psubsb",
1512
+ SseOpcode::Psubsw => "psubsw",
1513
+ SseOpcode::Psubusb => "psubusb",
1514
+ SseOpcode::Psubusw => "psubusw",
1515
+ SseOpcode::Ptest => "ptest",
1516
+ SseOpcode::Punpckhbw => "punpckhbw",
1517
+ SseOpcode::Punpckhwd => "punpckhwd",
1518
+ SseOpcode::Punpcklbw => "punpcklbw",
1519
+ SseOpcode::Punpcklwd => "punpcklwd",
1520
+ SseOpcode::Pxor => "pxor",
1521
+ SseOpcode::Rcpss => "rcpss",
1522
+ SseOpcode::Roundps => "roundps",
1523
+ SseOpcode::Roundpd => "roundpd",
1524
+ SseOpcode::Roundss => "roundss",
1525
+ SseOpcode::Roundsd => "roundsd",
1526
+ SseOpcode::Rsqrtss => "rsqrtss",
1527
+ SseOpcode::Shufps => "shufps",
1528
+ SseOpcode::Sqrtps => "sqrtps",
1529
+ SseOpcode::Sqrtpd => "sqrtpd",
1530
+ SseOpcode::Sqrtss => "sqrtss",
1531
+ SseOpcode::Sqrtsd => "sqrtsd",
1532
+ SseOpcode::Subps => "subps",
1533
+ SseOpcode::Subpd => "subpd",
1534
+ SseOpcode::Subss => "subss",
1535
+ SseOpcode::Subsd => "subsd",
1536
+ SseOpcode::Ucomiss => "ucomiss",
1537
+ SseOpcode::Ucomisd => "ucomisd",
1538
+ SseOpcode::Unpcklps => "unpcklps",
1539
+ SseOpcode::Unpckhps => "unpckhps",
1540
+ SseOpcode::Xorps => "xorps",
1541
+ SseOpcode::Xorpd => "xorpd",
1542
+ SseOpcode::Phaddw => "phaddw",
1543
+ SseOpcode::Phaddd => "phaddd",
1544
+ SseOpcode::Punpckldq => "punpckldq",
1545
+ SseOpcode::Punpckhdq => "punpckhdq",
1546
+ SseOpcode::Punpcklqdq => "punpcklqdq",
1547
+ SseOpcode::Punpckhqdq => "punpckhqdq",
1548
+ SseOpcode::Pshuflw => "pshuflw",
1549
+ SseOpcode::Pshufhw => "pshufhw",
1550
+ SseOpcode::Pblendw => "pblendw",
1551
+ SseOpcode::Movddup => "movddup",
1552
+ };
1553
+ write!(fmt, "{}", name)
1554
+ }
1555
+ }
1556
+
1557
+ impl fmt::Display for SseOpcode {
1558
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
1559
+ fmt::Debug::fmt(self, f)
1560
+ }
1561
+ }
1562
+
1563
+ pub use crate::isa::x64::lower::isle::generated_code::AvxOpcode;
1564
+
1565
+ impl AvxOpcode {
1566
+ /// Which `InstructionSet`s support the opcode?
1567
+ pub(crate) fn available_from(&self) -> SmallVec<[InstructionSet; 2]> {
1568
+ match self {
1569
+ AvxOpcode::Vfmadd213ss
1570
+ | AvxOpcode::Vfmadd213sd
1571
+ | AvxOpcode::Vfmadd213ps
1572
+ | AvxOpcode::Vfmadd213pd
1573
+ | AvxOpcode::Vfmadd132ss
1574
+ | AvxOpcode::Vfmadd132sd
1575
+ | AvxOpcode::Vfmadd132ps
1576
+ | AvxOpcode::Vfmadd132pd
1577
+ | AvxOpcode::Vfnmadd213ss
1578
+ | AvxOpcode::Vfnmadd213sd
1579
+ | AvxOpcode::Vfnmadd213ps
1580
+ | AvxOpcode::Vfnmadd213pd
1581
+ | AvxOpcode::Vfnmadd132ss
1582
+ | AvxOpcode::Vfnmadd132sd
1583
+ | AvxOpcode::Vfnmadd132ps
1584
+ | AvxOpcode::Vfnmadd132pd => smallvec![InstructionSet::FMA],
1585
+ AvxOpcode::Vminps
1586
+ | AvxOpcode::Vminpd
1587
+ | AvxOpcode::Vmaxps
1588
+ | AvxOpcode::Vmaxpd
1589
+ | AvxOpcode::Vandnps
1590
+ | AvxOpcode::Vandnpd
1591
+ | AvxOpcode::Vpandn
1592
+ | AvxOpcode::Vcmpps
1593
+ | AvxOpcode::Vcmppd
1594
+ | AvxOpcode::Vpsrlw
1595
+ | AvxOpcode::Vpsrld
1596
+ | AvxOpcode::Vpsrlq
1597
+ | AvxOpcode::Vpaddb
1598
+ | AvxOpcode::Vpaddw
1599
+ | AvxOpcode::Vpaddd
1600
+ | AvxOpcode::Vpaddq
1601
+ | AvxOpcode::Vpaddsb
1602
+ | AvxOpcode::Vpaddsw
1603
+ | AvxOpcode::Vpaddusb
1604
+ | AvxOpcode::Vpaddusw
1605
+ | AvxOpcode::Vpsubb
1606
+ | AvxOpcode::Vpsubw
1607
+ | AvxOpcode::Vpsubd
1608
+ | AvxOpcode::Vpsubq
1609
+ | AvxOpcode::Vpsubsb
1610
+ | AvxOpcode::Vpsubsw
1611
+ | AvxOpcode::Vpsubusb
1612
+ | AvxOpcode::Vpsubusw
1613
+ | AvxOpcode::Vpavgb
1614
+ | AvxOpcode::Vpavgw
1615
+ | AvxOpcode::Vpand
1616
+ | AvxOpcode::Vandps
1617
+ | AvxOpcode::Vandpd
1618
+ | AvxOpcode::Vpor
1619
+ | AvxOpcode::Vorps
1620
+ | AvxOpcode::Vorpd
1621
+ | AvxOpcode::Vpxor
1622
+ | AvxOpcode::Vxorps
1623
+ | AvxOpcode::Vxorpd
1624
+ | AvxOpcode::Vpmullw
1625
+ | AvxOpcode::Vpmulld
1626
+ | AvxOpcode::Vpmulhw
1627
+ | AvxOpcode::Vpmulhd
1628
+ | AvxOpcode::Vpmulhrsw
1629
+ | AvxOpcode::Vpmulhuw
1630
+ | AvxOpcode::Vpmuldq
1631
+ | AvxOpcode::Vpmuludq
1632
+ | AvxOpcode::Vpunpckhwd
1633
+ | AvxOpcode::Vpunpcklwd
1634
+ | AvxOpcode::Vunpcklps
1635
+ | AvxOpcode::Vunpckhps
1636
+ | AvxOpcode::Vaddps
1637
+ | AvxOpcode::Vaddpd
1638
+ | AvxOpcode::Vsubps
1639
+ | AvxOpcode::Vsubpd
1640
+ | AvxOpcode::Vmulps
1641
+ | AvxOpcode::Vmulpd
1642
+ | AvxOpcode::Vdivps
1643
+ | AvxOpcode::Vdivpd
1644
+ | AvxOpcode::Vpcmpeqb
1645
+ | AvxOpcode::Vpcmpeqw
1646
+ | AvxOpcode::Vpcmpeqd
1647
+ | AvxOpcode::Vpcmpeqq
1648
+ | AvxOpcode::Vpcmpgtb
1649
+ | AvxOpcode::Vpcmpgtw
1650
+ | AvxOpcode::Vpcmpgtd
1651
+ | AvxOpcode::Vpcmpgtq
1652
+ | AvxOpcode::Vblendvps
1653
+ | AvxOpcode::Vblendvpd
1654
+ | AvxOpcode::Vpblendvb
1655
+ | AvxOpcode::Vmovlhps
1656
+ | AvxOpcode::Vpminsb
1657
+ | AvxOpcode::Vpminsw
1658
+ | AvxOpcode::Vpminsd
1659
+ | AvxOpcode::Vpminub
1660
+ | AvxOpcode::Vpminuw
1661
+ | AvxOpcode::Vpminud
1662
+ | AvxOpcode::Vpmaxsb
1663
+ | AvxOpcode::Vpmaxsw
1664
+ | AvxOpcode::Vpmaxsd
1665
+ | AvxOpcode::Vpmaxub
1666
+ | AvxOpcode::Vpmaxuw
1667
+ | AvxOpcode::Vpmaxud
1668
+ | AvxOpcode::Vpunpcklbw
1669
+ | AvxOpcode::Vpunpckhbw
1670
+ | AvxOpcode::Vpacksswb
1671
+ | AvxOpcode::Vpackssdw
1672
+ | AvxOpcode::Vpackuswb
1673
+ | AvxOpcode::Vpackusdw
1674
+ | AvxOpcode::Vpalignr
1675
+ | AvxOpcode::Vpinsrb
1676
+ | AvxOpcode::Vpinsrw
1677
+ | AvxOpcode::Vpinsrd
1678
+ | AvxOpcode::Vpinsrq
1679
+ | AvxOpcode::Vpmaddwd
1680
+ | AvxOpcode::Vpmaddubsw
1681
+ | AvxOpcode::Vinsertps
1682
+ | AvxOpcode::Vpshufb
1683
+ | AvxOpcode::Vshufps
1684
+ | AvxOpcode::Vpsllw
1685
+ | AvxOpcode::Vpslld
1686
+ | AvxOpcode::Vpsllq
1687
+ | AvxOpcode::Vpsraw
1688
+ | AvxOpcode::Vpsrad
1689
+ | AvxOpcode::Vpmovsxbw
1690
+ | AvxOpcode::Vpmovzxbw
1691
+ | AvxOpcode::Vpmovsxwd
1692
+ | AvxOpcode::Vpmovzxwd
1693
+ | AvxOpcode::Vpmovsxdq
1694
+ | AvxOpcode::Vpmovzxdq
1695
+ | AvxOpcode::Vaddss
1696
+ | AvxOpcode::Vaddsd
1697
+ | AvxOpcode::Vmulss
1698
+ | AvxOpcode::Vmulsd
1699
+ | AvxOpcode::Vsubss
1700
+ | AvxOpcode::Vsubsd
1701
+ | AvxOpcode::Vdivss
1702
+ | AvxOpcode::Vdivsd
1703
+ | AvxOpcode::Vpabsb
1704
+ | AvxOpcode::Vpabsw
1705
+ | AvxOpcode::Vpabsd
1706
+ | AvxOpcode::Vminss
1707
+ | AvxOpcode::Vminsd
1708
+ | AvxOpcode::Vmaxss
1709
+ | AvxOpcode::Vmaxsd
1710
+ | AvxOpcode::Vsqrtps
1711
+ | AvxOpcode::Vsqrtpd
1712
+ | AvxOpcode::Vroundpd
1713
+ | AvxOpcode::Vroundps
1714
+ | AvxOpcode::Vcvtdq2pd
1715
+ | AvxOpcode::Vcvtdq2ps
1716
+ | AvxOpcode::Vcvtpd2ps
1717
+ | AvxOpcode::Vcvtps2pd
1718
+ | AvxOpcode::Vcvttpd2dq
1719
+ | AvxOpcode::Vcvttps2dq
1720
+ | AvxOpcode::Vphaddw
1721
+ | AvxOpcode::Vphaddd
1722
+ | AvxOpcode::Vpunpckldq
1723
+ | AvxOpcode::Vpunpckhdq
1724
+ | AvxOpcode::Vpunpcklqdq
1725
+ | AvxOpcode::Vpunpckhqdq
1726
+ | AvxOpcode::Vpshuflw
1727
+ | AvxOpcode::Vpshufhw
1728
+ | AvxOpcode::Vpshufd
1729
+ | AvxOpcode::Vmovss
1730
+ | AvxOpcode::Vmovsd
1731
+ | AvxOpcode::Vmovups
1732
+ | AvxOpcode::Vmovupd
1733
+ | AvxOpcode::Vmovdqu
1734
+ | AvxOpcode::Vpextrb
1735
+ | AvxOpcode::Vpextrw
1736
+ | AvxOpcode::Vpextrd
1737
+ | AvxOpcode::Vpextrq
1738
+ | AvxOpcode::Vpblendw
1739
+ | AvxOpcode::Vmovddup
1740
+ | AvxOpcode::Vbroadcastss
1741
+ | AvxOpcode::Vmovd
1742
+ | AvxOpcode::Vmovq
1743
+ | AvxOpcode::Vmovmskps
1744
+ | AvxOpcode::Vmovmskpd
1745
+ | AvxOpcode::Vpmovmskb
1746
+ | AvxOpcode::Vcvtsi2ss
1747
+ | AvxOpcode::Vcvtsi2sd
1748
+ | AvxOpcode::Vcvtss2sd
1749
+ | AvxOpcode::Vcvtsd2ss
1750
+ | AvxOpcode::Vsqrtss
1751
+ | AvxOpcode::Vsqrtsd
1752
+ | AvxOpcode::Vroundss
1753
+ | AvxOpcode::Vroundsd => {
1754
+ smallvec![InstructionSet::AVX]
1755
+ }
1756
+
1757
+ AvxOpcode::Vpbroadcastb | AvxOpcode::Vpbroadcastw | AvxOpcode::Vpbroadcastd => {
1758
+ smallvec![InstructionSet::AVX2]
1759
+ }
1760
+ }
1761
+ }
1762
+ }
1763
+
1764
+ impl fmt::Display for AvxOpcode {
1765
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
1766
+ format!("{self:?}").to_lowercase().fmt(f)
1767
+ }
1768
+ }
1769
+
1770
+ #[derive(Copy, Clone, PartialEq)]
1771
+ #[allow(missing_docs)]
1772
+ pub enum Avx512TupleType {
1773
+ Full,
1774
+ FullMem,
1775
+ Mem128,
1776
+ }
1777
+
1778
+ pub use crate::isa::x64::lower::isle::generated_code::Avx512Opcode;
1779
+
1780
+ impl Avx512Opcode {
1781
+ /// Which `InstructionSet`s support the opcode?
1782
+ pub(crate) fn available_from(&self) -> SmallVec<[InstructionSet; 2]> {
1783
+ match self {
1784
+ Avx512Opcode::Vcvtudq2ps
1785
+ | Avx512Opcode::Vpabsq
1786
+ | Avx512Opcode::Vpsraq
1787
+ | Avx512Opcode::VpsraqImm => {
1788
+ smallvec![InstructionSet::AVX512F, InstructionSet::AVX512VL]
1789
+ }
1790
+ Avx512Opcode::Vpermi2b => {
1791
+ smallvec![InstructionSet::AVX512VL, InstructionSet::AVX512VBMI]
1792
+ }
1793
+ Avx512Opcode::Vpmullq => smallvec![InstructionSet::AVX512VL, InstructionSet::AVX512DQ],
1794
+ Avx512Opcode::Vpopcntb => {
1795
+ smallvec![InstructionSet::AVX512VL, InstructionSet::AVX512BITALG]
1796
+ }
1797
+ }
1798
+ }
1799
+
1800
+ /// What is the "TupleType" of this opcode, which affects the scaling factor
1801
+ /// for 8-bit displacements when this instruction uses memory operands.
1802
+ ///
1803
+ /// This can be found in the encoding table for each instruction and is
1804
+ /// interpreted according to Table 2-34 and 2-35 in the Intel instruction
1805
+ /// manual.
1806
+ pub fn tuple_type(&self) -> Avx512TupleType {
1807
+ use Avx512Opcode::*;
1808
+ use Avx512TupleType::*;
1809
+
1810
+ match self {
1811
+ Vcvtudq2ps | Vpabsq | Vpmullq | VpsraqImm => Full,
1812
+ Vpermi2b | Vpopcntb => FullMem,
1813
+ Vpsraq => Mem128,
1814
+ }
1815
+ }
1816
+ }
1817
+
1818
+ impl fmt::Display for Avx512Opcode {
1819
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
1820
+ let s = format!("{self:?}");
1821
+ f.write_str(&s.to_lowercase())
1822
+ }
1823
+ }
1824
+
1825
+ /// This defines the ways a value can be extended: either signed- or zero-extension, or none for
1826
+ /// types that are not extended. Contrast with [ExtMode], which defines the widths from and to which
1827
+ /// values can be extended.
1828
+ #[allow(dead_code)]
1829
+ #[derive(Clone, PartialEq)]
1830
+ pub enum ExtKind {
1831
+ /// No extension.
1832
+ None,
1833
+ /// Sign-extend.
1834
+ SignExtend,
1835
+ /// Zero-extend.
1836
+ ZeroExtend,
1837
+ }
1838
+
1839
+ /// These indicate ways of extending (widening) a value, using the Intel
1840
+ /// naming: B(yte) = u8, W(ord) = u16, L(ong)word = u32, Q(uad)word = u64
1841
+ #[derive(Clone, PartialEq)]
1842
+ pub enum ExtMode {
1843
+ /// Byte -> Longword.
1844
+ BL,
1845
+ /// Byte -> Quadword.
1846
+ BQ,
1847
+ /// Word -> Longword.
1848
+ WL,
1849
+ /// Word -> Quadword.
1850
+ WQ,
1851
+ /// Longword -> Quadword.
1852
+ LQ,
1853
+ }
1854
+
1855
+ impl ExtMode {
1856
+ /// Calculate the `ExtMode` from passed bit lengths of the from/to types.
1857
+ pub(crate) fn new(from_bits: u16, to_bits: u16) -> Option<ExtMode> {
1858
+ match (from_bits, to_bits) {
1859
+ (1, 8) | (1, 16) | (1, 32) | (8, 16) | (8, 32) => Some(ExtMode::BL),
1860
+ (1, 64) | (8, 64) => Some(ExtMode::BQ),
1861
+ (16, 32) => Some(ExtMode::WL),
1862
+ (16, 64) => Some(ExtMode::WQ),
1863
+ (32, 64) => Some(ExtMode::LQ),
1864
+ _ => None,
1865
+ }
1866
+ }
1867
+
1868
+ /// Return the source register size in bytes.
1869
+ pub(crate) fn src_size(&self) -> u8 {
1870
+ match self {
1871
+ ExtMode::BL | ExtMode::BQ => 1,
1872
+ ExtMode::WL | ExtMode::WQ => 2,
1873
+ ExtMode::LQ => 4,
1874
+ }
1875
+ }
1876
+
1877
+ /// Return the destination register size in bytes.
1878
+ pub(crate) fn dst_size(&self) -> u8 {
1879
+ match self {
1880
+ ExtMode::BL | ExtMode::WL => 4,
1881
+ ExtMode::BQ | ExtMode::WQ | ExtMode::LQ => 8,
1882
+ }
1883
+ }
1884
+ }
1885
+
1886
+ impl fmt::Debug for ExtMode {
1887
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
1888
+ let name = match self {
1889
+ ExtMode::BL => "bl",
1890
+ ExtMode::BQ => "bq",
1891
+ ExtMode::WL => "wl",
1892
+ ExtMode::WQ => "wq",
1893
+ ExtMode::LQ => "lq",
1894
+ };
1895
+ write!(fmt, "{}", name)
1896
+ }
1897
+ }
1898
+
1899
+ impl fmt::Display for ExtMode {
1900
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
1901
+ fmt::Debug::fmt(self, f)
1902
+ }
1903
+ }
1904
+
1905
+ /// These indicate the form of a scalar shift/rotate: left, signed right, unsigned right.
1906
+ #[derive(Clone, Copy)]
1907
+ pub enum ShiftKind {
1908
+ /// Left shift.
1909
+ ShiftLeft,
1910
+ /// Inserts zeros in the most significant bits.
1911
+ ShiftRightLogical,
1912
+ /// Replicates the sign bit in the most significant bits.
1913
+ ShiftRightArithmetic,
1914
+ /// Left rotation.
1915
+ RotateLeft,
1916
+ /// Right rotation.
1917
+ RotateRight,
1918
+ }
1919
+
1920
+ impl fmt::Debug for ShiftKind {
1921
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
1922
+ let name = match self {
1923
+ ShiftKind::ShiftLeft => "shl",
1924
+ ShiftKind::ShiftRightLogical => "shr",
1925
+ ShiftKind::ShiftRightArithmetic => "sar",
1926
+ ShiftKind::RotateLeft => "rol",
1927
+ ShiftKind::RotateRight => "ror",
1928
+ };
1929
+ write!(fmt, "{}", name)
1930
+ }
1931
+ }
1932
+
1933
+ impl fmt::Display for ShiftKind {
1934
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
1935
+ fmt::Debug::fmt(self, f)
1936
+ }
1937
+ }
1938
+
1939
+ /// These indicate condition code tests. Not all are represented since not all are useful in
1940
+ /// compiler-generated code.
1941
+ #[derive(Copy, Clone)]
1942
+ #[repr(u8)]
1943
+ pub enum CC {
1944
+ /// overflow
1945
+ O = 0,
1946
+ /// no overflow
1947
+ NO = 1,
1948
+
1949
+ /// < unsigned
1950
+ B = 2,
1951
+ /// >= unsigned
1952
+ NB = 3,
1953
+
1954
+ /// zero
1955
+ Z = 4,
1956
+ /// not-zero
1957
+ NZ = 5,
1958
+
1959
+ /// <= unsigned
1960
+ BE = 6,
1961
+ /// > unsigned
1962
+ NBE = 7,
1963
+
1964
+ /// negative
1965
+ S = 8,
1966
+ /// not-negative
1967
+ NS = 9,
1968
+
1969
+ /// < signed
1970
+ L = 12,
1971
+ /// >= signed
1972
+ NL = 13,
1973
+
1974
+ /// <= signed
1975
+ LE = 14,
1976
+ /// > signed
1977
+ NLE = 15,
1978
+
1979
+ /// parity
1980
+ P = 10,
1981
+
1982
+ /// not parity
1983
+ NP = 11,
1984
+ }
1985
+
1986
+ impl CC {
1987
+ pub(crate) fn from_intcc(intcc: IntCC) -> Self {
1988
+ match intcc {
1989
+ IntCC::Equal => CC::Z,
1990
+ IntCC::NotEqual => CC::NZ,
1991
+ IntCC::SignedGreaterThanOrEqual => CC::NL,
1992
+ IntCC::SignedGreaterThan => CC::NLE,
1993
+ IntCC::SignedLessThanOrEqual => CC::LE,
1994
+ IntCC::SignedLessThan => CC::L,
1995
+ IntCC::UnsignedGreaterThanOrEqual => CC::NB,
1996
+ IntCC::UnsignedGreaterThan => CC::NBE,
1997
+ IntCC::UnsignedLessThanOrEqual => CC::BE,
1998
+ IntCC::UnsignedLessThan => CC::B,
1999
+ }
2000
+ }
2001
+
2002
+ pub(crate) fn invert(&self) -> Self {
2003
+ match self {
2004
+ CC::O => CC::NO,
2005
+ CC::NO => CC::O,
2006
+
2007
+ CC::B => CC::NB,
2008
+ CC::NB => CC::B,
2009
+
2010
+ CC::Z => CC::NZ,
2011
+ CC::NZ => CC::Z,
2012
+
2013
+ CC::BE => CC::NBE,
2014
+ CC::NBE => CC::BE,
2015
+
2016
+ CC::S => CC::NS,
2017
+ CC::NS => CC::S,
2018
+
2019
+ CC::L => CC::NL,
2020
+ CC::NL => CC::L,
2021
+
2022
+ CC::LE => CC::NLE,
2023
+ CC::NLE => CC::LE,
2024
+
2025
+ CC::P => CC::NP,
2026
+ CC::NP => CC::P,
2027
+ }
2028
+ }
2029
+
2030
+ pub(crate) fn get_enc(self) -> u8 {
2031
+ self as u8
2032
+ }
2033
+ }
2034
+
2035
+ impl fmt::Debug for CC {
2036
+ fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
2037
+ let name = match self {
2038
+ CC::O => "o",
2039
+ CC::NO => "no",
2040
+ CC::B => "b",
2041
+ CC::NB => "nb",
2042
+ CC::Z => "z",
2043
+ CC::NZ => "nz",
2044
+ CC::BE => "be",
2045
+ CC::NBE => "nbe",
2046
+ CC::S => "s",
2047
+ CC::NS => "ns",
2048
+ CC::L => "l",
2049
+ CC::NL => "nl",
2050
+ CC::LE => "le",
2051
+ CC::NLE => "nle",
2052
+ CC::P => "p",
2053
+ CC::NP => "np",
2054
+ };
2055
+ write!(fmt, "{}", name)
2056
+ }
2057
+ }
2058
+
2059
+ impl fmt::Display for CC {
2060
+ fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
2061
+ fmt::Debug::fmt(self, f)
2062
+ }
2063
+ }
2064
+
2065
+ /// Encode the ways that floats can be compared. This is used in float comparisons such as `cmpps`,
2066
+ /// e.g.; it is distinguished from other float comparisons (e.g. `ucomiss`) in that those use EFLAGS
2067
+ /// whereas [FcmpImm] is used as an immediate.
2068
+ #[derive(Clone, Copy)]
2069
+ pub enum FcmpImm {
2070
+ /// Equal comparison.
2071
+ Equal = 0x00,
2072
+ /// Less than comparison.
2073
+ LessThan = 0x01,
2074
+ /// Less than or equal comparison.
2075
+ LessThanOrEqual = 0x02,
2076
+ /// Unordered.
2077
+ Unordered = 0x03,
2078
+ /// Not equal comparison.
2079
+ NotEqual = 0x04,
2080
+ /// Unordered of greater than or equal comparison.
2081
+ UnorderedOrGreaterThanOrEqual = 0x05,
2082
+ /// Unordered or greater than comparison.
2083
+ UnorderedOrGreaterThan = 0x06,
2084
+ /// Ordered.
2085
+ Ordered = 0x07,
2086
+ }
2087
+
2088
+ impl FcmpImm {
2089
+ pub(crate) fn encode(self) -> u8 {
2090
+ self as u8
2091
+ }
2092
+ }
2093
+
2094
+ impl From<FloatCC> for FcmpImm {
2095
+ fn from(cond: FloatCC) -> Self {
2096
+ match cond {
2097
+ FloatCC::Equal => FcmpImm::Equal,
2098
+ FloatCC::LessThan => FcmpImm::LessThan,
2099
+ FloatCC::LessThanOrEqual => FcmpImm::LessThanOrEqual,
2100
+ FloatCC::Unordered => FcmpImm::Unordered,
2101
+ FloatCC::NotEqual => FcmpImm::NotEqual,
2102
+ FloatCC::UnorderedOrGreaterThanOrEqual => FcmpImm::UnorderedOrGreaterThanOrEqual,
2103
+ FloatCC::UnorderedOrGreaterThan => FcmpImm::UnorderedOrGreaterThan,
2104
+ FloatCC::Ordered => FcmpImm::Ordered,
2105
+ _ => panic!("unable to create comparison predicate for {}", cond),
2106
+ }
2107
+ }
2108
+ }
2109
+
2110
+ /// Encode the rounding modes used as part of the Rounding Control field.
2111
+ /// Note, these rounding immediates only consider the rounding control field
2112
+ /// (i.e. the rounding mode) which only take up the first two bits when encoded.
2113
+ /// However the rounding immediate which this field helps make up, also includes
2114
+ /// bits 3 and 4 which define the rounding select and precision mask respectively.
2115
+ /// These two bits are not defined here and are implictly set to zero when encoded.
2116
+ #[derive(Clone, Copy)]
2117
+ pub enum RoundImm {
2118
+ /// Round to nearest mode.
2119
+ RoundNearest = 0x00,
2120
+ /// Round down mode.
2121
+ RoundDown = 0x01,
2122
+ /// Round up mode.
2123
+ RoundUp = 0x02,
2124
+ /// Round to zero mode.
2125
+ RoundZero = 0x03,
2126
+ }
2127
+
2128
+ impl RoundImm {
2129
+ pub(crate) fn encode(self) -> u8 {
2130
+ self as u8
2131
+ }
2132
+ }
2133
+
2134
+ /// An operand's size in bits.
2135
+ #[derive(Clone, Copy, PartialEq)]
2136
+ pub enum OperandSize {
2137
+ /// 8-bit.
2138
+ Size8,
2139
+ /// 16-bit.
2140
+ Size16,
2141
+ /// 32-bit.
2142
+ Size32,
2143
+ /// 64-bit.
2144
+ Size64,
2145
+ }
2146
+
2147
+ impl OperandSize {
2148
+ pub(crate) fn from_bytes(num_bytes: u32) -> Self {
2149
+ match num_bytes {
2150
+ 1 => OperandSize::Size8,
2151
+ 2 => OperandSize::Size16,
2152
+ 4 => OperandSize::Size32,
2153
+ 8 => OperandSize::Size64,
2154
+ _ => unreachable!("Invalid OperandSize: {}", num_bytes),
2155
+ }
2156
+ }
2157
+
2158
+ // Computes the OperandSize for a given type.
2159
+ // For vectors, the OperandSize of the lanes is returned.
2160
+ pub(crate) fn from_ty(ty: Type) -> Self {
2161
+ Self::from_bytes(ty.lane_type().bytes())
2162
+ }
2163
+
2164
+ // Check that the value of self is one of the allowed sizes.
2165
+ pub(crate) fn is_one_of(&self, sizes: &[Self]) -> bool {
2166
+ sizes.iter().any(|val| *self == *val)
2167
+ }
2168
+
2169
+ pub(crate) fn to_bytes(&self) -> u8 {
2170
+ match self {
2171
+ Self::Size8 => 1,
2172
+ Self::Size16 => 2,
2173
+ Self::Size32 => 4,
2174
+ Self::Size64 => 8,
2175
+ }
2176
+ }
2177
+
2178
+ pub(crate) fn to_bits(&self) -> u8 {
2179
+ self.to_bytes() * 8
2180
+ }
2181
+ }
2182
+
2183
+ /// An x64 memory fence kind.
2184
+ #[derive(Clone)]
2185
+ #[allow(dead_code)]
2186
+ pub enum FenceKind {
2187
+ /// `mfence` instruction ("Memory Fence")
2188
+ MFence,
2189
+ /// `lfence` instruction ("Load Fence")
2190
+ LFence,
2191
+ /// `sfence` instruction ("Store Fence")
2192
+ SFence,
2193
+ }