wasmtime 9.0.4 → 10.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +184 -101
- data/ext/Cargo.toml +6 -6
- data/ext/build.rs +2 -2
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/Cargo.toml +31 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/Cargo.toml +158 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/benches/x64-evex-encoding.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/ir/trapcode.rs +144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/abi.rs +1294 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit.rs +3684 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit_tests.rs +7895 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/imms.rs +1210 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/mod.rs +2966 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst.isle +4037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower/isle.rs +816 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower.isle +2906 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/mod.rs +238 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/mod.rs +424 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/abi.rs +825 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/args.rs +1812 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit.rs +3008 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit_tests.rs +2338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/encode.rs +262 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/imms.rs +250 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/mod.rs +1963 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/regs.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/vector.rs +669 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst.isle +2915 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst_vector.isle +760 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower/isle.rs +553 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower.isle +1409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/mod.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/abi.rs +957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit.rs +3707 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit_tests.rs +13409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/mod.rs +3426 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst.isle +5046 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/lower.isle +3991 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/mod.rs +213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/abi.rs +985 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/evex.rs +749 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/rex.rs +588 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/vex.rs +492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/args.rs +2193 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit.rs +4090 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit_tests.rs +5674 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/mod.rs +2667 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst.isle +5104 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower/isle.rs +1148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.isle +4481 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.rs +328 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/mod.rs +251 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isle_prelude.rs +862 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/abi.rs +2455 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/buffer.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/compile.rs +92 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/isle.rs +827 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/lower.rs +1388 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/mod.rs +549 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/reg.rs +537 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/vcode.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude.isle +578 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude_lower.isle +1012 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/settings.rs +600 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/verifier/mod.rs +1884 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/Cargo.toml +23 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/isa/x86.rs +444 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/chaos.rs +125 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/lib.rs +45 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/zero_sized.rs +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/src/list.rs +955 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/Cargo.toml +37 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/Cargo.toml +38 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/src/lib.rs +215 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/Cargo.toml +85 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/code_translator.rs +3538 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/dummy.rs +924 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/spec.rs +834 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/func_translator.rs +440 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/sections_translator.rs +417 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/translation_utils.rs +99 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/CONTRIBUTING.md +48 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/COPYRIGHT +17 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Cargo.toml +84 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Ideas.md +106 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-WHATWG +26 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/README.md +827 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/ci/miri.sh +14 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Big5.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-JP.txt +12 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-KR.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/GBK.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/IBM866.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-2022-JP.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-10.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-13.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-14.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-15.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-16.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-2.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-3.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-4.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-5.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-6.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-7.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8-I.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-R.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-U.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Shift_JIS.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16BE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16LE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-8.txt +5 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/gb18030.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/macintosh.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/replacement.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1250.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1251.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1252.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1253.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1254.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1255.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1256.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1257.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1258.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-874.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-mac-cyrillic.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-user-defined.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/generate-encoding-data.py +2008 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/rustfmt.toml +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/ascii.rs +1546 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/big5.rs +427 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/data.rs +114378 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_jp.rs +469 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_kr.rs +442 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/gb18030.rs +767 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/handles.rs +1969 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/iso_2022_jp.rs +1068 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/lib.rs +6133 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/macros.rs +1622 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/mem.rs +3354 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/replacement.rs +104 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/shift_jis.rs +426 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/simd_funcs.rs +453 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/single_byte.rs +714 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in_ref.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out_ref.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in_ref.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out.txt +17053 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in.txt +23945 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out.txt +23944 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out.txt +7404 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in.txt +11285 -0
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* `js/src/jit/BacktrackingAllocator.cpp` in Mozilla Firefox, and was
|
5
|
+
* originally licensed under the Mozilla Public License 2.0. We
|
6
|
+
* subsequently relicensed it to Apache-2.0 WITH LLVM-exception (see
|
7
|
+
* https://github.com/bytecodealliance/regalloc2/issues/7).
|
8
|
+
*
|
9
|
+
* Since the initial port, the design has been substantially evolved
|
10
|
+
* and optimized.
|
11
|
+
*/
|
12
|
+
|
13
|
+
//! Data structures for backtracking allocator.
|
14
|
+
|
15
|
+
use super::liveranges::SpillWeight;
|
16
|
+
use crate::cfg::CFGInfo;
|
17
|
+
use crate::index::ContainerComparator;
|
18
|
+
use crate::indexset::IndexSet;
|
19
|
+
use crate::{
|
20
|
+
define_index, Allocation, Block, Edit, Function, FxHashSet, Inst, MachineEnv, Operand, PReg,
|
21
|
+
ProgPoint, RegClass, VReg,
|
22
|
+
};
|
23
|
+
use alloc::collections::BTreeMap;
|
24
|
+
use alloc::string::String;
|
25
|
+
use alloc::vec::Vec;
|
26
|
+
use core::cmp::Ordering;
|
27
|
+
use core::fmt::Debug;
|
28
|
+
use hashbrown::{HashMap, HashSet};
|
29
|
+
use smallvec::{smallvec, SmallVec};
|
30
|
+
|
31
|
+
/// A range from `from` (inclusive) to `to` (exclusive).
|
32
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
|
33
|
+
pub struct CodeRange {
|
34
|
+
pub from: ProgPoint,
|
35
|
+
pub to: ProgPoint,
|
36
|
+
}
|
37
|
+
|
38
|
+
impl CodeRange {
|
39
|
+
#[inline(always)]
|
40
|
+
pub fn is_empty(&self) -> bool {
|
41
|
+
self.from >= self.to
|
42
|
+
}
|
43
|
+
#[inline(always)]
|
44
|
+
pub fn contains(&self, other: &Self) -> bool {
|
45
|
+
other.from >= self.from && other.to <= self.to
|
46
|
+
}
|
47
|
+
#[inline(always)]
|
48
|
+
pub fn contains_point(&self, other: ProgPoint) -> bool {
|
49
|
+
other >= self.from && other < self.to
|
50
|
+
}
|
51
|
+
#[inline(always)]
|
52
|
+
pub fn overlaps(&self, other: &Self) -> bool {
|
53
|
+
other.to > self.from && other.from < self.to
|
54
|
+
}
|
55
|
+
#[inline(always)]
|
56
|
+
pub fn len(&self) -> usize {
|
57
|
+
self.to.inst().index() - self.from.inst().index()
|
58
|
+
}
|
59
|
+
/// Returns the range covering just one program point.
|
60
|
+
#[inline(always)]
|
61
|
+
pub fn singleton(pos: ProgPoint) -> CodeRange {
|
62
|
+
CodeRange {
|
63
|
+
from: pos,
|
64
|
+
to: pos.next(),
|
65
|
+
}
|
66
|
+
}
|
67
|
+
|
68
|
+
/// Join two [CodeRange] values together, producing a [CodeRange] that includes both.
|
69
|
+
#[inline(always)]
|
70
|
+
pub fn join(&self, other: CodeRange) -> Self {
|
71
|
+
CodeRange {
|
72
|
+
from: self.from.min(other.from),
|
73
|
+
to: self.to.max(other.to),
|
74
|
+
}
|
75
|
+
}
|
76
|
+
}
|
77
|
+
|
78
|
+
impl core::cmp::PartialOrd for CodeRange {
|
79
|
+
#[inline(always)]
|
80
|
+
fn partial_cmp(&self, other: &Self) -> Option<Ordering> {
|
81
|
+
Some(self.cmp(other))
|
82
|
+
}
|
83
|
+
}
|
84
|
+
impl core::cmp::Ord for CodeRange {
|
85
|
+
#[inline(always)]
|
86
|
+
fn cmp(&self, other: &Self) -> Ordering {
|
87
|
+
if self.to <= other.from {
|
88
|
+
Ordering::Less
|
89
|
+
} else if self.from >= other.to {
|
90
|
+
Ordering::Greater
|
91
|
+
} else {
|
92
|
+
Ordering::Equal
|
93
|
+
}
|
94
|
+
}
|
95
|
+
}
|
96
|
+
|
97
|
+
define_index!(LiveBundleIndex, LiveBundles, LiveBundle);
|
98
|
+
define_index!(LiveRangeIndex, LiveRanges, LiveRange);
|
99
|
+
define_index!(SpillSetIndex, SpillSets, SpillSet);
|
100
|
+
define_index!(UseIndex);
|
101
|
+
define_index!(VRegIndex, VRegs, VRegData);
|
102
|
+
define_index!(PRegIndex);
|
103
|
+
define_index!(SpillSlotIndex);
|
104
|
+
|
105
|
+
/// Used to carry small sets of bundles, e.g. for conflict sets.
|
106
|
+
pub type LiveBundleVec = SmallVec<[LiveBundleIndex; 4]>;
|
107
|
+
|
108
|
+
#[derive(Clone, Copy, Debug)]
|
109
|
+
pub struct LiveRangeListEntry {
|
110
|
+
pub range: CodeRange,
|
111
|
+
pub index: LiveRangeIndex,
|
112
|
+
}
|
113
|
+
|
114
|
+
pub type LiveRangeList = SmallVec<[LiveRangeListEntry; 4]>;
|
115
|
+
pub type UseList = SmallVec<[Use; 4]>;
|
116
|
+
|
117
|
+
#[derive(Clone, Debug)]
|
118
|
+
pub struct LiveRange {
|
119
|
+
pub range: CodeRange,
|
120
|
+
|
121
|
+
pub vreg: VRegIndex,
|
122
|
+
pub bundle: LiveBundleIndex,
|
123
|
+
pub uses_spill_weight_and_flags: u32,
|
124
|
+
|
125
|
+
pub uses: UseList,
|
126
|
+
}
|
127
|
+
|
128
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
|
129
|
+
#[repr(u32)]
|
130
|
+
pub enum LiveRangeFlag {
|
131
|
+
StartsAtDef = 1,
|
132
|
+
}
|
133
|
+
|
134
|
+
impl LiveRange {
|
135
|
+
#[inline(always)]
|
136
|
+
pub fn set_flag(&mut self, flag: LiveRangeFlag) {
|
137
|
+
self.uses_spill_weight_and_flags |= (flag as u32) << 29;
|
138
|
+
}
|
139
|
+
#[inline(always)]
|
140
|
+
pub fn clear_flag(&mut self, flag: LiveRangeFlag) {
|
141
|
+
self.uses_spill_weight_and_flags &= !((flag as u32) << 29);
|
142
|
+
}
|
143
|
+
#[inline(always)]
|
144
|
+
pub fn assign_flag(&mut self, flag: LiveRangeFlag, val: bool) {
|
145
|
+
let bit = if val { (flag as u32) << 29 } else { 0 };
|
146
|
+
self.uses_spill_weight_and_flags &= 0xe000_0000;
|
147
|
+
self.uses_spill_weight_and_flags |= bit;
|
148
|
+
}
|
149
|
+
#[inline(always)]
|
150
|
+
pub fn has_flag(&self, flag: LiveRangeFlag) -> bool {
|
151
|
+
self.uses_spill_weight_and_flags & ((flag as u32) << 29) != 0
|
152
|
+
}
|
153
|
+
#[inline(always)]
|
154
|
+
pub fn flag_word(&self) -> u32 {
|
155
|
+
self.uses_spill_weight_and_flags & 0xe000_0000
|
156
|
+
}
|
157
|
+
#[inline(always)]
|
158
|
+
pub fn merge_flags(&mut self, flag_word: u32) {
|
159
|
+
self.uses_spill_weight_and_flags |= flag_word;
|
160
|
+
}
|
161
|
+
#[inline(always)]
|
162
|
+
pub fn uses_spill_weight(&self) -> SpillWeight {
|
163
|
+
// NOTE: the spill weight is technically stored in 29 bits, but we ignore the sign bit as
|
164
|
+
// we will always be dealing with positive values. Thus we mask out the top 3 bits to
|
165
|
+
// ensure that the sign bit is clear, then shift left by only two.
|
166
|
+
let bits = (self.uses_spill_weight_and_flags & 0x1fff_ffff) << 2;
|
167
|
+
SpillWeight::from_f32(f32::from_bits(bits))
|
168
|
+
}
|
169
|
+
#[inline(always)]
|
170
|
+
pub fn set_uses_spill_weight(&mut self, weight: SpillWeight) {
|
171
|
+
let weight_bits = (weight.to_f32().to_bits() >> 2) & 0x1fff_ffff;
|
172
|
+
self.uses_spill_weight_and_flags =
|
173
|
+
(self.uses_spill_weight_and_flags & 0xe000_0000) | weight_bits;
|
174
|
+
}
|
175
|
+
}
|
176
|
+
|
177
|
+
#[derive(Clone, Copy, Debug)]
|
178
|
+
pub struct Use {
|
179
|
+
pub operand: Operand,
|
180
|
+
pub pos: ProgPoint,
|
181
|
+
pub slot: u8,
|
182
|
+
pub weight: u16,
|
183
|
+
}
|
184
|
+
|
185
|
+
impl Use {
|
186
|
+
#[inline(always)]
|
187
|
+
pub fn new(operand: Operand, pos: ProgPoint, slot: u8) -> Self {
|
188
|
+
Self {
|
189
|
+
operand,
|
190
|
+
pos,
|
191
|
+
slot,
|
192
|
+
// Weight is updated on insertion into LR.
|
193
|
+
weight: 0,
|
194
|
+
}
|
195
|
+
}
|
196
|
+
}
|
197
|
+
|
198
|
+
pub const SLOT_NONE: u8 = u8::MAX;
|
199
|
+
|
200
|
+
#[derive(Clone, Debug)]
|
201
|
+
pub struct LiveBundle {
|
202
|
+
pub ranges: LiveRangeList,
|
203
|
+
pub spillset: SpillSetIndex,
|
204
|
+
pub allocation: Allocation,
|
205
|
+
pub prio: u32, // recomputed after every bulk update
|
206
|
+
pub spill_weight_and_props: u32,
|
207
|
+
}
|
208
|
+
|
209
|
+
pub const BUNDLE_MAX_SPILL_WEIGHT: u32 = (1 << 28) - 1;
|
210
|
+
pub const MINIMAL_FIXED_BUNDLE_SPILL_WEIGHT: u32 = BUNDLE_MAX_SPILL_WEIGHT;
|
211
|
+
pub const MINIMAL_BUNDLE_SPILL_WEIGHT: u32 = BUNDLE_MAX_SPILL_WEIGHT - 1;
|
212
|
+
pub const BUNDLE_MAX_NORMAL_SPILL_WEIGHT: u32 = BUNDLE_MAX_SPILL_WEIGHT - 2;
|
213
|
+
|
214
|
+
impl LiveBundle {
|
215
|
+
#[inline(always)]
|
216
|
+
pub fn set_cached_spill_weight_and_props(
|
217
|
+
&mut self,
|
218
|
+
spill_weight: u32,
|
219
|
+
minimal: bool,
|
220
|
+
fixed: bool,
|
221
|
+
fixed_def: bool,
|
222
|
+
stack: bool,
|
223
|
+
) {
|
224
|
+
debug_assert!(spill_weight <= BUNDLE_MAX_SPILL_WEIGHT);
|
225
|
+
self.spill_weight_and_props = spill_weight
|
226
|
+
| (if minimal { 1 << 31 } else { 0 })
|
227
|
+
| (if fixed { 1 << 30 } else { 0 })
|
228
|
+
| (if fixed_def { 1 << 29 } else { 0 })
|
229
|
+
| (if stack { 1 << 28 } else { 0 });
|
230
|
+
}
|
231
|
+
|
232
|
+
#[inline(always)]
|
233
|
+
pub fn cached_minimal(&self) -> bool {
|
234
|
+
self.spill_weight_and_props & (1 << 31) != 0
|
235
|
+
}
|
236
|
+
|
237
|
+
#[inline(always)]
|
238
|
+
pub fn cached_fixed(&self) -> bool {
|
239
|
+
self.spill_weight_and_props & (1 << 30) != 0
|
240
|
+
}
|
241
|
+
|
242
|
+
#[inline(always)]
|
243
|
+
pub fn cached_fixed_def(&self) -> bool {
|
244
|
+
self.spill_weight_and_props & (1 << 29) != 0
|
245
|
+
}
|
246
|
+
|
247
|
+
#[inline(always)]
|
248
|
+
pub fn cached_stack(&self) -> bool {
|
249
|
+
self.spill_weight_and_props & (1 << 28) != 0
|
250
|
+
}
|
251
|
+
|
252
|
+
#[inline(always)]
|
253
|
+
pub fn set_cached_fixed(&mut self) {
|
254
|
+
self.spill_weight_and_props |= 1 << 30;
|
255
|
+
}
|
256
|
+
|
257
|
+
#[inline(always)]
|
258
|
+
pub fn set_cached_fixed_def(&mut self) {
|
259
|
+
self.spill_weight_and_props |= 1 << 29;
|
260
|
+
}
|
261
|
+
|
262
|
+
#[inline(always)]
|
263
|
+
pub fn set_cached_stack(&mut self) {
|
264
|
+
self.spill_weight_and_props |= 1 << 28;
|
265
|
+
}
|
266
|
+
|
267
|
+
#[inline(always)]
|
268
|
+
pub fn cached_spill_weight(&self) -> u32 {
|
269
|
+
self.spill_weight_and_props & ((1 << 28) - 1)
|
270
|
+
}
|
271
|
+
}
|
272
|
+
|
273
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
|
274
|
+
pub struct BundleProperties {
|
275
|
+
pub minimal: bool,
|
276
|
+
pub fixed: bool,
|
277
|
+
}
|
278
|
+
|
279
|
+
/// Calculate the maximum `N` inline capacity for a `SmallVec<[T; N]>` we can
|
280
|
+
/// have without bloating its size to be larger than a `Vec<T>`.
|
281
|
+
const fn no_bloat_capacity<T>() -> usize {
|
282
|
+
// `Vec<T>` is three words: `(pointer, capacity, length)`.
|
283
|
+
//
|
284
|
+
// A `SmallVec<[T; N]>` replaces the first two members with the following:
|
285
|
+
//
|
286
|
+
// union {
|
287
|
+
// Inline([T; N]),
|
288
|
+
// Heap(pointer, capacity),
|
289
|
+
// }
|
290
|
+
//
|
291
|
+
// So if `size_of([T; N]) == size_of(pointer) + size_of(capacity)` then we
|
292
|
+
// get the maximum inline capacity without bloat.
|
293
|
+
core::mem::size_of::<usize>() * 2 / core::mem::size_of::<T>()
|
294
|
+
}
|
295
|
+
|
296
|
+
#[derive(Clone, Debug)]
|
297
|
+
pub struct SpillSet {
|
298
|
+
pub slot: SpillSlotIndex,
|
299
|
+
pub reg_hint: PReg,
|
300
|
+
pub class: RegClass,
|
301
|
+
pub spill_bundle: LiveBundleIndex,
|
302
|
+
pub required: bool,
|
303
|
+
pub splits: u8,
|
304
|
+
|
305
|
+
/// The aggregate [`CodeRange`] of all involved [`LiveRange`]s. The effect of this abstraction
|
306
|
+
/// is that we attempt to allocate one spill slot for the extent of a bundle. For fragmented
|
307
|
+
/// bundles with lots of open space this abstraction is pessimistic, but when bundles are small
|
308
|
+
/// or dense this yields similar results to tracking individual live ranges.
|
309
|
+
pub range: CodeRange,
|
310
|
+
}
|
311
|
+
|
312
|
+
pub(crate) const MAX_SPLITS_PER_SPILLSET: u8 = 2;
|
313
|
+
|
314
|
+
#[derive(Clone, Debug)]
|
315
|
+
pub struct VRegData {
|
316
|
+
pub ranges: LiveRangeList,
|
317
|
+
pub blockparam: Block,
|
318
|
+
pub is_ref: bool,
|
319
|
+
// We don't initially know the RegClass until we observe a use of the VReg.
|
320
|
+
pub class: Option<RegClass>,
|
321
|
+
}
|
322
|
+
|
323
|
+
#[derive(Clone, Debug)]
|
324
|
+
pub struct PRegData {
|
325
|
+
pub allocations: LiveRangeSet,
|
326
|
+
pub is_stack: bool,
|
327
|
+
}
|
328
|
+
|
329
|
+
#[derive(Clone, Debug)]
|
330
|
+
pub struct MultiFixedRegFixup {
|
331
|
+
pub pos: ProgPoint,
|
332
|
+
pub from_slot: u8,
|
333
|
+
pub to_slot: u8,
|
334
|
+
pub level: FixedRegFixupLevel,
|
335
|
+
pub to_preg: PRegIndex,
|
336
|
+
pub vreg: VRegIndex,
|
337
|
+
}
|
338
|
+
|
339
|
+
#[derive(Clone, Debug, PartialEq, Eq)]
|
340
|
+
pub enum FixedRegFixupLevel {
|
341
|
+
/// A fixup copy for the initial fixed reg; must come first.
|
342
|
+
Initial,
|
343
|
+
/// A fixup copy from the first fixed reg to other fixed regs for
|
344
|
+
/// the same vreg; must come second.
|
345
|
+
Secondary,
|
346
|
+
}
|
347
|
+
|
348
|
+
/// The field order is significant: these are sorted so that a
|
349
|
+
/// scan over vregs, then blocks in each range, can scan in
|
350
|
+
/// order through this (sorted) list and add allocs to the
|
351
|
+
/// half-move list.
|
352
|
+
///
|
353
|
+
/// The fields in this struct are reversed in sort order so that the entire
|
354
|
+
/// struct can be treated as a u128 for sorting purposes.
|
355
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
|
356
|
+
#[repr(C)]
|
357
|
+
pub struct BlockparamOut {
|
358
|
+
pub to_vreg: VRegIndex,
|
359
|
+
pub to_block: Block,
|
360
|
+
pub from_block: Block,
|
361
|
+
pub from_vreg: VRegIndex,
|
362
|
+
}
|
363
|
+
impl BlockparamOut {
|
364
|
+
#[inline(always)]
|
365
|
+
pub fn key(&self) -> u128 {
|
366
|
+
u128_key(
|
367
|
+
self.from_vreg.raw_u32(),
|
368
|
+
self.from_block.raw_u32(),
|
369
|
+
self.to_block.raw_u32(),
|
370
|
+
self.to_vreg.raw_u32(),
|
371
|
+
)
|
372
|
+
}
|
373
|
+
}
|
374
|
+
|
375
|
+
/// As above for `BlockparamIn`, field order is significant.
|
376
|
+
///
|
377
|
+
/// The fields in this struct are reversed in sort order so that the entire
|
378
|
+
/// struct can be treated as a u128 for sorting purposes.
|
379
|
+
#[derive(Clone, Debug)]
|
380
|
+
#[repr(C)]
|
381
|
+
pub struct BlockparamIn {
|
382
|
+
pub from_block: Block,
|
383
|
+
pub to_block: Block,
|
384
|
+
pub to_vreg: VRegIndex,
|
385
|
+
}
|
386
|
+
impl BlockparamIn {
|
387
|
+
#[inline(always)]
|
388
|
+
pub fn key(&self) -> u128 {
|
389
|
+
u128_key(
|
390
|
+
self.to_vreg.raw_u32(),
|
391
|
+
self.to_block.raw_u32(),
|
392
|
+
self.from_block.raw_u32(),
|
393
|
+
0,
|
394
|
+
)
|
395
|
+
}
|
396
|
+
}
|
397
|
+
|
398
|
+
impl LiveRanges {
|
399
|
+
pub fn add(&mut self, range: CodeRange) -> LiveRangeIndex {
|
400
|
+
self.push(LiveRange {
|
401
|
+
range,
|
402
|
+
vreg: VRegIndex::invalid(),
|
403
|
+
bundle: LiveBundleIndex::invalid(),
|
404
|
+
uses_spill_weight_and_flags: 0,
|
405
|
+
|
406
|
+
uses: smallvec![],
|
407
|
+
})
|
408
|
+
}
|
409
|
+
}
|
410
|
+
|
411
|
+
impl LiveBundles {
|
412
|
+
pub fn add(&mut self) -> LiveBundleIndex {
|
413
|
+
self.push(LiveBundle {
|
414
|
+
allocation: Allocation::none(),
|
415
|
+
ranges: smallvec![],
|
416
|
+
spillset: SpillSetIndex::invalid(),
|
417
|
+
prio: 0,
|
418
|
+
spill_weight_and_props: 0,
|
419
|
+
})
|
420
|
+
}
|
421
|
+
}
|
422
|
+
|
423
|
+
impl VRegs {
|
424
|
+
pub fn add(&mut self, reg: VReg, data: VRegData) -> VRegIndex {
|
425
|
+
let idx = self.push(data);
|
426
|
+
debug_assert_eq!(reg.vreg(), idx.index());
|
427
|
+
idx
|
428
|
+
}
|
429
|
+
}
|
430
|
+
|
431
|
+
impl core::ops::Index<VReg> for VRegs {
|
432
|
+
type Output = VRegData;
|
433
|
+
|
434
|
+
#[inline(always)]
|
435
|
+
fn index(&self, idx: VReg) -> &Self::Output {
|
436
|
+
&self.storage[idx.vreg()]
|
437
|
+
}
|
438
|
+
}
|
439
|
+
|
440
|
+
impl core::ops::IndexMut<VReg> for VRegs {
|
441
|
+
#[inline(always)]
|
442
|
+
fn index_mut(&mut self, idx: VReg) -> &mut Self::Output {
|
443
|
+
&mut self.storage[idx.vreg()]
|
444
|
+
}
|
445
|
+
}
|
446
|
+
|
447
|
+
#[derive(Clone, Debug)]
|
448
|
+
pub struct Env<'a, F: Function> {
|
449
|
+
pub func: &'a F,
|
450
|
+
pub env: &'a MachineEnv,
|
451
|
+
pub cfginfo: CFGInfo,
|
452
|
+
pub liveins: Vec<IndexSet>,
|
453
|
+
pub liveouts: Vec<IndexSet>,
|
454
|
+
pub blockparam_outs: Vec<BlockparamOut>,
|
455
|
+
pub blockparam_ins: Vec<BlockparamIn>,
|
456
|
+
|
457
|
+
pub ranges: LiveRanges,
|
458
|
+
pub bundles: LiveBundles,
|
459
|
+
pub spillsets: SpillSets,
|
460
|
+
pub vregs: VRegs,
|
461
|
+
pub pregs: Vec<PRegData>,
|
462
|
+
pub allocation_queue: PrioQueue,
|
463
|
+
pub safepoints: Vec<Inst>, // Sorted list of safepoint insts.
|
464
|
+
pub safepoints_per_vreg: HashMap<usize, HashSet<Inst>>,
|
465
|
+
|
466
|
+
pub spilled_bundles: Vec<LiveBundleIndex>,
|
467
|
+
pub spillslots: Vec<SpillSlotData>,
|
468
|
+
pub slots_by_class: [SpillSlotList; 3],
|
469
|
+
|
470
|
+
pub extra_spillslots_by_class: [SmallVec<[Allocation; 2]>; 3],
|
471
|
+
pub preferred_victim_by_class: [PReg; 3],
|
472
|
+
|
473
|
+
// When multiple fixed-register constraints are present on a
|
474
|
+
// single VReg at a single program point (this can happen for,
|
475
|
+
// e.g., call args that use the same value multiple times), we
|
476
|
+
// remove all but one of the fixed-register constraints, make a
|
477
|
+
// note here, and add a clobber with that PReg instread to keep
|
478
|
+
// the register available. When we produce the final edit-list, we
|
479
|
+
// will insert a copy from wherever the VReg's primary allocation
|
480
|
+
// was to the approprate PReg.
|
481
|
+
pub multi_fixed_reg_fixups: Vec<MultiFixedRegFixup>,
|
482
|
+
|
483
|
+
// Output:
|
484
|
+
pub allocs: Vec<Allocation>,
|
485
|
+
pub inst_alloc_offsets: Vec<u32>,
|
486
|
+
pub num_spillslots: u32,
|
487
|
+
pub safepoint_slots: Vec<(ProgPoint, Allocation)>,
|
488
|
+
pub debug_locations: Vec<(u32, ProgPoint, ProgPoint, Allocation)>,
|
489
|
+
|
490
|
+
pub allocated_bundle_count: usize,
|
491
|
+
|
492
|
+
pub stats: Stats,
|
493
|
+
|
494
|
+
// For debug output only: a list of textual annotations at every
|
495
|
+
// ProgPoint to insert into the final allocated program listing.
|
496
|
+
pub debug_annotations: hashbrown::HashMap<ProgPoint, Vec<String>>,
|
497
|
+
pub annotations_enabled: bool,
|
498
|
+
|
499
|
+
// Cached allocation for `try_to_allocate_bundle_to_reg` to avoid allocating
|
500
|
+
// a new HashSet on every call.
|
501
|
+
pub conflict_set: FxHashSet<LiveBundleIndex>,
|
502
|
+
}
|
503
|
+
|
504
|
+
impl<'a, F: Function> Env<'a, F> {
|
505
|
+
/// Get the VReg (with bundled RegClass) from a vreg index.
|
506
|
+
#[inline]
|
507
|
+
pub fn vreg(&self, index: VRegIndex) -> VReg {
|
508
|
+
let class = self.vregs[index]
|
509
|
+
.class
|
510
|
+
.expect("trying to get a VReg before observing its class");
|
511
|
+
VReg::new(index.index(), class)
|
512
|
+
}
|
513
|
+
|
514
|
+
/// Record the class of a VReg. We learn this only when we observe
|
515
|
+
/// the VRegs in use.
|
516
|
+
pub fn observe_vreg_class(&mut self, vreg: VReg) {
|
517
|
+
let old_class = self.vregs[vreg].class.replace(vreg.class());
|
518
|
+
// We should never observe two different classes for two
|
519
|
+
// mentions of a VReg in the source program.
|
520
|
+
debug_assert!(old_class == None || old_class == Some(vreg.class()));
|
521
|
+
}
|
522
|
+
|
523
|
+
/// Is this vreg actually used in the source program?
|
524
|
+
pub fn is_vreg_used(&self, index: VRegIndex) -> bool {
|
525
|
+
self.vregs[index].class.is_some()
|
526
|
+
}
|
527
|
+
}
|
528
|
+
|
529
|
+
#[derive(Clone, Debug)]
|
530
|
+
pub struct SpillSetRanges {
|
531
|
+
pub btree: BTreeMap<LiveRangeKey, SpillSetIndex>,
|
532
|
+
}
|
533
|
+
|
534
|
+
impl SpillSetRanges {
|
535
|
+
pub fn new() -> Self {
|
536
|
+
Self {
|
537
|
+
btree: BTreeMap::new(),
|
538
|
+
}
|
539
|
+
}
|
540
|
+
}
|
541
|
+
|
542
|
+
#[derive(Clone, Debug)]
|
543
|
+
pub struct SpillSlotData {
|
544
|
+
pub ranges: SpillSetRanges,
|
545
|
+
pub slots: u32,
|
546
|
+
pub alloc: Allocation,
|
547
|
+
}
|
548
|
+
|
549
|
+
#[derive(Clone, Debug)]
|
550
|
+
pub struct SpillSlotList {
|
551
|
+
pub slots: SmallVec<[SpillSlotIndex; 32]>,
|
552
|
+
pub probe_start: usize,
|
553
|
+
}
|
554
|
+
|
555
|
+
impl SpillSlotList {
|
556
|
+
pub fn new() -> Self {
|
557
|
+
SpillSlotList {
|
558
|
+
slots: smallvec![],
|
559
|
+
probe_start: 0,
|
560
|
+
}
|
561
|
+
}
|
562
|
+
|
563
|
+
/// Get the next spillslot index in probing order, wrapping around
|
564
|
+
/// at the end of the slots list.
|
565
|
+
pub(crate) fn next_index(&self, index: usize) -> usize {
|
566
|
+
debug_assert!(index < self.slots.len());
|
567
|
+
if index == self.slots.len() - 1 {
|
568
|
+
0
|
569
|
+
} else {
|
570
|
+
index + 1
|
571
|
+
}
|
572
|
+
}
|
573
|
+
}
|
574
|
+
|
575
|
+
#[derive(Clone, Debug)]
|
576
|
+
pub struct PrioQueue {
|
577
|
+
pub heap: alloc::collections::BinaryHeap<PrioQueueEntry>,
|
578
|
+
}
|
579
|
+
|
580
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
|
581
|
+
pub struct PrioQueueEntry {
|
582
|
+
pub prio: u32,
|
583
|
+
pub bundle: LiveBundleIndex,
|
584
|
+
pub reg_hint: PReg,
|
585
|
+
}
|
586
|
+
|
587
|
+
#[derive(Clone, Debug)]
|
588
|
+
pub struct LiveRangeSet {
|
589
|
+
pub btree: BTreeMap<LiveRangeKey, LiveRangeIndex>,
|
590
|
+
}
|
591
|
+
|
592
|
+
#[derive(Clone, Copy, Debug)]
|
593
|
+
pub struct LiveRangeKey {
|
594
|
+
pub from: u32,
|
595
|
+
pub to: u32,
|
596
|
+
}
|
597
|
+
|
598
|
+
impl LiveRangeKey {
|
599
|
+
#[inline(always)]
|
600
|
+
pub fn from_range(range: &CodeRange) -> Self {
|
601
|
+
Self {
|
602
|
+
from: range.from.to_index(),
|
603
|
+
to: range.to.to_index(),
|
604
|
+
}
|
605
|
+
}
|
606
|
+
|
607
|
+
#[inline(always)]
|
608
|
+
pub fn to_range(&self) -> CodeRange {
|
609
|
+
CodeRange {
|
610
|
+
from: ProgPoint::from_index(self.from),
|
611
|
+
to: ProgPoint::from_index(self.to),
|
612
|
+
}
|
613
|
+
}
|
614
|
+
}
|
615
|
+
|
616
|
+
impl core::cmp::PartialEq for LiveRangeKey {
|
617
|
+
#[inline(always)]
|
618
|
+
fn eq(&self, other: &Self) -> bool {
|
619
|
+
self.to > other.from && self.from < other.to
|
620
|
+
}
|
621
|
+
}
|
622
|
+
impl core::cmp::Eq for LiveRangeKey {}
|
623
|
+
impl core::cmp::PartialOrd for LiveRangeKey {
|
624
|
+
#[inline(always)]
|
625
|
+
fn partial_cmp(&self, other: &Self) -> Option<core::cmp::Ordering> {
|
626
|
+
Some(self.cmp(other))
|
627
|
+
}
|
628
|
+
}
|
629
|
+
impl core::cmp::Ord for LiveRangeKey {
|
630
|
+
#[inline(always)]
|
631
|
+
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
|
632
|
+
if self.to <= other.from {
|
633
|
+
core::cmp::Ordering::Less
|
634
|
+
} else if self.from >= other.to {
|
635
|
+
core::cmp::Ordering::Greater
|
636
|
+
} else {
|
637
|
+
core::cmp::Ordering::Equal
|
638
|
+
}
|
639
|
+
}
|
640
|
+
}
|
641
|
+
|
642
|
+
pub struct PrioQueueComparator<'a> {
|
643
|
+
pub prios: &'a [usize],
|
644
|
+
}
|
645
|
+
impl<'a> ContainerComparator for PrioQueueComparator<'a> {
|
646
|
+
type Ix = LiveBundleIndex;
|
647
|
+
fn compare(&self, a: Self::Ix, b: Self::Ix) -> core::cmp::Ordering {
|
648
|
+
self.prios[a.index()].cmp(&self.prios[b.index()])
|
649
|
+
}
|
650
|
+
}
|
651
|
+
|
652
|
+
impl PrioQueue {
|
653
|
+
pub fn new() -> Self {
|
654
|
+
PrioQueue {
|
655
|
+
heap: alloc::collections::BinaryHeap::new(),
|
656
|
+
}
|
657
|
+
}
|
658
|
+
|
659
|
+
#[inline(always)]
|
660
|
+
pub fn insert(&mut self, bundle: LiveBundleIndex, prio: usize, reg_hint: PReg) {
|
661
|
+
self.heap.push(PrioQueueEntry {
|
662
|
+
prio: prio as u32,
|
663
|
+
bundle,
|
664
|
+
reg_hint,
|
665
|
+
});
|
666
|
+
}
|
667
|
+
|
668
|
+
#[inline(always)]
|
669
|
+
pub fn is_empty(self) -> bool {
|
670
|
+
self.heap.is_empty()
|
671
|
+
}
|
672
|
+
|
673
|
+
#[inline(always)]
|
674
|
+
pub fn pop(&mut self) -> Option<(LiveBundleIndex, PReg)> {
|
675
|
+
self.heap.pop().map(|entry| (entry.bundle, entry.reg_hint))
|
676
|
+
}
|
677
|
+
}
|
678
|
+
|
679
|
+
impl LiveRangeSet {
|
680
|
+
pub(crate) fn new() -> Self {
|
681
|
+
Self {
|
682
|
+
btree: BTreeMap::new(),
|
683
|
+
}
|
684
|
+
}
|
685
|
+
}
|
686
|
+
|
687
|
+
#[derive(Clone, Debug)]
|
688
|
+
pub struct InsertedMove {
|
689
|
+
pub pos_prio: PosWithPrio,
|
690
|
+
pub from_alloc: Allocation,
|
691
|
+
pub to_alloc: Allocation,
|
692
|
+
pub to_vreg: VReg,
|
693
|
+
}
|
694
|
+
|
695
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
|
696
|
+
pub enum InsertMovePrio {
|
697
|
+
InEdgeMoves,
|
698
|
+
Regular,
|
699
|
+
MultiFixedRegInitial,
|
700
|
+
MultiFixedRegSecondary,
|
701
|
+
ReusedInput,
|
702
|
+
OutEdgeMoves,
|
703
|
+
}
|
704
|
+
|
705
|
+
#[derive(Debug, Default)]
|
706
|
+
pub struct InsertedMoves {
|
707
|
+
pub moves: Vec<InsertedMove>,
|
708
|
+
}
|
709
|
+
|
710
|
+
impl InsertedMoves {
|
711
|
+
pub fn push(
|
712
|
+
&mut self,
|
713
|
+
pos: ProgPoint,
|
714
|
+
prio: InsertMovePrio,
|
715
|
+
from_alloc: Allocation,
|
716
|
+
to_alloc: Allocation,
|
717
|
+
to_vreg: VReg,
|
718
|
+
) {
|
719
|
+
trace!(
|
720
|
+
"insert_move: pos {:?} prio {:?} from_alloc {:?} to_alloc {:?} to_vreg {:?}",
|
721
|
+
pos,
|
722
|
+
prio,
|
723
|
+
from_alloc,
|
724
|
+
to_alloc,
|
725
|
+
to_vreg
|
726
|
+
);
|
727
|
+
if from_alloc == to_alloc {
|
728
|
+
trace!(" -> skipping move with same source and dest");
|
729
|
+
return;
|
730
|
+
}
|
731
|
+
if let Some(from) = from_alloc.as_reg() {
|
732
|
+
debug_assert_eq!(from.class(), to_vreg.class());
|
733
|
+
}
|
734
|
+
if let Some(to) = to_alloc.as_reg() {
|
735
|
+
debug_assert_eq!(to.class(), to_vreg.class());
|
736
|
+
}
|
737
|
+
self.moves.push(InsertedMove {
|
738
|
+
pos_prio: PosWithPrio {
|
739
|
+
pos,
|
740
|
+
prio: prio as u32,
|
741
|
+
},
|
742
|
+
from_alloc,
|
743
|
+
to_alloc,
|
744
|
+
to_vreg,
|
745
|
+
});
|
746
|
+
}
|
747
|
+
}
|
748
|
+
|
749
|
+
#[derive(Clone, Debug)]
|
750
|
+
pub struct Edits {
|
751
|
+
edits: Vec<(PosWithPrio, Edit)>,
|
752
|
+
}
|
753
|
+
|
754
|
+
impl Edits {
|
755
|
+
#[inline(always)]
|
756
|
+
pub fn with_capacity(n: usize) -> Self {
|
757
|
+
Self {
|
758
|
+
edits: Vec::with_capacity(n),
|
759
|
+
}
|
760
|
+
}
|
761
|
+
|
762
|
+
#[inline(always)]
|
763
|
+
pub fn len(&self) -> usize {
|
764
|
+
self.edits.len()
|
765
|
+
}
|
766
|
+
|
767
|
+
#[inline(always)]
|
768
|
+
pub fn iter(&self) -> impl Iterator<Item = &(PosWithPrio, Edit)> {
|
769
|
+
self.edits.iter()
|
770
|
+
}
|
771
|
+
|
772
|
+
#[inline(always)]
|
773
|
+
pub fn into_edits(self) -> impl Iterator<Item = (ProgPoint, Edit)> {
|
774
|
+
self.edits.into_iter().map(|(pos, edit)| (pos.pos, edit))
|
775
|
+
}
|
776
|
+
|
777
|
+
/// Sort edits by the combination of their program position and priority. This is a stable sort
|
778
|
+
/// to preserve the order of the moves the parallel move resolver inserts.
|
779
|
+
#[inline(always)]
|
780
|
+
pub fn sort(&mut self) {
|
781
|
+
self.edits.sort_by_key(|&(pos_prio, _)| pos_prio.key());
|
782
|
+
}
|
783
|
+
|
784
|
+
pub fn add(&mut self, pos_prio: PosWithPrio, from: Allocation, to: Allocation) {
|
785
|
+
if from != to {
|
786
|
+
if from.is_reg() && to.is_reg() {
|
787
|
+
debug_assert_eq!(from.as_reg().unwrap().class(), to.as_reg().unwrap().class());
|
788
|
+
}
|
789
|
+
self.edits.push((pos_prio, Edit::Move { from, to }));
|
790
|
+
}
|
791
|
+
}
|
792
|
+
}
|
793
|
+
|
794
|
+
/// The fields in this struct are reversed in sort order so that the entire
|
795
|
+
/// struct can be treated as a u64 for sorting purposes.
|
796
|
+
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
|
797
|
+
#[repr(C)]
|
798
|
+
pub struct PosWithPrio {
|
799
|
+
pub prio: u32,
|
800
|
+
pub pos: ProgPoint,
|
801
|
+
}
|
802
|
+
|
803
|
+
impl PosWithPrio {
|
804
|
+
#[inline]
|
805
|
+
pub fn key(self) -> u64 {
|
806
|
+
u64_key(self.pos.to_index(), self.prio)
|
807
|
+
}
|
808
|
+
}
|
809
|
+
|
810
|
+
#[derive(Clone, Copy, Debug, Default)]
|
811
|
+
#[cfg_attr(feature = "enable-serde", derive(serde::Serialize, serde::Deserialize))]
|
812
|
+
pub struct Stats {
|
813
|
+
pub livein_blocks: usize,
|
814
|
+
pub livein_iterations: usize,
|
815
|
+
pub initial_liverange_count: usize,
|
816
|
+
pub merged_bundle_count: usize,
|
817
|
+
pub process_bundle_count: usize,
|
818
|
+
pub process_bundle_reg_probes_fixed: usize,
|
819
|
+
pub process_bundle_reg_success_fixed: usize,
|
820
|
+
pub process_bundle_bounding_range_probe_start_any: usize,
|
821
|
+
pub process_bundle_bounding_range_probes_any: usize,
|
822
|
+
pub process_bundle_bounding_range_success_any: usize,
|
823
|
+
pub process_bundle_reg_probe_start_any: usize,
|
824
|
+
pub process_bundle_reg_probes_any: usize,
|
825
|
+
pub process_bundle_reg_success_any: usize,
|
826
|
+
pub evict_bundle_event: usize,
|
827
|
+
pub evict_bundle_count: usize,
|
828
|
+
pub splits: usize,
|
829
|
+
pub splits_clobbers: usize,
|
830
|
+
pub splits_hot: usize,
|
831
|
+
pub splits_conflicts: usize,
|
832
|
+
pub splits_defs: usize,
|
833
|
+
pub splits_all: usize,
|
834
|
+
pub final_liverange_count: usize,
|
835
|
+
pub final_bundle_count: usize,
|
836
|
+
pub spill_bundle_count: usize,
|
837
|
+
pub spill_bundle_reg_probes: usize,
|
838
|
+
pub spill_bundle_reg_success: usize,
|
839
|
+
pub blockparam_ins_count: usize,
|
840
|
+
pub blockparam_outs_count: usize,
|
841
|
+
pub halfmoves_count: usize,
|
842
|
+
pub edits_count: usize,
|
843
|
+
}
|
844
|
+
|
845
|
+
// Helper function for generating sorting keys. The order of arguments is from
|
846
|
+
// the most significant field to the least significant one.
|
847
|
+
//
|
848
|
+
// These work best when the fields are stored in reverse order in memory so that
|
849
|
+
// they can be loaded with a single u64 load on little-endian machines.
|
850
|
+
#[inline(always)]
|
851
|
+
pub fn u64_key(b: u32, a: u32) -> u64 {
|
852
|
+
a as u64 | (b as u64) << 32
|
853
|
+
}
|
854
|
+
#[inline(always)]
|
855
|
+
pub fn u128_key(d: u32, c: u32, b: u32, a: u32) -> u128 {
|
856
|
+
a as u128 | (b as u128) << 32 | (c as u128) << 64 | (d as u128) << 96
|
857
|
+
}
|