wasmtime 9.0.4 → 10.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +184 -101
- data/ext/Cargo.toml +6 -6
- data/ext/build.rs +2 -2
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.97.1/Cargo.toml +31 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/Cargo.toml +158 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/benches/x64-evex-encoding.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/ir/trapcode.rs +144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/abi.rs +1294 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit.rs +3684 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/emit_tests.rs +7895 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/imms.rs +1210 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst/mod.rs +2966 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/inst.isle +4037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower/isle.rs +816 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/lower.isle +2906 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/aarch64/mod.rs +238 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/mod.rs +424 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/abi.rs +825 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/args.rs +1812 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit.rs +3008 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/emit_tests.rs +2338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/encode.rs +262 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/imms.rs +250 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/mod.rs +1963 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/regs.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst/vector.rs +669 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst.isle +2915 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/inst_vector.isle +760 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower/isle.rs +553 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/lower.isle +1409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/riscv64/mod.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/abi.rs +957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit.rs +3707 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/emit_tests.rs +13409 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst/mod.rs +3426 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/inst.isle +5046 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/lower.isle +3991 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/s390x/mod.rs +213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/abi.rs +985 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/evex.rs +749 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/rex.rs +588 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/encoding/vex.rs +492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/args.rs +2193 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit.rs +4090 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/emit_tests.rs +5674 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst/mod.rs +2667 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/inst.isle +5104 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower/isle.rs +1148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.isle +4481 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/lower.rs +328 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isa/x64/mod.rs +251 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/isle_prelude.rs +862 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/abi.rs +2455 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/buffer.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/compile.rs +92 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/isle.rs +827 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/lower.rs +1388 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/mod.rs +549 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/reg.rs +537 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/machinst/vcode.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude.isle +578 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/prelude_lower.isle +1012 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/settings.rs +600 -0
- data/ext/cargo-vendor/cranelift-codegen-0.97.1/src/verifier/mod.rs +1884 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/Cargo.toml +23 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/isa/x86.rs +444 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.97.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.97.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/chaos.rs +125 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/lib.rs +45 -0
- data/ext/cargo-vendor/cranelift-control-0.97.1/src/zero_sized.rs +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-entity-0.97.1/src/list.rs +955 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.97.1/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.97.1/Cargo.toml +37 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/Cargo.toml +38 -0
- data/ext/cargo-vendor/cranelift-native-0.97.1/src/lib.rs +215 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/Cargo.toml +85 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/code_translator.rs +3538 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/dummy.rs +924 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/environ/spec.rs +834 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/func_translator.rs +440 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/sections_translator.rs +417 -0
- data/ext/cargo-vendor/cranelift-wasm-0.97.1/src/translation_utils.rs +99 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/CONTRIBUTING.md +48 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/COPYRIGHT +17 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Cargo.toml +84 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/Ideas.md +106 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/LICENSE-WHATWG +26 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/README.md +827 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/ci/miri.sh +14 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Big5.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-JP.txt +12 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/EUC-KR.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/GBK.txt +16 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/IBM866.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-2022-JP.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-10.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-13.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-14.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-15.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-16.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-2.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-3.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-4.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-5.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-6.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-7.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8-I.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/ISO-8859-8.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-R.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/KOI8-U.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/Shift_JIS.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16BE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-16LE.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/UTF-8.txt +5 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/gb18030.txt +9 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/macintosh.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/replacement.txt +10 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1250.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1251.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1252.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1253.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1254.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1255.txt +8 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1256.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1257.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-1258.txt +11 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/windows-874.txt +7 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-mac-cyrillic.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/doc/x-user-defined.txt +6 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/generate-encoding-data.py +2008 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/rustfmt.toml +1 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/ascii.rs +1546 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/big5.rs +427 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/data.rs +114378 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_jp.rs +469 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/euc_kr.rs +442 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/gb18030.rs +767 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/handles.rs +1969 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/iso_2022_jp.rs +1068 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/lib.rs +6133 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/macros.rs +1622 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/mem.rs +3354 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/replacement.rs +104 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/shift_jis.rs +426 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/simd_funcs.rs +453 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/single_byte.rs +714 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_in_ref.txt +19787 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/big5_out_ref.txt +14601 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_in_ref.txt +23945 -0
- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/euc_kr_out.txt +17053 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_in.txt +23945 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/gb18030_out.txt +23944 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/iso_2022_jp_out.txt +7404 -0
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- data/ext/cargo-vendor/encoding_rs-0.8.32/src/test_data/shift_jis_in.txt +11285 -0
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//! (ir::Function) to machine code. The purpose of this infrastructure is, at a
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//! high level, to do instruction selection/lowering (to machine instructions),
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//! register allocation, and then perform all the fixups to branches, constant
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//! data references, etc., needed to actually generate machine code.
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//!
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//! The container for machine instructions, at various stages of construction,
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//! is the `VCode` struct. We refer to a sequence of machine instructions organized
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//! into basic blocks as "vcode". This is short for "virtual-register code".
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//!
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//! The compilation pipeline, from an `ir::Function` (already optimized as much as
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//! you like by machine-independent optimization passes) onward, is as follows.
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//!
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//! ```plain
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//!
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//! ir::Function (SSA IR, machine-independent opcodes)
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//! |
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//! | [lower]
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//! |
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//! VCode<arch_backend::Inst> (machine instructions:
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//! | - mostly virtual registers.
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//! | - cond branches in two-target form.
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//! | - branch targets are block indices.
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//! | - in-memory constants held by insns,
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//! | with unknown offsets.
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//! | - critical edges (actually all edges)
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//! | are split.)
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//! |
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//! | [regalloc --> `regalloc2::Output`; VCode is unchanged]
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//! |
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//! | [binary emission via MachBuffer]
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//! |
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//! Vec<u8> (machine code:
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//! | - two-dest branches resolved via
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//! | streaming branch resolution/simplification.
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//! | - regalloc `Allocation` results used directly
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//! | by instruction emission code.
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//! | - prologue and epilogue(s) built and emitted
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//! | directly during emission.
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//! | - nominal-SP-relative offsets resolved
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//! | by tracking EmitState.)
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//!
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//! ```
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use crate::binemit::{Addend, CodeInfo, CodeOffset, Reloc, StackMap};
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use crate::ir::function::FunctionParameters;
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use crate::ir::{DynamicStackSlot, RelSourceLoc, StackSlot, Type};
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use crate::isa::FunctionAlignment;
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use crate::result::CodegenResult;
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use crate::settings::Flags;
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use crate::value_label::ValueLabelsRanges;
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use alloc::vec::Vec;
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use core::fmt::Debug;
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use cranelift_control::ControlPlane;
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use cranelift_entity::PrimaryMap;
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use regalloc2::{Allocation, VReg};
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use smallvec::{smallvec, SmallVec};
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use std::string::String;
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#[cfg(feature = "enable-serde")]
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use serde::{Deserialize, Serialize};
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|
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#[macro_use]
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pub mod isle;
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|
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pub mod lower;
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pub use lower::*;
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pub mod vcode;
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pub use vcode::*;
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pub mod compile;
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pub use compile::*;
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pub mod blockorder;
|
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|
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pub use blockorder::*;
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pub mod abi;
|
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|
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pub use abi::*;
|
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|
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pub mod buffer;
|
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|
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pub use buffer::*;
|
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|
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pub mod helpers;
|
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|
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pub use helpers::*;
|
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|
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pub mod inst_common;
|
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|
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pub use inst_common::*;
|
84
|
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pub mod valueregs;
|
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|
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pub use reg::*;
|
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|
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pub use valueregs::*;
|
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|
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pub mod reg;
|
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|
-
|
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|
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/// A machine instruction.
|
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|
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pub trait MachInst: Clone + Debug {
|
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|
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/// The ABI machine spec for this `MachInst`.
|
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|
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type ABIMachineSpec: ABIMachineSpec<I = Self>;
|
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|
-
|
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|
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/// Return the registers referenced by this machine instruction along with
|
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/// the modes of reference (use, def, modify).
|
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|
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fn get_operands<F: Fn(VReg) -> VReg>(&self, collector: &mut OperandCollector<'_, F>);
|
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|
-
|
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|
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/// If this is a simple move, return the (source, destination) tuple of registers.
|
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|
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fn is_move(&self) -> Option<(Writable<Reg>, Reg)>;
|
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|
-
|
101
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/// Is this a terminator (branch or ret)? If so, return its type
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/// (ret/uncond/cond) and target if applicable.
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|
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fn is_term(&self) -> MachTerminator;
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|
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/// Is this an unconditional trap?
|
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fn is_trap(&self) -> bool;
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|
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|
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/// Is this an "args" pseudoinst?
|
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|
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fn is_args(&self) -> bool;
|
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|
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|
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|
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/// Should this instruction be included in the clobber-set?
|
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|
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fn is_included_in_clobbers(&self) -> bool;
|
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|
-
|
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|
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/// Generate a move.
|
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|
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fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self;
|
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|
-
|
117
|
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/// Generate a dummy instruction that will keep a value alive but
|
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/// has no other purpose.
|
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|
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fn gen_dummy_use(reg: Reg) -> Self;
|
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|
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|
121
|
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/// Determine register class(es) to store the given Cranelift type, and the
|
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|
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/// Cranelift type actually stored in the underlying register(s). May return
|
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|
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/// an error if the type isn't supported by this backend.
|
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|
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///
|
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|
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/// If the type requires multiple registers, then the list of registers is
|
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|
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/// returned in little-endian order.
|
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|
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///
|
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|
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/// Note that the type actually stored in the register(s) may differ in the
|
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|
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/// case that a value is split across registers: for example, on a 32-bit
|
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|
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/// target, an I64 may be stored in two registers, each of which holds an
|
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|
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/// I32. The actually-stored types are used only to inform the backend when
|
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|
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/// generating spills and reloads for individual registers.
|
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|
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fn rc_for_type(ty: Type) -> CodegenResult<(&'static [RegClass], &'static [Type])>;
|
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|
-
|
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|
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/// Get an appropriate type that can fully hold a value in a given
|
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|
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/// register class. This may not be the only type that maps to
|
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|
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/// that class, but when used with `gen_move()` or the ABI trait's
|
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|
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/// load/spill constructors, it should produce instruction(s) that
|
139
|
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/// move the entire register contents.
|
140
|
-
fn canonical_type_for_rc(rc: RegClass) -> Type;
|
141
|
-
|
142
|
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/// Generate a jump to another target. Used during lowering of
|
143
|
-
/// control flow.
|
144
|
-
fn gen_jump(target: MachLabel) -> Self;
|
145
|
-
|
146
|
-
/// Generate a NOP. The `preferred_size` parameter allows the caller to
|
147
|
-
/// request a NOP of that size, or as close to it as possible. The machine
|
148
|
-
/// backend may return a NOP whose binary encoding is smaller than the
|
149
|
-
/// preferred size, but must not return a NOP that is larger. However,
|
150
|
-
/// the instruction must have a nonzero size if preferred_size is nonzero.
|
151
|
-
fn gen_nop(preferred_size: usize) -> Self;
|
152
|
-
|
153
|
-
/// Align a basic block offset (from start of function). By default, no
|
154
|
-
/// alignment occurs.
|
155
|
-
fn align_basic_block(offset: CodeOffset) -> CodeOffset {
|
156
|
-
offset
|
157
|
-
}
|
158
|
-
|
159
|
-
/// What is the worst-case instruction size emitted by this instruction type?
|
160
|
-
fn worst_case_size() -> CodeOffset;
|
161
|
-
|
162
|
-
/// What is the register class used for reference types (GC-observable pointers)? Can
|
163
|
-
/// be dependent on compilation flags.
|
164
|
-
fn ref_type_regclass(_flags: &Flags) -> RegClass;
|
165
|
-
|
166
|
-
/// Is this a safepoint?
|
167
|
-
fn is_safepoint(&self) -> bool;
|
168
|
-
|
169
|
-
/// Generate an instruction that must appear at the beginning of a basic
|
170
|
-
/// block, if any. Note that the return value must not be subject to
|
171
|
-
/// register allocation.
|
172
|
-
fn gen_block_start(
|
173
|
-
_is_indirect_branch_target: bool,
|
174
|
-
_is_forward_edge_cfi_enabled: bool,
|
175
|
-
) -> Option<Self> {
|
176
|
-
None
|
177
|
-
}
|
178
|
-
|
179
|
-
/// Returns a description of the alignment required for functions for this
|
180
|
-
/// architecture.
|
181
|
-
fn function_alignment() -> FunctionAlignment;
|
182
|
-
|
183
|
-
/// A label-use kind: a type that describes the types of label references that
|
184
|
-
/// can occur in an instruction.
|
185
|
-
type LabelUse: MachInstLabelUse;
|
186
|
-
|
187
|
-
/// Byte representation of a trap opcode which is inserted by `MachBuffer`
|
188
|
-
/// during its `defer_trap` method.
|
189
|
-
const TRAP_OPCODE: &'static [u8];
|
190
|
-
}
|
191
|
-
|
192
|
-
/// A descriptor of a label reference (use) in an instruction set.
|
193
|
-
pub trait MachInstLabelUse: Clone + Copy + Debug + Eq {
|
194
|
-
/// Required alignment for any veneer. Usually the required instruction
|
195
|
-
/// alignment (e.g., 4 for a RISC with 32-bit instructions, or 1 for x86).
|
196
|
-
const ALIGN: CodeOffset;
|
197
|
-
|
198
|
-
/// What is the maximum PC-relative range (positive)? E.g., if `1024`, a
|
199
|
-
/// label-reference fixup at offset `x` is valid if the label resolves to `x
|
200
|
-
/// + 1024`.
|
201
|
-
fn max_pos_range(self) -> CodeOffset;
|
202
|
-
/// What is the maximum PC-relative range (negative)? This is the absolute
|
203
|
-
/// value; i.e., if `1024`, then a label-reference fixup at offset `x` is
|
204
|
-
/// valid if the label resolves to `x - 1024`.
|
205
|
-
fn max_neg_range(self) -> CodeOffset;
|
206
|
-
/// What is the size of code-buffer slice this label-use needs to patch in
|
207
|
-
/// the label's value?
|
208
|
-
fn patch_size(self) -> CodeOffset;
|
209
|
-
/// Perform a code-patch, given the offset into the buffer of this label use
|
210
|
-
/// and the offset into the buffer of the label's definition.
|
211
|
-
/// It is guaranteed that, given `delta = offset - label_offset`, we will
|
212
|
-
/// have `offset >= -self.max_neg_range()` and `offset <=
|
213
|
-
/// self.max_pos_range()`.
|
214
|
-
fn patch(self, buffer: &mut [u8], use_offset: CodeOffset, label_offset: CodeOffset);
|
215
|
-
/// Can the label-use be patched to a veneer that supports a longer range?
|
216
|
-
/// Usually valid for jumps (a short-range jump can jump to a longer-range
|
217
|
-
/// jump), but not for e.g. constant pool references, because the constant
|
218
|
-
/// load would require different code (one more level of indirection).
|
219
|
-
fn supports_veneer(self) -> bool;
|
220
|
-
/// How many bytes are needed for a veneer?
|
221
|
-
fn veneer_size(self) -> CodeOffset;
|
222
|
-
/// Generate a veneer. The given code-buffer slice is `self.veneer_size()`
|
223
|
-
/// bytes long at offset `veneer_offset` in the buffer. The original
|
224
|
-
/// label-use will be patched to refer to this veneer's offset. A new
|
225
|
-
/// (offset, LabelUse) is returned that allows the veneer to use the actual
|
226
|
-
/// label. For veneers to work properly, it is expected that the new veneer
|
227
|
-
/// has a larger range; on most platforms this probably means either a
|
228
|
-
/// "long-range jump" (e.g., on ARM, the 26-bit form), or if already at that
|
229
|
-
/// stage, a jump that supports a full 32-bit range, for example.
|
230
|
-
fn generate_veneer(self, buffer: &mut [u8], veneer_offset: CodeOffset) -> (CodeOffset, Self);
|
231
|
-
|
232
|
-
/// Returns the corresponding label-use for the relocation specified.
|
233
|
-
///
|
234
|
-
/// This returns `None` if the relocation doesn't have a corresponding
|
235
|
-
/// representation for the target architecture.
|
236
|
-
fn from_reloc(reloc: Reloc, addend: Addend) -> Option<Self>;
|
237
|
-
}
|
238
|
-
|
239
|
-
/// Describes a block terminator (not call) in the vcode, when its branches
|
240
|
-
/// have not yet been finalized (so a branch may have two targets).
|
241
|
-
///
|
242
|
-
/// Actual targets are not included: the single-source-of-truth for
|
243
|
-
/// those is the VCode itself, which holds, for each block, successors
|
244
|
-
/// and outgoing branch args per successor.
|
245
|
-
#[derive(Clone, Debug, PartialEq, Eq)]
|
246
|
-
pub enum MachTerminator {
|
247
|
-
/// Not a terminator.
|
248
|
-
None,
|
249
|
-
/// A return instruction.
|
250
|
-
Ret,
|
251
|
-
/// An unconditional branch to another block.
|
252
|
-
Uncond,
|
253
|
-
/// A conditional branch to one of two other blocks.
|
254
|
-
Cond,
|
255
|
-
/// An indirect branch with known possible targets.
|
256
|
-
Indirect,
|
257
|
-
}
|
258
|
-
|
259
|
-
/// A trait describing the ability to encode a MachInst into binary machine code.
|
260
|
-
pub trait MachInstEmit: MachInst {
|
261
|
-
/// Persistent state carried across `emit` invocations.
|
262
|
-
type State: MachInstEmitState<Self>;
|
263
|
-
/// Constant information used in `emit` invocations.
|
264
|
-
type Info;
|
265
|
-
/// Emit the instruction.
|
266
|
-
fn emit(
|
267
|
-
&self,
|
268
|
-
allocs: &[Allocation],
|
269
|
-
code: &mut MachBuffer<Self>,
|
270
|
-
info: &Self::Info,
|
271
|
-
state: &mut Self::State,
|
272
|
-
);
|
273
|
-
/// Pretty-print the instruction.
|
274
|
-
fn pretty_print_inst(&self, allocs: &[Allocation], state: &mut Self::State) -> String;
|
275
|
-
}
|
276
|
-
|
277
|
-
/// A trait describing the emission state carried between MachInsts when
|
278
|
-
/// emitting a function body.
|
279
|
-
pub trait MachInstEmitState<I: VCodeInst>: Default + Clone + Debug {
|
280
|
-
/// Create a new emission state given the ABI object.
|
281
|
-
fn new(abi: &Callee<I::ABIMachineSpec>, ctrl_plane: ControlPlane) -> Self;
|
282
|
-
/// Update the emission state before emitting an instruction that is a
|
283
|
-
/// safepoint.
|
284
|
-
fn pre_safepoint(&mut self, _stack_map: StackMap) {}
|
285
|
-
/// Update the emission state to indicate instructions are associated with a
|
286
|
-
/// particular RelSourceLoc.
|
287
|
-
fn pre_sourceloc(&mut self, _srcloc: RelSourceLoc) {}
|
288
|
-
/// The emission state holds ownership of a control plane, so it doesn't
|
289
|
-
/// have to be passed around explicitly too much. `ctrl_plane_mut` may
|
290
|
-
/// be used if temporary access to the control plane is needed by some
|
291
|
-
/// other function that doesn't have access to the emission state.
|
292
|
-
fn ctrl_plane_mut(&mut self) -> &mut ControlPlane;
|
293
|
-
/// Used to continue using a control plane after the emission state is
|
294
|
-
/// not needed anymore.
|
295
|
-
fn take_ctrl_plane(self) -> ControlPlane;
|
296
|
-
/// A hook that triggers when first emitting a new block.
|
297
|
-
/// It is guaranteed to be called before any instructions are emitted.
|
298
|
-
fn on_new_block(&mut self) {}
|
299
|
-
}
|
300
|
-
|
301
|
-
/// The result of a `MachBackend::compile_function()` call. Contains machine
|
302
|
-
/// code (as bytes) and a disassembly, if requested.
|
303
|
-
#[derive(PartialEq, Debug, Clone)]
|
304
|
-
#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
|
305
|
-
pub struct CompiledCodeBase<T: CompilePhase> {
|
306
|
-
/// Machine code.
|
307
|
-
pub buffer: MachBufferFinalized<T>,
|
308
|
-
/// Size of stack frame, in bytes.
|
309
|
-
pub frame_size: u32,
|
310
|
-
/// Disassembly, if requested.
|
311
|
-
pub vcode: Option<String>,
|
312
|
-
/// Debug info: value labels to registers/stackslots at code offsets.
|
313
|
-
pub value_labels_ranges: ValueLabelsRanges,
|
314
|
-
/// Debug info: stackslots to stack pointer offsets.
|
315
|
-
pub sized_stackslot_offsets: PrimaryMap<StackSlot, u32>,
|
316
|
-
/// Debug info: stackslots to stack pointer offsets.
|
317
|
-
pub dynamic_stackslot_offsets: PrimaryMap<DynamicStackSlot, u32>,
|
318
|
-
/// Basic-block layout info: block start offsets.
|
319
|
-
///
|
320
|
-
/// This info is generated only if the `machine_code_cfg_info`
|
321
|
-
/// flag is set.
|
322
|
-
pub bb_starts: Vec<CodeOffset>,
|
323
|
-
/// Basic-block layout info: block edges. Each edge is `(from,
|
324
|
-
/// to)`, where `from` and `to` are basic-block start offsets of
|
325
|
-
/// the respective blocks.
|
326
|
-
///
|
327
|
-
/// This info is generated only if the `machine_code_cfg_info`
|
328
|
-
/// flag is set.
|
329
|
-
pub bb_edges: Vec<(CodeOffset, CodeOffset)>,
|
330
|
-
/// Minimum alignment for the function, derived from the use of any
|
331
|
-
/// pc-relative loads.
|
332
|
-
pub alignment: u32,
|
333
|
-
}
|
334
|
-
|
335
|
-
impl CompiledCodeStencil {
|
336
|
-
/// Apply function parameters to finalize a stencil into its final form.
|
337
|
-
pub fn apply_params(self, params: &FunctionParameters) -> CompiledCode {
|
338
|
-
CompiledCode {
|
339
|
-
buffer: self.buffer.apply_base_srcloc(params.base_srcloc()),
|
340
|
-
frame_size: self.frame_size,
|
341
|
-
vcode: self.vcode,
|
342
|
-
value_labels_ranges: self.value_labels_ranges,
|
343
|
-
sized_stackslot_offsets: self.sized_stackslot_offsets,
|
344
|
-
dynamic_stackslot_offsets: self.dynamic_stackslot_offsets,
|
345
|
-
bb_starts: self.bb_starts,
|
346
|
-
bb_edges: self.bb_edges,
|
347
|
-
alignment: self.alignment,
|
348
|
-
}
|
349
|
-
}
|
350
|
-
}
|
351
|
-
|
352
|
-
impl<T: CompilePhase> CompiledCodeBase<T> {
|
353
|
-
/// Get a `CodeInfo` describing section sizes from this compilation result.
|
354
|
-
pub fn code_info(&self) -> CodeInfo {
|
355
|
-
CodeInfo {
|
356
|
-
total_size: self.buffer.total_size(),
|
357
|
-
}
|
358
|
-
}
|
359
|
-
|
360
|
-
/// Returns a reference to the machine code generated for this function compilation.
|
361
|
-
pub fn code_buffer(&self) -> &[u8] {
|
362
|
-
self.buffer.data()
|
363
|
-
}
|
364
|
-
|
365
|
-
/// Get the disassembly of the buffer, using the given capstone context.
|
366
|
-
#[cfg(feature = "disas")]
|
367
|
-
pub fn disassemble(
|
368
|
-
&self,
|
369
|
-
params: Option<&crate::ir::function::FunctionParameters>,
|
370
|
-
cs: &capstone::Capstone,
|
371
|
-
) -> Result<String, anyhow::Error> {
|
372
|
-
use std::fmt::Write;
|
373
|
-
|
374
|
-
let mut buf = String::new();
|
375
|
-
|
376
|
-
let relocs = self.buffer.relocs();
|
377
|
-
let traps = self.buffer.traps();
|
378
|
-
|
379
|
-
// Normalize the block starts to include an initial block of offset 0.
|
380
|
-
let mut block_starts = Vec::new();
|
381
|
-
if self.bb_starts.first().copied() != Some(0) {
|
382
|
-
block_starts.push(0);
|
383
|
-
}
|
384
|
-
block_starts.extend_from_slice(&self.bb_starts);
|
385
|
-
block_starts.push(self.buffer.data().len() as u32);
|
386
|
-
|
387
|
-
// Iterate over block regions, to ensure that we always produce block labels
|
388
|
-
for (n, (&start, &end)) in block_starts
|
389
|
-
.iter()
|
390
|
-
.zip(block_starts.iter().skip(1))
|
391
|
-
.enumerate()
|
392
|
-
{
|
393
|
-
writeln!(buf, "block{}: ; offset 0x{:x}", n, start)?;
|
394
|
-
|
395
|
-
let buffer = &self.buffer.data()[start as usize..end as usize];
|
396
|
-
let insns = cs.disasm_all(buffer, start as u64).map_err(map_caperr)?;
|
397
|
-
for i in insns.iter() {
|
398
|
-
write!(buf, " ")?;
|
399
|
-
|
400
|
-
let op_str = i.op_str().unwrap_or("");
|
401
|
-
if let Some(s) = i.mnemonic() {
|
402
|
-
write!(buf, "{}", s)?;
|
403
|
-
if !op_str.is_empty() {
|
404
|
-
write!(buf, " ")?;
|
405
|
-
}
|
406
|
-
}
|
407
|
-
|
408
|
-
write!(buf, "{}", op_str)?;
|
409
|
-
|
410
|
-
let end = i.address() + i.bytes().len() as u64;
|
411
|
-
let contains = |off| i.address() <= off && off < end;
|
412
|
-
|
413
|
-
if let Some(reloc) = relocs.iter().find(|reloc| contains(reloc.offset as u64)) {
|
414
|
-
write!(
|
415
|
-
buf,
|
416
|
-
" ; reloc_external {} {} {}",
|
417
|
-
reloc.kind,
|
418
|
-
reloc.name.display(params),
|
419
|
-
reloc.addend,
|
420
|
-
)?;
|
421
|
-
}
|
422
|
-
|
423
|
-
if let Some(trap) = traps.iter().find(|trap| contains(trap.offset as u64)) {
|
424
|
-
write!(buf, " ; trap: {}", trap.code)?;
|
425
|
-
}
|
426
|
-
|
427
|
-
writeln!(buf)?;
|
428
|
-
}
|
429
|
-
}
|
430
|
-
|
431
|
-
return Ok(buf);
|
432
|
-
|
433
|
-
fn map_caperr(err: capstone::Error) -> anyhow::Error {
|
434
|
-
anyhow::format_err!("{}", err)
|
435
|
-
}
|
436
|
-
}
|
437
|
-
}
|
438
|
-
|
439
|
-
/// Result of compiling a `FunctionStencil`, before applying `FunctionParameters` onto it.
|
440
|
-
///
|
441
|
-
/// Only used internally, in a transient manner, for the incremental compilation cache.
|
442
|
-
pub type CompiledCodeStencil = CompiledCodeBase<Stencil>;
|
443
|
-
|
444
|
-
/// `CompiledCode` in its final form (i.e. after `FunctionParameters` have been applied), ready for
|
445
|
-
/// consumption.
|
446
|
-
pub type CompiledCode = CompiledCodeBase<Final>;
|
447
|
-
|
448
|
-
impl CompiledCode {
|
449
|
-
/// If available, return information about the code layout in the
|
450
|
-
/// final machine code: the offsets (in bytes) of each basic-block
|
451
|
-
/// start, and all basic-block edges.
|
452
|
-
pub fn get_code_bb_layout(&self) -> (Vec<usize>, Vec<(usize, usize)>) {
|
453
|
-
(
|
454
|
-
self.bb_starts.iter().map(|&off| off as usize).collect(),
|
455
|
-
self.bb_edges
|
456
|
-
.iter()
|
457
|
-
.map(|&(from, to)| (from as usize, to as usize))
|
458
|
-
.collect(),
|
459
|
-
)
|
460
|
-
}
|
461
|
-
|
462
|
-
/// Creates unwind information for the function.
|
463
|
-
///
|
464
|
-
/// Returns `None` if the function has no unwind information.
|
465
|
-
#[cfg(feature = "unwind")]
|
466
|
-
pub fn create_unwind_info(
|
467
|
-
&self,
|
468
|
-
isa: &dyn crate::isa::TargetIsa,
|
469
|
-
) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
|
470
|
-
let unwind_info_kind = match isa.triple().operating_system {
|
471
|
-
target_lexicon::OperatingSystem::Windows => UnwindInfoKind::Windows,
|
472
|
-
_ => UnwindInfoKind::SystemV,
|
473
|
-
};
|
474
|
-
isa.emit_unwind_info(self, unwind_info_kind)
|
475
|
-
}
|
476
|
-
}
|
477
|
-
|
478
|
-
/// An object that can be used to create the text section of an executable.
|
479
|
-
///
|
480
|
-
/// This primarily handles resolving relative relocations at
|
481
|
-
/// text-section-assembly time rather than at load/link time. This
|
482
|
-
/// architecture-specific logic is sort of like a linker, but only for one
|
483
|
-
/// object file at a time.
|
484
|
-
pub trait TextSectionBuilder {
|
485
|
-
/// Appends `data` to the text section with the `align` specified.
|
486
|
-
///
|
487
|
-
/// If `labeled` is `true` then this also binds the appended data to the
|
488
|
-
/// `n`th label for how many times this has been called with `labeled:
|
489
|
-
/// true`. The label target can be passed as the `target` argument to
|
490
|
-
/// `resolve_reloc`.
|
491
|
-
///
|
492
|
-
/// This function returns the offset at which the data was placed in the
|
493
|
-
/// text section.
|
494
|
-
fn append(
|
495
|
-
&mut self,
|
496
|
-
labeled: bool,
|
497
|
-
data: &[u8],
|
498
|
-
align: u32,
|
499
|
-
ctrl_plane: &mut ControlPlane,
|
500
|
-
) -> u64;
|
501
|
-
|
502
|
-
/// Attempts to resolve a relocation for this function.
|
503
|
-
///
|
504
|
-
/// The `offset` is the offset of the relocation, within the text section.
|
505
|
-
/// The `reloc` is the kind of relocation.
|
506
|
-
/// The `addend` is the value to add to the relocation.
|
507
|
-
/// The `target` is the labeled function that is the target of this
|
508
|
-
/// relocation.
|
509
|
-
///
|
510
|
-
/// Labeled functions are created with the `append` function above by
|
511
|
-
/// setting the `labeled` parameter to `true`.
|
512
|
-
///
|
513
|
-
/// If this builder does not know how to handle `reloc` then this function
|
514
|
-
/// will return `false`. Otherwise this function will return `true` and this
|
515
|
-
/// relocation will be resolved in the final bytes returned by `finish`.
|
516
|
-
fn resolve_reloc(&mut self, offset: u64, reloc: Reloc, addend: Addend, target: usize) -> bool;
|
517
|
-
|
518
|
-
/// A debug-only option which is used to for
|
519
|
-
fn force_veneers(&mut self);
|
520
|
-
|
521
|
-
/// Completes this text section, filling out any final details, and returns
|
522
|
-
/// the bytes of the text section.
|
523
|
-
fn finish(&mut self, ctrl_plane: &mut ControlPlane) -> Vec<u8>;
|
524
|
-
}
|
525
|
-
|
526
|
-
/// Expected unwind info type.
|
527
|
-
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
528
|
-
#[non_exhaustive]
|
529
|
-
pub enum UnwindInfoKind {
|
530
|
-
/// No unwind info.
|
531
|
-
None,
|
532
|
-
/// SystemV CIE/FDE unwind info.
|
533
|
-
#[cfg(feature = "unwind")]
|
534
|
-
SystemV,
|
535
|
-
/// Windows X64 Unwind info
|
536
|
-
#[cfg(feature = "unwind")]
|
537
|
-
Windows,
|
538
|
-
}
|