wasmtime 9.0.4 → 10.0.1

data/ext/cargo-vendor/cranelift-codegen-meta-0.96.4/.cargo-checksum.json

@@ -1 +0,0 @@
-{"files":{"Cargo.toml":"dfcc2c555aa88bac7cad55d5109159cf2102b57ac9e30322691f3f8bde608927","LICENSE":"268872b9816f90fd8e85db5a28d33f8150ebb8dd016653fb39ef1f94f2686bc5","README.md":"b123f056d0d458396679c5f7f2a16d2762af0258fcda4ac14b6655a95e5a0022","src/cdsl/formats.rs":"3dbbbe2b05ac1df9d88ce8cfafba5a41c485566a6ba9dc6dfcfd71b1b85e85f2","src/cdsl/instructions.rs":"43d84c2cc7b1516d30fc8f60678623e887f2aa7758703ce798dd93345573f6c4","src/cdsl/isa.rs":"fbb5848baea534584ec113fab8d13015b80b125392e86cad0c91e14f746c038c","src/cdsl/mod.rs":"7faf3c1159b05a11aba71bd791dba544423a3e765f5d016f9bb225263edb039d","src/cdsl/operands.rs":"f531120b794e9a79e24a24212ad55a999f02be41af4cea788042ba562c109ecf","src/cdsl/settings.rs":"047edec27c91946a0241b28c8a121e4d7cb426c853fda45120ff69a5242810cb","src/cdsl/types.rs":"720b8bd81704938fc0e5980f17fce56ff8e46f8bae561138d183c7dc4e1cab31","src/cdsl/typevar.rs":"76b8f16116c7ebabcda41899540f122fdd6aaca080f32b85cc82a5c1c184340f","src/constant_hash.rs":"5c7ae3d6d2f7d436a8ed2c2287e7efbaba3d06f26ec24b61c0ed2eeb9fa3a0a9","src/error.rs":"e9b11b2feb2d867b94c8810fdc5a6c4e0d9131604a0bfa5340ff2639a55100b4","src/gen_inst.rs":"33b6da554c090c3e90781459a1ba1adf406845769da2f2566f836f93b6f268b5","src/gen_settings.rs":"c94c120bc3ebf153906da00e06d94a57e7af45e852a5c16978bbcfa9374de0fb","src/gen_types.rs":"d302614e051e04bb1d4d3172331adfaebd89285e1b06497ff7a58de7510420b2","src/isa/arm64.rs":"6792beb4222ff09fc9741ff9f933d12e6d217797ae1642be2d77c1c3733642ab","src/isa/mod.rs":"e6ba995fb0efc25a386565b3c4c1d9b4e8ae5b7c618ba2584ce094904973a5e3","src/isa/riscv64.rs":"5aa5c54e17ee2f9cac90982d70f8bdd15f334218651033b3e510385c50768369","src/isa/s390x.rs":"e2b4bcf76a34d66f5f2b33d0eec8db0ecc4af55da779edeb2024e6c3d524485c","src/isa/x86.rs":"128813b6bb8924b3676f144b2e0158161db9c635d11b433fccbc812f3a6ebced","src/lib.rs":"cefad18b9813388772fe2471946456911352be93dc4826bd8db1208fc85ad347","src/shared/entities.rs":"ec671951c8fe6e967517c96be51267e63fc7ee51b4e76aedb9f4552c7e873cb8","src/shared/formats.rs":"dffac49e20af150900210520908d7b80b5e8968730f1476d180639844f67c032","src/shared/immediates.rs":"97670f2799df2bc5cc121cc182a7ddcc944a40c001a790af905e79eafcd00fff","src/shared/instructions.rs":"3ee80840b87616a76e428cd52ebce997389b1d3f456b71c90624f9628dadafa7","src/shared/mod.rs":"bc18be331a030a24062e4b41b39e3e7934f86f2c2f1c583487fad9315152ee47","src/shared/settings.rs":"001ddee4f47b8f5cf12480dc6a2eb048c7843c1ee42f095397700cb14a1bde7a","src/shared/types.rs":"bad3d2b305610e3f1000f3a7700c9347c10ddb75040eccebf9f952525a09f4d4","src/srcgen.rs":"a758e8d9302fc8c367792588e298a959bbd7882b8a89e7de264e050e1368912c","src/unique_table.rs":"d804720d23d3db4cc8630fd3975dbde13dcd111137e98513c950ad3618ce1168"},"package":"649f70038235e4c81dba5680d7e5ae83e1081f567232425ab98b55b03afd9904"}

data/ext/cargo-vendor/cranelift-codegen-meta-0.96.4/Cargo.toml

@@ -1,23 +0,0 @@
-# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
-#
-# When uploading crates to the registry Cargo will automatically
-# "normalize" Cargo.toml files for maximal compatibility
-# with all versions of Cargo and also rewrite `path` dependencies
-# to registry (e.g., crates.io) dependencies.
-#
-# If you are reading this file be aware that the original Cargo.toml
-# will likely look very different (and much more reasonable).
-# See Cargo.toml.orig for the original contents.
-
-[package]
-edition = "2021"
-name = "cranelift-codegen-meta"
-version = "0.96.4"
-authors = ["The Cranelift Project Developers"]
-description = "Metaprogram for cranelift-codegen code generator library"
-readme = "README.md"
-license = "Apache-2.0 WITH LLVM-exception"
-repository = "https://github.com/bytecodealliance/wasmtime"
-
-[dependencies.cranelift-codegen-shared]
-version = "0.96.4"

data/ext/cargo-vendor/cranelift-codegen-meta-0.96.4/src/isa/x86.rs

@@ -1,445 +0,0 @@
-use crate::cdsl::isa::TargetIsa;
-use crate::cdsl::settings::{PredicateNode, SettingGroup, SettingGroupBuilder};
-
-use crate::shared::Definitions as SharedDefinitions;
-
-pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
-    let settings = define_settings(&shared_defs.settings);
-
-    TargetIsa::new("x86", settings)
-}
-
-fn define_settings(shared: &SettingGroup) -> SettingGroup {
-    let mut settings = SettingGroupBuilder::new("x86");
-
-    // CPUID.01H:ECX
-    let has_sse3 = settings.add_bool(
-        "has_sse3",
-        "Has support for SSE3.",
-        "SSE3: CPUID.01H:ECX.SSE3[bit 0]",
-        // Needed for default `enable_simd` setting.
-        true,
-    );
-    let has_ssse3 = settings.add_bool(
-        "has_ssse3",
-        "Has support for SSSE3.",
-        "SSSE3: CPUID.01H:ECX.SSSE3[bit 9]",
-        // Needed for default `enable_simd` setting.
-        true,
-    );
-    let has_sse41 = settings.add_bool(
-        "has_sse41",
-        "Has support for SSE4.1.",
-        "SSE4.1: CPUID.01H:ECX.SSE4_1[bit 19]",
-        // Needed for default `enable_simd` setting.
-        true,
-    );
-    let has_sse42 = settings.add_bool(
-        "has_sse42",
-        "Has support for SSE4.2.",
-        "SSE4.2: CPUID.01H:ECX.SSE4_2[bit 20]",
-        false,
-    );
-    let has_avx = settings.add_bool(
-        "has_avx",
-        "Has support for AVX.",
-        "AVX: CPUID.01H:ECX.AVX[bit 28]",
-        false,
-    );
-    let has_avx2 = settings.add_bool(
-        "has_avx2",
-        "Has support for AVX2.",
-        "AVX2: CPUID.07H:EBX.AVX2[bit 5]",
-        false,
-    );
-    let has_fma = settings.add_bool(
-        "has_fma",
-        "Has support for FMA.",
-        "FMA: CPUID.01H:ECX.FMA[bit 12]",
-        false,
-    );
-    let has_avx512bitalg = settings.add_bool(
-        "has_avx512bitalg",
-        "Has support for AVX512BITALG.",
-        "AVX512BITALG: CPUID.07H:ECX.AVX512BITALG[bit 12]",
-        false,
-    );
-    let has_avx512dq = settings.add_bool(
-        "has_avx512dq",
-        "Has support for AVX512DQ.",
-        "AVX512DQ: CPUID.07H:EBX.AVX512DQ[bit 17]",
-        false,
-    );
-    let has_avx512vl = settings.add_bool(
-        "has_avx512vl",
-        "Has support for AVX512VL.",
-        "AVX512VL: CPUID.07H:EBX.AVX512VL[bit 31]",
-        false,
-    );
-    let has_avx512vbmi = settings.add_bool(
-        "has_avx512vbmi",
-        "Has support for AVX512VMBI.",
-        "AVX512VBMI: CPUID.07H:ECX.AVX512VBMI[bit 1]",
-        false,
-    );
-    let has_avx512f = settings.add_bool(
-        "has_avx512f",
-        "Has support for AVX512F.",
-        "AVX512F: CPUID.07H:EBX.AVX512F[bit 16]",
-        false,
-    );
-    let has_popcnt = settings.add_bool(
-        "has_popcnt",
-        "Has support for POPCNT.",
-        "POPCNT: CPUID.01H:ECX.POPCNT[bit 23]",
-        false,
-    );
-
-    // CPUID.(EAX=07H, ECX=0H):EBX
-    let has_bmi1 = settings.add_bool(
-        "has_bmi1",
-        "Has support for BMI1.",
-        "BMI1: CPUID.(EAX=07H, ECX=0H):EBX.BMI1[bit 3]",
-        false,
-    );
-    let has_bmi2 = settings.add_bool(
-        "has_bmi2",
-        "Has support for BMI2.",
-        "BMI2: CPUID.(EAX=07H, ECX=0H):EBX.BMI2[bit 8]",
-        false,
-    );
-
-    // CPUID.EAX=80000001H:ECX
-    let has_lzcnt = settings.add_bool(
-        "has_lzcnt",
-        "Has support for LZCNT.",
-        "LZCNT: CPUID.EAX=80000001H:ECX.LZCNT[bit 5]",
-        false,
-    );
-
-    let shared_enable_simd = shared.get_bool("enable_simd");
-
-    settings.add_predicate("use_ssse3", predicate!(has_ssse3));
-    settings.add_predicate("use_sse41", predicate!(has_sse41));
-    settings.add_predicate("use_sse42", predicate!(has_sse41 && has_sse42));
-    settings.add_predicate("use_fma", predicate!(has_avx && has_fma));
-
-    settings.add_predicate(
-        "use_ssse3_simd",
-        predicate!(shared_enable_simd && has_ssse3),
-    );
-    settings.add_predicate(
-        "use_sse41_simd",
-        predicate!(shared_enable_simd && has_sse41),
-    );
-    settings.add_predicate(
-        "use_sse42_simd",
-        predicate!(shared_enable_simd && has_sse41 && has_sse42),
-    );
-
-    settings.add_predicate("use_avx_simd", predicate!(shared_enable_simd && has_avx));
-    settings.add_predicate(
-        "use_avx2_simd",
-        predicate!(shared_enable_simd && has_avx && has_avx2),
-    );
-    settings.add_predicate(
-        "use_avx512bitalg_simd",
-        predicate!(shared_enable_simd && has_avx512bitalg),
-    );
-    settings.add_predicate(
-        "use_avx512dq_simd",
-        predicate!(shared_enable_simd && has_avx512dq),
-    );
-    settings.add_predicate(
-        "use_avx512vl_simd",
-        predicate!(shared_enable_simd && has_avx512vl),
-    );
-    settings.add_predicate(
-        "use_avx512vbmi_simd",
-        predicate!(shared_enable_simd && has_avx512vbmi),
-    );
-    settings.add_predicate(
-        "use_avx512f_simd",
-        predicate!(shared_enable_simd && has_avx512f),
-    );
-
-    settings.add_predicate("use_popcnt", predicate!(has_popcnt && has_sse42));
-    settings.add_predicate("use_bmi1", predicate!(has_bmi1));
-    settings.add_predicate("use_lzcnt", predicate!(has_lzcnt));
-
-    let sse3 = settings.add_preset("sse3", "SSE3 and earlier.", preset!(has_sse3));
-    let ssse3 = settings.add_preset("ssse3", "SSSE3 and earlier.", preset!(sse3 && has_ssse3));
-    let sse41 = settings.add_preset("sse41", "SSE4.1 and earlier.", preset!(ssse3 && has_sse41));
-    let sse42 = settings.add_preset("sse42", "SSE4.2 and earlier.", preset!(sse41 && has_sse42));
-
-    // Presets corresponding to x86 CPUs.
-    // Features and architecture names are from LLVM's x86 presets:
-    // https://github.com/llvm/llvm-project/blob/d4493dd1ed58ac3f1eab0c4ca6e363e2b15bfd1c/llvm/lib/Target/X86/X86.td#L1300-L1643
-    settings.add_preset(
-        "baseline",
-        "A baseline preset with no extensions enabled.",
-        preset!(),
-    );
-
-    // Intel CPUs
-
-    // Netburst
-    settings.add_preset("nocona", "Nocona microarchitecture.", preset!(sse3));
-
-    // Intel Core 2 Solo/Duo
-    settings.add_preset("core2", "Core 2 microarchitecture.", preset!(sse3));
-    settings.add_preset("penryn", "Penryn microarchitecture.", preset!(sse41));
-
-    // Intel Atom CPUs
-    let atom = settings.add_preset("atom", "Atom microarchitecture.", preset!(ssse3));
-    settings.add_preset("bonnell", "Bonnell microarchitecture.", preset!(atom));
-    let silvermont = settings.add_preset(
-        "silvermont",
-        "Silvermont microarchitecture.",
-        preset!(atom && sse42 && has_popcnt),
-    );
-    settings.add_preset("slm", "Silvermont microarchitecture.", preset!(silvermont));
-    let goldmont = settings.add_preset(
-        "goldmont",
-        "Goldmont microarchitecture.",
-        preset!(silvermont),
-    );
-    settings.add_preset(
-        "goldmont-plus",
-        "Goldmont Plus microarchitecture.",
-        preset!(goldmont),
-    );
-    let tremont = settings.add_preset("tremont", "Tremont microarchitecture.", preset!(goldmont));
-
-    let alderlake = settings.add_preset(
-        "alderlake",
-        "Alderlake microarchitecture.",
-        preset!(tremont && has_bmi1 && has_bmi2 && has_lzcnt && has_fma),
-    );
-    let sierra_forest = settings.add_preset(
-        "sierraforest",
-        "Sierra Forest microarchitecture.",
-        preset!(alderlake),
-    );
-    settings.add_preset(
-        "grandridge",
-        "Grandridge microarchitecture.",
-        preset!(sierra_forest),
-    );
-    let nehalem = settings.add_preset(
-        "nehalem",
-        "Nehalem microarchitecture.",
-        preset!(sse42 && has_popcnt),
-    );
-    settings.add_preset("corei7", "Core i7 microarchitecture.", preset!(nehalem));
-    let westmere = settings.add_preset("westmere", "Westmere microarchitecture.", preset!(nehalem));
-    let sandy_bridge = settings.add_preset(
-        "sandybridge",
-        "Sandy Bridge microarchitecture.",
-        preset!(westmere && has_avx),
-    );
-    settings.add_preset(
-        "corei7-avx",
-        "Core i7 AVX microarchitecture.",
-        preset!(sandy_bridge),
-    );
-    let ivy_bridge = settings.add_preset(
-        "ivybridge",
-        "Ivy Bridge microarchitecture.",
-        preset!(sandy_bridge),
-    );
-    settings.add_preset(
-        "core-avx-i",
-        "Intel Core CPU with 64-bit extensions.",
-        preset!(ivy_bridge),
-    );
-    let haswell = settings.add_preset(
-        "haswell",
-        "Haswell microarchitecture.",
-        preset!(ivy_bridge && has_avx2 && has_bmi1 && has_bmi2 && has_fma && has_lzcnt),
-    );
-    settings.add_preset(
-        "core-avx2",
-        "Intel Core CPU with AVX2 extensions.",
-        preset!(haswell),
-    );
-    let broadwell = settings.add_preset(
-        "broadwell",
-        "Broadwell microarchitecture.",
-        preset!(haswell),
-    );
-    let skylake = settings.add_preset("skylake", "Skylake microarchitecture.", preset!(broadwell));
-    let knights_landing = settings.add_preset(
-        "knl",
-        "Knights Landing microarchitecture.",
-        preset!(has_popcnt && has_avx512f && has_fma && has_bmi1 && has_bmi2 && has_lzcnt),
-    );
-    settings.add_preset(
-        "knm",
-        "Knights Mill microarchitecture.",
-        preset!(knights_landing),
-    );
-    let skylake_avx512 = settings.add_preset(
-        "skylake-avx512",
-        "Skylake AVX512 microarchitecture.",
-        preset!(broadwell && has_avx512f && has_avx512dq && has_avx512vl),
-    );
-    settings.add_preset(
-        "skx",
-        "Skylake AVX512 microarchitecture.",
-        preset!(skylake_avx512),
-    );
-    let cascadelake = settings.add_preset(
-        "cascadelake",
-        "Cascade Lake microarchitecture.",
-        preset!(skylake_avx512),
-    );
-    settings.add_preset(
-        "cooperlake",
-        "Cooper Lake microarchitecture.",
-        preset!(cascadelake),
-    );
-    let cannonlake = settings.add_preset(
-        "cannonlake",
-        "Canon Lake microarchitecture.",
-        preset!(skylake && has_avx512f && has_avx512dq && has_avx512vl && has_avx512vbmi),
-    );
-    let icelake_client = settings.add_preset(
-        "icelake-client",
-        "Ice Lake microarchitecture.",
-        preset!(cannonlake && has_avx512bitalg),
-    );
-    // LLVM doesn't use the name "icelake" but Cranelift did in the past; alias it
-    settings.add_preset(
-        "icelake",
-        "Ice Lake microarchitecture",
-        preset!(icelake_client),
-    );
-    let icelake_server = settings.add_preset(
-        "icelake-server",
-        "Ice Lake (server) microarchitecture.",
-        preset!(icelake_client),
-    );
-    settings.add_preset(
-        "tigerlake",
-        "Tiger Lake microarchitecture.",
-        preset!(icelake_client),
-    );
-    let sapphire_rapids = settings.add_preset(
-        "sapphirerapids",
-        "Saphire Rapids microarchitecture.",
-        preset!(icelake_server),
-    );
-    settings.add_preset(
-        "raptorlake",
-        "Raptor Lake microarchitecture.",
-        preset!(alderlake),
-    );
-    settings.add_preset(
-        "meteorlake",
-        "Meteor Lake microarchitecture.",
-        preset!(alderlake),
-    );
-    settings.add_preset(
-        "graniterapids",
-        "Granite Rapids microarchitecture.",
-        preset!(sapphire_rapids),
-    );
-
-    // AMD CPUs
-
-    settings.add_preset("opteron", "Opteron microarchitecture.", preset!());
-    settings.add_preset("k8", "K8 Hammer microarchitecture.", preset!());
-    settings.add_preset("athlon64", "Athlon64 microarchitecture.", preset!());
-    settings.add_preset("athlon-fx", "Athlon FX microarchitecture.", preset!());
-    settings.add_preset(
-        "opteron-sse3",
-        "Opteron microarchitecture with support for SSE3 instructions.",
-        preset!(sse3),
-    );
-    settings.add_preset(
-        "k8-sse3",
-        "K8 Hammer microarchitecture with support for SSE3 instructions.",
-        preset!(sse3),
-    );
-    settings.add_preset(
-        "athlon64-sse3",
-        "Athlon 64 microarchitecture with support for SSE3 instructions.",
-        preset!(sse3),
-    );
-    let barcelona = settings.add_preset(
-        "barcelona",
-        "Barcelona microarchitecture.",
-        preset!(has_popcnt && has_lzcnt),
-    );
-    settings.add_preset(
-        "amdfam10",
-        "AMD Family 10h microarchitecture",
-        preset!(barcelona),
-    );
-
-    let btver1 = settings.add_preset(
-        "btver1",
-        "Bobcat microarchitecture.",
-        preset!(ssse3 && has_lzcnt && has_popcnt),
-    );
-    settings.add_preset(
-        "btver2",
-        "Jaguar microarchitecture.",
-        preset!(btver1 && has_avx && has_bmi1),
-    );
-
-    let bdver1 = settings.add_preset(
-        "bdver1",
-        "Bulldozer microarchitecture",
-        preset!(has_lzcnt && has_popcnt && ssse3),
-    );
-    let bdver2 = settings.add_preset(
-        "bdver2",
-        "Piledriver microarchitecture.",
-        preset!(bdver1 && has_bmi1),
-    );
-    let bdver3 = settings.add_preset("bdver3", "Steamroller microarchitecture.", preset!(bdver2));
-    settings.add_preset(
-        "bdver4",
-        "Excavator microarchitecture.",
-        preset!(bdver3 && has_avx2 && has_bmi2),
-    );
-
-    let znver1 = settings.add_preset(
-        "znver1",
-        "Zen (first generation) microarchitecture.",
-        preset!(sse42 && has_popcnt && has_bmi1 && has_bmi2 && has_lzcnt && has_fma),
-    );
-    let znver2 = settings.add_preset(
-        "znver2",
-        "Zen (second generation) microarchitecture.",
-        preset!(znver1),
-    );
-    settings.add_preset(
-        "znver3",
-        "Zen (third generation) microarchitecture.",
-        preset!(znver2),
-    );
-
-    // Generic
-
-    settings.add_preset("x86-64", "Generic x86-64 microarchitecture.", preset!());
-    let x86_64_v2 = settings.add_preset(
-        "x86-64-v2",
-        "Generic x86-64 (V2) microarchitecture.",
-        preset!(sse42 && has_popcnt),
-    );
-    let x86_64_v3 = settings.add_preset(
-        "x84_64_v3",
-        "Generic x86_64 (V3) microarchitecture.",
-        preset!(x86_64_v2 && has_bmi1 && has_bmi2 && has_fma && has_lzcnt && has_avx2),
-    );
-    settings.add_preset(
-        "x86_64_v4",
-        "Generic x86_64 (V4) microarchitecture.",
-        preset!(x86_64_v3 && has_avx512dq && has_avx512vl),
-    );
-
-    settings.build()
-}