rggen 0.8.2 → 0.9.0

data/lib/rggen/output_base/item_factory.rb

@@ -1,9 +0,0 @@
-module RgGen
-  module OutputBase
-    class ItemFactory < Base::ItemFactory
-      def create(owner, *args)
-        create_item(owner, *args)
-      end
-    end
-  end
-end

data/lib/rggen/output_base/template_engine.rb

@@ -1,24 +0,0 @@
-module RgGen
-  module OutputBase
-    class TemplateEngine
-      include Singleton
-
-      def process_template(context, path = nil, call_info = nil)
-        path  ||= extract_template_path(call_info || caller[0])
-        render(context, templates[path])
-      end
-
-      private
-
-      def templates
-        @templates  ||= Hash.new do |t, p|
-          t[p]  = parse_template(p)
-        end
-      end
-
-      def extract_template_path(call_info)
-        File.ext(call_info[/^(.+?):\d/, 1], file_extension.to_s)
-      end
-    end
-  end
-end

data/lib/rggen/rggen_home.rb

@@ -1,3 +0,0 @@
-module RgGen
-  RGGEN_HOME  = File.realpath(File.join(__dir__, '../..'))
-end

data/ral/LICENSE

@@ -1,21 +0,0 @@
-MIT License
-
-Copyright (c) 2017 Taichi Ishitani
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.

data/ral/compile.f

@@ -1,2 +0,0 @@
-+incdir+${RGGEN_HOME}/ral
-${RGGEN_HOME}/ral/rggen_ral_pkg.sv

data/ral/rggen_ral_block.svh

@@ -1,83 +0,0 @@
-`ifndef __RGGEN_RAL_BLOCK_SVH__
-`define __RGGEN_RAL_BLOCK_SVH__
-class rggen_ral_block extends uvm_reg_block;
-  protected uvm_object  cfg;
-
-  extern function new(string name= "rggen_ral_block", int has_coverage = UVM_NO_COVERAGE);
-
-  extern function void configure(uvm_object cfg, uvm_reg_block parent = null, string hdl_path = "");
-
-  extern virtual function uvm_reg_map create_map(
-    string            name,
-    uvm_reg_addr_t    base_addr,
-    int unsigned      n_bytes,
-    uvm_endianness_e  endian,
-    bit               byte_addressing = 1
-  );
-  extern virtual function void build();
-  extern virtual function void lock_model();
-
-  extern protected virtual function void set_cfg(uvm_object cfg);
-  extern protected virtual function uvm_reg_map create_default_map();
-  extern protected virtual function void create_sub_models();
-endclass
-
-function rggen_ral_block::new(string name, int has_coverage);
-  super.new(name, has_coverage);
-endfunction
-
-function void rggen_ral_block::configure(uvm_object cfg, uvm_reg_block parent, string hdl_path);
-  set_cfg(cfg);
-  super.configure(parent, hdl_path);
-endfunction
-
-function void rggen_ral_block::build();
-  if (default_map == null) begin
-    default_map = create_default_map();
-  end
-  create_sub_models();
-endfunction
-
-function uvm_reg_map rggen_ral_block::create_map(
-  string            name,
-  uvm_reg_addr_t    base_addr,
-  int unsigned      n_bytes,
-  uvm_endianness_e  endian,
-  bit               byte_addressing
-);
-  uvm_factory f = uvm_factory::get();
-  f.set_inst_override_by_type(uvm_reg_map::get_type(), rggen_ral_map::get_type(), {get_full_name(), ".", name});
-  return super.create_map(name, base_addr, n_bytes, endian, byte_addressing);
-endfunction
-
-function void rggen_ral_block::lock_model();
-  uvm_reg_block parent_block  = get_parent();
-
-  if (is_locked()) begin
-    return;
-  end
-
-  super.lock_model();
-
-  if (parent_block == null) begin
-    uvm_reg_map maps[$];
-    get_maps(maps);
-    foreach (maps[i]) begin
-      rggen_ral_map rggen_map;
-      if ($cast(rggen_map, maps[i])) begin
-        rggen_map.Xinit_indirect_reg_address_mapX();
-      end
-    end
-  end
-endfunction
-
-function void rggen_ral_block::set_cfg(uvm_object cfg);
-  this.cfg  = cfg;
-endfunction
-
-function uvm_reg_map rggen_ral_block::create_default_map();
-endfunction
-
-function void rggen_ral_block::create_sub_models();
-endfunction
-`endif

data/ral/rggen_ral_field.svh

@@ -1,47 +0,0 @@
-`ifndef __RGGEN_RAL_FIELD_SVH__
-`define __RGGEN_RAL_FIELD_SVH__
-class rggen_ral_field extends uvm_reg_field;
-  protected uvm_object  cfg;
-
-  extern function new(string name = "rggen_ral_field");
-
-  extern function void configure(
-    uvm_object      cfg,
-    uvm_reg         parent,
-    int unsigned    size,
-    int unsigned    lsb_pos,
-    string          access,
-    bit             volatile,
-    uvm_reg_data_t  reset,
-    bit             has_reset,
-    bit             is_rand,
-    bit             individually_accessible
-  );
-
-  extern protected virtual function void set_cfg(uvm_object cfg);
-endclass
-
-function rggen_ral_field::new(string name);
-  super.new(name);
-endfunction
-
-function void rggen_ral_field::configure(
-  uvm_object      cfg,
-  uvm_reg         parent,
-  int unsigned    size,
-  int unsigned    lsb_pos,
-  string          access,
-  bit             volatile,
-  uvm_reg_data_t  reset,
-  bit             has_reset,
-  bit             is_rand,
-  bit             individually_accessible
-);
-  set_cfg(cfg);
-  super.configure(parent, size, lsb_pos, access, volatile, reset, has_reset, is_rand, individually_accessible);
-endfunction
-
-function void rggen_ral_field::set_cfg(uvm_object cfg);
-  this.cfg  = cfg;
-endfunction
-`endif

data/ral/rggen_ral_field_rwl_rwe.svh

@@ -1,158 +0,0 @@
-`ifndef __RGGEN_RAL_FIELD_RWL_RWE_SVH__
-`define __RGGEN_RAL_FIELD_RWL_RWE_SVH__
-class rggen_ral_field_rwl_rwe_cbs extends uvm_reg_cbs;
-  local uvm_reg_field this_field;
-  local bit           lock_mode;
-  local string        mode_reg_name;
-  local string        mode_field_name;
-  local uvm_reg_field mode_field;
-
-  extern function new(string name, uvm_reg_field this_field, bit lock_mode, string mode_reg_name, string mode_field_name);
-
-  extern task pre_write(uvm_reg_item rw);
-  extern function void post_predict(
-    input uvm_reg_field   fld,
-    input uvm_reg_data_t  previous,
-    inout uvm_reg_data_t  value,
-    input uvm_predict_e   kind,
-    input uvm_path_e      path,
-    input uvm_reg_map     map
-  );
-
-  extern local function void get_mode_field();
-  extern local function bit not_wriable();
-endclass
-
-function rggen_ral_field_rwl_rwe_cbs::new(
-  string        name,
-  uvm_reg_field this_field,
-  bit           lock_mode,
-  string        mode_reg_name,
-  string        mode_field_name
-);
-  super.new(name);
-  this.this_field       = this_field;
-  this.lock_mode        = lock_mode;
-  this.mode_reg_name    = mode_reg_name;
-  this.mode_field_name  = mode_field_name;
-endfunction
-
-task rggen_ral_field_rwl_rwe_cbs::pre_write(uvm_reg_item rw);
-  if ((rw.kind == UVM_WRITE) && (rw.path == UVM_BACKDOOR) && not_wriable()) begin
-    rw.value[0] = this_field.get_mirrored_value();
-  end
-endtask
-
-function void rggen_ral_field_rwl_rwe_cbs::post_predict(
-  input uvm_reg_field   fld,
-  input uvm_reg_data_t  previous,
-  inout uvm_reg_data_t  value,
-  input uvm_predict_e   kind,
-  input uvm_path_e      path,
-  input uvm_reg_map     map
-);
-  if ((kind == UVM_PREDICT_WRITE) && not_wriable()) begin
-    value = previous;
-  end
-endfunction
-
-function void rggen_ral_field_rwl_rwe_cbs::get_mode_field();
-  uvm_reg       parent_reg;
-  uvm_reg_block parent_block;
-  uvm_reg       mode_reg;
-
-  parent_reg    = this_field.get_parent();
-  parent_block  = parent_reg.get_parent();
-
-  mode_reg  = parent_block.get_reg_by_name(mode_reg_name);
-  if (mode_reg == null) begin
-    `uvm_fatal("rggen_ral_field_rwl_rwe_cbs", $sformatf("Unable to locate the mode register: %s", mode_reg_name))
-    return;
-  end
-
-  mode_field  = mode_reg.get_field_by_name(mode_field_name);
-  if (mode_field == null) begin
-    `uvm_fatal("rggen_ral_field_rwl_rwe_cbs", $sformatf("Unable to locate the mode field: %s", mode_field_name))
-    return;
-  end
-endfunction
-
-function bit rggen_ral_field_rwl_rwe_cbs::not_wriable();
-  if (mode_field == null) begin
-    get_mode_field();
-  end
-  if (lock_mode) begin
-    return (mode_field.get() == 1) ? 1 : 0;
-  end
-  else begin
-    return (mode_field.get() == 0) ? 1 : 0;
-  end
-endfunction
-
-class rggen_ral_field_rwl_rwe extends rggen_ral_field;
-  local static bit  rwl_defined = define_access("RWL");
-  local static bit  rwe_defined = define_access("RWE");
-
-  protected rggen_ral_field_rwl_rwe_cbs cbs;
-
-  extern function new(string name, bit lock_mode, string mode_reg_name, string mode_field_name);
-
-  extern function void configure(
-    uvm_object      cfg,
-    uvm_reg         parent,
-    int unsigned    size,
-    int unsigned    lsb_pos,
-    string          access,
-    bit             volatile,
-    uvm_reg_data_t  reset,
-    bit             has_reset,
-    bit             is_rand,
-    bit             individually_accessible
-  );
-endclass
-
-function rggen_ral_field_rwl_rwe::new(string name, bit lock_mode, string mode_reg_name, string mode_field_name);
-  string  cbs_name;
-  super.new(name);
-  cbs_name  = (lock_mode) ? "rwl_cbs" : "rwe_cbs";
-  cbs       = new(cbs_name, this, lock_mode, mode_reg_name, mode_field_name);
-endfunction
-
-function void rggen_ral_field_rwl_rwe::configure(
-  uvm_object      cfg,
-  uvm_reg         parent,
-  int unsigned    size,
-  int unsigned    lsb_pos,
-  string          access,
-  bit             volatile,
-  uvm_reg_data_t  reset,
-  bit             has_reset,
-  bit             is_rand,
-  bit             individually_accessible
-);
-  super.configure(cfg, parent, size, lsb_pos, access, volatile, reset, has_reset, is_rand, individually_accessible);
-  uvm_reg_field_cb::add(this, cbs);
-endfunction
-
-class rggen_ral_field_rwl #(
-  string  MODE_REG_NAME   = "",
-  string  MODE_FIELD_NAME = ""
-) extends rggen_ral_field_rwl_rwe;
-  extern function new(string name = "rggen_ral_field_rwl");
-endclass
-
-function rggen_ral_field_rwl::new(string name);
-  super.new(name, 1, MODE_REG_NAME, MODE_FIELD_NAME);
-endfunction
-
-class rggen_ral_field_rwe #(
-  string  MODE_REG_NAME   = "",
-  string  MODE_FIELD_NAME = ""
-) extends rggen_ral_field_rwl_rwe;
-  extern function new(string name = "rggen_ral_field_rwe");
-endclass
-
-function rggen_ral_field_rwe::new(string name);
-  super.new(name, 0, MODE_REG_NAME, MODE_FIELD_NAME);
-endfunction
-`endif

data/ral/rggen_ral_indirect_reg.svh

@@ -1,193 +0,0 @@
-`ifndef __RGGEN_RAL_INDIRECT_REG_SVH__
-`define __RGGEN_RAL_INDIRECT_REG_SVH__
-typedef class rggen_ral_indirect_reg_index;
-typedef class rggen_ral_indirect_reg_ftdr_seq;
-
-class rggen_ral_indirect_reg extends rggen_ral_reg;
-  protected rggen_ral_indirect_reg_index  indirect_reg_indexes[$];
-
-  extern function new(string name, int unsigned n_bits, int has_coverage);
-
-  extern function void configure(
-    uvm_object    cfg,
-    uvm_reg_block blk_parent,
-    uvm_reg_file  regfile_parent,
-    int           indexes[$],
-    string        hdl_path = ""
-  );
-
-  extern virtual function uvm_reg_frontdoor create_frontdoor();
-  extern virtual function bit is_active();
-
-  extern protected virtual function void configure_indirect_indexes();
-  extern protected function void set_indirect_index(string reg_name, string field_name, uvm_reg_data_t value);
-endclass
-
-function rggen_ral_indirect_reg::new(string name, int unsigned n_bits, int has_coverage);
-  super.new(name, n_bits, has_coverage);
-endfunction
-
-function void rggen_ral_indirect_reg::configure(
-  uvm_object    cfg,
-  uvm_reg_block blk_parent,
-  uvm_reg_file  regfile_parent,
-  int           indexes[$],
-  string        hdl_path
-);
-  super.configure(cfg, blk_parent, regfile_parent, indexes, hdl_path);
-  configure_indirect_indexes();
-endfunction
-
-function uvm_reg_frontdoor rggen_ral_indirect_reg::create_frontdoor();
-  rggen_ral_indirect_reg_ftdr_seq fd  = new(indirect_reg_indexes);
-  return fd;
-endfunction
-
-function bit rggen_ral_indirect_reg::is_active();
-  foreach (indirect_reg_indexes[i]) begin
-    if (!indirect_reg_indexes[i].is_matched()) begin
-      return 0;
-    end
-  end
-  return 1;
-endfunction
-
-function void rggen_ral_indirect_reg::configure_indirect_indexes();
-endfunction
-
-function void rggen_ral_indirect_reg::set_indirect_index(string reg_name, string field_name, uvm_reg_data_t value);
-  rggen_ral_indirect_reg_index indirect_reg_index;
-  indirect_reg_index  = new(this, reg_name, field_name, value);
-  indirect_reg_indexes.push_back(indirect_reg_index);
-endfunction
-
-class rggen_ral_indirect_reg_index;
-  protected rggen_ral_indirect_reg  indirect_reg;
-  protected string                  reg_name;
-  protected string                  field_name;
-  protected uvm_reg_data_t          value;
-  protected uvm_reg                 index_reg;
-  protected uvm_reg_field           index_field;
-
-  extern function new(
-    rggen_ral_indirect_reg  indirect_reg,
-    string                  reg_name,
-    string                  field_name,
-    uvm_reg_data_t          value
-  );
-
-  extern virtual function bit is_matched();
-  extern virtual function void set(string fname = "", int lineno = 0);
-  extern virtual function uvm_reg get_index_reg();
-  extern virtual function uvm_reg_field get_index_field();
-endclass
-
-function rggen_ral_indirect_reg_index::new(
-  rggen_ral_indirect_reg  indirect_reg,
-  string                  reg_name,
-  string                  field_name,
-  uvm_reg_data_t          value
-);
-  this.indirect_reg = indirect_reg;
-  this.reg_name     = reg_name;
-  this.field_name   = field_name;
-  this.value        = value;
-endfunction
-
-function bit rggen_ral_indirect_reg_index::is_matched();
-  void'(get_index_field());
-  return (index_field.value == value) ? 1 : 0;
-endfunction
-
-function void rggen_ral_indirect_reg_index::set(string fname = "", int lineno = 0);
-  void'(get_index_field());
-  index_field.set(value, fname, lineno);
-endfunction
-
-function uvm_reg rggen_ral_indirect_reg_index::get_index_reg();
-  if (index_reg == null) begin
-    uvm_reg_block parent_block;
-    parent_block  = indirect_reg.get_parent();
-    index_reg     = parent_block.get_reg_by_name(reg_name);
-    if (index_reg == null) begin
-      `uvm_fatal("rggen_ral_indirect_reg_index", $sformatf("Unable to locate index register: %s", reg_name))
-      return null;
-    end
-  end
-  return index_reg;
-endfunction
-
-function uvm_reg_field rggen_ral_indirect_reg_index::get_index_field();
-  if (index_field == null) begin
-    void'(get_index_reg());
-    index_field = index_reg.get_field_by_name(field_name);
-    if (index_field == null) begin
-      `uvm_fatal("rggen_ral_indirect_reg_index", $sformatf("Unable to locate index field: %s", field_name))
-      return null;
-    end
-  end
-  return index_field;
-endfunction
-
-class rggen_ral_indirect_reg_ftdr_seq extends uvm_reg_frontdoor;
-  protected rggen_ral_indirect_reg_index  indirect_indexes[$];
-  protected bit                           index_regs[uvm_reg];
-
-  extern function new(ref rggen_ral_indirect_reg_index indirect_indexes[$]);
-
-  extern virtual task body();
-  extern task update_index_regs(ref uvm_status_e status);
-endclass
-
-function rggen_ral_indirect_reg_ftdr_seq::new(ref rggen_ral_indirect_reg_index indirect_indexes[$]);
-  super.new("rggen_ral_indirect_reg_ftdr_seq");
-  foreach (indirect_indexes[i]) begin
-    this.indirect_indexes.push_back(indirect_indexes[i]);
-  end
-endfunction
-
-task rggen_ral_indirect_reg_ftdr_seq::body();
-  uvm_status_e  status;
-  update_index_regs(status);
-  if (status == UVM_NOT_OK) begin
-    `uvm_warning("rggen_ral_indirect_reg_ftdr_seq", "Updating index registers failed")
-    rw_info.status  = status;
-    return;
-  end
-  if (rw_info.kind == UVM_WRITE) begin
-    rw_info.local_map.do_write(rw_info);
-  end
-  else begin
-    rw_info.local_map.do_read(rw_info);
-  end
-endtask
-
-task rggen_ral_indirect_reg_ftdr_seq::update_index_regs(ref uvm_status_e status);
-  if (index_regs.size() == 0) begin
-    foreach (indirect_indexes[i]) begin
-      uvm_reg index_reg = indirect_indexes[i].get_index_reg();
-      if (!index_regs.exists(index_reg)) begin
-        index_regs[index_reg] = 1;
-      end
-    end
-  end
-  foreach (indirect_indexes[i]) begin
-    indirect_indexes[i].set(rw_info.fname, rw_info.lineno);
-  end
-  foreach (index_regs[index_reg]) begin
-    index_reg.update(
-      status,
-      rw_info.path,
-      rw_info.map,
-      rw_info.parent,
-      rw_info.prior,
-      rw_info.extension,
-      rw_info.fname,
-      rw_info.lineno
-    );
-    if (status == UVM_NOT_OK) begin
-      return;
-    end
-  end
-endtask
-`endif