rggen 0.8.2 → 0.9.0

Sign up to get free protection for your applications and to get access to all the features.
Files changed (269) hide show
  1. checksums.yaml +4 -4
  2. data/CODE_OF_CONDUCT.md +54 -29
  3. data/{LICENSE.txt → LICENSE} +1 -1
  4. data/README.md +65 -56
  5. data/lib/rggen.rb +4 -63
  6. data/lib/rggen/built_in.rb +53 -0
  7. data/lib/rggen/built_in/bit_field/bit_assignment.rb +108 -0
  8. data/lib/rggen/built_in/bit_field/comment.rb +16 -0
  9. data/lib/rggen/built_in/bit_field/initial_value.rb +45 -0
  10. data/lib/rggen/built_in/bit_field/name.rb +39 -0
  11. data/lib/rggen/built_in/bit_field/reference.rb +100 -0
  12. data/lib/rggen/built_in/bit_field/sv_rtl_top.rb +87 -0
  13. data/lib/rggen/built_in/bit_field/type.rb +279 -0
  14. data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.erb +15 -0
  15. data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.rb +68 -0
  16. data/lib/rggen/built_in/bit_field/type/reserved.erb +3 -0
  17. data/lib/rggen/built_in/bit_field/type/reserved.rb +16 -0
  18. data/lib/rggen/built_in/bit_field/type/ro.erb +6 -0
  19. data/lib/rggen/built_in/bit_field/type/ro.rb +34 -0
  20. data/lib/rggen/built_in/bit_field/type/rof.erb +6 -0
  21. data/lib/rggen/built_in/bit_field/type/rof.rb +17 -0
  22. data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.erb +13 -0
  23. data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.rb +52 -0
  24. data/lib/rggen/built_in/bit_field/type/rw_wo.erb +9 -0
  25. data/lib/rggen/built_in/bit_field/type/rw_wo.rb +33 -0
  26. data/lib/rggen/built_in/bit_field/type/rwe_rwl.erb +14 -0
  27. data/lib/rggen/built_in/bit_field/type/rwe_rwl.rb +39 -0
  28. data/lib/rggen/built_in/global/address_width.rb +32 -0
  29. data/lib/rggen/built_in/global/array_port_format.rb +19 -0
  30. data/lib/rggen/built_in/global/bus_width.rb +33 -0
  31. data/lib/rggen/built_in/global/fold_sv_interface_port.rb +24 -0
  32. data/lib/rggen/built_in/register/name.rb +34 -0
  33. data/lib/rggen/built_in/register/offset_address.rb +96 -0
  34. data/lib/rggen/built_in/register/size.rb +49 -0
  35. data/lib/rggen/built_in/register/sv_rtl_top.rb +82 -0
  36. data/lib/rggen/built_in/register/type.rb +374 -0
  37. data/lib/rggen/built_in/register/type/default_sv_ral.erb +8 -0
  38. data/lib/rggen/built_in/register/type/default_sv_rtl.erb +15 -0
  39. data/lib/rggen/built_in/register/type/external.erb +11 -0
  40. data/lib/rggen/built_in/register/type/external.rb +141 -0
  41. data/lib/rggen/built_in/register/type/indirect.rb +329 -0
  42. data/lib/rggen/built_in/register/type/indirect_sv_ral.erb +13 -0
  43. data/lib/rggen/built_in/register/type/indirect_sv_rtl.erb +17 -0
  44. data/lib/rggen/built_in/register_block/byte_size.rb +59 -0
  45. data/lib/rggen/built_in/register_block/name.rb +36 -0
  46. data/lib/rggen/built_in/register_block/protocol.rb +71 -0
  47. data/lib/rggen/built_in/register_block/protocol/apb.erb +10 -0
  48. data/lib/rggen/built_in/register_block/protocol/apb.rb +113 -0
  49. data/lib/rggen/built_in/register_block/protocol/axi4lite.erb +11 -0
  50. data/lib/rggen/built_in/register_block/protocol/axi4lite.rb +167 -0
  51. data/lib/rggen/built_in/register_block/sv_ral_block_model.erb +11 -0
  52. data/lib/rggen/built_in/register_block/sv_ral_package.rb +58 -0
  53. data/lib/rggen/built_in/register_block/sv_rtl_macros.erb +9 -0
  54. data/lib/rggen/built_in/register_block/sv_rtl_top.rb +87 -0
  55. data/lib/rggen/built_in/version.rb +7 -0
  56. data/lib/rggen/default_setup_file.rb +6 -0
  57. data/lib/rggen/setup/default.rb +26 -0
  58. data/lib/rggen/version.rb +5 -4
  59. data/sample/block_0.rb +85 -0
  60. data/sample/block_0.sv +601 -0
  61. data/sample/block_0.xlsx +0 -0
  62. data/sample/block_0.yml +94 -0
  63. data/sample/block_0_ral_pkg.sv +174 -0
  64. data/sample/block_1.rb +22 -0
  65. data/sample/block_1.sv +136 -0
  66. data/sample/block_1.xlsx +0 -0
  67. data/sample/block_1.yml +26 -0
  68. data/sample/block_1_ral_pkg.sv +68 -0
  69. data/sample/config.json +5 -0
  70. data/sample/config.yml +3 -0
  71. metadata +96 -270
  72. data/bin/rggen +0 -6
  73. data/c_header/LICENSE +0 -21
  74. data/c_header/rggen.h +0 -17
  75. data/lib/rggen/base/component.rb +0 -31
  76. data/lib/rggen/base/component_factory.rb +0 -53
  77. data/lib/rggen/base/hierarchical_accessors.rb +0 -87
  78. data/lib/rggen/base/hierarchical_item_accessors.rb +0 -79
  79. data/lib/rggen/base/internal_struct.rb +0 -28
  80. data/lib/rggen/base/item.rb +0 -35
  81. data/lib/rggen/base/item_factory.rb +0 -25
  82. data/lib/rggen/builder/builder.rb +0 -69
  83. data/lib/rggen/builder/category.rb +0 -63
  84. data/lib/rggen/builder/component_entry.rb +0 -50
  85. data/lib/rggen/builder/component_store.rb +0 -42
  86. data/lib/rggen/builder/input_component_store.rb +0 -25
  87. data/lib/rggen/builder/item_store.rb +0 -89
  88. data/lib/rggen/builder/list_item_entry.rb +0 -81
  89. data/lib/rggen/builder/output_component_store.rb +0 -13
  90. data/lib/rggen/builder/simple_item_entry.rb +0 -33
  91. data/lib/rggen/builtins.rb +0 -55
  92. data/lib/rggen/builtins/bit_field/bit_assignment.rb +0 -39
  93. data/lib/rggen/builtins/bit_field/field_model.rb +0 -38
  94. data/lib/rggen/builtins/bit_field/initial_value.rb +0 -36
  95. data/lib/rggen/builtins/bit_field/name.rb +0 -26
  96. data/lib/rggen/builtins/bit_field/reference.rb +0 -40
  97. data/lib/rggen/builtins/bit_field/rtl_top.rb +0 -11
  98. data/lib/rggen/builtins/bit_field/type.rb +0 -244
  99. data/lib/rggen/builtins/bit_field/types/reserved.erb +0 -6
  100. data/lib/rggen/builtins/bit_field/types/reserved.rb +0 -18
  101. data/lib/rggen/builtins/bit_field/types/ro.erb +0 -6
  102. data/lib/rggen/builtins/bit_field/types/ro.rb +0 -22
  103. data/lib/rggen/builtins/bit_field/types/rw.erb +0 -9
  104. data/lib/rggen/builtins/bit_field/types/rw.rb +0 -23
  105. data/lib/rggen/builtins/bit_field/types/rwl_rwe.erb +0 -11
  106. data/lib/rggen/builtins/bit_field/types/rwl_rwe.rb +0 -54
  107. data/lib/rggen/builtins/bit_field/types/w0c_w1c.erb +0 -12
  108. data/lib/rggen/builtins/bit_field/types/w0c_w1c.rb +0 -33
  109. data/lib/rggen/builtins/bit_field/types/w0s_w1s.erb +0 -12
  110. data/lib/rggen/builtins/bit_field/types/w0s_w1s.rb +0 -33
  111. data/lib/rggen/builtins/bit_field/types/wo.rb +0 -5
  112. data/lib/rggen/builtins/global/address_width.rb +0 -17
  113. data/lib/rggen/builtins/global/array_port_format.rb +0 -15
  114. data/lib/rggen/builtins/global/data_width.rb +0 -20
  115. data/lib/rggen/builtins/global/unfold_sv_interface_port.rb +0 -22
  116. data/lib/rggen/builtins/loaders/configuration/json_loader.rb +0 -7
  117. data/lib/rggen/builtins/loaders/configuration/yaml_loader.rb +0 -7
  118. data/lib/rggen/builtins/loaders/register_map/csv_loader.rb +0 -12
  119. data/lib/rggen/builtins/loaders/register_map/xls_loader.rb +0 -17
  120. data/lib/rggen/builtins/loaders/register_map/xlsx_ods_loader.rb +0 -21
  121. data/lib/rggen/builtins/register/array.rb +0 -30
  122. data/lib/rggen/builtins/register/constructor.rb +0 -17
  123. data/lib/rggen/builtins/register/field_model_creator.rb +0 -14
  124. data/lib/rggen/builtins/register/indirect_index_configurator.rb +0 -54
  125. data/lib/rggen/builtins/register/name.rb +0 -26
  126. data/lib/rggen/builtins/register/offset_address.rb +0 -61
  127. data/lib/rggen/builtins/register/reg_model.rb +0 -107
  128. data/lib/rggen/builtins/register/rtl_top.rb +0 -68
  129. data/lib/rggen/builtins/register/sub_block_model.rb +0 -34
  130. data/lib/rggen/builtins/register/type.rb +0 -283
  131. data/lib/rggen/builtins/register/types/default.erb +0 -10
  132. data/lib/rggen/builtins/register/types/external.erb +0 -11
  133. data/lib/rggen/builtins/register/types/external.rb +0 -77
  134. data/lib/rggen/builtins/register/types/indirect.erb +0 -13
  135. data/lib/rggen/builtins/register/types/indirect.rb +0 -175
  136. data/lib/rggen/builtins/register/uniqueness_validator.rb +0 -51
  137. data/lib/rggen/builtins/register_block/address_struct.rb +0 -56
  138. data/lib/rggen/builtins/register_block/base_address.rb +0 -64
  139. data/lib/rggen/builtins/register_block/block_model.rb +0 -20
  140. data/lib/rggen/builtins/register_block/byte_size.rb +0 -37
  141. data/lib/rggen/builtins/register_block/c_header_file.rb +0 -15
  142. data/lib/rggen/builtins/register_block/clock_reset.rb +0 -8
  143. data/lib/rggen/builtins/register_block/constructor.rb +0 -14
  144. data/lib/rggen/builtins/register_block/default_map_creator.rb +0 -39
  145. data/lib/rggen/builtins/register_block/host_if.rb +0 -64
  146. data/lib/rggen/builtins/register_block/host_ifs/apb.erb +0 -10
  147. data/lib/rggen/builtins/register_block/host_ifs/apb.rb +0 -64
  148. data/lib/rggen/builtins/register_block/host_ifs/axi4lite.erb +0 -11
  149. data/lib/rggen/builtins/register_block/host_ifs/axi4lite.rb +0 -93
  150. data/lib/rggen/builtins/register_block/name.rb +0 -26
  151. data/lib/rggen/builtins/register_block/ral_package.rb +0 -24
  152. data/lib/rggen/builtins/register_block/rtl_top.rb +0 -38
  153. data/lib/rggen/builtins/register_block/sub_model_creator.rb +0 -14
  154. data/lib/rggen/commands.rb +0 -23
  155. data/lib/rggen/core_components.rb +0 -54
  156. data/lib/rggen/core_components/c_header/item.rb +0 -8
  157. data/lib/rggen/core_components/c_header/setup.rb +0 -19
  158. data/lib/rggen/core_components/c_utility.rb +0 -19
  159. data/lib/rggen/core_components/c_utility/data_structure_definition.rb +0 -60
  160. data/lib/rggen/core_components/c_utility/source_file.rb +0 -10
  161. data/lib/rggen/core_components/c_utility/variable_declaration.rb +0 -35
  162. data/lib/rggen/core_components/code_utility.rb +0 -56
  163. data/lib/rggen/core_components/code_utility/code_block.rb +0 -72
  164. data/lib/rggen/core_components/code_utility/line.rb +0 -28
  165. data/lib/rggen/core_components/code_utility/source_file.rb +0 -97
  166. data/lib/rggen/core_components/configuration/configuration_factory.rb +0 -23
  167. data/lib/rggen/core_components/configuration/item.rb +0 -11
  168. data/lib/rggen/core_components/configuration/item_factory.rb +0 -20
  169. data/lib/rggen/core_components/configuration/raise_error.rb +0 -11
  170. data/lib/rggen/core_components/configuration/setup.rb +0 -14
  171. data/lib/rggen/core_components/erb_engine.rb +0 -15
  172. data/lib/rggen/core_components/ral/component.rb +0 -24
  173. data/lib/rggen/core_components/ral/item.rb +0 -59
  174. data/lib/rggen/core_components/ral/setup.rb +0 -19
  175. data/lib/rggen/core_components/register_map/bit_field_factory.rb +0 -11
  176. data/lib/rggen/core_components/register_map/component.rb +0 -15
  177. data/lib/rggen/core_components/register_map/component_factory.rb +0 -9
  178. data/lib/rggen/core_components/register_map/generic_map.rb +0 -80
  179. data/lib/rggen/core_components/register_map/item.rb +0 -26
  180. data/lib/rggen/core_components/register_map/item_factory.rb +0 -26
  181. data/lib/rggen/core_components/register_map/loader.rb +0 -11
  182. data/lib/rggen/core_components/register_map/raise_error.rb +0 -17
  183. data/lib/rggen/core_components/register_map/register_block_factory.rb +0 -29
  184. data/lib/rggen/core_components/register_map/register_factory.rb +0 -18
  185. data/lib/rggen/core_components/register_map/register_map_factory.rb +0 -18
  186. data/lib/rggen/core_components/register_map/setup.rb +0 -33
  187. data/lib/rggen/core_components/rtl/component.rb +0 -24
  188. data/lib/rggen/core_components/rtl/item.rb +0 -82
  189. data/lib/rggen/core_components/rtl/setup.rb +0 -19
  190. data/lib/rggen/core_components/verilog_utility.rb +0 -88
  191. data/lib/rggen/core_components/verilog_utility/class_definition.rb +0 -56
  192. data/lib/rggen/core_components/verilog_utility/identifier.rb +0 -78
  193. data/lib/rggen/core_components/verilog_utility/interface_instance.rb +0 -37
  194. data/lib/rggen/core_components/verilog_utility/interface_port.rb +0 -33
  195. data/lib/rggen/core_components/verilog_utility/local_scope.rb +0 -75
  196. data/lib/rggen/core_components/verilog_utility/module_definition.rb +0 -82
  197. data/lib/rggen/core_components/verilog_utility/package_definition.rb +0 -57
  198. data/lib/rggen/core_components/verilog_utility/source_file.rb +0 -10
  199. data/lib/rggen/core_components/verilog_utility/structure_definition.rb +0 -51
  200. data/lib/rggen/core_components/verilog_utility/subroutine_definition.rb +0 -41
  201. data/lib/rggen/core_components/verilog_utility/variable.rb +0 -115
  202. data/lib/rggen/core_extensions/array.rb +0 -9
  203. data/lib/rggen/core_extensions/facets.rb +0 -22
  204. data/lib/rggen/core_extensions/forwardable.rb +0 -49
  205. data/lib/rggen/core_extensions/integer.rb +0 -5
  206. data/lib/rggen/core_extensions/math.rb +0 -7
  207. data/lib/rggen/core_extensions/roo.rb +0 -17
  208. data/lib/rggen/exceptions.rb +0 -28
  209. data/lib/rggen/generator.rb +0 -67
  210. data/lib/rggen/input_base/component.rb +0 -28
  211. data/lib/rggen/input_base/component_factory.rb +0 -58
  212. data/lib/rggen/input_base/item.rb +0 -171
  213. data/lib/rggen/input_base/item_factory.rb +0 -13
  214. data/lib/rggen/input_base/loader.rb +0 -23
  215. data/lib/rggen/input_base/regexp_patterns.rb +0 -29
  216. data/lib/rggen/option_switches.rb +0 -60
  217. data/lib/rggen/options.rb +0 -97
  218. data/lib/rggen/output_base/code_generator.rb +0 -36
  219. data/lib/rggen/output_base/component.rb +0 -78
  220. data/lib/rggen/output_base/component_factory.rb +0 -32
  221. data/lib/rggen/output_base/file_writer.rb +0 -36
  222. data/lib/rggen/output_base/item.rb +0 -110
  223. data/lib/rggen/output_base/item_factory.rb +0 -9
  224. data/lib/rggen/output_base/template_engine.rb +0 -24
  225. data/lib/rggen/rggen_home.rb +0 -3
  226. data/ral/LICENSE +0 -21
  227. data/ral/compile.f +0 -2
  228. data/ral/rggen_ral_block.svh +0 -83
  229. data/ral/rggen_ral_field.svh +0 -47
  230. data/ral/rggen_ral_field_rwl_rwe.svh +0 -158
  231. data/ral/rggen_ral_indirect_reg.svh +0 -193
  232. data/ral/rggen_ral_macros.svh +0 -27
  233. data/ral/rggen_ral_map.svh +0 -124
  234. data/ral/rggen_ral_pkg.sv +0 -15
  235. data/ral/rggen_ral_reg.svh +0 -88
  236. data/rtl/LICENSE +0 -21
  237. data/rtl/compile.f +0 -18
  238. data/rtl/rggen_address_decoder.sv +0 -23
  239. data/rtl/rggen_apb_if.sv +0 -41
  240. data/rtl/rggen_axi4lite_if.sv +0 -68
  241. data/rtl/rggen_bit_field_if.sv +0 -28
  242. data/rtl/rggen_bit_field_ro.sv +0 -9
  243. data/rtl/rggen_bit_field_rw.sv +0 -25
  244. data/rtl/rggen_bit_field_rwl_rwe.sv +0 -29
  245. data/rtl/rggen_bit_field_w01s_w01c.sv +0 -55
  246. data/rtl/rggen_bus_if.sv +0 -43
  247. data/rtl/rggen_bus_splitter.sv +0 -86
  248. data/rtl/rggen_default_register.sv +0 -15
  249. data/rtl/rggen_external_register.sv +0 -83
  250. data/rtl/rggen_host_if_apb.sv +0 -29
  251. data/rtl/rggen_host_if_axi4lite.sv +0 -161
  252. data/rtl/rggen_indirect_register.sv +0 -21
  253. data/rtl/rggen_register_base.sv +0 -57
  254. data/rtl/rggen_register_if.sv +0 -42
  255. data/rtl/rggen_rtl_pkg.sv +0 -23
  256. data/sample/LICENSE +0 -21
  257. data/sample/sample.csv +0 -21
  258. data/sample/sample.json +0 -6
  259. data/sample/sample.xls +0 -0
  260. data/sample/sample.xlsx +0 -0
  261. data/sample/sample.yaml +0 -4
  262. data/sample/sample_0.h +0 -17
  263. data/sample/sample_0.sv +0 -402
  264. data/sample/sample_0_ral_pkg.sv +0 -145
  265. data/sample/sample_1.h +0 -9
  266. data/sample/sample_1.sv +0 -128
  267. data/sample/sample_1_ral_pkg.sv +0 -56
  268. data/sample/sample_setup.rb +0 -24
  269. data/setup/default.rb +0 -14
@@ -0,0 +1,16 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_simple_feature(:bit_field, :comment) do
4
+ register_map do
5
+ property :comment, body: -> { @comment ||= '' }
6
+
7
+ build do |value|
8
+ @comment =
9
+ if value.is_a?(Array)
10
+ value.join("\n")
11
+ else
12
+ value.to_s
13
+ end
14
+ end
15
+ end
16
+ end
@@ -0,0 +1,45 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_simple_feature(:bit_field, :initial_value) do
4
+ register_map do
5
+ property :initial_value, default: 0
6
+ property :initial_value?, body: -> { !@initial_value.nil? }
7
+
8
+ build do |value|
9
+ @initial_value =
10
+ begin
11
+ Integer(value)
12
+ rescue ArgumentError, TypeError
13
+ error "cannot convert #{value.inspect} into initial value"
14
+ end
15
+ end
16
+
17
+ verify(:component) do
18
+ error_condition { initial_value? && initial_value < min_initial_value }
19
+ message do
20
+ 'input initial value is less than minimum initial value: ' \
21
+ "initial value #{initial_value} " \
22
+ "minimum initial value #{min_initial_value}"
23
+ end
24
+ end
25
+
26
+ verify(:component) do
27
+ error_condition { initial_value? && initial_value > max_initial_value }
28
+ message do
29
+ 'input initial value is greater than maximum initial value: ' \
30
+ "initial value #{initial_value} " \
31
+ "maximum initial value #{max_initial_value}"
32
+ end
33
+ end
34
+
35
+ private
36
+
37
+ def min_initial_value
38
+ bit_field.width == 1 ? 0 : -(2**(bit_field.width - 1))
39
+ end
40
+
41
+ def max_initial_value
42
+ 2**bit_field.width - 1
43
+ end
44
+ end
45
+ end
@@ -0,0 +1,39 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_simple_feature(:bit_field, :name) do
4
+ register_map do
5
+ property :name
6
+ property :full_name, forward_to: :get_full_name
7
+
8
+ input_pattern variable_name
9
+
10
+ build do |value|
11
+ @name =
12
+ if pattern_matched?
13
+ match_data.to_s
14
+ else
15
+ error "illegal input value for bit field name: #{value.inspect}"
16
+ end
17
+ end
18
+
19
+ verify(:feature) do
20
+ error_condition { !name }
21
+ message { 'no bit field name is given' }
22
+ end
23
+
24
+ verify(:feature) do
25
+ error_condition { duplicated_name? }
26
+ message { "duplicated bit field name: #{name}" }
27
+ end
28
+
29
+ private
30
+
31
+ def get_full_name(separator = '.')
32
+ [register.name, name].join(separator)
33
+ end
34
+
35
+ def duplicated_name?
36
+ register.bit_fields.any? { |bit_field| bit_field.name == name }
37
+ end
38
+ end
39
+ end
@@ -0,0 +1,100 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_simple_feature(:bit_field, :reference) do
4
+ register_map do
5
+ property :reference, forward_to: :reference_bit_field, verify: :all
6
+ property :reference?, body: -> { !@input_reference.nil? }
7
+ property :find_reference, forward_to: :find_reference_bit_field
8
+
9
+ input_pattern /(#{variable_name})\.(#{variable_name})/
10
+
11
+ build do |value|
12
+ @input_reference =
13
+ if pattern_matched?
14
+ "#{match_data[1]}.#{match_data[2]}"
15
+ else
16
+ error "illegal input value for reference: #{value.inspect}"
17
+ end
18
+ end
19
+
20
+ verify(:component) do
21
+ error_condition { reference? && @input_reference == bit_field.full_name }
22
+ message { "self reference: #{@input_reference}" }
23
+ end
24
+
25
+ verify(:all) do
26
+ error_condition { reference? && !reference_bit_field }
27
+ message { "no such bit field found: #{@input_reference}" }
28
+ end
29
+
30
+ verify(:all) do
31
+ error_condition do
32
+ reference? && !register.array? && reference_bit_field.register.array?
33
+ end
34
+ message do
35
+ 'bit field of array register is not allowed for ' \
36
+ "reference bit field: #{@input_reference}"
37
+ end
38
+ end
39
+
40
+ verify(:all) do
41
+ error_condition { reference? && !match_array_size? }
42
+ message do
43
+ 'array size is not matched: ' \
44
+ "own #{register.array_size} " \
45
+ "reference #{reference_bit_field.register.array_size}"
46
+ end
47
+ end
48
+
49
+ verify(:all) do
50
+ error_condition do
51
+ reference? && !bit_field.sequential? && reference_bit_field.sequential?
52
+ end
53
+ message do
54
+ 'sequential bit field is not allowed for ' \
55
+ "reference bit field: #{@input_reference}"
56
+ end
57
+ end
58
+
59
+ verify(:all) do
60
+ error_condition { reference? && !match_sequence_size? }
61
+ message do
62
+ 'sequence size is not matched: ' \
63
+ "own #{bit_field.sequence_size} " \
64
+ "reference #{reference_bit_field.sequence_size}"
65
+ end
66
+ end
67
+
68
+ verify(:all) do
69
+ error_condition { reference? && reference_bit_field.reserved? }
70
+ message { "refer to reserved bit field: #{@input_reference}" }
71
+ end
72
+
73
+ private
74
+
75
+ def reference_bit_field
76
+ (reference? || nil) &&
77
+ (@reference_bit_field ||= lookup_reference)
78
+ end
79
+
80
+ def find_reference_bit_field(bit_fields)
81
+ (reference? || nil) &&
82
+ bit_fields
83
+ .find { |bit_field| bit_field.full_name == @input_reference }
84
+ end
85
+
86
+ def lookup_reference
87
+ find_reference_bit_field(register_block.bit_fields)
88
+ end
89
+
90
+ def match_array_size?
91
+ !(register.array? && reference_bit_field.register.array?) ||
92
+ register.array_size == reference_bit_field.register.array_size
93
+ end
94
+
95
+ def match_sequence_size?
96
+ !(bit_field.sequential? && reference_bit_field.sequential?) ||
97
+ bit_field.sequence_size == reference_bit_field.sequence_size
98
+ end
99
+ end
100
+ end
@@ -0,0 +1,87 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_simple_feature(:bit_field, :sv_rtl_top) do
4
+ sv_rtl do
5
+ export :local_index
6
+ export :loop_variables
7
+ export :array_size
8
+ export :value
9
+
10
+ build do
11
+ interface :bit_field, :bit_field_sub_if, {
12
+ name: 'bit_field_sub_if',
13
+ interface_type: 'rggen_bit_field_if',
14
+ parameter_values: [bit_field.width]
15
+ }
16
+ end
17
+
18
+ main_code :register do
19
+ local_scope("g_#{bit_field.name}") do |scope|
20
+ scope.loop_size loop_size
21
+ scope.variables variables
22
+ scope.body(&method(:body_code))
23
+ end
24
+ end
25
+
26
+ pre_code :bit_field do |code|
27
+ code << bit_field_if_connection << nl
28
+ end
29
+
30
+ def local_index
31
+ (bit_field.sequential? || nil) &&
32
+ create_identifier(index_name)
33
+ end
34
+
35
+ def index_name
36
+ depth = (register.loop_variables&.size || 0) + 1
37
+ loop_index(depth)
38
+ end
39
+
40
+ def loop_variables
41
+ (inside_loop? || nil) &&
42
+ [*register.loop_variables, local_index].compact
43
+ end
44
+
45
+ def array_size
46
+ (inside_loop? || nil) &&
47
+ [*register.array_size, bit_field.sequence_size].compact
48
+ end
49
+
50
+ def value(register_offset = nil, bit_field_offset = nil)
51
+ register_block
52
+ .register_if[register.index(register_offset)]
53
+ .value[bit_field.lsb(bit_field_offset || local_index), bit_field.width]
54
+ end
55
+
56
+ private
57
+
58
+ def inside_loop?
59
+ register.array? || bit_field.sequential?
60
+ end
61
+
62
+ def loop_size
63
+ (bit_field.sequential? || nil) &&
64
+ { index_name => bit_field.sequence_size }
65
+ end
66
+
67
+ def variables
68
+ bit_field.declarations(:bit_field, :variable)
69
+ end
70
+
71
+ def body_code(code)
72
+ bit_field.generate_code(:bit_field, :top_down, code)
73
+ end
74
+
75
+ def bit_field_if_connection
76
+ macro_call(
77
+ :rggen_connect_bit_field_if,
78
+ [
79
+ register.bit_field_if,
80
+ bit_field.bit_field_sub_if,
81
+ bit_field.lsb(local_index),
82
+ bit_field.width
83
+ ]
84
+ )
85
+ end
86
+ end
87
+ end
@@ -0,0 +1,279 @@
1
+ # frozen_string_literal: true
2
+
3
+ RgGen.define_list_feature(:bit_field, :type) do
4
+ register_map do
5
+ base_feature do
6
+ define_helpers do
7
+ def read_write
8
+ @readable = true
9
+ @writable = true
10
+ end
11
+
12
+ def read_only
13
+ @readable = true
14
+ @writable = false
15
+ end
16
+
17
+ def write_only
18
+ @readable = false
19
+ @writable = true
20
+ end
21
+
22
+ def reserved
23
+ @readable = false
24
+ @writable = false
25
+ end
26
+
27
+ def readable?
28
+ @readable.nil? || @readable
29
+ end
30
+
31
+ def writable?
32
+ @writable.nil? || @writable
33
+ end
34
+
35
+ def volatile
36
+ @volatile = true
37
+ end
38
+
39
+ def non_volatile
40
+ @volatile = false
41
+ end
42
+
43
+ def volatile?
44
+ @volatile.nil? || @volatile
45
+ end
46
+
47
+ def need_initial_value(**options)
48
+ @initial_value_options = options.merge(needed: true)
49
+ end
50
+
51
+ attr_reader :initial_value_options
52
+
53
+ def use_reference(**options)
54
+ @reference_options = options.merge(usable: true)
55
+ end
56
+
57
+ attr_reader :reference_options
58
+ end
59
+
60
+ property :type
61
+ property :readable?, forward_to_helper: true
62
+ property :writable?, forward_to_helper: true
63
+ property :read_only?, body: -> { readable? && !writable? }
64
+ property :write_only?, body: -> { writable? && !readable? }
65
+ property :reserved?, body: -> { !(readable? || writable?) }
66
+ property :volatile?, forward_to_helper: true
67
+
68
+ build { |value| @type = value }
69
+
70
+ verify(:component) do
71
+ error_condition { no_initial_value_given? }
72
+ message { 'no initial value is given' }
73
+ end
74
+
75
+ verify(:component) do
76
+ error_condition do
77
+ bit_field.initial_value? && not_match_initial_value?
78
+ end
79
+ message do
80
+ "value 0x#{required_initial_value.to_s(16)} is only allowed for " \
81
+ "initial value: 0x#{bit_field.initial_value.to_s(16)}"
82
+ end
83
+ end
84
+
85
+ verify(:component) do
86
+ error_condition { no_reference_bit_field_given? }
87
+ message { 'no reference bit field is given' }
88
+ end
89
+
90
+ verify(:all) do
91
+ error_condition { invalid_reference_width? }
92
+ message do
93
+ "#{reference_width} bit(s) reference bit field is required: " \
94
+ "#{bit_field.reference.full_name} " \
95
+ "#{bit_field.reference.width} bit(s)"
96
+ end
97
+ end
98
+
99
+ private
100
+
101
+ def no_initial_value_given?
102
+ helper.initial_value_options&.key?(:needed) &&
103
+ !bit_field.initial_value?
104
+ end
105
+
106
+ def not_match_initial_value?
107
+ helper.initial_value_options&.key?(:value) &&
108
+ bit_field.initial_value != required_initial_value
109
+ end
110
+
111
+ def required_initial_value
112
+ value = helper.initial_value_options[:value]
113
+ if value.is_a?(Proc)
114
+ instance_exec(&value)
115
+ else
116
+ value
117
+ end
118
+ end
119
+
120
+ def no_reference_bit_field_given?
121
+ use_reference? &&
122
+ helper.reference_options[:required] &&
123
+ !bit_field.reference?
124
+ end
125
+
126
+ def invalid_reference_width?
127
+ use_reference? &&
128
+ bit_field.reference? &&
129
+ bit_field.reference.width != reference_width
130
+ end
131
+
132
+ def use_reference?
133
+ helper.reference_options&.key?(:usable)
134
+ end
135
+
136
+ def reference_width
137
+ helper.reference_options[:width] || bit_field.width
138
+ end
139
+ end
140
+
141
+ default_feature do
142
+ verify(:feature) do
143
+ error_condition { !type }
144
+ message { 'no bit field type is given' }
145
+ end
146
+
147
+ verify(:feature) do
148
+ error_condition { type }
149
+ message { "unknown bit field type: #{type.inspect}" }
150
+ end
151
+ end
152
+
153
+ factory do
154
+ convert_value do |value|
155
+ types = target_features.keys
156
+ types.find(&value.to_sym.method(:casecmp?)) || value
157
+ end
158
+
159
+ def select_feature(cell)
160
+ target_features[cell.value]
161
+ end
162
+ end
163
+ end
164
+
165
+ sv_rtl do
166
+ base_feature do
167
+ private
168
+
169
+ def array_port_format
170
+ configuration.array_port_format
171
+ end
172
+
173
+ def full_name
174
+ bit_field.full_name('_')
175
+ end
176
+
177
+ def initial_value
178
+ hex(bit_field.initial_value, bit_field.width)
179
+ end
180
+
181
+ def mask
182
+ reference_bit_field ||
183
+ hex(2**bit_field.width - 1, bit_field.width)
184
+ end
185
+
186
+ def reference_bit_field
187
+ bit_field
188
+ .find_reference(register_block.bit_fields)
189
+ &.value(register.local_index, bit_field.local_index)
190
+ end
191
+ end
192
+
193
+ factory do
194
+ def select_feature(_configuration, bit_field)
195
+ target_features[bit_field.type]
196
+ end
197
+ end
198
+ end
199
+
200
+ sv_ral do
201
+ base_feature do
202
+ define_helpers do
203
+ attr_setter :access
204
+
205
+ def model_name(name = nil, &block)
206
+ @model_name = name || block || @model_name
207
+ @model_name
208
+ end
209
+ end
210
+
211
+ export :access
212
+ export :model_name
213
+ export :constructors
214
+
215
+ build do
216
+ variable :register, :ral_model, {
217
+ name: bit_field.name,
218
+ data_type: model_name,
219
+ array_size: array_size,
220
+ random: true
221
+ }
222
+ end
223
+
224
+ def access
225
+ (helper.access || bit_field.type).to_s.upcase
226
+ end
227
+
228
+ def model_name
229
+ if helper.model_name&.is_a?(Proc)
230
+ instance_eval(&helper.model_name)
231
+ else
232
+ helper.model_name || :rggen_ral_field
233
+ end
234
+ end
235
+
236
+ def constructors
237
+ (bit_field.sequence_size&.times || [nil]).map do |index|
238
+ macro_call(
239
+ :rggen_ral_create_field_model, arguments(index)
240
+ )
241
+ end
242
+ end
243
+
244
+ private
245
+
246
+ def array_size
247
+ Array(bit_field.sequence_size)
248
+ end
249
+
250
+ def arguments(index)
251
+ [
252
+ ral_model[index], bit_field.lsb(index), bit_field.width,
253
+ access, volatile, reset_value, valid_reset
254
+ ]
255
+ end
256
+
257
+ def volatile
258
+ bit_field.volatile? && 1 || 0
259
+ end
260
+
261
+ def reset_value
262
+ hex(bit_field.initial_value, bit_field.width)
263
+ end
264
+
265
+ def valid_reset
266
+ bit_field.initial_value? && 1 || 0
267
+ end
268
+ end
269
+
270
+ default_feature do
271
+ end
272
+
273
+ factory do
274
+ def select_feature(_configuration, bit_field)
275
+ target_features[bit_field.type]
276
+ end
277
+ end
278
+ end
279
+ end