rggen 0.8.2 → 0.9.0

Sign up to get free protection for your applications and to get access to all the features.
Files changed (269) hide show
  1. checksums.yaml +4 -4
  2. data/CODE_OF_CONDUCT.md +54 -29
  3. data/{LICENSE.txt → LICENSE} +1 -1
  4. data/README.md +65 -56
  5. data/lib/rggen.rb +4 -63
  6. data/lib/rggen/built_in.rb +53 -0
  7. data/lib/rggen/built_in/bit_field/bit_assignment.rb +108 -0
  8. data/lib/rggen/built_in/bit_field/comment.rb +16 -0
  9. data/lib/rggen/built_in/bit_field/initial_value.rb +45 -0
  10. data/lib/rggen/built_in/bit_field/name.rb +39 -0
  11. data/lib/rggen/built_in/bit_field/reference.rb +100 -0
  12. data/lib/rggen/built_in/bit_field/sv_rtl_top.rb +87 -0
  13. data/lib/rggen/built_in/bit_field/type.rb +279 -0
  14. data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.erb +15 -0
  15. data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.rb +68 -0
  16. data/lib/rggen/built_in/bit_field/type/reserved.erb +3 -0
  17. data/lib/rggen/built_in/bit_field/type/reserved.rb +16 -0
  18. data/lib/rggen/built_in/bit_field/type/ro.erb +6 -0
  19. data/lib/rggen/built_in/bit_field/type/ro.rb +34 -0
  20. data/lib/rggen/built_in/bit_field/type/rof.erb +6 -0
  21. data/lib/rggen/built_in/bit_field/type/rof.rb +17 -0
  22. data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.erb +13 -0
  23. data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.rb +52 -0
  24. data/lib/rggen/built_in/bit_field/type/rw_wo.erb +9 -0
  25. data/lib/rggen/built_in/bit_field/type/rw_wo.rb +33 -0
  26. data/lib/rggen/built_in/bit_field/type/rwe_rwl.erb +14 -0
  27. data/lib/rggen/built_in/bit_field/type/rwe_rwl.rb +39 -0
  28. data/lib/rggen/built_in/global/address_width.rb +32 -0
  29. data/lib/rggen/built_in/global/array_port_format.rb +19 -0
  30. data/lib/rggen/built_in/global/bus_width.rb +33 -0
  31. data/lib/rggen/built_in/global/fold_sv_interface_port.rb +24 -0
  32. data/lib/rggen/built_in/register/name.rb +34 -0
  33. data/lib/rggen/built_in/register/offset_address.rb +96 -0
  34. data/lib/rggen/built_in/register/size.rb +49 -0
  35. data/lib/rggen/built_in/register/sv_rtl_top.rb +82 -0
  36. data/lib/rggen/built_in/register/type.rb +374 -0
  37. data/lib/rggen/built_in/register/type/default_sv_ral.erb +8 -0
  38. data/lib/rggen/built_in/register/type/default_sv_rtl.erb +15 -0
  39. data/lib/rggen/built_in/register/type/external.erb +11 -0
  40. data/lib/rggen/built_in/register/type/external.rb +141 -0
  41. data/lib/rggen/built_in/register/type/indirect.rb +329 -0
  42. data/lib/rggen/built_in/register/type/indirect_sv_ral.erb +13 -0
  43. data/lib/rggen/built_in/register/type/indirect_sv_rtl.erb +17 -0
  44. data/lib/rggen/built_in/register_block/byte_size.rb +59 -0
  45. data/lib/rggen/built_in/register_block/name.rb +36 -0
  46. data/lib/rggen/built_in/register_block/protocol.rb +71 -0
  47. data/lib/rggen/built_in/register_block/protocol/apb.erb +10 -0
  48. data/lib/rggen/built_in/register_block/protocol/apb.rb +113 -0
  49. data/lib/rggen/built_in/register_block/protocol/axi4lite.erb +11 -0
  50. data/lib/rggen/built_in/register_block/protocol/axi4lite.rb +167 -0
  51. data/lib/rggen/built_in/register_block/sv_ral_block_model.erb +11 -0
  52. data/lib/rggen/built_in/register_block/sv_ral_package.rb +58 -0
  53. data/lib/rggen/built_in/register_block/sv_rtl_macros.erb +9 -0
  54. data/lib/rggen/built_in/register_block/sv_rtl_top.rb +87 -0
  55. data/lib/rggen/built_in/version.rb +7 -0
  56. data/lib/rggen/default_setup_file.rb +6 -0
  57. data/lib/rggen/setup/default.rb +26 -0
  58. data/lib/rggen/version.rb +5 -4
  59. data/sample/block_0.rb +85 -0
  60. data/sample/block_0.sv +601 -0
  61. data/sample/block_0.xlsx +0 -0
  62. data/sample/block_0.yml +94 -0
  63. data/sample/block_0_ral_pkg.sv +174 -0
  64. data/sample/block_1.rb +22 -0
  65. data/sample/block_1.sv +136 -0
  66. data/sample/block_1.xlsx +0 -0
  67. data/sample/block_1.yml +26 -0
  68. data/sample/block_1_ral_pkg.sv +68 -0
  69. data/sample/config.json +5 -0
  70. data/sample/config.yml +3 -0
  71. metadata +96 -270
  72. data/bin/rggen +0 -6
  73. data/c_header/LICENSE +0 -21
  74. data/c_header/rggen.h +0 -17
  75. data/lib/rggen/base/component.rb +0 -31
  76. data/lib/rggen/base/component_factory.rb +0 -53
  77. data/lib/rggen/base/hierarchical_accessors.rb +0 -87
  78. data/lib/rggen/base/hierarchical_item_accessors.rb +0 -79
  79. data/lib/rggen/base/internal_struct.rb +0 -28
  80. data/lib/rggen/base/item.rb +0 -35
  81. data/lib/rggen/base/item_factory.rb +0 -25
  82. data/lib/rggen/builder/builder.rb +0 -69
  83. data/lib/rggen/builder/category.rb +0 -63
  84. data/lib/rggen/builder/component_entry.rb +0 -50
  85. data/lib/rggen/builder/component_store.rb +0 -42
  86. data/lib/rggen/builder/input_component_store.rb +0 -25
  87. data/lib/rggen/builder/item_store.rb +0 -89
  88. data/lib/rggen/builder/list_item_entry.rb +0 -81
  89. data/lib/rggen/builder/output_component_store.rb +0 -13
  90. data/lib/rggen/builder/simple_item_entry.rb +0 -33
  91. data/lib/rggen/builtins.rb +0 -55
  92. data/lib/rggen/builtins/bit_field/bit_assignment.rb +0 -39
  93. data/lib/rggen/builtins/bit_field/field_model.rb +0 -38
  94. data/lib/rggen/builtins/bit_field/initial_value.rb +0 -36
  95. data/lib/rggen/builtins/bit_field/name.rb +0 -26
  96. data/lib/rggen/builtins/bit_field/reference.rb +0 -40
  97. data/lib/rggen/builtins/bit_field/rtl_top.rb +0 -11
  98. data/lib/rggen/builtins/bit_field/type.rb +0 -244
  99. data/lib/rggen/builtins/bit_field/types/reserved.erb +0 -6
  100. data/lib/rggen/builtins/bit_field/types/reserved.rb +0 -18
  101. data/lib/rggen/builtins/bit_field/types/ro.erb +0 -6
  102. data/lib/rggen/builtins/bit_field/types/ro.rb +0 -22
  103. data/lib/rggen/builtins/bit_field/types/rw.erb +0 -9
  104. data/lib/rggen/builtins/bit_field/types/rw.rb +0 -23
  105. data/lib/rggen/builtins/bit_field/types/rwl_rwe.erb +0 -11
  106. data/lib/rggen/builtins/bit_field/types/rwl_rwe.rb +0 -54
  107. data/lib/rggen/builtins/bit_field/types/w0c_w1c.erb +0 -12
  108. data/lib/rggen/builtins/bit_field/types/w0c_w1c.rb +0 -33
  109. data/lib/rggen/builtins/bit_field/types/w0s_w1s.erb +0 -12
  110. data/lib/rggen/builtins/bit_field/types/w0s_w1s.rb +0 -33
  111. data/lib/rggen/builtins/bit_field/types/wo.rb +0 -5
  112. data/lib/rggen/builtins/global/address_width.rb +0 -17
  113. data/lib/rggen/builtins/global/array_port_format.rb +0 -15
  114. data/lib/rggen/builtins/global/data_width.rb +0 -20
  115. data/lib/rggen/builtins/global/unfold_sv_interface_port.rb +0 -22
  116. data/lib/rggen/builtins/loaders/configuration/json_loader.rb +0 -7
  117. data/lib/rggen/builtins/loaders/configuration/yaml_loader.rb +0 -7
  118. data/lib/rggen/builtins/loaders/register_map/csv_loader.rb +0 -12
  119. data/lib/rggen/builtins/loaders/register_map/xls_loader.rb +0 -17
  120. data/lib/rggen/builtins/loaders/register_map/xlsx_ods_loader.rb +0 -21
  121. data/lib/rggen/builtins/register/array.rb +0 -30
  122. data/lib/rggen/builtins/register/constructor.rb +0 -17
  123. data/lib/rggen/builtins/register/field_model_creator.rb +0 -14
  124. data/lib/rggen/builtins/register/indirect_index_configurator.rb +0 -54
  125. data/lib/rggen/builtins/register/name.rb +0 -26
  126. data/lib/rggen/builtins/register/offset_address.rb +0 -61
  127. data/lib/rggen/builtins/register/reg_model.rb +0 -107
  128. data/lib/rggen/builtins/register/rtl_top.rb +0 -68
  129. data/lib/rggen/builtins/register/sub_block_model.rb +0 -34
  130. data/lib/rggen/builtins/register/type.rb +0 -283
  131. data/lib/rggen/builtins/register/types/default.erb +0 -10
  132. data/lib/rggen/builtins/register/types/external.erb +0 -11
  133. data/lib/rggen/builtins/register/types/external.rb +0 -77
  134. data/lib/rggen/builtins/register/types/indirect.erb +0 -13
  135. data/lib/rggen/builtins/register/types/indirect.rb +0 -175
  136. data/lib/rggen/builtins/register/uniqueness_validator.rb +0 -51
  137. data/lib/rggen/builtins/register_block/address_struct.rb +0 -56
  138. data/lib/rggen/builtins/register_block/base_address.rb +0 -64
  139. data/lib/rggen/builtins/register_block/block_model.rb +0 -20
  140. data/lib/rggen/builtins/register_block/byte_size.rb +0 -37
  141. data/lib/rggen/builtins/register_block/c_header_file.rb +0 -15
  142. data/lib/rggen/builtins/register_block/clock_reset.rb +0 -8
  143. data/lib/rggen/builtins/register_block/constructor.rb +0 -14
  144. data/lib/rggen/builtins/register_block/default_map_creator.rb +0 -39
  145. data/lib/rggen/builtins/register_block/host_if.rb +0 -64
  146. data/lib/rggen/builtins/register_block/host_ifs/apb.erb +0 -10
  147. data/lib/rggen/builtins/register_block/host_ifs/apb.rb +0 -64
  148. data/lib/rggen/builtins/register_block/host_ifs/axi4lite.erb +0 -11
  149. data/lib/rggen/builtins/register_block/host_ifs/axi4lite.rb +0 -93
  150. data/lib/rggen/builtins/register_block/name.rb +0 -26
  151. data/lib/rggen/builtins/register_block/ral_package.rb +0 -24
  152. data/lib/rggen/builtins/register_block/rtl_top.rb +0 -38
  153. data/lib/rggen/builtins/register_block/sub_model_creator.rb +0 -14
  154. data/lib/rggen/commands.rb +0 -23
  155. data/lib/rggen/core_components.rb +0 -54
  156. data/lib/rggen/core_components/c_header/item.rb +0 -8
  157. data/lib/rggen/core_components/c_header/setup.rb +0 -19
  158. data/lib/rggen/core_components/c_utility.rb +0 -19
  159. data/lib/rggen/core_components/c_utility/data_structure_definition.rb +0 -60
  160. data/lib/rggen/core_components/c_utility/source_file.rb +0 -10
  161. data/lib/rggen/core_components/c_utility/variable_declaration.rb +0 -35
  162. data/lib/rggen/core_components/code_utility.rb +0 -56
  163. data/lib/rggen/core_components/code_utility/code_block.rb +0 -72
  164. data/lib/rggen/core_components/code_utility/line.rb +0 -28
  165. data/lib/rggen/core_components/code_utility/source_file.rb +0 -97
  166. data/lib/rggen/core_components/configuration/configuration_factory.rb +0 -23
  167. data/lib/rggen/core_components/configuration/item.rb +0 -11
  168. data/lib/rggen/core_components/configuration/item_factory.rb +0 -20
  169. data/lib/rggen/core_components/configuration/raise_error.rb +0 -11
  170. data/lib/rggen/core_components/configuration/setup.rb +0 -14
  171. data/lib/rggen/core_components/erb_engine.rb +0 -15
  172. data/lib/rggen/core_components/ral/component.rb +0 -24
  173. data/lib/rggen/core_components/ral/item.rb +0 -59
  174. data/lib/rggen/core_components/ral/setup.rb +0 -19
  175. data/lib/rggen/core_components/register_map/bit_field_factory.rb +0 -11
  176. data/lib/rggen/core_components/register_map/component.rb +0 -15
  177. data/lib/rggen/core_components/register_map/component_factory.rb +0 -9
  178. data/lib/rggen/core_components/register_map/generic_map.rb +0 -80
  179. data/lib/rggen/core_components/register_map/item.rb +0 -26
  180. data/lib/rggen/core_components/register_map/item_factory.rb +0 -26
  181. data/lib/rggen/core_components/register_map/loader.rb +0 -11
  182. data/lib/rggen/core_components/register_map/raise_error.rb +0 -17
  183. data/lib/rggen/core_components/register_map/register_block_factory.rb +0 -29
  184. data/lib/rggen/core_components/register_map/register_factory.rb +0 -18
  185. data/lib/rggen/core_components/register_map/register_map_factory.rb +0 -18
  186. data/lib/rggen/core_components/register_map/setup.rb +0 -33
  187. data/lib/rggen/core_components/rtl/component.rb +0 -24
  188. data/lib/rggen/core_components/rtl/item.rb +0 -82
  189. data/lib/rggen/core_components/rtl/setup.rb +0 -19
  190. data/lib/rggen/core_components/verilog_utility.rb +0 -88
  191. data/lib/rggen/core_components/verilog_utility/class_definition.rb +0 -56
  192. data/lib/rggen/core_components/verilog_utility/identifier.rb +0 -78
  193. data/lib/rggen/core_components/verilog_utility/interface_instance.rb +0 -37
  194. data/lib/rggen/core_components/verilog_utility/interface_port.rb +0 -33
  195. data/lib/rggen/core_components/verilog_utility/local_scope.rb +0 -75
  196. data/lib/rggen/core_components/verilog_utility/module_definition.rb +0 -82
  197. data/lib/rggen/core_components/verilog_utility/package_definition.rb +0 -57
  198. data/lib/rggen/core_components/verilog_utility/source_file.rb +0 -10
  199. data/lib/rggen/core_components/verilog_utility/structure_definition.rb +0 -51
  200. data/lib/rggen/core_components/verilog_utility/subroutine_definition.rb +0 -41
  201. data/lib/rggen/core_components/verilog_utility/variable.rb +0 -115
  202. data/lib/rggen/core_extensions/array.rb +0 -9
  203. data/lib/rggen/core_extensions/facets.rb +0 -22
  204. data/lib/rggen/core_extensions/forwardable.rb +0 -49
  205. data/lib/rggen/core_extensions/integer.rb +0 -5
  206. data/lib/rggen/core_extensions/math.rb +0 -7
  207. data/lib/rggen/core_extensions/roo.rb +0 -17
  208. data/lib/rggen/exceptions.rb +0 -28
  209. data/lib/rggen/generator.rb +0 -67
  210. data/lib/rggen/input_base/component.rb +0 -28
  211. data/lib/rggen/input_base/component_factory.rb +0 -58
  212. data/lib/rggen/input_base/item.rb +0 -171
  213. data/lib/rggen/input_base/item_factory.rb +0 -13
  214. data/lib/rggen/input_base/loader.rb +0 -23
  215. data/lib/rggen/input_base/regexp_patterns.rb +0 -29
  216. data/lib/rggen/option_switches.rb +0 -60
  217. data/lib/rggen/options.rb +0 -97
  218. data/lib/rggen/output_base/code_generator.rb +0 -36
  219. data/lib/rggen/output_base/component.rb +0 -78
  220. data/lib/rggen/output_base/component_factory.rb +0 -32
  221. data/lib/rggen/output_base/file_writer.rb +0 -36
  222. data/lib/rggen/output_base/item.rb +0 -110
  223. data/lib/rggen/output_base/item_factory.rb +0 -9
  224. data/lib/rggen/output_base/template_engine.rb +0 -24
  225. data/lib/rggen/rggen_home.rb +0 -3
  226. data/ral/LICENSE +0 -21
  227. data/ral/compile.f +0 -2
  228. data/ral/rggen_ral_block.svh +0 -83
  229. data/ral/rggen_ral_field.svh +0 -47
  230. data/ral/rggen_ral_field_rwl_rwe.svh +0 -158
  231. data/ral/rggen_ral_indirect_reg.svh +0 -193
  232. data/ral/rggen_ral_macros.svh +0 -27
  233. data/ral/rggen_ral_map.svh +0 -124
  234. data/ral/rggen_ral_pkg.sv +0 -15
  235. data/ral/rggen_ral_reg.svh +0 -88
  236. data/rtl/LICENSE +0 -21
  237. data/rtl/compile.f +0 -18
  238. data/rtl/rggen_address_decoder.sv +0 -23
  239. data/rtl/rggen_apb_if.sv +0 -41
  240. data/rtl/rggen_axi4lite_if.sv +0 -68
  241. data/rtl/rggen_bit_field_if.sv +0 -28
  242. data/rtl/rggen_bit_field_ro.sv +0 -9
  243. data/rtl/rggen_bit_field_rw.sv +0 -25
  244. data/rtl/rggen_bit_field_rwl_rwe.sv +0 -29
  245. data/rtl/rggen_bit_field_w01s_w01c.sv +0 -55
  246. data/rtl/rggen_bus_if.sv +0 -43
  247. data/rtl/rggen_bus_splitter.sv +0 -86
  248. data/rtl/rggen_default_register.sv +0 -15
  249. data/rtl/rggen_external_register.sv +0 -83
  250. data/rtl/rggen_host_if_apb.sv +0 -29
  251. data/rtl/rggen_host_if_axi4lite.sv +0 -161
  252. data/rtl/rggen_indirect_register.sv +0 -21
  253. data/rtl/rggen_register_base.sv +0 -57
  254. data/rtl/rggen_register_if.sv +0 -42
  255. data/rtl/rggen_rtl_pkg.sv +0 -23
  256. data/sample/LICENSE +0 -21
  257. data/sample/sample.csv +0 -21
  258. data/sample/sample.json +0 -6
  259. data/sample/sample.xls +0 -0
  260. data/sample/sample.xlsx +0 -0
  261. data/sample/sample.yaml +0 -4
  262. data/sample/sample_0.h +0 -17
  263. data/sample/sample_0.sv +0 -402
  264. data/sample/sample_0_ral_pkg.sv +0 -145
  265. data/sample/sample_1.h +0 -9
  266. data/sample/sample_1.sv +0 -128
  267. data/sample/sample_1_ral_pkg.sv +0 -56
  268. data/sample/sample_setup.rb +0 -24
  269. data/setup/default.rb +0 -14
@@ -1,17 +0,0 @@
1
- simple_item :register, :constructor do
2
- ral do
3
- generate_code :reg_model_item do
4
- function_definition :new do |f|
5
- f.arguments [
6
- argument(:name, data_type: :string, default: string(register.name))
7
- ]
8
- f.body { "super.new(name, #{bits}, 0);" }
9
- end
10
- end
11
-
12
- def bits
13
- max_msb = register.bit_fields.map(&:msb).max
14
- ((max_msb + 8) / 8) * 8
15
- end
16
- end
17
- end
@@ -1,14 +0,0 @@
1
- simple_item :register, :field_model_creator do
2
- ral do
3
- generate_code :reg_model_item do
4
- function_definition :create_fields do |f|
5
- f.return_type :void
6
- f.body { |code| body_code(code) }
7
- end
8
- end
9
-
10
- def body_code(code)
11
- register.bit_fields.each { |b| b.model_creation(code) }
12
- end
13
- end
14
- end
@@ -1,54 +0,0 @@
1
- simple_item :register, :indirect_index_configurator do
2
- ral do
3
- available? { register.type?(:indirect) }
4
-
5
- generate_code :reg_model_item do
6
- function_definition :configure_indirect_indexes do |f|
7
- f.return_type :void
8
- f.body { |code| function_body(code) }
9
- end
10
- end
11
-
12
- def function_body(code)
13
- register.indexes.each do |index|
14
- code << subroutine_call(:set_indirect_index, arguments(index))
15
- code << semicolon
16
- code << nl
17
- end
18
- end
19
-
20
- def arguments(indirect_index)
21
- [
22
- parent_name(indirect_index),
23
- index_name(indirect_index),
24
- index_value(indirect_index)
25
- ]
26
- end
27
-
28
- def parent_name(indirect_index)
29
- parent_register = fild_parent_register(indirect_index.name)
30
- string(parent_register.name)
31
- end
32
-
33
- def fild_parent_register(index_name)
34
- register_block.bit_fields.find_by(name: index_name).register
35
- end
36
-
37
- def index_name(indirect_index)
38
- string(indirect_index.name)
39
- end
40
-
41
- def index_value(indirect_index)
42
- if indirect_index.value
43
- indirect_index.value
44
- else
45
- "indexes[#{array_index}]"
46
- end
47
- end
48
-
49
- def array_index
50
- @array_index ||= -1
51
- @array_index += 1
52
- end
53
- end
54
- end
@@ -1,26 +0,0 @@
1
- simple_item :register, :name do
2
- register_map do
3
- field :name
4
-
5
- input_pattern %r{(#{variable_name})}
6
-
7
- build do |cell|
8
- @name = parse_name(cell)
9
- error "repeated register name: #{@name}" if repeated_name?
10
- end
11
-
12
- def parse_name(cell)
13
- if pattern_matched?
14
- captures.first
15
- else
16
- error "invalid value for register name: #{cell.inspect}"
17
- end
18
- end
19
-
20
- def repeated_name?
21
- register_block.registers.any? do |register|
22
- @name == register.name
23
- end
24
- end
25
- end
26
- end
@@ -1,61 +0,0 @@
1
- simple_item :register, :offset_address do
2
- register_map do
3
- field :start_address
4
- field :end_address
5
- field :byte_size do
6
- end_address - start_address + 1
7
- end
8
- field :single? do
9
- byte_size == configuration.byte_width
10
- end
11
- field :multiple? do
12
- byte_size > configuration.byte_width
13
- end
14
-
15
- input_pattern %r{(#{number})(?:-(#{number}))?}
16
-
17
- build do |cell|
18
- @start_address, @end_address = parse_address(cell)
19
- check_start_end_adderss_relation(cell)
20
- check_address_align(cell)
21
- check_address_range(cell)
22
- end
23
-
24
- def parse_address(cell)
25
- if pattern_matched?
26
- addresses = captures.compact.map(&method(:Integer))
27
- if addresses.size == 2
28
- addresses
29
- else
30
- [addresses[0], addresses[0] + configuration.byte_width - 1]
31
- end
32
- else
33
- error "invalid value for offset address: #{cell.inspect}"
34
- end
35
- end
36
-
37
- def check_start_end_adderss_relation(cell)
38
- return if start_address < end_address
39
- return if [configuration.byte_width, byte_size].all? { |v| v == 1 }
40
- error "start address is equal to or greater than end address: #{cell}"
41
- end
42
-
43
- def check_address_align(cell)
44
- return if [start_address, end_address + 1].all? do |a|
45
- a.multiple?(configuration.byte_width)
46
- end
47
- error 'not aligned with data width' \
48
- "(#{configuration.data_width}): #{cell}"
49
- end
50
-
51
- def check_address_range(cell)
52
- return if end_address <= max_address
53
- error 'exceeds the maximum offset address' \
54
- "(0x#{max_address.to_s(16)}): #{cell}"
55
- end
56
-
57
- def max_address
58
- register_block.byte_size - 1
59
- end
60
- end
61
- end
@@ -1,107 +0,0 @@
1
- simple_item :register, :reg_model do
2
- ral do
3
- export :model_creation
4
-
5
- delegate [:byte_width] => :configuration
6
- delegate [:local_address_width] => :register_block
7
- delegate [:name, :dimensions, :array?, :type?] => :register
8
-
9
- available? { !type?(:external) }
10
-
11
- build do
12
- variable :block_model, :reg_model,
13
- data_type: model_name,
14
- name: name,
15
- dimensions: dimensions,
16
- random: true
17
- end
18
-
19
- generate_code :package_item do
20
- class_definition model_name do |c|
21
- c.base base_model
22
- c.variables register.variable_declarations(:reg_model)
23
- c.body { |code| body_code(code) }
24
- end
25
- end
26
-
27
- def model_creation(code)
28
- foreach_header(code) if array?
29
- code << subroutine_call('`rggen_ral_create_reg_model', arguments) << nl
30
- foreach_footer(code) if array?
31
- end
32
-
33
- def foreach_header(code)
34
- code << "foreach (#{name}[#{loop_varibles.join(', ')}]) begin" << nl
35
- code.indent += 2
36
- end
37
-
38
- def foreach_footer(code)
39
- code.indent -= 2
40
- code << :end << nl
41
- end
42
-
43
- def arguments
44
- [handle, instance_name, array_index, offset_address, rights, unmapped, hdl_path]
45
- end
46
-
47
- def handle
48
- create_identifier(name)[loop_varibles]
49
- end
50
-
51
- def instance_name
52
- return string(name) unless array?
53
- subroutine_call '$sformatf', [
54
- string(name + '[%0d]' * loop_varibles.size),
55
- *loop_varibles
56
- ]
57
- end
58
-
59
- def array_index
60
- array((array? && loop_varibles) || [])
61
- end
62
-
63
- def offset_address
64
- base = hex(register.start_address, local_address_width)
65
- if !array? || type?(:indirect)
66
- base
67
- else
68
- "#{base} + #{byte_width} * #{loop_varibles.first}"
69
- end
70
- end
71
-
72
- def rights
73
- return string(:RO) if register.read_only?
74
- return string(:WO) if register.write_only?
75
- string(:RW)
76
- end
77
-
78
- def unmapped
79
- (type?(:indirect) && 1) || 0
80
- end
81
-
82
- def hdl_path
83
- return string("g_#{name}") unless array?
84
- subroutine_call '$sformatf', [
85
- string("g_#{name}" + '.g[%0d]' * loop_varibles.size),
86
- *loop_varibles
87
- ]
88
- end
89
-
90
- def loop_varibles
91
- return nil unless array?
92
- @loop_varibles ||= Array.new(dimensions.size, &method(:loop_index))
93
- end
94
-
95
- def model_name
96
- "#{name}_reg_model"
97
- end
98
-
99
- def base_model
100
- (type?(:indirect) && :rggen_ral_indirect_reg) || :rggen_ral_reg
101
- end
102
-
103
- def body_code(code)
104
- register.generate_code(:reg_model_item, :top_down, code)
105
- end
106
- end
107
- end
@@ -1,68 +0,0 @@
1
- simple_item :register, :rtl_top do
2
- rtl do
3
- export :index
4
- export :local_index
5
- export :loop_variables
6
- export :loop_variable
7
-
8
- delegate [:array?, :dimensions] => :register
9
-
10
- generate_code :register_block do
11
- local_scope "g_#{register.name}" do |s|
12
- s.signals register.signal_declarations(:register)
13
- s.loops loops
14
- s.body { |c| register.generate_code(:register, :top_down, c) }
15
- end
16
- end
17
-
18
- def index
19
- return base_index unless array?
20
- "#{base_index}+#{local_index}"
21
- end
22
-
23
- def local_index
24
- return nil unless array?
25
- local_index_terms(0).join('+')
26
- end
27
-
28
- def loop_variables
29
- return nil unless array?
30
- Array.new(dimensions.size, &method(:loop_variable))
31
- end
32
-
33
- def loop_variable(level)
34
- return nil unless array?
35
- return nil if level >= dimensions.size
36
- @loop_variables ||= Hash.new do |h, l|
37
- h[l] = create_identifier("g_#{loop_index(l)}")
38
- end
39
- @loop_variables[level]
40
- end
41
-
42
- private
43
-
44
- def base_index
45
- former_registers.sum(0, &:count)
46
- end
47
-
48
- def former_registers
49
- register_block.registers.take_while { |r| !register.equal?(r) }
50
- end
51
-
52
- def local_index_terms(level)
53
- if level < (dimensions.size - 1)
54
- partial_count = dimensions[(level + 1)..-1].inject(&:*)
55
- local_index_terms(level + 1).unshift(
56
- [partial_count, :'*', loop_variable(level)].join
57
- )
58
- else
59
- [loop_variable(level)]
60
- end
61
- end
62
-
63
- def loops
64
- return nil unless array?
65
- Hash[*loop_variables.zip(dimensions).flatten]
66
- end
67
- end
68
- end
@@ -1,34 +0,0 @@
1
- simple_item :register, :sub_block_model do
2
- ral do
3
- export :model_creation
4
-
5
- available? { register.type?(:external) }
6
-
7
- build do
8
- parameter :block_model, :model_type,
9
- data_type: :type,
10
- name: type_name,
11
- default: :rggen_ral_block
12
- variable :block_model, :sub_block_model,
13
- data_type: type_name,
14
- name: register.name,
15
- random: true
16
- end
17
-
18
- def type_name
19
- register.name.upcase
20
- end
21
-
22
- def model_creation(code)
23
- code << subroutine_call('`rggen_ral_create_block_model', arguments) << nl
24
- end
25
-
26
- def arguments
27
- [register.name, string(register.name), offset_addess]
28
- end
29
-
30
- def offset_addess
31
- hex(register.start_address, register_block.local_address_width)
32
- end
33
- end
34
- end
@@ -1,283 +0,0 @@
1
- list_item :register, :type do
2
- register_map do
3
- item_base do
4
- define_helpers do
5
- def readable?(&evaluator)
6
- @readability_evaluator = evaluator
7
- end
8
-
9
- def writable?(&evaluator)
10
- @writability_evaluator = evaluator
11
- end
12
-
13
- {
14
- read_write: [true , true ],
15
- read_only: [true , false],
16
- write_only: [false, true ],
17
- reserved: [false, false]
18
- }.each do |access_type, accessibility|
19
- define_method(access_type) do
20
- readable? { accessibility[0] }
21
- writable? { accessibility[1] }
22
- end
23
- end
24
-
25
- def need_options
26
- @need_options = true
27
- end
28
-
29
- def need_options?
30
- @need_options
31
- end
32
-
33
- def support_array_register(options = {})
34
- @support_array_register = true
35
- @array_options = options
36
- end
37
-
38
- def support_array_register?
39
- @support_array_register
40
- end
41
-
42
- def array_options
43
- @array_options || {}
44
- end
45
-
46
- attr_setter :required_byte_size
47
-
48
- [:amount_of_registers, :data_width, :any_size].each do |width_type|
49
- define_method(width_type) { width_type }
50
- end
51
-
52
- def need_no_bit_fields
53
- @no_bit_fields = true
54
- end
55
-
56
- def need_no_bit_fields?
57
- @no_bit_fields
58
- end
59
- end
60
-
61
- attr_class_reader :writability_evaluator
62
- attr_class_reader :readability_evaluator
63
- class_delegator :need_options?
64
- class_delegator :support_array_register?
65
- class_delegator :array_options
66
- class_delegator :required_byte_size
67
- class_delegator :need_no_bit_fields?
68
-
69
- field :type
70
-
71
- field :type? do |other|
72
- other == type
73
- end
74
-
75
- field :readable? do
76
- next true if readability_evaluator.nil?
77
- instance_exec(&readability_evaluator)
78
- end
79
-
80
- field :writable? do
81
- next true if writability_evaluator.nil?
82
- instance_exec(&writability_evaluator)
83
- end
84
-
85
- field :read_only? do
86
- readable? && !writable?
87
- end
88
-
89
- field :write_only? do
90
- !readable? && writable?
91
- end
92
-
93
- field :reserved? do
94
- !(readable? || writable?)
95
- end
96
-
97
- build do |cell|
98
- @type = cell.type
99
- error 'no options are specified' if need_options? && cell.options.nil?
100
- register.need_no_children if need_no_bit_fields?
101
- end
102
-
103
- validate do
104
- check_array_register_usage
105
- check_array_demension
106
- check_byte_size
107
- end
108
-
109
- def check_array_register_usage
110
- return unless register.array?
111
- return if support_array_register?
112
- error 'array register is not allowed'
113
- end
114
-
115
- def check_array_demension
116
- return unless register.array?
117
- return if register.dimensions.size == 1
118
- return if array_options[:support_multiple_dimensions]
119
- error 'multiple dimensions array register is not allowed'
120
- end
121
-
122
- def check_byte_size
123
- return if required_byte_size == :any_size
124
- return if register.byte_size == required_byte_size_value
125
- error "byte size(#{register.byte_size}) is not matched with " \
126
- "required size(#{required_byte_size_value})"
127
- end
128
-
129
- def required_byte_size_value
130
- return configuration.byte_width if required_byte_size == :data_width
131
- register.count * configuration.byte_width
132
- end
133
- end
134
-
135
- default_item do
136
- readable? { register.bit_fields.any?(&:readable?) }
137
- writable? { register.bit_fields.any?(&:writable?) }
138
- support_array_register
139
- build { @type = :default }
140
- end
141
-
142
- factory do
143
- define_struct :cell_value, [:type, :options] do
144
- def empty?
145
- type.nil?
146
- end
147
- end
148
-
149
- def select_target_item(cell)
150
- @target_items.fetch(cell.value.type) do
151
- next if cell.value.type == :default
152
- error "unknown register type: #{cell.value.type}", cell
153
- end unless cell.empty?
154
- end
155
-
156
- def convert_cell_value(cell)
157
- cell.value =
158
- if cell.empty?
159
- cell_value.new(nil, nil)
160
- else
161
- convert(cell.value)
162
- end
163
- end
164
-
165
- def convert(cell)
166
- [:default, *@target_items.keys].find_yield do |t|
167
- case cell
168
- when /\A#{t}(?::(.+))?\Z/im
169
- cell_value.new(t, Regexp.last_match.captures[0])
170
- end
171
- end || cell_value.new(cell, nil)
172
- end
173
- end
174
- end
175
-
176
- rtl do
177
- item_base do
178
- export :register_if
179
-
180
- delegate [:data_width, :byte_width] => :configuration
181
- delegate [:local_address_width] => :register_block
182
- delegate [:loop_variables, :local_index, :dimensions] => :register
183
-
184
- build do
185
- interface :register, :bit_field_if,
186
- type: :rggen_bit_field_if,
187
- name: :bit_field_if,
188
- parameters: [data_width] if total_bit_fields > 0
189
- end
190
-
191
- def register_if
192
- register_block.register_if[register.index]
193
- end
194
-
195
- private
196
-
197
- def total_bit_fields
198
- register.bit_fields.size
199
- end
200
-
201
- def address_range
202
- @address_range ||=
203
- if register.array?
204
- register.start_address..(register.start_address + byte_width - 1)
205
- else
206
- register.start_address..register.end_address
207
- end
208
- end
209
-
210
- def start_address
211
- address_code(register.start_address)
212
- end
213
-
214
- def end_address
215
- address_code(address_range.last)
216
- end
217
-
218
- def address_code(address)
219
- base = hex(address, local_address_width)
220
- if register.array? && register.multiple?
221
- increment_value = hex(byte_width, local_address_width)
222
- "#{base} + #{increment_value} * #{local_index}"
223
- else
224
- base
225
- end
226
- end
227
-
228
- def valid_bits
229
- hex(valid_bits_value, data_width)
230
- end
231
-
232
- def valid_bits_value
233
- register.bit_fields.inject(0) do |bits, bit_field|
234
- bits | (((1 << bit_field.width) - 1) << bit_field.lsb)
235
- end
236
- end
237
- end
238
-
239
- default_item do
240
- generate_code :register do
241
- process_template File.join(__dir__, 'types', 'default.erb')
242
- end
243
- end
244
-
245
- factory do
246
- def select_target_item(_, register)
247
- @target_items[register.type]
248
- end
249
- end
250
- end
251
-
252
- c_header do
253
- item_base do
254
- define_helpers do
255
- def address_struct_member(&body)
256
- define_method(:address_struct_member, &body)
257
- end
258
- end
259
-
260
- export :address_struct_member
261
-
262
- def data_type
263
- "rggen_uint#{configuration.data_width}"
264
- end
265
- end
266
-
267
- default_item do
268
- delegate [:name, :dimensions] => :register
269
-
270
- address_struct_member do
271
- variable_declaration(
272
- name: name, data_type: data_type, dimensions: dimensions
273
- )
274
- end
275
- end
276
-
277
- factory do
278
- def select_target_item(_, register)
279
- @target_items[register.type]
280
- end
281
- end
282
- end
283
- end