hexcore-capstone 1.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (332) hide show
  1. package/LICENSE +26 -0
  2. package/README.md +191 -0
  3. package/binding.gyp +168 -0
  4. package/deps/capstone/LEB128.h +38 -0
  5. package/deps/capstone/MCDisassembler.h +14 -0
  6. package/deps/capstone/MCFixedLenDisassembler.h +32 -0
  7. package/deps/capstone/MCInst.c +270 -0
  8. package/deps/capstone/MCInst.h +165 -0
  9. package/deps/capstone/MCInstrDesc.c +41 -0
  10. package/deps/capstone/MCInstrDesc.h +167 -0
  11. package/deps/capstone/MCRegisterInfo.c +151 -0
  12. package/deps/capstone/MCRegisterInfo.h +116 -0
  13. package/deps/capstone/Mapping.c +254 -0
  14. package/deps/capstone/Mapping.h +174 -0
  15. package/deps/capstone/MathExtras.h +442 -0
  16. package/deps/capstone/SStream.c +181 -0
  17. package/deps/capstone/SStream.h +40 -0
  18. package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
  19. package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
  20. package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
  21. package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
  22. package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
  23. package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
  24. package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
  25. package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
  26. package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
  27. package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
  28. package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
  29. package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
  30. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
  31. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
  32. package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
  33. package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
  34. package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
  35. package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
  36. package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
  37. package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
  38. package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
  39. package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
  40. package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
  41. package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
  42. package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
  43. package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
  44. package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
  45. package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
  46. package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
  47. package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
  48. package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
  49. package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
  50. package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
  51. package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
  52. package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
  53. package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
  54. package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
  55. package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
  56. package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
  57. package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
  58. package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
  59. package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
  60. package/deps/capstone/arch/ARM/ARMModule.c +63 -0
  61. package/deps/capstone/arch/ARM/ARMModule.h +12 -0
  62. package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
  63. package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
  64. package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
  65. package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
  66. package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
  67. package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
  68. package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
  69. package/deps/capstone/arch/BPF/BPFModule.c +34 -0
  70. package/deps/capstone/arch/BPF/BPFModule.h +12 -0
  71. package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
  72. package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
  73. package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
  74. package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
  75. package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
  76. package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
  77. package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
  78. package/deps/capstone/arch/EVM/EVMModule.c +33 -0
  79. package/deps/capstone/arch/EVM/EVMModule.h +12 -0
  80. package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
  81. package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
  82. package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
  83. package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
  84. package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
  85. package/deps/capstone/arch/M680X/M680XModule.c +77 -0
  86. package/deps/capstone/arch/M680X/M680XModule.h +12 -0
  87. package/deps/capstone/arch/M680X/cpu12.inc +335 -0
  88. package/deps/capstone/arch/M680X/hcs08.inc +60 -0
  89. package/deps/capstone/arch/M680X/hd6301.inc +15 -0
  90. package/deps/capstone/arch/M680X/hd6309.inc +259 -0
  91. package/deps/capstone/arch/M680X/insn_props.inc +367 -0
  92. package/deps/capstone/arch/M680X/m6800.inc +277 -0
  93. package/deps/capstone/arch/M680X/m6801.inc +39 -0
  94. package/deps/capstone/arch/M680X/m6805.inc +277 -0
  95. package/deps/capstone/arch/M680X/m6808.inc +91 -0
  96. package/deps/capstone/arch/M680X/m6809.inc +352 -0
  97. package/deps/capstone/arch/M680X/m6811.inc +105 -0
  98. package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
  99. package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
  100. package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
  101. package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
  102. package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
  103. package/deps/capstone/arch/M68K/M68KModule.c +42 -0
  104. package/deps/capstone/arch/M68K/M68KModule.h +12 -0
  105. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
  106. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
  107. package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
  108. package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
  109. package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
  110. package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
  111. package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
  112. package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
  113. package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
  114. package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
  115. package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
  116. package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
  117. package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
  118. package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
  119. package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
  120. package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
  121. package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
  122. package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
  123. package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
  124. package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
  125. package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
  126. package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
  127. package/deps/capstone/arch/Mips/MipsModule.c +52 -0
  128. package/deps/capstone/arch/Mips/MipsModule.h +12 -0
  129. package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
  130. package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
  131. package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
  132. package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
  133. package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
  134. package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
  135. package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
  136. package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
  137. package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
  138. package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
  139. package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
  140. package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
  141. package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
  142. package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
  143. package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
  144. package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
  145. package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
  146. package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
  147. package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
  148. package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
  149. package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
  150. package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
  151. package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
  152. package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
  153. package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
  154. package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
  155. package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
  156. package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
  157. package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
  158. package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
  159. package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
  160. package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
  161. package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
  162. package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
  163. package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
  164. package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
  165. package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
  166. package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
  167. package/deps/capstone/arch/SH/SHModule.c +39 -0
  168. package/deps/capstone/arch/SH/SHModule.h +12 -0
  169. package/deps/capstone/arch/SH/mktable.rb +390 -0
  170. package/deps/capstone/arch/Sparc/Sparc.h +63 -0
  171. package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
  172. package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
  173. package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
  174. package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
  175. package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
  176. package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
  177. package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
  178. package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
  179. package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
  180. package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
  181. package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
  182. package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
  183. package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
  184. package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
  185. package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
  186. package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
  187. package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
  188. package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
  189. package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
  190. package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
  191. package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
  192. package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
  193. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
  194. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
  195. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
  196. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
  197. package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
  198. package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
  199. package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
  200. package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
  201. package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
  202. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
  203. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
  204. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
  205. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
  206. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
  207. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
  208. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
  209. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
  210. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
  211. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
  212. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
  213. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
  214. package/deps/capstone/arch/TriCore/TriCore.td +134 -0
  215. package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
  216. package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
  217. package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
  218. package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
  219. package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
  220. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
  221. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
  222. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
  223. package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
  224. package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
  225. package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
  226. package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
  227. package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
  228. package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
  229. package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
  230. package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
  231. package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
  232. package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
  233. package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
  234. package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
  235. package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
  236. package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
  237. package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
  238. package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
  239. package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
  240. package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
  241. package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
  242. package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
  243. package/deps/capstone/arch/WASM/WASMModule.c +33 -0
  244. package/deps/capstone/arch/WASM/WASMModule.h +12 -0
  245. package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
  246. package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
  247. package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
  248. package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
  249. package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
  250. package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
  251. package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
  252. package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
  253. package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
  254. package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
  255. package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
  256. package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
  257. package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
  258. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
  259. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
  260. package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
  261. package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
  262. package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
  263. package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
  264. package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
  265. package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
  266. package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
  267. package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
  268. package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
  269. package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
  270. package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
  271. package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
  272. package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
  273. package/deps/capstone/arch/X86/X86Mapping.h +96 -0
  274. package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
  275. package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
  276. package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
  277. package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
  278. package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
  279. package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
  280. package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
  281. package/deps/capstone/arch/X86/X86Module.c +94 -0
  282. package/deps/capstone/arch/X86/X86Module.h +12 -0
  283. package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
  284. package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
  285. package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
  286. package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
  287. package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
  288. package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
  289. package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
  290. package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
  291. package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
  292. package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
  293. package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
  294. package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
  295. package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
  296. package/deps/capstone/cs.c +1664 -0
  297. package/deps/capstone/cs_priv.h +101 -0
  298. package/deps/capstone/cs_simple_types.h +886 -0
  299. package/deps/capstone/include/capstone/arm.h +991 -0
  300. package/deps/capstone/include/capstone/arm64.h +3159 -0
  301. package/deps/capstone/include/capstone/bpf.h +209 -0
  302. package/deps/capstone/include/capstone/capstone.h +875 -0
  303. package/deps/capstone/include/capstone/evm.h +188 -0
  304. package/deps/capstone/include/capstone/m680x.h +537 -0
  305. package/deps/capstone/include/capstone/m68k.h +613 -0
  306. package/deps/capstone/include/capstone/mips.h +956 -0
  307. package/deps/capstone/include/capstone/mos65xx.h +204 -0
  308. package/deps/capstone/include/capstone/platform.h +122 -0
  309. package/deps/capstone/include/capstone/ppc.h +2108 -0
  310. package/deps/capstone/include/capstone/riscv.h +531 -0
  311. package/deps/capstone/include/capstone/sh.h +465 -0
  312. package/deps/capstone/include/capstone/sparc.h +520 -0
  313. package/deps/capstone/include/capstone/systemz.h +2601 -0
  314. package/deps/capstone/include/capstone/tms320c64x.h +359 -0
  315. package/deps/capstone/include/capstone/tricore.h +567 -0
  316. package/deps/capstone/include/capstone/wasm.h +250 -0
  317. package/deps/capstone/include/capstone/x86.h +1986 -0
  318. package/deps/capstone/include/capstone/xcore.h +235 -0
  319. package/deps/capstone/include/platform.h +110 -0
  320. package/deps/capstone/include/windowsce/intrin.h +12 -0
  321. package/deps/capstone/include/windowsce/stdint.h +133 -0
  322. package/deps/capstone/utils.c +140 -0
  323. package/deps/capstone/utils.h +54 -0
  324. package/index.d.ts +448 -0
  325. package/index.js +64 -0
  326. package/index.mjs +25 -0
  327. package/package.json +82 -0
  328. package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
  329. package/src/capstone_wrapper.cpp +910 -0
  330. package/src/capstone_wrapper.h +147 -0
  331. package/src/disasm_async_worker.h +215 -0
  332. package/src/main.cpp +145 -0
@@ -0,0 +1,665 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
3
+
4
+ #ifdef CAPSTONE_HAS_SPARC
5
+
6
+ #include <stdio.h> // debug
7
+ #include <string.h>
8
+
9
+ #include "../../utils.h"
10
+
11
+ #include "SparcMapping.h"
12
+
13
+ #define GET_INSTRINFO_ENUM
14
+ #include "SparcGenInstrInfo.inc"
15
+
16
+ #ifndef CAPSTONE_DIET
17
+ static const name_map reg_name_maps[] = {
18
+ { SPARC_REG_INVALID, NULL },
19
+
20
+ { SPARC_REG_F0, "f0"},
21
+ { SPARC_REG_F1, "f1"},
22
+ { SPARC_REG_F2, "f2"},
23
+ { SPARC_REG_F3, "f3"},
24
+ { SPARC_REG_F4, "f4"},
25
+ { SPARC_REG_F5, "f5"},
26
+ { SPARC_REG_F6, "f6"},
27
+ { SPARC_REG_F7, "f7"},
28
+ { SPARC_REG_F8, "f8"},
29
+ { SPARC_REG_F9, "f9"},
30
+ { SPARC_REG_F10, "f10"},
31
+ { SPARC_REG_F11, "f11"},
32
+ { SPARC_REG_F12, "f12"},
33
+ { SPARC_REG_F13, "f13"},
34
+ { SPARC_REG_F14, "f14"},
35
+ { SPARC_REG_F15, "f15"},
36
+ { SPARC_REG_F16, "f16"},
37
+ { SPARC_REG_F17, "f17"},
38
+ { SPARC_REG_F18, "f18"},
39
+ { SPARC_REG_F19, "f19"},
40
+ { SPARC_REG_F20, "f20"},
41
+ { SPARC_REG_F21, "f21"},
42
+ { SPARC_REG_F22, "f22"},
43
+ { SPARC_REG_F23, "f23"},
44
+ { SPARC_REG_F24, "f24"},
45
+ { SPARC_REG_F25, "f25"},
46
+ { SPARC_REG_F26, "f26"},
47
+ { SPARC_REG_F27, "f27"},
48
+ { SPARC_REG_F28, "f28"},
49
+ { SPARC_REG_F29, "f29"},
50
+ { SPARC_REG_F30, "f30"},
51
+ { SPARC_REG_F31, "f31"},
52
+ { SPARC_REG_F32, "f32"},
53
+ { SPARC_REG_F34, "f34"},
54
+ { SPARC_REG_F36, "f36"},
55
+ { SPARC_REG_F38, "f38"},
56
+ { SPARC_REG_F40, "f40"},
57
+ { SPARC_REG_F42, "f42"},
58
+ { SPARC_REG_F44, "f44"},
59
+ { SPARC_REG_F46, "f46"},
60
+ { SPARC_REG_F48, "f48"},
61
+ { SPARC_REG_F50, "f50"},
62
+ { SPARC_REG_F52, "f52"},
63
+ { SPARC_REG_F54, "f54"},
64
+ { SPARC_REG_F56, "f56"},
65
+ { SPARC_REG_F58, "f58"},
66
+ { SPARC_REG_F60, "f60"},
67
+ { SPARC_REG_F62, "f62"},
68
+ { SPARC_REG_FCC0, "fcc0"},
69
+ { SPARC_REG_FCC1, "fcc1"},
70
+ { SPARC_REG_FCC2, "fcc2"},
71
+ { SPARC_REG_FCC3, "fcc3"},
72
+ { SPARC_REG_FP, "fp"},
73
+ { SPARC_REG_G0, "g0"},
74
+ { SPARC_REG_G1, "g1"},
75
+ { SPARC_REG_G2, "g2"},
76
+ { SPARC_REG_G3, "g3"},
77
+ { SPARC_REG_G4, "g4"},
78
+ { SPARC_REG_G5, "g5"},
79
+ { SPARC_REG_G6, "g6"},
80
+ { SPARC_REG_G7, "g7"},
81
+ { SPARC_REG_I0, "i0"},
82
+ { SPARC_REG_I1, "i1"},
83
+ { SPARC_REG_I2, "i2"},
84
+ { SPARC_REG_I3, "i3"},
85
+ { SPARC_REG_I4, "i4"},
86
+ { SPARC_REG_I5, "i5"},
87
+ { SPARC_REG_I7, "i7"},
88
+ { SPARC_REG_ICC, "icc"},
89
+ { SPARC_REG_L0, "l0"},
90
+ { SPARC_REG_L1, "l1"},
91
+ { SPARC_REG_L2, "l2"},
92
+ { SPARC_REG_L3, "l3"},
93
+ { SPARC_REG_L4, "l4"},
94
+ { SPARC_REG_L5, "l5"},
95
+ { SPARC_REG_L6, "l6"},
96
+ { SPARC_REG_L7, "l7"},
97
+ { SPARC_REG_O0, "o0"},
98
+ { SPARC_REG_O1, "o1"},
99
+ { SPARC_REG_O2, "o2"},
100
+ { SPARC_REG_O3, "o3"},
101
+ { SPARC_REG_O4, "o4"},
102
+ { SPARC_REG_O5, "o5"},
103
+ { SPARC_REG_O7, "o7"},
104
+ { SPARC_REG_SP, "sp"},
105
+ { SPARC_REG_Y, "y"},
106
+
107
+ // special registers
108
+ { SPARC_REG_XCC, "xcc"},
109
+ };
110
+ #endif
111
+
112
+ const char *Sparc_reg_name(csh handle, unsigned int reg)
113
+ {
114
+ #ifndef CAPSTONE_DIET
115
+ if (reg >= ARR_SIZE(reg_name_maps))
116
+ return NULL;
117
+
118
+ return reg_name_maps[reg].name;
119
+ #else
120
+ return NULL;
121
+ #endif
122
+ }
123
+
124
+ static const insn_map insns[] = {
125
+ // dummy item
126
+ {
127
+ 0, 0,
128
+ #ifndef CAPSTONE_DIET
129
+ { 0 }, { 0 }, { 0 }, 0, 0
130
+ #endif
131
+ },
132
+
133
+ #include "SparcMappingInsn.inc"
134
+ };
135
+
136
+ static struct hint_map {
137
+ unsigned int id;
138
+ uint8_t hints;
139
+ } const insn_hints[] = {
140
+ { SP_BPGEZapn, SPARC_HINT_A | SPARC_HINT_PN },
141
+ { SP_BPGEZapt, SPARC_HINT_A | SPARC_HINT_PT },
142
+ { SP_BPGEZnapn, SPARC_HINT_PN },
143
+ { SP_BPGZapn, SPARC_HINT_A | SPARC_HINT_PN },
144
+ { SP_BPGZapt, SPARC_HINT_A | SPARC_HINT_PT },
145
+ { SP_BPGZnapn, SPARC_HINT_PN },
146
+ { SP_BPLEZapn, SPARC_HINT_A | SPARC_HINT_PN },
147
+ { SP_BPLEZapt, SPARC_HINT_A | SPARC_HINT_PT },
148
+ { SP_BPLEZnapn, SPARC_HINT_PN },
149
+ { SP_BPLZapn, SPARC_HINT_A | SPARC_HINT_PN },
150
+ { SP_BPLZapt, SPARC_HINT_A | SPARC_HINT_PT },
151
+ { SP_BPLZnapn, SPARC_HINT_PN },
152
+ { SP_BPNZapn, SPARC_HINT_A | SPARC_HINT_PN },
153
+ { SP_BPNZapt, SPARC_HINT_A | SPARC_HINT_PT },
154
+ { SP_BPNZnapn, SPARC_HINT_PN },
155
+ { SP_BPZapn, SPARC_HINT_A | SPARC_HINT_PN },
156
+ { SP_BPZapt, SPARC_HINT_A | SPARC_HINT_PT },
157
+ { SP_BPZnapn, SPARC_HINT_PN },
158
+ };
159
+
160
+ // given internal insn id, return public instruction info
161
+ void Sparc_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
162
+ {
163
+ unsigned short i;
164
+
165
+ i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
166
+ if (i != 0) {
167
+ insn->id = insns[i].mapid;
168
+
169
+ if (h->detail) {
170
+ #ifndef CAPSTONE_DIET
171
+ memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
172
+ insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use);
173
+
174
+ memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
175
+ insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
176
+
177
+ memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
178
+ insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups);
179
+
180
+ if (insns[i].branch || insns[i].indirect_branch) {
181
+ // this insn also belongs to JUMP group. add JUMP group
182
+ insn->detail->groups[insn->detail->groups_count] = SPARC_GRP_JUMP;
183
+ insn->detail->groups_count++;
184
+ }
185
+ #endif
186
+ // hint code
187
+ for (i = 0; i < ARR_SIZE(insn_hints); i++) {
188
+ if (id == insn_hints[i].id) {
189
+ insn->detail->sparc.hint = insn_hints[i].hints;
190
+ break;
191
+ }
192
+ }
193
+ }
194
+ }
195
+ }
196
+
197
+ static const name_map insn_name_maps[] = {
198
+ { SPARC_INS_INVALID, NULL },
199
+
200
+ { SPARC_INS_ADDCC, "addcc" },
201
+ { SPARC_INS_ADDX, "addx" },
202
+ { SPARC_INS_ADDXCC, "addxcc" },
203
+ { SPARC_INS_ADDXC, "addxc" },
204
+ { SPARC_INS_ADDXCCC, "addxccc" },
205
+ { SPARC_INS_ADD, "add" },
206
+ { SPARC_INS_ALIGNADDR, "alignaddr" },
207
+ { SPARC_INS_ALIGNADDRL, "alignaddrl" },
208
+ { SPARC_INS_ANDCC, "andcc" },
209
+ { SPARC_INS_ANDNCC, "andncc" },
210
+ { SPARC_INS_ANDN, "andn" },
211
+ { SPARC_INS_AND, "and" },
212
+ { SPARC_INS_ARRAY16, "array16" },
213
+ { SPARC_INS_ARRAY32, "array32" },
214
+ { SPARC_INS_ARRAY8, "array8" },
215
+ { SPARC_INS_B, "b" },
216
+ { SPARC_INS_JMP, "jmp" },
217
+ { SPARC_INS_BMASK, "bmask" },
218
+ { SPARC_INS_FB, "fb" },
219
+ { SPARC_INS_BRGEZ, "brgez" },
220
+ { SPARC_INS_BRGZ, "brgz" },
221
+ { SPARC_INS_BRLEZ, "brlez" },
222
+ { SPARC_INS_BRLZ, "brlz" },
223
+ { SPARC_INS_BRNZ, "brnz" },
224
+ { SPARC_INS_BRZ, "brz" },
225
+ { SPARC_INS_BSHUFFLE, "bshuffle" },
226
+ { SPARC_INS_CALL, "call" },
227
+ { SPARC_INS_CASX, "casx" },
228
+ { SPARC_INS_CAS, "cas" },
229
+ { SPARC_INS_CMASK16, "cmask16" },
230
+ { SPARC_INS_CMASK32, "cmask32" },
231
+ { SPARC_INS_CMASK8, "cmask8" },
232
+ { SPARC_INS_CMP, "cmp" },
233
+ { SPARC_INS_EDGE16, "edge16" },
234
+ { SPARC_INS_EDGE16L, "edge16l" },
235
+ { SPARC_INS_EDGE16LN, "edge16ln" },
236
+ { SPARC_INS_EDGE16N, "edge16n" },
237
+ { SPARC_INS_EDGE32, "edge32" },
238
+ { SPARC_INS_EDGE32L, "edge32l" },
239
+ { SPARC_INS_EDGE32LN, "edge32ln" },
240
+ { SPARC_INS_EDGE32N, "edge32n" },
241
+ { SPARC_INS_EDGE8, "edge8" },
242
+ { SPARC_INS_EDGE8L, "edge8l" },
243
+ { SPARC_INS_EDGE8LN, "edge8ln" },
244
+ { SPARC_INS_EDGE8N, "edge8n" },
245
+ { SPARC_INS_FABSD, "fabsd" },
246
+ { SPARC_INS_FABSQ, "fabsq" },
247
+ { SPARC_INS_FABSS, "fabss" },
248
+ { SPARC_INS_FADDD, "faddd" },
249
+ { SPARC_INS_FADDQ, "faddq" },
250
+ { SPARC_INS_FADDS, "fadds" },
251
+ { SPARC_INS_FALIGNDATA, "faligndata" },
252
+ { SPARC_INS_FAND, "fand" },
253
+ { SPARC_INS_FANDNOT1, "fandnot1" },
254
+ { SPARC_INS_FANDNOT1S, "fandnot1s" },
255
+ { SPARC_INS_FANDNOT2, "fandnot2" },
256
+ { SPARC_INS_FANDNOT2S, "fandnot2s" },
257
+ { SPARC_INS_FANDS, "fands" },
258
+ { SPARC_INS_FCHKSM16, "fchksm16" },
259
+ { SPARC_INS_FCMPD, "fcmpd" },
260
+ { SPARC_INS_FCMPEQ16, "fcmpeq16" },
261
+ { SPARC_INS_FCMPEQ32, "fcmpeq32" },
262
+ { SPARC_INS_FCMPGT16, "fcmpgt16" },
263
+ { SPARC_INS_FCMPGT32, "fcmpgt32" },
264
+ { SPARC_INS_FCMPLE16, "fcmple16" },
265
+ { SPARC_INS_FCMPLE32, "fcmple32" },
266
+ { SPARC_INS_FCMPNE16, "fcmpne16" },
267
+ { SPARC_INS_FCMPNE32, "fcmpne32" },
268
+ { SPARC_INS_FCMPQ, "fcmpq" },
269
+ { SPARC_INS_FCMPS, "fcmps" },
270
+ { SPARC_INS_FDIVD, "fdivd" },
271
+ { SPARC_INS_FDIVQ, "fdivq" },
272
+ { SPARC_INS_FDIVS, "fdivs" },
273
+ { SPARC_INS_FDMULQ, "fdmulq" },
274
+ { SPARC_INS_FDTOI, "fdtoi" },
275
+ { SPARC_INS_FDTOQ, "fdtoq" },
276
+ { SPARC_INS_FDTOS, "fdtos" },
277
+ { SPARC_INS_FDTOX, "fdtox" },
278
+ { SPARC_INS_FEXPAND, "fexpand" },
279
+ { SPARC_INS_FHADDD, "fhaddd" },
280
+ { SPARC_INS_FHADDS, "fhadds" },
281
+ { SPARC_INS_FHSUBD, "fhsubd" },
282
+ { SPARC_INS_FHSUBS, "fhsubs" },
283
+ { SPARC_INS_FITOD, "fitod" },
284
+ { SPARC_INS_FITOQ, "fitoq" },
285
+ { SPARC_INS_FITOS, "fitos" },
286
+ { SPARC_INS_FLCMPD, "flcmpd" },
287
+ { SPARC_INS_FLCMPS, "flcmps" },
288
+ { SPARC_INS_FLUSHW, "flushw" },
289
+ { SPARC_INS_FMEAN16, "fmean16" },
290
+ { SPARC_INS_FMOVD, "fmovd" },
291
+ { SPARC_INS_FMOVQ, "fmovq" },
292
+ { SPARC_INS_FMOVRDGEZ, "fmovrdgez" },
293
+ { SPARC_INS_FMOVRQGEZ, "fmovrqgez" },
294
+ { SPARC_INS_FMOVRSGEZ, "fmovrsgez" },
295
+ { SPARC_INS_FMOVRDGZ, "fmovrdgz" },
296
+ { SPARC_INS_FMOVRQGZ, "fmovrqgz" },
297
+ { SPARC_INS_FMOVRSGZ, "fmovrsgz" },
298
+ { SPARC_INS_FMOVRDLEZ, "fmovrdlez" },
299
+ { SPARC_INS_FMOVRQLEZ, "fmovrqlez" },
300
+ { SPARC_INS_FMOVRSLEZ, "fmovrslez" },
301
+ { SPARC_INS_FMOVRDLZ, "fmovrdlz" },
302
+ { SPARC_INS_FMOVRQLZ, "fmovrqlz" },
303
+ { SPARC_INS_FMOVRSLZ, "fmovrslz" },
304
+ { SPARC_INS_FMOVRDNZ, "fmovrdnz" },
305
+ { SPARC_INS_FMOVRQNZ, "fmovrqnz" },
306
+ { SPARC_INS_FMOVRSNZ, "fmovrsnz" },
307
+ { SPARC_INS_FMOVRDZ, "fmovrdz" },
308
+ { SPARC_INS_FMOVRQZ, "fmovrqz" },
309
+ { SPARC_INS_FMOVRSZ, "fmovrsz" },
310
+ { SPARC_INS_FMOVS, "fmovs" },
311
+ { SPARC_INS_FMUL8SUX16, "fmul8sux16" },
312
+ { SPARC_INS_FMUL8ULX16, "fmul8ulx16" },
313
+ { SPARC_INS_FMUL8X16, "fmul8x16" },
314
+ { SPARC_INS_FMUL8X16AL, "fmul8x16al" },
315
+ { SPARC_INS_FMUL8X16AU, "fmul8x16au" },
316
+ { SPARC_INS_FMULD, "fmuld" },
317
+ { SPARC_INS_FMULD8SUX16, "fmuld8sux16" },
318
+ { SPARC_INS_FMULD8ULX16, "fmuld8ulx16" },
319
+ { SPARC_INS_FMULQ, "fmulq" },
320
+ { SPARC_INS_FMULS, "fmuls" },
321
+ { SPARC_INS_FNADDD, "fnaddd" },
322
+ { SPARC_INS_FNADDS, "fnadds" },
323
+ { SPARC_INS_FNAND, "fnand" },
324
+ { SPARC_INS_FNANDS, "fnands" },
325
+ { SPARC_INS_FNEGD, "fnegd" },
326
+ { SPARC_INS_FNEGQ, "fnegq" },
327
+ { SPARC_INS_FNEGS, "fnegs" },
328
+ { SPARC_INS_FNHADDD, "fnhaddd" },
329
+ { SPARC_INS_FNHADDS, "fnhadds" },
330
+ { SPARC_INS_FNOR, "fnor" },
331
+ { SPARC_INS_FNORS, "fnors" },
332
+ { SPARC_INS_FNOT1, "fnot1" },
333
+ { SPARC_INS_FNOT1S, "fnot1s" },
334
+ { SPARC_INS_FNOT2, "fnot2" },
335
+ { SPARC_INS_FNOT2S, "fnot2s" },
336
+ { SPARC_INS_FONE, "fone" },
337
+ { SPARC_INS_FONES, "fones" },
338
+ { SPARC_INS_FOR, "for" },
339
+ { SPARC_INS_FORNOT1, "fornot1" },
340
+ { SPARC_INS_FORNOT1S, "fornot1s" },
341
+ { SPARC_INS_FORNOT2, "fornot2" },
342
+ { SPARC_INS_FORNOT2S, "fornot2s" },
343
+ { SPARC_INS_FORS, "fors" },
344
+ { SPARC_INS_FPACK16, "fpack16" },
345
+ { SPARC_INS_FPACK32, "fpack32" },
346
+ { SPARC_INS_FPACKFIX, "fpackfix" },
347
+ { SPARC_INS_FPADD16, "fpadd16" },
348
+ { SPARC_INS_FPADD16S, "fpadd16s" },
349
+ { SPARC_INS_FPADD32, "fpadd32" },
350
+ { SPARC_INS_FPADD32S, "fpadd32s" },
351
+ { SPARC_INS_FPADD64, "fpadd64" },
352
+ { SPARC_INS_FPMERGE, "fpmerge" },
353
+ { SPARC_INS_FPSUB16, "fpsub16" },
354
+ { SPARC_INS_FPSUB16S, "fpsub16s" },
355
+ { SPARC_INS_FPSUB32, "fpsub32" },
356
+ { SPARC_INS_FPSUB32S, "fpsub32s" },
357
+ { SPARC_INS_FQTOD, "fqtod" },
358
+ { SPARC_INS_FQTOI, "fqtoi" },
359
+ { SPARC_INS_FQTOS, "fqtos" },
360
+ { SPARC_INS_FQTOX, "fqtox" },
361
+ { SPARC_INS_FSLAS16, "fslas16" },
362
+ { SPARC_INS_FSLAS32, "fslas32" },
363
+ { SPARC_INS_FSLL16, "fsll16" },
364
+ { SPARC_INS_FSLL32, "fsll32" },
365
+ { SPARC_INS_FSMULD, "fsmuld" },
366
+ { SPARC_INS_FSQRTD, "fsqrtd" },
367
+ { SPARC_INS_FSQRTQ, "fsqrtq" },
368
+ { SPARC_INS_FSQRTS, "fsqrts" },
369
+ { SPARC_INS_FSRA16, "fsra16" },
370
+ { SPARC_INS_FSRA32, "fsra32" },
371
+ { SPARC_INS_FSRC1, "fsrc1" },
372
+ { SPARC_INS_FSRC1S, "fsrc1s" },
373
+ { SPARC_INS_FSRC2, "fsrc2" },
374
+ { SPARC_INS_FSRC2S, "fsrc2s" },
375
+ { SPARC_INS_FSRL16, "fsrl16" },
376
+ { SPARC_INS_FSRL32, "fsrl32" },
377
+ { SPARC_INS_FSTOD, "fstod" },
378
+ { SPARC_INS_FSTOI, "fstoi" },
379
+ { SPARC_INS_FSTOQ, "fstoq" },
380
+ { SPARC_INS_FSTOX, "fstox" },
381
+ { SPARC_INS_FSUBD, "fsubd" },
382
+ { SPARC_INS_FSUBQ, "fsubq" },
383
+ { SPARC_INS_FSUBS, "fsubs" },
384
+ { SPARC_INS_FXNOR, "fxnor" },
385
+ { SPARC_INS_FXNORS, "fxnors" },
386
+ { SPARC_INS_FXOR, "fxor" },
387
+ { SPARC_INS_FXORS, "fxors" },
388
+ { SPARC_INS_FXTOD, "fxtod" },
389
+ { SPARC_INS_FXTOQ, "fxtoq" },
390
+ { SPARC_INS_FXTOS, "fxtos" },
391
+ { SPARC_INS_FZERO, "fzero" },
392
+ { SPARC_INS_FZEROS, "fzeros" },
393
+ { SPARC_INS_JMPL, "jmpl" },
394
+ { SPARC_INS_LDD, "ldd" },
395
+ { SPARC_INS_LD, "ld" },
396
+ { SPARC_INS_LDQ, "ldq" },
397
+ { SPARC_INS_LDSB, "ldsb" },
398
+ { SPARC_INS_LDSH, "ldsh" },
399
+ { SPARC_INS_LDSW, "ldsw" },
400
+ { SPARC_INS_LDUB, "ldub" },
401
+ { SPARC_INS_LDUH, "lduh" },
402
+ { SPARC_INS_LDX, "ldx" },
403
+ { SPARC_INS_LZCNT, "lzcnt" },
404
+ { SPARC_INS_MEMBAR, "membar" },
405
+ { SPARC_INS_MOVDTOX, "movdtox" },
406
+ { SPARC_INS_MOV, "mov" },
407
+ { SPARC_INS_MOVRGEZ, "movrgez" },
408
+ { SPARC_INS_MOVRGZ, "movrgz" },
409
+ { SPARC_INS_MOVRLEZ, "movrlez" },
410
+ { SPARC_INS_MOVRLZ, "movrlz" },
411
+ { SPARC_INS_MOVRNZ, "movrnz" },
412
+ { SPARC_INS_MOVRZ, "movrz" },
413
+ { SPARC_INS_MOVSTOSW, "movstosw" },
414
+ { SPARC_INS_MOVSTOUW, "movstouw" },
415
+ { SPARC_INS_MULX, "mulx" },
416
+ { SPARC_INS_NOP, "nop" },
417
+ { SPARC_INS_ORCC, "orcc" },
418
+ { SPARC_INS_ORNCC, "orncc" },
419
+ { SPARC_INS_ORN, "orn" },
420
+ { SPARC_INS_OR, "or" },
421
+ { SPARC_INS_PDIST, "pdist" },
422
+ { SPARC_INS_PDISTN, "pdistn" },
423
+ { SPARC_INS_POPC, "popc" },
424
+ { SPARC_INS_RD, "rd" },
425
+ { SPARC_INS_RESTORE, "restore" },
426
+ { SPARC_INS_RETT, "rett" },
427
+ { SPARC_INS_SAVE, "save" },
428
+ { SPARC_INS_SDIVCC, "sdivcc" },
429
+ { SPARC_INS_SDIVX, "sdivx" },
430
+ { SPARC_INS_SDIV, "sdiv" },
431
+ { SPARC_INS_SETHI, "sethi" },
432
+ { SPARC_INS_SHUTDOWN, "shutdown" },
433
+ { SPARC_INS_SIAM, "siam" },
434
+ { SPARC_INS_SLLX, "sllx" },
435
+ { SPARC_INS_SLL, "sll" },
436
+ { SPARC_INS_SMULCC, "smulcc" },
437
+ { SPARC_INS_SMUL, "smul" },
438
+ { SPARC_INS_SRAX, "srax" },
439
+ { SPARC_INS_SRA, "sra" },
440
+ { SPARC_INS_SRLX, "srlx" },
441
+ { SPARC_INS_SRL, "srl" },
442
+ { SPARC_INS_STBAR, "stbar" },
443
+ { SPARC_INS_STB, "stb" },
444
+ { SPARC_INS_STD, "std" },
445
+ { SPARC_INS_ST, "st" },
446
+ { SPARC_INS_STH, "sth" },
447
+ { SPARC_INS_STQ, "stq" },
448
+ { SPARC_INS_STX, "stx" },
449
+ { SPARC_INS_SUBCC, "subcc" },
450
+ { SPARC_INS_SUBX, "subx" },
451
+ { SPARC_INS_SUBXCC, "subxcc" },
452
+ { SPARC_INS_SUB, "sub" },
453
+ { SPARC_INS_SWAP, "swap" },
454
+ { SPARC_INS_TADDCCTV, "taddcctv" },
455
+ { SPARC_INS_TADDCC, "taddcc" },
456
+ { SPARC_INS_T, "t" },
457
+ { SPARC_INS_TSUBCCTV, "tsubcctv" },
458
+ { SPARC_INS_TSUBCC, "tsubcc" },
459
+ { SPARC_INS_UDIVCC, "udivcc" },
460
+ { SPARC_INS_UDIVX, "udivx" },
461
+ { SPARC_INS_UDIV, "udiv" },
462
+ { SPARC_INS_UMULCC, "umulcc" },
463
+ { SPARC_INS_UMULXHI, "umulxhi" },
464
+ { SPARC_INS_UMUL, "umul" },
465
+ { SPARC_INS_UNIMP, "unimp" },
466
+ { SPARC_INS_FCMPED, "fcmped" },
467
+ { SPARC_INS_FCMPEQ, "fcmpeq" },
468
+ { SPARC_INS_FCMPES, "fcmpes" },
469
+ { SPARC_INS_WR, "wr" },
470
+ { SPARC_INS_XMULX, "xmulx" },
471
+ { SPARC_INS_XMULXHI, "xmulxhi" },
472
+ { SPARC_INS_XNORCC, "xnorcc" },
473
+ { SPARC_INS_XNOR, "xnor" },
474
+ { SPARC_INS_XORCC, "xorcc" },
475
+ { SPARC_INS_XOR, "xor" },
476
+
477
+ // alias instructions
478
+ { SPARC_INS_RET, "ret" },
479
+ { SPARC_INS_RETL, "retl" },
480
+ };
481
+
482
+ #ifndef CAPSTONE_DIET
483
+ // special alias insn
484
+ static const name_map alias_insn_names[] = {
485
+ { 0, NULL }
486
+ };
487
+ #endif
488
+
489
+ const char *Sparc_insn_name(csh handle, unsigned int id)
490
+ {
491
+ #ifndef CAPSTONE_DIET
492
+ unsigned int i;
493
+
494
+ if (id >= SPARC_INS_ENDING)
495
+ return NULL;
496
+
497
+ // handle special alias first
498
+ for (i = 0; i < ARR_SIZE(alias_insn_names); i++) {
499
+ if (alias_insn_names[i].id == id)
500
+ return alias_insn_names[i].name;
501
+ }
502
+
503
+ return insn_name_maps[id].name;
504
+ #else
505
+ return NULL;
506
+ #endif
507
+ }
508
+
509
+ #ifndef CAPSTONE_DIET
510
+ static const name_map group_name_maps[] = {
511
+ // generic groups
512
+ { SPARC_GRP_INVALID, NULL },
513
+ { SPARC_GRP_JUMP, "jump" },
514
+
515
+ // architecture-specific groups
516
+ { SPARC_GRP_HARDQUAD, "hardquad" },
517
+ { SPARC_GRP_V9, "v9" },
518
+ { SPARC_GRP_VIS, "vis" },
519
+ { SPARC_GRP_VIS2, "vis2" },
520
+ { SPARC_GRP_VIS3, "vis3" },
521
+ { SPARC_GRP_32BIT, "32bit" },
522
+ { SPARC_GRP_64BIT, "64bit" },
523
+ };
524
+ #endif
525
+
526
+ const char *Sparc_group_name(csh handle, unsigned int id)
527
+ {
528
+ #ifndef CAPSTONE_DIET
529
+ return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
530
+ #else
531
+ return NULL;
532
+ #endif
533
+ }
534
+
535
+ // map internal raw register to 'public' register
536
+ sparc_reg Sparc_map_register(unsigned int r)
537
+ {
538
+ static const unsigned int map[] = { 0,
539
+ SPARC_REG_ICC, SPARC_REG_Y, SPARC_REG_F0, SPARC_REG_F2, SPARC_REG_F4,
540
+ SPARC_REG_F6, SPARC_REG_F8, SPARC_REG_F10, SPARC_REG_F12, SPARC_REG_F14,
541
+ SPARC_REG_F16, SPARC_REG_F18, SPARC_REG_F20, SPARC_REG_F22, SPARC_REG_F24,
542
+ SPARC_REG_F26, SPARC_REG_F28, SPARC_REG_F30, SPARC_REG_F32, SPARC_REG_F34,
543
+ SPARC_REG_F36, SPARC_REG_F38, SPARC_REG_F40, SPARC_REG_F42, SPARC_REG_F44,
544
+ SPARC_REG_F46, SPARC_REG_F48, SPARC_REG_F50, SPARC_REG_F52, SPARC_REG_F54,
545
+ SPARC_REG_F56, SPARC_REG_F58, SPARC_REG_F60, SPARC_REG_F62, SPARC_REG_F0,
546
+ SPARC_REG_F1, SPARC_REG_F2, SPARC_REG_F3, SPARC_REG_F4, SPARC_REG_F5,
547
+ SPARC_REG_F6, SPARC_REG_F7, SPARC_REG_F8, SPARC_REG_F9, SPARC_REG_F10,
548
+ SPARC_REG_F11, SPARC_REG_F12, SPARC_REG_F13, SPARC_REG_F14, SPARC_REG_F15,
549
+ SPARC_REG_F16, SPARC_REG_F17, SPARC_REG_F18, SPARC_REG_F19, SPARC_REG_F20,
550
+ SPARC_REG_F21, SPARC_REG_F22, SPARC_REG_F23, SPARC_REG_F24, SPARC_REG_F25,
551
+ SPARC_REG_F26, SPARC_REG_F27, SPARC_REG_F28, SPARC_REG_F29, SPARC_REG_F30,
552
+ SPARC_REG_F31, SPARC_REG_FCC0, SPARC_REG_FCC1, SPARC_REG_FCC2, SPARC_REG_FCC3,
553
+ SPARC_REG_G0, SPARC_REG_G1, SPARC_REG_G2, SPARC_REG_G3, SPARC_REG_G4,
554
+ SPARC_REG_G5, SPARC_REG_G6, SPARC_REG_G7, SPARC_REG_I0, SPARC_REG_I1,
555
+ SPARC_REG_I2, SPARC_REG_I3, SPARC_REG_I4, SPARC_REG_I5, SPARC_REG_FP,
556
+ SPARC_REG_I7, SPARC_REG_L0, SPARC_REG_L1, SPARC_REG_L2, SPARC_REG_L3,
557
+ SPARC_REG_L4, SPARC_REG_L5, SPARC_REG_L6, SPARC_REG_L7, SPARC_REG_O0,
558
+ SPARC_REG_O1, SPARC_REG_O2, SPARC_REG_O3, SPARC_REG_O4, SPARC_REG_O5,
559
+ SPARC_REG_SP, SPARC_REG_O7, SPARC_REG_F0, SPARC_REG_F4, SPARC_REG_F8,
560
+ SPARC_REG_F12, SPARC_REG_F16, SPARC_REG_F20, SPARC_REG_F24, SPARC_REG_F28,
561
+ SPARC_REG_F32, SPARC_REG_F36, SPARC_REG_F40, SPARC_REG_F44, SPARC_REG_F48,
562
+ SPARC_REG_F52, SPARC_REG_F56, SPARC_REG_F60,
563
+ };
564
+
565
+ if (r < ARR_SIZE(map))
566
+ return map[r];
567
+
568
+ // cannot find this register
569
+ return 0;
570
+ }
571
+
572
+ // map instruction name to instruction ID (public)
573
+ sparc_reg Sparc_map_insn(const char *name)
574
+ {
575
+ unsigned int i;
576
+
577
+ // NOTE: skip first NULL name in insn_name_maps
578
+ i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name);
579
+
580
+ return (i != -1)? i : SPARC_REG_INVALID;
581
+ }
582
+
583
+ // NOTE: put strings in the order of string length since
584
+ // we are going to compare with mnemonic to find out CC
585
+ static const name_map alias_icc_maps[] = {
586
+ { SPARC_CC_ICC_LEU, "leu" },
587
+ { SPARC_CC_ICC_POS, "pos" },
588
+ { SPARC_CC_ICC_NEG, "neg" },
589
+ { SPARC_CC_ICC_NE, "ne" },
590
+ { SPARC_CC_ICC_LE, "le" },
591
+ { SPARC_CC_ICC_GE, "ge" },
592
+ { SPARC_CC_ICC_GU, "gu" },
593
+ { SPARC_CC_ICC_CC, "cc" },
594
+ { SPARC_CC_ICC_CS, "cs" },
595
+ { SPARC_CC_ICC_VC, "vc" },
596
+ { SPARC_CC_ICC_VS, "vs" },
597
+ { SPARC_CC_ICC_A, "a" },
598
+ { SPARC_CC_ICC_N, "n" },
599
+ { SPARC_CC_ICC_E, "e" },
600
+ { SPARC_CC_ICC_G, "g" },
601
+ { SPARC_CC_ICC_L, "l" },
602
+ };
603
+
604
+ static const name_map alias_fcc_maps[] = {
605
+ { SPARC_CC_FCC_UGE, "uge" },
606
+ { SPARC_CC_FCC_ULE, "ule" },
607
+ { SPARC_CC_FCC_UG, "ug" },
608
+ { SPARC_CC_FCC_UL, "ul" },
609
+ { SPARC_CC_FCC_LG, "lg" },
610
+ { SPARC_CC_FCC_NE, "ne" },
611
+ { SPARC_CC_FCC_UE, "ue" },
612
+ { SPARC_CC_FCC_GE, "ge" },
613
+ { SPARC_CC_FCC_LE, "le" },
614
+ { SPARC_CC_FCC_A, "a" },
615
+ { SPARC_CC_FCC_N, "n" },
616
+ { SPARC_CC_FCC_U, "u" },
617
+ { SPARC_CC_FCC_G, "g" },
618
+ { SPARC_CC_FCC_L, "l" },
619
+ { SPARC_CC_FCC_E, "e" },
620
+ { SPARC_CC_FCC_O, "o" },
621
+ };
622
+
623
+ // map CC string to CC id
624
+ sparc_cc Sparc_map_ICC(const char *name)
625
+ {
626
+ unsigned int i;
627
+
628
+ i = name2id(alias_icc_maps, ARR_SIZE(alias_icc_maps), name);
629
+
630
+ return (i != -1)? i : SPARC_CC_INVALID;
631
+ }
632
+
633
+ sparc_cc Sparc_map_FCC(const char *name)
634
+ {
635
+ unsigned int i;
636
+
637
+ i = name2id(alias_fcc_maps, ARR_SIZE(alias_fcc_maps), name);
638
+
639
+ return (i != -1)? i : SPARC_CC_INVALID;
640
+ }
641
+
642
+ static const name_map hint_maps[] = {
643
+ { SPARC_HINT_A, ",a" },
644
+ { SPARC_HINT_A | SPARC_HINT_PN, ",a,pn" },
645
+ { SPARC_HINT_PN, ",pn" },
646
+ };
647
+
648
+ sparc_hint Sparc_map_hint(const char *name)
649
+ {
650
+ size_t i, l1, l2;
651
+
652
+ l1 = strlen(name);
653
+ for(i = 0; i < ARR_SIZE(hint_maps); i++) {
654
+ l2 = strlen(hint_maps[i].name);
655
+ if (l1 > l2) {
656
+ // compare the last part of @name with this hint string
657
+ if (!strcmp(hint_maps[i].name, name + (l1 - l2)))
658
+ return hint_maps[i].id;
659
+ }
660
+ }
661
+
662
+ return SPARC_HINT_INVALID;
663
+ }
664
+
665
+ #endif
@@ -0,0 +1,34 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
3
+
4
+ #ifndef CS_SPARC_MAP_H
5
+ #define CS_SPARC_MAP_H
6
+
7
+ #include "capstone/capstone.h"
8
+
9
+ // return name of regiser in friendly string
10
+ const char *Sparc_reg_name(csh handle, unsigned int reg);
11
+
12
+ // given internal insn id, return public instruction info
13
+ void Sparc_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id);
14
+
15
+ const char *Sparc_insn_name(csh handle, unsigned int id);
16
+
17
+ const char *Sparc_group_name(csh handle, unsigned int id);
18
+
19
+ // map internal raw register to 'public' register
20
+ sparc_reg Sparc_map_register(unsigned int r);
21
+
22
+ // map instruction name to instruction ID (public)
23
+ // this is for alias instructions only
24
+ sparc_reg Sparc_map_insn(const char *name);
25
+
26
+ // map CC string to CC id
27
+ sparc_cc Sparc_map_ICC(const char *name);
28
+
29
+ sparc_cc Sparc_map_FCC(const char *name);
30
+
31
+ sparc_hint Sparc_map_hint(const char *name);
32
+
33
+ #endif
34
+