hexcore-capstone 1.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (332) hide show
  1. package/LICENSE +26 -0
  2. package/README.md +191 -0
  3. package/binding.gyp +168 -0
  4. package/deps/capstone/LEB128.h +38 -0
  5. package/deps/capstone/MCDisassembler.h +14 -0
  6. package/deps/capstone/MCFixedLenDisassembler.h +32 -0
  7. package/deps/capstone/MCInst.c +270 -0
  8. package/deps/capstone/MCInst.h +165 -0
  9. package/deps/capstone/MCInstrDesc.c +41 -0
  10. package/deps/capstone/MCInstrDesc.h +167 -0
  11. package/deps/capstone/MCRegisterInfo.c +151 -0
  12. package/deps/capstone/MCRegisterInfo.h +116 -0
  13. package/deps/capstone/Mapping.c +254 -0
  14. package/deps/capstone/Mapping.h +174 -0
  15. package/deps/capstone/MathExtras.h +442 -0
  16. package/deps/capstone/SStream.c +181 -0
  17. package/deps/capstone/SStream.h +40 -0
  18. package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
  19. package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
  20. package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
  21. package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
  22. package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
  23. package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
  24. package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
  25. package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
  26. package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
  27. package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
  28. package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
  29. package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
  30. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
  31. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
  32. package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
  33. package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
  34. package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
  35. package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
  36. package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
  37. package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
  38. package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
  39. package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
  40. package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
  41. package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
  42. package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
  43. package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
  44. package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
  45. package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
  46. package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
  47. package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
  48. package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
  49. package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
  50. package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
  51. package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
  52. package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
  53. package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
  54. package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
  55. package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
  56. package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
  57. package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
  58. package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
  59. package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
  60. package/deps/capstone/arch/ARM/ARMModule.c +63 -0
  61. package/deps/capstone/arch/ARM/ARMModule.h +12 -0
  62. package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
  63. package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
  64. package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
  65. package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
  66. package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
  67. package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
  68. package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
  69. package/deps/capstone/arch/BPF/BPFModule.c +34 -0
  70. package/deps/capstone/arch/BPF/BPFModule.h +12 -0
  71. package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
  72. package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
  73. package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
  74. package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
  75. package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
  76. package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
  77. package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
  78. package/deps/capstone/arch/EVM/EVMModule.c +33 -0
  79. package/deps/capstone/arch/EVM/EVMModule.h +12 -0
  80. package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
  81. package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
  82. package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
  83. package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
  84. package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
  85. package/deps/capstone/arch/M680X/M680XModule.c +77 -0
  86. package/deps/capstone/arch/M680X/M680XModule.h +12 -0
  87. package/deps/capstone/arch/M680X/cpu12.inc +335 -0
  88. package/deps/capstone/arch/M680X/hcs08.inc +60 -0
  89. package/deps/capstone/arch/M680X/hd6301.inc +15 -0
  90. package/deps/capstone/arch/M680X/hd6309.inc +259 -0
  91. package/deps/capstone/arch/M680X/insn_props.inc +367 -0
  92. package/deps/capstone/arch/M680X/m6800.inc +277 -0
  93. package/deps/capstone/arch/M680X/m6801.inc +39 -0
  94. package/deps/capstone/arch/M680X/m6805.inc +277 -0
  95. package/deps/capstone/arch/M680X/m6808.inc +91 -0
  96. package/deps/capstone/arch/M680X/m6809.inc +352 -0
  97. package/deps/capstone/arch/M680X/m6811.inc +105 -0
  98. package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
  99. package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
  100. package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
  101. package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
  102. package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
  103. package/deps/capstone/arch/M68K/M68KModule.c +42 -0
  104. package/deps/capstone/arch/M68K/M68KModule.h +12 -0
  105. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
  106. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
  107. package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
  108. package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
  109. package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
  110. package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
  111. package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
  112. package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
  113. package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
  114. package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
  115. package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
  116. package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
  117. package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
  118. package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
  119. package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
  120. package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
  121. package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
  122. package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
  123. package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
  124. package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
  125. package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
  126. package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
  127. package/deps/capstone/arch/Mips/MipsModule.c +52 -0
  128. package/deps/capstone/arch/Mips/MipsModule.h +12 -0
  129. package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
  130. package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
  131. package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
  132. package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
  133. package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
  134. package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
  135. package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
  136. package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
  137. package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
  138. package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
  139. package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
  140. package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
  141. package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
  142. package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
  143. package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
  144. package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
  145. package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
  146. package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
  147. package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
  148. package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
  149. package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
  150. package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
  151. package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
  152. package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
  153. package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
  154. package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
  155. package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
  156. package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
  157. package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
  158. package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
  159. package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
  160. package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
  161. package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
  162. package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
  163. package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
  164. package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
  165. package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
  166. package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
  167. package/deps/capstone/arch/SH/SHModule.c +39 -0
  168. package/deps/capstone/arch/SH/SHModule.h +12 -0
  169. package/deps/capstone/arch/SH/mktable.rb +390 -0
  170. package/deps/capstone/arch/Sparc/Sparc.h +63 -0
  171. package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
  172. package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
  173. package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
  174. package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
  175. package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
  176. package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
  177. package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
  178. package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
  179. package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
  180. package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
  181. package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
  182. package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
  183. package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
  184. package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
  185. package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
  186. package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
  187. package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
  188. package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
  189. package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
  190. package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
  191. package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
  192. package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
  193. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
  194. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
  195. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
  196. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
  197. package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
  198. package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
  199. package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
  200. package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
  201. package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
  202. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
  203. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
  204. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
  205. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
  206. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
  207. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
  208. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
  209. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
  210. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
  211. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
  212. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
  213. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
  214. package/deps/capstone/arch/TriCore/TriCore.td +134 -0
  215. package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
  216. package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
  217. package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
  218. package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
  219. package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
  220. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
  221. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
  222. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
  223. package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
  224. package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
  225. package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
  226. package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
  227. package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
  228. package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
  229. package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
  230. package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
  231. package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
  232. package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
  233. package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
  234. package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
  235. package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
  236. package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
  237. package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
  238. package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
  239. package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
  240. package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
  241. package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
  242. package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
  243. package/deps/capstone/arch/WASM/WASMModule.c +33 -0
  244. package/deps/capstone/arch/WASM/WASMModule.h +12 -0
  245. package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
  246. package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
  247. package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
  248. package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
  249. package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
  250. package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
  251. package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
  252. package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
  253. package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
  254. package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
  255. package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
  256. package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
  257. package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
  258. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
  259. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
  260. package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
  261. package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
  262. package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
  263. package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
  264. package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
  265. package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
  266. package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
  267. package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
  268. package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
  269. package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
  270. package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
  271. package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
  272. package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
  273. package/deps/capstone/arch/X86/X86Mapping.h +96 -0
  274. package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
  275. package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
  276. package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
  277. package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
  278. package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
  279. package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
  280. package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
  281. package/deps/capstone/arch/X86/X86Module.c +94 -0
  282. package/deps/capstone/arch/X86/X86Module.h +12 -0
  283. package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
  284. package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
  285. package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
  286. package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
  287. package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
  288. package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
  289. package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
  290. package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
  291. package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
  292. package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
  293. package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
  294. package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
  295. package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
  296. package/deps/capstone/cs.c +1664 -0
  297. package/deps/capstone/cs_priv.h +101 -0
  298. package/deps/capstone/cs_simple_types.h +886 -0
  299. package/deps/capstone/include/capstone/arm.h +991 -0
  300. package/deps/capstone/include/capstone/arm64.h +3159 -0
  301. package/deps/capstone/include/capstone/bpf.h +209 -0
  302. package/deps/capstone/include/capstone/capstone.h +875 -0
  303. package/deps/capstone/include/capstone/evm.h +188 -0
  304. package/deps/capstone/include/capstone/m680x.h +537 -0
  305. package/deps/capstone/include/capstone/m68k.h +613 -0
  306. package/deps/capstone/include/capstone/mips.h +956 -0
  307. package/deps/capstone/include/capstone/mos65xx.h +204 -0
  308. package/deps/capstone/include/capstone/platform.h +122 -0
  309. package/deps/capstone/include/capstone/ppc.h +2108 -0
  310. package/deps/capstone/include/capstone/riscv.h +531 -0
  311. package/deps/capstone/include/capstone/sh.h +465 -0
  312. package/deps/capstone/include/capstone/sparc.h +520 -0
  313. package/deps/capstone/include/capstone/systemz.h +2601 -0
  314. package/deps/capstone/include/capstone/tms320c64x.h +359 -0
  315. package/deps/capstone/include/capstone/tricore.h +567 -0
  316. package/deps/capstone/include/capstone/wasm.h +250 -0
  317. package/deps/capstone/include/capstone/x86.h +1986 -0
  318. package/deps/capstone/include/capstone/xcore.h +235 -0
  319. package/deps/capstone/include/platform.h +110 -0
  320. package/deps/capstone/include/windowsce/intrin.h +12 -0
  321. package/deps/capstone/include/windowsce/stdint.h +133 -0
  322. package/deps/capstone/utils.c +140 -0
  323. package/deps/capstone/utils.h +54 -0
  324. package/index.d.ts +448 -0
  325. package/index.js +64 -0
  326. package/index.mjs +25 -0
  327. package/package.json +82 -0
  328. package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
  329. package/src/capstone_wrapper.cpp +910 -0
  330. package/src/capstone_wrapper.h +147 -0
  331. package/src/disasm_async_worker.h +215 -0
  332. package/src/main.cpp +145 -0
@@ -0,0 +1,1664 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
3
+ #if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)
4
+ #pragma warning(disable:4996) // disable MSVC's warning on strcpy()
5
+ #pragma warning(disable:28719) // disable MSVC's warning on strcpy()
6
+ #endif
7
+ #if defined(CAPSTONE_HAS_OSXKERNEL)
8
+ #include <Availability.h>
9
+ #include <libkern/libkern.h>
10
+ #else
11
+ #include <stddef.h>
12
+ #include <stdio.h>
13
+ #include <stdlib.h>
14
+ #endif
15
+
16
+ #include <string.h>
17
+ #include <capstone/capstone.h>
18
+
19
+ #include "utils.h"
20
+ #include "MCRegisterInfo.h"
21
+
22
+ #if defined(_KERNEL_MODE)
23
+ #include "windows\winkernel_mm.h"
24
+ #endif
25
+
26
+ // Issue #681: Windows kernel does not support formatting float point
27
+ #if defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET)
28
+ #if defined(CAPSTONE_HAS_ARM) || defined(CAPSTONE_HAS_ARM64) || defined(CAPSTONE_HAS_M68K)
29
+ #define CAPSTONE_STR_INTERNAL(x) #x
30
+ #define CAPSTONE_STR(x) CAPSTONE_STR_INTERNAL(x)
31
+ #define CAPSTONE_MSVC_WRANING_PREFIX __FILE__ "("CAPSTONE_STR(__LINE__)") : warning message : "
32
+
33
+ #pragma message(CAPSTONE_MSVC_WRANING_PREFIX "Windows driver does not support full features for selected architecture(s). Define CAPSTONE_DIET to compile Capstone with only supported features. See issue #681 for details.")
34
+
35
+ #undef CAPSTONE_MSVC_WRANING_PREFIX
36
+ #undef CAPSTONE_STR
37
+ #undef CAPSTONE_STR_INTERNAL
38
+ #endif
39
+ #endif // defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET)
40
+
41
+ #if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(CAPSTONE_DIET) && !defined(_KERNEL_MODE)
42
+ #define INSN_CACHE_SIZE 32
43
+ #else
44
+ // reduce stack variable size for kernel/firmware
45
+ #define INSN_CACHE_SIZE 8
46
+ #endif
47
+
48
+ // default SKIPDATA mnemonic
49
+ #ifndef CAPSTONE_DIET
50
+ #define SKIPDATA_MNEM ".byte"
51
+ #else // No printing is available in diet mode
52
+ #define SKIPDATA_MNEM NULL
53
+ #endif
54
+
55
+ #include "arch/AArch64/AArch64Module.h"
56
+ #include "arch/ARM/ARMModule.h"
57
+ #include "arch/EVM/EVMModule.h"
58
+ #include "arch/WASM/WASMModule.h"
59
+ #include "arch/M680X/M680XModule.h"
60
+ #include "arch/M68K/M68KModule.h"
61
+ #include "arch/Mips/MipsModule.h"
62
+ #include "arch/PowerPC/PPCModule.h"
63
+ #include "arch/Sparc/SparcModule.h"
64
+ #include "arch/SystemZ/SystemZModule.h"
65
+ #include "arch/TMS320C64x/TMS320C64xModule.h"
66
+ #include "arch/X86/X86Module.h"
67
+ #include "arch/XCore/XCoreModule.h"
68
+ #include "arch/RISCV/RISCVModule.h"
69
+ #include "arch/MOS65XX/MOS65XXModule.h"
70
+ #include "arch/BPF/BPFModule.h"
71
+ #include "arch/SH/SHModule.h"
72
+ #include "arch/TriCore/TriCoreModule.h"
73
+
74
+ static const struct {
75
+ // constructor initialization
76
+ cs_err (*arch_init)(cs_struct *);
77
+ // support cs_option()
78
+ cs_err (*arch_option)(cs_struct *, cs_opt_type, size_t value);
79
+ // bitmask for finding disallowed modes for an arch:
80
+ // to be called in cs_open()/cs_option()
81
+ cs_mode arch_disallowed_mode_mask;
82
+ } arch_configs[MAX_ARCH] = {
83
+ #ifdef CAPSTONE_HAS_ARM
84
+ {
85
+ ARM_global_init,
86
+ ARM_option,
87
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_V8 | CS_MODE_MCLASS
88
+ | CS_MODE_THUMB | CS_MODE_BIG_ENDIAN)
89
+ },
90
+ #else
91
+ { NULL, NULL, 0 },
92
+ #endif
93
+ #ifdef CAPSTONE_HAS_ARM64
94
+ {
95
+ AArch64_global_init,
96
+ AArch64_option,
97
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_BIG_ENDIAN),
98
+ },
99
+ #else
100
+ { NULL, NULL, 0 },
101
+ #endif
102
+ #ifdef CAPSTONE_HAS_MIPS
103
+ {
104
+ Mips_global_init,
105
+ Mips_option,
106
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_MICRO
107
+ | CS_MODE_MIPS32R6 | CS_MODE_BIG_ENDIAN | CS_MODE_MIPS2 | CS_MODE_MIPS3),
108
+ },
109
+ #else
110
+ { NULL, NULL, 0 },
111
+ #endif
112
+ #ifdef CAPSTONE_HAS_X86
113
+ {
114
+ X86_global_init,
115
+ X86_option,
116
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_16),
117
+ },
118
+ #else
119
+ { NULL, NULL, 0 },
120
+ #endif
121
+ #ifdef CAPSTONE_HAS_POWERPC
122
+ {
123
+ PPC_global_init,
124
+ PPC_option,
125
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_BIG_ENDIAN
126
+ | CS_MODE_QPX | CS_MODE_PS),
127
+ },
128
+ #else
129
+ { NULL, NULL, 0 },
130
+ #endif
131
+ #ifdef CAPSTONE_HAS_SPARC
132
+ {
133
+ Sparc_global_init,
134
+ Sparc_option,
135
+ ~(CS_MODE_BIG_ENDIAN | CS_MODE_V9),
136
+ },
137
+ #else
138
+ { NULL, NULL, 0 },
139
+ #endif
140
+ #ifdef CAPSTONE_HAS_SYSZ
141
+ {
142
+ SystemZ_global_init,
143
+ SystemZ_option,
144
+ ~(CS_MODE_BIG_ENDIAN),
145
+ },
146
+ #else
147
+ { NULL, NULL, 0 },
148
+ #endif
149
+ #ifdef CAPSTONE_HAS_XCORE
150
+ {
151
+ XCore_global_init,
152
+ XCore_option,
153
+ ~(CS_MODE_BIG_ENDIAN),
154
+ },
155
+ #else
156
+ { NULL, NULL, 0 },
157
+ #endif
158
+ #ifdef CAPSTONE_HAS_M68K
159
+ {
160
+ M68K_global_init,
161
+ M68K_option,
162
+ ~(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_000 | CS_MODE_M68K_010 | CS_MODE_M68K_020
163
+ | CS_MODE_M68K_030 | CS_MODE_M68K_040 | CS_MODE_M68K_060),
164
+ },
165
+ #else
166
+ { NULL, NULL, 0 },
167
+ #endif
168
+ #ifdef CAPSTONE_HAS_TMS320C64X
169
+ {
170
+ TMS320C64x_global_init,
171
+ TMS320C64x_option,
172
+ ~(CS_MODE_BIG_ENDIAN),
173
+ },
174
+ #else
175
+ { NULL, NULL, 0 },
176
+ #endif
177
+ #ifdef CAPSTONE_HAS_M680X
178
+ {
179
+ M680X_global_init,
180
+ M680X_option,
181
+ ~(CS_MODE_M680X_6301 | CS_MODE_M680X_6309 | CS_MODE_M680X_6800
182
+ | CS_MODE_M680X_6801 | CS_MODE_M680X_6805 | CS_MODE_M680X_6808
183
+ | CS_MODE_M680X_6809 | CS_MODE_M680X_6811 | CS_MODE_M680X_CPU12
184
+ | CS_MODE_M680X_HCS08),
185
+ },
186
+ #else
187
+ { NULL, NULL, 0 },
188
+ #endif
189
+ #ifdef CAPSTONE_HAS_EVM
190
+ {
191
+ EVM_global_init,
192
+ EVM_option,
193
+ 0,
194
+ },
195
+ #else
196
+ { NULL, NULL, 0 },
197
+ #endif
198
+ #ifdef CAPSTONE_HAS_MOS65XX
199
+ {
200
+ MOS65XX_global_init,
201
+ MOS65XX_option,
202
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_MOS65XX_6502 | CS_MODE_MOS65XX_65C02
203
+ | CS_MODE_MOS65XX_W65C02 | CS_MODE_MOS65XX_65816_LONG_MX),
204
+ },
205
+ #else
206
+ { NULL, NULL, 0 },
207
+ #endif
208
+ #ifdef CAPSTONE_HAS_WASM
209
+ {
210
+ WASM_global_init,
211
+ WASM_option,
212
+ 0,
213
+ },
214
+ #else
215
+ { NULL, NULL, 0 },
216
+ #endif
217
+ #ifdef CAPSTONE_HAS_BPF
218
+ {
219
+ BPF_global_init,
220
+ BPF_option,
221
+ ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_CLASSIC | CS_MODE_BPF_EXTENDED
222
+ | CS_MODE_BIG_ENDIAN),
223
+ },
224
+ #else
225
+ { NULL, NULL, 0 },
226
+ #endif
227
+ #ifdef CAPSTONE_HAS_RISCV
228
+ {
229
+ RISCV_global_init,
230
+ RISCV_option,
231
+ ~(CS_MODE_RISCV32 | CS_MODE_RISCV64 | CS_MODE_RISCVC),
232
+ },
233
+ #else
234
+ { NULL, NULL, 0 },
235
+ #endif
236
+ #ifdef CAPSTONE_HAS_SH
237
+ {
238
+ SH_global_init,
239
+ SH_option,
240
+ ~(CS_MODE_SH2 | CS_MODE_SH2A | CS_MODE_SH3 |
241
+ CS_MODE_SH4 | CS_MODE_SH4A |
242
+ CS_MODE_SHFPU | CS_MODE_SHDSP|CS_MODE_BIG_ENDIAN),
243
+ },
244
+ #else
245
+ { NULL, NULL, 0 },
246
+ #endif
247
+ #ifdef CAPSTONE_HAS_TRICORE
248
+ {
249
+ TRICORE_global_init,
250
+ TRICORE_option,
251
+ ~(CS_MODE_TRICORE_110 | CS_MODE_TRICORE_120 | CS_MODE_TRICORE_130
252
+ | CS_MODE_TRICORE_131 | CS_MODE_TRICORE_160 | CS_MODE_TRICORE_161
253
+ | CS_MODE_TRICORE_162 | CS_MODE_LITTLE_ENDIAN),
254
+ },
255
+ #else
256
+ { NULL, NULL, 0 },
257
+ #endif
258
+ };
259
+
260
+ // bitmask of enabled architectures
261
+ static const uint32_t all_arch = 0
262
+ #ifdef CAPSTONE_HAS_ARM
263
+ | (1 << CS_ARCH_ARM)
264
+ #endif
265
+ #ifdef CAPSTONE_HAS_ARM64
266
+ | (1 << CS_ARCH_ARM64)
267
+ #endif
268
+ #ifdef CAPSTONE_HAS_MIPS
269
+ | (1 << CS_ARCH_MIPS)
270
+ #endif
271
+ #ifdef CAPSTONE_HAS_X86
272
+ | (1 << CS_ARCH_X86)
273
+ #endif
274
+ #ifdef CAPSTONE_HAS_POWERPC
275
+ | (1 << CS_ARCH_PPC)
276
+ #endif
277
+ #ifdef CAPSTONE_HAS_SPARC
278
+ | (1 << CS_ARCH_SPARC)
279
+ #endif
280
+ #ifdef CAPSTONE_HAS_SYSZ
281
+ | (1 << CS_ARCH_SYSZ)
282
+ #endif
283
+ #ifdef CAPSTONE_HAS_XCORE
284
+ | (1 << CS_ARCH_XCORE)
285
+ #endif
286
+ #ifdef CAPSTONE_HAS_M68K
287
+ | (1 << CS_ARCH_M68K)
288
+ #endif
289
+ #ifdef CAPSTONE_HAS_TMS320C64X
290
+ | (1 << CS_ARCH_TMS320C64X)
291
+ #endif
292
+ #ifdef CAPSTONE_HAS_M680X
293
+ | (1 << CS_ARCH_M680X)
294
+ #endif
295
+ #ifdef CAPSTONE_HAS_EVM
296
+ | (1 << CS_ARCH_EVM)
297
+ #endif
298
+ #ifdef CAPSTONE_HAS_MOS65XX
299
+ | (1 << CS_ARCH_MOS65XX)
300
+ #endif
301
+ #ifdef CAPSTONE_HAS_WASM
302
+ | (1 << CS_ARCH_WASM)
303
+ #endif
304
+ #ifdef CAPSTONE_HAS_BPF
305
+ | (1 << CS_ARCH_BPF)
306
+ #endif
307
+ #ifdef CAPSTONE_HAS_RISCV
308
+ | (1 << CS_ARCH_RISCV)
309
+ #endif
310
+ #ifdef CAPSTONE_HAS_SH
311
+ | (1 << CS_ARCH_SH)
312
+ #endif
313
+ #ifdef CAPSTONE_HAS_TRICORE
314
+ | (1 << CS_ARCH_TRICORE)
315
+ #endif
316
+ ;
317
+
318
+
319
+ #if defined(CAPSTONE_USE_SYS_DYN_MEM)
320
+ #if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE)
321
+ // default
322
+ cs_malloc_t cs_mem_malloc = malloc;
323
+ cs_calloc_t cs_mem_calloc = calloc;
324
+ cs_realloc_t cs_mem_realloc = realloc;
325
+ cs_free_t cs_mem_free = free;
326
+ #if defined(_WIN32_WCE)
327
+ cs_vsnprintf_t cs_vsnprintf = _vsnprintf;
328
+ #else
329
+ cs_vsnprintf_t cs_vsnprintf = vsnprintf;
330
+ #endif // defined(_WIN32_WCE)
331
+
332
+ #elif defined(_KERNEL_MODE)
333
+ // Windows driver
334
+ cs_malloc_t cs_mem_malloc = cs_winkernel_malloc;
335
+ cs_calloc_t cs_mem_calloc = cs_winkernel_calloc;
336
+ cs_realloc_t cs_mem_realloc = cs_winkernel_realloc;
337
+ cs_free_t cs_mem_free = cs_winkernel_free;
338
+ cs_vsnprintf_t cs_vsnprintf = cs_winkernel_vsnprintf;
339
+ #else
340
+ // OSX kernel
341
+ extern void* kern_os_malloc(size_t size);
342
+ extern void kern_os_free(void* addr);
343
+ extern void* kern_os_realloc(void* addr, size_t nsize);
344
+
345
+ static void* cs_kern_os_calloc(size_t num, size_t size)
346
+ {
347
+ return kern_os_malloc(num * size); // malloc bzeroes the buffer
348
+ }
349
+
350
+ cs_malloc_t cs_mem_malloc = kern_os_malloc;
351
+ cs_calloc_t cs_mem_calloc = cs_kern_os_calloc;
352
+ cs_realloc_t cs_mem_realloc = kern_os_realloc;
353
+ cs_free_t cs_mem_free = kern_os_free;
354
+ cs_vsnprintf_t cs_vsnprintf = vsnprintf;
355
+ #endif // !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE)
356
+ #else
357
+ // User-defined
358
+ cs_malloc_t cs_mem_malloc = NULL;
359
+ cs_calloc_t cs_mem_calloc = NULL;
360
+ cs_realloc_t cs_mem_realloc = NULL;
361
+ cs_free_t cs_mem_free = NULL;
362
+ cs_vsnprintf_t cs_vsnprintf = NULL;
363
+
364
+ #endif // defined(CAPSTONE_USE_SYS_DYN_MEM)
365
+
366
+ CAPSTONE_EXPORT
367
+ unsigned int CAPSTONE_API cs_version(int *major, int *minor)
368
+ {
369
+ if (major != NULL && minor != NULL) {
370
+ *major = CS_API_MAJOR;
371
+ *minor = CS_API_MINOR;
372
+ }
373
+
374
+ return (CS_API_MAJOR << 8) + CS_API_MINOR;
375
+ }
376
+
377
+ CAPSTONE_EXPORT
378
+ bool CAPSTONE_API cs_support(int query)
379
+ {
380
+ if (query == CS_ARCH_ALL)
381
+ return all_arch == ((1 << CS_ARCH_ARM) | (1 << CS_ARCH_ARM64) |
382
+ (1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) |
383
+ (1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) |
384
+ (1 << CS_ARCH_SYSZ) | (1 << CS_ARCH_XCORE) |
385
+ (1 << CS_ARCH_M68K) | (1 << CS_ARCH_TMS320C64X) |
386
+ (1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM) |
387
+ (1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX) |
388
+ (1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF) |
389
+ (1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE));
390
+
391
+ if ((unsigned int)query < CS_ARCH_MAX)
392
+ return all_arch & (1 << query);
393
+
394
+ if (query == CS_SUPPORT_DIET) {
395
+ #ifdef CAPSTONE_DIET
396
+ return true;
397
+ #else
398
+ return false;
399
+ #endif
400
+ }
401
+
402
+ if (query == CS_SUPPORT_X86_REDUCE) {
403
+ #if defined(CAPSTONE_HAS_X86) && defined(CAPSTONE_X86_REDUCE)
404
+ return true;
405
+ #else
406
+ return false;
407
+ #endif
408
+ }
409
+
410
+ // unsupported query
411
+ return false;
412
+ }
413
+
414
+ CAPSTONE_EXPORT
415
+ cs_err CAPSTONE_API cs_errno(csh handle)
416
+ {
417
+ struct cs_struct *ud;
418
+ if (!handle)
419
+ return CS_ERR_CSH;
420
+
421
+ ud = (struct cs_struct *)(uintptr_t)handle;
422
+
423
+ return ud->errnum;
424
+ }
425
+
426
+ CAPSTONE_EXPORT
427
+ const char * CAPSTONE_API cs_strerror(cs_err code)
428
+ {
429
+ switch(code) {
430
+ default:
431
+ return "Unknown error code";
432
+ case CS_ERR_OK:
433
+ return "OK (CS_ERR_OK)";
434
+ case CS_ERR_MEM:
435
+ return "Out of memory (CS_ERR_MEM)";
436
+ case CS_ERR_ARCH:
437
+ return "Invalid/unsupported architecture(CS_ERR_ARCH)";
438
+ case CS_ERR_HANDLE:
439
+ return "Invalid handle (CS_ERR_HANDLE)";
440
+ case CS_ERR_CSH:
441
+ return "Invalid csh (CS_ERR_CSH)";
442
+ case CS_ERR_MODE:
443
+ return "Invalid mode (CS_ERR_MODE)";
444
+ case CS_ERR_OPTION:
445
+ return "Invalid option (CS_ERR_OPTION)";
446
+ case CS_ERR_DETAIL:
447
+ return "Details are unavailable (CS_ERR_DETAIL)";
448
+ case CS_ERR_MEMSETUP:
449
+ return "Dynamic memory management uninitialized (CS_ERR_MEMSETUP)";
450
+ case CS_ERR_VERSION:
451
+ return "Different API version between core & binding (CS_ERR_VERSION)";
452
+ case CS_ERR_DIET:
453
+ return "Information irrelevant in diet engine (CS_ERR_DIET)";
454
+ case CS_ERR_SKIPDATA:
455
+ return "Information irrelevant for 'data' instruction in SKIPDATA mode (CS_ERR_SKIPDATA)";
456
+ case CS_ERR_X86_ATT:
457
+ return "AT&T syntax is unavailable (CS_ERR_X86_ATT)";
458
+ case CS_ERR_X86_INTEL:
459
+ return "INTEL syntax is unavailable (CS_ERR_X86_INTEL)";
460
+ case CS_ERR_X86_MASM:
461
+ return "MASM syntax is unavailable (CS_ERR_X86_MASM)";
462
+ }
463
+ }
464
+
465
+ CAPSTONE_EXPORT
466
+ cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
467
+ {
468
+ cs_err err;
469
+ struct cs_struct *ud;
470
+ if (!cs_mem_malloc || !cs_mem_calloc || !cs_mem_realloc || !cs_mem_free || !cs_vsnprintf)
471
+ // Error: before cs_open(), dynamic memory management must be initialized
472
+ // with cs_option(CS_OPT_MEM)
473
+ return CS_ERR_MEMSETUP;
474
+
475
+ if (arch < CS_ARCH_MAX && arch_configs[arch].arch_init) {
476
+ // verify if requested mode is valid
477
+ if (mode & arch_configs[arch].arch_disallowed_mode_mask) {
478
+ *handle = 0;
479
+ return CS_ERR_MODE;
480
+ }
481
+
482
+ ud = cs_mem_calloc(1, sizeof(*ud));
483
+ if (!ud) {
484
+ // memory insufficient
485
+ return CS_ERR_MEM;
486
+ }
487
+
488
+ ud->errnum = CS_ERR_OK;
489
+ ud->arch = arch;
490
+ ud->mode = mode;
491
+ // by default, do not break instruction into details
492
+ ud->detail = CS_OPT_OFF;
493
+
494
+ // default skipdata setup
495
+ ud->skipdata_setup.mnemonic = SKIPDATA_MNEM;
496
+
497
+ err = arch_configs[ud->arch].arch_init(ud);
498
+ if (err) {
499
+ cs_mem_free(ud);
500
+ *handle = 0;
501
+ return err;
502
+ }
503
+
504
+ *handle = (uintptr_t)ud;
505
+
506
+ return CS_ERR_OK;
507
+ } else {
508
+ *handle = 0;
509
+ return CS_ERR_ARCH;
510
+ }
511
+ }
512
+
513
+ CAPSTONE_EXPORT
514
+ cs_err CAPSTONE_API cs_close(csh *handle)
515
+ {
516
+ struct cs_struct *ud;
517
+ struct insn_mnem *next, *tmp;
518
+
519
+ if (*handle == 0)
520
+ // invalid handle
521
+ return CS_ERR_CSH;
522
+
523
+ ud = (struct cs_struct *)(*handle);
524
+
525
+ if (ud->printer_info)
526
+ cs_mem_free(ud->printer_info);
527
+
528
+ // free the linked list of customized mnemonic
529
+ tmp = ud->mnem_list;
530
+ while(tmp) {
531
+ next = tmp->next;
532
+ cs_mem_free(tmp);
533
+ tmp = next;
534
+ }
535
+
536
+ cs_mem_free(ud->insn_cache);
537
+
538
+ memset(ud, 0, sizeof(*ud));
539
+ cs_mem_free(ud);
540
+
541
+ // invalidate this handle by ZERO out its value.
542
+ // this is to make sure it is unusable after cs_close()
543
+ *handle = 0;
544
+
545
+ return CS_ERR_OK;
546
+ }
547
+
548
+ // replace str1 in target with str2; target starts with str1
549
+ // output is put into result (which is array of char with size CS_MNEMONIC_SIZE)
550
+ // return 0 on success, -1 on failure
551
+ static int str_replace(char *result, char *target, const char *str1, char *str2)
552
+ {
553
+ // only perform replacement if the output fits into result
554
+ if (strlen(target) - strlen(str1) + strlen(str2) < CS_MNEMONIC_SIZE - 1) {
555
+ // copy str2 to begining of result
556
+ strcpy(result, str2);
557
+ // skip str1 - already replaced by str2
558
+ strcat(result, target + strlen(str1));
559
+
560
+ return 0;
561
+ } else
562
+ return -1;
563
+ }
564
+
565
+ // fill insn with mnemonic & operands info
566
+ static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
567
+ PostPrinter_t postprinter, const uint8_t *code)
568
+ {
569
+ #ifndef CAPSTONE_DIET
570
+ char *sp, *mnem;
571
+ #endif
572
+ uint16_t copy_size = MIN(sizeof(insn->bytes), insn->size);
573
+
574
+ // fill the instruction bytes.
575
+ // we might skip some redundant bytes in front in the case of X86
576
+ memcpy(insn->bytes, code + insn->size - copy_size, copy_size);
577
+ insn->op_str[0] = '\0';
578
+ insn->size = copy_size;
579
+
580
+ // alias instruction might have ID saved in OpcodePub
581
+ if (MCInst_getOpcodePub(mci))
582
+ insn->id = MCInst_getOpcodePub(mci);
583
+
584
+ // post printer handles some corner cases (hacky)
585
+ if (postprinter)
586
+ postprinter((csh)handle, insn, buffer, mci);
587
+
588
+ #ifndef CAPSTONE_DIET
589
+ mnem = insn->mnemonic;
590
+ // memset(mnem, 0, CS_MNEMONIC_SIZE);
591
+ for (sp = buffer; *sp; sp++) {
592
+ if (*sp == ' '|| *sp == '\t')
593
+ break;
594
+ if (*sp == '|') // lock|rep prefix for x86
595
+ *sp = ' ';
596
+ // copy to @mnemonic
597
+ *mnem = *sp;
598
+ mnem++;
599
+ }
600
+
601
+ *mnem = '\0';
602
+
603
+ // we might have customized mnemonic
604
+ if (handle->mnem_list) {
605
+ struct insn_mnem *tmp = handle->mnem_list;
606
+ while(tmp) {
607
+ if (tmp->insn.id == insn->id) {
608
+ char str[CS_MNEMONIC_SIZE];
609
+
610
+ if (!str_replace(str, insn->mnemonic, cs_insn_name((csh)handle, insn->id), tmp->insn.mnemonic)) {
611
+ // copy result to mnemonic
612
+ (void)strncpy(insn->mnemonic, str, sizeof(insn->mnemonic) - 1);
613
+ insn->mnemonic[sizeof(insn->mnemonic) - 1] = '\0';
614
+ }
615
+
616
+ break;
617
+ }
618
+ tmp = tmp->next;
619
+ }
620
+ }
621
+
622
+ // copy @op_str
623
+ if (*sp) {
624
+ // find the next non-space char
625
+ sp++;
626
+ for (; ((*sp == ' ') || (*sp == '\t')); sp++);
627
+ strncpy(insn->op_str, sp, sizeof(insn->op_str) - 1);
628
+ insn->op_str[sizeof(insn->op_str) - 1] = '\0';
629
+ } else
630
+ insn->op_str[0] = '\0';
631
+
632
+ #endif
633
+ }
634
+
635
+ // how many bytes will we skip when encountering data (CS_OPT_SKIPDATA)?
636
+ // this very much depends on instruction alignment requirement of each arch.
637
+ static uint8_t skipdata_size(cs_struct *handle)
638
+ {
639
+ switch(handle->arch) {
640
+ default:
641
+ // should never reach
642
+ return (uint8_t)-1;
643
+ case CS_ARCH_ARM:
644
+ // skip 2 bytes on Thumb mode.
645
+ if (handle->mode & CS_MODE_THUMB)
646
+ return 2;
647
+ // otherwise, skip 4 bytes
648
+ return 4;
649
+ case CS_ARCH_ARM64:
650
+ case CS_ARCH_MIPS:
651
+ case CS_ARCH_PPC:
652
+ case CS_ARCH_SPARC:
653
+ // skip 4 bytes
654
+ return 4;
655
+ case CS_ARCH_SYSZ:
656
+ // SystemZ instruction's length can be 2, 4 or 6 bytes,
657
+ // so we just skip 2 bytes
658
+ return 2;
659
+ case CS_ARCH_X86:
660
+ // X86 has no restriction on instruction alignment
661
+ return 1;
662
+ case CS_ARCH_XCORE:
663
+ // XCore instruction's length can be 2 or 4 bytes,
664
+ // so we just skip 2 bytes
665
+ return 2;
666
+ case CS_ARCH_M68K:
667
+ // M68K has 2 bytes instruction alignment but contain multibyte instruction so we skip 2 bytes
668
+ return 2;
669
+ case CS_ARCH_TMS320C64X:
670
+ // TMS320C64x alignment is 4.
671
+ return 4;
672
+ case CS_ARCH_M680X:
673
+ // M680X alignment is 1.
674
+ return 1;
675
+ case CS_ARCH_EVM:
676
+ // EVM alignment is 1.
677
+ return 1;
678
+ case CS_ARCH_WASM:
679
+ //WASM alignment is 1
680
+ return 1;
681
+ case CS_ARCH_MOS65XX:
682
+ // MOS65XX alignment is 1.
683
+ return 1;
684
+ case CS_ARCH_BPF:
685
+ // both classic and extended BPF have alignment 8.
686
+ return 8;
687
+ case CS_ARCH_RISCV:
688
+ // special compress mode
689
+ if (handle->mode & CS_MODE_RISCVC)
690
+ return 2;
691
+ return 4;
692
+ case CS_ARCH_SH:
693
+ return 2;
694
+ case CS_ARCH_TRICORE:
695
+ // TriCore instruction's length can be 2 or 4 bytes,
696
+ // so we just skip 2 bytes
697
+ return 2;
698
+ }
699
+ }
700
+
701
+ CAPSTONE_EXPORT
702
+ cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
703
+ {
704
+ struct cs_struct *handle;
705
+ cs_opt_mnem *opt;
706
+
707
+ // cs_option() can be called with NULL handle just for CS_OPT_MEM
708
+ // This is supposed to be executed before all other APIs (even cs_open())
709
+ if (type == CS_OPT_MEM) {
710
+ cs_opt_mem *mem = (cs_opt_mem *)value;
711
+
712
+ cs_mem_malloc = mem->malloc;
713
+ cs_mem_calloc = mem->calloc;
714
+ cs_mem_realloc = mem->realloc;
715
+ cs_mem_free = mem->free;
716
+ cs_vsnprintf = mem->vsnprintf;
717
+
718
+ return CS_ERR_OK;
719
+ }
720
+
721
+ handle = (struct cs_struct *)(uintptr_t)ud;
722
+ if (!handle)
723
+ return CS_ERR_CSH;
724
+
725
+ switch(type) {
726
+ default:
727
+ break;
728
+
729
+ case CS_OPT_UNSIGNED:
730
+ handle->imm_unsigned = (cs_opt_value)value;
731
+ return CS_ERR_OK;
732
+
733
+ case CS_OPT_DETAIL:
734
+ handle->detail = (cs_opt_value)value;
735
+ return CS_ERR_OK;
736
+
737
+ case CS_OPT_SKIPDATA:
738
+ handle->skipdata = (value == CS_OPT_ON);
739
+ if (handle->skipdata) {
740
+ if (handle->skipdata_size == 0) {
741
+ // set the default skipdata size
742
+ handle->skipdata_size = skipdata_size(handle);
743
+ }
744
+ }
745
+ return CS_ERR_OK;
746
+
747
+ case CS_OPT_SKIPDATA_SETUP:
748
+ if (value) {
749
+ handle->skipdata_setup = *((cs_opt_skipdata *)value);
750
+ if (handle->skipdata_setup.mnemonic == NULL) {
751
+ handle->skipdata_setup.mnemonic = SKIPDATA_MNEM;
752
+ }
753
+ }
754
+ return CS_ERR_OK;
755
+
756
+ case CS_OPT_MNEMONIC:
757
+ opt = (cs_opt_mnem *)value;
758
+ if (opt->id) {
759
+ if (opt->mnemonic) {
760
+ struct insn_mnem *tmp;
761
+
762
+ // add new instruction, or replace existing instruction
763
+ // 1. find if we already had this insn in the linked list
764
+ tmp = handle->mnem_list;
765
+ while(tmp) {
766
+ if (tmp->insn.id == opt->id) {
767
+ // found this instruction, so replace its mnemonic
768
+ (void)strncpy(tmp->insn.mnemonic, opt->mnemonic, sizeof(tmp->insn.mnemonic) - 1);
769
+ tmp->insn.mnemonic[sizeof(tmp->insn.mnemonic) - 1] = '\0';
770
+ break;
771
+ }
772
+ tmp = tmp->next;
773
+ }
774
+
775
+ // 2. add this instruction if we have not had it yet
776
+ if (!tmp) {
777
+ tmp = cs_mem_malloc(sizeof(*tmp));
778
+ tmp->insn.id = opt->id;
779
+ (void)strncpy(tmp->insn.mnemonic, opt->mnemonic, sizeof(tmp->insn.mnemonic) - 1);
780
+ tmp->insn.mnemonic[sizeof(tmp->insn.mnemonic) - 1] = '\0';
781
+ // this new instruction is heading the list
782
+ tmp->next = handle->mnem_list;
783
+ handle->mnem_list = tmp;
784
+ }
785
+ return CS_ERR_OK;
786
+ } else {
787
+ struct insn_mnem *prev, *tmp;
788
+
789
+ // we want to delete an existing instruction
790
+ // iterate the list to find the instruction to remove it
791
+ tmp = handle->mnem_list;
792
+ prev = tmp;
793
+ while(tmp) {
794
+ if (tmp->insn.id == opt->id) {
795
+ // delete this instruction
796
+ if (tmp == prev) {
797
+ // head of the list
798
+ handle->mnem_list = tmp->next;
799
+ } else {
800
+ prev->next = tmp->next;
801
+ }
802
+ cs_mem_free(tmp);
803
+ break;
804
+ }
805
+ prev = tmp;
806
+ tmp = tmp->next;
807
+ }
808
+ }
809
+ }
810
+ return CS_ERR_OK;
811
+
812
+ case CS_OPT_MODE:
813
+ // verify if requested mode is valid
814
+ if (value & arch_configs[handle->arch].arch_disallowed_mode_mask) {
815
+ return CS_ERR_OPTION;
816
+ }
817
+ break;
818
+ }
819
+
820
+ return arch_configs[handle->arch].arch_option(handle, type, value);
821
+ }
822
+
823
+ // generate @op_str for data instruction of SKIPDATA
824
+ #ifndef CAPSTONE_DIET
825
+ static void skipdata_opstr(char *opstr, const uint8_t *buffer, size_t size)
826
+ {
827
+ char *p = opstr;
828
+ int len;
829
+ size_t i;
830
+ size_t available = sizeof(((cs_insn*)NULL)->op_str);
831
+
832
+ if (!size) {
833
+ opstr[0] = '\0';
834
+ return;
835
+ }
836
+
837
+ len = cs_snprintf(p, available, "0x%02x", buffer[0]);
838
+ p+= len;
839
+ available -= len;
840
+
841
+ for(i = 1; i < size; i++) {
842
+ len = cs_snprintf(p, available, ", 0x%02x", buffer[i]);
843
+ if (len < 0) {
844
+ break;
845
+ }
846
+ if ((size_t)len > available - 1) {
847
+ break;
848
+ }
849
+ p+= len;
850
+ available -= len;
851
+ }
852
+ }
853
+ #endif
854
+
855
+ // dynamicly allocate memory to contain disasm insn
856
+ // NOTE: caller must free() the allocated memory itself to avoid memory leaking
857
+ CAPSTONE_EXPORT
858
+ size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
859
+ {
860
+ struct cs_struct *handle;
861
+ MCInst mci;
862
+ uint16_t insn_size;
863
+ size_t c = 0, i;
864
+ unsigned int f = 0; // index of the next instruction in the cache
865
+ cs_insn *insn_cache; // cache contains disassembled instructions
866
+ void *total = NULL;
867
+ size_t total_size = 0; // total size of output buffer containing all insns
868
+ bool r;
869
+ void *tmp;
870
+ size_t skipdata_bytes;
871
+ uint64_t offset_org; // save all the original info of the buffer
872
+ size_t size_org;
873
+ const uint8_t *buffer_org;
874
+ unsigned int cache_size = INSN_CACHE_SIZE;
875
+ size_t next_offset;
876
+
877
+ handle = (struct cs_struct *)(uintptr_t)ud;
878
+ if (!handle) {
879
+ // FIXME: how to handle this case:
880
+ // handle->errnum = CS_ERR_HANDLE;
881
+ return 0;
882
+ }
883
+
884
+ handle->errnum = CS_ERR_OK;
885
+
886
+ // reset IT block of ARM structure
887
+ if (handle->arch == CS_ARCH_ARM)
888
+ handle->ITBlock.size = 0;
889
+
890
+ #ifdef CAPSTONE_USE_SYS_DYN_MEM
891
+ if (count > 0 && count <= INSN_CACHE_SIZE)
892
+ cache_size = (unsigned int) count;
893
+ #endif
894
+
895
+ // save the original offset for SKIPDATA
896
+ buffer_org = buffer;
897
+ offset_org = offset;
898
+ size_org = size;
899
+
900
+ total_size = sizeof(cs_insn) * cache_size;
901
+ total = cs_mem_calloc(sizeof(cs_insn), cache_size);
902
+ if (total == NULL) {
903
+ // insufficient memory
904
+ handle->errnum = CS_ERR_MEM;
905
+ return 0;
906
+ }
907
+
908
+ insn_cache = total;
909
+
910
+ while (size > 0) {
911
+ MCInst_Init(&mci);
912
+ mci.csh = handle;
913
+
914
+ // relative branches need to know the address & size of current insn
915
+ mci.address = offset;
916
+
917
+ if (handle->detail) {
918
+ // allocate memory for @detail pointer
919
+ insn_cache->detail = cs_mem_malloc(sizeof(cs_detail));
920
+ } else {
921
+ insn_cache->detail = NULL;
922
+ }
923
+
924
+ // save all the information for non-detailed mode
925
+ mci.flat_insn = insn_cache;
926
+ mci.flat_insn->address = offset;
927
+ #ifdef CAPSTONE_DIET
928
+ // zero out mnemonic & op_str
929
+ mci.flat_insn->mnemonic[0] = '\0';
930
+ mci.flat_insn->op_str[0] = '\0';
931
+ #endif
932
+
933
+ r = handle->disasm(ud, buffer, size, &mci, &insn_size, offset, handle->getinsn_info);
934
+ if (r) {
935
+ SStream ss;
936
+ SStream_Init(&ss);
937
+
938
+ mci.flat_insn->size = insn_size;
939
+
940
+ // map internal instruction opcode to public insn ID
941
+
942
+ handle->insn_id(handle, insn_cache, mci.Opcode);
943
+
944
+ handle->printer(&mci, &ss, handle->printer_info);
945
+ fill_insn(handle, insn_cache, ss.buffer, &mci, handle->post_printer, buffer);
946
+
947
+ // adjust for pseudo opcode (X86)
948
+ if (handle->arch == CS_ARCH_X86 && insn_cache->id != X86_INS_VCMP)
949
+ insn_cache->id += mci.popcode_adjust;
950
+
951
+ next_offset = insn_size;
952
+ } else {
953
+ // encounter a broken instruction
954
+
955
+ // free memory of @detail pointer
956
+ if (handle->detail) {
957
+ cs_mem_free(insn_cache->detail);
958
+ }
959
+
960
+ // if there is no request to skip data, or remaining data is too small,
961
+ // then bail out
962
+ if (!handle->skipdata || handle->skipdata_size > size)
963
+ break;
964
+
965
+ if (handle->skipdata_setup.callback) {
966
+ skipdata_bytes = handle->skipdata_setup.callback(buffer_org, size_org,
967
+ (size_t)(offset - offset_org), handle->skipdata_setup.user_data);
968
+ if (skipdata_bytes > size)
969
+ // remaining data is not enough
970
+ break;
971
+
972
+ if (!skipdata_bytes)
973
+ // user requested not to skip data, so bail out
974
+ break;
975
+ } else
976
+ skipdata_bytes = handle->skipdata_size;
977
+
978
+ // we have to skip some amount of data, depending on arch & mode
979
+ insn_cache->id = 0; // invalid ID for this "data" instruction
980
+ insn_cache->address = offset;
981
+ insn_cache->size = (uint16_t)skipdata_bytes;
982
+ memcpy(insn_cache->bytes, buffer, skipdata_bytes);
983
+ #ifdef CAPSTONE_DIET
984
+ insn_cache->mnemonic[0] = '\0';
985
+ insn_cache->op_str[0] = '\0';
986
+ #else
987
+ strncpy(insn_cache->mnemonic, handle->skipdata_setup.mnemonic,
988
+ sizeof(insn_cache->mnemonic) - 1);
989
+ skipdata_opstr(insn_cache->op_str, buffer, skipdata_bytes);
990
+ #endif
991
+ insn_cache->detail = NULL;
992
+
993
+ next_offset = skipdata_bytes;
994
+ }
995
+
996
+ // one more instruction entering the cache
997
+ f++;
998
+
999
+ // one more instruction disassembled
1000
+ c++;
1001
+ if (count > 0 && c == count)
1002
+ // already got requested number of instructions
1003
+ break;
1004
+
1005
+ if (f == cache_size) {
1006
+ // full cache, so expand the cache to contain incoming insns
1007
+ cache_size = cache_size * 8 / 5; // * 1.6 ~ golden ratio
1008
+ total_size += (sizeof(cs_insn) * cache_size);
1009
+ tmp = cs_mem_realloc(total, total_size);
1010
+ if (tmp == NULL) { // insufficient memory
1011
+ if (handle->detail) {
1012
+ insn_cache = (cs_insn *)total;
1013
+ for (i = 0; i < c; i++, insn_cache++)
1014
+ cs_mem_free(insn_cache->detail);
1015
+ }
1016
+
1017
+ cs_mem_free(total);
1018
+ *insn = NULL;
1019
+ handle->errnum = CS_ERR_MEM;
1020
+ return 0;
1021
+ }
1022
+
1023
+ total = tmp;
1024
+ // continue to fill in the cache after the last instruction
1025
+ insn_cache = (cs_insn *)((char *)total + sizeof(cs_insn) * c);
1026
+
1027
+ // reset f back to 0, so we fill in the cache from begining
1028
+ f = 0;
1029
+ } else
1030
+ insn_cache++;
1031
+
1032
+ buffer += next_offset;
1033
+ size -= next_offset;
1034
+ offset += next_offset;
1035
+ }
1036
+
1037
+ if (!c) {
1038
+ // we did not disassemble any instruction
1039
+ cs_mem_free(total);
1040
+ total = NULL;
1041
+ } else if (f != cache_size) {
1042
+ // total did not fully use the last cache, so downsize it
1043
+ tmp = cs_mem_realloc(total, total_size - (cache_size - f) * sizeof(*insn_cache));
1044
+ if (tmp == NULL) { // insufficient memory
1045
+ // free all detail pointers
1046
+ if (handle->detail) {
1047
+ insn_cache = (cs_insn *)total;
1048
+ for (i = 0; i < c; i++, insn_cache++)
1049
+ cs_mem_free(insn_cache->detail);
1050
+ }
1051
+
1052
+ cs_mem_free(total);
1053
+ *insn = NULL;
1054
+
1055
+ handle->errnum = CS_ERR_MEM;
1056
+ return 0;
1057
+ }
1058
+
1059
+ total = tmp;
1060
+ }
1061
+
1062
+ *insn = total;
1063
+
1064
+ return c;
1065
+ }
1066
+
1067
+ CAPSTONE_EXPORT
1068
+ void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
1069
+ {
1070
+ size_t i;
1071
+
1072
+ // free all detail pointers
1073
+ for (i = 0; i < count; i++)
1074
+ cs_mem_free(insn[i].detail);
1075
+
1076
+ // then free pointer to cs_insn array
1077
+ cs_mem_free(insn);
1078
+ }
1079
+
1080
+ CAPSTONE_EXPORT
1081
+ cs_insn * CAPSTONE_API cs_malloc(csh ud)
1082
+ {
1083
+ cs_insn *insn;
1084
+ struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
1085
+
1086
+ insn = cs_mem_malloc(sizeof(cs_insn));
1087
+ if (!insn) {
1088
+ // insufficient memory
1089
+ handle->errnum = CS_ERR_MEM;
1090
+ return NULL;
1091
+ } else {
1092
+ if (handle->detail) {
1093
+ // allocate memory for @detail pointer
1094
+ insn->detail = cs_mem_malloc(sizeof(cs_detail));
1095
+ if (insn->detail == NULL) { // insufficient memory
1096
+ cs_mem_free(insn);
1097
+ handle->errnum = CS_ERR_MEM;
1098
+ return NULL;
1099
+ }
1100
+ } else
1101
+ insn->detail = NULL;
1102
+ }
1103
+
1104
+ return insn;
1105
+ }
1106
+
1107
+ // iterator for instruction "single-stepping"
1108
+ CAPSTONE_EXPORT
1109
+ bool CAPSTONE_API cs_disasm_iter(csh ud, const uint8_t **code, size_t *size,
1110
+ uint64_t *address, cs_insn *insn)
1111
+ {
1112
+ struct cs_struct *handle;
1113
+ uint16_t insn_size;
1114
+ MCInst mci;
1115
+ bool r;
1116
+
1117
+ handle = (struct cs_struct *)(uintptr_t)ud;
1118
+ if (!handle) {
1119
+ return false;
1120
+ }
1121
+
1122
+ handle->errnum = CS_ERR_OK;
1123
+
1124
+ MCInst_Init(&mci);
1125
+ mci.csh = handle;
1126
+
1127
+ // relative branches need to know the address & size of current insn
1128
+ mci.address = *address;
1129
+
1130
+ // save all the information for non-detailed mode
1131
+ mci.flat_insn = insn;
1132
+ mci.flat_insn->address = *address;
1133
+ #ifdef CAPSTONE_DIET
1134
+ // zero out mnemonic & op_str
1135
+ mci.flat_insn->mnemonic[0] = '\0';
1136
+ mci.flat_insn->op_str[0] = '\0';
1137
+ #endif
1138
+
1139
+ r = handle->disasm(ud, *code, *size, &mci, &insn_size, *address, handle->getinsn_info);
1140
+ if (r) {
1141
+ SStream ss;
1142
+ SStream_Init(&ss);
1143
+
1144
+ mci.flat_insn->size = insn_size;
1145
+
1146
+ // map internal instruction opcode to public insn ID
1147
+ handle->insn_id(handle, insn, mci.Opcode);
1148
+
1149
+ handle->printer(&mci, &ss, handle->printer_info);
1150
+
1151
+ fill_insn(handle, insn, ss.buffer, &mci, handle->post_printer, *code);
1152
+
1153
+ // adjust for pseudo opcode (X86)
1154
+ if (handle->arch == CS_ARCH_X86)
1155
+ insn->id += mci.popcode_adjust;
1156
+
1157
+ *code += insn_size;
1158
+ *size -= insn_size;
1159
+ *address += insn_size;
1160
+ } else { // encounter a broken instruction
1161
+ size_t skipdata_bytes;
1162
+
1163
+ // if there is no request to skip data, or remaining data is too small,
1164
+ // then bail out
1165
+ if (!handle->skipdata || handle->skipdata_size > *size)
1166
+ return false;
1167
+
1168
+ if (handle->skipdata_setup.callback) {
1169
+ skipdata_bytes = handle->skipdata_setup.callback(*code, *size,
1170
+ 0, handle->skipdata_setup.user_data);
1171
+ if (skipdata_bytes > *size)
1172
+ // remaining data is not enough
1173
+ return false;
1174
+
1175
+ if (!skipdata_bytes)
1176
+ // user requested not to skip data, so bail out
1177
+ return false;
1178
+ } else
1179
+ skipdata_bytes = handle->skipdata_size;
1180
+
1181
+ // we have to skip some amount of data, depending on arch & mode
1182
+ insn->id = 0; // invalid ID for this "data" instruction
1183
+ insn->address = *address;
1184
+ insn->size = (uint16_t)skipdata_bytes;
1185
+ #ifdef CAPSTONE_DIET
1186
+ insn->mnemonic[0] = '\0';
1187
+ insn->op_str[0] = '\0';
1188
+ #else
1189
+ memcpy(insn->bytes, *code, skipdata_bytes);
1190
+ strncpy(insn->mnemonic, handle->skipdata_setup.mnemonic,
1191
+ sizeof(insn->mnemonic) - 1);
1192
+ skipdata_opstr(insn->op_str, *code, skipdata_bytes);
1193
+ #endif
1194
+
1195
+ *code += skipdata_bytes;
1196
+ *size -= skipdata_bytes;
1197
+ *address += skipdata_bytes;
1198
+ }
1199
+
1200
+ return true;
1201
+ }
1202
+
1203
+ // return friendly name of register in a string
1204
+ CAPSTONE_EXPORT
1205
+ const char * CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
1206
+ {
1207
+ struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
1208
+
1209
+ if (!handle || handle->reg_name == NULL) {
1210
+ return NULL;
1211
+ }
1212
+
1213
+ return handle->reg_name(ud, reg);
1214
+ }
1215
+
1216
+ CAPSTONE_EXPORT
1217
+ const char * CAPSTONE_API cs_insn_name(csh ud, unsigned int insn)
1218
+ {
1219
+ struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
1220
+
1221
+ if (!handle || handle->insn_name == NULL) {
1222
+ return NULL;
1223
+ }
1224
+
1225
+ return handle->insn_name(ud, insn);
1226
+ }
1227
+
1228
+ CAPSTONE_EXPORT
1229
+ const char * CAPSTONE_API cs_group_name(csh ud, unsigned int group)
1230
+ {
1231
+ struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
1232
+
1233
+ if (!handle || handle->group_name == NULL) {
1234
+ return NULL;
1235
+ }
1236
+
1237
+ return handle->group_name(ud, group);
1238
+ }
1239
+
1240
+ CAPSTONE_EXPORT
1241
+ bool CAPSTONE_API cs_insn_group(csh ud, const cs_insn *insn, unsigned int group_id)
1242
+ {
1243
+ struct cs_struct *handle;
1244
+ if (!ud)
1245
+ return false;
1246
+
1247
+ handle = (struct cs_struct *)(uintptr_t)ud;
1248
+
1249
+ if (!handle->detail) {
1250
+ handle->errnum = CS_ERR_DETAIL;
1251
+ return false;
1252
+ }
1253
+
1254
+ if (!insn->id) {
1255
+ handle->errnum = CS_ERR_SKIPDATA;
1256
+ return false;
1257
+ }
1258
+
1259
+ if (!insn->detail) {
1260
+ handle->errnum = CS_ERR_DETAIL;
1261
+ return false;
1262
+ }
1263
+
1264
+ return arr_exist8(insn->detail->groups, insn->detail->groups_count, group_id);
1265
+ }
1266
+
1267
+ CAPSTONE_EXPORT
1268
+ bool CAPSTONE_API cs_reg_read(csh ud, const cs_insn *insn, unsigned int reg_id)
1269
+ {
1270
+ struct cs_struct *handle;
1271
+ if (!ud)
1272
+ return false;
1273
+
1274
+ handle = (struct cs_struct *)(uintptr_t)ud;
1275
+
1276
+ if (!handle->detail) {
1277
+ handle->errnum = CS_ERR_DETAIL;
1278
+ return false;
1279
+ }
1280
+
1281
+ if (!insn->id) {
1282
+ handle->errnum = CS_ERR_SKIPDATA;
1283
+ return false;
1284
+ }
1285
+
1286
+ if (!insn->detail) {
1287
+ handle->errnum = CS_ERR_DETAIL;
1288
+ return false;
1289
+ }
1290
+
1291
+ return arr_exist(insn->detail->regs_read, insn->detail->regs_read_count, reg_id);
1292
+ }
1293
+
1294
+ CAPSTONE_EXPORT
1295
+ bool CAPSTONE_API cs_reg_write(csh ud, const cs_insn *insn, unsigned int reg_id)
1296
+ {
1297
+ struct cs_struct *handle;
1298
+ if (!ud)
1299
+ return false;
1300
+
1301
+ handle = (struct cs_struct *)(uintptr_t)ud;
1302
+
1303
+ if (!handle->detail) {
1304
+ handle->errnum = CS_ERR_DETAIL;
1305
+ return false;
1306
+ }
1307
+
1308
+ if (!insn->id) {
1309
+ handle->errnum = CS_ERR_SKIPDATA;
1310
+ return false;
1311
+ }
1312
+
1313
+ if (!insn->detail) {
1314
+ handle->errnum = CS_ERR_DETAIL;
1315
+ return false;
1316
+ }
1317
+
1318
+ return arr_exist(insn->detail->regs_write, insn->detail->regs_write_count, reg_id);
1319
+ }
1320
+
1321
+ CAPSTONE_EXPORT
1322
+ int CAPSTONE_API cs_op_count(csh ud, const cs_insn *insn, unsigned int op_type)
1323
+ {
1324
+ struct cs_struct *handle;
1325
+ unsigned int count = 0, i;
1326
+ if (!ud)
1327
+ return -1;
1328
+
1329
+ handle = (struct cs_struct *)(uintptr_t)ud;
1330
+
1331
+ if (!handle->detail) {
1332
+ handle->errnum = CS_ERR_DETAIL;
1333
+ return -1;
1334
+ }
1335
+
1336
+ if (!insn->id) {
1337
+ handle->errnum = CS_ERR_SKIPDATA;
1338
+ return -1;
1339
+ }
1340
+
1341
+ if (!insn->detail) {
1342
+ handle->errnum = CS_ERR_DETAIL;
1343
+ return -1;
1344
+ }
1345
+
1346
+ handle->errnum = CS_ERR_OK;
1347
+
1348
+ switch (handle->arch) {
1349
+ default:
1350
+ handle->errnum = CS_ERR_HANDLE;
1351
+ return -1;
1352
+ case CS_ARCH_ARM:
1353
+ for (i = 0; i < insn->detail->arm.op_count; i++)
1354
+ if (insn->detail->arm.operands[i].type == (arm_op_type)op_type)
1355
+ count++;
1356
+ break;
1357
+ case CS_ARCH_ARM64:
1358
+ for (i = 0; i < insn->detail->arm64.op_count; i++)
1359
+ if (insn->detail->arm64.operands[i].type == (arm64_op_type)op_type)
1360
+ count++;
1361
+ break;
1362
+ case CS_ARCH_X86:
1363
+ for (i = 0; i < insn->detail->x86.op_count; i++)
1364
+ if (insn->detail->x86.operands[i].type == (x86_op_type)op_type)
1365
+ count++;
1366
+ break;
1367
+ case CS_ARCH_MIPS:
1368
+ for (i = 0; i < insn->detail->mips.op_count; i++)
1369
+ if (insn->detail->mips.operands[i].type == (mips_op_type)op_type)
1370
+ count++;
1371
+ break;
1372
+ case CS_ARCH_PPC:
1373
+ for (i = 0; i < insn->detail->ppc.op_count; i++)
1374
+ if (insn->detail->ppc.operands[i].type == (ppc_op_type)op_type)
1375
+ count++;
1376
+ break;
1377
+ case CS_ARCH_SPARC:
1378
+ for (i = 0; i < insn->detail->sparc.op_count; i++)
1379
+ if (insn->detail->sparc.operands[i].type == (sparc_op_type)op_type)
1380
+ count++;
1381
+ break;
1382
+ case CS_ARCH_SYSZ:
1383
+ for (i = 0; i < insn->detail->sysz.op_count; i++)
1384
+ if (insn->detail->sysz.operands[i].type == (sysz_op_type)op_type)
1385
+ count++;
1386
+ break;
1387
+ case CS_ARCH_XCORE:
1388
+ for (i = 0; i < insn->detail->xcore.op_count; i++)
1389
+ if (insn->detail->xcore.operands[i].type == (xcore_op_type)op_type)
1390
+ count++;
1391
+ break;
1392
+ case CS_ARCH_M68K:
1393
+ for (i = 0; i < insn->detail->m68k.op_count; i++)
1394
+ if (insn->detail->m68k.operands[i].type == (m68k_op_type)op_type)
1395
+ count++;
1396
+ break;
1397
+ case CS_ARCH_TMS320C64X:
1398
+ for (i = 0; i < insn->detail->tms320c64x.op_count; i++)
1399
+ if (insn->detail->tms320c64x.operands[i].type == (tms320c64x_op_type)op_type)
1400
+ count++;
1401
+ break;
1402
+ case CS_ARCH_M680X:
1403
+ for (i = 0; i < insn->detail->m680x.op_count; i++)
1404
+ if (insn->detail->m680x.operands[i].type == (m680x_op_type)op_type)
1405
+ count++;
1406
+ break;
1407
+ case CS_ARCH_EVM:
1408
+ break;
1409
+ case CS_ARCH_MOS65XX:
1410
+ for (i = 0; i < insn->detail->mos65xx.op_count; i++)
1411
+ if (insn->detail->mos65xx.operands[i].type == (mos65xx_op_type)op_type)
1412
+ count++;
1413
+ break;
1414
+ case CS_ARCH_WASM:
1415
+ for (i = 0; i < insn->detail->wasm.op_count; i++)
1416
+ if (insn->detail->wasm.operands[i].type == (wasm_op_type)op_type)
1417
+ count++;
1418
+ break;
1419
+ case CS_ARCH_BPF:
1420
+ for (i = 0; i < insn->detail->bpf.op_count; i++)
1421
+ if (insn->detail->bpf.operands[i].type == (bpf_op_type)op_type)
1422
+ count++;
1423
+ break;
1424
+ case CS_ARCH_RISCV:
1425
+ for (i = 0; i < insn->detail->riscv.op_count; i++)
1426
+ if (insn->detail->riscv.operands[i].type == (riscv_op_type)op_type)
1427
+ count++;
1428
+ break;
1429
+ case CS_ARCH_TRICORE:
1430
+ for (i = 0; i < insn->detail->tricore.op_count; i++)
1431
+ if (insn->detail->tricore.operands[i].type == (tricore_op_type)op_type)
1432
+ count++;
1433
+ break;
1434
+ }
1435
+
1436
+ return count;
1437
+ }
1438
+
1439
+ CAPSTONE_EXPORT
1440
+ int CAPSTONE_API cs_op_index(csh ud, const cs_insn *insn, unsigned int op_type,
1441
+ unsigned int post)
1442
+ {
1443
+ struct cs_struct *handle;
1444
+ unsigned int count = 0, i;
1445
+ if (!ud)
1446
+ return -1;
1447
+
1448
+ handle = (struct cs_struct *)(uintptr_t)ud;
1449
+
1450
+ if (!handle->detail) {
1451
+ handle->errnum = CS_ERR_DETAIL;
1452
+ return -1;
1453
+ }
1454
+
1455
+ if (!insn->id) {
1456
+ handle->errnum = CS_ERR_SKIPDATA;
1457
+ return -1;
1458
+ }
1459
+
1460
+ if (!insn->detail) {
1461
+ handle->errnum = CS_ERR_DETAIL;
1462
+ return -1;
1463
+ }
1464
+
1465
+ handle->errnum = CS_ERR_OK;
1466
+
1467
+ switch (handle->arch) {
1468
+ default:
1469
+ handle->errnum = CS_ERR_HANDLE;
1470
+ return -1;
1471
+ case CS_ARCH_ARM:
1472
+ for (i = 0; i < insn->detail->arm.op_count; i++) {
1473
+ if (insn->detail->arm.operands[i].type == (arm_op_type)op_type)
1474
+ count++;
1475
+ if (count == post)
1476
+ return i;
1477
+ }
1478
+ break;
1479
+ case CS_ARCH_ARM64:
1480
+ for (i = 0; i < insn->detail->arm64.op_count; i++) {
1481
+ if (insn->detail->arm64.operands[i].type == (arm64_op_type)op_type)
1482
+ count++;
1483
+ if (count == post)
1484
+ return i;
1485
+ }
1486
+ break;
1487
+ case CS_ARCH_X86:
1488
+ for (i = 0; i < insn->detail->x86.op_count; i++) {
1489
+ if (insn->detail->x86.operands[i].type == (x86_op_type)op_type)
1490
+ count++;
1491
+ if (count == post)
1492
+ return i;
1493
+ }
1494
+ break;
1495
+ case CS_ARCH_MIPS:
1496
+ for (i = 0; i < insn->detail->mips.op_count; i++) {
1497
+ if (insn->detail->mips.operands[i].type == (mips_op_type)op_type)
1498
+ count++;
1499
+ if (count == post)
1500
+ return i;
1501
+ }
1502
+ break;
1503
+ case CS_ARCH_PPC:
1504
+ for (i = 0; i < insn->detail->ppc.op_count; i++) {
1505
+ if (insn->detail->ppc.operands[i].type == (ppc_op_type)op_type)
1506
+ count++;
1507
+ if (count == post)
1508
+ return i;
1509
+ }
1510
+ break;
1511
+ case CS_ARCH_SPARC:
1512
+ for (i = 0; i < insn->detail->sparc.op_count; i++) {
1513
+ if (insn->detail->sparc.operands[i].type == (sparc_op_type)op_type)
1514
+ count++;
1515
+ if (count == post)
1516
+ return i;
1517
+ }
1518
+ break;
1519
+ case CS_ARCH_SYSZ:
1520
+ for (i = 0; i < insn->detail->sysz.op_count; i++) {
1521
+ if (insn->detail->sysz.operands[i].type == (sysz_op_type)op_type)
1522
+ count++;
1523
+ if (count == post)
1524
+ return i;
1525
+ }
1526
+ break;
1527
+ case CS_ARCH_XCORE:
1528
+ for (i = 0; i < insn->detail->xcore.op_count; i++) {
1529
+ if (insn->detail->xcore.operands[i].type == (xcore_op_type)op_type)
1530
+ count++;
1531
+ if (count == post)
1532
+ return i;
1533
+ }
1534
+ break;
1535
+ case CS_ARCH_TRICORE:
1536
+ for (i = 0; i < insn->detail->tricore.op_count; i++) {
1537
+ if (insn->detail->tricore.operands[i].type == (tricore_op_type)op_type)
1538
+ count++;
1539
+ if (count == post)
1540
+ return i;
1541
+ }
1542
+ break;
1543
+ case CS_ARCH_M68K:
1544
+ for (i = 0; i < insn->detail->m68k.op_count; i++) {
1545
+ if (insn->detail->m68k.operands[i].type == (m68k_op_type)op_type)
1546
+ count++;
1547
+ if (count == post)
1548
+ return i;
1549
+ }
1550
+ break;
1551
+ case CS_ARCH_TMS320C64X:
1552
+ for (i = 0; i < insn->detail->tms320c64x.op_count; i++) {
1553
+ if (insn->detail->tms320c64x.operands[i].type == (tms320c64x_op_type)op_type)
1554
+ count++;
1555
+ if (count == post)
1556
+ return i;
1557
+ }
1558
+ break;
1559
+ case CS_ARCH_M680X:
1560
+ for (i = 0; i < insn->detail->m680x.op_count; i++) {
1561
+ if (insn->detail->m680x.operands[i].type == (m680x_op_type)op_type)
1562
+ count++;
1563
+ if (count == post)
1564
+ return i;
1565
+ }
1566
+ break;
1567
+ case CS_ARCH_EVM:
1568
+ #if 0
1569
+ for (i = 0; i < insn->detail->evm.op_count; i++) {
1570
+ if (insn->detail->evm.operands[i].type == (evm_op_type)op_type)
1571
+ count++;
1572
+ if (count == post)
1573
+ return i;
1574
+ }
1575
+ #endif
1576
+ break;
1577
+ case CS_ARCH_MOS65XX:
1578
+ for (i = 0; i < insn->detail->mos65xx.op_count; i++) {
1579
+ if (insn->detail->mos65xx.operands[i].type == (mos65xx_op_type)op_type)
1580
+ count++;
1581
+ if (count == post)
1582
+ return i;
1583
+ }
1584
+ break;
1585
+ case CS_ARCH_WASM:
1586
+ for (i = 0; i < insn->detail->wasm.op_count; i++) {
1587
+ if (insn->detail->wasm.operands[i].type == (wasm_op_type)op_type)
1588
+ count++;
1589
+ if (count == post)
1590
+ return i;
1591
+ }
1592
+ break;
1593
+ case CS_ARCH_BPF:
1594
+ for (i = 0; i < insn->detail->bpf.op_count; i++) {
1595
+ if (insn->detail->bpf.operands[i].type == (bpf_op_type)op_type)
1596
+ count++;
1597
+ if (count == post)
1598
+ return i;
1599
+ }
1600
+ break;
1601
+ case CS_ARCH_RISCV:
1602
+ for (i = 0; i < insn->detail->riscv.op_count; i++) {
1603
+ if (insn->detail->riscv.operands[i].type == (riscv_op_type)op_type)
1604
+ count++;
1605
+ if (count == post)
1606
+ return i;
1607
+ }
1608
+ break;
1609
+ case CS_ARCH_SH:
1610
+ for (i = 0; i < insn->detail->sh.op_count; i++) {
1611
+ if (insn->detail->sh.operands[i].type == (sh_op_type)op_type)
1612
+ count++;
1613
+ if (count == post)
1614
+ return i;
1615
+ }
1616
+ break;
1617
+ }
1618
+
1619
+ return -1;
1620
+ }
1621
+
1622
+ CAPSTONE_EXPORT
1623
+ cs_err CAPSTONE_API cs_regs_access(csh ud, const cs_insn *insn,
1624
+ cs_regs regs_read, uint8_t *regs_read_count,
1625
+ cs_regs regs_write, uint8_t *regs_write_count)
1626
+ {
1627
+ struct cs_struct *handle;
1628
+
1629
+ if (!ud)
1630
+ return -1;
1631
+
1632
+ handle = (struct cs_struct *)(uintptr_t)ud;
1633
+
1634
+ #ifdef CAPSTONE_DIET
1635
+ // This API does not work in DIET mode
1636
+ handle->errnum = CS_ERR_DIET;
1637
+ return CS_ERR_DIET;
1638
+ #else
1639
+ if (!handle->detail) {
1640
+ handle->errnum = CS_ERR_DETAIL;
1641
+ return CS_ERR_DETAIL;
1642
+ }
1643
+
1644
+ if (!insn->id) {
1645
+ handle->errnum = CS_ERR_SKIPDATA;
1646
+ return CS_ERR_SKIPDATA;
1647
+ }
1648
+
1649
+ if (!insn->detail) {
1650
+ handle->errnum = CS_ERR_DETAIL;
1651
+ return CS_ERR_DETAIL;
1652
+ }
1653
+
1654
+ if (handle->reg_access) {
1655
+ handle->reg_access(insn, regs_read, regs_read_count, regs_write, regs_write_count);
1656
+ } else {
1657
+ // this arch is unsupported yet
1658
+ handle->errnum = CS_ERR_ARCH;
1659
+ return CS_ERR_ARCH;
1660
+ }
1661
+
1662
+ return CS_ERR_OK;
1663
+ #endif
1664
+ }