hexcore-capstone 1.2.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/LICENSE +26 -0
- package/README.md +191 -0
- package/binding.gyp +168 -0
- package/deps/capstone/LEB128.h +38 -0
- package/deps/capstone/MCDisassembler.h +14 -0
- package/deps/capstone/MCFixedLenDisassembler.h +32 -0
- package/deps/capstone/MCInst.c +270 -0
- package/deps/capstone/MCInst.h +165 -0
- package/deps/capstone/MCInstrDesc.c +41 -0
- package/deps/capstone/MCInstrDesc.h +167 -0
- package/deps/capstone/MCRegisterInfo.c +151 -0
- package/deps/capstone/MCRegisterInfo.h +116 -0
- package/deps/capstone/Mapping.c +254 -0
- package/deps/capstone/Mapping.h +174 -0
- package/deps/capstone/MathExtras.h +442 -0
- package/deps/capstone/SStream.c +181 -0
- package/deps/capstone/SStream.h +40 -0
- package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
- package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
- package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
- package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
- package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
- package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
- package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
- package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
- package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
- package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
- package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
- package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
- package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
- package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
- package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
- package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
- package/deps/capstone/arch/ARM/ARMModule.c +63 -0
- package/deps/capstone/arch/ARM/ARMModule.h +12 -0
- package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
- package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
- package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
- package/deps/capstone/arch/BPF/BPFModule.c +34 -0
- package/deps/capstone/arch/BPF/BPFModule.h +12 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
- package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
- package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
- package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
- package/deps/capstone/arch/EVM/EVMModule.c +33 -0
- package/deps/capstone/arch/EVM/EVMModule.h +12 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
- package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
- package/deps/capstone/arch/M680X/M680XModule.c +77 -0
- package/deps/capstone/arch/M680X/M680XModule.h +12 -0
- package/deps/capstone/arch/M680X/cpu12.inc +335 -0
- package/deps/capstone/arch/M680X/hcs08.inc +60 -0
- package/deps/capstone/arch/M680X/hd6301.inc +15 -0
- package/deps/capstone/arch/M680X/hd6309.inc +259 -0
- package/deps/capstone/arch/M680X/insn_props.inc +367 -0
- package/deps/capstone/arch/M680X/m6800.inc +277 -0
- package/deps/capstone/arch/M680X/m6801.inc +39 -0
- package/deps/capstone/arch/M680X/m6805.inc +277 -0
- package/deps/capstone/arch/M680X/m6808.inc +91 -0
- package/deps/capstone/arch/M680X/m6809.inc +352 -0
- package/deps/capstone/arch/M680X/m6811.inc +105 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
- package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
- package/deps/capstone/arch/M68K/M68KModule.c +42 -0
- package/deps/capstone/arch/M68K/M68KModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
- package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
- package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
- package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
- package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
- package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
- package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
- package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
- package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
- package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
- package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
- package/deps/capstone/arch/Mips/MipsModule.c +52 -0
- package/deps/capstone/arch/Mips/MipsModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
- package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
- package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
- package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
- package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
- package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
- package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
- package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
- package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
- package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
- package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
- package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
- package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
- package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
- package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
- package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
- package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
- package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
- package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
- package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
- package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
- package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
- package/deps/capstone/arch/SH/SHModule.c +39 -0
- package/deps/capstone/arch/SH/SHModule.h +12 -0
- package/deps/capstone/arch/SH/mktable.rb +390 -0
- package/deps/capstone/arch/Sparc/Sparc.h +63 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
- package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
- package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
- package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
- package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
- package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
- package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
- package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
- package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
- package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
- package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
- package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
- package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
- package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
- package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
- package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
- package/deps/capstone/arch/TriCore/TriCore.td +134 -0
- package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
- package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
- package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
- package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
- package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
- package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
- package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
- package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
- package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
- package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
- package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
- package/deps/capstone/arch/WASM/WASMModule.c +33 -0
- package/deps/capstone/arch/WASM/WASMModule.h +12 -0
- package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
- package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
- package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
- package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
- package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
- package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
- package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
- package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
- package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
- package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
- package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
- package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
- package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
- package/deps/capstone/arch/X86/X86Mapping.h +96 -0
- package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
- package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
- package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
- package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
- package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
- package/deps/capstone/arch/X86/X86Module.c +94 -0
- package/deps/capstone/arch/X86/X86Module.h +12 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
- package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
- package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
- package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
- package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
- package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
- package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
- package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
- package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
- package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
- package/deps/capstone/cs.c +1664 -0
- package/deps/capstone/cs_priv.h +101 -0
- package/deps/capstone/cs_simple_types.h +886 -0
- package/deps/capstone/include/capstone/arm.h +991 -0
- package/deps/capstone/include/capstone/arm64.h +3159 -0
- package/deps/capstone/include/capstone/bpf.h +209 -0
- package/deps/capstone/include/capstone/capstone.h +875 -0
- package/deps/capstone/include/capstone/evm.h +188 -0
- package/deps/capstone/include/capstone/m680x.h +537 -0
- package/deps/capstone/include/capstone/m68k.h +613 -0
- package/deps/capstone/include/capstone/mips.h +956 -0
- package/deps/capstone/include/capstone/mos65xx.h +204 -0
- package/deps/capstone/include/capstone/platform.h +122 -0
- package/deps/capstone/include/capstone/ppc.h +2108 -0
- package/deps/capstone/include/capstone/riscv.h +531 -0
- package/deps/capstone/include/capstone/sh.h +465 -0
- package/deps/capstone/include/capstone/sparc.h +520 -0
- package/deps/capstone/include/capstone/systemz.h +2601 -0
- package/deps/capstone/include/capstone/tms320c64x.h +359 -0
- package/deps/capstone/include/capstone/tricore.h +567 -0
- package/deps/capstone/include/capstone/wasm.h +250 -0
- package/deps/capstone/include/capstone/x86.h +1986 -0
- package/deps/capstone/include/capstone/xcore.h +235 -0
- package/deps/capstone/include/platform.h +110 -0
- package/deps/capstone/include/windowsce/intrin.h +12 -0
- package/deps/capstone/include/windowsce/stdint.h +133 -0
- package/deps/capstone/utils.c +140 -0
- package/deps/capstone/utils.h +54 -0
- package/index.d.ts +448 -0
- package/index.js +64 -0
- package/index.mjs +25 -0
- package/package.json +82 -0
- package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
- package/src/capstone_wrapper.cpp +910 -0
- package/src/capstone_wrapper.h +147 -0
- package/src/disasm_async_worker.h +215 -0
- package/src/main.cpp +145 -0
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// This is auto-gen data for Capstone engine (www.capstone-engine.org)
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// By Nguyen Anh Quynh <aquynh@gmail.com>
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{
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XCore_ADD_2rus, XCORE_INS_ADD,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_ADD_3r, XCORE_INS_ADD,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_ANDNOT_2r, XCORE_INS_ANDNOT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_AND_3r, XCORE_INS_AND,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_ASHR_l2rus, XCORE_INS_ASHR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_ASHR_l3r, XCORE_INS_ASHR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BAU_1r, XCORE_INS_BAU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 1
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#endif
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},
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{
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XCore_BITREV_l2r, XCORE_INS_BITREV,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLACP_lu10, XCORE_INS_BLA,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLACP_u10, XCORE_INS_BLA,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLAT_lu6, XCORE_INS_BLAT,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLAT_u6, XCORE_INS_BLAT,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLA_1r, XCORE_INS_BLA,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLRB_lu10, XCORE_INS_BL,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLRB_u10, XCORE_INS_BL,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLRF_lu10, XCORE_INS_BL,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BLRF_u10, XCORE_INS_BL,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_BRBF_lru6, XCORE_INS_BF,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRBF_ru6, XCORE_INS_BF,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRBT_lru6, XCORE_INS_BT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRBT_ru6, XCORE_INS_BT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRBU_lu6, XCORE_INS_BU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRBU_u6, XCORE_INS_BU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFF_lru6, XCORE_INS_BF,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFF_ru6, XCORE_INS_BF,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFT_lru6, XCORE_INS_BT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFT_ru6, XCORE_INS_BT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFU_lu6, XCORE_INS_BU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRFU_u6, XCORE_INS_BU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 0
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#endif
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},
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{
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XCore_BRU_1r, XCORE_INS_BRU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 1
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#endif
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},
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{
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XCore_BYTEREV_l2r, XCORE_INS_BYTEREV,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CHKCT_2r, XCORE_INS_CHKCT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CHKCT_rus, XCORE_INS_CHKCT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CLRE_0R, XCORE_INS_CLRE,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CLRPT_1R, XCORE_INS_CLRPT,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CLRSR_branch_lu6, XCORE_INS_CLRSR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 1
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#endif
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},
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{
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XCore_CLRSR_branch_u6, XCORE_INS_CLRSR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 1, 1
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#endif
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},
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{
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XCore_CLRSR_lu6, XCORE_INS_CLRSR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CLRSR_u6, XCORE_INS_CLRSR,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CLZ_l2r, XCORE_INS_CLZ,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CRC8_l4r, XCORE_INS_CRC8,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_CRC_l3r, XCORE_INS_CRC32,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_DCALL_0R, XCORE_INS_DCALL,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_DENTSP_0R, XCORE_INS_DENTSP,
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#ifndef CAPSTONE_DIET
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{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_DGETREG_1r, XCORE_INS_DGETREG,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_DIVS_l3r, XCORE_INS_DIVS,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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XCore_DIVU_l3r, XCORE_INS_DIVU,
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#ifndef CAPSTONE_DIET
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{ 0 }, { 0 }, { 0 }, 0, 0
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#endif
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},
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{
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+
XCore_DRESTSP_0R, XCORE_INS_DRESTSP,
|
|
288
|
+
#ifndef CAPSTONE_DIET
|
|
289
|
+
{ 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
290
|
+
#endif
|
|
291
|
+
},
|
|
292
|
+
{
|
|
293
|
+
XCore_DRET_0R, XCORE_INS_DRET,
|
|
294
|
+
#ifndef CAPSTONE_DIET
|
|
295
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
296
|
+
#endif
|
|
297
|
+
},
|
|
298
|
+
{
|
|
299
|
+
XCore_ECALLF_1r, XCORE_INS_ECALLF,
|
|
300
|
+
#ifndef CAPSTONE_DIET
|
|
301
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
302
|
+
#endif
|
|
303
|
+
},
|
|
304
|
+
{
|
|
305
|
+
XCore_ECALLT_1r, XCORE_INS_ECALLT,
|
|
306
|
+
#ifndef CAPSTONE_DIET
|
|
307
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
308
|
+
#endif
|
|
309
|
+
},
|
|
310
|
+
{
|
|
311
|
+
XCore_EDU_1r, XCORE_INS_EDU,
|
|
312
|
+
#ifndef CAPSTONE_DIET
|
|
313
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
314
|
+
#endif
|
|
315
|
+
},
|
|
316
|
+
{
|
|
317
|
+
XCore_EEF_2r, XCORE_INS_EEF,
|
|
318
|
+
#ifndef CAPSTONE_DIET
|
|
319
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
320
|
+
#endif
|
|
321
|
+
},
|
|
322
|
+
{
|
|
323
|
+
XCore_EET_2r, XCORE_INS_EET,
|
|
324
|
+
#ifndef CAPSTONE_DIET
|
|
325
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
326
|
+
#endif
|
|
327
|
+
},
|
|
328
|
+
{
|
|
329
|
+
XCore_EEU_1r, XCORE_INS_EEU,
|
|
330
|
+
#ifndef CAPSTONE_DIET
|
|
331
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
332
|
+
#endif
|
|
333
|
+
},
|
|
334
|
+
{
|
|
335
|
+
XCore_ENDIN_2r, XCORE_INS_ENDIN,
|
|
336
|
+
#ifndef CAPSTONE_DIET
|
|
337
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
338
|
+
#endif
|
|
339
|
+
},
|
|
340
|
+
{
|
|
341
|
+
XCore_ENTSP_lu6, XCORE_INS_ENTSP,
|
|
342
|
+
#ifndef CAPSTONE_DIET
|
|
343
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
344
|
+
#endif
|
|
345
|
+
},
|
|
346
|
+
{
|
|
347
|
+
XCore_ENTSP_u6, XCORE_INS_ENTSP,
|
|
348
|
+
#ifndef CAPSTONE_DIET
|
|
349
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
350
|
+
#endif
|
|
351
|
+
},
|
|
352
|
+
{
|
|
353
|
+
XCore_EQ_2rus, XCORE_INS_EQ,
|
|
354
|
+
#ifndef CAPSTONE_DIET
|
|
355
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
356
|
+
#endif
|
|
357
|
+
},
|
|
358
|
+
{
|
|
359
|
+
XCore_EQ_3r, XCORE_INS_EQ,
|
|
360
|
+
#ifndef CAPSTONE_DIET
|
|
361
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
362
|
+
#endif
|
|
363
|
+
},
|
|
364
|
+
{
|
|
365
|
+
XCore_EXTDP_lu6, XCORE_INS_EXTDP,
|
|
366
|
+
#ifndef CAPSTONE_DIET
|
|
367
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
368
|
+
#endif
|
|
369
|
+
},
|
|
370
|
+
{
|
|
371
|
+
XCore_EXTDP_u6, XCORE_INS_EXTDP,
|
|
372
|
+
#ifndef CAPSTONE_DIET
|
|
373
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
374
|
+
#endif
|
|
375
|
+
},
|
|
376
|
+
{
|
|
377
|
+
XCore_EXTSP_lu6, XCORE_INS_EXTSP,
|
|
378
|
+
#ifndef CAPSTONE_DIET
|
|
379
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
380
|
+
#endif
|
|
381
|
+
},
|
|
382
|
+
{
|
|
383
|
+
XCore_EXTSP_u6, XCORE_INS_EXTSP,
|
|
384
|
+
#ifndef CAPSTONE_DIET
|
|
385
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
386
|
+
#endif
|
|
387
|
+
},
|
|
388
|
+
{
|
|
389
|
+
XCore_FREER_1r, XCORE_INS_FREER,
|
|
390
|
+
#ifndef CAPSTONE_DIET
|
|
391
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
392
|
+
#endif
|
|
393
|
+
},
|
|
394
|
+
{
|
|
395
|
+
XCore_FREET_0R, XCORE_INS_FREET,
|
|
396
|
+
#ifndef CAPSTONE_DIET
|
|
397
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
398
|
+
#endif
|
|
399
|
+
},
|
|
400
|
+
{
|
|
401
|
+
XCore_GETD_l2r, XCORE_INS_GETD,
|
|
402
|
+
#ifndef CAPSTONE_DIET
|
|
403
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
404
|
+
#endif
|
|
405
|
+
},
|
|
406
|
+
{
|
|
407
|
+
XCore_GETED_0R, XCORE_INS_GET,
|
|
408
|
+
#ifndef CAPSTONE_DIET
|
|
409
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
410
|
+
#endif
|
|
411
|
+
},
|
|
412
|
+
{
|
|
413
|
+
XCore_GETET_0R, XCORE_INS_GET,
|
|
414
|
+
#ifndef CAPSTONE_DIET
|
|
415
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
416
|
+
#endif
|
|
417
|
+
},
|
|
418
|
+
{
|
|
419
|
+
XCore_GETID_0R, XCORE_INS_GET,
|
|
420
|
+
#ifndef CAPSTONE_DIET
|
|
421
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
422
|
+
#endif
|
|
423
|
+
},
|
|
424
|
+
{
|
|
425
|
+
XCore_GETKEP_0R, XCORE_INS_GET,
|
|
426
|
+
#ifndef CAPSTONE_DIET
|
|
427
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
428
|
+
#endif
|
|
429
|
+
},
|
|
430
|
+
{
|
|
431
|
+
XCore_GETKSP_0R, XCORE_INS_GET,
|
|
432
|
+
#ifndef CAPSTONE_DIET
|
|
433
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
434
|
+
#endif
|
|
435
|
+
},
|
|
436
|
+
{
|
|
437
|
+
XCore_GETN_l2r, XCORE_INS_GETN,
|
|
438
|
+
#ifndef CAPSTONE_DIET
|
|
439
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
440
|
+
#endif
|
|
441
|
+
},
|
|
442
|
+
{
|
|
443
|
+
XCore_GETPS_l2r, XCORE_INS_GET,
|
|
444
|
+
#ifndef CAPSTONE_DIET
|
|
445
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
446
|
+
#endif
|
|
447
|
+
},
|
|
448
|
+
{
|
|
449
|
+
XCore_GETR_rus, XCORE_INS_GETR,
|
|
450
|
+
#ifndef CAPSTONE_DIET
|
|
451
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
452
|
+
#endif
|
|
453
|
+
},
|
|
454
|
+
{
|
|
455
|
+
XCore_GETSR_lu6, XCORE_INS_GETSR,
|
|
456
|
+
#ifndef CAPSTONE_DIET
|
|
457
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
458
|
+
#endif
|
|
459
|
+
},
|
|
460
|
+
{
|
|
461
|
+
XCore_GETSR_u6, XCORE_INS_GETSR,
|
|
462
|
+
#ifndef CAPSTONE_DIET
|
|
463
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
464
|
+
#endif
|
|
465
|
+
},
|
|
466
|
+
{
|
|
467
|
+
XCore_GETST_2r, XCORE_INS_GETST,
|
|
468
|
+
#ifndef CAPSTONE_DIET
|
|
469
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
470
|
+
#endif
|
|
471
|
+
},
|
|
472
|
+
{
|
|
473
|
+
XCore_GETTS_2r, XCORE_INS_GETTS,
|
|
474
|
+
#ifndef CAPSTONE_DIET
|
|
475
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
476
|
+
#endif
|
|
477
|
+
},
|
|
478
|
+
{
|
|
479
|
+
XCore_INCT_2r, XCORE_INS_INCT,
|
|
480
|
+
#ifndef CAPSTONE_DIET
|
|
481
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
482
|
+
#endif
|
|
483
|
+
},
|
|
484
|
+
{
|
|
485
|
+
XCore_INITCP_2r, XCORE_INS_INIT,
|
|
486
|
+
#ifndef CAPSTONE_DIET
|
|
487
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
488
|
+
#endif
|
|
489
|
+
},
|
|
490
|
+
{
|
|
491
|
+
XCore_INITDP_2r, XCORE_INS_INIT,
|
|
492
|
+
#ifndef CAPSTONE_DIET
|
|
493
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
494
|
+
#endif
|
|
495
|
+
},
|
|
496
|
+
{
|
|
497
|
+
XCore_INITLR_l2r, XCORE_INS_INIT,
|
|
498
|
+
#ifndef CAPSTONE_DIET
|
|
499
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
500
|
+
#endif
|
|
501
|
+
},
|
|
502
|
+
{
|
|
503
|
+
XCore_INITPC_2r, XCORE_INS_INIT,
|
|
504
|
+
#ifndef CAPSTONE_DIET
|
|
505
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
506
|
+
#endif
|
|
507
|
+
},
|
|
508
|
+
{
|
|
509
|
+
XCore_INITSP_2r, XCORE_INS_INIT,
|
|
510
|
+
#ifndef CAPSTONE_DIET
|
|
511
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
512
|
+
#endif
|
|
513
|
+
},
|
|
514
|
+
{
|
|
515
|
+
XCore_INPW_l2rus, XCORE_INS_INPW,
|
|
516
|
+
#ifndef CAPSTONE_DIET
|
|
517
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
518
|
+
#endif
|
|
519
|
+
},
|
|
520
|
+
{
|
|
521
|
+
XCore_INSHR_2r, XCORE_INS_INSHR,
|
|
522
|
+
#ifndef CAPSTONE_DIET
|
|
523
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
524
|
+
#endif
|
|
525
|
+
},
|
|
526
|
+
{
|
|
527
|
+
XCore_INT_2r, XCORE_INS_INT,
|
|
528
|
+
#ifndef CAPSTONE_DIET
|
|
529
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
530
|
+
#endif
|
|
531
|
+
},
|
|
532
|
+
{
|
|
533
|
+
XCore_IN_2r, XCORE_INS_IN,
|
|
534
|
+
#ifndef CAPSTONE_DIET
|
|
535
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
536
|
+
#endif
|
|
537
|
+
},
|
|
538
|
+
{
|
|
539
|
+
XCore_KCALL_1r, XCORE_INS_KCALL,
|
|
540
|
+
#ifndef CAPSTONE_DIET
|
|
541
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
542
|
+
#endif
|
|
543
|
+
},
|
|
544
|
+
{
|
|
545
|
+
XCore_KCALL_lu6, XCORE_INS_KCALL,
|
|
546
|
+
#ifndef CAPSTONE_DIET
|
|
547
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
548
|
+
#endif
|
|
549
|
+
},
|
|
550
|
+
{
|
|
551
|
+
XCore_KCALL_u6, XCORE_INS_KCALL,
|
|
552
|
+
#ifndef CAPSTONE_DIET
|
|
553
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
554
|
+
#endif
|
|
555
|
+
},
|
|
556
|
+
{
|
|
557
|
+
XCore_KENTSP_lu6, XCORE_INS_KENTSP,
|
|
558
|
+
#ifndef CAPSTONE_DIET
|
|
559
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
560
|
+
#endif
|
|
561
|
+
},
|
|
562
|
+
{
|
|
563
|
+
XCore_KENTSP_u6, XCORE_INS_KENTSP,
|
|
564
|
+
#ifndef CAPSTONE_DIET
|
|
565
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
566
|
+
#endif
|
|
567
|
+
},
|
|
568
|
+
{
|
|
569
|
+
XCore_KRESTSP_lu6, XCORE_INS_KRESTSP,
|
|
570
|
+
#ifndef CAPSTONE_DIET
|
|
571
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
572
|
+
#endif
|
|
573
|
+
},
|
|
574
|
+
{
|
|
575
|
+
XCore_KRESTSP_u6, XCORE_INS_KRESTSP,
|
|
576
|
+
#ifndef CAPSTONE_DIET
|
|
577
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
578
|
+
#endif
|
|
579
|
+
},
|
|
580
|
+
{
|
|
581
|
+
XCore_KRET_0R, XCORE_INS_KRET,
|
|
582
|
+
#ifndef CAPSTONE_DIET
|
|
583
|
+
{ 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
584
|
+
#endif
|
|
585
|
+
},
|
|
586
|
+
{
|
|
587
|
+
XCore_LADD_l5r, XCORE_INS_LADD,
|
|
588
|
+
#ifndef CAPSTONE_DIET
|
|
589
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
590
|
+
#endif
|
|
591
|
+
},
|
|
592
|
+
{
|
|
593
|
+
XCore_LD16S_3r, XCORE_INS_LD16S,
|
|
594
|
+
#ifndef CAPSTONE_DIET
|
|
595
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
596
|
+
#endif
|
|
597
|
+
},
|
|
598
|
+
{
|
|
599
|
+
XCore_LD8U_3r, XCORE_INS_LD8U,
|
|
600
|
+
#ifndef CAPSTONE_DIET
|
|
601
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
602
|
+
#endif
|
|
603
|
+
},
|
|
604
|
+
{
|
|
605
|
+
XCore_LDA16B_l3r, XCORE_INS_LDA16,
|
|
606
|
+
#ifndef CAPSTONE_DIET
|
|
607
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
608
|
+
#endif
|
|
609
|
+
},
|
|
610
|
+
{
|
|
611
|
+
XCore_LDA16F_l3r, XCORE_INS_LDA16,
|
|
612
|
+
#ifndef CAPSTONE_DIET
|
|
613
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
614
|
+
#endif
|
|
615
|
+
},
|
|
616
|
+
{
|
|
617
|
+
XCore_LDAPB_lu10, XCORE_INS_LDAP,
|
|
618
|
+
#ifndef CAPSTONE_DIET
|
|
619
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
620
|
+
#endif
|
|
621
|
+
},
|
|
622
|
+
{
|
|
623
|
+
XCore_LDAPB_u10, XCORE_INS_LDAP,
|
|
624
|
+
#ifndef CAPSTONE_DIET
|
|
625
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
626
|
+
#endif
|
|
627
|
+
},
|
|
628
|
+
{
|
|
629
|
+
XCore_LDAPF_lu10, XCORE_INS_LDAP,
|
|
630
|
+
#ifndef CAPSTONE_DIET
|
|
631
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
632
|
+
#endif
|
|
633
|
+
},
|
|
634
|
+
{
|
|
635
|
+
XCore_LDAPF_lu10_ba, XCORE_INS_LDAP,
|
|
636
|
+
#ifndef CAPSTONE_DIET
|
|
637
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
638
|
+
#endif
|
|
639
|
+
},
|
|
640
|
+
{
|
|
641
|
+
XCore_LDAPF_u10, XCORE_INS_LDAP,
|
|
642
|
+
#ifndef CAPSTONE_DIET
|
|
643
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
644
|
+
#endif
|
|
645
|
+
},
|
|
646
|
+
{
|
|
647
|
+
XCore_LDAWB_l2rus, XCORE_INS_LDAW,
|
|
648
|
+
#ifndef CAPSTONE_DIET
|
|
649
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
650
|
+
#endif
|
|
651
|
+
},
|
|
652
|
+
{
|
|
653
|
+
XCore_LDAWB_l3r, XCORE_INS_LDAW,
|
|
654
|
+
#ifndef CAPSTONE_DIET
|
|
655
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
656
|
+
#endif
|
|
657
|
+
},
|
|
658
|
+
{
|
|
659
|
+
XCore_LDAWCP_lu6, XCORE_INS_LDAW,
|
|
660
|
+
#ifndef CAPSTONE_DIET
|
|
661
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
662
|
+
#endif
|
|
663
|
+
},
|
|
664
|
+
{
|
|
665
|
+
XCore_LDAWCP_u6, XCORE_INS_LDAW,
|
|
666
|
+
#ifndef CAPSTONE_DIET
|
|
667
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
668
|
+
#endif
|
|
669
|
+
},
|
|
670
|
+
{
|
|
671
|
+
XCore_LDAWDP_lru6, XCORE_INS_LDAW,
|
|
672
|
+
#ifndef CAPSTONE_DIET
|
|
673
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
674
|
+
#endif
|
|
675
|
+
},
|
|
676
|
+
{
|
|
677
|
+
XCore_LDAWDP_ru6, XCORE_INS_LDAW,
|
|
678
|
+
#ifndef CAPSTONE_DIET
|
|
679
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
680
|
+
#endif
|
|
681
|
+
},
|
|
682
|
+
{
|
|
683
|
+
XCore_LDAWF_l2rus, XCORE_INS_LDAW,
|
|
684
|
+
#ifndef CAPSTONE_DIET
|
|
685
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
686
|
+
#endif
|
|
687
|
+
},
|
|
688
|
+
{
|
|
689
|
+
XCore_LDAWF_l3r, XCORE_INS_LDAW,
|
|
690
|
+
#ifndef CAPSTONE_DIET
|
|
691
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
692
|
+
#endif
|
|
693
|
+
},
|
|
694
|
+
{
|
|
695
|
+
XCore_LDAWSP_lru6, XCORE_INS_LDAW,
|
|
696
|
+
#ifndef CAPSTONE_DIET
|
|
697
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
698
|
+
#endif
|
|
699
|
+
},
|
|
700
|
+
{
|
|
701
|
+
XCore_LDAWSP_ru6, XCORE_INS_LDAW,
|
|
702
|
+
#ifndef CAPSTONE_DIET
|
|
703
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
704
|
+
#endif
|
|
705
|
+
},
|
|
706
|
+
{
|
|
707
|
+
XCore_LDC_lru6, XCORE_INS_LDC,
|
|
708
|
+
#ifndef CAPSTONE_DIET
|
|
709
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
710
|
+
#endif
|
|
711
|
+
},
|
|
712
|
+
{
|
|
713
|
+
XCore_LDC_ru6, XCORE_INS_LDC,
|
|
714
|
+
#ifndef CAPSTONE_DIET
|
|
715
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
716
|
+
#endif
|
|
717
|
+
},
|
|
718
|
+
{
|
|
719
|
+
XCore_LDET_0R, XCORE_INS_LDW,
|
|
720
|
+
#ifndef CAPSTONE_DIET
|
|
721
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
722
|
+
#endif
|
|
723
|
+
},
|
|
724
|
+
{
|
|
725
|
+
XCore_LDIVU_l5r, XCORE_INS_LDIVU,
|
|
726
|
+
#ifndef CAPSTONE_DIET
|
|
727
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
728
|
+
#endif
|
|
729
|
+
},
|
|
730
|
+
{
|
|
731
|
+
XCore_LDSED_0R, XCORE_INS_LDW,
|
|
732
|
+
#ifndef CAPSTONE_DIET
|
|
733
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
734
|
+
#endif
|
|
735
|
+
},
|
|
736
|
+
{
|
|
737
|
+
XCore_LDSPC_0R, XCORE_INS_LDW,
|
|
738
|
+
#ifndef CAPSTONE_DIET
|
|
739
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
740
|
+
#endif
|
|
741
|
+
},
|
|
742
|
+
{
|
|
743
|
+
XCore_LDSSR_0R, XCORE_INS_LDW,
|
|
744
|
+
#ifndef CAPSTONE_DIET
|
|
745
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
746
|
+
#endif
|
|
747
|
+
},
|
|
748
|
+
{
|
|
749
|
+
XCore_LDWCP_lru6, XCORE_INS_LDW,
|
|
750
|
+
#ifndef CAPSTONE_DIET
|
|
751
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
752
|
+
#endif
|
|
753
|
+
},
|
|
754
|
+
{
|
|
755
|
+
XCore_LDWCP_lu10, XCORE_INS_LDW,
|
|
756
|
+
#ifndef CAPSTONE_DIET
|
|
757
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
758
|
+
#endif
|
|
759
|
+
},
|
|
760
|
+
{
|
|
761
|
+
XCore_LDWCP_ru6, XCORE_INS_LDW,
|
|
762
|
+
#ifndef CAPSTONE_DIET
|
|
763
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
764
|
+
#endif
|
|
765
|
+
},
|
|
766
|
+
{
|
|
767
|
+
XCore_LDWCP_u10, XCORE_INS_LDW,
|
|
768
|
+
#ifndef CAPSTONE_DIET
|
|
769
|
+
{ 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
|
|
770
|
+
#endif
|
|
771
|
+
},
|
|
772
|
+
{
|
|
773
|
+
XCore_LDWDP_lru6, XCORE_INS_LDW,
|
|
774
|
+
#ifndef CAPSTONE_DIET
|
|
775
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
776
|
+
#endif
|
|
777
|
+
},
|
|
778
|
+
{
|
|
779
|
+
XCore_LDWDP_ru6, XCORE_INS_LDW,
|
|
780
|
+
#ifndef CAPSTONE_DIET
|
|
781
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
782
|
+
#endif
|
|
783
|
+
},
|
|
784
|
+
{
|
|
785
|
+
XCore_LDWSP_lru6, XCORE_INS_LDW,
|
|
786
|
+
#ifndef CAPSTONE_DIET
|
|
787
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
788
|
+
#endif
|
|
789
|
+
},
|
|
790
|
+
{
|
|
791
|
+
XCore_LDWSP_ru6, XCORE_INS_LDW,
|
|
792
|
+
#ifndef CAPSTONE_DIET
|
|
793
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
794
|
+
#endif
|
|
795
|
+
},
|
|
796
|
+
{
|
|
797
|
+
XCore_LDW_2rus, XCORE_INS_LDW,
|
|
798
|
+
#ifndef CAPSTONE_DIET
|
|
799
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
800
|
+
#endif
|
|
801
|
+
},
|
|
802
|
+
{
|
|
803
|
+
XCore_LDW_3r, XCORE_INS_LDW,
|
|
804
|
+
#ifndef CAPSTONE_DIET
|
|
805
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
806
|
+
#endif
|
|
807
|
+
},
|
|
808
|
+
{
|
|
809
|
+
XCore_LMUL_l6r, XCORE_INS_LMUL,
|
|
810
|
+
#ifndef CAPSTONE_DIET
|
|
811
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
812
|
+
#endif
|
|
813
|
+
},
|
|
814
|
+
{
|
|
815
|
+
XCore_LSS_3r, XCORE_INS_LSS,
|
|
816
|
+
#ifndef CAPSTONE_DIET
|
|
817
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
818
|
+
#endif
|
|
819
|
+
},
|
|
820
|
+
{
|
|
821
|
+
XCore_LSUB_l5r, XCORE_INS_LSUB,
|
|
822
|
+
#ifndef CAPSTONE_DIET
|
|
823
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
824
|
+
#endif
|
|
825
|
+
},
|
|
826
|
+
{
|
|
827
|
+
XCore_LSU_3r, XCORE_INS_LSU,
|
|
828
|
+
#ifndef CAPSTONE_DIET
|
|
829
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
830
|
+
#endif
|
|
831
|
+
},
|
|
832
|
+
{
|
|
833
|
+
XCore_MACCS_l4r, XCORE_INS_MACCS,
|
|
834
|
+
#ifndef CAPSTONE_DIET
|
|
835
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
836
|
+
#endif
|
|
837
|
+
},
|
|
838
|
+
{
|
|
839
|
+
XCore_MACCU_l4r, XCORE_INS_MACCU,
|
|
840
|
+
#ifndef CAPSTONE_DIET
|
|
841
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
842
|
+
#endif
|
|
843
|
+
},
|
|
844
|
+
{
|
|
845
|
+
XCore_MJOIN_1r, XCORE_INS_MJOIN,
|
|
846
|
+
#ifndef CAPSTONE_DIET
|
|
847
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
848
|
+
#endif
|
|
849
|
+
},
|
|
850
|
+
{
|
|
851
|
+
XCore_MKMSK_2r, XCORE_INS_MKMSK,
|
|
852
|
+
#ifndef CAPSTONE_DIET
|
|
853
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
854
|
+
#endif
|
|
855
|
+
},
|
|
856
|
+
{
|
|
857
|
+
XCore_MKMSK_rus, XCORE_INS_MKMSK,
|
|
858
|
+
#ifndef CAPSTONE_DIET
|
|
859
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
860
|
+
#endif
|
|
861
|
+
},
|
|
862
|
+
{
|
|
863
|
+
XCore_MSYNC_1r, XCORE_INS_MSYNC,
|
|
864
|
+
#ifndef CAPSTONE_DIET
|
|
865
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
866
|
+
#endif
|
|
867
|
+
},
|
|
868
|
+
{
|
|
869
|
+
XCore_MUL_l3r, XCORE_INS_MUL,
|
|
870
|
+
#ifndef CAPSTONE_DIET
|
|
871
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
872
|
+
#endif
|
|
873
|
+
},
|
|
874
|
+
{
|
|
875
|
+
XCore_NEG, XCORE_INS_NEG,
|
|
876
|
+
#ifndef CAPSTONE_DIET
|
|
877
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
878
|
+
#endif
|
|
879
|
+
},
|
|
880
|
+
{
|
|
881
|
+
XCore_NOT, XCORE_INS_NOT,
|
|
882
|
+
#ifndef CAPSTONE_DIET
|
|
883
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
884
|
+
#endif
|
|
885
|
+
},
|
|
886
|
+
{
|
|
887
|
+
XCore_OR_3r, XCORE_INS_OR,
|
|
888
|
+
#ifndef CAPSTONE_DIET
|
|
889
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
890
|
+
#endif
|
|
891
|
+
},
|
|
892
|
+
{
|
|
893
|
+
XCore_OUTCT_2r, XCORE_INS_OUTCT,
|
|
894
|
+
#ifndef CAPSTONE_DIET
|
|
895
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
896
|
+
#endif
|
|
897
|
+
},
|
|
898
|
+
{
|
|
899
|
+
XCore_OUTCT_rus, XCORE_INS_OUTCT,
|
|
900
|
+
#ifndef CAPSTONE_DIET
|
|
901
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
902
|
+
#endif
|
|
903
|
+
},
|
|
904
|
+
{
|
|
905
|
+
XCore_OUTPW_l2rus, XCORE_INS_OUTPW,
|
|
906
|
+
#ifndef CAPSTONE_DIET
|
|
907
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
908
|
+
#endif
|
|
909
|
+
},
|
|
910
|
+
{
|
|
911
|
+
XCore_OUTSHR_2r, XCORE_INS_OUTSHR,
|
|
912
|
+
#ifndef CAPSTONE_DIET
|
|
913
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
914
|
+
#endif
|
|
915
|
+
},
|
|
916
|
+
{
|
|
917
|
+
XCore_OUTT_2r, XCORE_INS_OUTT,
|
|
918
|
+
#ifndef CAPSTONE_DIET
|
|
919
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
920
|
+
#endif
|
|
921
|
+
},
|
|
922
|
+
{
|
|
923
|
+
XCore_OUT_2r, XCORE_INS_OUT,
|
|
924
|
+
#ifndef CAPSTONE_DIET
|
|
925
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
926
|
+
#endif
|
|
927
|
+
},
|
|
928
|
+
{
|
|
929
|
+
XCore_PEEK_2r, XCORE_INS_PEEK,
|
|
930
|
+
#ifndef CAPSTONE_DIET
|
|
931
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
932
|
+
#endif
|
|
933
|
+
},
|
|
934
|
+
{
|
|
935
|
+
XCore_REMS_l3r, XCORE_INS_REMS,
|
|
936
|
+
#ifndef CAPSTONE_DIET
|
|
937
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
938
|
+
#endif
|
|
939
|
+
},
|
|
940
|
+
{
|
|
941
|
+
XCore_REMU_l3r, XCORE_INS_REMU,
|
|
942
|
+
#ifndef CAPSTONE_DIET
|
|
943
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
944
|
+
#endif
|
|
945
|
+
},
|
|
946
|
+
{
|
|
947
|
+
XCore_RETSP_lu6, XCORE_INS_RETSP,
|
|
948
|
+
#ifndef CAPSTONE_DIET
|
|
949
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
950
|
+
#endif
|
|
951
|
+
},
|
|
952
|
+
{
|
|
953
|
+
XCore_RETSP_u6, XCORE_INS_RETSP,
|
|
954
|
+
#ifndef CAPSTONE_DIET
|
|
955
|
+
{ XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
956
|
+
#endif
|
|
957
|
+
},
|
|
958
|
+
{
|
|
959
|
+
XCore_SETCLK_l2r, XCORE_INS_SETCLK,
|
|
960
|
+
#ifndef CAPSTONE_DIET
|
|
961
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
962
|
+
#endif
|
|
963
|
+
},
|
|
964
|
+
{
|
|
965
|
+
XCore_SETCP_1r, XCORE_INS_SET,
|
|
966
|
+
#ifndef CAPSTONE_DIET
|
|
967
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
968
|
+
#endif
|
|
969
|
+
},
|
|
970
|
+
{
|
|
971
|
+
XCore_SETC_l2r, XCORE_INS_SETC,
|
|
972
|
+
#ifndef CAPSTONE_DIET
|
|
973
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
974
|
+
#endif
|
|
975
|
+
},
|
|
976
|
+
{
|
|
977
|
+
XCore_SETC_lru6, XCORE_INS_SETC,
|
|
978
|
+
#ifndef CAPSTONE_DIET
|
|
979
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
980
|
+
#endif
|
|
981
|
+
},
|
|
982
|
+
{
|
|
983
|
+
XCore_SETC_ru6, XCORE_INS_SETC,
|
|
984
|
+
#ifndef CAPSTONE_DIET
|
|
985
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
986
|
+
#endif
|
|
987
|
+
},
|
|
988
|
+
{
|
|
989
|
+
XCore_SETDP_1r, XCORE_INS_SET,
|
|
990
|
+
#ifndef CAPSTONE_DIET
|
|
991
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
992
|
+
#endif
|
|
993
|
+
},
|
|
994
|
+
{
|
|
995
|
+
XCore_SETD_2r, XCORE_INS_SETD,
|
|
996
|
+
#ifndef CAPSTONE_DIET
|
|
997
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
998
|
+
#endif
|
|
999
|
+
},
|
|
1000
|
+
{
|
|
1001
|
+
XCore_SETEV_1r, XCORE_INS_SETEV,
|
|
1002
|
+
#ifndef CAPSTONE_DIET
|
|
1003
|
+
{ XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
|
|
1004
|
+
#endif
|
|
1005
|
+
},
|
|
1006
|
+
{
|
|
1007
|
+
XCore_SETKEP_0R, XCORE_INS_SET,
|
|
1008
|
+
#ifndef CAPSTONE_DIET
|
|
1009
|
+
{ XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
|
|
1010
|
+
#endif
|
|
1011
|
+
},
|
|
1012
|
+
{
|
|
1013
|
+
XCore_SETN_l2r, XCORE_INS_SETN,
|
|
1014
|
+
#ifndef CAPSTONE_DIET
|
|
1015
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1016
|
+
#endif
|
|
1017
|
+
},
|
|
1018
|
+
{
|
|
1019
|
+
XCore_SETPSC_2r, XCORE_INS_SETPSC,
|
|
1020
|
+
#ifndef CAPSTONE_DIET
|
|
1021
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1022
|
+
#endif
|
|
1023
|
+
},
|
|
1024
|
+
{
|
|
1025
|
+
XCore_SETPS_l2r, XCORE_INS_SET,
|
|
1026
|
+
#ifndef CAPSTONE_DIET
|
|
1027
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1028
|
+
#endif
|
|
1029
|
+
},
|
|
1030
|
+
{
|
|
1031
|
+
XCore_SETPT_2r, XCORE_INS_SETPT,
|
|
1032
|
+
#ifndef CAPSTONE_DIET
|
|
1033
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1034
|
+
#endif
|
|
1035
|
+
},
|
|
1036
|
+
{
|
|
1037
|
+
XCore_SETRDY_l2r, XCORE_INS_SETRDY,
|
|
1038
|
+
#ifndef CAPSTONE_DIET
|
|
1039
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1040
|
+
#endif
|
|
1041
|
+
},
|
|
1042
|
+
{
|
|
1043
|
+
XCore_SETSP_1r, XCORE_INS_SET,
|
|
1044
|
+
#ifndef CAPSTONE_DIET
|
|
1045
|
+
{ 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
|
|
1046
|
+
#endif
|
|
1047
|
+
},
|
|
1048
|
+
{
|
|
1049
|
+
XCore_SETSR_branch_lu6, XCORE_INS_SETSR,
|
|
1050
|
+
#ifndef CAPSTONE_DIET
|
|
1051
|
+
{ 0 }, { 0 }, { 0 }, 1, 1
|
|
1052
|
+
#endif
|
|
1053
|
+
},
|
|
1054
|
+
{
|
|
1055
|
+
XCore_SETSR_branch_u6, XCORE_INS_SETSR,
|
|
1056
|
+
#ifndef CAPSTONE_DIET
|
|
1057
|
+
{ 0 }, { 0 }, { 0 }, 1, 1
|
|
1058
|
+
#endif
|
|
1059
|
+
},
|
|
1060
|
+
{
|
|
1061
|
+
XCore_SETSR_lu6, XCORE_INS_SETSR,
|
|
1062
|
+
#ifndef CAPSTONE_DIET
|
|
1063
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1064
|
+
#endif
|
|
1065
|
+
},
|
|
1066
|
+
{
|
|
1067
|
+
XCore_SETSR_u6, XCORE_INS_SETSR,
|
|
1068
|
+
#ifndef CAPSTONE_DIET
|
|
1069
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1070
|
+
#endif
|
|
1071
|
+
},
|
|
1072
|
+
{
|
|
1073
|
+
XCore_SETTW_l2r, XCORE_INS_SETTW,
|
|
1074
|
+
#ifndef CAPSTONE_DIET
|
|
1075
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1076
|
+
#endif
|
|
1077
|
+
},
|
|
1078
|
+
{
|
|
1079
|
+
XCore_SETV_1r, XCORE_INS_SETV,
|
|
1080
|
+
#ifndef CAPSTONE_DIET
|
|
1081
|
+
{ XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
|
|
1082
|
+
#endif
|
|
1083
|
+
},
|
|
1084
|
+
{
|
|
1085
|
+
XCore_SEXT_2r, XCORE_INS_SEXT,
|
|
1086
|
+
#ifndef CAPSTONE_DIET
|
|
1087
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1088
|
+
#endif
|
|
1089
|
+
},
|
|
1090
|
+
{
|
|
1091
|
+
XCore_SEXT_rus, XCORE_INS_SEXT,
|
|
1092
|
+
#ifndef CAPSTONE_DIET
|
|
1093
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1094
|
+
#endif
|
|
1095
|
+
},
|
|
1096
|
+
{
|
|
1097
|
+
XCore_SHL_2rus, XCORE_INS_SHL,
|
|
1098
|
+
#ifndef CAPSTONE_DIET
|
|
1099
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1100
|
+
#endif
|
|
1101
|
+
},
|
|
1102
|
+
{
|
|
1103
|
+
XCore_SHL_3r, XCORE_INS_SHL,
|
|
1104
|
+
#ifndef CAPSTONE_DIET
|
|
1105
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1106
|
+
#endif
|
|
1107
|
+
},
|
|
1108
|
+
{
|
|
1109
|
+
XCore_SHR_2rus, XCORE_INS_SHR,
|
|
1110
|
+
#ifndef CAPSTONE_DIET
|
|
1111
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1112
|
+
#endif
|
|
1113
|
+
},
|
|
1114
|
+
{
|
|
1115
|
+
XCore_SHR_3r, XCORE_INS_SHR,
|
|
1116
|
+
#ifndef CAPSTONE_DIET
|
|
1117
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1118
|
+
#endif
|
|
1119
|
+
},
|
|
1120
|
+
{
|
|
1121
|
+
XCore_SSYNC_0r, XCORE_INS_SSYNC,
|
|
1122
|
+
#ifndef CAPSTONE_DIET
|
|
1123
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1124
|
+
#endif
|
|
1125
|
+
},
|
|
1126
|
+
{
|
|
1127
|
+
XCore_ST16_l3r, XCORE_INS_ST16,
|
|
1128
|
+
#ifndef CAPSTONE_DIET
|
|
1129
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1130
|
+
#endif
|
|
1131
|
+
},
|
|
1132
|
+
{
|
|
1133
|
+
XCore_ST8_l3r, XCORE_INS_ST8,
|
|
1134
|
+
#ifndef CAPSTONE_DIET
|
|
1135
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1136
|
+
#endif
|
|
1137
|
+
},
|
|
1138
|
+
{
|
|
1139
|
+
XCore_STET_0R, XCORE_INS_STW,
|
|
1140
|
+
#ifndef CAPSTONE_DIET
|
|
1141
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1142
|
+
#endif
|
|
1143
|
+
},
|
|
1144
|
+
{
|
|
1145
|
+
XCore_STSED_0R, XCORE_INS_STW,
|
|
1146
|
+
#ifndef CAPSTONE_DIET
|
|
1147
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1148
|
+
#endif
|
|
1149
|
+
},
|
|
1150
|
+
{
|
|
1151
|
+
XCore_STSPC_0R, XCORE_INS_STW,
|
|
1152
|
+
#ifndef CAPSTONE_DIET
|
|
1153
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1154
|
+
#endif
|
|
1155
|
+
},
|
|
1156
|
+
{
|
|
1157
|
+
XCore_STSSR_0R, XCORE_INS_STW,
|
|
1158
|
+
#ifndef CAPSTONE_DIET
|
|
1159
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1160
|
+
#endif
|
|
1161
|
+
},
|
|
1162
|
+
{
|
|
1163
|
+
XCore_STWDP_lru6, XCORE_INS_STW,
|
|
1164
|
+
#ifndef CAPSTONE_DIET
|
|
1165
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1166
|
+
#endif
|
|
1167
|
+
},
|
|
1168
|
+
{
|
|
1169
|
+
XCore_STWDP_ru6, XCORE_INS_STW,
|
|
1170
|
+
#ifndef CAPSTONE_DIET
|
|
1171
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1172
|
+
#endif
|
|
1173
|
+
},
|
|
1174
|
+
{
|
|
1175
|
+
XCore_STWSP_lru6, XCORE_INS_STW,
|
|
1176
|
+
#ifndef CAPSTONE_DIET
|
|
1177
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1178
|
+
#endif
|
|
1179
|
+
},
|
|
1180
|
+
{
|
|
1181
|
+
XCore_STWSP_ru6, XCORE_INS_STW,
|
|
1182
|
+
#ifndef CAPSTONE_DIET
|
|
1183
|
+
{ XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
|
|
1184
|
+
#endif
|
|
1185
|
+
},
|
|
1186
|
+
{
|
|
1187
|
+
XCore_STW_2rus, XCORE_INS_STW,
|
|
1188
|
+
#ifndef CAPSTONE_DIET
|
|
1189
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1190
|
+
#endif
|
|
1191
|
+
},
|
|
1192
|
+
{
|
|
1193
|
+
XCore_STW_l3r, XCORE_INS_STW,
|
|
1194
|
+
#ifndef CAPSTONE_DIET
|
|
1195
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1196
|
+
#endif
|
|
1197
|
+
},
|
|
1198
|
+
{
|
|
1199
|
+
XCore_SUB_2rus, XCORE_INS_SUB,
|
|
1200
|
+
#ifndef CAPSTONE_DIET
|
|
1201
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1202
|
+
#endif
|
|
1203
|
+
},
|
|
1204
|
+
{
|
|
1205
|
+
XCore_SUB_3r, XCORE_INS_SUB,
|
|
1206
|
+
#ifndef CAPSTONE_DIET
|
|
1207
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1208
|
+
#endif
|
|
1209
|
+
},
|
|
1210
|
+
{
|
|
1211
|
+
XCore_SYNCR_1r, XCORE_INS_SYNCR,
|
|
1212
|
+
#ifndef CAPSTONE_DIET
|
|
1213
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1214
|
+
#endif
|
|
1215
|
+
},
|
|
1216
|
+
{
|
|
1217
|
+
XCore_TESTCT_2r, XCORE_INS_TESTCT,
|
|
1218
|
+
#ifndef CAPSTONE_DIET
|
|
1219
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1220
|
+
#endif
|
|
1221
|
+
},
|
|
1222
|
+
{
|
|
1223
|
+
XCore_TESTLCL_l2r, XCORE_INS_TESTLCL,
|
|
1224
|
+
#ifndef CAPSTONE_DIET
|
|
1225
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1226
|
+
#endif
|
|
1227
|
+
},
|
|
1228
|
+
{
|
|
1229
|
+
XCore_TESTWCT_2r, XCORE_INS_TESTWCT,
|
|
1230
|
+
#ifndef CAPSTONE_DIET
|
|
1231
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1232
|
+
#endif
|
|
1233
|
+
},
|
|
1234
|
+
{
|
|
1235
|
+
XCore_TSETMR_2r, XCORE_INS_TSETMR,
|
|
1236
|
+
#ifndef CAPSTONE_DIET
|
|
1237
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1238
|
+
#endif
|
|
1239
|
+
},
|
|
1240
|
+
{
|
|
1241
|
+
XCore_TSETR_3r, XCORE_INS_SET,
|
|
1242
|
+
#ifndef CAPSTONE_DIET
|
|
1243
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1244
|
+
#endif
|
|
1245
|
+
},
|
|
1246
|
+
{
|
|
1247
|
+
XCore_TSTART_1R, XCORE_INS_START,
|
|
1248
|
+
#ifndef CAPSTONE_DIET
|
|
1249
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1250
|
+
#endif
|
|
1251
|
+
},
|
|
1252
|
+
{
|
|
1253
|
+
XCore_WAITEF_1R, XCORE_INS_WAITEF,
|
|
1254
|
+
#ifndef CAPSTONE_DIET
|
|
1255
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1256
|
+
#endif
|
|
1257
|
+
},
|
|
1258
|
+
{
|
|
1259
|
+
XCore_WAITET_1R, XCORE_INS_WAITET,
|
|
1260
|
+
#ifndef CAPSTONE_DIET
|
|
1261
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1262
|
+
#endif
|
|
1263
|
+
},
|
|
1264
|
+
{
|
|
1265
|
+
XCore_WAITEU_0R, XCORE_INS_WAITEU,
|
|
1266
|
+
#ifndef CAPSTONE_DIET
|
|
1267
|
+
{ 0 }, { 0 }, { 0 }, 1, 1
|
|
1268
|
+
#endif
|
|
1269
|
+
},
|
|
1270
|
+
{
|
|
1271
|
+
XCore_XOR_l3r, XCORE_INS_XOR,
|
|
1272
|
+
#ifndef CAPSTONE_DIET
|
|
1273
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1274
|
+
#endif
|
|
1275
|
+
},
|
|
1276
|
+
{
|
|
1277
|
+
XCore_ZEXT_2r, XCORE_INS_ZEXT,
|
|
1278
|
+
#ifndef CAPSTONE_DIET
|
|
1279
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1280
|
+
#endif
|
|
1281
|
+
},
|
|
1282
|
+
{
|
|
1283
|
+
XCore_ZEXT_rus, XCORE_INS_ZEXT,
|
|
1284
|
+
#ifndef CAPSTONE_DIET
|
|
1285
|
+
{ 0 }, { 0 }, { 0 }, 0, 0
|
|
1286
|
+
#endif
|
|
1287
|
+
},
|