hexcore-capstone 1.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (332) hide show
  1. package/LICENSE +26 -0
  2. package/README.md +191 -0
  3. package/binding.gyp +168 -0
  4. package/deps/capstone/LEB128.h +38 -0
  5. package/deps/capstone/MCDisassembler.h +14 -0
  6. package/deps/capstone/MCFixedLenDisassembler.h +32 -0
  7. package/deps/capstone/MCInst.c +270 -0
  8. package/deps/capstone/MCInst.h +165 -0
  9. package/deps/capstone/MCInstrDesc.c +41 -0
  10. package/deps/capstone/MCInstrDesc.h +167 -0
  11. package/deps/capstone/MCRegisterInfo.c +151 -0
  12. package/deps/capstone/MCRegisterInfo.h +116 -0
  13. package/deps/capstone/Mapping.c +254 -0
  14. package/deps/capstone/Mapping.h +174 -0
  15. package/deps/capstone/MathExtras.h +442 -0
  16. package/deps/capstone/SStream.c +181 -0
  17. package/deps/capstone/SStream.h +40 -0
  18. package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
  19. package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
  20. package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
  21. package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
  22. package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
  23. package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
  24. package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
  25. package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
  26. package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
  27. package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
  28. package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
  29. package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
  30. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
  31. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
  32. package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
  33. package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
  34. package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
  35. package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
  36. package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
  37. package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
  38. package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
  39. package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
  40. package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
  41. package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
  42. package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
  43. package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
  44. package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
  45. package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
  46. package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
  47. package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
  48. package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
  49. package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
  50. package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
  51. package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
  52. package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
  53. package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
  54. package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
  55. package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
  56. package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
  57. package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
  58. package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
  59. package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
  60. package/deps/capstone/arch/ARM/ARMModule.c +63 -0
  61. package/deps/capstone/arch/ARM/ARMModule.h +12 -0
  62. package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
  63. package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
  64. package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
  65. package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
  66. package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
  67. package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
  68. package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
  69. package/deps/capstone/arch/BPF/BPFModule.c +34 -0
  70. package/deps/capstone/arch/BPF/BPFModule.h +12 -0
  71. package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
  72. package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
  73. package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
  74. package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
  75. package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
  76. package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
  77. package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
  78. package/deps/capstone/arch/EVM/EVMModule.c +33 -0
  79. package/deps/capstone/arch/EVM/EVMModule.h +12 -0
  80. package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
  81. package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
  82. package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
  83. package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
  84. package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
  85. package/deps/capstone/arch/M680X/M680XModule.c +77 -0
  86. package/deps/capstone/arch/M680X/M680XModule.h +12 -0
  87. package/deps/capstone/arch/M680X/cpu12.inc +335 -0
  88. package/deps/capstone/arch/M680X/hcs08.inc +60 -0
  89. package/deps/capstone/arch/M680X/hd6301.inc +15 -0
  90. package/deps/capstone/arch/M680X/hd6309.inc +259 -0
  91. package/deps/capstone/arch/M680X/insn_props.inc +367 -0
  92. package/deps/capstone/arch/M680X/m6800.inc +277 -0
  93. package/deps/capstone/arch/M680X/m6801.inc +39 -0
  94. package/deps/capstone/arch/M680X/m6805.inc +277 -0
  95. package/deps/capstone/arch/M680X/m6808.inc +91 -0
  96. package/deps/capstone/arch/M680X/m6809.inc +352 -0
  97. package/deps/capstone/arch/M680X/m6811.inc +105 -0
  98. package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
  99. package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
  100. package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
  101. package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
  102. package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
  103. package/deps/capstone/arch/M68K/M68KModule.c +42 -0
  104. package/deps/capstone/arch/M68K/M68KModule.h +12 -0
  105. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
  106. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
  107. package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
  108. package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
  109. package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
  110. package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
  111. package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
  112. package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
  113. package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
  114. package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
  115. package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
  116. package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
  117. package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
  118. package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
  119. package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
  120. package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
  121. package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
  122. package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
  123. package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
  124. package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
  125. package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
  126. package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
  127. package/deps/capstone/arch/Mips/MipsModule.c +52 -0
  128. package/deps/capstone/arch/Mips/MipsModule.h +12 -0
  129. package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
  130. package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
  131. package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
  132. package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
  133. package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
  134. package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
  135. package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
  136. package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
  137. package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
  138. package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
  139. package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
  140. package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
  141. package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
  142. package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
  143. package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
  144. package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
  145. package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
  146. package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
  147. package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
  148. package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
  149. package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
  150. package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
  151. package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
  152. package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
  153. package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
  154. package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
  155. package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
  156. package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
  157. package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
  158. package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
  159. package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
  160. package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
  161. package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
  162. package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
  163. package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
  164. package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
  165. package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
  166. package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
  167. package/deps/capstone/arch/SH/SHModule.c +39 -0
  168. package/deps/capstone/arch/SH/SHModule.h +12 -0
  169. package/deps/capstone/arch/SH/mktable.rb +390 -0
  170. package/deps/capstone/arch/Sparc/Sparc.h +63 -0
  171. package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
  172. package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
  173. package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
  174. package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
  175. package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
  176. package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
  177. package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
  178. package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
  179. package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
  180. package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
  181. package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
  182. package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
  183. package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
  184. package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
  185. package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
  186. package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
  187. package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
  188. package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
  189. package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
  190. package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
  191. package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
  192. package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
  193. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
  194. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
  195. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
  196. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
  197. package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
  198. package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
  199. package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
  200. package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
  201. package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
  202. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
  203. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
  204. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
  205. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
  206. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
  207. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
  208. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
  209. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
  210. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
  211. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
  212. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
  213. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
  214. package/deps/capstone/arch/TriCore/TriCore.td +134 -0
  215. package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
  216. package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
  217. package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
  218. package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
  219. package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
  220. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
  221. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
  222. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
  223. package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
  224. package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
  225. package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
  226. package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
  227. package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
  228. package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
  229. package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
  230. package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
  231. package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
  232. package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
  233. package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
  234. package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
  235. package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
  236. package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
  237. package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
  238. package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
  239. package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
  240. package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
  241. package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
  242. package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
  243. package/deps/capstone/arch/WASM/WASMModule.c +33 -0
  244. package/deps/capstone/arch/WASM/WASMModule.h +12 -0
  245. package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
  246. package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
  247. package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
  248. package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
  249. package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
  250. package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
  251. package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
  252. package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
  253. package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
  254. package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
  255. package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
  256. package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
  257. package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
  258. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
  259. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
  260. package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
  261. package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
  262. package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
  263. package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
  264. package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
  265. package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
  266. package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
  267. package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
  268. package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
  269. package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
  270. package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
  271. package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
  272. package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
  273. package/deps/capstone/arch/X86/X86Mapping.h +96 -0
  274. package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
  275. package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
  276. package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
  277. package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
  278. package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
  279. package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
  280. package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
  281. package/deps/capstone/arch/X86/X86Module.c +94 -0
  282. package/deps/capstone/arch/X86/X86Module.h +12 -0
  283. package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
  284. package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
  285. package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
  286. package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
  287. package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
  288. package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
  289. package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
  290. package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
  291. package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
  292. package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
  293. package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
  294. package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
  295. package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
  296. package/deps/capstone/cs.c +1664 -0
  297. package/deps/capstone/cs_priv.h +101 -0
  298. package/deps/capstone/cs_simple_types.h +886 -0
  299. package/deps/capstone/include/capstone/arm.h +991 -0
  300. package/deps/capstone/include/capstone/arm64.h +3159 -0
  301. package/deps/capstone/include/capstone/bpf.h +209 -0
  302. package/deps/capstone/include/capstone/capstone.h +875 -0
  303. package/deps/capstone/include/capstone/evm.h +188 -0
  304. package/deps/capstone/include/capstone/m680x.h +537 -0
  305. package/deps/capstone/include/capstone/m68k.h +613 -0
  306. package/deps/capstone/include/capstone/mips.h +956 -0
  307. package/deps/capstone/include/capstone/mos65xx.h +204 -0
  308. package/deps/capstone/include/capstone/platform.h +122 -0
  309. package/deps/capstone/include/capstone/ppc.h +2108 -0
  310. package/deps/capstone/include/capstone/riscv.h +531 -0
  311. package/deps/capstone/include/capstone/sh.h +465 -0
  312. package/deps/capstone/include/capstone/sparc.h +520 -0
  313. package/deps/capstone/include/capstone/systemz.h +2601 -0
  314. package/deps/capstone/include/capstone/tms320c64x.h +359 -0
  315. package/deps/capstone/include/capstone/tricore.h +567 -0
  316. package/deps/capstone/include/capstone/wasm.h +250 -0
  317. package/deps/capstone/include/capstone/x86.h +1986 -0
  318. package/deps/capstone/include/capstone/xcore.h +235 -0
  319. package/deps/capstone/include/platform.h +110 -0
  320. package/deps/capstone/include/windowsce/intrin.h +12 -0
  321. package/deps/capstone/include/windowsce/stdint.h +133 -0
  322. package/deps/capstone/utils.c +140 -0
  323. package/deps/capstone/utils.h +54 -0
  324. package/index.d.ts +448 -0
  325. package/index.js +64 -0
  326. package/index.mjs +25 -0
  327. package/package.json +82 -0
  328. package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
  329. package/src/capstone_wrapper.cpp +910 -0
  330. package/src/capstone_wrapper.h +147 -0
  331. package/src/disasm_async_worker.h +215 -0
  332. package/src/main.cpp +145 -0
@@ -0,0 +1,2531 @@
1
+ /* Capstone Disassembly Engine, http://www.capstone-engine.org */
2
+ /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
3
+
4
+ /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
5
+ |* *|
6
+ |* Assembly Writer Source Fragment *|
7
+ |* *|
8
+ |* Automatically generated file, do not edit! *|
9
+ |* *|
10
+ \*===----------------------------------------------------------------------===*/
11
+
12
+ /// printInstruction - This method is automatically generated by tablegen
13
+ /// from the instruction set description.
14
+ static void printInstruction(MCInst *MI, SStream *O)
15
+ {
16
+ #ifndef CAPSTONE_DIET
17
+ static const char AsmStrs[] = {
18
+ /* 0 */ 'x', 's', 'a', 'v', 'e', 'c', '6', '4', 9, 0,
19
+ /* 10 */ 'x', 's', 'a', 'v', 'e', '6', '4', 9, 0,
20
+ /* 19 */ 'x', 'r', 's', 't', 'o', 'r', '6', '4', 9, 0,
21
+ /* 29 */ 'x', 's', 'a', 'v', 'e', 's', '6', '4', 9, 0,
22
+ /* 39 */ 'x', 'r', 's', 't', 'o', 'r', 's', '6', '4', 9, 0,
23
+ /* 50 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', '6', '4', 9, 0,
24
+ /* 62 */ 'l', 'e', 'a', 9, 0,
25
+ /* 67 */ 'j', 'a', 9, 0,
26
+ /* 71 */ 's', 'e', 't', 'a', 9, 0,
27
+ /* 77 */ 'c', 'm', 'o', 'v', 'a', 9, 0,
28
+ /* 84 */ 'm', 'o', 'v', 'd', 'i', 'r', '6', '4', 'b', 9, 0,
29
+ /* 95 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '1', '6', 'b', 9, 0,
30
+ /* 107 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', '8', 'b', 9, 0,
31
+ /* 118 */ 's', 'b', 'b', 9, 0,
32
+ /* 123 */ 'l', 'l', 'w', 'p', 'c', 'b', 9, 0,
33
+ /* 131 */ 's', 'l', 'w', 'p', 'c', 'b', 9, 0,
34
+ /* 139 */ 'j', 'b', 9, 0,
35
+ /* 143 */ 'i', 'n', 's', 'b', 9, 0,
36
+ /* 149 */ 's', 't', 'o', 's', 'b', 9, 0,
37
+ /* 156 */ 'c', 'm', 'p', 's', 'b', 9, 0,
38
+ /* 163 */ 'm', 'o', 'v', 's', 'b', 9, 0,
39
+ /* 170 */ 's', 'e', 't', 'b', 9, 0,
40
+ /* 176 */ 's', 'u', 'b', 9, 0,
41
+ /* 181 */ 'c', 'm', 'o', 'v', 'b', 9, 0,
42
+ /* 188 */ 'c', 'l', 'w', 'b', 9, 0,
43
+ /* 194 */ 'a', 'd', 'c', 9, 0,
44
+ /* 199 */ 'd', 'e', 'c', 9, 0,
45
+ /* 204 */ 'x', 's', 'a', 'v', 'e', 'c', 9, 0,
46
+ /* 212 */ 'b', 'l', 'c', 'i', 'c', 9, 0,
47
+ /* 219 */ 'b', 'l', 's', 'i', 'c', 9, 0,
48
+ /* 226 */ 't', '1', 'm', 's', 'k', 'c', 9, 0,
49
+ /* 234 */ 'i', 'n', 'c', 9, 0,
50
+ /* 239 */ 'b', 't', 'c', 9, 0,
51
+ /* 244 */ 'a', 'a', 'd', 9, 0,
52
+ /* 249 */ 'v', 'm', 'r', 'e', 'a', 'd', 9, 0,
53
+ /* 257 */ 'x', 'a', 'd', 'd', 9, 0,
54
+ /* 263 */ 'r', 'd', 's', 'e', 'e', 'd', 9, 0,
55
+ /* 271 */ 'i', 'n', 'v', 'p', 'c', 'i', 'd', 9, 0,
56
+ /* 280 */ 'r', 'd', 'p', 'i', 'd', 9, 0,
57
+ /* 287 */ 'i', 'n', 'v', 'v', 'p', 'i', 'd', 9, 0,
58
+ /* 296 */ 's', 'h', 'l', 'd', 9, 0,
59
+ /* 302 */ 'v', 'm', 'p', 't', 'r', 'l', 'd', 9, 0,
60
+ /* 311 */ 'r', 'd', 'r', 'a', 'n', 'd', 9, 0,
61
+ /* 319 */ 'b', 'o', 'u', 'n', 'd', 9, 0,
62
+ /* 326 */ 'i', 'n', 'c', 's', 's', 'p', 'd', 9, 0,
63
+ /* 335 */ 'r', 'd', 's', 's', 'p', 'd', 9, 0,
64
+ /* 343 */ 's', 'h', 'r', 'd', 9, 0,
65
+ /* 349 */ 'i', 'n', 's', 'd', 9, 0,
66
+ /* 355 */ 's', 't', 'o', 's', 'd', 9, 0,
67
+ /* 362 */ 'c', 'm', 'p', 's', 'd', 9, 0,
68
+ /* 369 */ 'w', 'r', 's', 's', 'd', 9, 0,
69
+ /* 376 */ 'w', 'r', 'u', 's', 's', 'd', 9, 0,
70
+ /* 384 */ 'm', 'o', 'v', 's', 'd', 9, 0,
71
+ /* 391 */ 'm', 'o', 'v', 's', 'x', 'd', 9, 0,
72
+ /* 399 */ 'j', 'a', 'e', 9, 0,
73
+ /* 404 */ 's', 'e', 't', 'a', 'e', 9, 0,
74
+ /* 411 */ 'c', 'm', 'o', 'v', 'a', 'e', 9, 0,
75
+ /* 419 */ 'j', 'b', 'e', 9, 0,
76
+ /* 424 */ 's', 'e', 't', 'b', 'e', 9, 0,
77
+ /* 431 */ 'c', 'm', 'o', 'v', 'b', 'e', 9, 0,
78
+ /* 439 */ 'j', 'g', 'e', 9, 0,
79
+ /* 444 */ 's', 'e', 't', 'g', 'e', 9, 0,
80
+ /* 451 */ 'c', 'm', 'o', 'v', 'g', 'e', 9, 0,
81
+ /* 459 */ 'j', 'e', 9, 0,
82
+ /* 463 */ 'j', 'l', 'e', 9, 0,
83
+ /* 468 */ 's', 'e', 't', 'l', 'e', 9, 0,
84
+ /* 475 */ 'c', 'm', 'o', 'v', 'l', 'e', 9, 0,
85
+ /* 483 */ 'j', 'n', 'e', 9, 0,
86
+ /* 488 */ 'l', 'o', 'o', 'p', 'n', 'e', 9, 0,
87
+ /* 496 */ 's', 'e', 't', 'n', 'e', 9, 0,
88
+ /* 503 */ 'c', 'm', 'o', 'v', 'n', 'e', 9, 0,
89
+ /* 511 */ 'l', 'o', 'o', 'p', 'e', 9, 0,
90
+ /* 518 */ 'r', 'd', 'f', 's', 'b', 'a', 's', 'e', 9, 0,
91
+ /* 528 */ 'w', 'r', 'f', 's', 'b', 'a', 's', 'e', 9, 0,
92
+ /* 538 */ 'r', 'd', 'g', 's', 'b', 'a', 's', 'e', 9, 0,
93
+ /* 548 */ 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', 9, 0,
94
+ /* 558 */ 't', 'p', 'a', 'u', 's', 'e', 9, 0,
95
+ /* 566 */ 's', 'e', 't', 'e', 9, 0,
96
+ /* 572 */ 'v', 'm', 'w', 'r', 'i', 't', 'e', 9, 0,
97
+ /* 581 */ 'p', 't', 'w', 'r', 'i', 't', 'e', 9, 0,
98
+ /* 590 */ 'c', 'l', 'd', 'e', 'm', 'o', 't', 'e', 9, 0,
99
+ /* 600 */ 'x', 's', 'a', 'v', 'e', 9, 0,
100
+ /* 607 */ 'c', 'm', 'o', 'v', 'e', 9, 0,
101
+ /* 614 */ 'b', 's', 'f', 9, 0,
102
+ /* 619 */ 'r', 'e', 't', 'f', 9, 0,
103
+ /* 625 */ 'n', 'e', 'g', 9, 0,
104
+ /* 630 */ 'c', 'm', 'p', 'x', 'c', 'h', 'g', 9, 0,
105
+ /* 639 */ 'j', 'g', 9, 0,
106
+ /* 643 */ 'i', 'n', 'v', 'l', 'p', 'g', 9, 0,
107
+ /* 651 */ 's', 'e', 't', 'g', 9, 0,
108
+ /* 657 */ 'c', 'm', 'o', 'v', 'g', 9, 0,
109
+ /* 664 */ 'p', 'u', 's', 'h', 9, 0,
110
+ /* 670 */ 'b', 'l', 'c', 'i', 9, 0,
111
+ /* 676 */ 'b', 'z', 'h', 'i', 9, 0,
112
+ /* 682 */ 'm', 'o', 'v', 'd', 'i', 'r', 'i', 9, 0,
113
+ /* 691 */ 'b', 'l', 's', 'i', 9, 0,
114
+ /* 697 */ 'b', 'l', 'c', 'm', 's', 'k', 9, 0,
115
+ /* 705 */ 'b', 'l', 's', 'm', 's', 'k', 9, 0,
116
+ /* 713 */ 't', 'z', 'm', 's', 'k', 9, 0,
117
+ /* 720 */ 's', 'a', 'l', 9, 0,
118
+ /* 725 */ 'l', 'w', 'p', 'v', 'a', 'l', 9, 0,
119
+ /* 733 */ 'r', 'c', 'l', 9, 0,
120
+ /* 738 */ 's', 'h', 'l', 9, 0,
121
+ /* 743 */ 'j', 'l', 9, 0,
122
+ /* 747 */ 'l', 'c', 'a', 'l', 'l', 9, 0,
123
+ /* 754 */ 'b', 'l', 'c', 'f', 'i', 'l', 'l', 9, 0,
124
+ /* 763 */ 'b', 'l', 's', 'f', 'i', 'l', 'l', 9, 0,
125
+ /* 772 */ 'r', 'o', 'l', 9, 0,
126
+ /* 777 */ 'a', 'r', 'p', 'l', 9, 0,
127
+ /* 783 */ 'l', 's', 'l', 9, 0,
128
+ /* 788 */ 's', 'e', 't', 'l', 9, 0,
129
+ /* 794 */ 'i', 'm', 'u', 'l', 9, 0,
130
+ /* 800 */ 'c', 'm', 'o', 'v', 'l', 9, 0,
131
+ /* 807 */ 'a', 'a', 'm', 9, 0,
132
+ /* 812 */ 'a', 'n', 'd', 'n', 9, 0,
133
+ /* 818 */ 'v', 'm', 'x', 'o', 'n', 9, 0,
134
+ /* 825 */ 'j', 'o', 9, 0,
135
+ /* 829 */ 'j', 'n', 'o', 9, 0,
136
+ /* 834 */ 's', 'e', 't', 'n', 'o', 9, 0,
137
+ /* 841 */ 'c', 'm', 'o', 'v', 'n', 'o', 9, 0,
138
+ /* 849 */ 's', 'e', 't', 'o', 9, 0,
139
+ /* 855 */ 'c', 'm', 'o', 'v', 'o', 9, 0,
140
+ /* 862 */ 'b', 's', 'w', 'a', 'p', 9, 0,
141
+ /* 869 */ 'p', 'd', 'e', 'p', 9, 0,
142
+ /* 875 */ 'j', 'p', 9, 0,
143
+ /* 879 */ 'c', 'm', 'p', 9, 0,
144
+ /* 884 */ 'l', 'j', 'm', 'p', 9, 0,
145
+ /* 890 */ 'j', 'n', 'p', 9, 0,
146
+ /* 895 */ 's', 'e', 't', 'n', 'p', 9, 0,
147
+ /* 902 */ 'c', 'm', 'o', 'v', 'n', 'p', 9, 0,
148
+ /* 910 */ 'n', 'o', 'p', 9, 0,
149
+ /* 915 */ 'l', 'o', 'o', 'p', 9, 0,
150
+ /* 921 */ 'p', 'o', 'p', 9, 0,
151
+ /* 926 */ 'r', 's', 't', 'o', 'r', 's', 's', 'p', 9, 0,
152
+ /* 936 */ 's', 'e', 't', 'p', 9, 0,
153
+ /* 942 */ 'c', 'm', 'o', 'v', 'p', 9, 0,
154
+ /* 949 */ 'r', 'e', 't', 'f', 'q', 9, 0,
155
+ /* 956 */ 'i', 'n', 'c', 's', 's', 'p', 'q', 9, 0,
156
+ /* 965 */ 'r', 'd', 's', 's', 'p', 'q', 9, 0,
157
+ /* 973 */ 's', 't', 'o', 's', 'q', 9, 0,
158
+ /* 980 */ 'c', 'm', 'p', 's', 'q', 9, 0,
159
+ /* 987 */ 'w', 'r', 's', 's', 'q', 9, 0,
160
+ /* 994 */ 'w', 'r', 'u', 's', 's', 'q', 9, 0,
161
+ /* 1002 */ 'm', 'o', 'v', 's', 'q', 9, 0,
162
+ /* 1009 */ 'v', 'm', 'c', 'l', 'e', 'a', 'r', 9, 0,
163
+ /* 1018 */ 'l', 'a', 'r', 9, 0,
164
+ /* 1023 */ 's', 'a', 'r', 9, 0,
165
+ /* 1028 */ 'r', 'c', 'r', 9, 0,
166
+ /* 1033 */ 'e', 'n', 't', 'e', 'r', 9, 0,
167
+ /* 1040 */ 's', 'h', 'r', 9, 0,
168
+ /* 1045 */ 'r', 'o', 'r', 9, 0,
169
+ /* 1050 */ 'u', 'm', 'o', 'n', 'i', 't', 'o', 'r', 9, 0,
170
+ /* 1060 */ 'x', 'r', 's', 't', 'o', 'r', 9, 0,
171
+ /* 1068 */ 'x', 'o', 'r', 9, 0,
172
+ /* 1073 */ 'v', 'e', 'r', 'r', 9, 0,
173
+ /* 1079 */ 'b', 's', 'r', 9, 0,
174
+ /* 1084 */ 'b', 'l', 's', 'r', 9, 0,
175
+ /* 1090 */ 'b', 't', 'r', 9, 0,
176
+ /* 1095 */ 'l', 't', 'r', 9, 0,
177
+ /* 1100 */ 's', 't', 'r', 9, 0,
178
+ /* 1105 */ 'b', 'e', 'x', 't', 'r', 9, 0,
179
+ /* 1112 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 0,
180
+ /* 1120 */ 'b', 'l', 'c', 's', 9, 0,
181
+ /* 1126 */ 'l', 'd', 's', 9, 0,
182
+ /* 1131 */ 'l', 'e', 's', 9, 0,
183
+ /* 1136 */ 'x', 's', 'a', 'v', 'e', 's', 9, 0,
184
+ /* 1144 */ 'l', 'f', 's', 9, 0,
185
+ /* 1149 */ 'l', 'g', 's', 9, 0,
186
+ /* 1154 */ 'j', 's', 9, 0,
187
+ /* 1158 */ 'l', 'w', 'p', 'i', 'n', 's', 9, 0,
188
+ /* 1166 */ 'j', 'n', 's', 9, 0,
189
+ /* 1171 */ 's', 'e', 't', 'n', 's', 9, 0,
190
+ /* 1178 */ 'c', 'm', 'o', 'v', 'n', 's', 9, 0,
191
+ /* 1186 */ 'x', 'r', 's', 't', 'o', 'r', 's', 9, 0,
192
+ /* 1195 */ 'l', 's', 's', 9, 0,
193
+ /* 1200 */ 'b', 't', 's', 9, 0,
194
+ /* 1205 */ 's', 'e', 't', 's', 9, 0,
195
+ /* 1211 */ 'c', 'm', 'o', 'v', 's', 9, 0,
196
+ /* 1218 */ 'b', 't', 9, 0,
197
+ /* 1222 */ 'l', 'g', 'd', 't', 9, 0,
198
+ /* 1228 */ 's', 'g', 'd', 't', 9, 0,
199
+ /* 1234 */ 'l', 'i', 'd', 't', 9, 0,
200
+ /* 1240 */ 's', 'i', 'd', 't', 9, 0,
201
+ /* 1246 */ 'l', 'l', 'd', 't', 9, 0,
202
+ /* 1252 */ 's', 'l', 'd', 't', 9, 0,
203
+ /* 1258 */ 'r', 'e', 't', 9, 0,
204
+ /* 1263 */ 'u', 'm', 'w', 'a', 'i', 't', 9, 0,
205
+ /* 1271 */ 'l', 'z', 'c', 'n', 't', 9, 0,
206
+ /* 1278 */ 't', 'z', 'c', 'n', 't', 9, 0,
207
+ /* 1285 */ 'i', 'n', 't', 9, 0,
208
+ /* 1290 */ 'n', 'o', 't', 9, 0,
209
+ /* 1295 */ 'i', 'n', 'v', 'e', 'p', 't', 9, 0,
210
+ /* 1303 */ 'x', 's', 'a', 'v', 'e', 'o', 'p', 't', 9, 0,
211
+ /* 1313 */ 'c', 'l', 'f', 'l', 'u', 's', 'h', 'o', 'p', 't', 9, 0,
212
+ /* 1325 */ 't', 'e', 's', 't', 9, 0,
213
+ /* 1331 */ 'v', 'm', 'p', 't', 'r', 's', 't', 9, 0,
214
+ /* 1340 */ 'o', 'u', 't', 9, 0,
215
+ /* 1345 */ 'p', 'e', 'x', 't', 9, 0,
216
+ /* 1351 */ 'i', 'd', 'i', 'v', 9, 0,
217
+ /* 1357 */ 'm', 'o', 'v', 9, 0,
218
+ /* 1362 */ 'v', 'e', 'r', 'w', 9, 0,
219
+ /* 1368 */ 'l', 'm', 's', 'w', 9, 0,
220
+ /* 1374 */ 's', 'm', 's', 'w', 9, 0,
221
+ /* 1380 */ 'i', 'n', 's', 'w', 9, 0,
222
+ /* 1386 */ 's', 't', 'o', 's', 'w', 9, 0,
223
+ /* 1393 */ 'c', 'm', 'p', 's', 'w', 9, 0,
224
+ /* 1400 */ 'm', 'o', 'v', 's', 'w', 9, 0,
225
+ /* 1407 */ 'a', 'd', 'c', 'x', 9, 0,
226
+ /* 1413 */ 's', 'h', 'l', 'x', 9, 0,
227
+ /* 1419 */ 'm', 'u', 'l', 'x', 9, 0,
228
+ /* 1425 */ 'a', 'd', 'o', 'x', 9, 0,
229
+ /* 1431 */ 's', 'a', 'r', 'x', 9, 0,
230
+ /* 1437 */ 's', 'h', 'r', 'x', 9, 0,
231
+ /* 1443 */ 'r', 'o', 'r', 'x', 9, 0,
232
+ /* 1449 */ 'm', 'o', 'v', 's', 'x', 9, 0,
233
+ /* 1456 */ 'm', 'o', 'v', 'z', 'x', 9, 0,
234
+ /* 1463 */ 'c', 'l', 'r', 's', 's', 'b', 's', 'y', 9, 0,
235
+ /* 1473 */ 'j', 'e', 'c', 'x', 'z', 9, 0,
236
+ /* 1480 */ 'j', 'c', 'x', 'z', 9, 0,
237
+ /* 1486 */ 'j', 'r', 'c', 'x', 'z', 9, 0,
238
+ /* 1493 */ 's', 'b', 'b', 9, 'a', 'l', ',', 32, 0,
239
+ /* 1502 */ 's', 'c', 'a', 's', 'b', 9, 'a', 'l', ',', 32, 0,
240
+ /* 1513 */ 'l', 'o', 'd', 's', 'b', 9, 'a', 'l', ',', 32, 0,
241
+ /* 1524 */ 's', 'u', 'b', 9, 'a', 'l', ',', 32, 0,
242
+ /* 1533 */ 'a', 'd', 'c', 9, 'a', 'l', ',', 32, 0,
243
+ /* 1542 */ 'a', 'd', 'd', 9, 'a', 'l', ',', 32, 0,
244
+ /* 1551 */ 'a', 'n', 'd', 9, 'a', 'l', ',', 32, 0,
245
+ /* 1560 */ 'i', 'n', 9, 'a', 'l', ',', 32, 0,
246
+ /* 1568 */ 'c', 'm', 'p', 9, 'a', 'l', ',', 32, 0,
247
+ /* 1577 */ 'x', 'o', 'r', 9, 'a', 'l', ',', 32, 0,
248
+ /* 1586 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 'a', 'l', ',', 32, 0,
249
+ /* 1598 */ 't', 'e', 's', 't', 9, 'a', 'l', ',', 32, 0,
250
+ /* 1608 */ 'm', 'o', 'v', 9, 'a', 'l', ',', 32, 0,
251
+ /* 1617 */ 's', 'b', 'b', 9, 'a', 'x', ',', 32, 0,
252
+ /* 1626 */ 's', 'u', 'b', 9, 'a', 'x', ',', 32, 0,
253
+ /* 1635 */ 'a', 'd', 'c', 9, 'a', 'x', ',', 32, 0,
254
+ /* 1644 */ 'a', 'd', 'd', 9, 'a', 'x', ',', 32, 0,
255
+ /* 1653 */ 'a', 'n', 'd', 9, 'a', 'x', ',', 32, 0,
256
+ /* 1662 */ 'i', 'n', 9, 'a', 'x', ',', 32, 0,
257
+ /* 1670 */ 'c', 'm', 'p', 9, 'a', 'x', ',', 32, 0,
258
+ /* 1679 */ 'x', 'o', 'r', 9, 'a', 'x', ',', 32, 0,
259
+ /* 1688 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 'a', 'x', ',', 32, 0,
260
+ /* 1700 */ 't', 'e', 's', 't', 9, 'a', 'x', ',', 32, 0,
261
+ /* 1710 */ 'm', 'o', 'v', 9, 'a', 'x', ',', 32, 0,
262
+ /* 1719 */ 's', 'c', 'a', 's', 'w', 9, 'a', 'x', ',', 32, 0,
263
+ /* 1730 */ 'l', 'o', 'd', 's', 'w', 9, 'a', 'x', ',', 32, 0,
264
+ /* 1741 */ 's', 'b', 'b', 9, 'e', 'a', 'x', ',', 32, 0,
265
+ /* 1751 */ 's', 'u', 'b', 9, 'e', 'a', 'x', ',', 32, 0,
266
+ /* 1761 */ 'a', 'd', 'c', 9, 'e', 'a', 'x', ',', 32, 0,
267
+ /* 1771 */ 'a', 'd', 'd', 9, 'e', 'a', 'x', ',', 32, 0,
268
+ /* 1781 */ 'a', 'n', 'd', 9, 'e', 'a', 'x', ',', 32, 0,
269
+ /* 1791 */ 's', 'c', 'a', 's', 'd', 9, 'e', 'a', 'x', ',', 32, 0,
270
+ /* 1803 */ 'l', 'o', 'd', 's', 'd', 9, 'e', 'a', 'x', ',', 32, 0,
271
+ /* 1815 */ 'i', 'n', 9, 'e', 'a', 'x', ',', 32, 0,
272
+ /* 1824 */ 'c', 'm', 'p', 9, 'e', 'a', 'x', ',', 32, 0,
273
+ /* 1834 */ 'x', 'o', 'r', 9, 'e', 'a', 'x', ',', 32, 0,
274
+ /* 1844 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 'e', 'a', 'x', ',', 32, 0,
275
+ /* 1857 */ 't', 'e', 's', 't', 9, 'e', 'a', 'x', ',', 32, 0,
276
+ /* 1868 */ 'm', 'o', 'v', 9, 'e', 'a', 'x', ',', 32, 0,
277
+ /* 1878 */ 's', 'b', 'b', 9, 'r', 'a', 'x', ',', 32, 0,
278
+ /* 1888 */ 's', 'u', 'b', 9, 'r', 'a', 'x', ',', 32, 0,
279
+ /* 1898 */ 'a', 'd', 'c', 9, 'r', 'a', 'x', ',', 32, 0,
280
+ /* 1908 */ 'a', 'd', 'd', 9, 'r', 'a', 'x', ',', 32, 0,
281
+ /* 1918 */ 'a', 'n', 'd', 9, 'r', 'a', 'x', ',', 32, 0,
282
+ /* 1928 */ 'c', 'm', 'p', 9, 'r', 'a', 'x', ',', 32, 0,
283
+ /* 1938 */ 's', 'c', 'a', 's', 'q', 9, 'r', 'a', 'x', ',', 32, 0,
284
+ /* 1950 */ 'l', 'o', 'd', 's', 'q', 9, 'r', 'a', 'x', ',', 32, 0,
285
+ /* 1962 */ 'x', 'o', 'r', 9, 'r', 'a', 'x', ',', 32, 0,
286
+ /* 1972 */ 'm', 'o', 'v', 'a', 'b', 's', 9, 'r', 'a', 'x', ',', 32, 0,
287
+ /* 1985 */ 't', 'e', 's', 't', 9, 'r', 'a', 'x', ',', 32, 0,
288
+ /* 1996 */ 'm', 'o', 'v', 9, 'r', 'a', 'x', ',', 32, 0,
289
+ /* 2006 */ 'o', 'u', 't', 's', 'b', 9, 'd', 'x', ',', 32, 0,
290
+ /* 2017 */ 'o', 'u', 't', 's', 'd', 9, 'd', 'x', ',', 32, 0,
291
+ /* 2028 */ 'o', 'u', 't', 's', 'w', 9, 'd', 'x', ',', 32, 0,
292
+ /* 2039 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'P', 'a', 't', 'c', 'h', 'a', 'b', 'l', 'e', 32, 'R', 'E', 'T', '.', 0,
293
+ /* 2070 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'T', 'y', 'p', 'e', 'd', 32, 'E', 'v', 'e', 'n', 't', 32, 'L', 'o', 'g', '.', 0,
294
+ /* 2094 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'C', 'u', 's', 't', 'o', 'm', 32, 'E', 'v', 'e', 'n', 't', 32, 'L', 'o', 'g', '.', 0,
295
+ /* 2119 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'E', 'n', 't', 'e', 'r', '.', 0,
296
+ /* 2142 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'T', 'a', 'i', 'l', 32, 'C', 'a', 'l', 'l', 32, 'E', 'x', 'i', 't', '.', 0,
297
+ /* 2165 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'E', 'x', 'i', 't', '.', 0,
298
+ /* 2187 */ 'u', 'd', '0', 0,
299
+ /* 2191 */ 'x', 's', 'h', 'a', '1', 0,
300
+ /* 2197 */ 'u', 'd', '1', 0,
301
+ /* 2201 */ 'i', 'n', 't', '1', 0,
302
+ /* 2206 */ 'e', 'n', 'd', 'b', 'r', '3', '2', 0,
303
+ /* 2214 */ 'u', 'd', '2', 0,
304
+ /* 2218 */ 'i', 'n', 't', '3', 0,
305
+ /* 2223 */ 'e', 'n', 'd', 'b', 'r', '6', '4', 0,
306
+ /* 2231 */ 'r', 'e', 'x', '6', '4', 0,
307
+ /* 2237 */ 'd', 'a', 't', 'a', '1', '6', 0,
308
+ /* 2244 */ 'x', 's', 'h', 'a', '2', '5', '6', 0,
309
+ /* 2252 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
310
+ /* 2265 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
311
+ /* 2272 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
312
+ /* 2282 */ 'D', 'B', 'G', '_', 'L', 'A', 'B', 'E', 'L', 0,
313
+ /* 2292 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
314
+ /* 2307 */ 'a', 'a', 'a', 0,
315
+ /* 2311 */ 'd', 'a', 'a', 0,
316
+ /* 2315 */ 'x', 'c', 'r', 'y', 'p', 't', 'e', 'c', 'b', 0,
317
+ /* 2325 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'f', 'b', 0,
318
+ /* 2335 */ 'x', 'c', 'r', 'y', 'p', 't', 'o', 'f', 'b', 0,
319
+ /* 2345 */ 'x', 'l', 'a', 't', 'b', 0,
320
+ /* 2351 */ 'c', 'l', 'a', 'c', 0,
321
+ /* 2356 */ 's', 't', 'a', 'c', 0,
322
+ /* 2361 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 'b', 'c', 0,
323
+ /* 2371 */ 'g', 'e', 't', 's', 'e', 'c', 0,
324
+ /* 2378 */ 's', 'a', 'l', 'c', 0,
325
+ /* 2383 */ 'c', 'l', 'c', 0,
326
+ /* 2387 */ 'c', 'm', 'c', 0,
327
+ /* 2391 */ 'r', 'd', 'p', 'm', 'c', 0,
328
+ /* 2397 */ 'v', 'm', 'f', 'u', 'n', 'c', 0,
329
+ /* 2404 */ 'r', 'd', 't', 's', 'c', 0,
330
+ /* 2410 */ 's', 't', 'c', 0,
331
+ /* 2414 */ 'p', 'u', 's', 'h', 'f', 'd', 0,
332
+ /* 2421 */ 'p', 'o', 'p', 'f', 'd', 0,
333
+ /* 2427 */ 'c', 'p', 'u', 'i', 'd', 0,
334
+ /* 2433 */ 'c', 'l', 'd', 0,
335
+ /* 2437 */ 'i', 'r', 'e', 't', 'd', 0,
336
+ /* 2443 */ 's', 't', 'd', 0,
337
+ /* 2447 */ 'w', 'b', 'i', 'n', 'v', 'd', 0,
338
+ /* 2454 */ 'w', 'b', 'n', 'o', 'i', 'n', 'v', 'd', 0,
339
+ /* 2463 */ 'c', 'w', 'd', 0,
340
+ /* 2467 */ 'c', 'w', 'd', 'e', 0,
341
+ /* 2472 */ 'v', 'm', 'r', 'e', 's', 'u', 'm', 'e', 0,
342
+ /* 2481 */ 'r', 'e', 'p', 'n', 'e', 0,
343
+ /* 2487 */ 'c', 'd', 'q', 'e', 0,
344
+ /* 2492 */ 'x', 's', 't', 'o', 'r', 'e', 0,
345
+ /* 2499 */ 'l', 'e', 'a', 'v', 'e', 0,
346
+ /* 2505 */ 'v', 'm', 'x', 'o', 'f', 'f', 0,
347
+ /* 2512 */ 'l', 'a', 'h', 'f', 0,
348
+ /* 2517 */ 's', 'a', 'h', 'f', 0,
349
+ /* 2522 */ 'p', 'u', 's', 'h', 'f', 0,
350
+ /* 2528 */ 'p', 'o', 'p', 'f', 0,
351
+ /* 2533 */ 'r', 'e', 't', 'f', 0,
352
+ /* 2538 */ 'p', 'c', 'o', 'n', 'f', 'i', 'g', 0,
353
+ /* 2546 */ 'v', 'm', 'l', 'a', 'u', 'n', 'c', 'h', 0,
354
+ /* 2555 */ 'c', 'l', 'g', 'i', 0,
355
+ /* 2560 */ 's', 't', 'g', 'i', 0,
356
+ /* 2565 */ 'c', 'l', 'i', 0,
357
+ /* 2569 */ 's', 't', 'i', 0,
358
+ /* 2573 */ 'l', 'o', 'c', 'k', 0,
359
+ /* 2578 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'a', 'l', 0,
360
+ /* 2589 */ 'p', 'u', 's', 'h', 'a', 'l', 0,
361
+ /* 2596 */ 'p', 'o', 'p', 'a', 'l', 0,
362
+ /* 2602 */ '#', 32, 'F', 'E', 'n', 't', 'r', 'y', 32, 'c', 'a', 'l', 'l', 0,
363
+ /* 2616 */ 'v', 'm', 'm', 'c', 'a', 'l', 'l', 0,
364
+ /* 2624 */ 'v', 'm', 'c', 'a', 'l', 'l', 0,
365
+ /* 2631 */ 's', 'y', 's', 'c', 'a', 'l', 'l', 0,
366
+ /* 2639 */ 'm', 'o', 'n', 't', 'm', 'u', 'l', 0,
367
+ /* 2647 */ 'f', 's', 'e', 't', 'p', 'm', 0,
368
+ /* 2654 */ 'r', 's', 'm', 0,
369
+ /* 2658 */ 'c', 'q', 'o', 0,
370
+ /* 2662 */ 'c', 'l', 'z', 'e', 'r', 'o', 0,
371
+ /* 2669 */ 'i', 'n', 't', 'o', 0,
372
+ /* 2674 */ 'r', 'd', 't', 's', 'c', 'p', 0,
373
+ /* 2681 */ 'r', 'e', 'p', 0,
374
+ /* 2685 */ 'n', 'o', 'p', 0,
375
+ /* 2689 */ 's', 'a', 'v', 'e', 'p', 'r', 'e', 'v', 's', 's', 'p', 0,
376
+ /* 2701 */ 'c', 'd', 'q', 0,
377
+ /* 2705 */ 'p', 'u', 's', 'h', 'f', 'q', 0,
378
+ /* 2712 */ 'p', 'o', 'p', 'f', 'q', 0,
379
+ /* 2718 */ 'r', 'e', 't', 'f', 'q', 0,
380
+ /* 2724 */ 'i', 'r', 'e', 't', 'q', 0,
381
+ /* 2730 */ 's', 'y', 's', 'r', 'e', 't', 'q', 0,
382
+ /* 2738 */ 's', 'y', 's', 'e', 'x', 'i', 't', 'q', 0,
383
+ /* 2747 */ 's', 'y', 's', 'e', 'n', 't', 'e', 'r', 0,
384
+ /* 2756 */ 'r', 'd', 'm', 's', 'r', 0,
385
+ /* 2762 */ 'w', 'r', 'm', 's', 'r', 0,
386
+ /* 2768 */ 'x', 'c', 'r', 'y', 'p', 't', 'c', 't', 'r', 0,
387
+ /* 2778 */ 'a', 'a', 's', 0,
388
+ /* 2782 */ 'd', 'a', 's', 0,
389
+ /* 2786 */ 'p', 'u', 's', 'h', 9, 'c', 's', 0,
390
+ /* 2794 */ 'p', 'u', 's', 'h', 9, 'd', 's', 0,
391
+ /* 2802 */ 'p', 'o', 'p', 9, 'd', 's', 0,
392
+ /* 2809 */ 'p', 'u', 's', 'h', 9, 'e', 's', 0,
393
+ /* 2817 */ 'p', 'o', 'p', 9, 'e', 's', 0,
394
+ /* 2824 */ 'p', 'u', 's', 'h', 9, 'f', 's', 0,
395
+ /* 2832 */ 'p', 'o', 'p', 9, 'f', 's', 0,
396
+ /* 2839 */ 'p', 'u', 's', 'h', 9, 'g', 's', 0,
397
+ /* 2847 */ 'p', 'o', 'p', 9, 'g', 's', 0,
398
+ /* 2854 */ 's', 'w', 'a', 'p', 'g', 's', 0,
399
+ /* 2861 */ 'p', 'u', 's', 'h', 9, 's', 's', 0,
400
+ /* 2869 */ 'p', 'o', 'p', 9, 's', 's', 0,
401
+ /* 2876 */ 'c', 'l', 't', 's', 0,
402
+ /* 2881 */ 'i', 'r', 'e', 't', 0,
403
+ /* 2886 */ 's', 'y', 's', 'r', 'e', 't', 0,
404
+ /* 2893 */ 's', 'y', 's', 'e', 'x', 'i', 't', 0,
405
+ /* 2901 */ 'h', 'l', 't', 0,
406
+ /* 2905 */ 'r', 'd', 'p', 'k', 'r', 'u', 0,
407
+ /* 2912 */ 'w', 'r', 'p', 'k', 'r', 'u', 0,
408
+ /* 2919 */ 'x', 'g', 'e', 't', 'b', 'v', 0,
409
+ /* 2926 */ 'x', 's', 'e', 't', 'b', 'v', 0,
410
+ /* 2933 */ 'p', 'u', 's', 'h', 'a', 'w', 0,
411
+ /* 2940 */ 'p', 'o', 'p', 'a', 'w', 0,
412
+ /* 2946 */ 'c', 'b', 'w', 0,
413
+ /* 2950 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'a', 'x', 0,
414
+ /* 2961 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'e', 'a', 'x', 0,
415
+ /* 2972 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'e', 'a', 'x', 0,
416
+ /* 2983 */ 'v', 'm', 'r', 'u', 'n', 9, 'e', 'a', 'x', 0,
417
+ /* 2993 */ 's', 'k', 'i', 'n', 'i', 't', 9, 'e', 'a', 'x', 0,
418
+ /* 3004 */ 'o', 'u', 't', 9, 'd', 'x', ',', 32, 'e', 'a', 'x', 0,
419
+ /* 3016 */ 'v', 'm', 'l', 'o', 'a', 'd', 9, 'r', 'a', 'x', 0,
420
+ /* 3027 */ 'v', 'm', 's', 'a', 'v', 'e', 9, 'r', 'a', 'x', 0,
421
+ /* 3038 */ 'v', 'm', 'r', 'u', 'n', 9, 'r', 'a', 'x', 0,
422
+ /* 3048 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'e', 'a', 'x', ',', 32, 'e', 'c', 'x', 0,
423
+ /* 3065 */ 'i', 'n', 'v', 'l', 'p', 'g', 'a', 9, 'r', 'a', 'x', ',', 32, 'e', 'c', 'x', 0,
424
+ /* 3082 */ 'i', 'n', 9, 'a', 'l', ',', 32, 'd', 'x', 0,
425
+ /* 3092 */ 'i', 'n', 9, 'a', 'x', ',', 32, 'd', 'x', 0,
426
+ /* 3102 */ 'i', 'n', 9, 'e', 'a', 'x', ',', 32, 'd', 'x', 0,
427
+ /* 3113 */ 'm', 'o', 'n', 'i', 't', 'o', 'r', 'x', 0,
428
+ /* 3122 */ 'm', 'w', 'a', 'i', 't', 'x', 0,
429
+ /* 3129 */ 's', 'e', 't', 's', 's', 'b', 's', 'y', 0,
430
+ };
431
+ #endif
432
+
433
+ static const uint32_t OpInfo0[] = {
434
+ 0U, // PHI
435
+ 0U, // INLINEASM
436
+ 0U, // CFI_INSTRUCTION
437
+ 0U, // EH_LABEL
438
+ 0U, // GC_LABEL
439
+ 0U, // ANNOTATION_LABEL
440
+ 0U, // KILL
441
+ 0U, // EXTRACT_SUBREG
442
+ 0U, // INSERT_SUBREG
443
+ 0U, // IMPLICIT_DEF
444
+ 0U, // SUBREG_TO_REG
445
+ 0U, // COPY_TO_REGCLASS
446
+ 2273U, // DBG_VALUE
447
+ 2283U, // DBG_LABEL
448
+ 0U, // REG_SEQUENCE
449
+ 0U, // COPY
450
+ 2266U, // BUNDLE
451
+ 2293U, // LIFETIME_START
452
+ 2253U, // LIFETIME_END
453
+ 0U, // STACKMAP
454
+ 2603U, // FENTRY_CALL
455
+ 0U, // PATCHPOINT
456
+ 0U, // LOAD_STACK_GUARD
457
+ 0U, // STATEPOINT
458
+ 0U, // LOCAL_ESCAPE
459
+ 0U, // FAULTING_OP
460
+ 0U, // PATCHABLE_OP
461
+ 2120U, // PATCHABLE_FUNCTION_ENTER
462
+ 2040U, // PATCHABLE_RET
463
+ 2166U, // PATCHABLE_FUNCTION_EXIT
464
+ 2143U, // PATCHABLE_TAIL_CALL
465
+ 2095U, // PATCHABLE_EVENT_CALL
466
+ 2071U, // PATCHABLE_TYPED_EVENT_CALL
467
+ 0U, // ICALL_BRANCH_FUNNEL
468
+ 0U, // G_ADD
469
+ 0U, // G_SUB
470
+ 0U, // G_MUL
471
+ 0U, // G_SDIV
472
+ 0U, // G_UDIV
473
+ 0U, // G_SREM
474
+ 0U, // G_UREM
475
+ 0U, // G_AND
476
+ 0U, // G_OR
477
+ 0U, // G_XOR
478
+ 0U, // G_IMPLICIT_DEF
479
+ 0U, // G_PHI
480
+ 0U, // G_FRAME_INDEX
481
+ 0U, // G_GLOBAL_VALUE
482
+ 0U, // G_EXTRACT
483
+ 0U, // G_UNMERGE_VALUES
484
+ 0U, // G_INSERT
485
+ 0U, // G_MERGE_VALUES
486
+ 0U, // G_PTRTOINT
487
+ 0U, // G_INTTOPTR
488
+ 0U, // G_BITCAST
489
+ 0U, // G_LOAD
490
+ 0U, // G_SEXTLOAD
491
+ 0U, // G_ZEXTLOAD
492
+ 0U, // G_STORE
493
+ 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
494
+ 0U, // G_ATOMIC_CMPXCHG
495
+ 0U, // G_ATOMICRMW_XCHG
496
+ 0U, // G_ATOMICRMW_ADD
497
+ 0U, // G_ATOMICRMW_SUB
498
+ 0U, // G_ATOMICRMW_AND
499
+ 0U, // G_ATOMICRMW_NAND
500
+ 0U, // G_ATOMICRMW_OR
501
+ 0U, // G_ATOMICRMW_XOR
502
+ 0U, // G_ATOMICRMW_MAX
503
+ 0U, // G_ATOMICRMW_MIN
504
+ 0U, // G_ATOMICRMW_UMAX
505
+ 0U, // G_ATOMICRMW_UMIN
506
+ 0U, // G_BRCOND
507
+ 0U, // G_BRINDIRECT
508
+ 0U, // G_INTRINSIC
509
+ 0U, // G_INTRINSIC_W_SIDE_EFFECTS
510
+ 0U, // G_ANYEXT
511
+ 0U, // G_TRUNC
512
+ 0U, // G_CONSTANT
513
+ 0U, // G_FCONSTANT
514
+ 0U, // G_VASTART
515
+ 0U, // G_VAARG
516
+ 0U, // G_SEXT
517
+ 0U, // G_ZEXT
518
+ 0U, // G_SHL
519
+ 0U, // G_LSHR
520
+ 0U, // G_ASHR
521
+ 0U, // G_ICMP
522
+ 0U, // G_FCMP
523
+ 0U, // G_SELECT
524
+ 0U, // G_UADDE
525
+ 0U, // G_USUBE
526
+ 0U, // G_SADDO
527
+ 0U, // G_SSUBO
528
+ 0U, // G_UMULO
529
+ 0U, // G_SMULO
530
+ 0U, // G_UMULH
531
+ 0U, // G_SMULH
532
+ 0U, // G_FADD
533
+ 0U, // G_FSUB
534
+ 0U, // G_FMUL
535
+ 0U, // G_FMA
536
+ 0U, // G_FDIV
537
+ 0U, // G_FREM
538
+ 0U, // G_FPOW
539
+ 0U, // G_FEXP
540
+ 0U, // G_FEXP2
541
+ 0U, // G_FLOG
542
+ 0U, // G_FLOG2
543
+ 0U, // G_FNEG
544
+ 0U, // G_FPEXT
545
+ 0U, // G_FPTRUNC
546
+ 0U, // G_FPTOSI
547
+ 0U, // G_FPTOUI
548
+ 0U, // G_SITOFP
549
+ 0U, // G_UITOFP
550
+ 0U, // G_FABS
551
+ 0U, // G_GEP
552
+ 0U, // G_PTR_MASK
553
+ 0U, // G_BR
554
+ 0U, // G_INSERT_VECTOR_ELT
555
+ 0U, // G_EXTRACT_VECTOR_ELT
556
+ 0U, // G_SHUFFLE_VECTOR
557
+ 0U, // G_BSWAP
558
+ 0U, // G_ADDRSPACE_CAST
559
+ 0U, // G_BLOCK_ADDR
560
+ 2308U, // AAA
561
+ 4341U, // AAD8i8
562
+ 4904U, // AAM8i8
563
+ 2779U, // AAS
564
+ 5732U, // ADC16i16
565
+ 270531U, // ADC16mi
566
+ 270531U, // ADC16mi8
567
+ 270531U, // ADC16mr
568
+ 4468931U, // ADC16ri
569
+ 4468931U, // ADC16ri8
570
+ 8663235U, // ADC16rm
571
+ 4468931U, // ADC16rr
572
+ 4460739U, // ADC16rr_REV
573
+ 5858U, // ADC32i32
574
+ 278723U, // ADC32mi
575
+ 278723U, // ADC32mi8
576
+ 278723U, // ADC32mr
577
+ 4468931U, // ADC32ri
578
+ 4468931U, // ADC32ri8
579
+ 12857539U, // ADC32rm
580
+ 4468931U, // ADC32rr
581
+ 4460739U, // ADC32rr_REV
582
+ 5995U, // ADC64i32
583
+ 282819U, // ADC64mi32
584
+ 282819U, // ADC64mi8
585
+ 282819U, // ADC64mr
586
+ 4468931U, // ADC64ri32
587
+ 4468931U, // ADC64ri8
588
+ 17051843U, // ADC64rm
589
+ 4468931U, // ADC64rr
590
+ 4460739U, // ADC64rr_REV
591
+ 5630U, // ADC8i8
592
+ 286915U, // ADC8mi
593
+ 286915U, // ADC8mi8
594
+ 286915U, // ADC8mr
595
+ 4468931U, // ADC8ri
596
+ 4468931U, // ADC8ri8
597
+ 21246147U, // ADC8rm
598
+ 4468931U, // ADC8rr
599
+ 4460739U, // ADC8rr_REV
600
+ 12850560U, // ADCX32rm
601
+ 4461952U, // ADCX32rr
602
+ 17044864U, // ADCX64rm
603
+ 4461952U, // ADCX64rr
604
+ 5741U, // ADD16i16
605
+ 270595U, // ADD16mi
606
+ 270595U, // ADD16mi8
607
+ 270595U, // ADD16mr
608
+ 4468995U, // ADD16ri
609
+ 4468995U, // ADD16ri8
610
+ 8663299U, // ADD16rm
611
+ 4468995U, // ADD16rr
612
+ 4460803U, // ADD16rr_REV
613
+ 5868U, // ADD32i32
614
+ 278787U, // ADD32mi
615
+ 278787U, // ADD32mi8
616
+ 278787U, // ADD32mr
617
+ 4468995U, // ADD32ri
618
+ 4468995U, // ADD32ri8
619
+ 12857603U, // ADD32rm
620
+ 4468995U, // ADD32rr
621
+ 4460803U, // ADD32rr_REV
622
+ 6005U, // ADD64i32
623
+ 282883U, // ADD64mi32
624
+ 282883U, // ADD64mi8
625
+ 282883U, // ADD64mr
626
+ 4468995U, // ADD64ri32
627
+ 4468995U, // ADD64ri8
628
+ 17051907U, // ADD64rm
629
+ 4468995U, // ADD64rr
630
+ 4460803U, // ADD64rr_REV
631
+ 5639U, // ADD8i8
632
+ 286979U, // ADD8mi
633
+ 286979U, // ADD8mi8
634
+ 286979U, // ADD8mr
635
+ 4468995U, // ADD8ri
636
+ 4468995U, // ADD8ri8
637
+ 21246211U, // ADD8rm
638
+ 4468995U, // ADD8rr
639
+ 4460803U, // ADD8rr_REV
640
+ 12850578U, // ADOX32rm
641
+ 4461970U, // ADOX32rr
642
+ 17044882U, // ADOX64rm
643
+ 4461970U, // ADOX64rr
644
+ 5750U, // AND16i16
645
+ 270651U, // AND16mi
646
+ 270651U, // AND16mi8
647
+ 270651U, // AND16mr
648
+ 4469051U, // AND16ri
649
+ 4469051U, // AND16ri8
650
+ 8663355U, // AND16rm
651
+ 4469051U, // AND16rr
652
+ 4460859U, // AND16rr_REV
653
+ 5878U, // AND32i32
654
+ 278843U, // AND32mi
655
+ 278843U, // AND32mi8
656
+ 278843U, // AND32mr
657
+ 4469051U, // AND32ri
658
+ 4469051U, // AND32ri8
659
+ 12857659U, // AND32rm
660
+ 4469051U, // AND32rr
661
+ 4460859U, // AND32rr_REV
662
+ 6015U, // AND64i32
663
+ 282939U, // AND64mi32
664
+ 282939U, // AND64mi8
665
+ 282939U, // AND64mr
666
+ 4469051U, // AND64ri32
667
+ 4469051U, // AND64ri8
668
+ 17051963U, // AND64rm
669
+ 4469051U, // AND64rr
670
+ 4460859U, // AND64rr_REV
671
+ 5648U, // AND8i8
672
+ 287035U, // AND8mi
673
+ 287035U, // AND8mi8
674
+ 287035U, // AND8mr
675
+ 4469051U, // AND8ri
676
+ 4469051U, // AND8ri8
677
+ 21246267U, // AND8rm
678
+ 4469051U, // AND8rr
679
+ 4460859U, // AND8rr_REV
680
+ 159650605U, // ANDN32rm
681
+ 696521517U, // ANDN32rr
682
+ 1233392429U, // ANDN64rm
683
+ 696521517U, // ANDN64rr
684
+ 271114U, // ARPL16mr
685
+ 25432842U, // ARPL16rr
686
+ 1774457938U, // BEXTR32rm
687
+ 696521810U, // BEXTR32rr
688
+ 1778652242U, // BEXTR64rm
689
+ 696521810U, // BEXTR64rr
690
+ 1774457938U, // BEXTRI32mi
691
+ 696521810U, // BEXTRI32ri
692
+ 1778652242U, // BEXTRI64mi
693
+ 696521810U, // BEXTRI64ri
694
+ 29627123U, // BLCFILL32rm
695
+ 25432819U, // BLCFILL32rr
696
+ 33821427U, // BLCFILL64rm
697
+ 25432819U, // BLCFILL64rr
698
+ 29627039U, // BLCI32rm
699
+ 25432735U, // BLCI32rr
700
+ 33821343U, // BLCI64rm
701
+ 25432735U, // BLCI64rr
702
+ 29626581U, // BLCIC32rm
703
+ 25432277U, // BLCIC32rr
704
+ 33820885U, // BLCIC64rm
705
+ 25432277U, // BLCIC64rr
706
+ 29627066U, // BLCMSK32rm
707
+ 25432762U, // BLCMSK32rr
708
+ 33821370U, // BLCMSK64rm
709
+ 25432762U, // BLCMSK64rr
710
+ 29627489U, // BLCS32rm
711
+ 25433185U, // BLCS32rr
712
+ 33821793U, // BLCS64rm
713
+ 25433185U, // BLCS64rr
714
+ 29627132U, // BLSFILL32rm
715
+ 25432828U, // BLSFILL32rr
716
+ 33821436U, // BLSFILL64rm
717
+ 25432828U, // BLSFILL64rr
718
+ 29627060U, // BLSI32rm
719
+ 25432756U, // BLSI32rr
720
+ 33821364U, // BLSI64rm
721
+ 25432756U, // BLSI64rr
722
+ 29626588U, // BLSIC32rm
723
+ 25432284U, // BLSIC32rr
724
+ 33820892U, // BLSIC64rm
725
+ 25432284U, // BLSIC64rr
726
+ 29627074U, // BLSMSK32rm
727
+ 25432770U, // BLSMSK32rr
728
+ 33821378U, // BLSMSK64rm
729
+ 25432770U, // BLSMSK64rr
730
+ 29627453U, // BLSR32rm
731
+ 25433149U, // BLSR32rr
732
+ 33821757U, // BLSR64rm
733
+ 25433149U, // BLSR64rr
734
+ 29626688U, // BOUNDS16rm
735
+ 33820992U, // BOUNDS32rm
736
+ 38015591U, // BSF16rm
737
+ 25432679U, // BSF16rr
738
+ 29626983U, // BSF32rm
739
+ 25432679U, // BSF32rr
740
+ 33821287U, // BSF64rm
741
+ 25432679U, // BSF64rr
742
+ 38016056U, // BSR16rm
743
+ 25433144U, // BSR16rr
744
+ 29627448U, // BSR32rm
745
+ 25433144U, // BSR32rr
746
+ 33821752U, // BSR64rm
747
+ 25433144U, // BSR64rr
748
+ 4959U, // BSWAP16r_BAD
749
+ 4959U, // BSWAP32r
750
+ 4959U, // BSWAP64r
751
+ 271555U, // BT16mi8
752
+ 271555U, // BT16mr
753
+ 25433283U, // BT16ri8
754
+ 25433283U, // BT16rr
755
+ 279747U, // BT32mi8
756
+ 279747U, // BT32mr
757
+ 25433283U, // BT32ri8
758
+ 25433283U, // BT32rr
759
+ 283843U, // BT64mi8
760
+ 283843U, // BT64mr
761
+ 25433283U, // BT64ri8
762
+ 25433283U, // BT64rr
763
+ 270576U, // BTC16mi8
764
+ 270576U, // BTC16mr
765
+ 4468976U, // BTC16ri8
766
+ 4468976U, // BTC16rr
767
+ 278768U, // BTC32mi8
768
+ 278768U, // BTC32mr
769
+ 4468976U, // BTC32ri8
770
+ 4468976U, // BTC32rr
771
+ 282864U, // BTC64mi8
772
+ 282864U, // BTC64mr
773
+ 4468976U, // BTC64ri8
774
+ 4468976U, // BTC64rr
775
+ 271427U, // BTR16mi8
776
+ 271427U, // BTR16mr
777
+ 4469827U, // BTR16ri8
778
+ 4469827U, // BTR16rr
779
+ 279619U, // BTR32mi8
780
+ 279619U, // BTR32mr
781
+ 4469827U, // BTR32ri8
782
+ 4469827U, // BTR32rr
783
+ 283715U, // BTR64mi8
784
+ 283715U, // BTR64mr
785
+ 4469827U, // BTR64ri8
786
+ 4469827U, // BTR64rr
787
+ 271537U, // BTS16mi8
788
+ 271537U, // BTS16mr
789
+ 4469937U, // BTS16ri8
790
+ 4469937U, // BTS16rr
791
+ 279729U, // BTS32mi8
792
+ 279729U, // BTS32mr
793
+ 4469937U, // BTS32ri8
794
+ 4469937U, // BTS32rr
795
+ 283825U, // BTS64mi8
796
+ 283825U, // BTS64mr
797
+ 4469937U, // BTS64ri8
798
+ 4469937U, // BTS64rr
799
+ 1774457509U, // BZHI32rm
800
+ 696521381U, // BZHI32rr
801
+ 1778651813U, // BZHI64rm
802
+ 696521381U, // BZHI64rr
803
+ 8941U, // CALL16m
804
+ 8941U, // CALL16m_NT
805
+ 4845U, // CALL16r
806
+ 4845U, // CALL16r_NT
807
+ 17133U, // CALL32m
808
+ 17133U, // CALL32m_NT
809
+ 4845U, // CALL32r
810
+ 4845U, // CALL32r_NT
811
+ 21229U, // CALL64m
812
+ 21229U, // CALL64m_NT
813
+ 29421U, // CALL64pcrel32
814
+ 4845U, // CALL64r
815
+ 4845U, // CALL64r_NT
816
+ 29421U, // CALLpcrel16
817
+ 29421U, // CALLpcrel32
818
+ 2947U, // CBW
819
+ 2702U, // CDQ
820
+ 2488U, // CDQE
821
+ 2352U, // CLAC
822
+ 2384U, // CLC
823
+ 2434U, // CLD
824
+ 25167U, // CLDEMOTE
825
+ 25890U, // CLFLUSHOPT
826
+ 2556U, // CLGI
827
+ 2566U, // CLI
828
+ 17848U, // CLRSSBSY
829
+ 2877U, // CLTS
830
+ 24765U, // CLWB
831
+ 2663U, // CLZEROr
832
+ 2388U, // CMC
833
+ 8654926U, // CMOVA16rm
834
+ 4460622U, // CMOVA16rr
835
+ 12849230U, // CMOVA32rm
836
+ 4460622U, // CMOVA32rr
837
+ 17043534U, // CMOVA64rm
838
+ 4460622U, // CMOVA64rr
839
+ 8655260U, // CMOVAE16rm
840
+ 4460956U, // CMOVAE16rr
841
+ 12849564U, // CMOVAE32rm
842
+ 4460956U, // CMOVAE32rr
843
+ 17043868U, // CMOVAE64rm
844
+ 4460956U, // CMOVAE64rr
845
+ 8655030U, // CMOVB16rm
846
+ 4460726U, // CMOVB16rr
847
+ 12849334U, // CMOVB32rm
848
+ 4460726U, // CMOVB32rr
849
+ 17043638U, // CMOVB64rm
850
+ 4460726U, // CMOVB64rr
851
+ 8655280U, // CMOVBE16rm
852
+ 4460976U, // CMOVBE16rr
853
+ 12849584U, // CMOVBE32rm
854
+ 4460976U, // CMOVBE32rr
855
+ 17043888U, // CMOVBE64rm
856
+ 4460976U, // CMOVBE64rr
857
+ 8655456U, // CMOVE16rm
858
+ 4461152U, // CMOVE16rr
859
+ 12849760U, // CMOVE32rm
860
+ 4461152U, // CMOVE32rr
861
+ 17044064U, // CMOVE64rm
862
+ 4461152U, // CMOVE64rr
863
+ 8655506U, // CMOVG16rm
864
+ 4461202U, // CMOVG16rr
865
+ 12849810U, // CMOVG32rm
866
+ 4461202U, // CMOVG32rr
867
+ 17044114U, // CMOVG64rm
868
+ 4461202U, // CMOVG64rr
869
+ 8655300U, // CMOVGE16rm
870
+ 4460996U, // CMOVGE16rr
871
+ 12849604U, // CMOVGE32rm
872
+ 4460996U, // CMOVGE32rr
873
+ 17043908U, // CMOVGE64rm
874
+ 4460996U, // CMOVGE64rr
875
+ 8655649U, // CMOVL16rm
876
+ 4461345U, // CMOVL16rr
877
+ 12849953U, // CMOVL32rm
878
+ 4461345U, // CMOVL32rr
879
+ 17044257U, // CMOVL64rm
880
+ 4461345U, // CMOVL64rr
881
+ 8655324U, // CMOVLE16rm
882
+ 4461020U, // CMOVLE16rr
883
+ 12849628U, // CMOVLE32rm
884
+ 4461020U, // CMOVLE32rr
885
+ 17043932U, // CMOVLE64rm
886
+ 4461020U, // CMOVLE64rr
887
+ 8655352U, // CMOVNE16rm
888
+ 4461048U, // CMOVNE16rr
889
+ 12849656U, // CMOVNE32rm
890
+ 4461048U, // CMOVNE32rr
891
+ 17043960U, // CMOVNE64rm
892
+ 4461048U, // CMOVNE64rr
893
+ 8655690U, // CMOVNO16rm
894
+ 4461386U, // CMOVNO16rr
895
+ 12849994U, // CMOVNO32rm
896
+ 4461386U, // CMOVNO32rr
897
+ 17044298U, // CMOVNO64rm
898
+ 4461386U, // CMOVNO64rr
899
+ 8655751U, // CMOVNP16rm
900
+ 4461447U, // CMOVNP16rr
901
+ 12850055U, // CMOVNP32rm
902
+ 4461447U, // CMOVNP32rr
903
+ 17044359U, // CMOVNP64rm
904
+ 4461447U, // CMOVNP64rr
905
+ 8656027U, // CMOVNS16rm
906
+ 4461723U, // CMOVNS16rr
907
+ 12850331U, // CMOVNS32rm
908
+ 4461723U, // CMOVNS32rr
909
+ 17044635U, // CMOVNS64rm
910
+ 4461723U, // CMOVNS64rr
911
+ 8655704U, // CMOVO16rm
912
+ 4461400U, // CMOVO16rr
913
+ 12850008U, // CMOVO32rm
914
+ 4461400U, // CMOVO32rr
915
+ 17044312U, // CMOVO64rm
916
+ 4461400U, // CMOVO64rr
917
+ 8655791U, // CMOVP16rm
918
+ 4461487U, // CMOVP16rr
919
+ 12850095U, // CMOVP32rm
920
+ 4461487U, // CMOVP32rr
921
+ 17044399U, // CMOVP64rm
922
+ 4461487U, // CMOVP64rr
923
+ 8656060U, // CMOVS16rm
924
+ 4461756U, // CMOVS16rr
925
+ 12850364U, // CMOVS32rm
926
+ 4461756U, // CMOVS32rr
927
+ 17044668U, // CMOVS64rm
928
+ 4461756U, // CMOVS64rr
929
+ 5767U, // CMP16i16
930
+ 271216U, // CMP16mi
931
+ 271216U, // CMP16mi8
932
+ 271216U, // CMP16mr
933
+ 25432944U, // CMP16ri
934
+ 25432944U, // CMP16ri8
935
+ 38015856U, // CMP16rm
936
+ 25432944U, // CMP16rr
937
+ 25432944U, // CMP16rr_REV
938
+ 5921U, // CMP32i32
939
+ 279408U, // CMP32mi
940
+ 279408U, // CMP32mi8
941
+ 279408U, // CMP32mr
942
+ 25432944U, // CMP32ri
943
+ 25432944U, // CMP32ri8
944
+ 29627248U, // CMP32rm
945
+ 25432944U, // CMP32rr
946
+ 25432944U, // CMP32rr_REV
947
+ 6025U, // CMP64i32
948
+ 283504U, // CMP64mi32
949
+ 283504U, // CMP64mi8
950
+ 283504U, // CMP64mr
951
+ 25432944U, // CMP64ri32
952
+ 25432944U, // CMP64ri8
953
+ 33821552U, // CMP64rm
954
+ 25432944U, // CMP64rr
955
+ 25432944U, // CMP64rr_REV
956
+ 5665U, // CMP8i8
957
+ 287600U, // CMP8mi
958
+ 287600U, // CMP8mi8
959
+ 287600U, // CMP8mr
960
+ 25432944U, // CMP8ri
961
+ 25432944U, // CMP8ri8
962
+ 42210160U, // CMP8rm
963
+ 25432944U, // CMP8rr
964
+ 25432944U, // CMP8rr_REV
965
+ 32925U, // CMPSB
966
+ 37227U, // CMPSL
967
+ 41941U, // CMPSQ
968
+ 46450U, // CMPSW
969
+ 49248U, // CMPXCHG16B
970
+ 270967U, // CMPXCHG16rm
971
+ 25432695U, // CMPXCHG16rr
972
+ 279159U, // CMPXCHG32rm
973
+ 25432695U, // CMPXCHG32rr
974
+ 283255U, // CMPXCHG64rm
975
+ 25432695U, // CMPXCHG64rr
976
+ 20588U, // CMPXCHG8B
977
+ 287351U, // CMPXCHG8rm
978
+ 25432695U, // CMPXCHG8rr
979
+ 2428U, // CPUID
980
+ 2659U, // CQO
981
+ 2464U, // CWD
982
+ 2468U, // CWDE
983
+ 2312U, // DAA
984
+ 2783U, // DAS
985
+ 2238U, // DATA16_PREFIX
986
+ 8392U, // DEC16m
987
+ 4296U, // DEC16r
988
+ 4296U, // DEC16r_alt
989
+ 16584U, // DEC32m
990
+ 4296U, // DEC32r
991
+ 4296U, // DEC32r_alt
992
+ 20680U, // DEC64m
993
+ 4296U, // DEC64r
994
+ 24776U, // DEC8m
995
+ 4296U, // DEC8r
996
+ 9545U, // DIV16m
997
+ 5449U, // DIV16r
998
+ 17737U, // DIV32m
999
+ 5449U, // DIV32r
1000
+ 21833U, // DIV64m
1001
+ 5449U, // DIV64r
1002
+ 25929U, // DIV8m
1003
+ 5449U, // DIV8r
1004
+ 2207U, // ENDBR32
1005
+ 2224U, // ENDBR64
1006
+ 25433098U, // ENTER
1007
+ 46412524U, // FARCALL16i
1008
+ 53996U, // FARCALL16m
1009
+ 46412524U, // FARCALL32i
1010
+ 53997U, // FARCALL32m
1011
+ 53996U, // FARCALL64
1012
+ 537461U, // FARJMP16i
1013
+ 54133U, // FARJMP16m
1014
+ 537461U, // FARJMP32i
1015
+ 54134U, // FARJMP32m
1016
+ 54133U, // FARJMP64
1017
+ 2648U, // FSETPM
1018
+ 2372U, // GETSEC
1019
+ 2902U, // HLT
1020
+ 9544U, // IDIV16m
1021
+ 5448U, // IDIV16r
1022
+ 17736U, // IDIV32m
1023
+ 5448U, // IDIV32r
1024
+ 21832U, // IDIV64m
1025
+ 5448U, // IDIV64r
1026
+ 25928U, // IDIV8m
1027
+ 5448U, // IDIV8r
1028
+ 8987U, // IMUL16m
1029
+ 4891U, // IMUL16r
1030
+ 8655643U, // IMUL16rm
1031
+ 1782846235U, // IMUL16rmi
1032
+ 1782846235U, // IMUL16rmi8
1033
+ 4461339U, // IMUL16rr
1034
+ 696521499U, // IMUL16rri
1035
+ 696521499U, // IMUL16rri8
1036
+ 17179U, // IMUL32m
1037
+ 4891U, // IMUL32r
1038
+ 12849947U, // IMUL32rm
1039
+ 1774457627U, // IMUL32rmi
1040
+ 1774457627U, // IMUL32rmi8
1041
+ 4461339U, // IMUL32rr
1042
+ 696521499U, // IMUL32rri
1043
+ 696521499U, // IMUL32rri8
1044
+ 21275U, // IMUL64m
1045
+ 4891U, // IMUL64r
1046
+ 17044251U, // IMUL64rm
1047
+ 1778651931U, // IMUL64rmi32
1048
+ 1778651931U, // IMUL64rmi8
1049
+ 4461339U, // IMUL64rr
1050
+ 696521499U, // IMUL64rri32
1051
+ 696521499U, // IMUL64rri8
1052
+ 25371U, // IMUL8m
1053
+ 4891U, // IMUL8r
1054
+ 59007U, // IN16ri
1055
+ 3093U, // IN16rr
1056
+ 59160U, // IN32ri
1057
+ 3103U, // IN32rr
1058
+ 58905U, // IN8ri
1059
+ 3083U, // IN8rr
1060
+ 8427U, // INC16m
1061
+ 4331U, // INC16r
1062
+ 4331U, // INC16r_alt
1063
+ 16619U, // INC32m
1064
+ 4331U, // INC32r
1065
+ 4331U, // INC32r_alt
1066
+ 20715U, // INC64m
1067
+ 4331U, // INC64r
1068
+ 24811U, // INC8m
1069
+ 4331U, // INC8r
1070
+ 4423U, // INCSSPD
1071
+ 5053U, // INCSSPQ
1072
+ 848016U, // INSB
1073
+ 852318U, // INSL
1074
+ 857445U, // INSW
1075
+ 58630U, // INT
1076
+ 2202U, // INT1
1077
+ 2219U, // INT3
1078
+ 2670U, // INTO
1079
+ 2450U, // INVD
1080
+ 50599184U, // INVEPT32
1081
+ 50599184U, // INVEPT64
1082
+ 25220U, // INVLPG
1083
+ 3049U, // INVLPGA32
1084
+ 3066U, // INVLPGA64
1085
+ 50598160U, // INVPCID32
1086
+ 50598160U, // INVPCID64
1087
+ 50598176U, // INVVPID32
1088
+ 50598176U, // INVVPID64
1089
+ 2882U, // IRET16
1090
+ 2438U, // IRET32
1091
+ 2725U, // IRET64
1092
+ 29072U, // JAE_1
1093
+ 29072U, // JAE_2
1094
+ 29072U, // JAE_4
1095
+ 28740U, // JA_1
1096
+ 28740U, // JA_2
1097
+ 28740U, // JA_4
1098
+ 29092U, // JBE_1
1099
+ 29092U, // JBE_2
1100
+ 29092U, // JBE_4
1101
+ 28812U, // JB_1
1102
+ 28812U, // JB_2
1103
+ 28812U, // JB_4
1104
+ 30153U, // JCXZ
1105
+ 30146U, // JECXZ
1106
+ 29132U, // JE_1
1107
+ 29132U, // JE_2
1108
+ 29132U, // JE_4
1109
+ 29112U, // JGE_1
1110
+ 29112U, // JGE_2
1111
+ 29112U, // JGE_4
1112
+ 29312U, // JG_1
1113
+ 29312U, // JG_2
1114
+ 29312U, // JG_4
1115
+ 29136U, // JLE_1
1116
+ 29136U, // JLE_2
1117
+ 29136U, // JLE_4
1118
+ 29416U, // JL_1
1119
+ 29416U, // JL_2
1120
+ 29416U, // JL_4
1121
+ 9078U, // JMP16m
1122
+ 9078U, // JMP16m_NT
1123
+ 4982U, // JMP16r
1124
+ 4982U, // JMP16r_NT
1125
+ 17270U, // JMP32m
1126
+ 17270U, // JMP32m_NT
1127
+ 4982U, // JMP32r
1128
+ 4982U, // JMP32r_NT
1129
+ 21366U, // JMP64m
1130
+ 21366U, // JMP64m_NT
1131
+ 4982U, // JMP64r
1132
+ 4982U, // JMP64r_NT
1133
+ 29558U, // JMP_1
1134
+ 29558U, // JMP_2
1135
+ 29558U, // JMP_4
1136
+ 29156U, // JNE_1
1137
+ 29156U, // JNE_2
1138
+ 29156U, // JNE_4
1139
+ 29502U, // JNO_1
1140
+ 29502U, // JNO_2
1141
+ 29502U, // JNO_4
1142
+ 29563U, // JNP_1
1143
+ 29563U, // JNP_2
1144
+ 29563U, // JNP_4
1145
+ 29839U, // JNS_1
1146
+ 29839U, // JNS_2
1147
+ 29839U, // JNS_4
1148
+ 29498U, // JO_1
1149
+ 29498U, // JO_2
1150
+ 29498U, // JO_4
1151
+ 29548U, // JP_1
1152
+ 29548U, // JP_2
1153
+ 29548U, // JP_4
1154
+ 30159U, // JRCXZ
1155
+ 29827U, // JS_1
1156
+ 29827U, // JS_2
1157
+ 29827U, // JS_4
1158
+ 2513U, // LAHF
1159
+ 38015995U, // LAR16rm
1160
+ 25433083U, // LAR16rr
1161
+ 38015995U, // LAR32rm
1162
+ 25433083U, // LAR32rr
1163
+ 38015995U, // LAR64rm
1164
+ 25433083U, // LAR64rr
1165
+ 54793319U, // LDS16rm
1166
+ 54793319U, // LDS32rm
1167
+ 58986559U, // LEA16r
1168
+ 58986559U, // LEA32r
1169
+ 58986559U, // LEA64_32r
1170
+ 58986559U, // LEA64r
1171
+ 2500U, // LEAVE
1172
+ 2500U, // LEAVE64
1173
+ 54793324U, // LES16rm
1174
+ 54793324U, // LES32rm
1175
+ 54793337U, // LFS16rm
1176
+ 54793337U, // LFS32rm
1177
+ 54793337U, // LFS64rm
1178
+ 54471U, // LGDT16m
1179
+ 54471U, // LGDT32m
1180
+ 54471U, // LGDT64m
1181
+ 54793342U, // LGS16rm
1182
+ 54793342U, // LGS32rm
1183
+ 54793342U, // LGS64rm
1184
+ 54483U, // LIDT16m
1185
+ 54483U, // LIDT32m
1186
+ 54483U, // LIDT64m
1187
+ 9439U, // LLDT16m
1188
+ 5343U, // LLDT16r
1189
+ 4220U, // LLWPCB
1190
+ 4220U, // LLWPCB64
1191
+ 9561U, // LMSW16m
1192
+ 5465U, // LMSW16r
1193
+ 2574U, // LOCK_PREFIX
1194
+ 75242U, // LODSB
1195
+ 79628U, // LODSL
1196
+ 83871U, // LODSQ
1197
+ 87747U, // LODSW
1198
+ 29588U, // LOOP
1199
+ 29184U, // LOOPE
1200
+ 29161U, // LOOPNE
1201
+ 4716U, // LRETIL
1202
+ 5046U, // LRETIQ
1203
+ 4716U, // LRETIW
1204
+ 2534U, // LRETL
1205
+ 2719U, // LRETQ
1206
+ 2534U, // LRETW
1207
+ 38015760U, // LSL16rm
1208
+ 25432848U, // LSL16rr
1209
+ 38015760U, // LSL32rm
1210
+ 25432848U, // LSL32rr
1211
+ 38015760U, // LSL64rm
1212
+ 25432848U, // LSL64rr
1213
+ 54793388U, // LSS16rm
1214
+ 54793388U, // LSS32rm
1215
+ 54793388U, // LSS64rm
1216
+ 9288U, // LTRm
1217
+ 5192U, // LTRr
1218
+ 1774457991U, // LWPINS32rmi
1219
+ 696521863U, // LWPINS32rri
1220
+ 1774457991U, // LWPINS64rmi
1221
+ 696521863U, // LWPINS64rri
1222
+ 1774457558U, // LWPVAL32rmi
1223
+ 696521430U, // LWPVAL32rri
1224
+ 1774457558U, // LWPVAL64rmi
1225
+ 696521430U, // LWPVAL64rri
1226
+ 38016248U, // LZCNT16rm
1227
+ 25433336U, // LZCNT16rr
1228
+ 29627640U, // LZCNT32rm
1229
+ 25433336U, // LZCNT32rr
1230
+ 33821944U, // LZCNT64rm
1231
+ 25433336U, // LZCNT64rr
1232
+ 3114U, // MONITORXrrr
1233
+ 2640U, // MONTMUL
1234
+ 91823U, // MOV16ao16
1235
+ 91823U, // MOV16ao32
1236
+ 91801U, // MOV16ao64
1237
+ 271694U, // MOV16mi
1238
+ 271694U, // MOV16mr
1239
+ 271694U, // MOV16ms
1240
+ 1140046U, // MOV16o16a
1241
+ 1140046U, // MOV16o32a
1242
+ 1139801U, // MOV16o64a
1243
+ 25433422U, // MOV16ri
1244
+ 25433422U, // MOV16ri_alt
1245
+ 38016334U, // MOV16rm
1246
+ 25433422U, // MOV16rr
1247
+ 25433422U, // MOV16rr_REV
1248
+ 25433422U, // MOV16rs
1249
+ 38016334U, // MOV16sm
1250
+ 25433422U, // MOV16sr
1251
+ 96077U, // MOV32ao16
1252
+ 96077U, // MOV32ao32
1253
+ 96053U, // MOV32ao64
1254
+ 25433422U, // MOV32cr
1255
+ 25433422U, // MOV32dr
1256
+ 279886U, // MOV32mi
1257
+ 279886U, // MOV32mr
1258
+ 1406286U, // MOV32o16a
1259
+ 1406286U, // MOV32o32a
1260
+ 1406041U, // MOV32o64a
1261
+ 25433422U, // MOV32rc
1262
+ 25433422U, // MOV32rd
1263
+ 25433422U, // MOV32ri
1264
+ 25433422U, // MOV32ri_alt
1265
+ 29627726U, // MOV32rm
1266
+ 25433422U, // MOV32rr
1267
+ 25433422U, // MOV32rr_REV
1268
+ 25433422U, // MOV32rs
1269
+ 25433422U, // MOV32sr
1270
+ 100301U, // MOV64ao32
1271
+ 100277U, // MOV64ao64
1272
+ 25433422U, // MOV64cr
1273
+ 25433422U, // MOV64dr
1274
+ 283982U, // MOV64mi32
1275
+ 283982U, // MOV64mr
1276
+ 1672526U, // MOV64o32a
1277
+ 1672281U, // MOV64o64a
1278
+ 25433422U, // MOV64rc
1279
+ 25433422U, // MOV64rd
1280
+ 25433177U, // MOV64ri
1281
+ 25433422U, // MOV64ri32
1282
+ 33822030U, // MOV64rm
1283
+ 25433422U, // MOV64rr
1284
+ 25433422U, // MOV64rr_REV
1285
+ 25433422U, // MOV64rs
1286
+ 25433422U, // MOV64sr
1287
+ 104009U, // MOV8ao16
1288
+ 104009U, // MOV8ao32
1289
+ 103987U, // MOV8ao64
1290
+ 288078U, // MOV8mi
1291
+ 288078U, // MOV8mr
1292
+ 288078U, // MOV8mr_NOREX
1293
+ 1938766U, // MOV8o16a
1294
+ 1938766U, // MOV8o32a
1295
+ 1938521U, // MOV8o64a
1296
+ 25433422U, // MOV8ri
1297
+ 25433422U, // MOV8ri_alt
1298
+ 42210638U, // MOV8rm
1299
+ 42210638U, // MOV8rm_NOREX
1300
+ 25433422U, // MOV8rr
1301
+ 25433422U, // MOV8rr_NOREX
1302
+ 25433422U, // MOV8rr_REV
1303
+ 270769U, // MOVBE16mr
1304
+ 38015409U, // MOVBE16rm
1305
+ 278961U, // MOVBE32mr
1306
+ 29626801U, // MOVBE32rm
1307
+ 283057U, // MOVBE64mr
1308
+ 33821105U, // MOVBE64rm
1309
+ 63180885U, // MOVDIR64B16
1310
+ 63180885U, // MOVDIR64B32
1311
+ 63180885U, // MOVDIR64B64
1312
+ 279211U, // MOVDIRI32
1313
+ 283307U, // MOVDIRI64
1314
+ 67432612U, // MOVSB
1315
+ 71631233U, // MOVSL
1316
+ 75867115U, // MOVSQ
1317
+ 80024953U, // MOVSW
1318
+ 38016426U, // MOVSX16rm16
1319
+ 42210730U, // MOVSX16rm8
1320
+ 25433514U, // MOVSX16rr16
1321
+ 25433514U, // MOVSX16rr8
1322
+ 38016426U, // MOVSX32rm16
1323
+ 42210730U, // MOVSX32rm8
1324
+ 42210730U, // MOVSX32rm8_NOREX
1325
+ 25433514U, // MOVSX32rr16
1326
+ 25433514U, // MOVSX32rr8
1327
+ 25433514U, // MOVSX32rr8_NOREX
1328
+ 38016426U, // MOVSX64rm16
1329
+ 29626760U, // MOVSX64rm32
1330
+ 42210730U, // MOVSX64rm8
1331
+ 25433514U, // MOVSX64rr16
1332
+ 25432456U, // MOVSX64rr32
1333
+ 25433514U, // MOVSX64rr8
1334
+ 38016433U, // MOVZX16rm16
1335
+ 42210737U, // MOVZX16rm8
1336
+ 25433521U, // MOVZX16rr16
1337
+ 25433521U, // MOVZX16rr8
1338
+ 38016433U, // MOVZX32rm16
1339
+ 42210737U, // MOVZX32rm8
1340
+ 42210737U, // MOVZX32rm8_NOREX
1341
+ 25433521U, // MOVZX32rr16
1342
+ 25433521U, // MOVZX32rr8
1343
+ 25433521U, // MOVZX32rr8_NOREX
1344
+ 38016433U, // MOVZX64rm16
1345
+ 42210737U, // MOVZX64rm8
1346
+ 25433521U, // MOVZX64rr16
1347
+ 25433521U, // MOVZX64rr8
1348
+ 8988U, // MUL16m
1349
+ 4892U, // MUL16r
1350
+ 17180U, // MUL32m
1351
+ 4892U, // MUL32r
1352
+ 21276U, // MUL64m
1353
+ 4892U, // MUL64r
1354
+ 25372U, // MUL8m
1355
+ 4892U, // MUL8r
1356
+ 159651212U, // MULX32rm
1357
+ 696522124U, // MULX32rr
1358
+ 1233393036U, // MULX64rm
1359
+ 696522124U, // MULX64rr
1360
+ 3123U, // MWAITXrrr
1361
+ 8818U, // NEG16m
1362
+ 4722U, // NEG16r
1363
+ 17010U, // NEG32m
1364
+ 4722U, // NEG32r
1365
+ 21106U, // NEG64m
1366
+ 4722U, // NEG64r
1367
+ 25202U, // NEG8m
1368
+ 4722U, // NEG8r
1369
+ 2686U, // NOOP
1370
+ 9103U, // NOOP18_16m4
1371
+ 9103U, // NOOP18_16m5
1372
+ 9103U, // NOOP18_16m6
1373
+ 9103U, // NOOP18_16m7
1374
+ 5007U, // NOOP18_16r4
1375
+ 5007U, // NOOP18_16r5
1376
+ 5007U, // NOOP18_16r6
1377
+ 5007U, // NOOP18_16r7
1378
+ 17295U, // NOOP18_m4
1379
+ 17295U, // NOOP18_m5
1380
+ 17295U, // NOOP18_m6
1381
+ 17295U, // NOOP18_m7
1382
+ 5007U, // NOOP18_r4
1383
+ 5007U, // NOOP18_r5
1384
+ 5007U, // NOOP18_r6
1385
+ 5007U, // NOOP18_r7
1386
+ 46412687U, // NOOP19rr
1387
+ 17295U, // NOOPL
1388
+ 17295U, // NOOPL_19
1389
+ 17295U, // NOOPL_1d
1390
+ 17295U, // NOOPL_1e
1391
+ 5007U, // NOOPLr
1392
+ 21391U, // NOOPQ
1393
+ 5007U, // NOOPQr
1394
+ 9103U, // NOOPW
1395
+ 9103U, // NOOPW_19
1396
+ 9103U, // NOOPW_1c
1397
+ 9103U, // NOOPW_1d
1398
+ 9103U, // NOOPW_1e
1399
+ 5007U, // NOOPWr
1400
+ 9483U, // NOT16m
1401
+ 5387U, // NOT16r
1402
+ 17675U, // NOT32m
1403
+ 5387U, // NOT32r
1404
+ 21771U, // NOT64m
1405
+ 5387U, // NOT64r
1406
+ 25867U, // NOT8m
1407
+ 5387U, // NOT8r
1408
+ 5777U, // OR16i16
1409
+ 271383U, // OR16mi
1410
+ 271383U, // OR16mi8
1411
+ 271383U, // OR16mr
1412
+ 4469783U, // OR16ri
1413
+ 4469783U, // OR16ri8
1414
+ 8664087U, // OR16rm
1415
+ 4469783U, // OR16rr
1416
+ 4461591U, // OR16rr_REV
1417
+ 5932U, // OR32i32
1418
+ 279575U, // OR32mi
1419
+ 279575U, // OR32mi8
1420
+ 279575U, // OR32mr
1421
+ 4469783U, // OR32ri
1422
+ 4469783U, // OR32ri8
1423
+ 12858391U, // OR32rm
1424
+ 4469783U, // OR32rr
1425
+ 4461591U, // OR32rr_REV
1426
+ 6060U, // OR64i32
1427
+ 283671U, // OR64mi32
1428
+ 283671U, // OR64mi8
1429
+ 283671U, // OR64mr
1430
+ 4469783U, // OR64ri32
1431
+ 4469783U, // OR64ri8
1432
+ 17052695U, // OR64rm
1433
+ 4469783U, // OR64rr
1434
+ 4461591U, // OR64rr_REV
1435
+ 5675U, // OR8i8
1436
+ 287767U, // OR8mi
1437
+ 287767U, // OR8mi8
1438
+ 287767U, // OR8mr
1439
+ 4469783U, // OR8ri
1440
+ 4469783U, // OR8ri8
1441
+ 21246999U, // OR8rm
1442
+ 4469783U, // OR8rr
1443
+ 4461591U, // OR8rr_REV
1444
+ 1107261U, // OUT16ir
1445
+ 2951U, // OUT16rr
1446
+ 1369405U, // OUT32ir
1447
+ 3005U, // OUT32rr
1448
+ 1893693U, // OUT8ir
1449
+ 2579U, // OUT8rr
1450
+ 75735U, // OUTSB
1451
+ 79842U, // OUTSL
1452
+ 88045U, // OUTSW
1453
+ 2539U, // PCONFIG
1454
+ 159650662U, // PDEP32rm
1455
+ 696521574U, // PDEP32rr
1456
+ 1233392486U, // PDEP64rm
1457
+ 696521574U, // PDEP64rr
1458
+ 159651138U, // PEXT32rm
1459
+ 696522050U, // PEXT32rr
1460
+ 1233392962U, // PEXT64rm
1461
+ 696522050U, // PEXT64rr
1462
+ 5018U, // POP16r
1463
+ 9114U, // POP16rmm
1464
+ 5018U, // POP16rmr
1465
+ 5018U, // POP32r
1466
+ 17306U, // POP32rmm
1467
+ 5018U, // POP32rmr
1468
+ 5018U, // POP64r
1469
+ 21402U, // POP64rmm
1470
+ 5018U, // POP64rmr
1471
+ 2941U, // POPA16
1472
+ 2597U, // POPA32
1473
+ 2803U, // POPDS16
1474
+ 2803U, // POPDS32
1475
+ 2818U, // POPES16
1476
+ 2818U, // POPES32
1477
+ 2529U, // POPF16
1478
+ 2422U, // POPF32
1479
+ 2713U, // POPF64
1480
+ 2833U, // POPFS16
1481
+ 2833U, // POPFS32
1482
+ 2833U, // POPFS64
1483
+ 2848U, // POPGS16
1484
+ 2848U, // POPGS32
1485
+ 2848U, // POPGS64
1486
+ 2870U, // POPSS16
1487
+ 2870U, // POPSS32
1488
+ 21062U, // PTWRITE64m
1489
+ 4678U, // PTWRITE64r
1490
+ 16966U, // PTWRITEm
1491
+ 4678U, // PTWRITEr
1492
+ 4761U, // PUSH16i8
1493
+ 4761U, // PUSH16r
1494
+ 8857U, // PUSH16rmm
1495
+ 4761U, // PUSH16rmr
1496
+ 4761U, // PUSH32i8
1497
+ 4761U, // PUSH32r
1498
+ 17049U, // PUSH32rmm
1499
+ 4761U, // PUSH32rmr
1500
+ 4761U, // PUSH64i32
1501
+ 4761U, // PUSH64i8
1502
+ 4761U, // PUSH64r
1503
+ 21145U, // PUSH64rmm
1504
+ 4761U, // PUSH64rmr
1505
+ 2934U, // PUSHA16
1506
+ 2590U, // PUSHA32
1507
+ 2787U, // PUSHCS16
1508
+ 2787U, // PUSHCS32
1509
+ 2795U, // PUSHDS16
1510
+ 2795U, // PUSHDS32
1511
+ 2810U, // PUSHES16
1512
+ 2810U, // PUSHES32
1513
+ 2523U, // PUSHF16
1514
+ 2415U, // PUSHF32
1515
+ 2706U, // PUSHF64
1516
+ 2825U, // PUSHFS16
1517
+ 2825U, // PUSHFS32
1518
+ 2825U, // PUSHFS64
1519
+ 2840U, // PUSHGS16
1520
+ 2840U, // PUSHGS32
1521
+ 2840U, // PUSHGS64
1522
+ 2862U, // PUSHSS16
1523
+ 2862U, // PUSHSS32
1524
+ 4761U, // PUSHi16
1525
+ 4761U, // PUSHi32
1526
+ 8926U, // RCL16m1
1527
+ 2106078U, // RCL16mCL
1528
+ 84157150U, // RCL16mi
1529
+ 2364126U, // RCL16r1
1530
+ 2101982U, // RCL16rCL
1531
+ 88347358U, // RCL16ri
1532
+ 17118U, // RCL32m1
1533
+ 2114270U, // RCL32mCL
1534
+ 84165342U, // RCL32mi
1535
+ 2364126U, // RCL32r1
1536
+ 2101982U, // RCL32rCL
1537
+ 88347358U, // RCL32ri
1538
+ 21214U, // RCL64m1
1539
+ 2118366U, // RCL64mCL
1540
+ 84169438U, // RCL64mi
1541
+ 2364126U, // RCL64r1
1542
+ 2101982U, // RCL64rCL
1543
+ 88347358U, // RCL64ri
1544
+ 25310U, // RCL8m1
1545
+ 2122462U, // RCL8mCL
1546
+ 84173534U, // RCL8mi
1547
+ 2364126U, // RCL8r1
1548
+ 2101982U, // RCL8rCL
1549
+ 88347358U, // RCL8ri
1550
+ 2368517U, // RCR16m1
1551
+ 2106373U, // RCR16mCL
1552
+ 84157445U, // RCR16mi
1553
+ 2364421U, // RCR16r1
1554
+ 2102277U, // RCR16rCL
1555
+ 88347653U, // RCR16ri
1556
+ 2376709U, // RCR32m1
1557
+ 2114565U, // RCR32mCL
1558
+ 84165637U, // RCR32mi
1559
+ 2364421U, // RCR32r1
1560
+ 2102277U, // RCR32rCL
1561
+ 88347653U, // RCR32ri
1562
+ 2380805U, // RCR64m1
1563
+ 2118661U, // RCR64mCL
1564
+ 84169733U, // RCR64mi
1565
+ 2364421U, // RCR64r1
1566
+ 2102277U, // RCR64rCL
1567
+ 88347653U, // RCR64ri
1568
+ 2384901U, // RCR8m1
1569
+ 2122757U, // RCR8mCL
1570
+ 84173829U, // RCR8mi
1571
+ 2364421U, // RCR8r1
1572
+ 2102277U, // RCR8rCL
1573
+ 88347653U, // RCR8ri
1574
+ 4615U, // RDFSBASE
1575
+ 4615U, // RDFSBASE64
1576
+ 4635U, // RDGSBASE
1577
+ 4635U, // RDGSBASE64
1578
+ 2757U, // RDMSR
1579
+ 4377U, // RDPID32
1580
+ 4377U, // RDPID64
1581
+ 2906U, // RDPKRUr
1582
+ 2392U, // RDPMC
1583
+ 4408U, // RDRAND16r
1584
+ 4408U, // RDRAND32r
1585
+ 4408U, // RDRAND64r
1586
+ 4360U, // RDSEED16r
1587
+ 4360U, // RDSEED32r
1588
+ 4360U, // RDSEED64r
1589
+ 4432U, // RDSSPD
1590
+ 5062U, // RDSSPQ
1591
+ 2405U, // RDTSC
1592
+ 2675U, // RDTSCP
1593
+ 2482U, // REPNE_PREFIX
1594
+ 2682U, // REP_PREFIX
1595
+ 5355U, // RETIL
1596
+ 5355U, // RETIQ
1597
+ 5355U, // RETIW
1598
+ 2883U, // RETL
1599
+ 2883U, // RETQ
1600
+ 2883U, // RETW
1601
+ 2232U, // REX64_PREFIX
1602
+ 2368261U, // ROL16m1
1603
+ 2106117U, // ROL16mCL
1604
+ 84157189U, // ROL16mi
1605
+ 2364165U, // ROL16r1
1606
+ 2102021U, // ROL16rCL
1607
+ 88347397U, // ROL16ri
1608
+ 2376453U, // ROL32m1
1609
+ 2114309U, // ROL32mCL
1610
+ 84165381U, // ROL32mi
1611
+ 2364165U, // ROL32r1
1612
+ 2102021U, // ROL32rCL
1613
+ 88347397U, // ROL32ri
1614
+ 2380549U, // ROL64m1
1615
+ 2118405U, // ROL64mCL
1616
+ 84169477U, // ROL64mi
1617
+ 2364165U, // ROL64r1
1618
+ 2102021U, // ROL64rCL
1619
+ 88347397U, // ROL64ri
1620
+ 2384645U, // ROL8m1
1621
+ 2122501U, // ROL8mCL
1622
+ 84173573U, // ROL8mi
1623
+ 2364165U, // ROL8r1
1624
+ 2102021U, // ROL8rCL
1625
+ 88347397U, // ROL8ri
1626
+ 2368534U, // ROR16m1
1627
+ 2106390U, // ROR16mCL
1628
+ 84157462U, // ROR16mi
1629
+ 2364438U, // ROR16r1
1630
+ 2102294U, // ROR16rCL
1631
+ 88347670U, // ROR16ri
1632
+ 2376726U, // ROR32m1
1633
+ 2114582U, // ROR32mCL
1634
+ 84165654U, // ROR32mi
1635
+ 2364438U, // ROR32r1
1636
+ 2102294U, // ROR32rCL
1637
+ 88347670U, // ROR32ri
1638
+ 2380822U, // ROR64m1
1639
+ 2118678U, // ROR64mCL
1640
+ 84169750U, // ROR64mi
1641
+ 2364438U, // ROR64r1
1642
+ 2102294U, // ROR64rCL
1643
+ 88347670U, // ROR64ri
1644
+ 2384918U, // ROR8m1
1645
+ 2122774U, // ROR8mCL
1646
+ 84173846U, // ROR8mi
1647
+ 2364438U, // ROR8r1
1648
+ 2102294U, // ROR8rCL
1649
+ 88347670U, // ROR8ri
1650
+ 2311329188U, // RORX32mi
1651
+ 2844005796U, // RORX32ri
1652
+ 2315523492U, // RORX64mi
1653
+ 2844005796U, // RORX64ri
1654
+ 2655U, // RSM
1655
+ 17311U, // RSTORSSP
1656
+ 2518U, // SAHF
1657
+ 2368209U, // SAL16m1
1658
+ 2106065U, // SAL16mCL
1659
+ 271057U, // SAL16mi
1660
+ 2364113U, // SAL16r1
1661
+ 2101969U, // SAL16rCL
1662
+ 4461265U, // SAL16ri
1663
+ 2376401U, // SAL32m1
1664
+ 2114257U, // SAL32mCL
1665
+ 279249U, // SAL32mi
1666
+ 2364113U, // SAL32r1
1667
+ 2101969U, // SAL32rCL
1668
+ 4461265U, // SAL32ri
1669
+ 2380497U, // SAL64m1
1670
+ 2118353U, // SAL64mCL
1671
+ 283345U, // SAL64mi
1672
+ 2364113U, // SAL64r1
1673
+ 2101969U, // SAL64rCL
1674
+ 4461265U, // SAL64ri
1675
+ 2384593U, // SAL8m1
1676
+ 2122449U, // SAL8mCL
1677
+ 287441U, // SAL8mi
1678
+ 2364113U, // SAL8r1
1679
+ 2101969U, // SAL8rCL
1680
+ 4461265U, // SAL8ri
1681
+ 2379U, // SALC
1682
+ 2368512U, // SAR16m1
1683
+ 2106368U, // SAR16mCL
1684
+ 84157440U, // SAR16mi
1685
+ 2364416U, // SAR16r1
1686
+ 2102272U, // SAR16rCL
1687
+ 88347648U, // SAR16ri
1688
+ 2376704U, // SAR32m1
1689
+ 2114560U, // SAR32mCL
1690
+ 84165632U, // SAR32mi
1691
+ 2364416U, // SAR32r1
1692
+ 2102272U, // SAR32rCL
1693
+ 88347648U, // SAR32ri
1694
+ 2380800U, // SAR64m1
1695
+ 2118656U, // SAR64mCL
1696
+ 84169728U, // SAR64mi
1697
+ 2364416U, // SAR64r1
1698
+ 2102272U, // SAR64rCL
1699
+ 88347648U, // SAR64ri
1700
+ 2384896U, // SAR8m1
1701
+ 2122752U, // SAR8mCL
1702
+ 84173824U, // SAR8mi
1703
+ 2364416U, // SAR8r1
1704
+ 2102272U, // SAR8rCL
1705
+ 88347648U, // SAR8ri
1706
+ 1774458264U, // SARX32rm
1707
+ 696522136U, // SARX32rr
1708
+ 1778652568U, // SARX64rm
1709
+ 696522136U, // SARX64rr
1710
+ 2690U, // SAVEPREVSSP
1711
+ 5714U, // SBB16i16
1712
+ 270455U, // SBB16mi
1713
+ 270455U, // SBB16mi8
1714
+ 270455U, // SBB16mr
1715
+ 4468855U, // SBB16ri
1716
+ 4468855U, // SBB16ri8
1717
+ 8663159U, // SBB16rm
1718
+ 4468855U, // SBB16rr
1719
+ 4460663U, // SBB16rr_REV
1720
+ 5838U, // SBB32i32
1721
+ 278647U, // SBB32mi
1722
+ 278647U, // SBB32mi8
1723
+ 278647U, // SBB32mr
1724
+ 4468855U, // SBB32ri
1725
+ 4468855U, // SBB32ri8
1726
+ 12857463U, // SBB32rm
1727
+ 4468855U, // SBB32rr
1728
+ 4460663U, // SBB32rr_REV
1729
+ 5975U, // SBB64i32
1730
+ 282743U, // SBB64mi32
1731
+ 282743U, // SBB64mi8
1732
+ 282743U, // SBB64mr
1733
+ 4468855U, // SBB64ri32
1734
+ 4468855U, // SBB64ri8
1735
+ 17051767U, // SBB64rm
1736
+ 4468855U, // SBB64rr
1737
+ 4460663U, // SBB64rr_REV
1738
+ 5590U, // SBB8i8
1739
+ 286839U, // SBB8mi
1740
+ 286839U, // SBB8mi8
1741
+ 286839U, // SBB8mr
1742
+ 4468855U, // SBB8ri
1743
+ 4468855U, // SBB8ri8
1744
+ 21246071U, // SBB8rm
1745
+ 4468855U, // SBB8rr
1746
+ 4460663U, // SBB8rr_REV
1747
+ 62943U, // SCASB
1748
+ 67328U, // SCASL
1749
+ 108435U, // SCASQ
1750
+ 71352U, // SCASW
1751
+ 24981U, // SETAEm
1752
+ 4501U, // SETAEr
1753
+ 24648U, // SETAm
1754
+ 4168U, // SETAr
1755
+ 25001U, // SETBEm
1756
+ 4521U, // SETBEr
1757
+ 24747U, // SETBm
1758
+ 4267U, // SETBr
1759
+ 25143U, // SETEm
1760
+ 4663U, // SETEr
1761
+ 25021U, // SETGEm
1762
+ 4541U, // SETGEr
1763
+ 25228U, // SETGm
1764
+ 4748U, // SETGr
1765
+ 25045U, // SETLEm
1766
+ 4565U, // SETLEr
1767
+ 25365U, // SETLm
1768
+ 4885U, // SETLr
1769
+ 25073U, // SETNEm
1770
+ 4593U, // SETNEr
1771
+ 25411U, // SETNOm
1772
+ 4931U, // SETNOr
1773
+ 25472U, // SETNPm
1774
+ 4992U, // SETNPr
1775
+ 25748U, // SETNSm
1776
+ 5268U, // SETNSr
1777
+ 25426U, // SETOm
1778
+ 4946U, // SETOr
1779
+ 25513U, // SETPm
1780
+ 5033U, // SETPr
1781
+ 3130U, // SETSSBSY
1782
+ 25782U, // SETSm
1783
+ 5302U, // SETSr
1784
+ 54477U, // SGDT16m
1785
+ 54477U, // SGDT32m
1786
+ 54477U, // SGDT64m
1787
+ 2368227U, // SHL16m1
1788
+ 2106083U, // SHL16mCL
1789
+ 84157155U, // SHL16mi
1790
+ 2364131U, // SHL16r1
1791
+ 2101987U, // SHL16rCL
1792
+ 88347363U, // SHL16ri
1793
+ 2376419U, // SHL32m1
1794
+ 2114275U, // SHL32mCL
1795
+ 84165347U, // SHL32mi
1796
+ 2364131U, // SHL32r1
1797
+ 2101987U, // SHL32rCL
1798
+ 88347363U, // SHL32ri
1799
+ 2380515U, // SHL64m1
1800
+ 2118371U, // SHL64mCL
1801
+ 84169443U, // SHL64mi
1802
+ 2364131U, // SHL64r1
1803
+ 2101987U, // SHL64rCL
1804
+ 88347363U, // SHL64ri
1805
+ 2384611U, // SHL8m1
1806
+ 2122467U, // SHL8mCL
1807
+ 84173539U, // SHL8mi
1808
+ 2364131U, // SHL8r1
1809
+ 2101987U, // SHL8rCL
1810
+ 88347363U, // SHL8ri
1811
+ 268706089U, // SHLD16mrCL
1812
+ 2281972009U, // SHLD16mri8
1813
+ 272896297U, // SHLD16rrCL
1814
+ 3359904041U, // SHLD16rri8
1815
+ 268714281U, // SHLD32mrCL
1816
+ 2281980201U, // SHLD32mri8
1817
+ 272896297U, // SHLD32rrCL
1818
+ 3359904041U, // SHLD32rri8
1819
+ 268718377U, // SHLD64mrCL
1820
+ 2281984297U, // SHLD64mri8
1821
+ 272896297U, // SHLD64rrCL
1822
+ 3359904041U, // SHLD64rri8
1823
+ 1774458246U, // SHLX32rm
1824
+ 696522118U, // SHLX32rr
1825
+ 1778652550U, // SHLX64rm
1826
+ 696522118U, // SHLX64rr
1827
+ 2368529U, // SHR16m1
1828
+ 2106385U, // SHR16mCL
1829
+ 84157457U, // SHR16mi
1830
+ 2364433U, // SHR16r1
1831
+ 2102289U, // SHR16rCL
1832
+ 88347665U, // SHR16ri
1833
+ 2376721U, // SHR32m1
1834
+ 2114577U, // SHR32mCL
1835
+ 84165649U, // SHR32mi
1836
+ 2364433U, // SHR32r1
1837
+ 2102289U, // SHR32rCL
1838
+ 88347665U, // SHR32ri
1839
+ 2380817U, // SHR64m1
1840
+ 2118673U, // SHR64mCL
1841
+ 84169745U, // SHR64mi
1842
+ 2364433U, // SHR64r1
1843
+ 2102289U, // SHR64rCL
1844
+ 88347665U, // SHR64ri
1845
+ 2384913U, // SHR8m1
1846
+ 2122769U, // SHR8mCL
1847
+ 84173841U, // SHR8mi
1848
+ 2364433U, // SHR8r1
1849
+ 2102289U, // SHR8rCL
1850
+ 88347665U, // SHR8ri
1851
+ 268706136U, // SHRD16mrCL
1852
+ 2281972056U, // SHRD16mri8
1853
+ 272896344U, // SHRD16rrCL
1854
+ 3359904088U, // SHRD16rri8
1855
+ 268714328U, // SHRD32mrCL
1856
+ 2281980248U, // SHRD32mri8
1857
+ 272896344U, // SHRD32rrCL
1858
+ 3359904088U, // SHRD32rri8
1859
+ 268718424U, // SHRD64mrCL
1860
+ 2281984344U, // SHRD64mri8
1861
+ 272896344U, // SHRD64rrCL
1862
+ 3359904088U, // SHRD64rri8
1863
+ 1774458270U, // SHRX32rm
1864
+ 696522142U, // SHRX32rr
1865
+ 1778652574U, // SHRX64rm
1866
+ 696522142U, // SHRX64rr
1867
+ 54489U, // SIDT16m
1868
+ 54489U, // SIDT32m
1869
+ 54489U, // SIDT64m
1870
+ 2994U, // SKINIT
1871
+ 9445U, // SLDT16m
1872
+ 5349U, // SLDT16r
1873
+ 5349U, // SLDT32r
1874
+ 5349U, // SLDT64r
1875
+ 4228U, // SLWPCB
1876
+ 4228U, // SLWPCB64
1877
+ 9567U, // SMSW16m
1878
+ 5471U, // SMSW16r
1879
+ 5471U, // SMSW32r
1880
+ 5471U, // SMSW64r
1881
+ 2357U, // STAC
1882
+ 2411U, // STC
1883
+ 2444U, // STD
1884
+ 2561U, // STGI
1885
+ 2570U, // STI
1886
+ 1896598U, // STOSB
1887
+ 1376612U, // STOSL
1888
+ 1680334U, // STOSQ
1889
+ 1119595U, // STOSW
1890
+ 5197U, // STR16r
1891
+ 5197U, // STR32r
1892
+ 5197U, // STR64r
1893
+ 9293U, // STRm
1894
+ 5723U, // SUB16i16
1895
+ 270513U, // SUB16mi
1896
+ 270513U, // SUB16mi8
1897
+ 270513U, // SUB16mr
1898
+ 4468913U, // SUB16ri
1899
+ 4468913U, // SUB16ri8
1900
+ 8663217U, // SUB16rm
1901
+ 4468913U, // SUB16rr
1902
+ 4460721U, // SUB16rr_REV
1903
+ 5848U, // SUB32i32
1904
+ 278705U, // SUB32mi
1905
+ 278705U, // SUB32mi8
1906
+ 278705U, // SUB32mr
1907
+ 4468913U, // SUB32ri
1908
+ 4468913U, // SUB32ri8
1909
+ 12857521U, // SUB32rm
1910
+ 4468913U, // SUB32rr
1911
+ 4460721U, // SUB32rr_REV
1912
+ 5985U, // SUB64i32
1913
+ 282801U, // SUB64mi32
1914
+ 282801U, // SUB64mi8
1915
+ 282801U, // SUB64mr
1916
+ 4468913U, // SUB64ri32
1917
+ 4468913U, // SUB64ri8
1918
+ 17051825U, // SUB64rm
1919
+ 4468913U, // SUB64rr
1920
+ 4460721U, // SUB64rr_REV
1921
+ 5621U, // SUB8i8
1922
+ 286897U, // SUB8mi
1923
+ 286897U, // SUB8mi8
1924
+ 286897U, // SUB8mr
1925
+ 4468913U, // SUB8ri
1926
+ 4468913U, // SUB8ri8
1927
+ 21246129U, // SUB8rm
1928
+ 4468913U, // SUB8rr
1929
+ 4460721U, // SUB8rr_REV
1930
+ 2855U, // SWAPGS
1931
+ 2632U, // SYSCALL
1932
+ 2748U, // SYSENTER
1933
+ 2894U, // SYSEXIT
1934
+ 2739U, // SYSEXIT64
1935
+ 2887U, // SYSRET
1936
+ 2731U, // SYSRET64
1937
+ 29626595U, // T1MSKC32rm
1938
+ 25432291U, // T1MSKC32rr
1939
+ 33820899U, // T1MSKC64rm
1940
+ 25432291U, // T1MSKC64rr
1941
+ 5797U, // TEST16i16
1942
+ 271662U, // TEST16mi
1943
+ 271662U, // TEST16mi_alt
1944
+ 271662U, // TEST16mr
1945
+ 25433390U, // TEST16ri
1946
+ 25433390U, // TEST16ri_alt
1947
+ 25433390U, // TEST16rr
1948
+ 5954U, // TEST32i32
1949
+ 279854U, // TEST32mi
1950
+ 279854U, // TEST32mi_alt
1951
+ 279854U, // TEST32mr
1952
+ 25433390U, // TEST32ri
1953
+ 25433390U, // TEST32ri_alt
1954
+ 25433390U, // TEST32rr
1955
+ 6082U, // TEST64i32
1956
+ 283950U, // TEST64mi32
1957
+ 283950U, // TEST64mi32_alt
1958
+ 283950U, // TEST64mr
1959
+ 25433390U, // TEST64ri32
1960
+ 25433390U, // TEST64ri32_alt
1961
+ 25433390U, // TEST64rr
1962
+ 5695U, // TEST8i8
1963
+ 288046U, // TEST8mi
1964
+ 288046U, // TEST8mi_alt
1965
+ 288046U, // TEST8mr
1966
+ 25433390U, // TEST8ri
1967
+ 25433390U, // TEST8ri_alt
1968
+ 25433390U, // TEST8rr
1969
+ 4655U, // TPAUSE
1970
+ 38016255U, // TZCNT16rm
1971
+ 25433343U, // TZCNT16rr
1972
+ 29627647U, // TZCNT32rm
1973
+ 25433343U, // TZCNT32rr
1974
+ 33821951U, // TZCNT64rm
1975
+ 25433343U, // TZCNT64rr
1976
+ 29627082U, // TZMSK32rm
1977
+ 25432778U, // TZMSK32rr
1978
+ 33821386U, // TZMSK64rm
1979
+ 25432778U, // TZMSK64rr
1980
+ 2188U, // UD0
1981
+ 2198U, // UD1
1982
+ 2215U, // UD2
1983
+ 5147U, // UMONITOR16
1984
+ 5147U, // UMONITOR32
1985
+ 5147U, // UMONITOR64
1986
+ 5360U, // UMWAIT
1987
+ 9266U, // VERRm
1988
+ 5170U, // VERRr
1989
+ 9555U, // VERWm
1990
+ 5459U, // VERWr
1991
+ 2625U, // VMCALL
1992
+ 21490U, // VMCLEARm
1993
+ 2398U, // VMFUNC
1994
+ 2547U, // VMLAUNCH
1995
+ 2962U, // VMLOAD32
1996
+ 3017U, // VMLOAD64
1997
+ 2617U, // VMMCALL
1998
+ 20783U, // VMPTRLDm
1999
+ 21812U, // VMPTRSTm
2000
+ 278778U, // VMREAD32mr
2001
+ 25432314U, // VMREAD32rr
2002
+ 282874U, // VMREAD64mr
2003
+ 25432314U, // VMREAD64rr
2004
+ 2473U, // VMRESUME
2005
+ 2984U, // VMRUN32
2006
+ 3039U, // VMRUN64
2007
+ 2973U, // VMSAVE32
2008
+ 3028U, // VMSAVE64
2009
+ 29626941U, // VMWRITE32rm
2010
+ 25432637U, // VMWRITE32rr
2011
+ 33821245U, // VMWRITE64rm
2012
+ 25432637U, // VMWRITE64rr
2013
+ 2506U, // VMXOFF
2014
+ 21299U, // VMXON
2015
+ 2448U, // WBINVD
2016
+ 2455U, // WBNOINVD
2017
+ 4625U, // WRFSBASE
2018
+ 4625U, // WRFSBASE64
2019
+ 4645U, // WRGSBASE
2020
+ 4645U, // WRGSBASE64
2021
+ 2763U, // WRMSR
2022
+ 2913U, // WRPKRUr
2023
+ 278898U, // WRSSD
2024
+ 283612U, // WRSSQ
2025
+ 278905U, // WRUSSD
2026
+ 283619U, // WRUSSQ
2027
+ 110850U, // XADD16rm
2028
+ 114946U, // XADD16rr
2029
+ 119042U, // XADD32rm
2030
+ 114946U, // XADD32rr
2031
+ 123138U, // XADD64rm
2032
+ 114946U, // XADD64rr
2033
+ 127234U, // XADD8rm
2034
+ 114946U, // XADD8rr
2035
+ 1061498U, // XCHG16ar
2036
+ 111226U, // XCHG16rm
2037
+ 131706U, // XCHG16rr
2038
+ 1323642U, // XCHG32ar
2039
+ 119418U, // XCHG32rm
2040
+ 131706U, // XCHG32rr
2041
+ 1585786U, // XCHG64ar
2042
+ 123514U, // XCHG64rm
2043
+ 131706U, // XCHG64rr
2044
+ 127610U, // XCHG8rm
2045
+ 131706U, // XCHG8rr
2046
+ 2362U, // XCRYPTCBC
2047
+ 2326U, // XCRYPTCFB
2048
+ 2769U, // XCRYPTCTR
2049
+ 2316U, // XCRYPTECB
2050
+ 2336U, // XCRYPTOFB
2051
+ 2920U, // XGETBV
2052
+ 2346U, // XLAT
2053
+ 5776U, // XOR16i16
2054
+ 271405U, // XOR16mi
2055
+ 271405U, // XOR16mi8
2056
+ 271405U, // XOR16mr
2057
+ 4469805U, // XOR16ri
2058
+ 4469805U, // XOR16ri8
2059
+ 8664109U, // XOR16rm
2060
+ 4469805U, // XOR16rr
2061
+ 4461613U, // XOR16rr_REV
2062
+ 5931U, // XOR32i32
2063
+ 279597U, // XOR32mi
2064
+ 279597U, // XOR32mi8
2065
+ 279597U, // XOR32mr
2066
+ 4469805U, // XOR32ri
2067
+ 4469805U, // XOR32ri8
2068
+ 12858413U, // XOR32rm
2069
+ 4469805U, // XOR32rr
2070
+ 4461613U, // XOR32rr_REV
2071
+ 6059U, // XOR64i32
2072
+ 283693U, // XOR64mi32
2073
+ 283693U, // XOR64mi8
2074
+ 283693U, // XOR64mr
2075
+ 4469805U, // XOR64ri32
2076
+ 4469805U, // XOR64ri8
2077
+ 17052717U, // XOR64rm
2078
+ 4469805U, // XOR64rr
2079
+ 4461613U, // XOR64rr_REV
2080
+ 5674U, // XOR8i8
2081
+ 287789U, // XOR8mi
2082
+ 287789U, // XOR8mi8
2083
+ 287789U, // XOR8mr
2084
+ 4469805U, // XOR8ri
2085
+ 4469805U, // XOR8ri8
2086
+ 21247021U, // XOR8rm
2087
+ 4469805U, // XOR8rr
2088
+ 4461613U, // XOR8rr_REV
2089
+ 54309U, // XRSTOR
2090
+ 53268U, // XRSTOR64
2091
+ 54435U, // XRSTORS
2092
+ 53288U, // XRSTORS64
2093
+ 53849U, // XSAVE
2094
+ 53259U, // XSAVE64
2095
+ 53453U, // XSAVEC
2096
+ 53249U, // XSAVEC64
2097
+ 54552U, // XSAVEOPT
2098
+ 53299U, // XSAVEOPT64
2099
+ 54385U, // XSAVES
2100
+ 53278U, // XSAVES64
2101
+ 2927U, // XSETBV
2102
+ 2192U, // XSHA1
2103
+ 2245U, // XSHA256
2104
+ 2493U, // XSTORE
2105
+ };
2106
+
2107
+ unsigned int opcode = MCInst_getOpcode(MI);
2108
+ // printf("opcode = %u\n", opcode);
2109
+
2110
+ // Emit the opcode for the instruction.
2111
+ uint32_t Bits = 0;
2112
+ Bits |= OpInfo0[opcode] << 0;
2113
+ SStream_concat0(O, AsmStrs+(Bits & 4095)-1);
2114
+
2115
+
2116
+ // Fragment 0 encoded into 6 bits for 33 unique commands.
2117
+ // printf("Fragment 0: %"PRIu64"\n", ((Bits >> 12) & 63));
2118
+ switch ((Bits >> 12) & 63) {
2119
+ default: // unreachable
2120
+ case 0:
2121
+ // DBG_VALUE, DBG_LABEL, BUNDLE, LIFETIME_START, LIFETIME_END, FENTRY_CAL...
2122
+ return;
2123
+ break;
2124
+ case 1:
2125
+ // AAD8i8, AAM8i8, ADC16i16, ADC16rr_REV, ADC32i32, ADC32rr_REV, ADC64i32...
2126
+ printOperand(MI, 0, O);
2127
+ break;
2128
+ case 2:
2129
+ // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16...
2130
+ printi16mem(MI, 0, O);
2131
+ break;
2132
+ case 3:
2133
+ // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32...
2134
+ printOperand(MI, 1, O);
2135
+ break;
2136
+ case 4:
2137
+ // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32...
2138
+ printi32mem(MI, 0, O);
2139
+ break;
2140
+ case 5:
2141
+ // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,...
2142
+ printi64mem(MI, 0, O);
2143
+ break;
2144
+ case 6:
2145
+ // ADC8mi, ADC8mi8, ADC8mr, ADD8mi, ADD8mi8, ADD8mr, AND8mi, AND8mi8, AND...
2146
+ printi8mem(MI, 0, O);
2147
+ break;
2148
+ case 7:
2149
+ // CALL64pcrel32, CALLpcrel16, CALLpcrel32, JAE_1, JAE_2, JAE_4, JA_1, JA...
2150
+ printPCRelImm(MI, 0, O);
2151
+ return;
2152
+ break;
2153
+ case 8:
2154
+ // CMPSB
2155
+ printSrcIdx8(MI, 1, O);
2156
+ SStream_concat0(O, ", ");
2157
+ printDstIdx8(MI, 0, O);
2158
+ return;
2159
+ break;
2160
+ case 9:
2161
+ // CMPSL
2162
+ printSrcIdx32(MI, 1, O);
2163
+ SStream_concat0(O, ", ");
2164
+ printDstIdx32(MI, 0, O);
2165
+ return;
2166
+ break;
2167
+ case 10:
2168
+ // CMPSQ
2169
+ printSrcIdx64(MI, 1, O);
2170
+ SStream_concat0(O, ", ");
2171
+ printDstIdx64(MI, 0, O);
2172
+ return;
2173
+ break;
2174
+ case 11:
2175
+ // CMPSW
2176
+ printSrcIdx16(MI, 1, O);
2177
+ SStream_concat0(O, ", ");
2178
+ printDstIdx16(MI, 0, O);
2179
+ return;
2180
+ break;
2181
+ case 12:
2182
+ // CMPXCHG16B
2183
+ printi128mem(MI, 0, O);
2184
+ return;
2185
+ break;
2186
+ case 13:
2187
+ // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, LGD...
2188
+ printopaquemem(MI, 0, O);
2189
+ return;
2190
+ break;
2191
+ case 14:
2192
+ // IN16ri, IN32ri, IN8ri, INT, OUT16ir, OUT32ir, OUT8ir
2193
+ printU8Imm(MI, 0, O);
2194
+ break;
2195
+ case 15:
2196
+ // INSB, MOVSB, SCASB, STOSB
2197
+ printDstIdx8(MI, 0, O);
2198
+ break;
2199
+ case 16:
2200
+ // INSL, MOVSL, SCASL, STOSL
2201
+ printDstIdx32(MI, 0, O);
2202
+ break;
2203
+ case 17:
2204
+ // INSW, MOVSW, SCASW, STOSW
2205
+ printDstIdx16(MI, 0, O);
2206
+ break;
2207
+ case 18:
2208
+ // LODSB, OUTSB
2209
+ printSrcIdx8(MI, 0, O);
2210
+ return;
2211
+ break;
2212
+ case 19:
2213
+ // LODSL, OUTSL
2214
+ printSrcIdx32(MI, 0, O);
2215
+ return;
2216
+ break;
2217
+ case 20:
2218
+ // LODSQ
2219
+ printSrcIdx64(MI, 0, O);
2220
+ return;
2221
+ break;
2222
+ case 21:
2223
+ // LODSW, OUTSW
2224
+ printSrcIdx16(MI, 0, O);
2225
+ return;
2226
+ break;
2227
+ case 22:
2228
+ // MOV16ao16, MOV16ao32, MOV16ao64, MOV16o16a, MOV16o32a, MOV16o64a
2229
+ printMemOffs16(MI, 0, O);
2230
+ break;
2231
+ case 23:
2232
+ // MOV32ao16, MOV32ao32, MOV32ao64, MOV32o16a, MOV32o32a, MOV32o64a
2233
+ printMemOffs32(MI, 0, O);
2234
+ break;
2235
+ case 24:
2236
+ // MOV64ao32, MOV64ao64, MOV64o32a, MOV64o64a
2237
+ printMemOffs64(MI, 0, O);
2238
+ break;
2239
+ case 25:
2240
+ // MOV8ao16, MOV8ao32, MOV8ao64, MOV8o16a, MOV8o32a, MOV8o64a
2241
+ printMemOffs8(MI, 0, O);
2242
+ break;
2243
+ case 26:
2244
+ // MOVSQ, SCASQ, STOSQ
2245
+ printDstIdx64(MI, 0, O);
2246
+ break;
2247
+ case 27:
2248
+ // XADD16rm, XCHG16rm
2249
+ printi16mem(MI, 2, O);
2250
+ SStream_concat0(O, ", ");
2251
+ printOperand(MI, 1, O);
2252
+ return;
2253
+ break;
2254
+ case 28:
2255
+ // XADD16rr, XADD32rr, XADD64rr, XADD8rr
2256
+ printOperand(MI, 2, O);
2257
+ SStream_concat0(O, ", ");
2258
+ printOperand(MI, 3, O);
2259
+ return;
2260
+ break;
2261
+ case 29:
2262
+ // XADD32rm, XCHG32rm
2263
+ printi32mem(MI, 2, O);
2264
+ SStream_concat0(O, ", ");
2265
+ printOperand(MI, 1, O);
2266
+ return;
2267
+ break;
2268
+ case 30:
2269
+ // XADD64rm, XCHG64rm
2270
+ printi64mem(MI, 2, O);
2271
+ SStream_concat0(O, ", ");
2272
+ printOperand(MI, 1, O);
2273
+ return;
2274
+ break;
2275
+ case 31:
2276
+ // XADD8rm, XCHG8rm
2277
+ printi8mem(MI, 2, O);
2278
+ SStream_concat0(O, ", ");
2279
+ printOperand(MI, 1, O);
2280
+ return;
2281
+ break;
2282
+ case 32:
2283
+ // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr
2284
+ printOperand(MI, 3, O);
2285
+ SStream_concat0(O, ", ");
2286
+ printOperand(MI, 2, O);
2287
+ return;
2288
+ break;
2289
+ }
2290
+
2291
+
2292
+ // Fragment 1 encoded into 4 bits for 10 unique commands.
2293
+ // printf("Fragment 1: %"PRIu64"\n", ((Bits >> 18) & 15));
2294
+ switch ((Bits >> 18) & 15) {
2295
+ default: // unreachable
2296
+ case 0:
2297
+ // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i...
2298
+ return;
2299
+ break;
2300
+ case 1:
2301
+ // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16...
2302
+ SStream_concat0(O, ", ");
2303
+ break;
2304
+ case 2:
2305
+ // FARJMP16i, FARJMP32i
2306
+ SStream_concat0(O, ":");
2307
+ printOperand(MI, 0, O);
2308
+ return;
2309
+ break;
2310
+ case 3:
2311
+ // INSB, INSL, INSW
2312
+ SStream_concat0(O, ", dx");
2313
+ op_addReg(MI, X86_REG_DX);
2314
+ return;
2315
+ break;
2316
+ case 4:
2317
+ // MOV16o16a, MOV16o32a, MOV16o64a, OUT16ir, STOSW, XCHG16ar
2318
+ SStream_concat0(O, ", ax");
2319
+ op_addReg(MI, X86_REG_AX);
2320
+ return;
2321
+ break;
2322
+ case 5:
2323
+ // MOV32o16a, MOV32o32a, MOV32o64a, OUT32ir, STOSL, XCHG32ar
2324
+ SStream_concat0(O, ", eax");
2325
+ op_addReg(MI, X86_REG_EAX);
2326
+ return;
2327
+ break;
2328
+ case 6:
2329
+ // MOV64o32a, MOV64o64a, STOSQ, XCHG64ar
2330
+ SStream_concat0(O, ", rax");
2331
+ op_addReg(MI, X86_REG_RAX);
2332
+ return;
2333
+ break;
2334
+ case 7:
2335
+ // MOV8o16a, MOV8o32a, MOV8o64a, OUT8ir, STOSB
2336
+ SStream_concat0(O, ", al");
2337
+ op_addReg(MI, X86_REG_AL);
2338
+ return;
2339
+ break;
2340
+ case 8:
2341
+ // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R...
2342
+ SStream_concat0(O, ", cl");
2343
+ op_addReg(MI, X86_REG_CL);
2344
+ return;
2345
+ break;
2346
+ case 9:
2347
+ // RCL16r1, RCL32r1, RCL64r1, RCL8r1, RCR16m1, RCR16r1, RCR32m1, RCR32r1,...
2348
+ SStream_concat0(O, ", 1");
2349
+ op_addImm(MI, 1);
2350
+ return;
2351
+ break;
2352
+ }
2353
+
2354
+
2355
+ // Fragment 2 encoded into 5 bits for 22 unique commands.
2356
+ // printf("Fragment 2: %"PRIu64"\n", ((Bits >> 22) & 31));
2357
+ switch ((Bits >> 22) & 31) {
2358
+ default: // unreachable
2359
+ case 0:
2360
+ // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
2361
+ printOperand(MI, 5, O);
2362
+ break;
2363
+ case 1:
2364
+ // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A...
2365
+ printOperand(MI, 2, O);
2366
+ break;
2367
+ case 2:
2368
+ // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r...
2369
+ printi16mem(MI, 2, O);
2370
+ return;
2371
+ break;
2372
+ case 3:
2373
+ // ADC32rm, ADCX32rm, ADD32rm, ADOX32rm, AND32rm, CMOVA32rm, CMOVAE32rm, ...
2374
+ printi32mem(MI, 2, O);
2375
+ return;
2376
+ break;
2377
+ case 4:
2378
+ // ADC64rm, ADCX64rm, ADD64rm, ADOX64rm, AND64rm, CMOVA64rm, CMOVAE64rm, ...
2379
+ printi64mem(MI, 2, O);
2380
+ return;
2381
+ break;
2382
+ case 5:
2383
+ // ADC8rm, ADD8rm, AND8rm, OR8rm, SBB8rm, SUB8rm, XOR8rm
2384
+ printi8mem(MI, 2, O);
2385
+ return;
2386
+ break;
2387
+ case 6:
2388
+ // ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, ARPL16rr, BEXTR32rr, BEXTR64rr...
2389
+ printOperand(MI, 1, O);
2390
+ break;
2391
+ case 7:
2392
+ // BEXTR32rm, BEXTRI32mi, BLCFILL32rm, BLCI32rm, BLCIC32rm, BLCMSK32rm, B...
2393
+ printi32mem(MI, 1, O);
2394
+ break;
2395
+ case 8:
2396
+ // BEXTR64rm, BEXTRI64mi, BLCFILL64rm, BLCI64rm, BLCIC64rm, BLCMSK64rm, B...
2397
+ printi64mem(MI, 1, O);
2398
+ break;
2399
+ case 9:
2400
+ // BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, LAR16rm, LAR32rm, LA...
2401
+ printi16mem(MI, 1, O);
2402
+ break;
2403
+ case 10:
2404
+ // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32rm8, MOVSX32rm8_NOREX...
2405
+ printi8mem(MI, 1, O);
2406
+ return;
2407
+ break;
2408
+ case 11:
2409
+ // FARCALL16i, FARCALL32i, NOOP19rr
2410
+ printOperand(MI, 0, O);
2411
+ return;
2412
+ break;
2413
+ case 12:
2414
+ // INVEPT32, INVEPT64, INVPCID32, INVPCID64, INVVPID32, INVVPID64
2415
+ printi128mem(MI, 1, O);
2416
+ return;
2417
+ break;
2418
+ case 13:
2419
+ // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm...
2420
+ printopaquemem(MI, 1, O);
2421
+ return;
2422
+ break;
2423
+ case 14:
2424
+ // LEA16r, LEA32r, LEA64_32r, LEA64r
2425
+ printanymem(MI, 1, O);
2426
+ return;
2427
+ break;
2428
+ case 15:
2429
+ // MOVDIR64B16, MOVDIR64B32, MOVDIR64B64
2430
+ printi512mem(MI, 1, O);
2431
+ return;
2432
+ break;
2433
+ case 16:
2434
+ // MOVSB
2435
+ printSrcIdx8(MI, 1, O);
2436
+ return;
2437
+ break;
2438
+ case 17:
2439
+ // MOVSL
2440
+ printSrcIdx32(MI, 1, O);
2441
+ return;
2442
+ break;
2443
+ case 18:
2444
+ // MOVSQ
2445
+ printSrcIdx64(MI, 1, O);
2446
+ return;
2447
+ break;
2448
+ case 19:
2449
+ // MOVSW
2450
+ printSrcIdx16(MI, 1, O);
2451
+ return;
2452
+ break;
2453
+ case 20:
2454
+ // RCL16mi, RCL32mi, RCL64mi, RCL8mi, RCR16mi, RCR32mi, RCR64mi, RCR8mi, ...
2455
+ printU8Imm(MI, 5, O);
2456
+ return;
2457
+ break;
2458
+ case 21:
2459
+ // RCL16ri, RCL32ri, RCL64ri, RCL8ri, RCR16ri, RCR32ri, RCR64ri, RCR8ri, ...
2460
+ printU8Imm(MI, 2, O);
2461
+ return;
2462
+ break;
2463
+ }
2464
+
2465
+
2466
+ // Fragment 3 encoded into 2 bits for 3 unique commands.
2467
+ // printf("Fragment 3: %"PRIu64"\n", ((Bits >> 27) & 3));
2468
+ switch ((Bits >> 27) & 3) {
2469
+ default: // unreachable
2470
+ case 0:
2471
+ // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, A...
2472
+ return;
2473
+ break;
2474
+ case 1:
2475
+ // ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, BEXTR32rm, BEXTR32rr, BEXTR64r...
2476
+ SStream_concat0(O, ", ");
2477
+ break;
2478
+ case 2:
2479
+ // SHLD16mrCL, SHLD16rrCL, SHLD32mrCL, SHLD32rrCL, SHLD64mrCL, SHLD64rrCL...
2480
+ SStream_concat0(O, ", cl");
2481
+ op_addReg(MI, X86_REG_CL);
2482
+ return;
2483
+ break;
2484
+ }
2485
+
2486
+
2487
+ // Fragment 4 encoded into 3 bits for 7 unique commands.
2488
+ // printf("Fragment 4: %"PRIu64"\n", ((Bits >> 29) & 7));
2489
+ switch ((Bits >> 29) & 7) {
2490
+ default: // unreachable
2491
+ case 0:
2492
+ // ANDN32rm, MULX32rm, PDEP32rm, PEXT32rm
2493
+ printi32mem(MI, 2, O);
2494
+ return;
2495
+ break;
2496
+ case 1:
2497
+ // ANDN32rr, ANDN64rr, BEXTR32rr, BEXTR64rr, BEXTRI32ri, BEXTRI64ri, BZHI...
2498
+ printOperand(MI, 2, O);
2499
+ return;
2500
+ break;
2501
+ case 2:
2502
+ // ANDN64rm, MULX64rm, PDEP64rm, PEXT64rm
2503
+ printi64mem(MI, 2, O);
2504
+ return;
2505
+ break;
2506
+ case 3:
2507
+ // BEXTR32rm, BEXTR64rm, BEXTRI32mi, BEXTRI64mi, BZHI32rm, BZHI64rm, IMUL...
2508
+ printOperand(MI, 6, O);
2509
+ return;
2510
+ break;
2511
+ case 4:
2512
+ // RORX32mi, RORX64mi, SHLD16mri8, SHLD32mri8, SHLD64mri8, SHRD16mri8, SH...
2513
+ printU8Imm(MI, 6, O);
2514
+ return;
2515
+ break;
2516
+ case 5:
2517
+ // RORX32ri, RORX64ri
2518
+ printU8Imm(MI, 2, O);
2519
+ return;
2520
+ break;
2521
+ case 6:
2522
+ // SHLD16rri8, SHLD32rri8, SHLD64rri8, SHRD16rri8, SHRD32rri8, SHRD64rri8
2523
+ printU8Imm(MI, 3, O);
2524
+ return;
2525
+ break;
2526
+ }
2527
+
2528
+ }
2529
+
2530
+
2531
+