hexcore-capstone 1.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (332) hide show
  1. package/LICENSE +26 -0
  2. package/README.md +191 -0
  3. package/binding.gyp +168 -0
  4. package/deps/capstone/LEB128.h +38 -0
  5. package/deps/capstone/MCDisassembler.h +14 -0
  6. package/deps/capstone/MCFixedLenDisassembler.h +32 -0
  7. package/deps/capstone/MCInst.c +270 -0
  8. package/deps/capstone/MCInst.h +165 -0
  9. package/deps/capstone/MCInstrDesc.c +41 -0
  10. package/deps/capstone/MCInstrDesc.h +167 -0
  11. package/deps/capstone/MCRegisterInfo.c +151 -0
  12. package/deps/capstone/MCRegisterInfo.h +116 -0
  13. package/deps/capstone/Mapping.c +254 -0
  14. package/deps/capstone/Mapping.h +174 -0
  15. package/deps/capstone/MathExtras.h +442 -0
  16. package/deps/capstone/SStream.c +181 -0
  17. package/deps/capstone/SStream.h +40 -0
  18. package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
  19. package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
  20. package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
  21. package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
  22. package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
  23. package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
  24. package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
  25. package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
  26. package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
  27. package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
  28. package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
  29. package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
  30. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
  31. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
  32. package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
  33. package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
  34. package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
  35. package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
  36. package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
  37. package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
  38. package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
  39. package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
  40. package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
  41. package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
  42. package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
  43. package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
  44. package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
  45. package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
  46. package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
  47. package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
  48. package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
  49. package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
  50. package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
  51. package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
  52. package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
  53. package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
  54. package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
  55. package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
  56. package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
  57. package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
  58. package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
  59. package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
  60. package/deps/capstone/arch/ARM/ARMModule.c +63 -0
  61. package/deps/capstone/arch/ARM/ARMModule.h +12 -0
  62. package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
  63. package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
  64. package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
  65. package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
  66. package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
  67. package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
  68. package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
  69. package/deps/capstone/arch/BPF/BPFModule.c +34 -0
  70. package/deps/capstone/arch/BPF/BPFModule.h +12 -0
  71. package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
  72. package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
  73. package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
  74. package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
  75. package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
  76. package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
  77. package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
  78. package/deps/capstone/arch/EVM/EVMModule.c +33 -0
  79. package/deps/capstone/arch/EVM/EVMModule.h +12 -0
  80. package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
  81. package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
  82. package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
  83. package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
  84. package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
  85. package/deps/capstone/arch/M680X/M680XModule.c +77 -0
  86. package/deps/capstone/arch/M680X/M680XModule.h +12 -0
  87. package/deps/capstone/arch/M680X/cpu12.inc +335 -0
  88. package/deps/capstone/arch/M680X/hcs08.inc +60 -0
  89. package/deps/capstone/arch/M680X/hd6301.inc +15 -0
  90. package/deps/capstone/arch/M680X/hd6309.inc +259 -0
  91. package/deps/capstone/arch/M680X/insn_props.inc +367 -0
  92. package/deps/capstone/arch/M680X/m6800.inc +277 -0
  93. package/deps/capstone/arch/M680X/m6801.inc +39 -0
  94. package/deps/capstone/arch/M680X/m6805.inc +277 -0
  95. package/deps/capstone/arch/M680X/m6808.inc +91 -0
  96. package/deps/capstone/arch/M680X/m6809.inc +352 -0
  97. package/deps/capstone/arch/M680X/m6811.inc +105 -0
  98. package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
  99. package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
  100. package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
  101. package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
  102. package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
  103. package/deps/capstone/arch/M68K/M68KModule.c +42 -0
  104. package/deps/capstone/arch/M68K/M68KModule.h +12 -0
  105. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
  106. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
  107. package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
  108. package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
  109. package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
  110. package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
  111. package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
  112. package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
  113. package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
  114. package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
  115. package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
  116. package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
  117. package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
  118. package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
  119. package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
  120. package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
  121. package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
  122. package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
  123. package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
  124. package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
  125. package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
  126. package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
  127. package/deps/capstone/arch/Mips/MipsModule.c +52 -0
  128. package/deps/capstone/arch/Mips/MipsModule.h +12 -0
  129. package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
  130. package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
  131. package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
  132. package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
  133. package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
  134. package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
  135. package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
  136. package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
  137. package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
  138. package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
  139. package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
  140. package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
  141. package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
  142. package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
  143. package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
  144. package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
  145. package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
  146. package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
  147. package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
  148. package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
  149. package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
  150. package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
  151. package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
  152. package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
  153. package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
  154. package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
  155. package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
  156. package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
  157. package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
  158. package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
  159. package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
  160. package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
  161. package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
  162. package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
  163. package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
  164. package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
  165. package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
  166. package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
  167. package/deps/capstone/arch/SH/SHModule.c +39 -0
  168. package/deps/capstone/arch/SH/SHModule.h +12 -0
  169. package/deps/capstone/arch/SH/mktable.rb +390 -0
  170. package/deps/capstone/arch/Sparc/Sparc.h +63 -0
  171. package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
  172. package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
  173. package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
  174. package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
  175. package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
  176. package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
  177. package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
  178. package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
  179. package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
  180. package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
  181. package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
  182. package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
  183. package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
  184. package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
  185. package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
  186. package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
  187. package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
  188. package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
  189. package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
  190. package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
  191. package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
  192. package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
  193. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
  194. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
  195. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
  196. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
  197. package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
  198. package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
  199. package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
  200. package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
  201. package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
  202. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
  203. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
  204. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
  205. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
  206. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
  207. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
  208. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
  209. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
  210. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
  211. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
  212. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
  213. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
  214. package/deps/capstone/arch/TriCore/TriCore.td +134 -0
  215. package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
  216. package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
  217. package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
  218. package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
  219. package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
  220. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
  221. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
  222. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
  223. package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
  224. package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
  225. package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
  226. package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
  227. package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
  228. package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
  229. package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
  230. package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
  231. package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
  232. package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
  233. package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
  234. package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
  235. package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
  236. package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
  237. package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
  238. package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
  239. package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
  240. package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
  241. package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
  242. package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
  243. package/deps/capstone/arch/WASM/WASMModule.c +33 -0
  244. package/deps/capstone/arch/WASM/WASMModule.h +12 -0
  245. package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
  246. package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
  247. package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
  248. package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
  249. package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
  250. package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
  251. package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
  252. package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
  253. package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
  254. package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
  255. package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
  256. package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
  257. package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
  258. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
  259. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
  260. package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
  261. package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
  262. package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
  263. package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
  264. package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
  265. package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
  266. package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
  267. package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
  268. package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
  269. package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
  270. package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
  271. package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
  272. package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
  273. package/deps/capstone/arch/X86/X86Mapping.h +96 -0
  274. package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
  275. package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
  276. package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
  277. package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
  278. package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
  279. package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
  280. package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
  281. package/deps/capstone/arch/X86/X86Module.c +94 -0
  282. package/deps/capstone/arch/X86/X86Module.h +12 -0
  283. package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
  284. package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
  285. package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
  286. package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
  287. package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
  288. package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
  289. package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
  290. package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
  291. package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
  292. package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
  293. package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
  294. package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
  295. package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
  296. package/deps/capstone/cs.c +1664 -0
  297. package/deps/capstone/cs_priv.h +101 -0
  298. package/deps/capstone/cs_simple_types.h +886 -0
  299. package/deps/capstone/include/capstone/arm.h +991 -0
  300. package/deps/capstone/include/capstone/arm64.h +3159 -0
  301. package/deps/capstone/include/capstone/bpf.h +209 -0
  302. package/deps/capstone/include/capstone/capstone.h +875 -0
  303. package/deps/capstone/include/capstone/evm.h +188 -0
  304. package/deps/capstone/include/capstone/m680x.h +537 -0
  305. package/deps/capstone/include/capstone/m68k.h +613 -0
  306. package/deps/capstone/include/capstone/mips.h +956 -0
  307. package/deps/capstone/include/capstone/mos65xx.h +204 -0
  308. package/deps/capstone/include/capstone/platform.h +122 -0
  309. package/deps/capstone/include/capstone/ppc.h +2108 -0
  310. package/deps/capstone/include/capstone/riscv.h +531 -0
  311. package/deps/capstone/include/capstone/sh.h +465 -0
  312. package/deps/capstone/include/capstone/sparc.h +520 -0
  313. package/deps/capstone/include/capstone/systemz.h +2601 -0
  314. package/deps/capstone/include/capstone/tms320c64x.h +359 -0
  315. package/deps/capstone/include/capstone/tricore.h +567 -0
  316. package/deps/capstone/include/capstone/wasm.h +250 -0
  317. package/deps/capstone/include/capstone/x86.h +1986 -0
  318. package/deps/capstone/include/capstone/xcore.h +235 -0
  319. package/deps/capstone/include/platform.h +110 -0
  320. package/deps/capstone/include/windowsce/intrin.h +12 -0
  321. package/deps/capstone/include/windowsce/stdint.h +133 -0
  322. package/deps/capstone/utils.c +140 -0
  323. package/deps/capstone/utils.h +54 -0
  324. package/index.d.ts +448 -0
  325. package/index.js +64 -0
  326. package/index.mjs +25 -0
  327. package/package.json +82 -0
  328. package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
  329. package/src/capstone_wrapper.cpp +910 -0
  330. package/src/capstone_wrapper.h +147 -0
  331. package/src/disasm_async_worker.h +215 -0
  332. package/src/main.cpp +145 -0
@@ -0,0 +1,513 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* BPF Backend by david942j <david942j@gmail.com>, 2019 */
3
+
4
+ #include <string.h>
5
+
6
+ #include "BPFConstants.h"
7
+ #include "BPFMapping.h"
8
+ #include "../../utils.h"
9
+
10
+ #ifndef CAPSTONE_DIET
11
+ static const name_map group_name_maps[] = {
12
+ { BPF_GRP_INVALID, NULL },
13
+
14
+ { BPF_GRP_LOAD, "load" },
15
+ { BPF_GRP_STORE, "store" },
16
+ { BPF_GRP_ALU, "alu" },
17
+ { BPF_GRP_JUMP, "jump" },
18
+ { BPF_GRP_CALL, "call" },
19
+ { BPF_GRP_RETURN, "return" },
20
+ { BPF_GRP_MISC, "misc" },
21
+ };
22
+ #endif
23
+
24
+ const char *BPF_group_name(csh handle, unsigned int id)
25
+ {
26
+ #ifndef CAPSTONE_DIET
27
+ return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
28
+ #else
29
+ return NULL;
30
+ #endif
31
+ }
32
+
33
+ #ifndef CAPSTONE_DIET
34
+ static const name_map insn_name_maps[BPF_INS_ENDING] = {
35
+ { BPF_INS_INVALID, NULL },
36
+
37
+ { BPF_INS_ADD, "add" },
38
+ { BPF_INS_SUB, "sub" },
39
+ { BPF_INS_MUL, "mul" },
40
+ { BPF_INS_DIV, "div" },
41
+ { BPF_INS_OR, "or" },
42
+ { BPF_INS_AND, "and" },
43
+ { BPF_INS_LSH, "lsh" },
44
+ { BPF_INS_RSH, "rsh" },
45
+ { BPF_INS_NEG, "neg" },
46
+ { BPF_INS_MOD, "mod" },
47
+ { BPF_INS_XOR, "xor" },
48
+ { BPF_INS_MOV, "mov" },
49
+ { BPF_INS_ARSH, "arsh" },
50
+
51
+ { BPF_INS_ADD64, "add64" },
52
+ { BPF_INS_SUB64, "sub64" },
53
+ { BPF_INS_MUL64, "mul64" },
54
+ { BPF_INS_DIV64, "div64" },
55
+ { BPF_INS_OR64, "or64" },
56
+ { BPF_INS_AND64, "and64" },
57
+ { BPF_INS_LSH64, "lsh64" },
58
+ { BPF_INS_RSH64, "rsh64" },
59
+ { BPF_INS_NEG64, "neg64" },
60
+ { BPF_INS_MOD64, "mod64" },
61
+ { BPF_INS_XOR64, "xor64" },
62
+ { BPF_INS_MOV64, "mov64" },
63
+ { BPF_INS_ARSH64, "arsh64" },
64
+
65
+ { BPF_INS_LE16, "le16" },
66
+ { BPF_INS_LE32, "le32" },
67
+ { BPF_INS_LE64, "le64" },
68
+ { BPF_INS_BE16, "be16" },
69
+ { BPF_INS_BE32, "be32" },
70
+ { BPF_INS_BE64, "be64" },
71
+
72
+ { BPF_INS_LDW, "ldw" },
73
+ { BPF_INS_LDH, "ldh" },
74
+ { BPF_INS_LDB, "ldb" },
75
+ { BPF_INS_LDDW, "lddw" },
76
+ { BPF_INS_LDXW, "ldxw" },
77
+ { BPF_INS_LDXH, "ldxh" },
78
+ { BPF_INS_LDXB, "ldxb" },
79
+ { BPF_INS_LDXDW, "ldxdw" },
80
+
81
+ { BPF_INS_STW, "stw" },
82
+ { BPF_INS_STH, "sth" },
83
+ { BPF_INS_STB, "stb" },
84
+ { BPF_INS_STDW, "stdw" },
85
+ { BPF_INS_STXW, "stxw" },
86
+ { BPF_INS_STXH, "stxh" },
87
+ { BPF_INS_STXB, "stxb" },
88
+ { BPF_INS_STXDW, "stxdw" },
89
+ { BPF_INS_XADDW, "xaddw" },
90
+ { BPF_INS_XADDDW, "xadddw" },
91
+
92
+ { BPF_INS_JMP, "jmp" },
93
+ { BPF_INS_JEQ, "jeq" },
94
+ { BPF_INS_JGT, "jgt" },
95
+ { BPF_INS_JGE, "jge" },
96
+ { BPF_INS_JSET, "jset" },
97
+ { BPF_INS_JNE, "jne" },
98
+ { BPF_INS_JSGT, "jsgt" },
99
+ { BPF_INS_JSGE, "jsge" },
100
+ { BPF_INS_CALL, "call" },
101
+ { BPF_INS_CALLX, "callx" },
102
+ { BPF_INS_EXIT, "exit" },
103
+ { BPF_INS_JLT, "jlt" },
104
+ { BPF_INS_JLE, "jle" },
105
+ { BPF_INS_JSLT, "jslt" },
106
+ { BPF_INS_JSLE, "jsle" },
107
+
108
+ { BPF_INS_RET, "ret" },
109
+
110
+ { BPF_INS_TAX, "tax" },
111
+ { BPF_INS_TXA, "txa" },
112
+ };
113
+ #endif
114
+
115
+ const char *BPF_insn_name(csh handle, unsigned int id)
116
+ {
117
+ #ifndef CAPSTONE_DIET
118
+ /* We have some special cases because 'ld' in cBPF is equivalent to 'ldw'
119
+ * in eBPF, and we don't want to see 'ldw' appears in cBPF mode.
120
+ */
121
+ if (!EBPF_MODE(handle)) {
122
+ switch (id) {
123
+ case BPF_INS_LD: return "ld";
124
+ case BPF_INS_LDX: return "ldx";
125
+ case BPF_INS_ST: return "st";
126
+ case BPF_INS_STX: return "stx";
127
+ }
128
+ }
129
+ return id2name(insn_name_maps, ARR_SIZE(insn_name_maps), id);
130
+ #else
131
+ return NULL;
132
+ #endif
133
+ }
134
+
135
+ const char *BPF_reg_name(csh handle, unsigned int reg)
136
+ {
137
+ #ifndef CAPSTONE_DIET
138
+ if (EBPF_MODE(handle)) {
139
+ if (reg < BPF_REG_R0 || reg > BPF_REG_R10)
140
+ return NULL;
141
+ static const char reg_names[11][4] = {
142
+ "r0", "r1", "r2", "r3", "r4",
143
+ "r5", "r6", "r7", "r8", "r9",
144
+ "r10"
145
+ };
146
+ return reg_names[reg - BPF_REG_R0];
147
+ }
148
+
149
+ /* cBPF mode */
150
+ if (reg == BPF_REG_A)
151
+ return "a";
152
+ else if (reg == BPF_REG_X)
153
+ return "x";
154
+ else
155
+ return NULL;
156
+ #else
157
+ return NULL;
158
+ #endif
159
+ }
160
+
161
+ static bpf_insn op2insn_ld(unsigned opcode)
162
+ {
163
+ #define CASE(c) case BPF_SIZE_##c: \
164
+ if (BPF_CLASS(opcode) == BPF_CLASS_LD) \
165
+ return BPF_INS_LD##c; \
166
+ else \
167
+ return BPF_INS_LDX##c;
168
+
169
+ switch (BPF_SIZE(opcode)) {
170
+ CASE(W);
171
+ CASE(H);
172
+ CASE(B);
173
+ CASE(DW);
174
+ }
175
+ #undef CASE
176
+
177
+ return BPF_INS_INVALID;
178
+ }
179
+
180
+ static bpf_insn op2insn_st(unsigned opcode)
181
+ {
182
+ /*
183
+ * - BPF_STX | BPF_XADD | BPF_{W,DW}
184
+ * - BPF_ST* | BPF_MEM | BPF_{W,H,B,DW}
185
+ */
186
+
187
+ if (opcode == (BPF_CLASS_STX | BPF_MODE_XADD | BPF_SIZE_W))
188
+ return BPF_INS_XADDW;
189
+ if (opcode == (BPF_CLASS_STX | BPF_MODE_XADD | BPF_SIZE_DW))
190
+ return BPF_INS_XADDDW;
191
+
192
+ /* should be BPF_MEM */
193
+ #define CASE(c) case BPF_SIZE_##c: \
194
+ if (BPF_CLASS(opcode) == BPF_CLASS_ST) \
195
+ return BPF_INS_ST##c; \
196
+ else \
197
+ return BPF_INS_STX##c;
198
+ switch (BPF_SIZE(opcode)) {
199
+ CASE(W);
200
+ CASE(H);
201
+ CASE(B);
202
+ CASE(DW);
203
+ }
204
+ #undef CASE
205
+
206
+ return BPF_INS_INVALID;
207
+ }
208
+
209
+ static bpf_insn op2insn_alu(unsigned opcode)
210
+ {
211
+ /* Endian is a special case */
212
+ if (BPF_OP(opcode) == BPF_ALU_END) {
213
+ switch (opcode ^ BPF_CLASS_ALU ^ BPF_ALU_END) {
214
+ case BPF_SRC_LITTLE | (16 << 4):
215
+ return BPF_INS_LE16;
216
+ case BPF_SRC_LITTLE | (32 << 4):
217
+ return BPF_INS_LE32;
218
+ case BPF_SRC_LITTLE | (64 << 4):
219
+ return BPF_INS_LE64;
220
+ case BPF_SRC_BIG | (16 << 4):
221
+ return BPF_INS_BE16;
222
+ case BPF_SRC_BIG | (32 << 4):
223
+ return BPF_INS_BE32;
224
+ case BPF_SRC_BIG | (64 << 4):
225
+ return BPF_INS_BE64;
226
+ }
227
+ return BPF_INS_INVALID;
228
+ }
229
+
230
+ #define CASE(c) case BPF_ALU_##c: \
231
+ if (BPF_CLASS(opcode) == BPF_CLASS_ALU) \
232
+ return BPF_INS_##c; \
233
+ else \
234
+ return BPF_INS_##c##64;
235
+
236
+ switch (BPF_OP(opcode)) {
237
+ CASE(ADD);
238
+ CASE(SUB);
239
+ CASE(MUL);
240
+ CASE(DIV);
241
+ CASE(OR);
242
+ CASE(AND);
243
+ CASE(LSH);
244
+ CASE(RSH);
245
+ CASE(NEG);
246
+ CASE(MOD);
247
+ CASE(XOR);
248
+ CASE(MOV);
249
+ CASE(ARSH);
250
+ }
251
+ #undef CASE
252
+
253
+ return BPF_INS_INVALID;
254
+ }
255
+
256
+ static bpf_insn op2insn_jmp(unsigned opcode)
257
+ {
258
+ if (opcode == (BPF_CLASS_JMP | BPF_JUMP_CALL | BPF_SRC_X)) {
259
+ return BPF_INS_CALLX;
260
+ }
261
+
262
+ #define CASE(c) case BPF_JUMP_##c: return BPF_INS_##c
263
+ switch (BPF_OP(opcode)) {
264
+ case BPF_JUMP_JA:
265
+ return BPF_INS_JMP;
266
+ CASE(JEQ);
267
+ CASE(JGT);
268
+ CASE(JGE);
269
+ CASE(JSET);
270
+ CASE(JNE);
271
+ CASE(JSGT);
272
+ CASE(JSGE);
273
+ CASE(CALL);
274
+ CASE(EXIT);
275
+ CASE(JLT);
276
+ CASE(JLE);
277
+ CASE(JSLT);
278
+ CASE(JSLE);
279
+ }
280
+ #undef CASE
281
+
282
+ return BPF_INS_INVALID;
283
+ }
284
+
285
+ static void update_regs_access(cs_struct *ud, cs_detail *detail,
286
+ bpf_insn insn_id, unsigned int opcode)
287
+ {
288
+ if (insn_id == BPF_INS_INVALID)
289
+ return;
290
+ #define PUSH_READ(r) do { \
291
+ detail->regs_read[detail->regs_read_count] = r; \
292
+ detail->regs_read_count++; \
293
+ } while (0)
294
+ #define PUSH_WRITE(r) do { \
295
+ detail->regs_write[detail->regs_write_count] = r; \
296
+ detail->regs_write_count++; \
297
+ } while (0)
298
+ /*
299
+ * In eBPF mode, only these instructions have implicit registers access:
300
+ * - legacy ld{w,h,b,dw} * // w: r0
301
+ * - exit // r: r0
302
+ */
303
+ if (EBPF_MODE(ud)) {
304
+ switch (insn_id) {
305
+ default:
306
+ break;
307
+ case BPF_INS_LDW:
308
+ case BPF_INS_LDH:
309
+ case BPF_INS_LDB:
310
+ case BPF_INS_LDDW:
311
+ if (BPF_MODE(opcode) == BPF_MODE_ABS || BPF_MODE(opcode) == BPF_MODE_IND) {
312
+ PUSH_WRITE(BPF_REG_R0);
313
+ }
314
+ break;
315
+ case BPF_INS_EXIT:
316
+ PUSH_READ(BPF_REG_R0);
317
+ break;
318
+ }
319
+ return;
320
+ }
321
+
322
+ /* cBPF mode */
323
+ switch (BPF_CLASS(opcode)) {
324
+ default:
325
+ break;
326
+ case BPF_CLASS_LD:
327
+ PUSH_WRITE(BPF_REG_A);
328
+ break;
329
+ case BPF_CLASS_LDX:
330
+ PUSH_WRITE(BPF_REG_X);
331
+ break;
332
+ case BPF_CLASS_ST:
333
+ PUSH_READ(BPF_REG_A);
334
+ break;
335
+ case BPF_CLASS_STX:
336
+ PUSH_READ(BPF_REG_X);
337
+ break;
338
+ case BPF_CLASS_ALU:
339
+ PUSH_READ(BPF_REG_A);
340
+ PUSH_WRITE(BPF_REG_A);
341
+ break;
342
+ case BPF_CLASS_JMP:
343
+ if (insn_id != BPF_INS_JMP) // except the unconditional jump
344
+ PUSH_READ(BPF_REG_A);
345
+ break;
346
+ /* case BPF_CLASS_RET: */
347
+ case BPF_CLASS_MISC:
348
+ if (insn_id == BPF_INS_TAX) {
349
+ PUSH_READ(BPF_REG_A);
350
+ PUSH_WRITE(BPF_REG_X);
351
+ }
352
+ else {
353
+ PUSH_READ(BPF_REG_X);
354
+ PUSH_WRITE(BPF_REG_A);
355
+ }
356
+ break;
357
+ }
358
+ }
359
+
360
+ /*
361
+ * 1. Convert opcode(id) to BPF_INS_*
362
+ * 2. Set regs_read/regs_write/groups
363
+ */
364
+ void BPF_get_insn_id(cs_struct *ud, cs_insn *insn, unsigned int opcode)
365
+ {
366
+ // No need to care the mode (cBPF or eBPF) since all checks has be done in
367
+ // BPF_getInstruction, we can simply map opcode to BPF_INS_*.
368
+ cs_detail *detail;
369
+ bpf_insn id = BPF_INS_INVALID;
370
+ bpf_insn_group grp;
371
+
372
+ detail = insn->detail;
373
+ #ifndef CAPSTONE_DIET
374
+ #define PUSH_GROUP(grp) do { \
375
+ if (detail) { \
376
+ detail->groups[detail->groups_count] = grp; \
377
+ detail->groups_count++; \
378
+ } \
379
+ } while(0)
380
+ #else
381
+ #define PUSH_GROUP
382
+ #endif
383
+
384
+ switch (BPF_CLASS(opcode)) {
385
+ default: // will never happen
386
+ break;
387
+ case BPF_CLASS_LD:
388
+ case BPF_CLASS_LDX:
389
+ id = op2insn_ld(opcode);
390
+ PUSH_GROUP(BPF_GRP_LOAD);
391
+ break;
392
+ case BPF_CLASS_ST:
393
+ case BPF_CLASS_STX:
394
+ id = op2insn_st(opcode);
395
+ PUSH_GROUP(BPF_GRP_STORE);
396
+ break;
397
+ case BPF_CLASS_ALU:
398
+ id = op2insn_alu(opcode);
399
+ PUSH_GROUP(BPF_GRP_ALU);
400
+ break;
401
+ case BPF_CLASS_JMP:
402
+ grp = BPF_GRP_JUMP;
403
+ id = op2insn_jmp(opcode);
404
+ if (id == BPF_INS_CALL || id == BPF_INS_CALLX)
405
+ grp = BPF_GRP_CALL;
406
+ else if (id == BPF_INS_EXIT)
407
+ grp = BPF_GRP_RETURN;
408
+ PUSH_GROUP(grp);
409
+ break;
410
+ case BPF_CLASS_RET:
411
+ id = BPF_INS_RET;
412
+ PUSH_GROUP(BPF_GRP_RETURN);
413
+ break;
414
+ // BPF_CLASS_MISC and BPF_CLASS_ALU64 have exactly same value
415
+ case BPF_CLASS_MISC:
416
+ /* case BPF_CLASS_ALU64: */
417
+ if (EBPF_MODE(ud)) {
418
+ // ALU64 in eBPF
419
+ id = op2insn_alu(opcode);
420
+ PUSH_GROUP(BPF_GRP_ALU);
421
+ }
422
+ else {
423
+ if (BPF_MISCOP(opcode) == BPF_MISCOP_TXA)
424
+ id = BPF_INS_TXA;
425
+ else
426
+ id = BPF_INS_TAX;
427
+ PUSH_GROUP(BPF_GRP_MISC);
428
+ }
429
+ break;
430
+ }
431
+
432
+ insn->id = id;
433
+ #undef PUSH_GROUP
434
+
435
+ #ifndef CAPSTONE_DIET
436
+ if (detail) {
437
+ update_regs_access(ud, detail, id, opcode);
438
+ }
439
+ #endif
440
+ }
441
+
442
+ static void sort_and_uniq(cs_regs arr, uint8_t n, uint8_t *new_n)
443
+ {
444
+ /* arr is always a tiny (usually n < 3) array,
445
+ * a simple O(n^2) sort is efficient enough. */
446
+ int i;
447
+ int j;
448
+ int iMin;
449
+ int tmp;
450
+
451
+ /* a modified selection sort for sorting and making unique */
452
+ for (j = 0; j < n; j++) {
453
+ /* arr[iMin] will be min(arr[j .. n-1]) */
454
+ iMin = j;
455
+ for (i = j + 1; i < n; i++) {
456
+ if (arr[i] < arr[iMin])
457
+ iMin = i;
458
+ }
459
+ if (j != 0 && arr[iMin] == arr[j - 1]) { // duplicate ele found
460
+ arr[iMin] = arr[n - 1];
461
+ --n;
462
+ }
463
+ else {
464
+ tmp = arr[iMin];
465
+ arr[iMin] = arr[j];
466
+ arr[j] = tmp;
467
+ }
468
+ }
469
+
470
+ *new_n = n;
471
+ }
472
+ void BPF_reg_access(const cs_insn *insn,
473
+ cs_regs regs_read, uint8_t *regs_read_count,
474
+ cs_regs regs_write, uint8_t *regs_write_count)
475
+ {
476
+ unsigned i;
477
+ uint8_t read_count, write_count;
478
+ const cs_bpf *bpf = &(insn->detail->bpf);
479
+
480
+ read_count = insn->detail->regs_read_count;
481
+ write_count = insn->detail->regs_write_count;
482
+
483
+ // implicit registers
484
+ memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0]));
485
+ memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0]));
486
+
487
+ for (i = 0; i < bpf->op_count; i++) {
488
+ const cs_bpf_op *op = &(bpf->operands[i]);
489
+ switch (op->type) {
490
+ default:
491
+ break;
492
+ case BPF_OP_REG:
493
+ if (op->access & CS_AC_READ) {
494
+ regs_read[read_count] = op->reg;
495
+ read_count++;
496
+ }
497
+ if (op->access & CS_AC_WRITE) {
498
+ regs_write[write_count] = op->reg;
499
+ write_count++;
500
+ }
501
+ break;
502
+ case BPF_OP_MEM:
503
+ if (op->mem.base != BPF_REG_INVALID) {
504
+ regs_read[read_count] = op->mem.base;
505
+ read_count++;
506
+ }
507
+ break;
508
+ }
509
+ }
510
+
511
+ sort_and_uniq(regs_read, read_count, regs_read_count);
512
+ sort_and_uniq(regs_write, write_count, regs_write_count);
513
+ }
@@ -0,0 +1,21 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* BPF Backend by david942j <david942j@gmail.com>, 2019 */
3
+
4
+ #ifndef CS_BPFMAPPING_H
5
+ #define CS_BPFMAPPING_H
6
+
7
+ #include <capstone/capstone.h>
8
+
9
+ #include "../../cs_priv.h"
10
+
11
+ #define EBPF_MODE(ud) (((cs_struct*)ud)->mode & CS_MODE_BPF_EXTENDED)
12
+
13
+ const char *BPF_group_name(csh handle, unsigned int id);
14
+ const char *BPF_insn_name(csh handle, unsigned int id);
15
+ const char *BPF_reg_name(csh handle, unsigned int reg);
16
+ void BPF_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id);
17
+ void BPF_reg_access(const cs_insn *insn,
18
+ cs_regs regs_read, uint8_t *regs_read_count,
19
+ cs_regs regs_write, uint8_t *regs_write_count);
20
+
21
+ #endif
@@ -0,0 +1,34 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* BPF Backend by david942j <david942j@gmail.com>, 2019 */
3
+
4
+ #ifdef CAPSTONE_HAS_BPF
5
+
6
+ #include "BPFDisassembler.h"
7
+ #include "BPFInstPrinter.h"
8
+ #include "BPFMapping.h"
9
+ #include "BPFModule.h"
10
+
11
+ cs_err BPF_global_init(cs_struct *ud)
12
+ {
13
+ ud->printer = BPF_printInst;
14
+ ud->reg_name = BPF_reg_name;
15
+ ud->insn_id = BPF_get_insn_id;
16
+ ud->insn_name = BPF_insn_name;
17
+ ud->group_name = BPF_group_name;
18
+ #ifndef CAPSTONE_DIET
19
+ ud->reg_access = BPF_reg_access;
20
+ #endif
21
+ ud->disasm = BPF_getInstruction;
22
+
23
+ return CS_ERR_OK;
24
+ }
25
+
26
+ cs_err BPF_option(cs_struct *handle, cs_opt_type type, size_t value)
27
+ {
28
+ if (type == CS_OPT_MODE)
29
+ handle->mode = (cs_mode)value;
30
+
31
+ return CS_ERR_OK;
32
+ }
33
+
34
+ #endif
@@ -0,0 +1,12 @@
1
+ /* Capstone Disassembly Engine */
2
+ /* BPF Backend by david942j <david942j@gmail.com>, 2019 */
3
+
4
+ #ifndef CS_BPF_MODULE_H
5
+ #define CS_BPF_MODULE_H
6
+
7
+ #include "../../utils.h"
8
+
9
+ cs_err BPF_global_init(cs_struct *ud);
10
+ cs_err BPF_option(cs_struct *handle, cs_opt_type type, size_t value);
11
+
12
+ #endif