hexcore-capstone 1.2.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/LICENSE +26 -0
- package/README.md +191 -0
- package/binding.gyp +168 -0
- package/deps/capstone/LEB128.h +38 -0
- package/deps/capstone/MCDisassembler.h +14 -0
- package/deps/capstone/MCFixedLenDisassembler.h +32 -0
- package/deps/capstone/MCInst.c +270 -0
- package/deps/capstone/MCInst.h +165 -0
- package/deps/capstone/MCInstrDesc.c +41 -0
- package/deps/capstone/MCInstrDesc.h +167 -0
- package/deps/capstone/MCRegisterInfo.c +151 -0
- package/deps/capstone/MCRegisterInfo.h +116 -0
- package/deps/capstone/Mapping.c +254 -0
- package/deps/capstone/Mapping.h +174 -0
- package/deps/capstone/MathExtras.h +442 -0
- package/deps/capstone/SStream.c +181 -0
- package/deps/capstone/SStream.h +40 -0
- package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
- package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
- package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
- package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
- package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
- package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
- package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
- package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
- package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
- package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
- package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
- package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
- package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
- package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
- package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
- package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
- package/deps/capstone/arch/ARM/ARMModule.c +63 -0
- package/deps/capstone/arch/ARM/ARMModule.h +12 -0
- package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
- package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
- package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
- package/deps/capstone/arch/BPF/BPFModule.c +34 -0
- package/deps/capstone/arch/BPF/BPFModule.h +12 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
- package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
- package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
- package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
- package/deps/capstone/arch/EVM/EVMModule.c +33 -0
- package/deps/capstone/arch/EVM/EVMModule.h +12 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
- package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
- package/deps/capstone/arch/M680X/M680XModule.c +77 -0
- package/deps/capstone/arch/M680X/M680XModule.h +12 -0
- package/deps/capstone/arch/M680X/cpu12.inc +335 -0
- package/deps/capstone/arch/M680X/hcs08.inc +60 -0
- package/deps/capstone/arch/M680X/hd6301.inc +15 -0
- package/deps/capstone/arch/M680X/hd6309.inc +259 -0
- package/deps/capstone/arch/M680X/insn_props.inc +367 -0
- package/deps/capstone/arch/M680X/m6800.inc +277 -0
- package/deps/capstone/arch/M680X/m6801.inc +39 -0
- package/deps/capstone/arch/M680X/m6805.inc +277 -0
- package/deps/capstone/arch/M680X/m6808.inc +91 -0
- package/deps/capstone/arch/M680X/m6809.inc +352 -0
- package/deps/capstone/arch/M680X/m6811.inc +105 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
- package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
- package/deps/capstone/arch/M68K/M68KModule.c +42 -0
- package/deps/capstone/arch/M68K/M68KModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
- package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
- package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
- package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
- package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
- package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
- package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
- package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
- package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
- package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
- package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
- package/deps/capstone/arch/Mips/MipsModule.c +52 -0
- package/deps/capstone/arch/Mips/MipsModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
- package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
- package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
- package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
- package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
- package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
- package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
- package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
- package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
- package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
- package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
- package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
- package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
- package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
- package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
- package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
- package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
- package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
- package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
- package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
- package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
- package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
- package/deps/capstone/arch/SH/SHModule.c +39 -0
- package/deps/capstone/arch/SH/SHModule.h +12 -0
- package/deps/capstone/arch/SH/mktable.rb +390 -0
- package/deps/capstone/arch/Sparc/Sparc.h +63 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
- package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
- package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
- package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
- package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
- package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
- package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
- package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
- package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
- package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
- package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
- package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
- package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
- package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
- package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
- package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
- package/deps/capstone/arch/TriCore/TriCore.td +134 -0
- package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
- package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
- package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
- package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
- package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
- package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
- package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
- package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
- package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
- package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
- package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
- package/deps/capstone/arch/WASM/WASMModule.c +33 -0
- package/deps/capstone/arch/WASM/WASMModule.h +12 -0
- package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
- package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
- package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
- package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
- package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
- package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
- package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
- package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
- package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
- package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
- package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
- package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
- package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
- package/deps/capstone/arch/X86/X86Mapping.h +96 -0
- package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
- package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
- package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
- package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
- package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
- package/deps/capstone/arch/X86/X86Module.c +94 -0
- package/deps/capstone/arch/X86/X86Module.h +12 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
- package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
- package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
- package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
- package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
- package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
- package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
- package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
- package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
- package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
- package/deps/capstone/cs.c +1664 -0
- package/deps/capstone/cs_priv.h +101 -0
- package/deps/capstone/cs_simple_types.h +886 -0
- package/deps/capstone/include/capstone/arm.h +991 -0
- package/deps/capstone/include/capstone/arm64.h +3159 -0
- package/deps/capstone/include/capstone/bpf.h +209 -0
- package/deps/capstone/include/capstone/capstone.h +875 -0
- package/deps/capstone/include/capstone/evm.h +188 -0
- package/deps/capstone/include/capstone/m680x.h +537 -0
- package/deps/capstone/include/capstone/m68k.h +613 -0
- package/deps/capstone/include/capstone/mips.h +956 -0
- package/deps/capstone/include/capstone/mos65xx.h +204 -0
- package/deps/capstone/include/capstone/platform.h +122 -0
- package/deps/capstone/include/capstone/ppc.h +2108 -0
- package/deps/capstone/include/capstone/riscv.h +531 -0
- package/deps/capstone/include/capstone/sh.h +465 -0
- package/deps/capstone/include/capstone/sparc.h +520 -0
- package/deps/capstone/include/capstone/systemz.h +2601 -0
- package/deps/capstone/include/capstone/tms320c64x.h +359 -0
- package/deps/capstone/include/capstone/tricore.h +567 -0
- package/deps/capstone/include/capstone/wasm.h +250 -0
- package/deps/capstone/include/capstone/x86.h +1986 -0
- package/deps/capstone/include/capstone/xcore.h +235 -0
- package/deps/capstone/include/platform.h +110 -0
- package/deps/capstone/include/windowsce/intrin.h +12 -0
- package/deps/capstone/include/windowsce/stdint.h +133 -0
- package/deps/capstone/utils.c +140 -0
- package/deps/capstone/utils.h +54 -0
- package/index.d.ts +448 -0
- package/index.js +64 -0
- package/index.mjs +25 -0
- package/package.json +82 -0
- package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
- package/src/capstone_wrapper.cpp +910 -0
- package/src/capstone_wrapper.h +147 -0
- package/src/disasm_async_worker.h +215 -0
- package/src/main.cpp +145 -0
|
@@ -0,0 +1,1776 @@
|
|
|
1
|
+
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|
|
2
|
+
|* *|
|
|
3
|
+
|* * RISCV Disassembler *|
|
|
4
|
+
|* *|
|
|
5
|
+
|* Automatically generated file, do not edit! *|
|
|
6
|
+
|* *|
|
|
7
|
+
\*===----------------------------------------------------------------------===*/
|
|
8
|
+
|
|
9
|
+
/* Capstone Disassembly Engine */
|
|
10
|
+
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
|
|
11
|
+
|
|
12
|
+
#include "../../MCInst.h"
|
|
13
|
+
#include "../../LEB128.h"
|
|
14
|
+
#include "../../cs_priv.h"
|
|
15
|
+
|
|
16
|
+
// Helper functions for extracting fields from encoded instructions.
|
|
17
|
+
// InsnType must either be integral or an APInt-like object that must:
|
|
18
|
+
// * Have a static const max_size_in_bits equal to the number of bits in the
|
|
19
|
+
// encoding.
|
|
20
|
+
// * be default-constructible and copy-constructible
|
|
21
|
+
// * be constructible from a uint64_t
|
|
22
|
+
// * be constructible from an APInt (this can be private)
|
|
23
|
+
// * Support getBitsSet(loBit, hiBit)
|
|
24
|
+
// * be convertible to uint64_t
|
|
25
|
+
// * Support the ~, &, ==, !=, and |= operators with other objects of the same type
|
|
26
|
+
// * Support shift (<<, >>) with signed and unsigned integers on the RHS
|
|
27
|
+
// * Support put (<<) to raw_ostream&
|
|
28
|
+
#define FieldFromInstruction(fname, InsnType) \
|
|
29
|
+
static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
|
|
30
|
+
{ \
|
|
31
|
+
InsnType fieldMask; \
|
|
32
|
+
if (numBits == sizeof(InsnType)*8) \
|
|
33
|
+
fieldMask = (InsnType)(-1LL); \
|
|
34
|
+
else \
|
|
35
|
+
fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
|
|
36
|
+
return (insn & fieldMask) >> startBit; \
|
|
37
|
+
}
|
|
38
|
+
|
|
39
|
+
static const uint8_t DecoderTable16[] = {
|
|
40
|
+
/* 0 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
|
|
41
|
+
/* 3 */ MCD_OPC_FilterValue, 0, 77, 0, 0, // Skip to: 85
|
|
42
|
+
/* 8 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
43
|
+
/* 11 */ MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 41
|
|
44
|
+
/* 16 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 32
|
|
45
|
+
/* 21 */ MCD_OPC_CheckField, 2, 11, 0, 4, 0, 0, // Skip to: 32
|
|
46
|
+
/* 28 */ MCD_OPC_Decode, 182, 2, 0, // Opcode: C_UNIMP
|
|
47
|
+
/* 32 */ MCD_OPC_CheckPredicate, 0, 116, 2, 0, // Skip to: 665
|
|
48
|
+
/* 37 */ MCD_OPC_Decode, 144, 2, 1, // Opcode: C_ADDI4SPN
|
|
49
|
+
/* 41 */ MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 71
|
|
50
|
+
/* 46 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 62
|
|
51
|
+
/* 51 */ MCD_OPC_CheckField, 7, 6, 0, 4, 0, 0, // Skip to: 62
|
|
52
|
+
/* 58 */ MCD_OPC_Decode, 171, 2, 0, // Opcode: C_NOP
|
|
53
|
+
/* 62 */ MCD_OPC_CheckPredicate, 0, 86, 2, 0, // Skip to: 665
|
|
54
|
+
/* 67 */ MCD_OPC_Decode, 142, 2, 2, // Opcode: C_ADDI
|
|
55
|
+
/* 71 */ MCD_OPC_FilterValue, 2, 77, 2, 0, // Skip to: 665
|
|
56
|
+
/* 76 */ MCD_OPC_CheckPredicate, 0, 72, 2, 0, // Skip to: 665
|
|
57
|
+
/* 81 */ MCD_OPC_Decode, 175, 2, 3, // Opcode: C_SLLI
|
|
58
|
+
/* 85 */ MCD_OPC_FilterValue, 1, 45, 0, 0, // Skip to: 135
|
|
59
|
+
/* 90 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
60
|
+
/* 93 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 107
|
|
61
|
+
/* 98 */ MCD_OPC_CheckPredicate, 1, 50, 2, 0, // Skip to: 665
|
|
62
|
+
/* 103 */ MCD_OPC_Decode, 152, 2, 4, // Opcode: C_FLD
|
|
63
|
+
/* 107 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 121
|
|
64
|
+
/* 112 */ MCD_OPC_CheckPredicate, 2, 36, 2, 0, // Skip to: 665
|
|
65
|
+
/* 117 */ MCD_OPC_Decode, 145, 2, 2, // Opcode: C_ADDIW
|
|
66
|
+
/* 121 */ MCD_OPC_FilterValue, 2, 27, 2, 0, // Skip to: 665
|
|
67
|
+
/* 126 */ MCD_OPC_CheckPredicate, 1, 22, 2, 0, // Skip to: 665
|
|
68
|
+
/* 131 */ MCD_OPC_Decode, 153, 2, 5, // Opcode: C_FLDSP
|
|
69
|
+
/* 135 */ MCD_OPC_FilterValue, 2, 45, 0, 0, // Skip to: 185
|
|
70
|
+
/* 140 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
71
|
+
/* 143 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 157
|
|
72
|
+
/* 148 */ MCD_OPC_CheckPredicate, 0, 0, 2, 0, // Skip to: 665
|
|
73
|
+
/* 153 */ MCD_OPC_Decode, 168, 2, 6, // Opcode: C_LW
|
|
74
|
+
/* 157 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 171
|
|
75
|
+
/* 162 */ MCD_OPC_CheckPredicate, 0, 242, 1, 0, // Skip to: 665
|
|
76
|
+
/* 167 */ MCD_OPC_Decode, 166, 2, 7, // Opcode: C_LI
|
|
77
|
+
/* 171 */ MCD_OPC_FilterValue, 2, 233, 1, 0, // Skip to: 665
|
|
78
|
+
/* 176 */ MCD_OPC_CheckPredicate, 0, 228, 1, 0, // Skip to: 665
|
|
79
|
+
/* 181 */ MCD_OPC_Decode, 169, 2, 8, // Opcode: C_LWSP
|
|
80
|
+
/* 185 */ MCD_OPC_FilterValue, 3, 61, 0, 0, // Skip to: 251
|
|
81
|
+
/* 190 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
82
|
+
/* 193 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 207
|
|
83
|
+
/* 198 */ MCD_OPC_CheckPredicate, 2, 206, 1, 0, // Skip to: 665
|
|
84
|
+
/* 203 */ MCD_OPC_Decode, 164, 2, 9, // Opcode: C_LD
|
|
85
|
+
/* 207 */ MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 237
|
|
86
|
+
/* 212 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 228
|
|
87
|
+
/* 217 */ MCD_OPC_CheckField, 7, 5, 2, 4, 0, 0, // Skip to: 228
|
|
88
|
+
/* 224 */ MCD_OPC_Decode, 143, 2, 10, // Opcode: C_ADDI16SP
|
|
89
|
+
/* 228 */ MCD_OPC_CheckPredicate, 0, 176, 1, 0, // Skip to: 665
|
|
90
|
+
/* 233 */ MCD_OPC_Decode, 167, 2, 11, // Opcode: C_LUI
|
|
91
|
+
/* 237 */ MCD_OPC_FilterValue, 2, 167, 1, 0, // Skip to: 665
|
|
92
|
+
/* 242 */ MCD_OPC_CheckPredicate, 2, 162, 1, 0, // Skip to: 665
|
|
93
|
+
/* 247 */ MCD_OPC_Decode, 165, 2, 12, // Opcode: C_LDSP
|
|
94
|
+
/* 251 */ MCD_OPC_FilterValue, 4, 3, 1, 0, // Skip to: 515
|
|
95
|
+
/* 256 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
96
|
+
/* 259 */ MCD_OPC_FilterValue, 1, 167, 0, 0, // Skip to: 431
|
|
97
|
+
/* 264 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
|
|
98
|
+
/* 267 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 281
|
|
99
|
+
/* 272 */ MCD_OPC_CheckPredicate, 0, 132, 1, 0, // Skip to: 665
|
|
100
|
+
/* 277 */ MCD_OPC_Decode, 177, 2, 13, // Opcode: C_SRLI
|
|
101
|
+
/* 281 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 295
|
|
102
|
+
/* 286 */ MCD_OPC_CheckPredicate, 0, 118, 1, 0, // Skip to: 665
|
|
103
|
+
/* 291 */ MCD_OPC_Decode, 176, 2, 13, // Opcode: C_SRAI
|
|
104
|
+
/* 295 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 309
|
|
105
|
+
/* 300 */ MCD_OPC_CheckPredicate, 0, 104, 1, 0, // Skip to: 665
|
|
106
|
+
/* 305 */ MCD_OPC_Decode, 148, 2, 14, // Opcode: C_ANDI
|
|
107
|
+
/* 309 */ MCD_OPC_FilterValue, 3, 95, 1, 0, // Skip to: 665
|
|
108
|
+
/* 314 */ MCD_OPC_ExtractField, 5, 2, // Inst{6-5} ...
|
|
109
|
+
/* 317 */ MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 353
|
|
110
|
+
/* 322 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
|
|
111
|
+
/* 325 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 339
|
|
112
|
+
/* 330 */ MCD_OPC_CheckPredicate, 0, 74, 1, 0, // Skip to: 665
|
|
113
|
+
/* 335 */ MCD_OPC_Decode, 178, 2, 15, // Opcode: C_SUB
|
|
114
|
+
/* 339 */ MCD_OPC_FilterValue, 1, 65, 1, 0, // Skip to: 665
|
|
115
|
+
/* 344 */ MCD_OPC_CheckPredicate, 2, 60, 1, 0, // Skip to: 665
|
|
116
|
+
/* 349 */ MCD_OPC_Decode, 179, 2, 15, // Opcode: C_SUBW
|
|
117
|
+
/* 353 */ MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 389
|
|
118
|
+
/* 358 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
|
|
119
|
+
/* 361 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 375
|
|
120
|
+
/* 366 */ MCD_OPC_CheckPredicate, 0, 38, 1, 0, // Skip to: 665
|
|
121
|
+
/* 371 */ MCD_OPC_Decode, 183, 2, 15, // Opcode: C_XOR
|
|
122
|
+
/* 375 */ MCD_OPC_FilterValue, 1, 29, 1, 0, // Skip to: 665
|
|
123
|
+
/* 380 */ MCD_OPC_CheckPredicate, 2, 24, 1, 0, // Skip to: 665
|
|
124
|
+
/* 385 */ MCD_OPC_Decode, 146, 2, 15, // Opcode: C_ADDW
|
|
125
|
+
/* 389 */ MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 410
|
|
126
|
+
/* 394 */ MCD_OPC_CheckPredicate, 0, 10, 1, 0, // Skip to: 665
|
|
127
|
+
/* 399 */ MCD_OPC_CheckField, 12, 1, 0, 3, 1, 0, // Skip to: 665
|
|
128
|
+
/* 406 */ MCD_OPC_Decode, 172, 2, 15, // Opcode: C_OR
|
|
129
|
+
/* 410 */ MCD_OPC_FilterValue, 3, 250, 0, 0, // Skip to: 665
|
|
130
|
+
/* 415 */ MCD_OPC_CheckPredicate, 0, 245, 0, 0, // Skip to: 665
|
|
131
|
+
/* 420 */ MCD_OPC_CheckField, 12, 1, 0, 238, 0, 0, // Skip to: 665
|
|
132
|
+
/* 427 */ MCD_OPC_Decode, 147, 2, 15, // Opcode: C_AND
|
|
133
|
+
/* 431 */ MCD_OPC_FilterValue, 2, 229, 0, 0, // Skip to: 665
|
|
134
|
+
/* 436 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
|
|
135
|
+
/* 439 */ MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 469
|
|
136
|
+
/* 444 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 460
|
|
137
|
+
/* 449 */ MCD_OPC_CheckField, 2, 5, 0, 4, 0, 0, // Skip to: 460
|
|
138
|
+
/* 456 */ MCD_OPC_Decode, 163, 2, 16, // Opcode: C_JR
|
|
139
|
+
/* 460 */ MCD_OPC_CheckPredicate, 0, 200, 0, 0, // Skip to: 665
|
|
140
|
+
/* 465 */ MCD_OPC_Decode, 170, 2, 17, // Opcode: C_MV
|
|
141
|
+
/* 469 */ MCD_OPC_FilterValue, 1, 191, 0, 0, // Skip to: 665
|
|
142
|
+
/* 474 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 490
|
|
143
|
+
/* 479 */ MCD_OPC_CheckField, 2, 10, 0, 4, 0, 0, // Skip to: 490
|
|
144
|
+
/* 486 */ MCD_OPC_Decode, 151, 2, 0, // Opcode: C_EBREAK
|
|
145
|
+
/* 490 */ MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 506
|
|
146
|
+
/* 495 */ MCD_OPC_CheckField, 2, 5, 0, 4, 0, 0, // Skip to: 506
|
|
147
|
+
/* 502 */ MCD_OPC_Decode, 162, 2, 16, // Opcode: C_JALR
|
|
148
|
+
/* 506 */ MCD_OPC_CheckPredicate, 0, 154, 0, 0, // Skip to: 665
|
|
149
|
+
/* 511 */ MCD_OPC_Decode, 141, 2, 18, // Opcode: C_ADD
|
|
150
|
+
/* 515 */ MCD_OPC_FilterValue, 5, 45, 0, 0, // Skip to: 565
|
|
151
|
+
/* 520 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
152
|
+
/* 523 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 537
|
|
153
|
+
/* 528 */ MCD_OPC_CheckPredicate, 1, 132, 0, 0, // Skip to: 665
|
|
154
|
+
/* 533 */ MCD_OPC_Decode, 156, 2, 4, // Opcode: C_FSD
|
|
155
|
+
/* 537 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 551
|
|
156
|
+
/* 542 */ MCD_OPC_CheckPredicate, 0, 118, 0, 0, // Skip to: 665
|
|
157
|
+
/* 547 */ MCD_OPC_Decode, 160, 2, 19, // Opcode: C_J
|
|
158
|
+
/* 551 */ MCD_OPC_FilterValue, 2, 109, 0, 0, // Skip to: 665
|
|
159
|
+
/* 556 */ MCD_OPC_CheckPredicate, 1, 104, 0, 0, // Skip to: 665
|
|
160
|
+
/* 561 */ MCD_OPC_Decode, 157, 2, 20, // Opcode: C_FSDSP
|
|
161
|
+
/* 565 */ MCD_OPC_FilterValue, 6, 45, 0, 0, // Skip to: 615
|
|
162
|
+
/* 570 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
163
|
+
/* 573 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 587
|
|
164
|
+
/* 578 */ MCD_OPC_CheckPredicate, 0, 82, 0, 0, // Skip to: 665
|
|
165
|
+
/* 583 */ MCD_OPC_Decode, 180, 2, 6, // Opcode: C_SW
|
|
166
|
+
/* 587 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 601
|
|
167
|
+
/* 592 */ MCD_OPC_CheckPredicate, 0, 68, 0, 0, // Skip to: 665
|
|
168
|
+
/* 597 */ MCD_OPC_Decode, 149, 2, 21, // Opcode: C_BEQZ
|
|
169
|
+
/* 601 */ MCD_OPC_FilterValue, 2, 59, 0, 0, // Skip to: 665
|
|
170
|
+
/* 606 */ MCD_OPC_CheckPredicate, 0, 54, 0, 0, // Skip to: 665
|
|
171
|
+
/* 611 */ MCD_OPC_Decode, 181, 2, 22, // Opcode: C_SWSP
|
|
172
|
+
/* 615 */ MCD_OPC_FilterValue, 7, 45, 0, 0, // Skip to: 665
|
|
173
|
+
/* 620 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
174
|
+
/* 623 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 637
|
|
175
|
+
/* 628 */ MCD_OPC_CheckPredicate, 2, 32, 0, 0, // Skip to: 665
|
|
176
|
+
/* 633 */ MCD_OPC_Decode, 173, 2, 9, // Opcode: C_SD
|
|
177
|
+
/* 637 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 651
|
|
178
|
+
/* 642 */ MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 665
|
|
179
|
+
/* 647 */ MCD_OPC_Decode, 150, 2, 21, // Opcode: C_BNEZ
|
|
180
|
+
/* 651 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 665
|
|
181
|
+
/* 656 */ MCD_OPC_CheckPredicate, 2, 4, 0, 0, // Skip to: 665
|
|
182
|
+
/* 661 */ MCD_OPC_Decode, 174, 2, 23, // Opcode: C_SDSP
|
|
183
|
+
/* 665 */ MCD_OPC_Fail,
|
|
184
|
+
0
|
|
185
|
+
};
|
|
186
|
+
|
|
187
|
+
static const uint8_t DecoderTable32[] = {
|
|
188
|
+
/* 0 */ MCD_OPC_ExtractField, 0, 7, // Inst{6-0} ...
|
|
189
|
+
/* 3 */ MCD_OPC_FilterValue, 3, 76, 0, 0, // Skip to: 84
|
|
190
|
+
/* 8 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
191
|
+
/* 11 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 20
|
|
192
|
+
/* 16 */ MCD_OPC_Decode, 129, 3, 24, // Opcode: LB
|
|
193
|
+
/* 20 */ MCD_OPC_FilterValue, 1, 4, 0, 0, // Skip to: 29
|
|
194
|
+
/* 25 */ MCD_OPC_Decode, 132, 3, 24, // Opcode: LH
|
|
195
|
+
/* 29 */ MCD_OPC_FilterValue, 2, 4, 0, 0, // Skip to: 38
|
|
196
|
+
/* 34 */ MCD_OPC_Decode, 143, 3, 24, // Opcode: LW
|
|
197
|
+
/* 38 */ MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 52
|
|
198
|
+
/* 43 */ MCD_OPC_CheckPredicate, 3, 55, 15, 0, // Skip to: 3943
|
|
199
|
+
/* 48 */ MCD_OPC_Decode, 131, 3, 24, // Opcode: LD
|
|
200
|
+
/* 52 */ MCD_OPC_FilterValue, 4, 4, 0, 0, // Skip to: 61
|
|
201
|
+
/* 57 */ MCD_OPC_Decode, 130, 3, 24, // Opcode: LBU
|
|
202
|
+
/* 61 */ MCD_OPC_FilterValue, 5, 4, 0, 0, // Skip to: 70
|
|
203
|
+
/* 66 */ MCD_OPC_Decode, 133, 3, 24, // Opcode: LHU
|
|
204
|
+
/* 70 */ MCD_OPC_FilterValue, 6, 28, 15, 0, // Skip to: 3943
|
|
205
|
+
/* 75 */ MCD_OPC_CheckPredicate, 3, 23, 15, 0, // Skip to: 3943
|
|
206
|
+
/* 80 */ MCD_OPC_Decode, 144, 3, 24, // Opcode: LWU
|
|
207
|
+
/* 84 */ MCD_OPC_FilterValue, 7, 31, 0, 0, // Skip to: 120
|
|
208
|
+
/* 89 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
209
|
+
/* 92 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 106
|
|
210
|
+
/* 97 */ MCD_OPC_CheckPredicate, 4, 1, 15, 0, // Skip to: 3943
|
|
211
|
+
/* 102 */ MCD_OPC_Decode, 224, 2, 25, // Opcode: FLW
|
|
212
|
+
/* 106 */ MCD_OPC_FilterValue, 3, 248, 14, 0, // Skip to: 3943
|
|
213
|
+
/* 111 */ MCD_OPC_CheckPredicate, 5, 243, 14, 0, // Skip to: 3943
|
|
214
|
+
/* 116 */ MCD_OPC_Decode, 219, 2, 26, // Opcode: FLD
|
|
215
|
+
/* 120 */ MCD_OPC_FilterValue, 15, 52, 0, 0, // Skip to: 177
|
|
216
|
+
/* 125 */ MCD_OPC_ExtractField, 7, 13, // Inst{19-7} ...
|
|
217
|
+
/* 128 */ MCD_OPC_FilterValue, 0, 28, 0, 0, // Skip to: 161
|
|
218
|
+
/* 133 */ MCD_OPC_ExtractField, 28, 4, // Inst{31-28} ...
|
|
219
|
+
/* 136 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 145
|
|
220
|
+
/* 141 */ MCD_OPC_Decode, 214, 2, 27, // Opcode: FENCE
|
|
221
|
+
/* 145 */ MCD_OPC_FilterValue, 8, 209, 14, 0, // Skip to: 3943
|
|
222
|
+
/* 150 */ MCD_OPC_CheckField, 20, 8, 51, 202, 14, 0, // Skip to: 3943
|
|
223
|
+
/* 157 */ MCD_OPC_Decode, 216, 2, 0, // Opcode: FENCE_TSO
|
|
224
|
+
/* 161 */ MCD_OPC_FilterValue, 32, 193, 14, 0, // Skip to: 3943
|
|
225
|
+
/* 166 */ MCD_OPC_CheckField, 20, 12, 0, 186, 14, 0, // Skip to: 3943
|
|
226
|
+
/* 173 */ MCD_OPC_Decode, 215, 2, 0, // Opcode: FENCE_I
|
|
227
|
+
/* 177 */ MCD_OPC_FilterValue, 19, 99, 0, 0, // Skip to: 281
|
|
228
|
+
/* 182 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
229
|
+
/* 185 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 194
|
|
230
|
+
/* 190 */ MCD_OPC_Decode, 179, 1, 24, // Opcode: ADDI
|
|
231
|
+
/* 194 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 210
|
|
232
|
+
/* 199 */ MCD_OPC_CheckField, 26, 6, 0, 153, 14, 0, // Skip to: 3943
|
|
233
|
+
/* 206 */ MCD_OPC_Decode, 170, 3, 28, // Opcode: SLLI
|
|
234
|
+
/* 210 */ MCD_OPC_FilterValue, 2, 4, 0, 0, // Skip to: 219
|
|
235
|
+
/* 215 */ MCD_OPC_Decode, 174, 3, 24, // Opcode: SLTI
|
|
236
|
+
/* 219 */ MCD_OPC_FilterValue, 3, 4, 0, 0, // Skip to: 228
|
|
237
|
+
/* 224 */ MCD_OPC_Decode, 175, 3, 24, // Opcode: SLTIU
|
|
238
|
+
/* 228 */ MCD_OPC_FilterValue, 4, 4, 0, 0, // Skip to: 237
|
|
239
|
+
/* 233 */ MCD_OPC_Decode, 193, 3, 24, // Opcode: XORI
|
|
240
|
+
/* 237 */ MCD_OPC_FilterValue, 5, 21, 0, 0, // Skip to: 263
|
|
241
|
+
/* 242 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ...
|
|
242
|
+
/* 245 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 254
|
|
243
|
+
/* 250 */ MCD_OPC_Decode, 183, 3, 28, // Opcode: SRLI
|
|
244
|
+
/* 254 */ MCD_OPC_FilterValue, 16, 100, 14, 0, // Skip to: 3943
|
|
245
|
+
/* 259 */ MCD_OPC_Decode, 178, 3, 28, // Opcode: SRAI
|
|
246
|
+
/* 263 */ MCD_OPC_FilterValue, 6, 4, 0, 0, // Skip to: 272
|
|
247
|
+
/* 268 */ MCD_OPC_Decode, 152, 3, 24, // Opcode: ORI
|
|
248
|
+
/* 272 */ MCD_OPC_FilterValue, 7, 82, 14, 0, // Skip to: 3943
|
|
249
|
+
/* 277 */ MCD_OPC_Decode, 255, 1, 24, // Opcode: ANDI
|
|
250
|
+
/* 281 */ MCD_OPC_FilterValue, 23, 4, 0, 0, // Skip to: 290
|
|
251
|
+
/* 286 */ MCD_OPC_Decode, 128, 2, 29, // Opcode: AUIPC
|
|
252
|
+
/* 290 */ MCD_OPC_FilterValue, 27, 74, 0, 0, // Skip to: 369
|
|
253
|
+
/* 295 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
254
|
+
/* 298 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 312
|
|
255
|
+
/* 303 */ MCD_OPC_CheckPredicate, 3, 51, 14, 0, // Skip to: 3943
|
|
256
|
+
/* 308 */ MCD_OPC_Decode, 180, 1, 24, // Opcode: ADDIW
|
|
257
|
+
/* 312 */ MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 333
|
|
258
|
+
/* 317 */ MCD_OPC_CheckPredicate, 3, 37, 14, 0, // Skip to: 3943
|
|
259
|
+
/* 322 */ MCD_OPC_CheckField, 25, 7, 0, 30, 14, 0, // Skip to: 3943
|
|
260
|
+
/* 329 */ MCD_OPC_Decode, 171, 3, 30, // Opcode: SLLIW
|
|
261
|
+
/* 333 */ MCD_OPC_FilterValue, 5, 21, 14, 0, // Skip to: 3943
|
|
262
|
+
/* 338 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
263
|
+
/* 341 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 355
|
|
264
|
+
/* 346 */ MCD_OPC_CheckPredicate, 3, 8, 14, 0, // Skip to: 3943
|
|
265
|
+
/* 351 */ MCD_OPC_Decode, 184, 3, 30, // Opcode: SRLIW
|
|
266
|
+
/* 355 */ MCD_OPC_FilterValue, 32, 255, 13, 0, // Skip to: 3943
|
|
267
|
+
/* 360 */ MCD_OPC_CheckPredicate, 3, 250, 13, 0, // Skip to: 3943
|
|
268
|
+
/* 365 */ MCD_OPC_Decode, 179, 3, 30, // Opcode: SRAIW
|
|
269
|
+
/* 369 */ MCD_OPC_FilterValue, 35, 44, 0, 0, // Skip to: 418
|
|
270
|
+
/* 374 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
271
|
+
/* 377 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 386
|
|
272
|
+
/* 382 */ MCD_OPC_Decode, 157, 3, 31, // Opcode: SB
|
|
273
|
+
/* 386 */ MCD_OPC_FilterValue, 1, 4, 0, 0, // Skip to: 395
|
|
274
|
+
/* 391 */ MCD_OPC_Decode, 168, 3, 31, // Opcode: SH
|
|
275
|
+
/* 395 */ MCD_OPC_FilterValue, 2, 4, 0, 0, // Skip to: 404
|
|
276
|
+
/* 400 */ MCD_OPC_Decode, 188, 3, 31, // Opcode: SW
|
|
277
|
+
/* 404 */ MCD_OPC_FilterValue, 3, 206, 13, 0, // Skip to: 3943
|
|
278
|
+
/* 409 */ MCD_OPC_CheckPredicate, 3, 201, 13, 0, // Skip to: 3943
|
|
279
|
+
/* 414 */ MCD_OPC_Decode, 166, 3, 31, // Opcode: SD
|
|
280
|
+
/* 418 */ MCD_OPC_FilterValue, 39, 31, 0, 0, // Skip to: 454
|
|
281
|
+
/* 423 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
282
|
+
/* 426 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 440
|
|
283
|
+
/* 431 */ MCD_OPC_CheckPredicate, 4, 179, 13, 0, // Skip to: 3943
|
|
284
|
+
/* 436 */ MCD_OPC_Decode, 254, 2, 32, // Opcode: FSW
|
|
285
|
+
/* 440 */ MCD_OPC_FilterValue, 3, 170, 13, 0, // Skip to: 3943
|
|
286
|
+
/* 445 */ MCD_OPC_CheckPredicate, 5, 165, 13, 0, // Skip to: 3943
|
|
287
|
+
/* 450 */ MCD_OPC_Decode, 243, 2, 33, // Opcode: FSD
|
|
288
|
+
/* 454 */ MCD_OPC_FilterValue, 47, 107, 6, 0, // Skip to: 2102
|
|
289
|
+
/* 459 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
290
|
+
/* 462 */ MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 498
|
|
291
|
+
/* 467 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
292
|
+
/* 470 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 484
|
|
293
|
+
/* 475 */ MCD_OPC_CheckPredicate, 6, 135, 13, 0, // Skip to: 3943
|
|
294
|
+
/* 480 */ MCD_OPC_Decode, 186, 1, 34, // Opcode: AMOADD_W
|
|
295
|
+
/* 484 */ MCD_OPC_FilterValue, 3, 126, 13, 0, // Skip to: 3943
|
|
296
|
+
/* 489 */ MCD_OPC_CheckPredicate, 7, 121, 13, 0, // Skip to: 3943
|
|
297
|
+
/* 494 */ MCD_OPC_Decode, 182, 1, 34, // Opcode: AMOADD_D
|
|
298
|
+
/* 498 */ MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 534
|
|
299
|
+
/* 503 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
300
|
+
/* 506 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 520
|
|
301
|
+
/* 511 */ MCD_OPC_CheckPredicate, 6, 99, 13, 0, // Skip to: 3943
|
|
302
|
+
/* 516 */ MCD_OPC_Decode, 189, 1, 34, // Opcode: AMOADD_W_RL
|
|
303
|
+
/* 520 */ MCD_OPC_FilterValue, 3, 90, 13, 0, // Skip to: 3943
|
|
304
|
+
/* 525 */ MCD_OPC_CheckPredicate, 7, 85, 13, 0, // Skip to: 3943
|
|
305
|
+
/* 530 */ MCD_OPC_Decode, 185, 1, 34, // Opcode: AMOADD_D_RL
|
|
306
|
+
/* 534 */ MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 570
|
|
307
|
+
/* 539 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
308
|
+
/* 542 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 556
|
|
309
|
+
/* 547 */ MCD_OPC_CheckPredicate, 6, 63, 13, 0, // Skip to: 3943
|
|
310
|
+
/* 552 */ MCD_OPC_Decode, 187, 1, 34, // Opcode: AMOADD_W_AQ
|
|
311
|
+
/* 556 */ MCD_OPC_FilterValue, 3, 54, 13, 0, // Skip to: 3943
|
|
312
|
+
/* 561 */ MCD_OPC_CheckPredicate, 7, 49, 13, 0, // Skip to: 3943
|
|
313
|
+
/* 566 */ MCD_OPC_Decode, 183, 1, 34, // Opcode: AMOADD_D_AQ
|
|
314
|
+
/* 570 */ MCD_OPC_FilterValue, 3, 31, 0, 0, // Skip to: 606
|
|
315
|
+
/* 575 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
316
|
+
/* 578 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 592
|
|
317
|
+
/* 583 */ MCD_OPC_CheckPredicate, 6, 27, 13, 0, // Skip to: 3943
|
|
318
|
+
/* 588 */ MCD_OPC_Decode, 188, 1, 34, // Opcode: AMOADD_W_AQ_RL
|
|
319
|
+
/* 592 */ MCD_OPC_FilterValue, 3, 18, 13, 0, // Skip to: 3943
|
|
320
|
+
/* 597 */ MCD_OPC_CheckPredicate, 7, 13, 13, 0, // Skip to: 3943
|
|
321
|
+
/* 602 */ MCD_OPC_Decode, 184, 1, 34, // Opcode: AMOADD_D_AQ_RL
|
|
322
|
+
/* 606 */ MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 642
|
|
323
|
+
/* 611 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
324
|
+
/* 614 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 628
|
|
325
|
+
/* 619 */ MCD_OPC_CheckPredicate, 6, 247, 12, 0, // Skip to: 3943
|
|
326
|
+
/* 624 */ MCD_OPC_Decode, 242, 1, 34, // Opcode: AMOSWAP_W
|
|
327
|
+
/* 628 */ MCD_OPC_FilterValue, 3, 238, 12, 0, // Skip to: 3943
|
|
328
|
+
/* 633 */ MCD_OPC_CheckPredicate, 7, 233, 12, 0, // Skip to: 3943
|
|
329
|
+
/* 638 */ MCD_OPC_Decode, 238, 1, 34, // Opcode: AMOSWAP_D
|
|
330
|
+
/* 642 */ MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 678
|
|
331
|
+
/* 647 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
332
|
+
/* 650 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 664
|
|
333
|
+
/* 655 */ MCD_OPC_CheckPredicate, 6, 211, 12, 0, // Skip to: 3943
|
|
334
|
+
/* 660 */ MCD_OPC_Decode, 245, 1, 34, // Opcode: AMOSWAP_W_RL
|
|
335
|
+
/* 664 */ MCD_OPC_FilterValue, 3, 202, 12, 0, // Skip to: 3943
|
|
336
|
+
/* 669 */ MCD_OPC_CheckPredicate, 7, 197, 12, 0, // Skip to: 3943
|
|
337
|
+
/* 674 */ MCD_OPC_Decode, 241, 1, 34, // Opcode: AMOSWAP_D_RL
|
|
338
|
+
/* 678 */ MCD_OPC_FilterValue, 6, 31, 0, 0, // Skip to: 714
|
|
339
|
+
/* 683 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
340
|
+
/* 686 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 700
|
|
341
|
+
/* 691 */ MCD_OPC_CheckPredicate, 6, 175, 12, 0, // Skip to: 3943
|
|
342
|
+
/* 696 */ MCD_OPC_Decode, 243, 1, 34, // Opcode: AMOSWAP_W_AQ
|
|
343
|
+
/* 700 */ MCD_OPC_FilterValue, 3, 166, 12, 0, // Skip to: 3943
|
|
344
|
+
/* 705 */ MCD_OPC_CheckPredicate, 7, 161, 12, 0, // Skip to: 3943
|
|
345
|
+
/* 710 */ MCD_OPC_Decode, 239, 1, 34, // Opcode: AMOSWAP_D_AQ
|
|
346
|
+
/* 714 */ MCD_OPC_FilterValue, 7, 31, 0, 0, // Skip to: 750
|
|
347
|
+
/* 719 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
348
|
+
/* 722 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 736
|
|
349
|
+
/* 727 */ MCD_OPC_CheckPredicate, 6, 139, 12, 0, // Skip to: 3943
|
|
350
|
+
/* 732 */ MCD_OPC_Decode, 244, 1, 34, // Opcode: AMOSWAP_W_AQ_RL
|
|
351
|
+
/* 736 */ MCD_OPC_FilterValue, 3, 130, 12, 0, // Skip to: 3943
|
|
352
|
+
/* 741 */ MCD_OPC_CheckPredicate, 7, 125, 12, 0, // Skip to: 3943
|
|
353
|
+
/* 746 */ MCD_OPC_Decode, 240, 1, 34, // Opcode: AMOSWAP_D_AQ_RL
|
|
354
|
+
/* 750 */ MCD_OPC_FilterValue, 8, 45, 0, 0, // Skip to: 800
|
|
355
|
+
/* 755 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
356
|
+
/* 758 */ MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 779
|
|
357
|
+
/* 763 */ MCD_OPC_CheckPredicate, 6, 103, 12, 0, // Skip to: 3943
|
|
358
|
+
/* 768 */ MCD_OPC_CheckField, 20, 5, 0, 96, 12, 0, // Skip to: 3943
|
|
359
|
+
/* 775 */ MCD_OPC_Decode, 138, 3, 35, // Opcode: LR_W
|
|
360
|
+
/* 779 */ MCD_OPC_FilterValue, 3, 87, 12, 0, // Skip to: 3943
|
|
361
|
+
/* 784 */ MCD_OPC_CheckPredicate, 7, 82, 12, 0, // Skip to: 3943
|
|
362
|
+
/* 789 */ MCD_OPC_CheckField, 20, 5, 0, 75, 12, 0, // Skip to: 3943
|
|
363
|
+
/* 796 */ MCD_OPC_Decode, 134, 3, 35, // Opcode: LR_D
|
|
364
|
+
/* 800 */ MCD_OPC_FilterValue, 9, 45, 0, 0, // Skip to: 850
|
|
365
|
+
/* 805 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
366
|
+
/* 808 */ MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 829
|
|
367
|
+
/* 813 */ MCD_OPC_CheckPredicate, 6, 53, 12, 0, // Skip to: 3943
|
|
368
|
+
/* 818 */ MCD_OPC_CheckField, 20, 5, 0, 46, 12, 0, // Skip to: 3943
|
|
369
|
+
/* 825 */ MCD_OPC_Decode, 141, 3, 35, // Opcode: LR_W_RL
|
|
370
|
+
/* 829 */ MCD_OPC_FilterValue, 3, 37, 12, 0, // Skip to: 3943
|
|
371
|
+
/* 834 */ MCD_OPC_CheckPredicate, 7, 32, 12, 0, // Skip to: 3943
|
|
372
|
+
/* 839 */ MCD_OPC_CheckField, 20, 5, 0, 25, 12, 0, // Skip to: 3943
|
|
373
|
+
/* 846 */ MCD_OPC_Decode, 137, 3, 35, // Opcode: LR_D_RL
|
|
374
|
+
/* 850 */ MCD_OPC_FilterValue, 10, 45, 0, 0, // Skip to: 900
|
|
375
|
+
/* 855 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
376
|
+
/* 858 */ MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 879
|
|
377
|
+
/* 863 */ MCD_OPC_CheckPredicate, 6, 3, 12, 0, // Skip to: 3943
|
|
378
|
+
/* 868 */ MCD_OPC_CheckField, 20, 5, 0, 252, 11, 0, // Skip to: 3943
|
|
379
|
+
/* 875 */ MCD_OPC_Decode, 139, 3, 35, // Opcode: LR_W_AQ
|
|
380
|
+
/* 879 */ MCD_OPC_FilterValue, 3, 243, 11, 0, // Skip to: 3943
|
|
381
|
+
/* 884 */ MCD_OPC_CheckPredicate, 7, 238, 11, 0, // Skip to: 3943
|
|
382
|
+
/* 889 */ MCD_OPC_CheckField, 20, 5, 0, 231, 11, 0, // Skip to: 3943
|
|
383
|
+
/* 896 */ MCD_OPC_Decode, 135, 3, 35, // Opcode: LR_D_AQ
|
|
384
|
+
/* 900 */ MCD_OPC_FilterValue, 11, 45, 0, 0, // Skip to: 950
|
|
385
|
+
/* 905 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
386
|
+
/* 908 */ MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 929
|
|
387
|
+
/* 913 */ MCD_OPC_CheckPredicate, 6, 209, 11, 0, // Skip to: 3943
|
|
388
|
+
/* 918 */ MCD_OPC_CheckField, 20, 5, 0, 202, 11, 0, // Skip to: 3943
|
|
389
|
+
/* 925 */ MCD_OPC_Decode, 140, 3, 35, // Opcode: LR_W_AQ_RL
|
|
390
|
+
/* 929 */ MCD_OPC_FilterValue, 3, 193, 11, 0, // Skip to: 3943
|
|
391
|
+
/* 934 */ MCD_OPC_CheckPredicate, 7, 188, 11, 0, // Skip to: 3943
|
|
392
|
+
/* 939 */ MCD_OPC_CheckField, 20, 5, 0, 181, 11, 0, // Skip to: 3943
|
|
393
|
+
/* 946 */ MCD_OPC_Decode, 136, 3, 35, // Opcode: LR_D_AQ_RL
|
|
394
|
+
/* 950 */ MCD_OPC_FilterValue, 12, 31, 0, 0, // Skip to: 986
|
|
395
|
+
/* 955 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
396
|
+
/* 958 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 972
|
|
397
|
+
/* 963 */ MCD_OPC_CheckPredicate, 6, 159, 11, 0, // Skip to: 3943
|
|
398
|
+
/* 968 */ MCD_OPC_Decode, 162, 3, 34, // Opcode: SC_W
|
|
399
|
+
/* 972 */ MCD_OPC_FilterValue, 3, 150, 11, 0, // Skip to: 3943
|
|
400
|
+
/* 977 */ MCD_OPC_CheckPredicate, 7, 145, 11, 0, // Skip to: 3943
|
|
401
|
+
/* 982 */ MCD_OPC_Decode, 158, 3, 34, // Opcode: SC_D
|
|
402
|
+
/* 986 */ MCD_OPC_FilterValue, 13, 31, 0, 0, // Skip to: 1022
|
|
403
|
+
/* 991 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
404
|
+
/* 994 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1008
|
|
405
|
+
/* 999 */ MCD_OPC_CheckPredicate, 6, 123, 11, 0, // Skip to: 3943
|
|
406
|
+
/* 1004 */ MCD_OPC_Decode, 165, 3, 34, // Opcode: SC_W_RL
|
|
407
|
+
/* 1008 */ MCD_OPC_FilterValue, 3, 114, 11, 0, // Skip to: 3943
|
|
408
|
+
/* 1013 */ MCD_OPC_CheckPredicate, 7, 109, 11, 0, // Skip to: 3943
|
|
409
|
+
/* 1018 */ MCD_OPC_Decode, 161, 3, 34, // Opcode: SC_D_RL
|
|
410
|
+
/* 1022 */ MCD_OPC_FilterValue, 14, 31, 0, 0, // Skip to: 1058
|
|
411
|
+
/* 1027 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
412
|
+
/* 1030 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1044
|
|
413
|
+
/* 1035 */ MCD_OPC_CheckPredicate, 6, 87, 11, 0, // Skip to: 3943
|
|
414
|
+
/* 1040 */ MCD_OPC_Decode, 163, 3, 34, // Opcode: SC_W_AQ
|
|
415
|
+
/* 1044 */ MCD_OPC_FilterValue, 3, 78, 11, 0, // Skip to: 3943
|
|
416
|
+
/* 1049 */ MCD_OPC_CheckPredicate, 7, 73, 11, 0, // Skip to: 3943
|
|
417
|
+
/* 1054 */ MCD_OPC_Decode, 159, 3, 34, // Opcode: SC_D_AQ
|
|
418
|
+
/* 1058 */ MCD_OPC_FilterValue, 15, 31, 0, 0, // Skip to: 1094
|
|
419
|
+
/* 1063 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
420
|
+
/* 1066 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1080
|
|
421
|
+
/* 1071 */ MCD_OPC_CheckPredicate, 6, 51, 11, 0, // Skip to: 3943
|
|
422
|
+
/* 1076 */ MCD_OPC_Decode, 164, 3, 34, // Opcode: SC_W_AQ_RL
|
|
423
|
+
/* 1080 */ MCD_OPC_FilterValue, 3, 42, 11, 0, // Skip to: 3943
|
|
424
|
+
/* 1085 */ MCD_OPC_CheckPredicate, 7, 37, 11, 0, // Skip to: 3943
|
|
425
|
+
/* 1090 */ MCD_OPC_Decode, 160, 3, 34, // Opcode: SC_D_AQ_RL
|
|
426
|
+
/* 1094 */ MCD_OPC_FilterValue, 16, 31, 0, 0, // Skip to: 1130
|
|
427
|
+
/* 1099 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
428
|
+
/* 1102 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1116
|
|
429
|
+
/* 1107 */ MCD_OPC_CheckPredicate, 6, 15, 11, 0, // Skip to: 3943
|
|
430
|
+
/* 1112 */ MCD_OPC_Decode, 250, 1, 34, // Opcode: AMOXOR_W
|
|
431
|
+
/* 1116 */ MCD_OPC_FilterValue, 3, 6, 11, 0, // Skip to: 3943
|
|
432
|
+
/* 1121 */ MCD_OPC_CheckPredicate, 7, 1, 11, 0, // Skip to: 3943
|
|
433
|
+
/* 1126 */ MCD_OPC_Decode, 246, 1, 34, // Opcode: AMOXOR_D
|
|
434
|
+
/* 1130 */ MCD_OPC_FilterValue, 17, 31, 0, 0, // Skip to: 1166
|
|
435
|
+
/* 1135 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
436
|
+
/* 1138 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1152
|
|
437
|
+
/* 1143 */ MCD_OPC_CheckPredicate, 6, 235, 10, 0, // Skip to: 3943
|
|
438
|
+
/* 1148 */ MCD_OPC_Decode, 253, 1, 34, // Opcode: AMOXOR_W_RL
|
|
439
|
+
/* 1152 */ MCD_OPC_FilterValue, 3, 226, 10, 0, // Skip to: 3943
|
|
440
|
+
/* 1157 */ MCD_OPC_CheckPredicate, 7, 221, 10, 0, // Skip to: 3943
|
|
441
|
+
/* 1162 */ MCD_OPC_Decode, 249, 1, 34, // Opcode: AMOXOR_D_RL
|
|
442
|
+
/* 1166 */ MCD_OPC_FilterValue, 18, 31, 0, 0, // Skip to: 1202
|
|
443
|
+
/* 1171 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
444
|
+
/* 1174 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1188
|
|
445
|
+
/* 1179 */ MCD_OPC_CheckPredicate, 6, 199, 10, 0, // Skip to: 3943
|
|
446
|
+
/* 1184 */ MCD_OPC_Decode, 251, 1, 34, // Opcode: AMOXOR_W_AQ
|
|
447
|
+
/* 1188 */ MCD_OPC_FilterValue, 3, 190, 10, 0, // Skip to: 3943
|
|
448
|
+
/* 1193 */ MCD_OPC_CheckPredicate, 7, 185, 10, 0, // Skip to: 3943
|
|
449
|
+
/* 1198 */ MCD_OPC_Decode, 247, 1, 34, // Opcode: AMOXOR_D_AQ
|
|
450
|
+
/* 1202 */ MCD_OPC_FilterValue, 19, 31, 0, 0, // Skip to: 1238
|
|
451
|
+
/* 1207 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
452
|
+
/* 1210 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1224
|
|
453
|
+
/* 1215 */ MCD_OPC_CheckPredicate, 6, 163, 10, 0, // Skip to: 3943
|
|
454
|
+
/* 1220 */ MCD_OPC_Decode, 252, 1, 34, // Opcode: AMOXOR_W_AQ_RL
|
|
455
|
+
/* 1224 */ MCD_OPC_FilterValue, 3, 154, 10, 0, // Skip to: 3943
|
|
456
|
+
/* 1229 */ MCD_OPC_CheckPredicate, 7, 149, 10, 0, // Skip to: 3943
|
|
457
|
+
/* 1234 */ MCD_OPC_Decode, 248, 1, 34, // Opcode: AMOXOR_D_AQ_RL
|
|
458
|
+
/* 1238 */ MCD_OPC_FilterValue, 32, 31, 0, 0, // Skip to: 1274
|
|
459
|
+
/* 1243 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
460
|
+
/* 1246 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1260
|
|
461
|
+
/* 1251 */ MCD_OPC_CheckPredicate, 6, 127, 10, 0, // Skip to: 3943
|
|
462
|
+
/* 1256 */ MCD_OPC_Decode, 234, 1, 34, // Opcode: AMOOR_W
|
|
463
|
+
/* 1260 */ MCD_OPC_FilterValue, 3, 118, 10, 0, // Skip to: 3943
|
|
464
|
+
/* 1265 */ MCD_OPC_CheckPredicate, 7, 113, 10, 0, // Skip to: 3943
|
|
465
|
+
/* 1270 */ MCD_OPC_Decode, 230, 1, 34, // Opcode: AMOOR_D
|
|
466
|
+
/* 1274 */ MCD_OPC_FilterValue, 33, 31, 0, 0, // Skip to: 1310
|
|
467
|
+
/* 1279 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
468
|
+
/* 1282 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1296
|
|
469
|
+
/* 1287 */ MCD_OPC_CheckPredicate, 6, 91, 10, 0, // Skip to: 3943
|
|
470
|
+
/* 1292 */ MCD_OPC_Decode, 237, 1, 34, // Opcode: AMOOR_W_RL
|
|
471
|
+
/* 1296 */ MCD_OPC_FilterValue, 3, 82, 10, 0, // Skip to: 3943
|
|
472
|
+
/* 1301 */ MCD_OPC_CheckPredicate, 7, 77, 10, 0, // Skip to: 3943
|
|
473
|
+
/* 1306 */ MCD_OPC_Decode, 233, 1, 34, // Opcode: AMOOR_D_RL
|
|
474
|
+
/* 1310 */ MCD_OPC_FilterValue, 34, 31, 0, 0, // Skip to: 1346
|
|
475
|
+
/* 1315 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
476
|
+
/* 1318 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1332
|
|
477
|
+
/* 1323 */ MCD_OPC_CheckPredicate, 6, 55, 10, 0, // Skip to: 3943
|
|
478
|
+
/* 1328 */ MCD_OPC_Decode, 235, 1, 34, // Opcode: AMOOR_W_AQ
|
|
479
|
+
/* 1332 */ MCD_OPC_FilterValue, 3, 46, 10, 0, // Skip to: 3943
|
|
480
|
+
/* 1337 */ MCD_OPC_CheckPredicate, 7, 41, 10, 0, // Skip to: 3943
|
|
481
|
+
/* 1342 */ MCD_OPC_Decode, 231, 1, 34, // Opcode: AMOOR_D_AQ
|
|
482
|
+
/* 1346 */ MCD_OPC_FilterValue, 35, 31, 0, 0, // Skip to: 1382
|
|
483
|
+
/* 1351 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
484
|
+
/* 1354 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1368
|
|
485
|
+
/* 1359 */ MCD_OPC_CheckPredicate, 6, 19, 10, 0, // Skip to: 3943
|
|
486
|
+
/* 1364 */ MCD_OPC_Decode, 236, 1, 34, // Opcode: AMOOR_W_AQ_RL
|
|
487
|
+
/* 1368 */ MCD_OPC_FilterValue, 3, 10, 10, 0, // Skip to: 3943
|
|
488
|
+
/* 1373 */ MCD_OPC_CheckPredicate, 7, 5, 10, 0, // Skip to: 3943
|
|
489
|
+
/* 1378 */ MCD_OPC_Decode, 232, 1, 34, // Opcode: AMOOR_D_AQ_RL
|
|
490
|
+
/* 1382 */ MCD_OPC_FilterValue, 48, 31, 0, 0, // Skip to: 1418
|
|
491
|
+
/* 1387 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
492
|
+
/* 1390 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1404
|
|
493
|
+
/* 1395 */ MCD_OPC_CheckPredicate, 6, 239, 9, 0, // Skip to: 3943
|
|
494
|
+
/* 1400 */ MCD_OPC_Decode, 194, 1, 34, // Opcode: AMOAND_W
|
|
495
|
+
/* 1404 */ MCD_OPC_FilterValue, 3, 230, 9, 0, // Skip to: 3943
|
|
496
|
+
/* 1409 */ MCD_OPC_CheckPredicate, 7, 225, 9, 0, // Skip to: 3943
|
|
497
|
+
/* 1414 */ MCD_OPC_Decode, 190, 1, 34, // Opcode: AMOAND_D
|
|
498
|
+
/* 1418 */ MCD_OPC_FilterValue, 49, 31, 0, 0, // Skip to: 1454
|
|
499
|
+
/* 1423 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
500
|
+
/* 1426 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1440
|
|
501
|
+
/* 1431 */ MCD_OPC_CheckPredicate, 6, 203, 9, 0, // Skip to: 3943
|
|
502
|
+
/* 1436 */ MCD_OPC_Decode, 197, 1, 34, // Opcode: AMOAND_W_RL
|
|
503
|
+
/* 1440 */ MCD_OPC_FilterValue, 3, 194, 9, 0, // Skip to: 3943
|
|
504
|
+
/* 1445 */ MCD_OPC_CheckPredicate, 7, 189, 9, 0, // Skip to: 3943
|
|
505
|
+
/* 1450 */ MCD_OPC_Decode, 193, 1, 34, // Opcode: AMOAND_D_RL
|
|
506
|
+
/* 1454 */ MCD_OPC_FilterValue, 50, 31, 0, 0, // Skip to: 1490
|
|
507
|
+
/* 1459 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
508
|
+
/* 1462 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1476
|
|
509
|
+
/* 1467 */ MCD_OPC_CheckPredicate, 6, 167, 9, 0, // Skip to: 3943
|
|
510
|
+
/* 1472 */ MCD_OPC_Decode, 195, 1, 34, // Opcode: AMOAND_W_AQ
|
|
511
|
+
/* 1476 */ MCD_OPC_FilterValue, 3, 158, 9, 0, // Skip to: 3943
|
|
512
|
+
/* 1481 */ MCD_OPC_CheckPredicate, 7, 153, 9, 0, // Skip to: 3943
|
|
513
|
+
/* 1486 */ MCD_OPC_Decode, 191, 1, 34, // Opcode: AMOAND_D_AQ
|
|
514
|
+
/* 1490 */ MCD_OPC_FilterValue, 51, 31, 0, 0, // Skip to: 1526
|
|
515
|
+
/* 1495 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
516
|
+
/* 1498 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1512
|
|
517
|
+
/* 1503 */ MCD_OPC_CheckPredicate, 6, 131, 9, 0, // Skip to: 3943
|
|
518
|
+
/* 1508 */ MCD_OPC_Decode, 196, 1, 34, // Opcode: AMOAND_W_AQ_RL
|
|
519
|
+
/* 1512 */ MCD_OPC_FilterValue, 3, 122, 9, 0, // Skip to: 3943
|
|
520
|
+
/* 1517 */ MCD_OPC_CheckPredicate, 7, 117, 9, 0, // Skip to: 3943
|
|
521
|
+
/* 1522 */ MCD_OPC_Decode, 192, 1, 34, // Opcode: AMOAND_D_AQ_RL
|
|
522
|
+
/* 1526 */ MCD_OPC_FilterValue, 64, 31, 0, 0, // Skip to: 1562
|
|
523
|
+
/* 1531 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
524
|
+
/* 1534 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1548
|
|
525
|
+
/* 1539 */ MCD_OPC_CheckPredicate, 6, 95, 9, 0, // Skip to: 3943
|
|
526
|
+
/* 1544 */ MCD_OPC_Decode, 226, 1, 34, // Opcode: AMOMIN_W
|
|
527
|
+
/* 1548 */ MCD_OPC_FilterValue, 3, 86, 9, 0, // Skip to: 3943
|
|
528
|
+
/* 1553 */ MCD_OPC_CheckPredicate, 7, 81, 9, 0, // Skip to: 3943
|
|
529
|
+
/* 1558 */ MCD_OPC_Decode, 222, 1, 34, // Opcode: AMOMIN_D
|
|
530
|
+
/* 1562 */ MCD_OPC_FilterValue, 65, 31, 0, 0, // Skip to: 1598
|
|
531
|
+
/* 1567 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
532
|
+
/* 1570 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1584
|
|
533
|
+
/* 1575 */ MCD_OPC_CheckPredicate, 6, 59, 9, 0, // Skip to: 3943
|
|
534
|
+
/* 1580 */ MCD_OPC_Decode, 229, 1, 34, // Opcode: AMOMIN_W_RL
|
|
535
|
+
/* 1584 */ MCD_OPC_FilterValue, 3, 50, 9, 0, // Skip to: 3943
|
|
536
|
+
/* 1589 */ MCD_OPC_CheckPredicate, 7, 45, 9, 0, // Skip to: 3943
|
|
537
|
+
/* 1594 */ MCD_OPC_Decode, 225, 1, 34, // Opcode: AMOMIN_D_RL
|
|
538
|
+
/* 1598 */ MCD_OPC_FilterValue, 66, 31, 0, 0, // Skip to: 1634
|
|
539
|
+
/* 1603 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
540
|
+
/* 1606 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1620
|
|
541
|
+
/* 1611 */ MCD_OPC_CheckPredicate, 6, 23, 9, 0, // Skip to: 3943
|
|
542
|
+
/* 1616 */ MCD_OPC_Decode, 227, 1, 34, // Opcode: AMOMIN_W_AQ
|
|
543
|
+
/* 1620 */ MCD_OPC_FilterValue, 3, 14, 9, 0, // Skip to: 3943
|
|
544
|
+
/* 1625 */ MCD_OPC_CheckPredicate, 7, 9, 9, 0, // Skip to: 3943
|
|
545
|
+
/* 1630 */ MCD_OPC_Decode, 223, 1, 34, // Opcode: AMOMIN_D_AQ
|
|
546
|
+
/* 1634 */ MCD_OPC_FilterValue, 67, 31, 0, 0, // Skip to: 1670
|
|
547
|
+
/* 1639 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
548
|
+
/* 1642 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1656
|
|
549
|
+
/* 1647 */ MCD_OPC_CheckPredicate, 6, 243, 8, 0, // Skip to: 3943
|
|
550
|
+
/* 1652 */ MCD_OPC_Decode, 228, 1, 34, // Opcode: AMOMIN_W_AQ_RL
|
|
551
|
+
/* 1656 */ MCD_OPC_FilterValue, 3, 234, 8, 0, // Skip to: 3943
|
|
552
|
+
/* 1661 */ MCD_OPC_CheckPredicate, 7, 229, 8, 0, // Skip to: 3943
|
|
553
|
+
/* 1666 */ MCD_OPC_Decode, 224, 1, 34, // Opcode: AMOMIN_D_AQ_RL
|
|
554
|
+
/* 1670 */ MCD_OPC_FilterValue, 80, 31, 0, 0, // Skip to: 1706
|
|
555
|
+
/* 1675 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
556
|
+
/* 1678 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1692
|
|
557
|
+
/* 1683 */ MCD_OPC_CheckPredicate, 6, 207, 8, 0, // Skip to: 3943
|
|
558
|
+
/* 1688 */ MCD_OPC_Decode, 210, 1, 34, // Opcode: AMOMAX_W
|
|
559
|
+
/* 1692 */ MCD_OPC_FilterValue, 3, 198, 8, 0, // Skip to: 3943
|
|
560
|
+
/* 1697 */ MCD_OPC_CheckPredicate, 7, 193, 8, 0, // Skip to: 3943
|
|
561
|
+
/* 1702 */ MCD_OPC_Decode, 206, 1, 34, // Opcode: AMOMAX_D
|
|
562
|
+
/* 1706 */ MCD_OPC_FilterValue, 81, 31, 0, 0, // Skip to: 1742
|
|
563
|
+
/* 1711 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
564
|
+
/* 1714 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1728
|
|
565
|
+
/* 1719 */ MCD_OPC_CheckPredicate, 6, 171, 8, 0, // Skip to: 3943
|
|
566
|
+
/* 1724 */ MCD_OPC_Decode, 213, 1, 34, // Opcode: AMOMAX_W_RL
|
|
567
|
+
/* 1728 */ MCD_OPC_FilterValue, 3, 162, 8, 0, // Skip to: 3943
|
|
568
|
+
/* 1733 */ MCD_OPC_CheckPredicate, 7, 157, 8, 0, // Skip to: 3943
|
|
569
|
+
/* 1738 */ MCD_OPC_Decode, 209, 1, 34, // Opcode: AMOMAX_D_RL
|
|
570
|
+
/* 1742 */ MCD_OPC_FilterValue, 82, 31, 0, 0, // Skip to: 1778
|
|
571
|
+
/* 1747 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
572
|
+
/* 1750 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1764
|
|
573
|
+
/* 1755 */ MCD_OPC_CheckPredicate, 6, 135, 8, 0, // Skip to: 3943
|
|
574
|
+
/* 1760 */ MCD_OPC_Decode, 211, 1, 34, // Opcode: AMOMAX_W_AQ
|
|
575
|
+
/* 1764 */ MCD_OPC_FilterValue, 3, 126, 8, 0, // Skip to: 3943
|
|
576
|
+
/* 1769 */ MCD_OPC_CheckPredicate, 7, 121, 8, 0, // Skip to: 3943
|
|
577
|
+
/* 1774 */ MCD_OPC_Decode, 207, 1, 34, // Opcode: AMOMAX_D_AQ
|
|
578
|
+
/* 1778 */ MCD_OPC_FilterValue, 83, 31, 0, 0, // Skip to: 1814
|
|
579
|
+
/* 1783 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
580
|
+
/* 1786 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1800
|
|
581
|
+
/* 1791 */ MCD_OPC_CheckPredicate, 6, 99, 8, 0, // Skip to: 3943
|
|
582
|
+
/* 1796 */ MCD_OPC_Decode, 212, 1, 34, // Opcode: AMOMAX_W_AQ_RL
|
|
583
|
+
/* 1800 */ MCD_OPC_FilterValue, 3, 90, 8, 0, // Skip to: 3943
|
|
584
|
+
/* 1805 */ MCD_OPC_CheckPredicate, 7, 85, 8, 0, // Skip to: 3943
|
|
585
|
+
/* 1810 */ MCD_OPC_Decode, 208, 1, 34, // Opcode: AMOMAX_D_AQ_RL
|
|
586
|
+
/* 1814 */ MCD_OPC_FilterValue, 96, 31, 0, 0, // Skip to: 1850
|
|
587
|
+
/* 1819 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
588
|
+
/* 1822 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1836
|
|
589
|
+
/* 1827 */ MCD_OPC_CheckPredicate, 6, 63, 8, 0, // Skip to: 3943
|
|
590
|
+
/* 1832 */ MCD_OPC_Decode, 218, 1, 34, // Opcode: AMOMINU_W
|
|
591
|
+
/* 1836 */ MCD_OPC_FilterValue, 3, 54, 8, 0, // Skip to: 3943
|
|
592
|
+
/* 1841 */ MCD_OPC_CheckPredicate, 7, 49, 8, 0, // Skip to: 3943
|
|
593
|
+
/* 1846 */ MCD_OPC_Decode, 214, 1, 34, // Opcode: AMOMINU_D
|
|
594
|
+
/* 1850 */ MCD_OPC_FilterValue, 97, 31, 0, 0, // Skip to: 1886
|
|
595
|
+
/* 1855 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
596
|
+
/* 1858 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1872
|
|
597
|
+
/* 1863 */ MCD_OPC_CheckPredicate, 6, 27, 8, 0, // Skip to: 3943
|
|
598
|
+
/* 1868 */ MCD_OPC_Decode, 221, 1, 34, // Opcode: AMOMINU_W_RL
|
|
599
|
+
/* 1872 */ MCD_OPC_FilterValue, 3, 18, 8, 0, // Skip to: 3943
|
|
600
|
+
/* 1877 */ MCD_OPC_CheckPredicate, 7, 13, 8, 0, // Skip to: 3943
|
|
601
|
+
/* 1882 */ MCD_OPC_Decode, 217, 1, 34, // Opcode: AMOMINU_D_RL
|
|
602
|
+
/* 1886 */ MCD_OPC_FilterValue, 98, 31, 0, 0, // Skip to: 1922
|
|
603
|
+
/* 1891 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
604
|
+
/* 1894 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1908
|
|
605
|
+
/* 1899 */ MCD_OPC_CheckPredicate, 6, 247, 7, 0, // Skip to: 3943
|
|
606
|
+
/* 1904 */ MCD_OPC_Decode, 219, 1, 34, // Opcode: AMOMINU_W_AQ
|
|
607
|
+
/* 1908 */ MCD_OPC_FilterValue, 3, 238, 7, 0, // Skip to: 3943
|
|
608
|
+
/* 1913 */ MCD_OPC_CheckPredicate, 7, 233, 7, 0, // Skip to: 3943
|
|
609
|
+
/* 1918 */ MCD_OPC_Decode, 215, 1, 34, // Opcode: AMOMINU_D_AQ
|
|
610
|
+
/* 1922 */ MCD_OPC_FilterValue, 99, 31, 0, 0, // Skip to: 1958
|
|
611
|
+
/* 1927 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
612
|
+
/* 1930 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1944
|
|
613
|
+
/* 1935 */ MCD_OPC_CheckPredicate, 6, 211, 7, 0, // Skip to: 3943
|
|
614
|
+
/* 1940 */ MCD_OPC_Decode, 220, 1, 34, // Opcode: AMOMINU_W_AQ_RL
|
|
615
|
+
/* 1944 */ MCD_OPC_FilterValue, 3, 202, 7, 0, // Skip to: 3943
|
|
616
|
+
/* 1949 */ MCD_OPC_CheckPredicate, 7, 197, 7, 0, // Skip to: 3943
|
|
617
|
+
/* 1954 */ MCD_OPC_Decode, 216, 1, 34, // Opcode: AMOMINU_D_AQ_RL
|
|
618
|
+
/* 1958 */ MCD_OPC_FilterValue, 112, 31, 0, 0, // Skip to: 1994
|
|
619
|
+
/* 1963 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
620
|
+
/* 1966 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1980
|
|
621
|
+
/* 1971 */ MCD_OPC_CheckPredicate, 6, 175, 7, 0, // Skip to: 3943
|
|
622
|
+
/* 1976 */ MCD_OPC_Decode, 202, 1, 34, // Opcode: AMOMAXU_W
|
|
623
|
+
/* 1980 */ MCD_OPC_FilterValue, 3, 166, 7, 0, // Skip to: 3943
|
|
624
|
+
/* 1985 */ MCD_OPC_CheckPredicate, 7, 161, 7, 0, // Skip to: 3943
|
|
625
|
+
/* 1990 */ MCD_OPC_Decode, 198, 1, 34, // Opcode: AMOMAXU_D
|
|
626
|
+
/* 1994 */ MCD_OPC_FilterValue, 113, 31, 0, 0, // Skip to: 2030
|
|
627
|
+
/* 1999 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
628
|
+
/* 2002 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2016
|
|
629
|
+
/* 2007 */ MCD_OPC_CheckPredicate, 6, 139, 7, 0, // Skip to: 3943
|
|
630
|
+
/* 2012 */ MCD_OPC_Decode, 205, 1, 34, // Opcode: AMOMAXU_W_RL
|
|
631
|
+
/* 2016 */ MCD_OPC_FilterValue, 3, 130, 7, 0, // Skip to: 3943
|
|
632
|
+
/* 2021 */ MCD_OPC_CheckPredicate, 7, 125, 7, 0, // Skip to: 3943
|
|
633
|
+
/* 2026 */ MCD_OPC_Decode, 201, 1, 34, // Opcode: AMOMAXU_D_RL
|
|
634
|
+
/* 2030 */ MCD_OPC_FilterValue, 114, 31, 0, 0, // Skip to: 2066
|
|
635
|
+
/* 2035 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
636
|
+
/* 2038 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2052
|
|
637
|
+
/* 2043 */ MCD_OPC_CheckPredicate, 6, 103, 7, 0, // Skip to: 3943
|
|
638
|
+
/* 2048 */ MCD_OPC_Decode, 203, 1, 34, // Opcode: AMOMAXU_W_AQ
|
|
639
|
+
/* 2052 */ MCD_OPC_FilterValue, 3, 94, 7, 0, // Skip to: 3943
|
|
640
|
+
/* 2057 */ MCD_OPC_CheckPredicate, 7, 89, 7, 0, // Skip to: 3943
|
|
641
|
+
/* 2062 */ MCD_OPC_Decode, 199, 1, 34, // Opcode: AMOMAXU_D_AQ
|
|
642
|
+
/* 2066 */ MCD_OPC_FilterValue, 115, 80, 7, 0, // Skip to: 3943
|
|
643
|
+
/* 2071 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
644
|
+
/* 2074 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2088
|
|
645
|
+
/* 2079 */ MCD_OPC_CheckPredicate, 6, 67, 7, 0, // Skip to: 3943
|
|
646
|
+
/* 2084 */ MCD_OPC_Decode, 204, 1, 34, // Opcode: AMOMAXU_W_AQ_RL
|
|
647
|
+
/* 2088 */ MCD_OPC_FilterValue, 3, 58, 7, 0, // Skip to: 3943
|
|
648
|
+
/* 2093 */ MCD_OPC_CheckPredicate, 7, 53, 7, 0, // Skip to: 3943
|
|
649
|
+
/* 2098 */ MCD_OPC_Decode, 200, 1, 34, // Opcode: AMOMAXU_D_AQ_RL
|
|
650
|
+
/* 2102 */ MCD_OPC_FilterValue, 51, 13, 1, 0, // Skip to: 2376
|
|
651
|
+
/* 2107 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
652
|
+
/* 2110 */ MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 2150
|
|
653
|
+
/* 2115 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
654
|
+
/* 2118 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2127
|
|
655
|
+
/* 2123 */ MCD_OPC_Decode, 178, 1, 34, // Opcode: ADD
|
|
656
|
+
/* 2127 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2141
|
|
657
|
+
/* 2132 */ MCD_OPC_CheckPredicate, 8, 14, 7, 0, // Skip to: 3943
|
|
658
|
+
/* 2137 */ MCD_OPC_Decode, 146, 3, 34, // Opcode: MUL
|
|
659
|
+
/* 2141 */ MCD_OPC_FilterValue, 32, 5, 7, 0, // Skip to: 3943
|
|
660
|
+
/* 2146 */ MCD_OPC_Decode, 186, 3, 34, // Opcode: SUB
|
|
661
|
+
/* 2150 */ MCD_OPC_FilterValue, 1, 26, 0, 0, // Skip to: 2181
|
|
662
|
+
/* 2155 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
663
|
+
/* 2158 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2167
|
|
664
|
+
/* 2163 */ MCD_OPC_Decode, 169, 3, 34, // Opcode: SLL
|
|
665
|
+
/* 2167 */ MCD_OPC_FilterValue, 1, 235, 6, 0, // Skip to: 3943
|
|
666
|
+
/* 2172 */ MCD_OPC_CheckPredicate, 8, 230, 6, 0, // Skip to: 3943
|
|
667
|
+
/* 2177 */ MCD_OPC_Decode, 147, 3, 34, // Opcode: MULH
|
|
668
|
+
/* 2181 */ MCD_OPC_FilterValue, 2, 26, 0, 0, // Skip to: 2212
|
|
669
|
+
/* 2186 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
670
|
+
/* 2189 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2198
|
|
671
|
+
/* 2194 */ MCD_OPC_Decode, 173, 3, 34, // Opcode: SLT
|
|
672
|
+
/* 2198 */ MCD_OPC_FilterValue, 1, 204, 6, 0, // Skip to: 3943
|
|
673
|
+
/* 2203 */ MCD_OPC_CheckPredicate, 8, 199, 6, 0, // Skip to: 3943
|
|
674
|
+
/* 2208 */ MCD_OPC_Decode, 148, 3, 34, // Opcode: MULHSU
|
|
675
|
+
/* 2212 */ MCD_OPC_FilterValue, 3, 26, 0, 0, // Skip to: 2243
|
|
676
|
+
/* 2217 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
677
|
+
/* 2220 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2229
|
|
678
|
+
/* 2225 */ MCD_OPC_Decode, 176, 3, 34, // Opcode: SLTU
|
|
679
|
+
/* 2229 */ MCD_OPC_FilterValue, 1, 173, 6, 0, // Skip to: 3943
|
|
680
|
+
/* 2234 */ MCD_OPC_CheckPredicate, 8, 168, 6, 0, // Skip to: 3943
|
|
681
|
+
/* 2239 */ MCD_OPC_Decode, 149, 3, 34, // Opcode: MULHU
|
|
682
|
+
/* 2243 */ MCD_OPC_FilterValue, 4, 26, 0, 0, // Skip to: 2274
|
|
683
|
+
/* 2248 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
684
|
+
/* 2251 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2260
|
|
685
|
+
/* 2256 */ MCD_OPC_Decode, 192, 3, 34, // Opcode: XOR
|
|
686
|
+
/* 2260 */ MCD_OPC_FilterValue, 1, 142, 6, 0, // Skip to: 3943
|
|
687
|
+
/* 2265 */ MCD_OPC_CheckPredicate, 8, 137, 6, 0, // Skip to: 3943
|
|
688
|
+
/* 2270 */ MCD_OPC_Decode, 184, 2, 34, // Opcode: DIV
|
|
689
|
+
/* 2274 */ MCD_OPC_FilterValue, 5, 35, 0, 0, // Skip to: 2314
|
|
690
|
+
/* 2279 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
691
|
+
/* 2282 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2291
|
|
692
|
+
/* 2287 */ MCD_OPC_Decode, 182, 3, 34, // Opcode: SRL
|
|
693
|
+
/* 2291 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2305
|
|
694
|
+
/* 2296 */ MCD_OPC_CheckPredicate, 8, 106, 6, 0, // Skip to: 3943
|
|
695
|
+
/* 2301 */ MCD_OPC_Decode, 185, 2, 34, // Opcode: DIVU
|
|
696
|
+
/* 2305 */ MCD_OPC_FilterValue, 32, 97, 6, 0, // Skip to: 3943
|
|
697
|
+
/* 2310 */ MCD_OPC_Decode, 177, 3, 34, // Opcode: SRA
|
|
698
|
+
/* 2314 */ MCD_OPC_FilterValue, 6, 26, 0, 0, // Skip to: 2345
|
|
699
|
+
/* 2319 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
700
|
+
/* 2322 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2331
|
|
701
|
+
/* 2327 */ MCD_OPC_Decode, 151, 3, 34, // Opcode: OR
|
|
702
|
+
/* 2331 */ MCD_OPC_FilterValue, 1, 71, 6, 0, // Skip to: 3943
|
|
703
|
+
/* 2336 */ MCD_OPC_CheckPredicate, 8, 66, 6, 0, // Skip to: 3943
|
|
704
|
+
/* 2341 */ MCD_OPC_Decode, 153, 3, 34, // Opcode: REM
|
|
705
|
+
/* 2345 */ MCD_OPC_FilterValue, 7, 57, 6, 0, // Skip to: 3943
|
|
706
|
+
/* 2350 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
707
|
+
/* 2353 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 2362
|
|
708
|
+
/* 2358 */ MCD_OPC_Decode, 254, 1, 34, // Opcode: AND
|
|
709
|
+
/* 2362 */ MCD_OPC_FilterValue, 1, 40, 6, 0, // Skip to: 3943
|
|
710
|
+
/* 2367 */ MCD_OPC_CheckPredicate, 8, 35, 6, 0, // Skip to: 3943
|
|
711
|
+
/* 2372 */ MCD_OPC_Decode, 154, 3, 34, // Opcode: REMU
|
|
712
|
+
/* 2376 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 2385
|
|
713
|
+
/* 2381 */ MCD_OPC_Decode, 142, 3, 29, // Opcode: LUI
|
|
714
|
+
/* 2385 */ MCD_OPC_FilterValue, 59, 187, 0, 0, // Skip to: 2577
|
|
715
|
+
/* 2390 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
716
|
+
/* 2393 */ MCD_OPC_FilterValue, 0, 45, 0, 0, // Skip to: 2443
|
|
717
|
+
/* 2398 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
718
|
+
/* 2401 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2415
|
|
719
|
+
/* 2406 */ MCD_OPC_CheckPredicate, 3, 252, 5, 0, // Skip to: 3943
|
|
720
|
+
/* 2411 */ MCD_OPC_Decode, 181, 1, 34, // Opcode: ADDW
|
|
721
|
+
/* 2415 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2429
|
|
722
|
+
/* 2420 */ MCD_OPC_CheckPredicate, 9, 238, 5, 0, // Skip to: 3943
|
|
723
|
+
/* 2425 */ MCD_OPC_Decode, 150, 3, 34, // Opcode: MULW
|
|
724
|
+
/* 2429 */ MCD_OPC_FilterValue, 32, 229, 5, 0, // Skip to: 3943
|
|
725
|
+
/* 2434 */ MCD_OPC_CheckPredicate, 3, 224, 5, 0, // Skip to: 3943
|
|
726
|
+
/* 2439 */ MCD_OPC_Decode, 187, 3, 34, // Opcode: SUBW
|
|
727
|
+
/* 2443 */ MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 2464
|
|
728
|
+
/* 2448 */ MCD_OPC_CheckPredicate, 3, 210, 5, 0, // Skip to: 3943
|
|
729
|
+
/* 2453 */ MCD_OPC_CheckField, 25, 7, 0, 203, 5, 0, // Skip to: 3943
|
|
730
|
+
/* 2460 */ MCD_OPC_Decode, 172, 3, 34, // Opcode: SLLW
|
|
731
|
+
/* 2464 */ MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 2485
|
|
732
|
+
/* 2469 */ MCD_OPC_CheckPredicate, 9, 189, 5, 0, // Skip to: 3943
|
|
733
|
+
/* 2474 */ MCD_OPC_CheckField, 25, 7, 1, 182, 5, 0, // Skip to: 3943
|
|
734
|
+
/* 2481 */ MCD_OPC_Decode, 187, 2, 34, // Opcode: DIVW
|
|
735
|
+
/* 2485 */ MCD_OPC_FilterValue, 5, 45, 0, 0, // Skip to: 2535
|
|
736
|
+
/* 2490 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
737
|
+
/* 2493 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2507
|
|
738
|
+
/* 2498 */ MCD_OPC_CheckPredicate, 3, 160, 5, 0, // Skip to: 3943
|
|
739
|
+
/* 2503 */ MCD_OPC_Decode, 185, 3, 34, // Opcode: SRLW
|
|
740
|
+
/* 2507 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2521
|
|
741
|
+
/* 2512 */ MCD_OPC_CheckPredicate, 9, 146, 5, 0, // Skip to: 3943
|
|
742
|
+
/* 2517 */ MCD_OPC_Decode, 186, 2, 34, // Opcode: DIVUW
|
|
743
|
+
/* 2521 */ MCD_OPC_FilterValue, 32, 137, 5, 0, // Skip to: 3943
|
|
744
|
+
/* 2526 */ MCD_OPC_CheckPredicate, 3, 132, 5, 0, // Skip to: 3943
|
|
745
|
+
/* 2531 */ MCD_OPC_Decode, 180, 3, 34, // Opcode: SRAW
|
|
746
|
+
/* 2535 */ MCD_OPC_FilterValue, 6, 16, 0, 0, // Skip to: 2556
|
|
747
|
+
/* 2540 */ MCD_OPC_CheckPredicate, 9, 118, 5, 0, // Skip to: 3943
|
|
748
|
+
/* 2545 */ MCD_OPC_CheckField, 25, 7, 1, 111, 5, 0, // Skip to: 3943
|
|
749
|
+
/* 2552 */ MCD_OPC_Decode, 156, 3, 34, // Opcode: REMW
|
|
750
|
+
/* 2556 */ MCD_OPC_FilterValue, 7, 102, 5, 0, // Skip to: 3943
|
|
751
|
+
/* 2561 */ MCD_OPC_CheckPredicate, 9, 97, 5, 0, // Skip to: 3943
|
|
752
|
+
/* 2566 */ MCD_OPC_CheckField, 25, 7, 1, 90, 5, 0, // Skip to: 3943
|
|
753
|
+
/* 2573 */ MCD_OPC_Decode, 155, 3, 34, // Opcode: REMUW
|
|
754
|
+
/* 2577 */ MCD_OPC_FilterValue, 67, 31, 0, 0, // Skip to: 2613
|
|
755
|
+
/* 2582 */ MCD_OPC_ExtractField, 25, 2, // Inst{26-25} ...
|
|
756
|
+
/* 2585 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2599
|
|
757
|
+
/* 2590 */ MCD_OPC_CheckPredicate, 4, 68, 5, 0, // Skip to: 3943
|
|
758
|
+
/* 2595 */ MCD_OPC_Decode, 226, 2, 36, // Opcode: FMADD_S
|
|
759
|
+
/* 2599 */ MCD_OPC_FilterValue, 1, 59, 5, 0, // Skip to: 3943
|
|
760
|
+
/* 2604 */ MCD_OPC_CheckPredicate, 5, 54, 5, 0, // Skip to: 3943
|
|
761
|
+
/* 2609 */ MCD_OPC_Decode, 225, 2, 37, // Opcode: FMADD_D
|
|
762
|
+
/* 2613 */ MCD_OPC_FilterValue, 71, 31, 0, 0, // Skip to: 2649
|
|
763
|
+
/* 2618 */ MCD_OPC_ExtractField, 25, 2, // Inst{26-25} ...
|
|
764
|
+
/* 2621 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2635
|
|
765
|
+
/* 2626 */ MCD_OPC_CheckPredicate, 4, 32, 5, 0, // Skip to: 3943
|
|
766
|
+
/* 2631 */ MCD_OPC_Decode, 232, 2, 36, // Opcode: FMSUB_S
|
|
767
|
+
/* 2635 */ MCD_OPC_FilterValue, 1, 23, 5, 0, // Skip to: 3943
|
|
768
|
+
/* 2640 */ MCD_OPC_CheckPredicate, 5, 18, 5, 0, // Skip to: 3943
|
|
769
|
+
/* 2645 */ MCD_OPC_Decode, 231, 2, 37, // Opcode: FMSUB_D
|
|
770
|
+
/* 2649 */ MCD_OPC_FilterValue, 75, 31, 0, 0, // Skip to: 2685
|
|
771
|
+
/* 2654 */ MCD_OPC_ExtractField, 25, 2, // Inst{26-25} ...
|
|
772
|
+
/* 2657 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2671
|
|
773
|
+
/* 2662 */ MCD_OPC_CheckPredicate, 4, 252, 4, 0, // Skip to: 3943
|
|
774
|
+
/* 2667 */ MCD_OPC_Decode, 242, 2, 36, // Opcode: FNMSUB_S
|
|
775
|
+
/* 2671 */ MCD_OPC_FilterValue, 1, 243, 4, 0, // Skip to: 3943
|
|
776
|
+
/* 2676 */ MCD_OPC_CheckPredicate, 5, 238, 4, 0, // Skip to: 3943
|
|
777
|
+
/* 2681 */ MCD_OPC_Decode, 241, 2, 37, // Opcode: FNMSUB_D
|
|
778
|
+
/* 2685 */ MCD_OPC_FilterValue, 79, 31, 0, 0, // Skip to: 2721
|
|
779
|
+
/* 2690 */ MCD_OPC_ExtractField, 25, 2, // Inst{26-25} ...
|
|
780
|
+
/* 2693 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2707
|
|
781
|
+
/* 2698 */ MCD_OPC_CheckPredicate, 4, 216, 4, 0, // Skip to: 3943
|
|
782
|
+
/* 2703 */ MCD_OPC_Decode, 240, 2, 36, // Opcode: FNMADD_S
|
|
783
|
+
/* 2707 */ MCD_OPC_FilterValue, 1, 207, 4, 0, // Skip to: 3943
|
|
784
|
+
/* 2712 */ MCD_OPC_CheckPredicate, 5, 202, 4, 0, // Skip to: 3943
|
|
785
|
+
/* 2717 */ MCD_OPC_Decode, 239, 2, 37, // Opcode: FNMADD_D
|
|
786
|
+
/* 2721 */ MCD_OPC_FilterValue, 83, 136, 3, 0, // Skip to: 3630
|
|
787
|
+
/* 2726 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
788
|
+
/* 2729 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2743
|
|
789
|
+
/* 2734 */ MCD_OPC_CheckPredicate, 4, 180, 4, 0, // Skip to: 3943
|
|
790
|
+
/* 2739 */ MCD_OPC_Decode, 191, 2, 38, // Opcode: FADD_S
|
|
791
|
+
/* 2743 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2757
|
|
792
|
+
/* 2748 */ MCD_OPC_CheckPredicate, 5, 166, 4, 0, // Skip to: 3943
|
|
793
|
+
/* 2753 */ MCD_OPC_Decode, 190, 2, 39, // Opcode: FADD_D
|
|
794
|
+
/* 2757 */ MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 2771
|
|
795
|
+
/* 2762 */ MCD_OPC_CheckPredicate, 4, 152, 4, 0, // Skip to: 3943
|
|
796
|
+
/* 2767 */ MCD_OPC_Decode, 253, 2, 38, // Opcode: FSUB_S
|
|
797
|
+
/* 2771 */ MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2785
|
|
798
|
+
/* 2776 */ MCD_OPC_CheckPredicate, 5, 138, 4, 0, // Skip to: 3943
|
|
799
|
+
/* 2781 */ MCD_OPC_Decode, 252, 2, 39, // Opcode: FSUB_D
|
|
800
|
+
/* 2785 */ MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 2799
|
|
801
|
+
/* 2790 */ MCD_OPC_CheckPredicate, 4, 124, 4, 0, // Skip to: 3943
|
|
802
|
+
/* 2795 */ MCD_OPC_Decode, 234, 2, 38, // Opcode: FMUL_S
|
|
803
|
+
/* 2799 */ MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 2813
|
|
804
|
+
/* 2804 */ MCD_OPC_CheckPredicate, 5, 110, 4, 0, // Skip to: 3943
|
|
805
|
+
/* 2809 */ MCD_OPC_Decode, 233, 2, 39, // Opcode: FMUL_D
|
|
806
|
+
/* 2813 */ MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 2827
|
|
807
|
+
/* 2818 */ MCD_OPC_CheckPredicate, 4, 96, 4, 0, // Skip to: 3943
|
|
808
|
+
/* 2823 */ MCD_OPC_Decode, 213, 2, 38, // Opcode: FDIV_S
|
|
809
|
+
/* 2827 */ MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 2841
|
|
810
|
+
/* 2832 */ MCD_OPC_CheckPredicate, 5, 82, 4, 0, // Skip to: 3943
|
|
811
|
+
/* 2837 */ MCD_OPC_Decode, 212, 2, 39, // Opcode: FDIV_D
|
|
812
|
+
/* 2841 */ MCD_OPC_FilterValue, 16, 45, 0, 0, // Skip to: 2891
|
|
813
|
+
/* 2846 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
814
|
+
/* 2849 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2863
|
|
815
|
+
/* 2854 */ MCD_OPC_CheckPredicate, 4, 60, 4, 0, // Skip to: 3943
|
|
816
|
+
/* 2859 */ MCD_OPC_Decode, 249, 2, 40, // Opcode: FSGNJ_S
|
|
817
|
+
/* 2863 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2877
|
|
818
|
+
/* 2868 */ MCD_OPC_CheckPredicate, 4, 46, 4, 0, // Skip to: 3943
|
|
819
|
+
/* 2873 */ MCD_OPC_Decode, 245, 2, 40, // Opcode: FSGNJN_S
|
|
820
|
+
/* 2877 */ MCD_OPC_FilterValue, 2, 37, 4, 0, // Skip to: 3943
|
|
821
|
+
/* 2882 */ MCD_OPC_CheckPredicate, 4, 32, 4, 0, // Skip to: 3943
|
|
822
|
+
/* 2887 */ MCD_OPC_Decode, 247, 2, 40, // Opcode: FSGNJX_S
|
|
823
|
+
/* 2891 */ MCD_OPC_FilterValue, 17, 45, 0, 0, // Skip to: 2941
|
|
824
|
+
/* 2896 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
825
|
+
/* 2899 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2913
|
|
826
|
+
/* 2904 */ MCD_OPC_CheckPredicate, 5, 10, 4, 0, // Skip to: 3943
|
|
827
|
+
/* 2909 */ MCD_OPC_Decode, 248, 2, 41, // Opcode: FSGNJ_D
|
|
828
|
+
/* 2913 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2927
|
|
829
|
+
/* 2918 */ MCD_OPC_CheckPredicate, 5, 252, 3, 0, // Skip to: 3943
|
|
830
|
+
/* 2923 */ MCD_OPC_Decode, 244, 2, 41, // Opcode: FSGNJN_D
|
|
831
|
+
/* 2927 */ MCD_OPC_FilterValue, 2, 243, 3, 0, // Skip to: 3943
|
|
832
|
+
/* 2932 */ MCD_OPC_CheckPredicate, 5, 238, 3, 0, // Skip to: 3943
|
|
833
|
+
/* 2937 */ MCD_OPC_Decode, 246, 2, 41, // Opcode: FSGNJX_D
|
|
834
|
+
/* 2941 */ MCD_OPC_FilterValue, 20, 31, 0, 0, // Skip to: 2977
|
|
835
|
+
/* 2946 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
836
|
+
/* 2949 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2963
|
|
837
|
+
/* 2954 */ MCD_OPC_CheckPredicate, 4, 216, 3, 0, // Skip to: 3943
|
|
838
|
+
/* 2959 */ MCD_OPC_Decode, 230, 2, 40, // Opcode: FMIN_S
|
|
839
|
+
/* 2963 */ MCD_OPC_FilterValue, 1, 207, 3, 0, // Skip to: 3943
|
|
840
|
+
/* 2968 */ MCD_OPC_CheckPredicate, 4, 202, 3, 0, // Skip to: 3943
|
|
841
|
+
/* 2973 */ MCD_OPC_Decode, 228, 2, 40, // Opcode: FMAX_S
|
|
842
|
+
/* 2977 */ MCD_OPC_FilterValue, 21, 31, 0, 0, // Skip to: 3013
|
|
843
|
+
/* 2982 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
844
|
+
/* 2985 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2999
|
|
845
|
+
/* 2990 */ MCD_OPC_CheckPredicate, 5, 180, 3, 0, // Skip to: 3943
|
|
846
|
+
/* 2995 */ MCD_OPC_Decode, 229, 2, 41, // Opcode: FMIN_D
|
|
847
|
+
/* 2999 */ MCD_OPC_FilterValue, 1, 171, 3, 0, // Skip to: 3943
|
|
848
|
+
/* 3004 */ MCD_OPC_CheckPredicate, 5, 166, 3, 0, // Skip to: 3943
|
|
849
|
+
/* 3009 */ MCD_OPC_Decode, 227, 2, 41, // Opcode: FMAX_D
|
|
850
|
+
/* 3013 */ MCD_OPC_FilterValue, 32, 16, 0, 0, // Skip to: 3034
|
|
851
|
+
/* 3018 */ MCD_OPC_CheckPredicate, 5, 152, 3, 0, // Skip to: 3943
|
|
852
|
+
/* 3023 */ MCD_OPC_CheckField, 20, 5, 1, 145, 3, 0, // Skip to: 3943
|
|
853
|
+
/* 3030 */ MCD_OPC_Decode, 203, 2, 42, // Opcode: FCVT_S_D
|
|
854
|
+
/* 3034 */ MCD_OPC_FilterValue, 33, 23, 0, 0, // Skip to: 3062
|
|
855
|
+
/* 3039 */ MCD_OPC_CheckPredicate, 5, 131, 3, 0, // Skip to: 3943
|
|
856
|
+
/* 3044 */ MCD_OPC_CheckField, 20, 5, 0, 124, 3, 0, // Skip to: 3943
|
|
857
|
+
/* 3051 */ MCD_OPC_CheckField, 12, 3, 0, 117, 3, 0, // Skip to: 3943
|
|
858
|
+
/* 3058 */ MCD_OPC_Decode, 196, 2, 43, // Opcode: FCVT_D_S
|
|
859
|
+
/* 3062 */ MCD_OPC_FilterValue, 44, 16, 0, 0, // Skip to: 3083
|
|
860
|
+
/* 3067 */ MCD_OPC_CheckPredicate, 4, 103, 3, 0, // Skip to: 3943
|
|
861
|
+
/* 3072 */ MCD_OPC_CheckField, 20, 5, 0, 96, 3, 0, // Skip to: 3943
|
|
862
|
+
/* 3079 */ MCD_OPC_Decode, 251, 2, 44, // Opcode: FSQRT_S
|
|
863
|
+
/* 3083 */ MCD_OPC_FilterValue, 45, 16, 0, 0, // Skip to: 3104
|
|
864
|
+
/* 3088 */ MCD_OPC_CheckPredicate, 5, 82, 3, 0, // Skip to: 3943
|
|
865
|
+
/* 3093 */ MCD_OPC_CheckField, 20, 5, 0, 75, 3, 0, // Skip to: 3943
|
|
866
|
+
/* 3100 */ MCD_OPC_Decode, 250, 2, 45, // Opcode: FSQRT_D
|
|
867
|
+
/* 3104 */ MCD_OPC_FilterValue, 80, 45, 0, 0, // Skip to: 3154
|
|
868
|
+
/* 3109 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
869
|
+
/* 3112 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3126
|
|
870
|
+
/* 3117 */ MCD_OPC_CheckPredicate, 4, 53, 3, 0, // Skip to: 3943
|
|
871
|
+
/* 3122 */ MCD_OPC_Decode, 221, 2, 46, // Opcode: FLE_S
|
|
872
|
+
/* 3126 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3140
|
|
873
|
+
/* 3131 */ MCD_OPC_CheckPredicate, 4, 39, 3, 0, // Skip to: 3943
|
|
874
|
+
/* 3136 */ MCD_OPC_Decode, 223, 2, 46, // Opcode: FLT_S
|
|
875
|
+
/* 3140 */ MCD_OPC_FilterValue, 2, 30, 3, 0, // Skip to: 3943
|
|
876
|
+
/* 3145 */ MCD_OPC_CheckPredicate, 4, 25, 3, 0, // Skip to: 3943
|
|
877
|
+
/* 3150 */ MCD_OPC_Decode, 218, 2, 46, // Opcode: FEQ_S
|
|
878
|
+
/* 3154 */ MCD_OPC_FilterValue, 81, 45, 0, 0, // Skip to: 3204
|
|
879
|
+
/* 3159 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
880
|
+
/* 3162 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3176
|
|
881
|
+
/* 3167 */ MCD_OPC_CheckPredicate, 5, 3, 3, 0, // Skip to: 3943
|
|
882
|
+
/* 3172 */ MCD_OPC_Decode, 220, 2, 47, // Opcode: FLE_D
|
|
883
|
+
/* 3176 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3190
|
|
884
|
+
/* 3181 */ MCD_OPC_CheckPredicate, 5, 245, 2, 0, // Skip to: 3943
|
|
885
|
+
/* 3186 */ MCD_OPC_Decode, 222, 2, 47, // Opcode: FLT_D
|
|
886
|
+
/* 3190 */ MCD_OPC_FilterValue, 2, 236, 2, 0, // Skip to: 3943
|
|
887
|
+
/* 3195 */ MCD_OPC_CheckPredicate, 5, 231, 2, 0, // Skip to: 3943
|
|
888
|
+
/* 3200 */ MCD_OPC_Decode, 217, 2, 47, // Opcode: FEQ_D
|
|
889
|
+
/* 3204 */ MCD_OPC_FilterValue, 96, 59, 0, 0, // Skip to: 3268
|
|
890
|
+
/* 3209 */ MCD_OPC_ExtractField, 20, 5, // Inst{24-20} ...
|
|
891
|
+
/* 3212 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3226
|
|
892
|
+
/* 3217 */ MCD_OPC_CheckPredicate, 4, 209, 2, 0, // Skip to: 3943
|
|
893
|
+
/* 3222 */ MCD_OPC_Decode, 211, 2, 48, // Opcode: FCVT_W_S
|
|
894
|
+
/* 3226 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3240
|
|
895
|
+
/* 3231 */ MCD_OPC_CheckPredicate, 4, 195, 2, 0, // Skip to: 3943
|
|
896
|
+
/* 3236 */ MCD_OPC_Decode, 209, 2, 48, // Opcode: FCVT_WU_S
|
|
897
|
+
/* 3240 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3254
|
|
898
|
+
/* 3245 */ MCD_OPC_CheckPredicate, 10, 181, 2, 0, // Skip to: 3943
|
|
899
|
+
/* 3250 */ MCD_OPC_Decode, 202, 2, 48, // Opcode: FCVT_L_S
|
|
900
|
+
/* 3254 */ MCD_OPC_FilterValue, 3, 172, 2, 0, // Skip to: 3943
|
|
901
|
+
/* 3259 */ MCD_OPC_CheckPredicate, 10, 167, 2, 0, // Skip to: 3943
|
|
902
|
+
/* 3264 */ MCD_OPC_Decode, 200, 2, 48, // Opcode: FCVT_LU_S
|
|
903
|
+
/* 3268 */ MCD_OPC_FilterValue, 97, 59, 0, 0, // Skip to: 3332
|
|
904
|
+
/* 3273 */ MCD_OPC_ExtractField, 20, 5, // Inst{24-20} ...
|
|
905
|
+
/* 3276 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3290
|
|
906
|
+
/* 3281 */ MCD_OPC_CheckPredicate, 5, 145, 2, 0, // Skip to: 3943
|
|
907
|
+
/* 3286 */ MCD_OPC_Decode, 210, 2, 49, // Opcode: FCVT_W_D
|
|
908
|
+
/* 3290 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3304
|
|
909
|
+
/* 3295 */ MCD_OPC_CheckPredicate, 5, 131, 2, 0, // Skip to: 3943
|
|
910
|
+
/* 3300 */ MCD_OPC_Decode, 208, 2, 49, // Opcode: FCVT_WU_D
|
|
911
|
+
/* 3304 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3318
|
|
912
|
+
/* 3309 */ MCD_OPC_CheckPredicate, 11, 117, 2, 0, // Skip to: 3943
|
|
913
|
+
/* 3314 */ MCD_OPC_Decode, 201, 2, 49, // Opcode: FCVT_L_D
|
|
914
|
+
/* 3318 */ MCD_OPC_FilterValue, 3, 108, 2, 0, // Skip to: 3943
|
|
915
|
+
/* 3323 */ MCD_OPC_CheckPredicate, 11, 103, 2, 0, // Skip to: 3943
|
|
916
|
+
/* 3328 */ MCD_OPC_Decode, 199, 2, 49, // Opcode: FCVT_LU_D
|
|
917
|
+
/* 3332 */ MCD_OPC_FilterValue, 104, 59, 0, 0, // Skip to: 3396
|
|
918
|
+
/* 3337 */ MCD_OPC_ExtractField, 20, 5, // Inst{24-20} ...
|
|
919
|
+
/* 3340 */ MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3354
|
|
920
|
+
/* 3345 */ MCD_OPC_CheckPredicate, 4, 81, 2, 0, // Skip to: 3943
|
|
921
|
+
/* 3350 */ MCD_OPC_Decode, 206, 2, 50, // Opcode: FCVT_S_W
|
|
922
|
+
/* 3354 */ MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3368
|
|
923
|
+
/* 3359 */ MCD_OPC_CheckPredicate, 4, 67, 2, 0, // Skip to: 3943
|
|
924
|
+
/* 3364 */ MCD_OPC_Decode, 207, 2, 50, // Opcode: FCVT_S_WU
|
|
925
|
+
/* 3368 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3382
|
|
926
|
+
/* 3373 */ MCD_OPC_CheckPredicate, 10, 53, 2, 0, // Skip to: 3943
|
|
927
|
+
/* 3378 */ MCD_OPC_Decode, 204, 2, 50, // Opcode: FCVT_S_L
|
|
928
|
+
/* 3382 */ MCD_OPC_FilterValue, 3, 44, 2, 0, // Skip to: 3943
|
|
929
|
+
/* 3387 */ MCD_OPC_CheckPredicate, 10, 39, 2, 0, // Skip to: 3943
|
|
930
|
+
/* 3392 */ MCD_OPC_Decode, 205, 2, 50, // Opcode: FCVT_S_LU
|
|
931
|
+
/* 3396 */ MCD_OPC_FilterValue, 105, 73, 0, 0, // Skip to: 3474
|
|
932
|
+
/* 3401 */ MCD_OPC_ExtractField, 20, 5, // Inst{24-20} ...
|
|
933
|
+
/* 3404 */ MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3425
|
|
934
|
+
/* 3409 */ MCD_OPC_CheckPredicate, 5, 17, 2, 0, // Skip to: 3943
|
|
935
|
+
/* 3414 */ MCD_OPC_CheckField, 12, 3, 0, 10, 2, 0, // Skip to: 3943
|
|
936
|
+
/* 3421 */ MCD_OPC_Decode, 197, 2, 51, // Opcode: FCVT_D_W
|
|
937
|
+
/* 3425 */ MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 3446
|
|
938
|
+
/* 3430 */ MCD_OPC_CheckPredicate, 5, 252, 1, 0, // Skip to: 3943
|
|
939
|
+
/* 3435 */ MCD_OPC_CheckField, 12, 3, 0, 245, 1, 0, // Skip to: 3943
|
|
940
|
+
/* 3442 */ MCD_OPC_Decode, 198, 2, 51, // Opcode: FCVT_D_WU
|
|
941
|
+
/* 3446 */ MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3460
|
|
942
|
+
/* 3451 */ MCD_OPC_CheckPredicate, 11, 231, 1, 0, // Skip to: 3943
|
|
943
|
+
/* 3456 */ MCD_OPC_Decode, 194, 2, 52, // Opcode: FCVT_D_L
|
|
944
|
+
/* 3460 */ MCD_OPC_FilterValue, 3, 222, 1, 0, // Skip to: 3943
|
|
945
|
+
/* 3465 */ MCD_OPC_CheckPredicate, 11, 217, 1, 0, // Skip to: 3943
|
|
946
|
+
/* 3470 */ MCD_OPC_Decode, 195, 2, 52, // Opcode: FCVT_D_LU
|
|
947
|
+
/* 3474 */ MCD_OPC_FilterValue, 112, 45, 0, 0, // Skip to: 3524
|
|
948
|
+
/* 3479 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
949
|
+
/* 3482 */ MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3503
|
|
950
|
+
/* 3487 */ MCD_OPC_CheckPredicate, 4, 195, 1, 0, // Skip to: 3943
|
|
951
|
+
/* 3492 */ MCD_OPC_CheckField, 20, 5, 0, 188, 1, 0, // Skip to: 3943
|
|
952
|
+
/* 3499 */ MCD_OPC_Decode, 238, 2, 53, // Opcode: FMV_X_W
|
|
953
|
+
/* 3503 */ MCD_OPC_FilterValue, 1, 179, 1, 0, // Skip to: 3943
|
|
954
|
+
/* 3508 */ MCD_OPC_CheckPredicate, 4, 174, 1, 0, // Skip to: 3943
|
|
955
|
+
/* 3513 */ MCD_OPC_CheckField, 20, 5, 0, 167, 1, 0, // Skip to: 3943
|
|
956
|
+
/* 3520 */ MCD_OPC_Decode, 193, 2, 53, // Opcode: FCLASS_S
|
|
957
|
+
/* 3524 */ MCD_OPC_FilterValue, 113, 45, 0, 0, // Skip to: 3574
|
|
958
|
+
/* 3529 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
959
|
+
/* 3532 */ MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3553
|
|
960
|
+
/* 3537 */ MCD_OPC_CheckPredicate, 11, 145, 1, 0, // Skip to: 3943
|
|
961
|
+
/* 3542 */ MCD_OPC_CheckField, 20, 5, 0, 138, 1, 0, // Skip to: 3943
|
|
962
|
+
/* 3549 */ MCD_OPC_Decode, 237, 2, 54, // Opcode: FMV_X_D
|
|
963
|
+
/* 3553 */ MCD_OPC_FilterValue, 1, 129, 1, 0, // Skip to: 3943
|
|
964
|
+
/* 3558 */ MCD_OPC_CheckPredicate, 5, 124, 1, 0, // Skip to: 3943
|
|
965
|
+
/* 3563 */ MCD_OPC_CheckField, 20, 5, 0, 117, 1, 0, // Skip to: 3943
|
|
966
|
+
/* 3570 */ MCD_OPC_Decode, 192, 2, 54, // Opcode: FCLASS_D
|
|
967
|
+
/* 3574 */ MCD_OPC_FilterValue, 120, 23, 0, 0, // Skip to: 3602
|
|
968
|
+
/* 3579 */ MCD_OPC_CheckPredicate, 4, 103, 1, 0, // Skip to: 3943
|
|
969
|
+
/* 3584 */ MCD_OPC_CheckField, 20, 5, 0, 96, 1, 0, // Skip to: 3943
|
|
970
|
+
/* 3591 */ MCD_OPC_CheckField, 12, 3, 0, 89, 1, 0, // Skip to: 3943
|
|
971
|
+
/* 3598 */ MCD_OPC_Decode, 236, 2, 55, // Opcode: FMV_W_X
|
|
972
|
+
/* 3602 */ MCD_OPC_FilterValue, 121, 80, 1, 0, // Skip to: 3943
|
|
973
|
+
/* 3607 */ MCD_OPC_CheckPredicate, 11, 75, 1, 0, // Skip to: 3943
|
|
974
|
+
/* 3612 */ MCD_OPC_CheckField, 20, 5, 0, 68, 1, 0, // Skip to: 3943
|
|
975
|
+
/* 3619 */ MCD_OPC_CheckField, 12, 3, 0, 61, 1, 0, // Skip to: 3943
|
|
976
|
+
/* 3626 */ MCD_OPC_Decode, 235, 2, 51, // Opcode: FMV_D_X
|
|
977
|
+
/* 3630 */ MCD_OPC_FilterValue, 99, 57, 0, 0, // Skip to: 3692
|
|
978
|
+
/* 3635 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
979
|
+
/* 3638 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 3647
|
|
980
|
+
/* 3643 */ MCD_OPC_Decode, 129, 2, 56, // Opcode: BEQ
|
|
981
|
+
/* 3647 */ MCD_OPC_FilterValue, 1, 4, 0, 0, // Skip to: 3656
|
|
982
|
+
/* 3652 */ MCD_OPC_Decode, 134, 2, 56, // Opcode: BNE
|
|
983
|
+
/* 3656 */ MCD_OPC_FilterValue, 4, 4, 0, 0, // Skip to: 3665
|
|
984
|
+
/* 3661 */ MCD_OPC_Decode, 132, 2, 56, // Opcode: BLT
|
|
985
|
+
/* 3665 */ MCD_OPC_FilterValue, 5, 4, 0, 0, // Skip to: 3674
|
|
986
|
+
/* 3670 */ MCD_OPC_Decode, 130, 2, 56, // Opcode: BGE
|
|
987
|
+
/* 3674 */ MCD_OPC_FilterValue, 6, 4, 0, 0, // Skip to: 3683
|
|
988
|
+
/* 3679 */ MCD_OPC_Decode, 133, 2, 56, // Opcode: BLTU
|
|
989
|
+
/* 3683 */ MCD_OPC_FilterValue, 7, 255, 0, 0, // Skip to: 3943
|
|
990
|
+
/* 3688 */ MCD_OPC_Decode, 131, 2, 56, // Opcode: BGEU
|
|
991
|
+
/* 3692 */ MCD_OPC_FilterValue, 103, 11, 0, 0, // Skip to: 3708
|
|
992
|
+
/* 3697 */ MCD_OPC_CheckField, 12, 3, 0, 239, 0, 0, // Skip to: 3943
|
|
993
|
+
/* 3704 */ MCD_OPC_Decode, 128, 3, 24, // Opcode: JALR
|
|
994
|
+
/* 3708 */ MCD_OPC_FilterValue, 111, 4, 0, 0, // Skip to: 3717
|
|
995
|
+
/* 3713 */ MCD_OPC_Decode, 255, 2, 57, // Opcode: JAL
|
|
996
|
+
/* 3717 */ MCD_OPC_FilterValue, 115, 221, 0, 0, // Skip to: 3943
|
|
997
|
+
/* 3722 */ MCD_OPC_ExtractField, 12, 3, // Inst{14-12} ...
|
|
998
|
+
/* 3725 */ MCD_OPC_FilterValue, 0, 139, 0, 0, // Skip to: 3869
|
|
999
|
+
/* 3730 */ MCD_OPC_ExtractField, 25, 7, // Inst{31-25} ...
|
|
1000
|
+
/* 3733 */ MCD_OPC_FilterValue, 0, 51, 0, 0, // Skip to: 3789
|
|
1001
|
+
/* 3738 */ MCD_OPC_ExtractField, 15, 10, // Inst{24-15} ...
|
|
1002
|
+
/* 3741 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 3757
|
|
1003
|
+
/* 3746 */ MCD_OPC_CheckField, 7, 5, 0, 190, 0, 0, // Skip to: 3943
|
|
1004
|
+
/* 3753 */ MCD_OPC_Decode, 189, 2, 0, // Opcode: ECALL
|
|
1005
|
+
/* 3757 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 3773
|
|
1006
|
+
/* 3762 */ MCD_OPC_CheckField, 7, 5, 0, 174, 0, 0, // Skip to: 3943
|
|
1007
|
+
/* 3769 */ MCD_OPC_Decode, 188, 2, 0, // Opcode: EBREAK
|
|
1008
|
+
/* 3773 */ MCD_OPC_FilterValue, 64, 165, 0, 0, // Skip to: 3943
|
|
1009
|
+
/* 3778 */ MCD_OPC_CheckField, 7, 5, 0, 158, 0, 0, // Skip to: 3943
|
|
1010
|
+
/* 3785 */ MCD_OPC_Decode, 190, 3, 0, // Opcode: URET
|
|
1011
|
+
/* 3789 */ MCD_OPC_FilterValue, 8, 36, 0, 0, // Skip to: 3830
|
|
1012
|
+
/* 3794 */ MCD_OPC_ExtractField, 15, 10, // Inst{24-15} ...
|
|
1013
|
+
/* 3797 */ MCD_OPC_FilterValue, 64, 11, 0, 0, // Skip to: 3813
|
|
1014
|
+
/* 3802 */ MCD_OPC_CheckField, 7, 5, 0, 134, 0, 0, // Skip to: 3943
|
|
1015
|
+
/* 3809 */ MCD_OPC_Decode, 181, 3, 0, // Opcode: SRET
|
|
1016
|
+
/* 3813 */ MCD_OPC_FilterValue, 160, 1, 124, 0, 0, // Skip to: 3943
|
|
1017
|
+
/* 3819 */ MCD_OPC_CheckField, 7, 5, 0, 117, 0, 0, // Skip to: 3943
|
|
1018
|
+
/* 3826 */ MCD_OPC_Decode, 191, 3, 0, // Opcode: WFI
|
|
1019
|
+
/* 3830 */ MCD_OPC_FilterValue, 9, 11, 0, 0, // Skip to: 3846
|
|
1020
|
+
/* 3835 */ MCD_OPC_CheckField, 7, 5, 0, 101, 0, 0, // Skip to: 3943
|
|
1021
|
+
/* 3842 */ MCD_OPC_Decode, 167, 3, 58, // Opcode: SFENCE_VMA
|
|
1022
|
+
/* 3846 */ MCD_OPC_FilterValue, 24, 92, 0, 0, // Skip to: 3943
|
|
1023
|
+
/* 3851 */ MCD_OPC_CheckField, 15, 10, 64, 85, 0, 0, // Skip to: 3943
|
|
1024
|
+
/* 3858 */ MCD_OPC_CheckField, 7, 5, 0, 78, 0, 0, // Skip to: 3943
|
|
1025
|
+
/* 3865 */ MCD_OPC_Decode, 145, 3, 0, // Opcode: MRET
|
|
1026
|
+
/* 3869 */ MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 3898
|
|
1027
|
+
/* 3874 */ MCD_OPC_CheckField, 15, 17, 128, 128, 6, 11, 0, 0, // Skip to: 3894
|
|
1028
|
+
/* 3883 */ MCD_OPC_CheckField, 7, 5, 0, 4, 0, 0, // Skip to: 3894
|
|
1029
|
+
/* 3890 */ MCD_OPC_Decode, 189, 3, 0, // Opcode: UNIMP
|
|
1030
|
+
/* 3894 */ MCD_OPC_Decode, 139, 2, 59, // Opcode: CSRRW
|
|
1031
|
+
/* 3898 */ MCD_OPC_FilterValue, 2, 4, 0, 0, // Skip to: 3907
|
|
1032
|
+
/* 3903 */ MCD_OPC_Decode, 137, 2, 59, // Opcode: CSRRS
|
|
1033
|
+
/* 3907 */ MCD_OPC_FilterValue, 3, 4, 0, 0, // Skip to: 3916
|
|
1034
|
+
/* 3912 */ MCD_OPC_Decode, 135, 2, 59, // Opcode: CSRRC
|
|
1035
|
+
/* 3916 */ MCD_OPC_FilterValue, 5, 4, 0, 0, // Skip to: 3925
|
|
1036
|
+
/* 3921 */ MCD_OPC_Decode, 140, 2, 60, // Opcode: CSRRWI
|
|
1037
|
+
/* 3925 */ MCD_OPC_FilterValue, 6, 4, 0, 0, // Skip to: 3934
|
|
1038
|
+
/* 3930 */ MCD_OPC_Decode, 138, 2, 60, // Opcode: CSRRSI
|
|
1039
|
+
/* 3934 */ MCD_OPC_FilterValue, 7, 4, 0, 0, // Skip to: 3943
|
|
1040
|
+
/* 3939 */ MCD_OPC_Decode, 136, 2, 60, // Opcode: CSRRCI
|
|
1041
|
+
/* 3943 */ MCD_OPC_Fail,
|
|
1042
|
+
0
|
|
1043
|
+
};
|
|
1044
|
+
|
|
1045
|
+
static const uint8_t DecoderTableRISCV32Only_16[] = {
|
|
1046
|
+
/* 0 */ MCD_OPC_ExtractField, 0, 2, // Inst{1-0} ...
|
|
1047
|
+
/* 3 */ MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 39
|
|
1048
|
+
/* 8 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
|
|
1049
|
+
/* 11 */ MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 25
|
|
1050
|
+
/* 16 */ MCD_OPC_CheckPredicate, 12, 75, 0, 0, // Skip to: 96
|
|
1051
|
+
/* 21 */ MCD_OPC_Decode, 154, 2, 61, // Opcode: C_FLW
|
|
1052
|
+
/* 25 */ MCD_OPC_FilterValue, 7, 66, 0, 0, // Skip to: 96
|
|
1053
|
+
/* 30 */ MCD_OPC_CheckPredicate, 12, 61, 0, 0, // Skip to: 96
|
|
1054
|
+
/* 35 */ MCD_OPC_Decode, 158, 2, 61, // Opcode: C_FSW
|
|
1055
|
+
/* 39 */ MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 60
|
|
1056
|
+
/* 44 */ MCD_OPC_CheckPredicate, 13, 47, 0, 0, // Skip to: 96
|
|
1057
|
+
/* 49 */ MCD_OPC_CheckField, 13, 3, 1, 40, 0, 0, // Skip to: 96
|
|
1058
|
+
/* 56 */ MCD_OPC_Decode, 161, 2, 19, // Opcode: C_JAL
|
|
1059
|
+
/* 60 */ MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 96
|
|
1060
|
+
/* 65 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
|
|
1061
|
+
/* 68 */ MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 82
|
|
1062
|
+
/* 73 */ MCD_OPC_CheckPredicate, 12, 18, 0, 0, // Skip to: 96
|
|
1063
|
+
/* 78 */ MCD_OPC_Decode, 155, 2, 62, // Opcode: C_FLWSP
|
|
1064
|
+
/* 82 */ MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 96
|
|
1065
|
+
/* 87 */ MCD_OPC_CheckPredicate, 12, 4, 0, 0, // Skip to: 96
|
|
1066
|
+
/* 92 */ MCD_OPC_Decode, 159, 2, 63, // Opcode: C_FSWSP
|
|
1067
|
+
/* 96 */ MCD_OPC_Fail,
|
|
1068
|
+
0
|
|
1069
|
+
};
|
|
1070
|
+
|
|
1071
|
+
static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits)
|
|
1072
|
+
{
|
|
1073
|
+
switch (Idx) {
|
|
1074
|
+
default: CS_ASSERT(0 && "Invalid index!");
|
|
1075
|
+
case 0:
|
|
1076
|
+
return (Bits & RISCV_FeatureStdExtC);
|
|
1077
|
+
case 1:
|
|
1078
|
+
return (Bits & RISCV_FeatureStdExtC) && (Bits & RISCV_FeatureStdExtD);
|
|
1079
|
+
case 2:
|
|
1080
|
+
return (Bits & RISCV_FeatureStdExtC) && (Bits & RISCV_Feature64Bit);
|
|
1081
|
+
case 3:
|
|
1082
|
+
return (Bits & RISCV_Feature64Bit);
|
|
1083
|
+
case 4:
|
|
1084
|
+
return (Bits & RISCV_FeatureStdExtF);
|
|
1085
|
+
case 5:
|
|
1086
|
+
return (Bits & RISCV_FeatureStdExtD);
|
|
1087
|
+
case 6:
|
|
1088
|
+
return (Bits & RISCV_FeatureStdExtA);
|
|
1089
|
+
case 7:
|
|
1090
|
+
return (Bits & RISCV_FeatureStdExtA) && (Bits & RISCV_Feature64Bit);
|
|
1091
|
+
case 8:
|
|
1092
|
+
return (Bits & RISCV_FeatureStdExtM);
|
|
1093
|
+
case 9:
|
|
1094
|
+
return (Bits & RISCV_FeatureStdExtM) && (Bits & RISCV_Feature64Bit);
|
|
1095
|
+
case 10:
|
|
1096
|
+
return (Bits & RISCV_FeatureStdExtF) && (Bits & RISCV_Feature64Bit);
|
|
1097
|
+
case 11:
|
|
1098
|
+
return (Bits & RISCV_FeatureStdExtD) && (Bits & RISCV_Feature64Bit);
|
|
1099
|
+
case 12:
|
|
1100
|
+
return (Bits & RISCV_FeatureStdExtC) && (Bits & RISCV_FeatureStdExtF) && !(Bits & RISCV_Feature64Bit);
|
|
1101
|
+
case 13:
|
|
1102
|
+
return (Bits & RISCV_FeatureStdExtC) && !(Bits & RISCV_Feature64Bit);
|
|
1103
|
+
}
|
|
1104
|
+
}
|
|
1105
|
+
|
|
1106
|
+
#define DecodeToMCInst(fname, fieldname, InsnType) \
|
|
1107
|
+
static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
|
|
1108
|
+
uint64_t Address, const void *Decoder,\
|
|
1109
|
+
bool *DecodeComplete) {\
|
|
1110
|
+
*DecodeComplete = true;\
|
|
1111
|
+
InsnType tmp; \
|
|
1112
|
+
switch (Idx) { \
|
|
1113
|
+
default: CS_ASSERT(0 && "Invalid index!");\
|
|
1114
|
+
case 0: \
|
|
1115
|
+
return S; \
|
|
1116
|
+
case 1: \
|
|
1117
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1118
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1119
|
+
tmp = 0; \
|
|
1120
|
+
tmp |= fieldname(insn, 5, 1) << 3; \
|
|
1121
|
+
tmp |= fieldname(insn, 6, 1) << 2; \
|
|
1122
|
+
tmp |= fieldname(insn, 7, 4) << 6; \
|
|
1123
|
+
tmp |= fieldname(insn, 11, 2) << 4; \
|
|
1124
|
+
if (decodeUImmNonZeroOperand(MI, tmp, Address, Decoder, 10) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1125
|
+
return S; \
|
|
1126
|
+
case 2: \
|
|
1127
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1128
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1129
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1130
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1131
|
+
tmp = 0; \
|
|
1132
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1133
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1134
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1135
|
+
return S; \
|
|
1136
|
+
case 3: \
|
|
1137
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1138
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1139
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1140
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1141
|
+
tmp = 0; \
|
|
1142
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1143
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1144
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1145
|
+
return S; \
|
|
1146
|
+
case 4: \
|
|
1147
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1148
|
+
if (DecodeFPR64CRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1149
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1150
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1151
|
+
tmp = 0; \
|
|
1152
|
+
tmp |= fieldname(insn, 5, 2) << 6; \
|
|
1153
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1154
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1155
|
+
return S; \
|
|
1156
|
+
case 5: \
|
|
1157
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1158
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1159
|
+
tmp = 0; \
|
|
1160
|
+
tmp |= fieldname(insn, 2, 3) << 6; \
|
|
1161
|
+
tmp |= fieldname(insn, 5, 2) << 3; \
|
|
1162
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1163
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 9) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1164
|
+
return S; \
|
|
1165
|
+
case 6: \
|
|
1166
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1167
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1168
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1169
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1170
|
+
tmp = 0; \
|
|
1171
|
+
tmp |= fieldname(insn, 5, 1) << 6; \
|
|
1172
|
+
tmp |= fieldname(insn, 6, 1) << 2; \
|
|
1173
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1174
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 7) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1175
|
+
return S; \
|
|
1176
|
+
case 7: \
|
|
1177
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1178
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1179
|
+
tmp = 0; \
|
|
1180
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1181
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1182
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1183
|
+
return S; \
|
|
1184
|
+
case 8: \
|
|
1185
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1186
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1187
|
+
tmp = 0; \
|
|
1188
|
+
tmp |= fieldname(insn, 2, 2) << 6; \
|
|
1189
|
+
tmp |= fieldname(insn, 4, 3) << 2; \
|
|
1190
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1191
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1192
|
+
return S; \
|
|
1193
|
+
case 9: \
|
|
1194
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1195
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1196
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1197
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1198
|
+
tmp = 0; \
|
|
1199
|
+
tmp |= fieldname(insn, 5, 2) << 6; \
|
|
1200
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1201
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1202
|
+
return S; \
|
|
1203
|
+
case 10: \
|
|
1204
|
+
tmp = 0; \
|
|
1205
|
+
tmp |= fieldname(insn, 2, 1) << 5; \
|
|
1206
|
+
tmp |= fieldname(insn, 3, 2) << 7; \
|
|
1207
|
+
tmp |= fieldname(insn, 5, 1) << 6; \
|
|
1208
|
+
tmp |= fieldname(insn, 6, 1) << 4; \
|
|
1209
|
+
tmp |= fieldname(insn, 12, 1) << 9; \
|
|
1210
|
+
if (decodeSImmNonZeroOperand(MI, tmp, Address, Decoder, 10) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1211
|
+
return S; \
|
|
1212
|
+
case 11: \
|
|
1213
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1214
|
+
if (DecodeGPRNoX0X2RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1215
|
+
tmp = 0; \
|
|
1216
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1217
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1218
|
+
if (decodeCLUIImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1219
|
+
return S; \
|
|
1220
|
+
case 12: \
|
|
1221
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1222
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1223
|
+
tmp = 0; \
|
|
1224
|
+
tmp |= fieldname(insn, 2, 3) << 6; \
|
|
1225
|
+
tmp |= fieldname(insn, 5, 2) << 3; \
|
|
1226
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1227
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 9) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1228
|
+
return S; \
|
|
1229
|
+
case 13: \
|
|
1230
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1231
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1232
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1233
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1234
|
+
tmp = 0; \
|
|
1235
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1236
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1237
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1238
|
+
return S; \
|
|
1239
|
+
case 14: \
|
|
1240
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1241
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1242
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1243
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1244
|
+
tmp = 0; \
|
|
1245
|
+
tmp |= fieldname(insn, 2, 5) << 0; \
|
|
1246
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1247
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1248
|
+
return S; \
|
|
1249
|
+
case 15: \
|
|
1250
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1251
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1252
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1253
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1254
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1255
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1256
|
+
return S; \
|
|
1257
|
+
case 16: \
|
|
1258
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1259
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1260
|
+
return S; \
|
|
1261
|
+
case 17: \
|
|
1262
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1263
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1264
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1265
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1266
|
+
return S; \
|
|
1267
|
+
case 18: \
|
|
1268
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1269
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1270
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1271
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1272
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1273
|
+
if (DecodeGPRNoX0RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1274
|
+
return S; \
|
|
1275
|
+
case 19: \
|
|
1276
|
+
tmp = 0; \
|
|
1277
|
+
tmp |= fieldname(insn, 2, 1) << 4; \
|
|
1278
|
+
tmp |= fieldname(insn, 3, 3) << 0; \
|
|
1279
|
+
tmp |= fieldname(insn, 6, 1) << 6; \
|
|
1280
|
+
tmp |= fieldname(insn, 7, 1) << 5; \
|
|
1281
|
+
tmp |= fieldname(insn, 8, 1) << 9; \
|
|
1282
|
+
tmp |= fieldname(insn, 9, 2) << 7; \
|
|
1283
|
+
tmp |= fieldname(insn, 11, 1) << 3; \
|
|
1284
|
+
tmp |= fieldname(insn, 12, 1) << 10; \
|
|
1285
|
+
if (decodeSImmOperandAndLsl1(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1286
|
+
return S; \
|
|
1287
|
+
case 20: \
|
|
1288
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1289
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1290
|
+
tmp = 0; \
|
|
1291
|
+
tmp |= fieldname(insn, 7, 3) << 6; \
|
|
1292
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1293
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 9) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1294
|
+
return S; \
|
|
1295
|
+
case 21: \
|
|
1296
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1297
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1298
|
+
tmp = 0; \
|
|
1299
|
+
tmp |= fieldname(insn, 2, 1) << 4; \
|
|
1300
|
+
tmp |= fieldname(insn, 3, 2) << 0; \
|
|
1301
|
+
tmp |= fieldname(insn, 5, 2) << 5; \
|
|
1302
|
+
tmp |= fieldname(insn, 10, 2) << 2; \
|
|
1303
|
+
tmp |= fieldname(insn, 12, 1) << 7; \
|
|
1304
|
+
if (decodeSImmOperandAndLsl1(MI, tmp, Address, Decoder, 9) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1305
|
+
return S; \
|
|
1306
|
+
case 22: \
|
|
1307
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1308
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1309
|
+
tmp = 0; \
|
|
1310
|
+
tmp |= fieldname(insn, 7, 2) << 6; \
|
|
1311
|
+
tmp |= fieldname(insn, 9, 4) << 2; \
|
|
1312
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1313
|
+
return S; \
|
|
1314
|
+
case 23: \
|
|
1315
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1316
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1317
|
+
tmp = 0; \
|
|
1318
|
+
tmp |= fieldname(insn, 7, 3) << 6; \
|
|
1319
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1320
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 9) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1321
|
+
return S; \
|
|
1322
|
+
case 24: \
|
|
1323
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1324
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1325
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1326
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1327
|
+
tmp = fieldname(insn, 20, 12); \
|
|
1328
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1329
|
+
return S; \
|
|
1330
|
+
case 25: \
|
|
1331
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1332
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1333
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1334
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1335
|
+
tmp = fieldname(insn, 20, 12); \
|
|
1336
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1337
|
+
return S; \
|
|
1338
|
+
case 26: \
|
|
1339
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1340
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1341
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1342
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1343
|
+
tmp = fieldname(insn, 20, 12); \
|
|
1344
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1345
|
+
return S; \
|
|
1346
|
+
case 27: \
|
|
1347
|
+
tmp = fieldname(insn, 24, 4); \
|
|
1348
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 4) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1349
|
+
tmp = fieldname(insn, 20, 4); \
|
|
1350
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 4) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1351
|
+
return S; \
|
|
1352
|
+
case 28: \
|
|
1353
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1354
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1355
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1356
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1357
|
+
tmp = fieldname(insn, 20, 6); \
|
|
1358
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 6) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1359
|
+
return S; \
|
|
1360
|
+
case 29: \
|
|
1361
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1362
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1363
|
+
tmp = fieldname(insn, 12, 20); \
|
|
1364
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 20) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1365
|
+
return S; \
|
|
1366
|
+
case 30: \
|
|
1367
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1368
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1369
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1370
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1371
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1372
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1373
|
+
return S; \
|
|
1374
|
+
case 31: \
|
|
1375
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1376
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1377
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1378
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1379
|
+
tmp = 0; \
|
|
1380
|
+
tmp |= fieldname(insn, 7, 5) << 0; \
|
|
1381
|
+
tmp |= fieldname(insn, 25, 7) << 5; \
|
|
1382
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1383
|
+
return S; \
|
|
1384
|
+
case 32: \
|
|
1385
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1386
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1387
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1388
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1389
|
+
tmp = 0; \
|
|
1390
|
+
tmp |= fieldname(insn, 7, 5) << 0; \
|
|
1391
|
+
tmp |= fieldname(insn, 25, 7) << 5; \
|
|
1392
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1393
|
+
return S; \
|
|
1394
|
+
case 33: \
|
|
1395
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1396
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1397
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1398
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1399
|
+
tmp = 0; \
|
|
1400
|
+
tmp |= fieldname(insn, 7, 5) << 0; \
|
|
1401
|
+
tmp |= fieldname(insn, 25, 7) << 5; \
|
|
1402
|
+
if (decodeSImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1403
|
+
return S; \
|
|
1404
|
+
case 34: \
|
|
1405
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1406
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1407
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1408
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1409
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1410
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1411
|
+
return S; \
|
|
1412
|
+
case 35: \
|
|
1413
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1414
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1415
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1416
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1417
|
+
return S; \
|
|
1418
|
+
case 36: \
|
|
1419
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1420
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1421
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1422
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1423
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1424
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1425
|
+
tmp = fieldname(insn, 27, 5); \
|
|
1426
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1427
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1428
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1429
|
+
return S; \
|
|
1430
|
+
case 37: \
|
|
1431
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1432
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1433
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1434
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1435
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1436
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1437
|
+
tmp = fieldname(insn, 27, 5); \
|
|
1438
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1439
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1440
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1441
|
+
return S; \
|
|
1442
|
+
case 38: \
|
|
1443
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1444
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1445
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1446
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1447
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1448
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1449
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1450
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1451
|
+
return S; \
|
|
1452
|
+
case 39: \
|
|
1453
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1454
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1455
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1456
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1457
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1458
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1459
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1460
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1461
|
+
return S; \
|
|
1462
|
+
case 40: \
|
|
1463
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1464
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1465
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1466
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1467
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1468
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1469
|
+
return S; \
|
|
1470
|
+
case 41: \
|
|
1471
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1472
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1473
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1474
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1475
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1476
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1477
|
+
return S; \
|
|
1478
|
+
case 42: \
|
|
1479
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1480
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1481
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1482
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1483
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1484
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1485
|
+
return S; \
|
|
1486
|
+
case 43: \
|
|
1487
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1488
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1489
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1490
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1491
|
+
return S; \
|
|
1492
|
+
case 44: \
|
|
1493
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1494
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1495
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1496
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1497
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1498
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1499
|
+
return S; \
|
|
1500
|
+
case 45: \
|
|
1501
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1502
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1503
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1504
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1505
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1506
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1507
|
+
return S; \
|
|
1508
|
+
case 46: \
|
|
1509
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1510
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1511
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1512
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1513
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1514
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1515
|
+
return S; \
|
|
1516
|
+
case 47: \
|
|
1517
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1518
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1519
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1520
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1521
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1522
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1523
|
+
return S; \
|
|
1524
|
+
case 48: \
|
|
1525
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1526
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1527
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1528
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1529
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1530
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1531
|
+
return S; \
|
|
1532
|
+
case 49: \
|
|
1533
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1534
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1535
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1536
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1537
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1538
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1539
|
+
return S; \
|
|
1540
|
+
case 50: \
|
|
1541
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1542
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1543
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1544
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1545
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1546
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1547
|
+
return S; \
|
|
1548
|
+
case 51: \
|
|
1549
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1550
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1551
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1552
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1553
|
+
return S; \
|
|
1554
|
+
case 52: \
|
|
1555
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1556
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1557
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1558
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1559
|
+
tmp = fieldname(insn, 12, 3); \
|
|
1560
|
+
if (decodeFRMArg(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1561
|
+
return S; \
|
|
1562
|
+
case 53: \
|
|
1563
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1564
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1565
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1566
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1567
|
+
return S; \
|
|
1568
|
+
case 54: \
|
|
1569
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1570
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1571
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1572
|
+
if (DecodeFPR64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1573
|
+
return S; \
|
|
1574
|
+
case 55: \
|
|
1575
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1576
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1577
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1578
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1579
|
+
return S; \
|
|
1580
|
+
case 56: \
|
|
1581
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1582
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1583
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1584
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1585
|
+
tmp = 0; \
|
|
1586
|
+
tmp |= fieldname(insn, 7, 1) << 10; \
|
|
1587
|
+
tmp |= fieldname(insn, 8, 4) << 0; \
|
|
1588
|
+
tmp |= fieldname(insn, 25, 6) << 4; \
|
|
1589
|
+
tmp |= fieldname(insn, 31, 1) << 11; \
|
|
1590
|
+
if (decodeSImmOperandAndLsl1(MI, tmp, Address, Decoder, 13) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1591
|
+
return S; \
|
|
1592
|
+
case 57: \
|
|
1593
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1594
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1595
|
+
tmp = 0; \
|
|
1596
|
+
tmp |= fieldname(insn, 12, 8) << 11; \
|
|
1597
|
+
tmp |= fieldname(insn, 20, 1) << 10; \
|
|
1598
|
+
tmp |= fieldname(insn, 21, 10) << 0; \
|
|
1599
|
+
tmp |= fieldname(insn, 31, 1) << 19; \
|
|
1600
|
+
if (decodeSImmOperandAndLsl1(MI, tmp, Address, Decoder, 21) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1601
|
+
return S; \
|
|
1602
|
+
case 58: \
|
|
1603
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1604
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1605
|
+
tmp = fieldname(insn, 20, 5); \
|
|
1606
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1607
|
+
return S; \
|
|
1608
|
+
case 59: \
|
|
1609
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1610
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1611
|
+
tmp = fieldname(insn, 20, 12); \
|
|
1612
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1613
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1614
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1615
|
+
return S; \
|
|
1616
|
+
case 60: \
|
|
1617
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1618
|
+
if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1619
|
+
tmp = fieldname(insn, 20, 12); \
|
|
1620
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 12) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1621
|
+
tmp = fieldname(insn, 15, 5); \
|
|
1622
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 5) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1623
|
+
return S; \
|
|
1624
|
+
case 61: \
|
|
1625
|
+
tmp = fieldname(insn, 2, 3); \
|
|
1626
|
+
if (DecodeFPR32CRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1627
|
+
tmp = fieldname(insn, 7, 3); \
|
|
1628
|
+
if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1629
|
+
tmp = 0; \
|
|
1630
|
+
tmp |= fieldname(insn, 5, 1) << 6; \
|
|
1631
|
+
tmp |= fieldname(insn, 6, 1) << 2; \
|
|
1632
|
+
tmp |= fieldname(insn, 10, 3) << 3; \
|
|
1633
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 7) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1634
|
+
return S; \
|
|
1635
|
+
case 62: \
|
|
1636
|
+
tmp = fieldname(insn, 7, 5); \
|
|
1637
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1638
|
+
tmp = 0; \
|
|
1639
|
+
tmp |= fieldname(insn, 2, 2) << 6; \
|
|
1640
|
+
tmp |= fieldname(insn, 4, 3) << 2; \
|
|
1641
|
+
tmp |= fieldname(insn, 12, 1) << 5; \
|
|
1642
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1643
|
+
return S; \
|
|
1644
|
+
case 63: \
|
|
1645
|
+
tmp = fieldname(insn, 2, 5); \
|
|
1646
|
+
if (DecodeFPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1647
|
+
tmp = 0; \
|
|
1648
|
+
tmp |= fieldname(insn, 7, 2) << 6; \
|
|
1649
|
+
tmp |= fieldname(insn, 9, 4) << 2; \
|
|
1650
|
+
if (decodeUImmOperand(MI, tmp, Address, Decoder, 8) == MCDisassembler_Fail) return MCDisassembler_Fail; \
|
|
1651
|
+
return S; \
|
|
1652
|
+
} \
|
|
1653
|
+
}
|
|
1654
|
+
|
|
1655
|
+
#define DecodeInstruction(fname, fieldname, decoder, InsnType) \
|
|
1656
|
+
static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI,\
|
|
1657
|
+
InsnType insn, uint64_t Address,\
|
|
1658
|
+
const void *DisAsm, int feature) {\
|
|
1659
|
+
uint64_t Bits = getFeatureBits(feature);\
|
|
1660
|
+
\
|
|
1661
|
+
const uint8_t *Ptr = DecodeTable;\
|
|
1662
|
+
uint32_t CurFieldValue = 0;\
|
|
1663
|
+
DecodeStatus S = MCDisassembler_Success;\
|
|
1664
|
+
while (true) {\
|
|
1665
|
+
switch (*Ptr) {\
|
|
1666
|
+
default:\
|
|
1667
|
+
return MCDisassembler_Fail;\
|
|
1668
|
+
case MCD_OPC_ExtractField: {\
|
|
1669
|
+
unsigned Start = *++Ptr;\
|
|
1670
|
+
unsigned Len = *++Ptr;\
|
|
1671
|
+
++Ptr;\
|
|
1672
|
+
CurFieldValue = fieldname(insn, Start, Len);\
|
|
1673
|
+
break;\
|
|
1674
|
+
}\
|
|
1675
|
+
case MCD_OPC_FilterValue: {\
|
|
1676
|
+
unsigned Len;\
|
|
1677
|
+
InsnType Val = decodeULEB128(++Ptr, &Len);\
|
|
1678
|
+
Ptr += Len;\
|
|
1679
|
+
unsigned NumToSkip = *Ptr++;\
|
|
1680
|
+
NumToSkip |= (*Ptr++) << 8;\
|
|
1681
|
+
NumToSkip |= (*Ptr++) << 16;\
|
|
1682
|
+
\
|
|
1683
|
+
if (Val != CurFieldValue)\
|
|
1684
|
+
Ptr += NumToSkip;\
|
|
1685
|
+
break;\
|
|
1686
|
+
}\
|
|
1687
|
+
case MCD_OPC_CheckField: {\
|
|
1688
|
+
unsigned Start = *++Ptr;\
|
|
1689
|
+
unsigned Len = *++Ptr;\
|
|
1690
|
+
InsnType FieldValue = fieldname(insn, Start, Len);\
|
|
1691
|
+
uint32_t ExpectedValue = decodeULEB128(++Ptr, &Len);\
|
|
1692
|
+
Ptr += Len;\
|
|
1693
|
+
unsigned NumToSkip = *Ptr++;\
|
|
1694
|
+
NumToSkip |= (*Ptr++) << 8;\
|
|
1695
|
+
NumToSkip |= (*Ptr++) << 16;\
|
|
1696
|
+
\
|
|
1697
|
+
if (ExpectedValue != FieldValue)\
|
|
1698
|
+
Ptr += NumToSkip;\
|
|
1699
|
+
break;\
|
|
1700
|
+
}\
|
|
1701
|
+
case MCD_OPC_CheckPredicate: {\
|
|
1702
|
+
unsigned Len;\
|
|
1703
|
+
unsigned PIdx = decodeULEB128(++Ptr, &Len);\
|
|
1704
|
+
Ptr += Len;\
|
|
1705
|
+
unsigned NumToSkip = *Ptr++;\
|
|
1706
|
+
NumToSkip |= (*Ptr++) << 8;\
|
|
1707
|
+
NumToSkip |= (*Ptr++) << 16;\
|
|
1708
|
+
bool Pred;\
|
|
1709
|
+
if (!(Pred = checkDecoderPredicate(PIdx, Bits)))\
|
|
1710
|
+
Ptr += NumToSkip;\
|
|
1711
|
+
(void)Pred;\
|
|
1712
|
+
break;\
|
|
1713
|
+
}\
|
|
1714
|
+
case MCD_OPC_Decode: {\
|
|
1715
|
+
unsigned Len;\
|
|
1716
|
+
unsigned Opc = decodeULEB128(++Ptr, &Len);\
|
|
1717
|
+
Ptr += Len;\
|
|
1718
|
+
unsigned DecodeIdx = decodeULEB128(Ptr, &Len);\
|
|
1719
|
+
Ptr += Len;\
|
|
1720
|
+
\
|
|
1721
|
+
MCInst_clear(MI);\
|
|
1722
|
+
MCInst_setOpcode(MI, Opc);\
|
|
1723
|
+
bool DecodeComplete;\
|
|
1724
|
+
S = decoder(S, DecodeIdx, insn, MI, Address, DisAsm, &DecodeComplete);\
|
|
1725
|
+
CS_ASSERT(DecodeComplete);\
|
|
1726
|
+
\
|
|
1727
|
+
return S;\
|
|
1728
|
+
}\
|
|
1729
|
+
case MCD_OPC_TryDecode: {\
|
|
1730
|
+
unsigned Len;\
|
|
1731
|
+
unsigned Opc = decodeULEB128(++Ptr, &Len);\
|
|
1732
|
+
Ptr += Len;\
|
|
1733
|
+
unsigned DecodeIdx = decodeULEB128(Ptr, &Len);\
|
|
1734
|
+
Ptr += Len;\
|
|
1735
|
+
unsigned NumToSkip = *Ptr++;\
|
|
1736
|
+
NumToSkip |= (*Ptr++) << 8;\
|
|
1737
|
+
NumToSkip |= (*Ptr++) << 16;\
|
|
1738
|
+
\
|
|
1739
|
+
MCInst TmpMI;\
|
|
1740
|
+
MCInst_setOpcode(&TmpMI, Opc);\
|
|
1741
|
+
bool DecodeComplete;\
|
|
1742
|
+
S = decoder(S, DecodeIdx, insn, &TmpMI, Address, DisAsm, &DecodeComplete);\
|
|
1743
|
+
\
|
|
1744
|
+
if (DecodeComplete) {\
|
|
1745
|
+
*MI = TmpMI;\
|
|
1746
|
+
return S;\
|
|
1747
|
+
} else {\
|
|
1748
|
+
CS_ASSERT(S == MCDisassembler_Fail);\
|
|
1749
|
+
Ptr += NumToSkip;\
|
|
1750
|
+
S = MCDisassembler_Success;\
|
|
1751
|
+
}\
|
|
1752
|
+
break;\
|
|
1753
|
+
}\
|
|
1754
|
+
case MCD_OPC_SoftFail: {\
|
|
1755
|
+
unsigned Len;\
|
|
1756
|
+
InsnType PositiveMask = decodeULEB128(++Ptr, &Len);\
|
|
1757
|
+
Ptr += Len;\
|
|
1758
|
+
InsnType NegativeMask = decodeULEB128(Ptr, &Len);\
|
|
1759
|
+
Ptr += Len;\
|
|
1760
|
+
bool Fail = (insn & PositiveMask) || (~insn & NegativeMask);\
|
|
1761
|
+
if (Fail)\
|
|
1762
|
+
S = MCDisassembler_SoftFail;\
|
|
1763
|
+
break;\
|
|
1764
|
+
}\
|
|
1765
|
+
case MCD_OPC_Fail: {\
|
|
1766
|
+
return MCDisassembler_Fail;\
|
|
1767
|
+
}\
|
|
1768
|
+
}\
|
|
1769
|
+
}\
|
|
1770
|
+
CS_ASSERT(0 && "bogosity detected in disassembler state machine!");\
|
|
1771
|
+
}
|
|
1772
|
+
|
|
1773
|
+
// For RISCV instruction is 32 bits.
|
|
1774
|
+
FieldFromInstruction(fieldFromInstruction, uint32_t)
|
|
1775
|
+
DecodeToMCInst(decodeToMCInst, fieldFromInstruction, uint32_t)
|
|
1776
|
+
DecodeInstruction(decodeInstruction, fieldFromInstruction, decodeToMCInst, uint32_t)
|