hexcore-capstone 1.2.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/LICENSE +26 -0
- package/README.md +191 -0
- package/binding.gyp +168 -0
- package/deps/capstone/LEB128.h +38 -0
- package/deps/capstone/MCDisassembler.h +14 -0
- package/deps/capstone/MCFixedLenDisassembler.h +32 -0
- package/deps/capstone/MCInst.c +270 -0
- package/deps/capstone/MCInst.h +165 -0
- package/deps/capstone/MCInstrDesc.c +41 -0
- package/deps/capstone/MCInstrDesc.h +167 -0
- package/deps/capstone/MCRegisterInfo.c +151 -0
- package/deps/capstone/MCRegisterInfo.h +116 -0
- package/deps/capstone/Mapping.c +254 -0
- package/deps/capstone/Mapping.h +174 -0
- package/deps/capstone/MathExtras.h +442 -0
- package/deps/capstone/SStream.c +181 -0
- package/deps/capstone/SStream.h +40 -0
- package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
- package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
- package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
- package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
- package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
- package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
- package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
- package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
- package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
- package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
- package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
- package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
- package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
- package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
- package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
- package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
- package/deps/capstone/arch/ARM/ARMModule.c +63 -0
- package/deps/capstone/arch/ARM/ARMModule.h +12 -0
- package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
- package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
- package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
- package/deps/capstone/arch/BPF/BPFModule.c +34 -0
- package/deps/capstone/arch/BPF/BPFModule.h +12 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
- package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
- package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
- package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
- package/deps/capstone/arch/EVM/EVMModule.c +33 -0
- package/deps/capstone/arch/EVM/EVMModule.h +12 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
- package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
- package/deps/capstone/arch/M680X/M680XModule.c +77 -0
- package/deps/capstone/arch/M680X/M680XModule.h +12 -0
- package/deps/capstone/arch/M680X/cpu12.inc +335 -0
- package/deps/capstone/arch/M680X/hcs08.inc +60 -0
- package/deps/capstone/arch/M680X/hd6301.inc +15 -0
- package/deps/capstone/arch/M680X/hd6309.inc +259 -0
- package/deps/capstone/arch/M680X/insn_props.inc +367 -0
- package/deps/capstone/arch/M680X/m6800.inc +277 -0
- package/deps/capstone/arch/M680X/m6801.inc +39 -0
- package/deps/capstone/arch/M680X/m6805.inc +277 -0
- package/deps/capstone/arch/M680X/m6808.inc +91 -0
- package/deps/capstone/arch/M680X/m6809.inc +352 -0
- package/deps/capstone/arch/M680X/m6811.inc +105 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
- package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
- package/deps/capstone/arch/M68K/M68KModule.c +42 -0
- package/deps/capstone/arch/M68K/M68KModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
- package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
- package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
- package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
- package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
- package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
- package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
- package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
- package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
- package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
- package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
- package/deps/capstone/arch/Mips/MipsModule.c +52 -0
- package/deps/capstone/arch/Mips/MipsModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
- package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
- package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
- package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
- package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
- package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
- package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
- package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
- package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
- package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
- package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
- package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
- package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
- package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
- package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
- package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
- package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
- package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
- package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
- package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
- package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
- package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
- package/deps/capstone/arch/SH/SHModule.c +39 -0
- package/deps/capstone/arch/SH/SHModule.h +12 -0
- package/deps/capstone/arch/SH/mktable.rb +390 -0
- package/deps/capstone/arch/Sparc/Sparc.h +63 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
- package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
- package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
- package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
- package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
- package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
- package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
- package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
- package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
- package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
- package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
- package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
- package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
- package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
- package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
- package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
- package/deps/capstone/arch/TriCore/TriCore.td +134 -0
- package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
- package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
- package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
- package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
- package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
- package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
- package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
- package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
- package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
- package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
- package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
- package/deps/capstone/arch/WASM/WASMModule.c +33 -0
- package/deps/capstone/arch/WASM/WASMModule.h +12 -0
- package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
- package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
- package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
- package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
- package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
- package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
- package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
- package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
- package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
- package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
- package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
- package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
- package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
- package/deps/capstone/arch/X86/X86Mapping.h +96 -0
- package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
- package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
- package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
- package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
- package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
- package/deps/capstone/arch/X86/X86Module.c +94 -0
- package/deps/capstone/arch/X86/X86Module.h +12 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
- package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
- package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
- package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
- package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
- package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
- package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
- package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
- package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
- package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
- package/deps/capstone/cs.c +1664 -0
- package/deps/capstone/cs_priv.h +101 -0
- package/deps/capstone/cs_simple_types.h +886 -0
- package/deps/capstone/include/capstone/arm.h +991 -0
- package/deps/capstone/include/capstone/arm64.h +3159 -0
- package/deps/capstone/include/capstone/bpf.h +209 -0
- package/deps/capstone/include/capstone/capstone.h +875 -0
- package/deps/capstone/include/capstone/evm.h +188 -0
- package/deps/capstone/include/capstone/m680x.h +537 -0
- package/deps/capstone/include/capstone/m68k.h +613 -0
- package/deps/capstone/include/capstone/mips.h +956 -0
- package/deps/capstone/include/capstone/mos65xx.h +204 -0
- package/deps/capstone/include/capstone/platform.h +122 -0
- package/deps/capstone/include/capstone/ppc.h +2108 -0
- package/deps/capstone/include/capstone/riscv.h +531 -0
- package/deps/capstone/include/capstone/sh.h +465 -0
- package/deps/capstone/include/capstone/sparc.h +520 -0
- package/deps/capstone/include/capstone/systemz.h +2601 -0
- package/deps/capstone/include/capstone/tms320c64x.h +359 -0
- package/deps/capstone/include/capstone/tricore.h +567 -0
- package/deps/capstone/include/capstone/wasm.h +250 -0
- package/deps/capstone/include/capstone/x86.h +1986 -0
- package/deps/capstone/include/capstone/xcore.h +235 -0
- package/deps/capstone/include/platform.h +110 -0
- package/deps/capstone/include/windowsce/intrin.h +12 -0
- package/deps/capstone/include/windowsce/stdint.h +133 -0
- package/deps/capstone/utils.c +140 -0
- package/deps/capstone/utils.h +54 -0
- package/index.d.ts +448 -0
- package/index.js +64 -0
- package/index.mjs +25 -0
- package/package.json +82 -0
- package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
- package/src/capstone_wrapper.cpp +910 -0
- package/src/capstone_wrapper.h +147 -0
- package/src/disasm_async_worker.h +215 -0
- package/src/main.cpp +145 -0
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@@ -0,0 +1,1282 @@
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1
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+
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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2
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/* This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) */
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3
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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4
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5
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+
"abs", // ARM64_INS_ABS,
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6
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+
"adc", // ARM64_INS_ADC,
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7
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+
"adclb", // ARM64_INS_ADCLB,
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8
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+
"adclt", // ARM64_INS_ADCLT,
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9
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"adcs", // ARM64_INS_ADCS,
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10
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+
"add", // ARM64_INS_ADD,
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11
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+
"addg", // ARM64_INS_ADDG,
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12
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+
"addha", // ARM64_INS_ADDHA,
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13
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+
"addhn", // ARM64_INS_ADDHN,
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14
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+
"addhn2", // ARM64_INS_ADDHN2,
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15
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+
"addhnb", // ARM64_INS_ADDHNB,
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16
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+
"addhnt", // ARM64_INS_ADDHNT,
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17
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"addp", // ARM64_INS_ADDP,
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18
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+
"addpl", // ARM64_INS_ADDPL,
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19
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"adds", // ARM64_INS_ADDS,
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20
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"addv", // ARM64_INS_ADDV,
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21
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"addva", // ARM64_INS_ADDVA,
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22
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"addvl", // ARM64_INS_ADDVL,
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23
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"adr", // ARM64_INS_ADR,
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24
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"adrp", // ARM64_INS_ADRP,
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25
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"aesd", // ARM64_INS_AESD,
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26
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"aese", // ARM64_INS_AESE,
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27
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"aesimc", // ARM64_INS_AESIMC,
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28
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"aesmc", // ARM64_INS_AESMC,
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29
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"and", // ARM64_INS_AND,
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30
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"ands", // ARM64_INS_ANDS,
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31
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"andv", // ARM64_INS_ANDV,
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32
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"asr", // ARM64_INS_ASR,
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33
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"asrd", // ARM64_INS_ASRD,
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34
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"asrr", // ARM64_INS_ASRR,
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35
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"asrv", // ARM64_INS_ASRV,
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36
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"autda", // ARM64_INS_AUTDA,
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37
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"autdb", // ARM64_INS_AUTDB,
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38
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"autdza", // ARM64_INS_AUTDZA,
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39
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"autdzb", // ARM64_INS_AUTDZB,
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40
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"autia", // ARM64_INS_AUTIA,
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41
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"autia1716", // ARM64_INS_AUTIA1716,
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42
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"autiasp", // ARM64_INS_AUTIASP,
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43
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"autiaz", // ARM64_INS_AUTIAZ,
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44
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"autib", // ARM64_INS_AUTIB,
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45
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"autib1716", // ARM64_INS_AUTIB1716,
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46
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"autibsp", // ARM64_INS_AUTIBSP,
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47
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"autibz", // ARM64_INS_AUTIBZ,
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48
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"autiza", // ARM64_INS_AUTIZA,
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49
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+
"autizb", // ARM64_INS_AUTIZB,
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50
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"axflag", // ARM64_INS_AXFLAG,
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51
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"b", // ARM64_INS_B,
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52
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"bc", // ARM64_INS_BC,
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53
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"bcax", // ARM64_INS_BCAX,
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54
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+
"bdep", // ARM64_INS_BDEP,
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55
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+
"bext", // ARM64_INS_BEXT,
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56
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"bfcvt", // ARM64_INS_BFCVT,
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57
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"bfcvtn", // ARM64_INS_BFCVTN,
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58
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"bfcvtn2", // ARM64_INS_BFCVTN2,
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59
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"bfcvtnt", // ARM64_INS_BFCVTNT,
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60
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"bfdot", // ARM64_INS_BFDOT,
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61
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"bfm", // ARM64_INS_BFM,
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62
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"bfmlalb", // ARM64_INS_BFMLALB,
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63
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+
"bfmlalt", // ARM64_INS_BFMLALT,
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64
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"bfmmla", // ARM64_INS_BFMMLA,
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65
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"bfmopa", // ARM64_INS_BFMOPA,
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66
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+
"bfmops", // ARM64_INS_BFMOPS,
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67
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"bgrp", // ARM64_INS_BGRP,
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68
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"bic", // ARM64_INS_BIC,
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69
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"bics", // ARM64_INS_BICS,
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70
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"bif", // ARM64_INS_BIF,
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71
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"bit", // ARM64_INS_BIT,
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72
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"bl", // ARM64_INS_BL,
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73
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"blr", // ARM64_INS_BLR,
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74
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"blraa", // ARM64_INS_BLRAA,
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75
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"blraaz", // ARM64_INS_BLRAAZ,
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76
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"blrab", // ARM64_INS_BLRAB,
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77
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"blrabz", // ARM64_INS_BLRABZ,
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78
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"br", // ARM64_INS_BR,
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79
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"braa", // ARM64_INS_BRAA,
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80
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"braaz", // ARM64_INS_BRAAZ,
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81
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"brab", // ARM64_INS_BRAB,
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82
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"brabz", // ARM64_INS_BRABZ,
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83
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"brb", // ARM64_INS_BRB,
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84
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"brk", // ARM64_INS_BRK,
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85
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"brka", // ARM64_INS_BRKA,
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86
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"brkas", // ARM64_INS_BRKAS,
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87
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"brkb", // ARM64_INS_BRKB,
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88
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"brkbs", // ARM64_INS_BRKBS,
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89
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"brkn", // ARM64_INS_BRKN,
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90
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"brkns", // ARM64_INS_BRKNS,
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91
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"brkpa", // ARM64_INS_BRKPA,
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92
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"brkpas", // ARM64_INS_BRKPAS,
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93
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"brkpb", // ARM64_INS_BRKPB,
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94
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"brkpbs", // ARM64_INS_BRKPBS,
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95
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"bsl", // ARM64_INS_BSL,
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96
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"bsl1n", // ARM64_INS_BSL1N,
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97
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"bsl2n", // ARM64_INS_BSL2N,
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98
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"bti", // ARM64_INS_BTI,
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99
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"cadd", // ARM64_INS_CADD,
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100
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"cas", // ARM64_INS_CAS,
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101
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"casa", // ARM64_INS_CASA,
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102
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"casab", // ARM64_INS_CASAB,
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103
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"casah", // ARM64_INS_CASAH,
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104
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"casal", // ARM64_INS_CASAL,
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105
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"casalb", // ARM64_INS_CASALB,
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106
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"casalh", // ARM64_INS_CASALH,
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107
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"casb", // ARM64_INS_CASB,
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108
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"cash", // ARM64_INS_CASH,
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109
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"casl", // ARM64_INS_CASL,
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110
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"caslb", // ARM64_INS_CASLB,
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111
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"caslh", // ARM64_INS_CASLH,
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112
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"casp", // ARM64_INS_CASP,
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113
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"caspa", // ARM64_INS_CASPA,
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114
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"caspal", // ARM64_INS_CASPAL,
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115
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"caspl", // ARM64_INS_CASPL,
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116
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"cbnz", // ARM64_INS_CBNZ,
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117
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"cbz", // ARM64_INS_CBZ,
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118
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"ccmn", // ARM64_INS_CCMN,
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119
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"ccmp", // ARM64_INS_CCMP,
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120
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"cdot", // ARM64_INS_CDOT,
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121
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"cfinv", // ARM64_INS_CFINV,
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122
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"cinc", // ARM64_INS_CINC,
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123
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"cinv", // ARM64_INS_CINV,
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124
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"clasta", // ARM64_INS_CLASTA,
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125
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"clastb", // ARM64_INS_CLASTB,
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126
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"clrex", // ARM64_INS_CLREX,
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127
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"cls", // ARM64_INS_CLS,
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128
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"clz", // ARM64_INS_CLZ,
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129
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"cmeq", // ARM64_INS_CMEQ,
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130
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"cmge", // ARM64_INS_CMGE,
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131
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"cmgt", // ARM64_INS_CMGT,
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132
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"cmhi", // ARM64_INS_CMHI,
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133
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"cmhs", // ARM64_INS_CMHS,
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134
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"cmla", // ARM64_INS_CMLA,
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135
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"cmle", // ARM64_INS_CMLE,
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136
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"cmlo", // ARM64_INS_CMLO,
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137
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"cmls", // ARM64_INS_CMLS,
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138
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"cmlt", // ARM64_INS_CMLT,
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139
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"cmn", // ARM64_INS_CMN,
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140
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"cmp", // ARM64_INS_CMP,
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141
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"cmpeq", // ARM64_INS_CMPEQ,
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142
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+
"cmpge", // ARM64_INS_CMPGE,
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143
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"cmpgt", // ARM64_INS_CMPGT,
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144
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"cmphi", // ARM64_INS_CMPHI,
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145
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+
"cmphs", // ARM64_INS_CMPHS,
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146
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"cmple", // ARM64_INS_CMPLE,
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147
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"cmplo", // ARM64_INS_CMPLO,
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148
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+
"cmpls", // ARM64_INS_CMPLS,
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149
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"cmplt", // ARM64_INS_CMPLT,
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150
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+
"cmpne", // ARM64_INS_CMPNE,
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151
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+
"cmpp", // ARM64_INS_CMPP,
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152
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+
"cmtst", // ARM64_INS_CMTST,
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153
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+
"cneg", // ARM64_INS_CNEG,
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154
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+
"cnot", // ARM64_INS_CNOT,
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155
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"cnt", // ARM64_INS_CNT,
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156
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+
"cntb", // ARM64_INS_CNTB,
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157
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+
"cntd", // ARM64_INS_CNTD,
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158
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+
"cnth", // ARM64_INS_CNTH,
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159
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+
"cntp", // ARM64_INS_CNTP,
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160
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+
"cntw", // ARM64_INS_CNTW,
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161
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"compact", // ARM64_INS_COMPACT,
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162
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+
"cpy", // ARM64_INS_CPY,
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163
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"cpye", // ARM64_INS_CPYE,
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164
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"cpyen", // ARM64_INS_CPYEN,
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165
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"cpyern", // ARM64_INS_CPYERN,
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166
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"cpyert", // ARM64_INS_CPYERT,
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167
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"cpyertn", // ARM64_INS_CPYERTN,
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168
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"cpyertrn", // ARM64_INS_CPYERTRN,
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169
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"cpyertwn", // ARM64_INS_CPYERTWN,
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170
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"cpyet", // ARM64_INS_CPYET,
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171
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"cpyetn", // ARM64_INS_CPYETN,
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172
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"cpyetrn", // ARM64_INS_CPYETRN,
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173
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"cpyetwn", // ARM64_INS_CPYETWN,
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174
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"cpyewn", // ARM64_INS_CPYEWN,
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175
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"cpyewt", // ARM64_INS_CPYEWT,
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176
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"cpyewtn", // ARM64_INS_CPYEWTN,
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177
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"cpyewtrn", // ARM64_INS_CPYEWTRN,
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178
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"cpyewtwn", // ARM64_INS_CPYEWTWN,
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179
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"cpyfe", // ARM64_INS_CPYFE,
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180
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"cpyfen", // ARM64_INS_CPYFEN,
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181
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"cpyfern", // ARM64_INS_CPYFERN,
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182
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"cpyfert", // ARM64_INS_CPYFERT,
|
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183
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"cpyfertn", // ARM64_INS_CPYFERTN,
|
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184
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+
"cpyfertrn", // ARM64_INS_CPYFERTRN,
|
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185
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"cpyfertwn", // ARM64_INS_CPYFERTWN,
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186
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+
"cpyfet", // ARM64_INS_CPYFET,
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187
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"cpyfetn", // ARM64_INS_CPYFETN,
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188
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"cpyfetrn", // ARM64_INS_CPYFETRN,
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189
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"cpyfetwn", // ARM64_INS_CPYFETWN,
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190
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"cpyfewn", // ARM64_INS_CPYFEWN,
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191
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"cpyfewt", // ARM64_INS_CPYFEWT,
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192
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"cpyfewtn", // ARM64_INS_CPYFEWTN,
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193
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+
"cpyfewtrn", // ARM64_INS_CPYFEWTRN,
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194
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"cpyfewtwn", // ARM64_INS_CPYFEWTWN,
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195
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"cpyfm", // ARM64_INS_CPYFM,
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196
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+
"cpyfmn", // ARM64_INS_CPYFMN,
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197
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+
"cpyfmrn", // ARM64_INS_CPYFMRN,
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198
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+
"cpyfmrt", // ARM64_INS_CPYFMRT,
|
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199
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+
"cpyfmrtn", // ARM64_INS_CPYFMRTN,
|
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200
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+
"cpyfmrtrn", // ARM64_INS_CPYFMRTRN,
|
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201
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+
"cpyfmrtwn", // ARM64_INS_CPYFMRTWN,
|
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202
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+
"cpyfmt", // ARM64_INS_CPYFMT,
|
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203
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+
"cpyfmtn", // ARM64_INS_CPYFMTN,
|
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204
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+
"cpyfmtrn", // ARM64_INS_CPYFMTRN,
|
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205
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+
"cpyfmtwn", // ARM64_INS_CPYFMTWN,
|
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206
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+
"cpyfmwn", // ARM64_INS_CPYFMWN,
|
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207
|
+
"cpyfmwt", // ARM64_INS_CPYFMWT,
|
|
208
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+
"cpyfmwtn", // ARM64_INS_CPYFMWTN,
|
|
209
|
+
"cpyfmwtrn", // ARM64_INS_CPYFMWTRN,
|
|
210
|
+
"cpyfmwtwn", // ARM64_INS_CPYFMWTWN,
|
|
211
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+
"cpyfp", // ARM64_INS_CPYFP,
|
|
212
|
+
"cpyfpn", // ARM64_INS_CPYFPN,
|
|
213
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+
"cpyfprn", // ARM64_INS_CPYFPRN,
|
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214
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+
"cpyfprt", // ARM64_INS_CPYFPRT,
|
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215
|
+
"cpyfprtn", // ARM64_INS_CPYFPRTN,
|
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216
|
+
"cpyfprtrn", // ARM64_INS_CPYFPRTRN,
|
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217
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+
"cpyfprtwn", // ARM64_INS_CPYFPRTWN,
|
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218
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+
"cpyfpt", // ARM64_INS_CPYFPT,
|
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219
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+
"cpyfptn", // ARM64_INS_CPYFPTN,
|
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220
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+
"cpyfptrn", // ARM64_INS_CPYFPTRN,
|
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221
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+
"cpyfptwn", // ARM64_INS_CPYFPTWN,
|
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222
|
+
"cpyfpwn", // ARM64_INS_CPYFPWN,
|
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223
|
+
"cpyfpwt", // ARM64_INS_CPYFPWT,
|
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224
|
+
"cpyfpwtn", // ARM64_INS_CPYFPWTN,
|
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225
|
+
"cpyfpwtrn", // ARM64_INS_CPYFPWTRN,
|
|
226
|
+
"cpyfpwtwn", // ARM64_INS_CPYFPWTWN,
|
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227
|
+
"cpym", // ARM64_INS_CPYM,
|
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228
|
+
"cpymn", // ARM64_INS_CPYMN,
|
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229
|
+
"cpymrn", // ARM64_INS_CPYMRN,
|
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230
|
+
"cpymrt", // ARM64_INS_CPYMRT,
|
|
231
|
+
"cpymrtn", // ARM64_INS_CPYMRTN,
|
|
232
|
+
"cpymrtrn", // ARM64_INS_CPYMRTRN,
|
|
233
|
+
"cpymrtwn", // ARM64_INS_CPYMRTWN,
|
|
234
|
+
"cpymt", // ARM64_INS_CPYMT,
|
|
235
|
+
"cpymtn", // ARM64_INS_CPYMTN,
|
|
236
|
+
"cpymtrn", // ARM64_INS_CPYMTRN,
|
|
237
|
+
"cpymtwn", // ARM64_INS_CPYMTWN,
|
|
238
|
+
"cpymwn", // ARM64_INS_CPYMWN,
|
|
239
|
+
"cpymwt", // ARM64_INS_CPYMWT,
|
|
240
|
+
"cpymwtn", // ARM64_INS_CPYMWTN,
|
|
241
|
+
"cpymwtrn", // ARM64_INS_CPYMWTRN,
|
|
242
|
+
"cpymwtwn", // ARM64_INS_CPYMWTWN,
|
|
243
|
+
"cpyp", // ARM64_INS_CPYP,
|
|
244
|
+
"cpypn", // ARM64_INS_CPYPN,
|
|
245
|
+
"cpyprn", // ARM64_INS_CPYPRN,
|
|
246
|
+
"cpyprt", // ARM64_INS_CPYPRT,
|
|
247
|
+
"cpyprtn", // ARM64_INS_CPYPRTN,
|
|
248
|
+
"cpyprtrn", // ARM64_INS_CPYPRTRN,
|
|
249
|
+
"cpyprtwn", // ARM64_INS_CPYPRTWN,
|
|
250
|
+
"cpypt", // ARM64_INS_CPYPT,
|
|
251
|
+
"cpyptn", // ARM64_INS_CPYPTN,
|
|
252
|
+
"cpyptrn", // ARM64_INS_CPYPTRN,
|
|
253
|
+
"cpyptwn", // ARM64_INS_CPYPTWN,
|
|
254
|
+
"cpypwn", // ARM64_INS_CPYPWN,
|
|
255
|
+
"cpypwt", // ARM64_INS_CPYPWT,
|
|
256
|
+
"cpypwtn", // ARM64_INS_CPYPWTN,
|
|
257
|
+
"cpypwtrn", // ARM64_INS_CPYPWTRN,
|
|
258
|
+
"cpypwtwn", // ARM64_INS_CPYPWTWN,
|
|
259
|
+
"crc32b", // ARM64_INS_CRC32B,
|
|
260
|
+
"crc32cb", // ARM64_INS_CRC32CB,
|
|
261
|
+
"crc32ch", // ARM64_INS_CRC32CH,
|
|
262
|
+
"crc32cw", // ARM64_INS_CRC32CW,
|
|
263
|
+
"crc32cx", // ARM64_INS_CRC32CX,
|
|
264
|
+
"crc32h", // ARM64_INS_CRC32H,
|
|
265
|
+
"crc32w", // ARM64_INS_CRC32W,
|
|
266
|
+
"crc32x", // ARM64_INS_CRC32X,
|
|
267
|
+
"csdb", // ARM64_INS_CSDB,
|
|
268
|
+
"csel", // ARM64_INS_CSEL,
|
|
269
|
+
"cset", // ARM64_INS_CSET,
|
|
270
|
+
"csetm", // ARM64_INS_CSETM,
|
|
271
|
+
"csinc", // ARM64_INS_CSINC,
|
|
272
|
+
"csinv", // ARM64_INS_CSINV,
|
|
273
|
+
"csneg", // ARM64_INS_CSNEG,
|
|
274
|
+
"ctermeq", // ARM64_INS_CTERMEQ,
|
|
275
|
+
"ctermne", // ARM64_INS_CTERMNE,
|
|
276
|
+
"dcps1", // ARM64_INS_DCPS1,
|
|
277
|
+
"dcps2", // ARM64_INS_DCPS2,
|
|
278
|
+
"dcps3", // ARM64_INS_DCPS3,
|
|
279
|
+
"decb", // ARM64_INS_DECB,
|
|
280
|
+
"decd", // ARM64_INS_DECD,
|
|
281
|
+
"dech", // ARM64_INS_DECH,
|
|
282
|
+
"decp", // ARM64_INS_DECP,
|
|
283
|
+
"decw", // ARM64_INS_DECW,
|
|
284
|
+
"dfb", // ARM64_INS_DFB,
|
|
285
|
+
"dgh", // ARM64_INS_DGH,
|
|
286
|
+
"dmb", // ARM64_INS_DMB,
|
|
287
|
+
"drps", // ARM64_INS_DRPS,
|
|
288
|
+
"dsb", // ARM64_INS_DSB,
|
|
289
|
+
"dup", // ARM64_INS_DUP,
|
|
290
|
+
"dupm", // ARM64_INS_DUPM,
|
|
291
|
+
"eon", // ARM64_INS_EON,
|
|
292
|
+
"eor", // ARM64_INS_EOR,
|
|
293
|
+
"eor3", // ARM64_INS_EOR3,
|
|
294
|
+
"eorbt", // ARM64_INS_EORBT,
|
|
295
|
+
"eors", // ARM64_INS_EORS,
|
|
296
|
+
"eortb", // ARM64_INS_EORTB,
|
|
297
|
+
"eorv", // ARM64_INS_EORV,
|
|
298
|
+
"eret", // ARM64_INS_ERET,
|
|
299
|
+
"eretaa", // ARM64_INS_ERETAA,
|
|
300
|
+
"eretab", // ARM64_INS_ERETAB,
|
|
301
|
+
"esb", // ARM64_INS_ESB,
|
|
302
|
+
"ext", // ARM64_INS_EXT,
|
|
303
|
+
"extr", // ARM64_INS_EXTR,
|
|
304
|
+
"fabd", // ARM64_INS_FABD,
|
|
305
|
+
"fabs", // ARM64_INS_FABS,
|
|
306
|
+
"facge", // ARM64_INS_FACGE,
|
|
307
|
+
"facgt", // ARM64_INS_FACGT,
|
|
308
|
+
"facle", // ARM64_INS_FACLE,
|
|
309
|
+
"faclt", // ARM64_INS_FACLT,
|
|
310
|
+
"fadd", // ARM64_INS_FADD,
|
|
311
|
+
"fadda", // ARM64_INS_FADDA,
|
|
312
|
+
"faddp", // ARM64_INS_FADDP,
|
|
313
|
+
"faddv", // ARM64_INS_FADDV,
|
|
314
|
+
"fcadd", // ARM64_INS_FCADD,
|
|
315
|
+
"fccmp", // ARM64_INS_FCCMP,
|
|
316
|
+
"fccmpe", // ARM64_INS_FCCMPE,
|
|
317
|
+
"fcmeq", // ARM64_INS_FCMEQ,
|
|
318
|
+
"fcmge", // ARM64_INS_FCMGE,
|
|
319
|
+
"fcmgt", // ARM64_INS_FCMGT,
|
|
320
|
+
"fcmla", // ARM64_INS_FCMLA,
|
|
321
|
+
"fcmle", // ARM64_INS_FCMLE,
|
|
322
|
+
"fcmlt", // ARM64_INS_FCMLT,
|
|
323
|
+
"fcmne", // ARM64_INS_FCMNE,
|
|
324
|
+
"fcmp", // ARM64_INS_FCMP,
|
|
325
|
+
"fcmpe", // ARM64_INS_FCMPE,
|
|
326
|
+
"fcmuo", // ARM64_INS_FCMUO,
|
|
327
|
+
"fcpy", // ARM64_INS_FCPY,
|
|
328
|
+
"fcsel", // ARM64_INS_FCSEL,
|
|
329
|
+
"fcvt", // ARM64_INS_FCVT,
|
|
330
|
+
"fcvtas", // ARM64_INS_FCVTAS,
|
|
331
|
+
"fcvtau", // ARM64_INS_FCVTAU,
|
|
332
|
+
"fcvtl", // ARM64_INS_FCVTL,
|
|
333
|
+
"fcvtl2", // ARM64_INS_FCVTL2,
|
|
334
|
+
"fcvtlt", // ARM64_INS_FCVTLT,
|
|
335
|
+
"fcvtms", // ARM64_INS_FCVTMS,
|
|
336
|
+
"fcvtmu", // ARM64_INS_FCVTMU,
|
|
337
|
+
"fcvtn", // ARM64_INS_FCVTN,
|
|
338
|
+
"fcvtn2", // ARM64_INS_FCVTN2,
|
|
339
|
+
"fcvtns", // ARM64_INS_FCVTNS,
|
|
340
|
+
"fcvtnt", // ARM64_INS_FCVTNT,
|
|
341
|
+
"fcvtnu", // ARM64_INS_FCVTNU,
|
|
342
|
+
"fcvtps", // ARM64_INS_FCVTPS,
|
|
343
|
+
"fcvtpu", // ARM64_INS_FCVTPU,
|
|
344
|
+
"fcvtx", // ARM64_INS_FCVTX,
|
|
345
|
+
"fcvtxn", // ARM64_INS_FCVTXN,
|
|
346
|
+
"fcvtxn2", // ARM64_INS_FCVTXN2,
|
|
347
|
+
"fcvtxnt", // ARM64_INS_FCVTXNT,
|
|
348
|
+
"fcvtzs", // ARM64_INS_FCVTZS,
|
|
349
|
+
"fcvtzu", // ARM64_INS_FCVTZU,
|
|
350
|
+
"fdiv", // ARM64_INS_FDIV,
|
|
351
|
+
"fdivr", // ARM64_INS_FDIVR,
|
|
352
|
+
"fdup", // ARM64_INS_FDUP,
|
|
353
|
+
"fexpa", // ARM64_INS_FEXPA,
|
|
354
|
+
"fjcvtzs", // ARM64_INS_FJCVTZS,
|
|
355
|
+
"flogb", // ARM64_INS_FLOGB,
|
|
356
|
+
"fmad", // ARM64_INS_FMAD,
|
|
357
|
+
"fmadd", // ARM64_INS_FMADD,
|
|
358
|
+
"fmax", // ARM64_INS_FMAX,
|
|
359
|
+
"fmaxnm", // ARM64_INS_FMAXNM,
|
|
360
|
+
"fmaxnmp", // ARM64_INS_FMAXNMP,
|
|
361
|
+
"fmaxnmv", // ARM64_INS_FMAXNMV,
|
|
362
|
+
"fmaxp", // ARM64_INS_FMAXP,
|
|
363
|
+
"fmaxv", // ARM64_INS_FMAXV,
|
|
364
|
+
"fmin", // ARM64_INS_FMIN,
|
|
365
|
+
"fminnm", // ARM64_INS_FMINNM,
|
|
366
|
+
"fminnmp", // ARM64_INS_FMINNMP,
|
|
367
|
+
"fminnmv", // ARM64_INS_FMINNMV,
|
|
368
|
+
"fminp", // ARM64_INS_FMINP,
|
|
369
|
+
"fminv", // ARM64_INS_FMINV,
|
|
370
|
+
"fmla", // ARM64_INS_FMLA,
|
|
371
|
+
"fmlal", // ARM64_INS_FMLAL,
|
|
372
|
+
"fmlal2", // ARM64_INS_FMLAL2,
|
|
373
|
+
"fmlalb", // ARM64_INS_FMLALB,
|
|
374
|
+
"fmlalt", // ARM64_INS_FMLALT,
|
|
375
|
+
"fmls", // ARM64_INS_FMLS,
|
|
376
|
+
"fmlsl", // ARM64_INS_FMLSL,
|
|
377
|
+
"fmlsl2", // ARM64_INS_FMLSL2,
|
|
378
|
+
"fmlslb", // ARM64_INS_FMLSLB,
|
|
379
|
+
"fmlslt", // ARM64_INS_FMLSLT,
|
|
380
|
+
"fmmla", // ARM64_INS_FMMLA,
|
|
381
|
+
"fmopa", // ARM64_INS_FMOPA,
|
|
382
|
+
"fmops", // ARM64_INS_FMOPS,
|
|
383
|
+
"fmov", // ARM64_INS_FMOV,
|
|
384
|
+
"fmsb", // ARM64_INS_FMSB,
|
|
385
|
+
"fmsub", // ARM64_INS_FMSUB,
|
|
386
|
+
"fmul", // ARM64_INS_FMUL,
|
|
387
|
+
"fmulx", // ARM64_INS_FMULX,
|
|
388
|
+
"fneg", // ARM64_INS_FNEG,
|
|
389
|
+
"fnmad", // ARM64_INS_FNMAD,
|
|
390
|
+
"fnmadd", // ARM64_INS_FNMADD,
|
|
391
|
+
"fnmla", // ARM64_INS_FNMLA,
|
|
392
|
+
"fnmls", // ARM64_INS_FNMLS,
|
|
393
|
+
"fnmsb", // ARM64_INS_FNMSB,
|
|
394
|
+
"fnmsub", // ARM64_INS_FNMSUB,
|
|
395
|
+
"fnmul", // ARM64_INS_FNMUL,
|
|
396
|
+
"frecpe", // ARM64_INS_FRECPE,
|
|
397
|
+
"frecps", // ARM64_INS_FRECPS,
|
|
398
|
+
"frecpx", // ARM64_INS_FRECPX,
|
|
399
|
+
"frint32x", // ARM64_INS_FRINT32X,
|
|
400
|
+
"frint32z", // ARM64_INS_FRINT32Z,
|
|
401
|
+
"frint64x", // ARM64_INS_FRINT64X,
|
|
402
|
+
"frint64z", // ARM64_INS_FRINT64Z,
|
|
403
|
+
"frinta", // ARM64_INS_FRINTA,
|
|
404
|
+
"frinti", // ARM64_INS_FRINTI,
|
|
405
|
+
"frintm", // ARM64_INS_FRINTM,
|
|
406
|
+
"frintn", // ARM64_INS_FRINTN,
|
|
407
|
+
"frintp", // ARM64_INS_FRINTP,
|
|
408
|
+
"frintx", // ARM64_INS_FRINTX,
|
|
409
|
+
"frintz", // ARM64_INS_FRINTZ,
|
|
410
|
+
"frsqrte", // ARM64_INS_FRSQRTE,
|
|
411
|
+
"frsqrts", // ARM64_INS_FRSQRTS,
|
|
412
|
+
"fscale", // ARM64_INS_FSCALE,
|
|
413
|
+
"fsqrt", // ARM64_INS_FSQRT,
|
|
414
|
+
"fsub", // ARM64_INS_FSUB,
|
|
415
|
+
"fsubr", // ARM64_INS_FSUBR,
|
|
416
|
+
"ftmad", // ARM64_INS_FTMAD,
|
|
417
|
+
"ftsmul", // ARM64_INS_FTSMUL,
|
|
418
|
+
"ftssel", // ARM64_INS_FTSSEL,
|
|
419
|
+
"gmi", // ARM64_INS_GMI,
|
|
420
|
+
"hint", // ARM64_INS_HINT,
|
|
421
|
+
"histcnt", // ARM64_INS_HISTCNT,
|
|
422
|
+
"histseg", // ARM64_INS_HISTSEG,
|
|
423
|
+
"hlt", // ARM64_INS_HLT,
|
|
424
|
+
"hvc", // ARM64_INS_HVC,
|
|
425
|
+
"incb", // ARM64_INS_INCB,
|
|
426
|
+
"incd", // ARM64_INS_INCD,
|
|
427
|
+
"inch", // ARM64_INS_INCH,
|
|
428
|
+
"incp", // ARM64_INS_INCP,
|
|
429
|
+
"incw", // ARM64_INS_INCW,
|
|
430
|
+
"index", // ARM64_INS_INDEX,
|
|
431
|
+
"ins", // ARM64_INS_INS,
|
|
432
|
+
"insr", // ARM64_INS_INSR,
|
|
433
|
+
"irg", // ARM64_INS_IRG,
|
|
434
|
+
"isb", // ARM64_INS_ISB,
|
|
435
|
+
"lasta", // ARM64_INS_LASTA,
|
|
436
|
+
"lastb", // ARM64_INS_LASTB,
|
|
437
|
+
"ld1", // ARM64_INS_LD1,
|
|
438
|
+
"ld1b", // ARM64_INS_LD1B,
|
|
439
|
+
"ld1d", // ARM64_INS_LD1D,
|
|
440
|
+
"ld1h", // ARM64_INS_LD1H,
|
|
441
|
+
"ld1q", // ARM64_INS_LD1Q,
|
|
442
|
+
"ld1r", // ARM64_INS_LD1R,
|
|
443
|
+
"ld1rb", // ARM64_INS_LD1RB,
|
|
444
|
+
"ld1rd", // ARM64_INS_LD1RD,
|
|
445
|
+
"ld1rh", // ARM64_INS_LD1RH,
|
|
446
|
+
"ld1rob", // ARM64_INS_LD1ROB,
|
|
447
|
+
"ld1rod", // ARM64_INS_LD1ROD,
|
|
448
|
+
"ld1roh", // ARM64_INS_LD1ROH,
|
|
449
|
+
"ld1row", // ARM64_INS_LD1ROW,
|
|
450
|
+
"ld1rqb", // ARM64_INS_LD1RQB,
|
|
451
|
+
"ld1rqd", // ARM64_INS_LD1RQD,
|
|
452
|
+
"ld1rqh", // ARM64_INS_LD1RQH,
|
|
453
|
+
"ld1rqw", // ARM64_INS_LD1RQW,
|
|
454
|
+
"ld1rsb", // ARM64_INS_LD1RSB,
|
|
455
|
+
"ld1rsh", // ARM64_INS_LD1RSH,
|
|
456
|
+
"ld1rsw", // ARM64_INS_LD1RSW,
|
|
457
|
+
"ld1rw", // ARM64_INS_LD1RW,
|
|
458
|
+
"ld1sb", // ARM64_INS_LD1SB,
|
|
459
|
+
"ld1sh", // ARM64_INS_LD1SH,
|
|
460
|
+
"ld1sw", // ARM64_INS_LD1SW,
|
|
461
|
+
"ld1w", // ARM64_INS_LD1W,
|
|
462
|
+
"ld2", // ARM64_INS_LD2,
|
|
463
|
+
"ld2b", // ARM64_INS_LD2B,
|
|
464
|
+
"ld2d", // ARM64_INS_LD2D,
|
|
465
|
+
"ld2h", // ARM64_INS_LD2H,
|
|
466
|
+
"ld2r", // ARM64_INS_LD2R,
|
|
467
|
+
"ld2w", // ARM64_INS_LD2W,
|
|
468
|
+
"ld3", // ARM64_INS_LD3,
|
|
469
|
+
"ld3b", // ARM64_INS_LD3B,
|
|
470
|
+
"ld3d", // ARM64_INS_LD3D,
|
|
471
|
+
"ld3h", // ARM64_INS_LD3H,
|
|
472
|
+
"ld3r", // ARM64_INS_LD3R,
|
|
473
|
+
"ld3w", // ARM64_INS_LD3W,
|
|
474
|
+
"ld4", // ARM64_INS_LD4,
|
|
475
|
+
"ld4b", // ARM64_INS_LD4B,
|
|
476
|
+
"ld4d", // ARM64_INS_LD4D,
|
|
477
|
+
"ld4h", // ARM64_INS_LD4H,
|
|
478
|
+
"ld4r", // ARM64_INS_LD4R,
|
|
479
|
+
"ld4w", // ARM64_INS_LD4W,
|
|
480
|
+
"ld64b", // ARM64_INS_LD64B,
|
|
481
|
+
"ldadd", // ARM64_INS_LDADD,
|
|
482
|
+
"ldadda", // ARM64_INS_LDADDA,
|
|
483
|
+
"ldaddab", // ARM64_INS_LDADDAB,
|
|
484
|
+
"ldaddah", // ARM64_INS_LDADDAH,
|
|
485
|
+
"ldaddal", // ARM64_INS_LDADDAL,
|
|
486
|
+
"ldaddalb", // ARM64_INS_LDADDALB,
|
|
487
|
+
"ldaddalh", // ARM64_INS_LDADDALH,
|
|
488
|
+
"ldaddb", // ARM64_INS_LDADDB,
|
|
489
|
+
"ldaddh", // ARM64_INS_LDADDH,
|
|
490
|
+
"ldaddl", // ARM64_INS_LDADDL,
|
|
491
|
+
"ldaddlb", // ARM64_INS_LDADDLB,
|
|
492
|
+
"ldaddlh", // ARM64_INS_LDADDLH,
|
|
493
|
+
"ldapr", // ARM64_INS_LDAPR,
|
|
494
|
+
"ldaprb", // ARM64_INS_LDAPRB,
|
|
495
|
+
"ldaprh", // ARM64_INS_LDAPRH,
|
|
496
|
+
"ldapur", // ARM64_INS_LDAPUR,
|
|
497
|
+
"ldapurb", // ARM64_INS_LDAPURB,
|
|
498
|
+
"ldapurh", // ARM64_INS_LDAPURH,
|
|
499
|
+
"ldapursb", // ARM64_INS_LDAPURSB,
|
|
500
|
+
"ldapursh", // ARM64_INS_LDAPURSH,
|
|
501
|
+
"ldapursw", // ARM64_INS_LDAPURSW,
|
|
502
|
+
"ldar", // ARM64_INS_LDAR,
|
|
503
|
+
"ldarb", // ARM64_INS_LDARB,
|
|
504
|
+
"ldarh", // ARM64_INS_LDARH,
|
|
505
|
+
"ldaxp", // ARM64_INS_LDAXP,
|
|
506
|
+
"ldaxr", // ARM64_INS_LDAXR,
|
|
507
|
+
"ldaxrb", // ARM64_INS_LDAXRB,
|
|
508
|
+
"ldaxrh", // ARM64_INS_LDAXRH,
|
|
509
|
+
"ldclr", // ARM64_INS_LDCLR,
|
|
510
|
+
"ldclra", // ARM64_INS_LDCLRA,
|
|
511
|
+
"ldclrab", // ARM64_INS_LDCLRAB,
|
|
512
|
+
"ldclrah", // ARM64_INS_LDCLRAH,
|
|
513
|
+
"ldclral", // ARM64_INS_LDCLRAL,
|
|
514
|
+
"ldclralb", // ARM64_INS_LDCLRALB,
|
|
515
|
+
"ldclralh", // ARM64_INS_LDCLRALH,
|
|
516
|
+
"ldclrb", // ARM64_INS_LDCLRB,
|
|
517
|
+
"ldclrh", // ARM64_INS_LDCLRH,
|
|
518
|
+
"ldclrl", // ARM64_INS_LDCLRL,
|
|
519
|
+
"ldclrlb", // ARM64_INS_LDCLRLB,
|
|
520
|
+
"ldclrlh", // ARM64_INS_LDCLRLH,
|
|
521
|
+
"ldeor", // ARM64_INS_LDEOR,
|
|
522
|
+
"ldeora", // ARM64_INS_LDEORA,
|
|
523
|
+
"ldeorab", // ARM64_INS_LDEORAB,
|
|
524
|
+
"ldeorah", // ARM64_INS_LDEORAH,
|
|
525
|
+
"ldeoral", // ARM64_INS_LDEORAL,
|
|
526
|
+
"ldeoralb", // ARM64_INS_LDEORALB,
|
|
527
|
+
"ldeoralh", // ARM64_INS_LDEORALH,
|
|
528
|
+
"ldeorb", // ARM64_INS_LDEORB,
|
|
529
|
+
"ldeorh", // ARM64_INS_LDEORH,
|
|
530
|
+
"ldeorl", // ARM64_INS_LDEORL,
|
|
531
|
+
"ldeorlb", // ARM64_INS_LDEORLB,
|
|
532
|
+
"ldeorlh", // ARM64_INS_LDEORLH,
|
|
533
|
+
"ldff1b", // ARM64_INS_LDFF1B,
|
|
534
|
+
"ldff1d", // ARM64_INS_LDFF1D,
|
|
535
|
+
"ldff1h", // ARM64_INS_LDFF1H,
|
|
536
|
+
"ldff1sb", // ARM64_INS_LDFF1SB,
|
|
537
|
+
"ldff1sh", // ARM64_INS_LDFF1SH,
|
|
538
|
+
"ldff1sw", // ARM64_INS_LDFF1SW,
|
|
539
|
+
"ldff1w", // ARM64_INS_LDFF1W,
|
|
540
|
+
"ldg", // ARM64_INS_LDG,
|
|
541
|
+
"ldgm", // ARM64_INS_LDGM,
|
|
542
|
+
"ldlar", // ARM64_INS_LDLAR,
|
|
543
|
+
"ldlarb", // ARM64_INS_LDLARB,
|
|
544
|
+
"ldlarh", // ARM64_INS_LDLARH,
|
|
545
|
+
"ldnf1b", // ARM64_INS_LDNF1B,
|
|
546
|
+
"ldnf1d", // ARM64_INS_LDNF1D,
|
|
547
|
+
"ldnf1h", // ARM64_INS_LDNF1H,
|
|
548
|
+
"ldnf1sb", // ARM64_INS_LDNF1SB,
|
|
549
|
+
"ldnf1sh", // ARM64_INS_LDNF1SH,
|
|
550
|
+
"ldnf1sw", // ARM64_INS_LDNF1SW,
|
|
551
|
+
"ldnf1w", // ARM64_INS_LDNF1W,
|
|
552
|
+
"ldnp", // ARM64_INS_LDNP,
|
|
553
|
+
"ldnt1b", // ARM64_INS_LDNT1B,
|
|
554
|
+
"ldnt1d", // ARM64_INS_LDNT1D,
|
|
555
|
+
"ldnt1h", // ARM64_INS_LDNT1H,
|
|
556
|
+
"ldnt1sb", // ARM64_INS_LDNT1SB,
|
|
557
|
+
"ldnt1sh", // ARM64_INS_LDNT1SH,
|
|
558
|
+
"ldnt1sw", // ARM64_INS_LDNT1SW,
|
|
559
|
+
"ldnt1w", // ARM64_INS_LDNT1W,
|
|
560
|
+
"ldp", // ARM64_INS_LDP,
|
|
561
|
+
"ldpsw", // ARM64_INS_LDPSW,
|
|
562
|
+
"ldr", // ARM64_INS_LDR,
|
|
563
|
+
"ldraa", // ARM64_INS_LDRAA,
|
|
564
|
+
"ldrab", // ARM64_INS_LDRAB,
|
|
565
|
+
"ldrb", // ARM64_INS_LDRB,
|
|
566
|
+
"ldrh", // ARM64_INS_LDRH,
|
|
567
|
+
"ldrsb", // ARM64_INS_LDRSB,
|
|
568
|
+
"ldrsh", // ARM64_INS_LDRSH,
|
|
569
|
+
"ldrsw", // ARM64_INS_LDRSW,
|
|
570
|
+
"ldset", // ARM64_INS_LDSET,
|
|
571
|
+
"ldseta", // ARM64_INS_LDSETA,
|
|
572
|
+
"ldsetab", // ARM64_INS_LDSETAB,
|
|
573
|
+
"ldsetah", // ARM64_INS_LDSETAH,
|
|
574
|
+
"ldsetal", // ARM64_INS_LDSETAL,
|
|
575
|
+
"ldsetalb", // ARM64_INS_LDSETALB,
|
|
576
|
+
"ldsetalh", // ARM64_INS_LDSETALH,
|
|
577
|
+
"ldsetb", // ARM64_INS_LDSETB,
|
|
578
|
+
"ldseth", // ARM64_INS_LDSETH,
|
|
579
|
+
"ldsetl", // ARM64_INS_LDSETL,
|
|
580
|
+
"ldsetlb", // ARM64_INS_LDSETLB,
|
|
581
|
+
"ldsetlh", // ARM64_INS_LDSETLH,
|
|
582
|
+
"ldsmax", // ARM64_INS_LDSMAX,
|
|
583
|
+
"ldsmaxa", // ARM64_INS_LDSMAXA,
|
|
584
|
+
"ldsmaxab", // ARM64_INS_LDSMAXAB,
|
|
585
|
+
"ldsmaxah", // ARM64_INS_LDSMAXAH,
|
|
586
|
+
"ldsmaxal", // ARM64_INS_LDSMAXAL,
|
|
587
|
+
"ldsmaxalb", // ARM64_INS_LDSMAXALB,
|
|
588
|
+
"ldsmaxalh", // ARM64_INS_LDSMAXALH,
|
|
589
|
+
"ldsmaxb", // ARM64_INS_LDSMAXB,
|
|
590
|
+
"ldsmaxh", // ARM64_INS_LDSMAXH,
|
|
591
|
+
"ldsmaxl", // ARM64_INS_LDSMAXL,
|
|
592
|
+
"ldsmaxlb", // ARM64_INS_LDSMAXLB,
|
|
593
|
+
"ldsmaxlh", // ARM64_INS_LDSMAXLH,
|
|
594
|
+
"ldsmin", // ARM64_INS_LDSMIN,
|
|
595
|
+
"ldsmina", // ARM64_INS_LDSMINA,
|
|
596
|
+
"ldsminab", // ARM64_INS_LDSMINAB,
|
|
597
|
+
"ldsminah", // ARM64_INS_LDSMINAH,
|
|
598
|
+
"ldsminal", // ARM64_INS_LDSMINAL,
|
|
599
|
+
"ldsminalb", // ARM64_INS_LDSMINALB,
|
|
600
|
+
"ldsminalh", // ARM64_INS_LDSMINALH,
|
|
601
|
+
"ldsminb", // ARM64_INS_LDSMINB,
|
|
602
|
+
"ldsminh", // ARM64_INS_LDSMINH,
|
|
603
|
+
"ldsminl", // ARM64_INS_LDSMINL,
|
|
604
|
+
"ldsminlb", // ARM64_INS_LDSMINLB,
|
|
605
|
+
"ldsminlh", // ARM64_INS_LDSMINLH,
|
|
606
|
+
"ldtr", // ARM64_INS_LDTR,
|
|
607
|
+
"ldtrb", // ARM64_INS_LDTRB,
|
|
608
|
+
"ldtrh", // ARM64_INS_LDTRH,
|
|
609
|
+
"ldtrsb", // ARM64_INS_LDTRSB,
|
|
610
|
+
"ldtrsh", // ARM64_INS_LDTRSH,
|
|
611
|
+
"ldtrsw", // ARM64_INS_LDTRSW,
|
|
612
|
+
"ldumax", // ARM64_INS_LDUMAX,
|
|
613
|
+
"ldumaxa", // ARM64_INS_LDUMAXA,
|
|
614
|
+
"ldumaxab", // ARM64_INS_LDUMAXAB,
|
|
615
|
+
"ldumaxah", // ARM64_INS_LDUMAXAH,
|
|
616
|
+
"ldumaxal", // ARM64_INS_LDUMAXAL,
|
|
617
|
+
"ldumaxalb", // ARM64_INS_LDUMAXALB,
|
|
618
|
+
"ldumaxalh", // ARM64_INS_LDUMAXALH,
|
|
619
|
+
"ldumaxb", // ARM64_INS_LDUMAXB,
|
|
620
|
+
"ldumaxh", // ARM64_INS_LDUMAXH,
|
|
621
|
+
"ldumaxl", // ARM64_INS_LDUMAXL,
|
|
622
|
+
"ldumaxlb", // ARM64_INS_LDUMAXLB,
|
|
623
|
+
"ldumaxlh", // ARM64_INS_LDUMAXLH,
|
|
624
|
+
"ldumin", // ARM64_INS_LDUMIN,
|
|
625
|
+
"ldumina", // ARM64_INS_LDUMINA,
|
|
626
|
+
"lduminab", // ARM64_INS_LDUMINAB,
|
|
627
|
+
"lduminah", // ARM64_INS_LDUMINAH,
|
|
628
|
+
"lduminal", // ARM64_INS_LDUMINAL,
|
|
629
|
+
"lduminalb", // ARM64_INS_LDUMINALB,
|
|
630
|
+
"lduminalh", // ARM64_INS_LDUMINALH,
|
|
631
|
+
"lduminb", // ARM64_INS_LDUMINB,
|
|
632
|
+
"lduminh", // ARM64_INS_LDUMINH,
|
|
633
|
+
"lduminl", // ARM64_INS_LDUMINL,
|
|
634
|
+
"lduminlb", // ARM64_INS_LDUMINLB,
|
|
635
|
+
"lduminlh", // ARM64_INS_LDUMINLH,
|
|
636
|
+
"ldur", // ARM64_INS_LDUR,
|
|
637
|
+
"ldurb", // ARM64_INS_LDURB,
|
|
638
|
+
"ldurh", // ARM64_INS_LDURH,
|
|
639
|
+
"ldursb", // ARM64_INS_LDURSB,
|
|
640
|
+
"ldursh", // ARM64_INS_LDURSH,
|
|
641
|
+
"ldursw", // ARM64_INS_LDURSW,
|
|
642
|
+
"ldxp", // ARM64_INS_LDXP,
|
|
643
|
+
"ldxr", // ARM64_INS_LDXR,
|
|
644
|
+
"ldxrb", // ARM64_INS_LDXRB,
|
|
645
|
+
"ldxrh", // ARM64_INS_LDXRH,
|
|
646
|
+
"lsl", // ARM64_INS_LSL,
|
|
647
|
+
"lslr", // ARM64_INS_LSLR,
|
|
648
|
+
"lslv", // ARM64_INS_LSLV,
|
|
649
|
+
"lsr", // ARM64_INS_LSR,
|
|
650
|
+
"lsrr", // ARM64_INS_LSRR,
|
|
651
|
+
"lsrv", // ARM64_INS_LSRV,
|
|
652
|
+
"mad", // ARM64_INS_MAD,
|
|
653
|
+
"madd", // ARM64_INS_MADD,
|
|
654
|
+
"match", // ARM64_INS_MATCH,
|
|
655
|
+
"mla", // ARM64_INS_MLA,
|
|
656
|
+
"mls", // ARM64_INS_MLS,
|
|
657
|
+
"mneg", // ARM64_INS_MNEG,
|
|
658
|
+
"mov", // ARM64_INS_MOV,
|
|
659
|
+
"mova", // ARM64_INS_MOVA,
|
|
660
|
+
"movi", // ARM64_INS_MOVI,
|
|
661
|
+
"movk", // ARM64_INS_MOVK,
|
|
662
|
+
"movn", // ARM64_INS_MOVN,
|
|
663
|
+
"movprfx", // ARM64_INS_MOVPRFX,
|
|
664
|
+
"movs", // ARM64_INS_MOVS,
|
|
665
|
+
"movz", // ARM64_INS_MOVZ,
|
|
666
|
+
"mrs", // ARM64_INS_MRS,
|
|
667
|
+
"msb", // ARM64_INS_MSB,
|
|
668
|
+
"msr", // ARM64_INS_MSR,
|
|
669
|
+
"msub", // ARM64_INS_MSUB,
|
|
670
|
+
"mul", // ARM64_INS_MUL,
|
|
671
|
+
"mvn", // ARM64_INS_MVN,
|
|
672
|
+
"mvni", // ARM64_INS_MVNI,
|
|
673
|
+
"nand", // ARM64_INS_NAND,
|
|
674
|
+
"nands", // ARM64_INS_NANDS,
|
|
675
|
+
"nbsl", // ARM64_INS_NBSL,
|
|
676
|
+
"neg", // ARM64_INS_NEG,
|
|
677
|
+
"negs", // ARM64_INS_NEGS,
|
|
678
|
+
"ngc", // ARM64_INS_NGC,
|
|
679
|
+
"ngcs", // ARM64_INS_NGCS,
|
|
680
|
+
"nmatch", // ARM64_INS_NMATCH,
|
|
681
|
+
"nop", // ARM64_INS_NOP,
|
|
682
|
+
"nor", // ARM64_INS_NOR,
|
|
683
|
+
"nors", // ARM64_INS_NORS,
|
|
684
|
+
"not", // ARM64_INS_NOT,
|
|
685
|
+
"nots", // ARM64_INS_NOTS,
|
|
686
|
+
"orn", // ARM64_INS_ORN,
|
|
687
|
+
"orns", // ARM64_INS_ORNS,
|
|
688
|
+
"orr", // ARM64_INS_ORR,
|
|
689
|
+
"orrs", // ARM64_INS_ORRS,
|
|
690
|
+
"orv", // ARM64_INS_ORV,
|
|
691
|
+
"pacda", // ARM64_INS_PACDA,
|
|
692
|
+
"pacdb", // ARM64_INS_PACDB,
|
|
693
|
+
"pacdza", // ARM64_INS_PACDZA,
|
|
694
|
+
"pacdzb", // ARM64_INS_PACDZB,
|
|
695
|
+
"pacga", // ARM64_INS_PACGA,
|
|
696
|
+
"pacia", // ARM64_INS_PACIA,
|
|
697
|
+
"pacia1716", // ARM64_INS_PACIA1716,
|
|
698
|
+
"paciasp", // ARM64_INS_PACIASP,
|
|
699
|
+
"paciaz", // ARM64_INS_PACIAZ,
|
|
700
|
+
"pacib", // ARM64_INS_PACIB,
|
|
701
|
+
"pacib1716", // ARM64_INS_PACIB1716,
|
|
702
|
+
"pacibsp", // ARM64_INS_PACIBSP,
|
|
703
|
+
"pacibz", // ARM64_INS_PACIBZ,
|
|
704
|
+
"paciza", // ARM64_INS_PACIZA,
|
|
705
|
+
"pacizb", // ARM64_INS_PACIZB,
|
|
706
|
+
"pfalse", // ARM64_INS_PFALSE,
|
|
707
|
+
"pfirst", // ARM64_INS_PFIRST,
|
|
708
|
+
"pmul", // ARM64_INS_PMUL,
|
|
709
|
+
"pmull", // ARM64_INS_PMULL,
|
|
710
|
+
"pmull2", // ARM64_INS_PMULL2,
|
|
711
|
+
"pmullb", // ARM64_INS_PMULLB,
|
|
712
|
+
"pmullt", // ARM64_INS_PMULLT,
|
|
713
|
+
"pnext", // ARM64_INS_PNEXT,
|
|
714
|
+
"prfb", // ARM64_INS_PRFB,
|
|
715
|
+
"prfd", // ARM64_INS_PRFD,
|
|
716
|
+
"prfh", // ARM64_INS_PRFH,
|
|
717
|
+
"prfm", // ARM64_INS_PRFM,
|
|
718
|
+
"prfum", // ARM64_INS_PRFUM,
|
|
719
|
+
"prfw", // ARM64_INS_PRFW,
|
|
720
|
+
"psb", // ARM64_INS_PSB,
|
|
721
|
+
"psel", // ARM64_INS_PSEL,
|
|
722
|
+
"pssbb", // ARM64_INS_PSSBB,
|
|
723
|
+
"ptest", // ARM64_INS_PTEST,
|
|
724
|
+
"ptrue", // ARM64_INS_PTRUE,
|
|
725
|
+
"ptrues", // ARM64_INS_PTRUES,
|
|
726
|
+
"punpkhi", // ARM64_INS_PUNPKHI,
|
|
727
|
+
"punpklo", // ARM64_INS_PUNPKLO,
|
|
728
|
+
"raddhn", // ARM64_INS_RADDHN,
|
|
729
|
+
"raddhn2", // ARM64_INS_RADDHN2,
|
|
730
|
+
"raddhnb", // ARM64_INS_RADDHNB,
|
|
731
|
+
"raddhnt", // ARM64_INS_RADDHNT,
|
|
732
|
+
"rax1", // ARM64_INS_RAX1,
|
|
733
|
+
"rbit", // ARM64_INS_RBIT,
|
|
734
|
+
"rdffr", // ARM64_INS_RDFFR,
|
|
735
|
+
"rdffrs", // ARM64_INS_RDFFRS,
|
|
736
|
+
"rdvl", // ARM64_INS_RDVL,
|
|
737
|
+
"ret", // ARM64_INS_RET,
|
|
738
|
+
"retaa", // ARM64_INS_RETAA,
|
|
739
|
+
"retab", // ARM64_INS_RETAB,
|
|
740
|
+
"rev", // ARM64_INS_REV,
|
|
741
|
+
"rev16", // ARM64_INS_REV16,
|
|
742
|
+
"rev32", // ARM64_INS_REV32,
|
|
743
|
+
"rev64", // ARM64_INS_REV64,
|
|
744
|
+
"revb", // ARM64_INS_REVB,
|
|
745
|
+
"revd", // ARM64_INS_REVD,
|
|
746
|
+
"revh", // ARM64_INS_REVH,
|
|
747
|
+
"revw", // ARM64_INS_REVW,
|
|
748
|
+
"rmif", // ARM64_INS_RMIF,
|
|
749
|
+
"ror", // ARM64_INS_ROR,
|
|
750
|
+
"rorv", // ARM64_INS_RORV,
|
|
751
|
+
"rshrn", // ARM64_INS_RSHRN,
|
|
752
|
+
"rshrn2", // ARM64_INS_RSHRN2,
|
|
753
|
+
"rshrnb", // ARM64_INS_RSHRNB,
|
|
754
|
+
"rshrnt", // ARM64_INS_RSHRNT,
|
|
755
|
+
"rsubhn", // ARM64_INS_RSUBHN,
|
|
756
|
+
"rsubhn2", // ARM64_INS_RSUBHN2,
|
|
757
|
+
"rsubhnb", // ARM64_INS_RSUBHNB,
|
|
758
|
+
"rsubhnt", // ARM64_INS_RSUBHNT,
|
|
759
|
+
"saba", // ARM64_INS_SABA,
|
|
760
|
+
"sabal", // ARM64_INS_SABAL,
|
|
761
|
+
"sabal2", // ARM64_INS_SABAL2,
|
|
762
|
+
"sabalb", // ARM64_INS_SABALB,
|
|
763
|
+
"sabalt", // ARM64_INS_SABALT,
|
|
764
|
+
"sabd", // ARM64_INS_SABD,
|
|
765
|
+
"sabdl", // ARM64_INS_SABDL,
|
|
766
|
+
"sabdl2", // ARM64_INS_SABDL2,
|
|
767
|
+
"sabdlb", // ARM64_INS_SABDLB,
|
|
768
|
+
"sabdlt", // ARM64_INS_SABDLT,
|
|
769
|
+
"sadalp", // ARM64_INS_SADALP,
|
|
770
|
+
"saddl", // ARM64_INS_SADDL,
|
|
771
|
+
"saddl2", // ARM64_INS_SADDL2,
|
|
772
|
+
"saddlb", // ARM64_INS_SADDLB,
|
|
773
|
+
"saddlbt", // ARM64_INS_SADDLBT,
|
|
774
|
+
"saddlp", // ARM64_INS_SADDLP,
|
|
775
|
+
"saddlt", // ARM64_INS_SADDLT,
|
|
776
|
+
"saddlv", // ARM64_INS_SADDLV,
|
|
777
|
+
"saddv", // ARM64_INS_SADDV,
|
|
778
|
+
"saddw", // ARM64_INS_SADDW,
|
|
779
|
+
"saddw2", // ARM64_INS_SADDW2,
|
|
780
|
+
"saddwb", // ARM64_INS_SADDWB,
|
|
781
|
+
"saddwt", // ARM64_INS_SADDWT,
|
|
782
|
+
"sb", // ARM64_INS_SB,
|
|
783
|
+
"sbc", // ARM64_INS_SBC,
|
|
784
|
+
"sbclb", // ARM64_INS_SBCLB,
|
|
785
|
+
"sbclt", // ARM64_INS_SBCLT,
|
|
786
|
+
"sbcs", // ARM64_INS_SBCS,
|
|
787
|
+
"sbfm", // ARM64_INS_SBFM,
|
|
788
|
+
"sclamp", // ARM64_INS_SCLAMP,
|
|
789
|
+
"scvtf", // ARM64_INS_SCVTF,
|
|
790
|
+
"sdiv", // ARM64_INS_SDIV,
|
|
791
|
+
"sdivr", // ARM64_INS_SDIVR,
|
|
792
|
+
"sdot", // ARM64_INS_SDOT,
|
|
793
|
+
"sel", // ARM64_INS_SEL,
|
|
794
|
+
"sete", // ARM64_INS_SETE,
|
|
795
|
+
"seten", // ARM64_INS_SETEN,
|
|
796
|
+
"setet", // ARM64_INS_SETET,
|
|
797
|
+
"setetn", // ARM64_INS_SETETN,
|
|
798
|
+
"setf16", // ARM64_INS_SETF16,
|
|
799
|
+
"setf8", // ARM64_INS_SETF8,
|
|
800
|
+
"setffr", // ARM64_INS_SETFFR,
|
|
801
|
+
"setge", // ARM64_INS_SETGE,
|
|
802
|
+
"setgen", // ARM64_INS_SETGEN,
|
|
803
|
+
"setget", // ARM64_INS_SETGET,
|
|
804
|
+
"setgetn", // ARM64_INS_SETGETN,
|
|
805
|
+
"setgm", // ARM64_INS_SETGM,
|
|
806
|
+
"setgmn", // ARM64_INS_SETGMN,
|
|
807
|
+
"setgmt", // ARM64_INS_SETGMT,
|
|
808
|
+
"setgmtn", // ARM64_INS_SETGMTN,
|
|
809
|
+
"setgp", // ARM64_INS_SETGP,
|
|
810
|
+
"setgpn", // ARM64_INS_SETGPN,
|
|
811
|
+
"setgpt", // ARM64_INS_SETGPT,
|
|
812
|
+
"setgptn", // ARM64_INS_SETGPTN,
|
|
813
|
+
"setm", // ARM64_INS_SETM,
|
|
814
|
+
"setmn", // ARM64_INS_SETMN,
|
|
815
|
+
"setmt", // ARM64_INS_SETMT,
|
|
816
|
+
"setmtn", // ARM64_INS_SETMTN,
|
|
817
|
+
"setp", // ARM64_INS_SETP,
|
|
818
|
+
"setpn", // ARM64_INS_SETPN,
|
|
819
|
+
"setpt", // ARM64_INS_SETPT,
|
|
820
|
+
"setptn", // ARM64_INS_SETPTN,
|
|
821
|
+
"sev", // ARM64_INS_SEV,
|
|
822
|
+
"sevl", // ARM64_INS_SEVL,
|
|
823
|
+
"sha1c", // ARM64_INS_SHA1C,
|
|
824
|
+
"sha1h", // ARM64_INS_SHA1H,
|
|
825
|
+
"sha1m", // ARM64_INS_SHA1M,
|
|
826
|
+
"sha1p", // ARM64_INS_SHA1P,
|
|
827
|
+
"sha1su0", // ARM64_INS_SHA1SU0,
|
|
828
|
+
"sha1su1", // ARM64_INS_SHA1SU1,
|
|
829
|
+
"sha256h", // ARM64_INS_SHA256H,
|
|
830
|
+
"sha256h2", // ARM64_INS_SHA256H2,
|
|
831
|
+
"sha256su0", // ARM64_INS_SHA256SU0,
|
|
832
|
+
"sha256su1", // ARM64_INS_SHA256SU1,
|
|
833
|
+
"sha512h", // ARM64_INS_SHA512H,
|
|
834
|
+
"sha512h2", // ARM64_INS_SHA512H2,
|
|
835
|
+
"sha512su0", // ARM64_INS_SHA512SU0,
|
|
836
|
+
"sha512su1", // ARM64_INS_SHA512SU1,
|
|
837
|
+
"shadd", // ARM64_INS_SHADD,
|
|
838
|
+
"shl", // ARM64_INS_SHL,
|
|
839
|
+
"shll", // ARM64_INS_SHLL,
|
|
840
|
+
"shll2", // ARM64_INS_SHLL2,
|
|
841
|
+
"shrn", // ARM64_INS_SHRN,
|
|
842
|
+
"shrn2", // ARM64_INS_SHRN2,
|
|
843
|
+
"shrnb", // ARM64_INS_SHRNB,
|
|
844
|
+
"shrnt", // ARM64_INS_SHRNT,
|
|
845
|
+
"shsub", // ARM64_INS_SHSUB,
|
|
846
|
+
"shsubr", // ARM64_INS_SHSUBR,
|
|
847
|
+
"sli", // ARM64_INS_SLI,
|
|
848
|
+
"sm3partw1", // ARM64_INS_SM3PARTW1,
|
|
849
|
+
"sm3partw2", // ARM64_INS_SM3PARTW2,
|
|
850
|
+
"sm3ss1", // ARM64_INS_SM3SS1,
|
|
851
|
+
"sm3tt1a", // ARM64_INS_SM3TT1A,
|
|
852
|
+
"sm3tt1b", // ARM64_INS_SM3TT1B,
|
|
853
|
+
"sm3tt2a", // ARM64_INS_SM3TT2A,
|
|
854
|
+
"sm3tt2b", // ARM64_INS_SM3TT2B,
|
|
855
|
+
"sm4e", // ARM64_INS_SM4E,
|
|
856
|
+
"sm4ekey", // ARM64_INS_SM4EKEY,
|
|
857
|
+
"smaddl", // ARM64_INS_SMADDL,
|
|
858
|
+
"smax", // ARM64_INS_SMAX,
|
|
859
|
+
"smaxp", // ARM64_INS_SMAXP,
|
|
860
|
+
"smaxv", // ARM64_INS_SMAXV,
|
|
861
|
+
"smc", // ARM64_INS_SMC,
|
|
862
|
+
"smin", // ARM64_INS_SMIN,
|
|
863
|
+
"sminp", // ARM64_INS_SMINP,
|
|
864
|
+
"sminv", // ARM64_INS_SMINV,
|
|
865
|
+
"smlal", // ARM64_INS_SMLAL,
|
|
866
|
+
"smlal2", // ARM64_INS_SMLAL2,
|
|
867
|
+
"smlalb", // ARM64_INS_SMLALB,
|
|
868
|
+
"smlalt", // ARM64_INS_SMLALT,
|
|
869
|
+
"smlsl", // ARM64_INS_SMLSL,
|
|
870
|
+
"smlsl2", // ARM64_INS_SMLSL2,
|
|
871
|
+
"smlslb", // ARM64_INS_SMLSLB,
|
|
872
|
+
"smlslt", // ARM64_INS_SMLSLT,
|
|
873
|
+
"smmla", // ARM64_INS_SMMLA,
|
|
874
|
+
"smnegl", // ARM64_INS_SMNEGL,
|
|
875
|
+
"smopa", // ARM64_INS_SMOPA,
|
|
876
|
+
"smops", // ARM64_INS_SMOPS,
|
|
877
|
+
"smov", // ARM64_INS_SMOV,
|
|
878
|
+
"smstart", // ARM64_INS_SMSTART,
|
|
879
|
+
"smstop", // ARM64_INS_SMSTOP,
|
|
880
|
+
"smsubl", // ARM64_INS_SMSUBL,
|
|
881
|
+
"smulh", // ARM64_INS_SMULH,
|
|
882
|
+
"smull", // ARM64_INS_SMULL,
|
|
883
|
+
"smull2", // ARM64_INS_SMULL2,
|
|
884
|
+
"smullb", // ARM64_INS_SMULLB,
|
|
885
|
+
"smullt", // ARM64_INS_SMULLT,
|
|
886
|
+
"splice", // ARM64_INS_SPLICE,
|
|
887
|
+
"sqabs", // ARM64_INS_SQABS,
|
|
888
|
+
"sqadd", // ARM64_INS_SQADD,
|
|
889
|
+
"sqcadd", // ARM64_INS_SQCADD,
|
|
890
|
+
"sqdecb", // ARM64_INS_SQDECB,
|
|
891
|
+
"sqdecd", // ARM64_INS_SQDECD,
|
|
892
|
+
"sqdech", // ARM64_INS_SQDECH,
|
|
893
|
+
"sqdecp", // ARM64_INS_SQDECP,
|
|
894
|
+
"sqdecw", // ARM64_INS_SQDECW,
|
|
895
|
+
"sqdmlal", // ARM64_INS_SQDMLAL,
|
|
896
|
+
"sqdmlal2", // ARM64_INS_SQDMLAL2,
|
|
897
|
+
"sqdmlalb", // ARM64_INS_SQDMLALB,
|
|
898
|
+
"sqdmlalbt", // ARM64_INS_SQDMLALBT,
|
|
899
|
+
"sqdmlalt", // ARM64_INS_SQDMLALT,
|
|
900
|
+
"sqdmlsl", // ARM64_INS_SQDMLSL,
|
|
901
|
+
"sqdmlsl2", // ARM64_INS_SQDMLSL2,
|
|
902
|
+
"sqdmlslb", // ARM64_INS_SQDMLSLB,
|
|
903
|
+
"sqdmlslbt", // ARM64_INS_SQDMLSLBT,
|
|
904
|
+
"sqdmlslt", // ARM64_INS_SQDMLSLT,
|
|
905
|
+
"sqdmulh", // ARM64_INS_SQDMULH,
|
|
906
|
+
"sqdmull", // ARM64_INS_SQDMULL,
|
|
907
|
+
"sqdmull2", // ARM64_INS_SQDMULL2,
|
|
908
|
+
"sqdmullb", // ARM64_INS_SQDMULLB,
|
|
909
|
+
"sqdmullt", // ARM64_INS_SQDMULLT,
|
|
910
|
+
"sqincb", // ARM64_INS_SQINCB,
|
|
911
|
+
"sqincd", // ARM64_INS_SQINCD,
|
|
912
|
+
"sqinch", // ARM64_INS_SQINCH,
|
|
913
|
+
"sqincp", // ARM64_INS_SQINCP,
|
|
914
|
+
"sqincw", // ARM64_INS_SQINCW,
|
|
915
|
+
"sqneg", // ARM64_INS_SQNEG,
|
|
916
|
+
"sqrdcmlah", // ARM64_INS_SQRDCMLAH,
|
|
917
|
+
"sqrdmlah", // ARM64_INS_SQRDMLAH,
|
|
918
|
+
"sqrdmlsh", // ARM64_INS_SQRDMLSH,
|
|
919
|
+
"sqrdmulh", // ARM64_INS_SQRDMULH,
|
|
920
|
+
"sqrshl", // ARM64_INS_SQRSHL,
|
|
921
|
+
"sqrshlr", // ARM64_INS_SQRSHLR,
|
|
922
|
+
"sqrshrn", // ARM64_INS_SQRSHRN,
|
|
923
|
+
"sqrshrn2", // ARM64_INS_SQRSHRN2,
|
|
924
|
+
"sqrshrnb", // ARM64_INS_SQRSHRNB,
|
|
925
|
+
"sqrshrnt", // ARM64_INS_SQRSHRNT,
|
|
926
|
+
"sqrshrun", // ARM64_INS_SQRSHRUN,
|
|
927
|
+
"sqrshrun2", // ARM64_INS_SQRSHRUN2,
|
|
928
|
+
"sqrshrunb", // ARM64_INS_SQRSHRUNB,
|
|
929
|
+
"sqrshrunt", // ARM64_INS_SQRSHRUNT,
|
|
930
|
+
"sqshl", // ARM64_INS_SQSHL,
|
|
931
|
+
"sqshlr", // ARM64_INS_SQSHLR,
|
|
932
|
+
"sqshlu", // ARM64_INS_SQSHLU,
|
|
933
|
+
"sqshrn", // ARM64_INS_SQSHRN,
|
|
934
|
+
"sqshrn2", // ARM64_INS_SQSHRN2,
|
|
935
|
+
"sqshrnb", // ARM64_INS_SQSHRNB,
|
|
936
|
+
"sqshrnt", // ARM64_INS_SQSHRNT,
|
|
937
|
+
"sqshrun", // ARM64_INS_SQSHRUN,
|
|
938
|
+
"sqshrun2", // ARM64_INS_SQSHRUN2,
|
|
939
|
+
"sqshrunb", // ARM64_INS_SQSHRUNB,
|
|
940
|
+
"sqshrunt", // ARM64_INS_SQSHRUNT,
|
|
941
|
+
"sqsub", // ARM64_INS_SQSUB,
|
|
942
|
+
"sqsubr", // ARM64_INS_SQSUBR,
|
|
943
|
+
"sqxtn", // ARM64_INS_SQXTN,
|
|
944
|
+
"sqxtn2", // ARM64_INS_SQXTN2,
|
|
945
|
+
"sqxtnb", // ARM64_INS_SQXTNB,
|
|
946
|
+
"sqxtnt", // ARM64_INS_SQXTNT,
|
|
947
|
+
"sqxtun", // ARM64_INS_SQXTUN,
|
|
948
|
+
"sqxtun2", // ARM64_INS_SQXTUN2,
|
|
949
|
+
"sqxtunb", // ARM64_INS_SQXTUNB,
|
|
950
|
+
"sqxtunt", // ARM64_INS_SQXTUNT,
|
|
951
|
+
"srhadd", // ARM64_INS_SRHADD,
|
|
952
|
+
"sri", // ARM64_INS_SRI,
|
|
953
|
+
"srshl", // ARM64_INS_SRSHL,
|
|
954
|
+
"srshlr", // ARM64_INS_SRSHLR,
|
|
955
|
+
"srshr", // ARM64_INS_SRSHR,
|
|
956
|
+
"srsra", // ARM64_INS_SRSRA,
|
|
957
|
+
"ssbb", // ARM64_INS_SSBB,
|
|
958
|
+
"sshl", // ARM64_INS_SSHL,
|
|
959
|
+
"sshll", // ARM64_INS_SSHLL,
|
|
960
|
+
"sshll2", // ARM64_INS_SSHLL2,
|
|
961
|
+
"sshllb", // ARM64_INS_SSHLLB,
|
|
962
|
+
"sshllt", // ARM64_INS_SSHLLT,
|
|
963
|
+
"sshr", // ARM64_INS_SSHR,
|
|
964
|
+
"ssra", // ARM64_INS_SSRA,
|
|
965
|
+
"ssubl", // ARM64_INS_SSUBL,
|
|
966
|
+
"ssubl2", // ARM64_INS_SSUBL2,
|
|
967
|
+
"ssublb", // ARM64_INS_SSUBLB,
|
|
968
|
+
"ssublbt", // ARM64_INS_SSUBLBT,
|
|
969
|
+
"ssublt", // ARM64_INS_SSUBLT,
|
|
970
|
+
"ssubltb", // ARM64_INS_SSUBLTB,
|
|
971
|
+
"ssubw", // ARM64_INS_SSUBW,
|
|
972
|
+
"ssubw2", // ARM64_INS_SSUBW2,
|
|
973
|
+
"ssubwb", // ARM64_INS_SSUBWB,
|
|
974
|
+
"ssubwt", // ARM64_INS_SSUBWT,
|
|
975
|
+
"st1", // ARM64_INS_ST1,
|
|
976
|
+
"st1b", // ARM64_INS_ST1B,
|
|
977
|
+
"st1d", // ARM64_INS_ST1D,
|
|
978
|
+
"st1h", // ARM64_INS_ST1H,
|
|
979
|
+
"st1q", // ARM64_INS_ST1Q,
|
|
980
|
+
"st1w", // ARM64_INS_ST1W,
|
|
981
|
+
"st2", // ARM64_INS_ST2,
|
|
982
|
+
"st2b", // ARM64_INS_ST2B,
|
|
983
|
+
"st2d", // ARM64_INS_ST2D,
|
|
984
|
+
"st2g", // ARM64_INS_ST2G,
|
|
985
|
+
"st2h", // ARM64_INS_ST2H,
|
|
986
|
+
"st2w", // ARM64_INS_ST2W,
|
|
987
|
+
"st3", // ARM64_INS_ST3,
|
|
988
|
+
"st3b", // ARM64_INS_ST3B,
|
|
989
|
+
"st3d", // ARM64_INS_ST3D,
|
|
990
|
+
"st3h", // ARM64_INS_ST3H,
|
|
991
|
+
"st3w", // ARM64_INS_ST3W,
|
|
992
|
+
"st4", // ARM64_INS_ST4,
|
|
993
|
+
"st4b", // ARM64_INS_ST4B,
|
|
994
|
+
"st4d", // ARM64_INS_ST4D,
|
|
995
|
+
"st4h", // ARM64_INS_ST4H,
|
|
996
|
+
"st4w", // ARM64_INS_ST4W,
|
|
997
|
+
"st64b", // ARM64_INS_ST64B,
|
|
998
|
+
"st64bv", // ARM64_INS_ST64BV,
|
|
999
|
+
"st64bv0", // ARM64_INS_ST64BV0,
|
|
1000
|
+
"stadd", // ARM64_INS_STADD,
|
|
1001
|
+
"staddb", // ARM64_INS_STADDB,
|
|
1002
|
+
"staddh", // ARM64_INS_STADDH,
|
|
1003
|
+
"staddl", // ARM64_INS_STADDL,
|
|
1004
|
+
"staddlb", // ARM64_INS_STADDLB,
|
|
1005
|
+
"staddlh", // ARM64_INS_STADDLH,
|
|
1006
|
+
"stclr", // ARM64_INS_STCLR,
|
|
1007
|
+
"stclrb", // ARM64_INS_STCLRB,
|
|
1008
|
+
"stclrh", // ARM64_INS_STCLRH,
|
|
1009
|
+
"stclrl", // ARM64_INS_STCLRL,
|
|
1010
|
+
"stclrlb", // ARM64_INS_STCLRLB,
|
|
1011
|
+
"stclrlh", // ARM64_INS_STCLRLH,
|
|
1012
|
+
"steor", // ARM64_INS_STEOR,
|
|
1013
|
+
"steorb", // ARM64_INS_STEORB,
|
|
1014
|
+
"steorh", // ARM64_INS_STEORH,
|
|
1015
|
+
"steorl", // ARM64_INS_STEORL,
|
|
1016
|
+
"steorlb", // ARM64_INS_STEORLB,
|
|
1017
|
+
"steorlh", // ARM64_INS_STEORLH,
|
|
1018
|
+
"stg", // ARM64_INS_STG,
|
|
1019
|
+
"stgm", // ARM64_INS_STGM,
|
|
1020
|
+
"stgp", // ARM64_INS_STGP,
|
|
1021
|
+
"stllr", // ARM64_INS_STLLR,
|
|
1022
|
+
"stllrb", // ARM64_INS_STLLRB,
|
|
1023
|
+
"stllrh", // ARM64_INS_STLLRH,
|
|
1024
|
+
"stlr", // ARM64_INS_STLR,
|
|
1025
|
+
"stlrb", // ARM64_INS_STLRB,
|
|
1026
|
+
"stlrh", // ARM64_INS_STLRH,
|
|
1027
|
+
"stlur", // ARM64_INS_STLUR,
|
|
1028
|
+
"stlurb", // ARM64_INS_STLURB,
|
|
1029
|
+
"stlurh", // ARM64_INS_STLURH,
|
|
1030
|
+
"stlxp", // ARM64_INS_STLXP,
|
|
1031
|
+
"stlxr", // ARM64_INS_STLXR,
|
|
1032
|
+
"stlxrb", // ARM64_INS_STLXRB,
|
|
1033
|
+
"stlxrh", // ARM64_INS_STLXRH,
|
|
1034
|
+
"stnp", // ARM64_INS_STNP,
|
|
1035
|
+
"stnt1b", // ARM64_INS_STNT1B,
|
|
1036
|
+
"stnt1d", // ARM64_INS_STNT1D,
|
|
1037
|
+
"stnt1h", // ARM64_INS_STNT1H,
|
|
1038
|
+
"stnt1w", // ARM64_INS_STNT1W,
|
|
1039
|
+
"stp", // ARM64_INS_STP,
|
|
1040
|
+
"str", // ARM64_INS_STR,
|
|
1041
|
+
"strb", // ARM64_INS_STRB,
|
|
1042
|
+
"strh", // ARM64_INS_STRH,
|
|
1043
|
+
"stset", // ARM64_INS_STSET,
|
|
1044
|
+
"stsetb", // ARM64_INS_STSETB,
|
|
1045
|
+
"stseth", // ARM64_INS_STSETH,
|
|
1046
|
+
"stsetl", // ARM64_INS_STSETL,
|
|
1047
|
+
"stsetlb", // ARM64_INS_STSETLB,
|
|
1048
|
+
"stsetlh", // ARM64_INS_STSETLH,
|
|
1049
|
+
"stsmax", // ARM64_INS_STSMAX,
|
|
1050
|
+
"stsmaxb", // ARM64_INS_STSMAXB,
|
|
1051
|
+
"stsmaxh", // ARM64_INS_STSMAXH,
|
|
1052
|
+
"stsmaxl", // ARM64_INS_STSMAXL,
|
|
1053
|
+
"stsmaxlb", // ARM64_INS_STSMAXLB,
|
|
1054
|
+
"stsmaxlh", // ARM64_INS_STSMAXLH,
|
|
1055
|
+
"stsmin", // ARM64_INS_STSMIN,
|
|
1056
|
+
"stsminb", // ARM64_INS_STSMINB,
|
|
1057
|
+
"stsminh", // ARM64_INS_STSMINH,
|
|
1058
|
+
"stsminl", // ARM64_INS_STSMINL,
|
|
1059
|
+
"stsminlb", // ARM64_INS_STSMINLB,
|
|
1060
|
+
"stsminlh", // ARM64_INS_STSMINLH,
|
|
1061
|
+
"sttr", // ARM64_INS_STTR,
|
|
1062
|
+
"sttrb", // ARM64_INS_STTRB,
|
|
1063
|
+
"sttrh", // ARM64_INS_STTRH,
|
|
1064
|
+
"stumax", // ARM64_INS_STUMAX,
|
|
1065
|
+
"stumaxb", // ARM64_INS_STUMAXB,
|
|
1066
|
+
"stumaxh", // ARM64_INS_STUMAXH,
|
|
1067
|
+
"stumaxl", // ARM64_INS_STUMAXL,
|
|
1068
|
+
"stumaxlb", // ARM64_INS_STUMAXLB,
|
|
1069
|
+
"stumaxlh", // ARM64_INS_STUMAXLH,
|
|
1070
|
+
"stumin", // ARM64_INS_STUMIN,
|
|
1071
|
+
"stuminb", // ARM64_INS_STUMINB,
|
|
1072
|
+
"stuminh", // ARM64_INS_STUMINH,
|
|
1073
|
+
"stuminl", // ARM64_INS_STUMINL,
|
|
1074
|
+
"stuminlb", // ARM64_INS_STUMINLB,
|
|
1075
|
+
"stuminlh", // ARM64_INS_STUMINLH,
|
|
1076
|
+
"stur", // ARM64_INS_STUR,
|
|
1077
|
+
"sturb", // ARM64_INS_STURB,
|
|
1078
|
+
"sturh", // ARM64_INS_STURH,
|
|
1079
|
+
"stxp", // ARM64_INS_STXP,
|
|
1080
|
+
"stxr", // ARM64_INS_STXR,
|
|
1081
|
+
"stxrb", // ARM64_INS_STXRB,
|
|
1082
|
+
"stxrh", // ARM64_INS_STXRH,
|
|
1083
|
+
"stz2g", // ARM64_INS_STZ2G,
|
|
1084
|
+
"stzg", // ARM64_INS_STZG,
|
|
1085
|
+
"stzgm", // ARM64_INS_STZGM,
|
|
1086
|
+
"sub", // ARM64_INS_SUB,
|
|
1087
|
+
"subg", // ARM64_INS_SUBG,
|
|
1088
|
+
"subhn", // ARM64_INS_SUBHN,
|
|
1089
|
+
"subhn2", // ARM64_INS_SUBHN2,
|
|
1090
|
+
"subhnb", // ARM64_INS_SUBHNB,
|
|
1091
|
+
"subhnt", // ARM64_INS_SUBHNT,
|
|
1092
|
+
"subp", // ARM64_INS_SUBP,
|
|
1093
|
+
"subps", // ARM64_INS_SUBPS,
|
|
1094
|
+
"subr", // ARM64_INS_SUBR,
|
|
1095
|
+
"subs", // ARM64_INS_SUBS,
|
|
1096
|
+
"sudot", // ARM64_INS_SUDOT,
|
|
1097
|
+
"sumopa", // ARM64_INS_SUMOPA,
|
|
1098
|
+
"sumops", // ARM64_INS_SUMOPS,
|
|
1099
|
+
"sunpkhi", // ARM64_INS_SUNPKHI,
|
|
1100
|
+
"sunpklo", // ARM64_INS_SUNPKLO,
|
|
1101
|
+
"suqadd", // ARM64_INS_SUQADD,
|
|
1102
|
+
"svc", // ARM64_INS_SVC,
|
|
1103
|
+
"swp", // ARM64_INS_SWP,
|
|
1104
|
+
"swpa", // ARM64_INS_SWPA,
|
|
1105
|
+
"swpab", // ARM64_INS_SWPAB,
|
|
1106
|
+
"swpah", // ARM64_INS_SWPAH,
|
|
1107
|
+
"swpal", // ARM64_INS_SWPAL,
|
|
1108
|
+
"swpalb", // ARM64_INS_SWPALB,
|
|
1109
|
+
"swpalh", // ARM64_INS_SWPALH,
|
|
1110
|
+
"swpb", // ARM64_INS_SWPB,
|
|
1111
|
+
"swph", // ARM64_INS_SWPH,
|
|
1112
|
+
"swpl", // ARM64_INS_SWPL,
|
|
1113
|
+
"swplb", // ARM64_INS_SWPLB,
|
|
1114
|
+
"swplh", // ARM64_INS_SWPLH,
|
|
1115
|
+
"sxtb", // ARM64_INS_SXTB,
|
|
1116
|
+
"sxth", // ARM64_INS_SXTH,
|
|
1117
|
+
"sxtl", // ARM64_INS_SXTL,
|
|
1118
|
+
"sxtl2", // ARM64_INS_SXTL2,
|
|
1119
|
+
"sxtw", // ARM64_INS_SXTW,
|
|
1120
|
+
"sys", // ARM64_INS_SYS,
|
|
1121
|
+
"sysl", // ARM64_INS_SYSL,
|
|
1122
|
+
"tbl", // ARM64_INS_TBL,
|
|
1123
|
+
"tbnz", // ARM64_INS_TBNZ,
|
|
1124
|
+
"tbx", // ARM64_INS_TBX,
|
|
1125
|
+
"tbz", // ARM64_INS_TBZ,
|
|
1126
|
+
"tcancel", // ARM64_INS_TCANCEL,
|
|
1127
|
+
"tcommit", // ARM64_INS_TCOMMIT,
|
|
1128
|
+
"trn1", // ARM64_INS_TRN1,
|
|
1129
|
+
"trn2", // ARM64_INS_TRN2,
|
|
1130
|
+
"tsb", // ARM64_INS_TSB,
|
|
1131
|
+
"tst", // ARM64_INS_TST,
|
|
1132
|
+
"tstart", // ARM64_INS_TSTART,
|
|
1133
|
+
"ttest", // ARM64_INS_TTEST,
|
|
1134
|
+
"uaba", // ARM64_INS_UABA,
|
|
1135
|
+
"uabal", // ARM64_INS_UABAL,
|
|
1136
|
+
"uabal2", // ARM64_INS_UABAL2,
|
|
1137
|
+
"uabalb", // ARM64_INS_UABALB,
|
|
1138
|
+
"uabalt", // ARM64_INS_UABALT,
|
|
1139
|
+
"uabd", // ARM64_INS_UABD,
|
|
1140
|
+
"uabdl", // ARM64_INS_UABDL,
|
|
1141
|
+
"uabdl2", // ARM64_INS_UABDL2,
|
|
1142
|
+
"uabdlb", // ARM64_INS_UABDLB,
|
|
1143
|
+
"uabdlt", // ARM64_INS_UABDLT,
|
|
1144
|
+
"uadalp", // ARM64_INS_UADALP,
|
|
1145
|
+
"uaddl", // ARM64_INS_UADDL,
|
|
1146
|
+
"uaddl2", // ARM64_INS_UADDL2,
|
|
1147
|
+
"uaddlb", // ARM64_INS_UADDLB,
|
|
1148
|
+
"uaddlp", // ARM64_INS_UADDLP,
|
|
1149
|
+
"uaddlt", // ARM64_INS_UADDLT,
|
|
1150
|
+
"uaddlv", // ARM64_INS_UADDLV,
|
|
1151
|
+
"uaddv", // ARM64_INS_UADDV,
|
|
1152
|
+
"uaddw", // ARM64_INS_UADDW,
|
|
1153
|
+
"uaddw2", // ARM64_INS_UADDW2,
|
|
1154
|
+
"uaddwb", // ARM64_INS_UADDWB,
|
|
1155
|
+
"uaddwt", // ARM64_INS_UADDWT,
|
|
1156
|
+
"ubfm", // ARM64_INS_UBFM,
|
|
1157
|
+
"uclamp", // ARM64_INS_UCLAMP,
|
|
1158
|
+
"ucvtf", // ARM64_INS_UCVTF,
|
|
1159
|
+
"udf", // ARM64_INS_UDF,
|
|
1160
|
+
"udiv", // ARM64_INS_UDIV,
|
|
1161
|
+
"udivr", // ARM64_INS_UDIVR,
|
|
1162
|
+
"udot", // ARM64_INS_UDOT,
|
|
1163
|
+
"uhadd", // ARM64_INS_UHADD,
|
|
1164
|
+
"uhsub", // ARM64_INS_UHSUB,
|
|
1165
|
+
"uhsubr", // ARM64_INS_UHSUBR,
|
|
1166
|
+
"umaddl", // ARM64_INS_UMADDL,
|
|
1167
|
+
"umax", // ARM64_INS_UMAX,
|
|
1168
|
+
"umaxp", // ARM64_INS_UMAXP,
|
|
1169
|
+
"umaxv", // ARM64_INS_UMAXV,
|
|
1170
|
+
"umin", // ARM64_INS_UMIN,
|
|
1171
|
+
"uminp", // ARM64_INS_UMINP,
|
|
1172
|
+
"uminv", // ARM64_INS_UMINV,
|
|
1173
|
+
"umlal", // ARM64_INS_UMLAL,
|
|
1174
|
+
"umlal2", // ARM64_INS_UMLAL2,
|
|
1175
|
+
"umlalb", // ARM64_INS_UMLALB,
|
|
1176
|
+
"umlalt", // ARM64_INS_UMLALT,
|
|
1177
|
+
"umlsl", // ARM64_INS_UMLSL,
|
|
1178
|
+
"umlsl2", // ARM64_INS_UMLSL2,
|
|
1179
|
+
"umlslb", // ARM64_INS_UMLSLB,
|
|
1180
|
+
"umlslt", // ARM64_INS_UMLSLT,
|
|
1181
|
+
"ummla", // ARM64_INS_UMMLA,
|
|
1182
|
+
"umnegl", // ARM64_INS_UMNEGL,
|
|
1183
|
+
"umopa", // ARM64_INS_UMOPA,
|
|
1184
|
+
"umops", // ARM64_INS_UMOPS,
|
|
1185
|
+
"umov", // ARM64_INS_UMOV,
|
|
1186
|
+
"umsubl", // ARM64_INS_UMSUBL,
|
|
1187
|
+
"umulh", // ARM64_INS_UMULH,
|
|
1188
|
+
"umull", // ARM64_INS_UMULL,
|
|
1189
|
+
"umull2", // ARM64_INS_UMULL2,
|
|
1190
|
+
"umullb", // ARM64_INS_UMULLB,
|
|
1191
|
+
"umullt", // ARM64_INS_UMULLT,
|
|
1192
|
+
"uqadd", // ARM64_INS_UQADD,
|
|
1193
|
+
"uqdecb", // ARM64_INS_UQDECB,
|
|
1194
|
+
"uqdecd", // ARM64_INS_UQDECD,
|
|
1195
|
+
"uqdech", // ARM64_INS_UQDECH,
|
|
1196
|
+
"uqdecp", // ARM64_INS_UQDECP,
|
|
1197
|
+
"uqdecw", // ARM64_INS_UQDECW,
|
|
1198
|
+
"uqincb", // ARM64_INS_UQINCB,
|
|
1199
|
+
"uqincd", // ARM64_INS_UQINCD,
|
|
1200
|
+
"uqinch", // ARM64_INS_UQINCH,
|
|
1201
|
+
"uqincp", // ARM64_INS_UQINCP,
|
|
1202
|
+
"uqincw", // ARM64_INS_UQINCW,
|
|
1203
|
+
"uqrshl", // ARM64_INS_UQRSHL,
|
|
1204
|
+
"uqrshlr", // ARM64_INS_UQRSHLR,
|
|
1205
|
+
"uqrshrn", // ARM64_INS_UQRSHRN,
|
|
1206
|
+
"uqrshrn2", // ARM64_INS_UQRSHRN2,
|
|
1207
|
+
"uqrshrnb", // ARM64_INS_UQRSHRNB,
|
|
1208
|
+
"uqrshrnt", // ARM64_INS_UQRSHRNT,
|
|
1209
|
+
"uqshl", // ARM64_INS_UQSHL,
|
|
1210
|
+
"uqshlr", // ARM64_INS_UQSHLR,
|
|
1211
|
+
"uqshrn", // ARM64_INS_UQSHRN,
|
|
1212
|
+
"uqshrn2", // ARM64_INS_UQSHRN2,
|
|
1213
|
+
"uqshrnb", // ARM64_INS_UQSHRNB,
|
|
1214
|
+
"uqshrnt", // ARM64_INS_UQSHRNT,
|
|
1215
|
+
"uqsub", // ARM64_INS_UQSUB,
|
|
1216
|
+
"uqsubr", // ARM64_INS_UQSUBR,
|
|
1217
|
+
"uqxtn", // ARM64_INS_UQXTN,
|
|
1218
|
+
"uqxtn2", // ARM64_INS_UQXTN2,
|
|
1219
|
+
"uqxtnb", // ARM64_INS_UQXTNB,
|
|
1220
|
+
"uqxtnt", // ARM64_INS_UQXTNT,
|
|
1221
|
+
"urecpe", // ARM64_INS_URECPE,
|
|
1222
|
+
"urhadd", // ARM64_INS_URHADD,
|
|
1223
|
+
"urshl", // ARM64_INS_URSHL,
|
|
1224
|
+
"urshlr", // ARM64_INS_URSHLR,
|
|
1225
|
+
"urshr", // ARM64_INS_URSHR,
|
|
1226
|
+
"ursqrte", // ARM64_INS_URSQRTE,
|
|
1227
|
+
"ursra", // ARM64_INS_URSRA,
|
|
1228
|
+
"usdot", // ARM64_INS_USDOT,
|
|
1229
|
+
"ushl", // ARM64_INS_USHL,
|
|
1230
|
+
"ushll", // ARM64_INS_USHLL,
|
|
1231
|
+
"ushll2", // ARM64_INS_USHLL2,
|
|
1232
|
+
"ushllb", // ARM64_INS_USHLLB,
|
|
1233
|
+
"ushllt", // ARM64_INS_USHLLT,
|
|
1234
|
+
"ushr", // ARM64_INS_USHR,
|
|
1235
|
+
"usmmla", // ARM64_INS_USMMLA,
|
|
1236
|
+
"usmopa", // ARM64_INS_USMOPA,
|
|
1237
|
+
"usmops", // ARM64_INS_USMOPS,
|
|
1238
|
+
"usqadd", // ARM64_INS_USQADD,
|
|
1239
|
+
"usra", // ARM64_INS_USRA,
|
|
1240
|
+
"usubl", // ARM64_INS_USUBL,
|
|
1241
|
+
"usubl2", // ARM64_INS_USUBL2,
|
|
1242
|
+
"usublb", // ARM64_INS_USUBLB,
|
|
1243
|
+
"usublt", // ARM64_INS_USUBLT,
|
|
1244
|
+
"usubw", // ARM64_INS_USUBW,
|
|
1245
|
+
"usubw2", // ARM64_INS_USUBW2,
|
|
1246
|
+
"usubwb", // ARM64_INS_USUBWB,
|
|
1247
|
+
"usubwt", // ARM64_INS_USUBWT,
|
|
1248
|
+
"uunpkhi", // ARM64_INS_UUNPKHI,
|
|
1249
|
+
"uunpklo", // ARM64_INS_UUNPKLO,
|
|
1250
|
+
"uxtb", // ARM64_INS_UXTB,
|
|
1251
|
+
"uxth", // ARM64_INS_UXTH,
|
|
1252
|
+
"uxtl", // ARM64_INS_UXTL,
|
|
1253
|
+
"uxtl2", // ARM64_INS_UXTL2,
|
|
1254
|
+
"uxtw", // ARM64_INS_UXTW,
|
|
1255
|
+
"uzp1", // ARM64_INS_UZP1,
|
|
1256
|
+
"uzp2", // ARM64_INS_UZP2,
|
|
1257
|
+
"wfe", // ARM64_INS_WFE,
|
|
1258
|
+
"wfet", // ARM64_INS_WFET,
|
|
1259
|
+
"wfi", // ARM64_INS_WFI,
|
|
1260
|
+
"wfit", // ARM64_INS_WFIT,
|
|
1261
|
+
"whilege", // ARM64_INS_WHILEGE,
|
|
1262
|
+
"whilegt", // ARM64_INS_WHILEGT,
|
|
1263
|
+
"whilehi", // ARM64_INS_WHILEHI,
|
|
1264
|
+
"whilehs", // ARM64_INS_WHILEHS,
|
|
1265
|
+
"whilele", // ARM64_INS_WHILELE,
|
|
1266
|
+
"whilelo", // ARM64_INS_WHILELO,
|
|
1267
|
+
"whilels", // ARM64_INS_WHILELS,
|
|
1268
|
+
"whilelt", // ARM64_INS_WHILELT,
|
|
1269
|
+
"whilerw", // ARM64_INS_WHILERW,
|
|
1270
|
+
"whilewr", // ARM64_INS_WHILEWR,
|
|
1271
|
+
"wrffr", // ARM64_INS_WRFFR,
|
|
1272
|
+
"xaflag", // ARM64_INS_XAFLAG,
|
|
1273
|
+
"xar", // ARM64_INS_XAR,
|
|
1274
|
+
"xpacd", // ARM64_INS_XPACD,
|
|
1275
|
+
"xpaci", // ARM64_INS_XPACI,
|
|
1276
|
+
"xpaclri", // ARM64_INS_XPACLRI,
|
|
1277
|
+
"xtn", // ARM64_INS_XTN,
|
|
1278
|
+
"xtn2", // ARM64_INS_XTN2,
|
|
1279
|
+
"yield", // ARM64_INS_YIELD,
|
|
1280
|
+
"zero", // ARM64_INS_ZERO,
|
|
1281
|
+
"zip1", // ARM64_INS_ZIP1,
|
|
1282
|
+
"zip2", // ARM64_INS_ZIP2,
|