hexcore-capstone 1.2.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (332) hide show
  1. package/LICENSE +26 -0
  2. package/README.md +191 -0
  3. package/binding.gyp +168 -0
  4. package/deps/capstone/LEB128.h +38 -0
  5. package/deps/capstone/MCDisassembler.h +14 -0
  6. package/deps/capstone/MCFixedLenDisassembler.h +32 -0
  7. package/deps/capstone/MCInst.c +270 -0
  8. package/deps/capstone/MCInst.h +165 -0
  9. package/deps/capstone/MCInstrDesc.c +41 -0
  10. package/deps/capstone/MCInstrDesc.h +167 -0
  11. package/deps/capstone/MCRegisterInfo.c +151 -0
  12. package/deps/capstone/MCRegisterInfo.h +116 -0
  13. package/deps/capstone/Mapping.c +254 -0
  14. package/deps/capstone/Mapping.h +174 -0
  15. package/deps/capstone/MathExtras.h +442 -0
  16. package/deps/capstone/SStream.c +181 -0
  17. package/deps/capstone/SStream.h +40 -0
  18. package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
  19. package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
  20. package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
  21. package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
  22. package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
  23. package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
  24. package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
  25. package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
  26. package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
  27. package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
  28. package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
  29. package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
  30. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
  31. package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
  32. package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
  33. package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
  34. package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
  35. package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
  36. package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
  37. package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
  38. package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
  39. package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
  40. package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
  41. package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
  42. package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
  43. package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
  44. package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
  45. package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
  46. package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
  47. package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
  48. package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
  49. package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
  50. package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
  51. package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
  52. package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
  53. package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
  54. package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
  55. package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
  56. package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
  57. package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
  58. package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
  59. package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
  60. package/deps/capstone/arch/ARM/ARMModule.c +63 -0
  61. package/deps/capstone/arch/ARM/ARMModule.h +12 -0
  62. package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
  63. package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
  64. package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
  65. package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
  66. package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
  67. package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
  68. package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
  69. package/deps/capstone/arch/BPF/BPFModule.c +34 -0
  70. package/deps/capstone/arch/BPF/BPFModule.h +12 -0
  71. package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
  72. package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
  73. package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
  74. package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
  75. package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
  76. package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
  77. package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
  78. package/deps/capstone/arch/EVM/EVMModule.c +33 -0
  79. package/deps/capstone/arch/EVM/EVMModule.h +12 -0
  80. package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
  81. package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
  82. package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
  83. package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
  84. package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
  85. package/deps/capstone/arch/M680X/M680XModule.c +77 -0
  86. package/deps/capstone/arch/M680X/M680XModule.h +12 -0
  87. package/deps/capstone/arch/M680X/cpu12.inc +335 -0
  88. package/deps/capstone/arch/M680X/hcs08.inc +60 -0
  89. package/deps/capstone/arch/M680X/hd6301.inc +15 -0
  90. package/deps/capstone/arch/M680X/hd6309.inc +259 -0
  91. package/deps/capstone/arch/M680X/insn_props.inc +367 -0
  92. package/deps/capstone/arch/M680X/m6800.inc +277 -0
  93. package/deps/capstone/arch/M680X/m6801.inc +39 -0
  94. package/deps/capstone/arch/M680X/m6805.inc +277 -0
  95. package/deps/capstone/arch/M680X/m6808.inc +91 -0
  96. package/deps/capstone/arch/M680X/m6809.inc +352 -0
  97. package/deps/capstone/arch/M680X/m6811.inc +105 -0
  98. package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
  99. package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
  100. package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
  101. package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
  102. package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
  103. package/deps/capstone/arch/M68K/M68KModule.c +42 -0
  104. package/deps/capstone/arch/M68K/M68KModule.h +12 -0
  105. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
  106. package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
  107. package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
  108. package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
  109. package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
  110. package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
  111. package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
  112. package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
  113. package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
  114. package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
  115. package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
  116. package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
  117. package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
  118. package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
  119. package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
  120. package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
  121. package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
  122. package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
  123. package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
  124. package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
  125. package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
  126. package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
  127. package/deps/capstone/arch/Mips/MipsModule.c +52 -0
  128. package/deps/capstone/arch/Mips/MipsModule.h +12 -0
  129. package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
  130. package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
  131. package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
  132. package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
  133. package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
  134. package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
  135. package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
  136. package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
  137. package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
  138. package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
  139. package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
  140. package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
  141. package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
  142. package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
  143. package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
  144. package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
  145. package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
  146. package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
  147. package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
  148. package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
  149. package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
  150. package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
  151. package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
  152. package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
  153. package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
  154. package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
  155. package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
  156. package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
  157. package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
  158. package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
  159. package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
  160. package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
  161. package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
  162. package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
  163. package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
  164. package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
  165. package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
  166. package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
  167. package/deps/capstone/arch/SH/SHModule.c +39 -0
  168. package/deps/capstone/arch/SH/SHModule.h +12 -0
  169. package/deps/capstone/arch/SH/mktable.rb +390 -0
  170. package/deps/capstone/arch/Sparc/Sparc.h +63 -0
  171. package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
  172. package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
  173. package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
  174. package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
  175. package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
  176. package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
  177. package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
  178. package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
  179. package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
  180. package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
  181. package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
  182. package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
  183. package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
  184. package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
  185. package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
  186. package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
  187. package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
  188. package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
  189. package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
  190. package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
  191. package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
  192. package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
  193. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
  194. package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
  195. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
  196. package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
  197. package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
  198. package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
  199. package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
  200. package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
  201. package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
  202. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
  203. package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
  204. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
  205. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
  206. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
  207. package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
  208. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
  209. package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
  210. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
  211. package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
  212. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
  213. package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
  214. package/deps/capstone/arch/TriCore/TriCore.td +134 -0
  215. package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
  216. package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
  217. package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
  218. package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
  219. package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
  220. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
  221. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
  222. package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
  223. package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
  224. package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
  225. package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
  226. package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
  227. package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
  228. package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
  229. package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
  230. package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
  231. package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
  232. package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
  233. package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
  234. package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
  235. package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
  236. package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
  237. package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
  238. package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
  239. package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
  240. package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
  241. package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
  242. package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
  243. package/deps/capstone/arch/WASM/WASMModule.c +33 -0
  244. package/deps/capstone/arch/WASM/WASMModule.h +12 -0
  245. package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
  246. package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
  247. package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
  248. package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
  249. package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
  250. package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
  251. package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
  252. package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
  253. package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
  254. package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
  255. package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
  256. package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
  257. package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
  258. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
  259. package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
  260. package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
  261. package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
  262. package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
  263. package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
  264. package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
  265. package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
  266. package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
  267. package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
  268. package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
  269. package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
  270. package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
  271. package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
  272. package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
  273. package/deps/capstone/arch/X86/X86Mapping.h +96 -0
  274. package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
  275. package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
  276. package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
  277. package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
  278. package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
  279. package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
  280. package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
  281. package/deps/capstone/arch/X86/X86Module.c +94 -0
  282. package/deps/capstone/arch/X86/X86Module.h +12 -0
  283. package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
  284. package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
  285. package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
  286. package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
  287. package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
  288. package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
  289. package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
  290. package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
  291. package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
  292. package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
  293. package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
  294. package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
  295. package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
  296. package/deps/capstone/cs.c +1664 -0
  297. package/deps/capstone/cs_priv.h +101 -0
  298. package/deps/capstone/cs_simple_types.h +886 -0
  299. package/deps/capstone/include/capstone/arm.h +991 -0
  300. package/deps/capstone/include/capstone/arm64.h +3159 -0
  301. package/deps/capstone/include/capstone/bpf.h +209 -0
  302. package/deps/capstone/include/capstone/capstone.h +875 -0
  303. package/deps/capstone/include/capstone/evm.h +188 -0
  304. package/deps/capstone/include/capstone/m680x.h +537 -0
  305. package/deps/capstone/include/capstone/m68k.h +613 -0
  306. package/deps/capstone/include/capstone/mips.h +956 -0
  307. package/deps/capstone/include/capstone/mos65xx.h +204 -0
  308. package/deps/capstone/include/capstone/platform.h +122 -0
  309. package/deps/capstone/include/capstone/ppc.h +2108 -0
  310. package/deps/capstone/include/capstone/riscv.h +531 -0
  311. package/deps/capstone/include/capstone/sh.h +465 -0
  312. package/deps/capstone/include/capstone/sparc.h +520 -0
  313. package/deps/capstone/include/capstone/systemz.h +2601 -0
  314. package/deps/capstone/include/capstone/tms320c64x.h +359 -0
  315. package/deps/capstone/include/capstone/tricore.h +567 -0
  316. package/deps/capstone/include/capstone/wasm.h +250 -0
  317. package/deps/capstone/include/capstone/x86.h +1986 -0
  318. package/deps/capstone/include/capstone/xcore.h +235 -0
  319. package/deps/capstone/include/platform.h +110 -0
  320. package/deps/capstone/include/windowsce/intrin.h +12 -0
  321. package/deps/capstone/include/windowsce/stdint.h +133 -0
  322. package/deps/capstone/utils.c +140 -0
  323. package/deps/capstone/utils.h +54 -0
  324. package/index.d.ts +448 -0
  325. package/index.js +64 -0
  326. package/index.mjs +25 -0
  327. package/package.json +82 -0
  328. package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
  329. package/src/capstone_wrapper.cpp +910 -0
  330. package/src/capstone_wrapper.h +147 -0
  331. package/src/disasm_async_worker.h +215 -0
  332. package/src/main.cpp +145 -0
@@ -0,0 +1,853 @@
1
+ /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
+ |* *|
3
+ |* * XCore Disassembler *|
4
+ |* *|
5
+ |* Automatically generated file, do not edit! *|
6
+ |* *|
7
+ \*===----------------------------------------------------------------------===*/
8
+
9
+ /* Capstone Disassembly Engine */
10
+ /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
11
+
12
+ #include "../../MCInst.h"
13
+ #include "../../LEB128.h"
14
+
15
+ // Helper function for extracting fields from encoded instructions.
16
+ #define FieldFromInstruction(fname, InsnType) \
17
+ static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
18
+ { \
19
+ InsnType fieldMask; \
20
+ if (numBits == sizeof(InsnType)*8) \
21
+ fieldMask = (InsnType)(-1LL); \
22
+ else \
23
+ fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
24
+ return (insn & fieldMask) >> startBit; \
25
+ }
26
+
27
+ static const uint8_t DecoderTable16[] = {
28
+ /* 0 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ...
29
+ /* 3 */ MCD_OPC_FilterValue, 0, 108, 0, // Skip to: 115
30
+ /* 7 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ...
31
+ /* 10 */ MCD_OPC_FilterValue, 236, 15, 4, 0, // Skip to: 19
32
+ /* 15 */ MCD_OPC_Decode, 243, 1, 0, // Opcode: WAITEU_0R
33
+ /* 19 */ MCD_OPC_FilterValue, 237, 15, 3, 0, // Skip to: 27
34
+ /* 24 */ MCD_OPC_Decode, 59, 0, // Opcode: CLRE_0R
35
+ /* 27 */ MCD_OPC_FilterValue, 238, 15, 4, 0, // Skip to: 36
36
+ /* 32 */ MCD_OPC_Decode, 218, 1, 0, // Opcode: SSYNC_0r
37
+ /* 36 */ MCD_OPC_FilterValue, 239, 15, 3, 0, // Skip to: 44
38
+ /* 41 */ MCD_OPC_Decode, 93, 0, // Opcode: FREET_0R
39
+ /* 44 */ MCD_OPC_FilterValue, 252, 15, 3, 0, // Skip to: 52
40
+ /* 49 */ MCD_OPC_Decode, 68, 0, // Opcode: DCALL_0R
41
+ /* 52 */ MCD_OPC_FilterValue, 253, 15, 3, 0, // Skip to: 60
42
+ /* 57 */ MCD_OPC_Decode, 125, 0, // Opcode: KRET_0R
43
+ /* 60 */ MCD_OPC_FilterValue, 254, 15, 3, 0, // Skip to: 68
44
+ /* 65 */ MCD_OPC_Decode, 74, 0, // Opcode: DRET_0R
45
+ /* 68 */ MCD_OPC_FilterValue, 255, 15, 4, 0, // Skip to: 77
46
+ /* 73 */ MCD_OPC_Decode, 199, 1, 0, // Opcode: SETKEP_0R
47
+ /* 77 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
48
+ /* 80 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 87
49
+ /* 84 */ MCD_OPC_Decode, 77, 1, // Opcode: EDU_1r
50
+ /* 87 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 94
51
+ /* 91 */ MCD_OPC_Decode, 80, 1, // Opcode: EEU_1r
52
+ /* 94 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
53
+ /* 97 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 104
54
+ /* 101 */ MCD_OPC_Decode, 111, 2, // Opcode: INITPC_2r
55
+ /* 104 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 111
56
+ /* 108 */ MCD_OPC_Decode, 105, 2, // Opcode: GETST_2r
57
+ /* 111 */ MCD_OPC_Decode, 230, 1, 3, // Opcode: STW_2rus
58
+ /* 115 */ MCD_OPC_FilterValue, 1, 114, 0, // Skip to: 233
59
+ /* 119 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ...
60
+ /* 122 */ MCD_OPC_FilterValue, 236, 15, 4, 0, // Skip to: 131
61
+ /* 127 */ MCD_OPC_Decode, 152, 1, 0, // Opcode: LDSPC_0R
62
+ /* 131 */ MCD_OPC_FilterValue, 237, 15, 4, 0, // Skip to: 140
63
+ /* 136 */ MCD_OPC_Decode, 223, 1, 0, // Opcode: STSPC_0R
64
+ /* 140 */ MCD_OPC_FilterValue, 238, 15, 4, 0, // Skip to: 149
65
+ /* 145 */ MCD_OPC_Decode, 153, 1, 0, // Opcode: LDSSR_0R
66
+ /* 149 */ MCD_OPC_FilterValue, 239, 15, 4, 0, // Skip to: 158
67
+ /* 154 */ MCD_OPC_Decode, 224, 1, 0, // Opcode: STSSR_0R
68
+ /* 158 */ MCD_OPC_FilterValue, 252, 15, 4, 0, // Skip to: 167
69
+ /* 163 */ MCD_OPC_Decode, 222, 1, 0, // Opcode: STSED_0R
70
+ /* 167 */ MCD_OPC_FilterValue, 253, 15, 4, 0, // Skip to: 176
71
+ /* 172 */ MCD_OPC_Decode, 221, 1, 0, // Opcode: STET_0R
72
+ /* 176 */ MCD_OPC_FilterValue, 254, 15, 3, 0, // Skip to: 184
73
+ /* 181 */ MCD_OPC_Decode, 95, 0, // Opcode: GETED_0R
74
+ /* 184 */ MCD_OPC_FilterValue, 255, 15, 3, 0, // Skip to: 192
75
+ /* 189 */ MCD_OPC_Decode, 96, 0, // Opcode: GETET_0R
76
+ /* 192 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
77
+ /* 195 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 203
78
+ /* 199 */ MCD_OPC_Decode, 242, 1, 1, // Opcode: WAITET_1R
79
+ /* 203 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 211
80
+ /* 207 */ MCD_OPC_Decode, 241, 1, 1, // Opcode: WAITEF_1R
81
+ /* 211 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
82
+ /* 214 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 221
83
+ /* 218 */ MCD_OPC_Decode, 109, 2, // Opcode: INITDP_2r
84
+ /* 221 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 229
85
+ /* 225 */ MCD_OPC_Decode, 183, 1, 4, // Opcode: OUTT_2r
86
+ /* 229 */ MCD_OPC_Decode, 163, 1, 3, // Opcode: LDW_2rus
87
+ /* 233 */ MCD_OPC_FilterValue, 2, 100, 0, // Skip to: 337
88
+ /* 237 */ MCD_OPC_ExtractField, 0, 11, // Inst{10-0} ...
89
+ /* 240 */ MCD_OPC_FilterValue, 236, 15, 3, 0, // Skip to: 248
90
+ /* 245 */ MCD_OPC_Decode, 69, 0, // Opcode: DENTSP_0R
91
+ /* 248 */ MCD_OPC_FilterValue, 237, 15, 3, 0, // Skip to: 256
92
+ /* 253 */ MCD_OPC_Decode, 73, 0, // Opcode: DRESTSP_0R
93
+ /* 256 */ MCD_OPC_FilterValue, 238, 15, 3, 0, // Skip to: 264
94
+ /* 261 */ MCD_OPC_Decode, 97, 0, // Opcode: GETID_0R
95
+ /* 264 */ MCD_OPC_FilterValue, 239, 15, 3, 0, // Skip to: 272
96
+ /* 269 */ MCD_OPC_Decode, 98, 0, // Opcode: GETKEP_0R
97
+ /* 272 */ MCD_OPC_FilterValue, 252, 15, 3, 0, // Skip to: 280
98
+ /* 277 */ MCD_OPC_Decode, 99, 0, // Opcode: GETKSP_0R
99
+ /* 280 */ MCD_OPC_FilterValue, 253, 15, 4, 0, // Skip to: 289
100
+ /* 285 */ MCD_OPC_Decode, 151, 1, 0, // Opcode: LDSED_0R
101
+ /* 289 */ MCD_OPC_FilterValue, 254, 15, 4, 0, // Skip to: 298
102
+ /* 294 */ MCD_OPC_Decode, 149, 1, 0, // Opcode: LDET_0R
103
+ /* 298 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
104
+ /* 301 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 308
105
+ /* 305 */ MCD_OPC_Decode, 92, 1, // Opcode: FREER_1r
106
+ /* 308 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 316
107
+ /* 312 */ MCD_OPC_Decode, 171, 1, 1, // Opcode: MJOIN_1r
108
+ /* 316 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
109
+ /* 319 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 326
110
+ /* 323 */ MCD_OPC_Decode, 112, 2, // Opcode: INITSP_2r
111
+ /* 326 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 334
112
+ /* 330 */ MCD_OPC_Decode, 197, 1, 4, // Opcode: SETD_2r
113
+ /* 334 */ MCD_OPC_Decode, 23, 5, // Opcode: ADD_3r
114
+ /* 337 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 382
115
+ /* 341 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
116
+ /* 344 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 352
117
+ /* 348 */ MCD_OPC_Decode, 240, 1, 1, // Opcode: TSTART_1R
118
+ /* 352 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 360
119
+ /* 356 */ MCD_OPC_Decode, 174, 1, 1, // Opcode: MSYNC_1r
120
+ /* 360 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
121
+ /* 363 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 370
122
+ /* 367 */ MCD_OPC_Decode, 108, 2, // Opcode: INITCP_2r
123
+ /* 370 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 378
124
+ /* 374 */ MCD_OPC_Decode, 238, 1, 6, // Opcode: TSETMR_2r
125
+ /* 378 */ MCD_OPC_Decode, 233, 1, 5, // Opcode: SUB_3r
126
+ /* 382 */ MCD_OPC_FilterValue, 4, 30, 0, // Skip to: 416
127
+ /* 386 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
128
+ /* 389 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 396
129
+ /* 393 */ MCD_OPC_Decode, 36, 1, // Opcode: BLA_1r
130
+ /* 396 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 403
131
+ /* 400 */ MCD_OPC_Decode, 30, 1, // Opcode: BAU_1r
132
+ /* 403 */ MCD_OPC_CheckField, 4, 1, 1, 3, 0, // Skip to: 412
133
+ /* 409 */ MCD_OPC_Decode, 79, 2, // Opcode: EET_2r
134
+ /* 412 */ MCD_OPC_Decode, 215, 1, 5, // Opcode: SHL_3r
135
+ /* 416 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 459
136
+ /* 420 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
137
+ /* 423 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 430
138
+ /* 427 */ MCD_OPC_Decode, 53, 1, // Opcode: BRU_1r
139
+ /* 430 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 438
140
+ /* 434 */ MCD_OPC_Decode, 205, 1, 1, // Opcode: SETSP_1r
141
+ /* 438 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
142
+ /* 441 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 448
143
+ /* 445 */ MCD_OPC_Decode, 26, 7, // Opcode: ANDNOT_2r
144
+ /* 448 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 455
145
+ /* 452 */ MCD_OPC_Decode, 78, 2, // Opcode: EEF_2r
146
+ /* 455 */ MCD_OPC_Decode, 217, 1, 5, // Opcode: SHR_3r
147
+ /* 459 */ MCD_OPC_FilterValue, 6, 41, 0, // Skip to: 504
148
+ /* 463 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
149
+ /* 466 */ MCD_OPC_FilterValue, 126, 4, 0, // Skip to: 474
150
+ /* 470 */ MCD_OPC_Decode, 196, 1, 1, // Opcode: SETDP_1r
151
+ /* 474 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 482
152
+ /* 478 */ MCD_OPC_Decode, 192, 1, 1, // Opcode: SETCP_1r
153
+ /* 482 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
154
+ /* 485 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 493
155
+ /* 489 */ MCD_OPC_Decode, 212, 1, 7, // Opcode: SEXT_2r
156
+ /* 493 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 501
157
+ /* 497 */ MCD_OPC_Decode, 213, 1, 8, // Opcode: SEXT_rus
158
+ /* 501 */ MCD_OPC_Decode, 86, 5, // Opcode: EQ_3r
159
+ /* 504 */ MCD_OPC_FilterValue, 7, 39, 0, // Skip to: 547
160
+ /* 508 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
161
+ /* 511 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 518
162
+ /* 515 */ MCD_OPC_Decode, 70, 1, // Opcode: DGETREG_1r
163
+ /* 518 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 526
164
+ /* 522 */ MCD_OPC_Decode, 198, 1, 1, // Opcode: SETEV_1r
165
+ /* 526 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
166
+ /* 529 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 536
167
+ /* 533 */ MCD_OPC_Decode, 106, 2, // Opcode: GETTS_2r
168
+ /* 536 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 544
169
+ /* 540 */ MCD_OPC_Decode, 203, 1, 4, // Opcode: SETPT_2r
170
+ /* 544 */ MCD_OPC_Decode, 27, 5, // Opcode: AND_3r
171
+ /* 547 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 592
172
+ /* 551 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
173
+ /* 554 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 561
174
+ /* 558 */ MCD_OPC_Decode, 118, 1, // Opcode: KCALL_1r
175
+ /* 561 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 569
176
+ /* 565 */ MCD_OPC_Decode, 211, 1, 1, // Opcode: SETV_1r
177
+ /* 569 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
178
+ /* 572 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 580
179
+ /* 576 */ MCD_OPC_Decode, 245, 1, 7, // Opcode: ZEXT_2r
180
+ /* 580 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 588
181
+ /* 584 */ MCD_OPC_Decode, 246, 1, 8, // Opcode: ZEXT_rus
182
+ /* 588 */ MCD_OPC_Decode, 178, 1, 5, // Opcode: OR_3r
183
+ /* 592 */ MCD_OPC_FilterValue, 9, 40, 0, // Skip to: 636
184
+ /* 596 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
185
+ /* 599 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 606
186
+ /* 603 */ MCD_OPC_Decode, 75, 1, // Opcode: ECALLF_1r
187
+ /* 606 */ MCD_OPC_FilterValue, 127, 3, 0, // Skip to: 613
188
+ /* 610 */ MCD_OPC_Decode, 76, 1, // Opcode: ECALLT_1r
189
+ /* 613 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
190
+ /* 616 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 624
191
+ /* 620 */ MCD_OPC_Decode, 179, 1, 2, // Opcode: OUTCT_2r
192
+ /* 624 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 632
193
+ /* 628 */ MCD_OPC_Decode, 180, 1, 9, // Opcode: OUTCT_rus
194
+ /* 632 */ MCD_OPC_Decode, 164, 1, 5, // Opcode: LDW_3r
195
+ /* 636 */ MCD_OPC_FilterValue, 10, 19, 0, // Skip to: 659
196
+ /* 640 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
197
+ /* 643 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 651
198
+ /* 647 */ MCD_OPC_Decode, 226, 1, 10, // Opcode: STWDP_ru6
199
+ /* 651 */ MCD_OPC_FilterValue, 1, 54, 2, // Skip to: 1221
200
+ /* 655 */ MCD_OPC_Decode, 229, 1, 10, // Opcode: STWSP_ru6
201
+ /* 659 */ MCD_OPC_FilterValue, 11, 19, 0, // Skip to: 682
202
+ /* 663 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
203
+ /* 666 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 674
204
+ /* 670 */ MCD_OPC_Decode, 159, 1, 10, // Opcode: LDWDP_ru6
205
+ /* 674 */ MCD_OPC_FilterValue, 1, 31, 2, // Skip to: 1221
206
+ /* 678 */ MCD_OPC_Decode, 162, 1, 10, // Opcode: LDWSP_ru6
207
+ /* 682 */ MCD_OPC_FilterValue, 12, 19, 0, // Skip to: 705
208
+ /* 686 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
209
+ /* 689 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 697
210
+ /* 693 */ MCD_OPC_Decode, 141, 1, 10, // Opcode: LDAWDP_ru6
211
+ /* 697 */ MCD_OPC_FilterValue, 1, 8, 2, // Skip to: 1221
212
+ /* 701 */ MCD_OPC_Decode, 146, 1, 10, // Opcode: LDAWSP_ru6
213
+ /* 705 */ MCD_OPC_FilterValue, 13, 19, 0, // Skip to: 728
214
+ /* 709 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
215
+ /* 712 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 720
216
+ /* 716 */ MCD_OPC_Decode, 148, 1, 10, // Opcode: LDC_ru6
217
+ /* 720 */ MCD_OPC_FilterValue, 1, 241, 1, // Skip to: 1221
218
+ /* 724 */ MCD_OPC_Decode, 156, 1, 10, // Opcode: LDWCP_ru6
219
+ /* 728 */ MCD_OPC_FilterValue, 14, 80, 0, // Skip to: 812
220
+ /* 732 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
221
+ /* 735 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 773
222
+ /* 739 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ...
223
+ /* 742 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 749
224
+ /* 746 */ MCD_OPC_Decode, 52, 11, // Opcode: BRFU_u6
225
+ /* 749 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 756
226
+ /* 753 */ MCD_OPC_Decode, 35, 11, // Opcode: BLAT_u6
227
+ /* 756 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 763
228
+ /* 760 */ MCD_OPC_Decode, 88, 11, // Opcode: EXTDP_u6
229
+ /* 763 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 770
230
+ /* 767 */ MCD_OPC_Decode, 120, 11, // Opcode: KCALL_u6
231
+ /* 770 */ MCD_OPC_Decode, 50, 12, // Opcode: BRFT_ru6
232
+ /* 773 */ MCD_OPC_FilterValue, 1, 188, 1, // Skip to: 1221
233
+ /* 777 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ...
234
+ /* 780 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 787
235
+ /* 784 */ MCD_OPC_Decode, 46, 13, // Opcode: BRBU_u6
236
+ /* 787 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 794
237
+ /* 791 */ MCD_OPC_Decode, 84, 11, // Opcode: ENTSP_u6
238
+ /* 794 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 801
239
+ /* 798 */ MCD_OPC_Decode, 90, 11, // Opcode: EXTSP_u6
240
+ /* 801 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 809
241
+ /* 805 */ MCD_OPC_Decode, 189, 1, 11, // Opcode: RETSP_u6
242
+ /* 809 */ MCD_OPC_Decode, 44, 14, // Opcode: BRBT_ru6
243
+ /* 812 */ MCD_OPC_FilterValue, 15, 67, 0, // Skip to: 883
244
+ /* 816 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
245
+ /* 819 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 858
246
+ /* 823 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ...
247
+ /* 826 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 833
248
+ /* 830 */ MCD_OPC_Decode, 64, 11, // Opcode: CLRSR_u6
249
+ /* 833 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 841
250
+ /* 837 */ MCD_OPC_Decode, 209, 1, 11, // Opcode: SETSR_u6
251
+ /* 841 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 848
252
+ /* 845 */ MCD_OPC_Decode, 122, 11, // Opcode: KENTSP_u6
253
+ /* 848 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 855
254
+ /* 852 */ MCD_OPC_Decode, 124, 11, // Opcode: KRESTSP_u6
255
+ /* 855 */ MCD_OPC_Decode, 48, 12, // Opcode: BRFF_ru6
256
+ /* 858 */ MCD_OPC_FilterValue, 1, 103, 1, // Skip to: 1221
257
+ /* 862 */ MCD_OPC_ExtractField, 6, 4, // Inst{9-6} ...
258
+ /* 865 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 872
259
+ /* 869 */ MCD_OPC_Decode, 104, 11, // Opcode: GETSR_u6
260
+ /* 872 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 880
261
+ /* 876 */ MCD_OPC_Decode, 139, 1, 11, // Opcode: LDAWCP_u6
262
+ /* 880 */ MCD_OPC_Decode, 42, 14, // Opcode: BRBF_ru6
263
+ /* 883 */ MCD_OPC_FilterValue, 16, 38, 0, // Skip to: 925
264
+ /* 887 */ MCD_OPC_ExtractField, 4, 7, // Inst{10-4} ...
265
+ /* 890 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 897
266
+ /* 894 */ MCD_OPC_Decode, 60, 1, // Opcode: CLRPT_1R
267
+ /* 897 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 905
268
+ /* 901 */ MCD_OPC_Decode, 234, 1, 1, // Opcode: SYNCR_1r
269
+ /* 905 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
270
+ /* 908 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 915
271
+ /* 912 */ MCD_OPC_Decode, 102, 9, // Opcode: GETR_rus
272
+ /* 915 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 922
273
+ /* 919 */ MCD_OPC_Decode, 107, 2, // Opcode: INCT_2r
274
+ /* 922 */ MCD_OPC_Decode, 127, 5, // Opcode: LD16S_3r
275
+ /* 925 */ MCD_OPC_FilterValue, 17, 22, 0, // Skip to: 951
276
+ /* 929 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
277
+ /* 932 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 940
278
+ /* 936 */ MCD_OPC_Decode, 177, 1, 2, // Opcode: NOT
279
+ /* 940 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 947
280
+ /* 944 */ MCD_OPC_Decode, 115, 2, // Opcode: INT_2r
281
+ /* 947 */ MCD_OPC_Decode, 128, 1, 5, // Opcode: LD8U_3r
282
+ /* 951 */ MCD_OPC_FilterValue, 18, 21, 0, // Skip to: 976
283
+ /* 955 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
284
+ /* 958 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 966
285
+ /* 962 */ MCD_OPC_Decode, 176, 1, 2, // Opcode: NEG
286
+ /* 966 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 973
287
+ /* 970 */ MCD_OPC_Decode, 82, 2, // Opcode: ENDIN_2r
288
+ /* 973 */ MCD_OPC_Decode, 22, 3, // Opcode: ADD_2rus
289
+ /* 976 */ MCD_OPC_FilterValue, 19, 4, 0, // Skip to: 984
290
+ /* 980 */ MCD_OPC_Decode, 232, 1, 3, // Opcode: SUB_2rus
291
+ /* 984 */ MCD_OPC_FilterValue, 20, 23, 0, // Skip to: 1011
292
+ /* 988 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
293
+ /* 991 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 999
294
+ /* 995 */ MCD_OPC_Decode, 172, 1, 2, // Opcode: MKMSK_2r
295
+ /* 999 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1007
296
+ /* 1003 */ MCD_OPC_Decode, 173, 1, 15, // Opcode: MKMSK_rus
297
+ /* 1007 */ MCD_OPC_Decode, 214, 1, 16, // Opcode: SHL_2rus
298
+ /* 1011 */ MCD_OPC_FilterValue, 21, 23, 0, // Skip to: 1038
299
+ /* 1015 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
300
+ /* 1018 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1026
301
+ /* 1022 */ MCD_OPC_Decode, 184, 1, 4, // Opcode: OUT_2r
302
+ /* 1026 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1034
303
+ /* 1030 */ MCD_OPC_Decode, 182, 1, 7, // Opcode: OUTSHR_2r
304
+ /* 1034 */ MCD_OPC_Decode, 216, 1, 16, // Opcode: SHR_2rus
305
+ /* 1038 */ MCD_OPC_FilterValue, 22, 20, 0, // Skip to: 1062
306
+ /* 1042 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
307
+ /* 1045 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1052
308
+ /* 1049 */ MCD_OPC_Decode, 116, 2, // Opcode: IN_2r
309
+ /* 1052 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 1059
310
+ /* 1056 */ MCD_OPC_Decode, 114, 7, // Opcode: INSHR_2r
311
+ /* 1059 */ MCD_OPC_Decode, 85, 3, // Opcode: EQ_2rus
312
+ /* 1062 */ MCD_OPC_FilterValue, 23, 23, 0, // Skip to: 1089
313
+ /* 1066 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
314
+ /* 1069 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1077
315
+ /* 1073 */ MCD_OPC_Decode, 185, 1, 2, // Opcode: PEEK_2r
316
+ /* 1077 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1085
317
+ /* 1081 */ MCD_OPC_Decode, 235, 1, 2, // Opcode: TESTCT_2r
318
+ /* 1085 */ MCD_OPC_Decode, 239, 1, 17, // Opcode: TSETR_3r
319
+ /* 1089 */ MCD_OPC_FilterValue, 24, 23, 0, // Skip to: 1116
320
+ /* 1093 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
321
+ /* 1096 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1104
322
+ /* 1100 */ MCD_OPC_Decode, 201, 1, 4, // Opcode: SETPSC_2r
323
+ /* 1104 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1112
324
+ /* 1108 */ MCD_OPC_Decode, 237, 1, 2, // Opcode: TESTWCT_2r
325
+ /* 1112 */ MCD_OPC_Decode, 166, 1, 5, // Opcode: LSS_3r
326
+ /* 1116 */ MCD_OPC_FilterValue, 25, 21, 0, // Skip to: 1141
327
+ /* 1120 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
328
+ /* 1123 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1130
329
+ /* 1127 */ MCD_OPC_Decode, 57, 2, // Opcode: CHKCT_2r
330
+ /* 1130 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 1137
331
+ /* 1134 */ MCD_OPC_Decode, 58, 15, // Opcode: CHKCT_rus
332
+ /* 1137 */ MCD_OPC_Decode, 168, 1, 5, // Opcode: LSU_3r
333
+ /* 1141 */ MCD_OPC_FilterValue, 26, 17, 0, // Skip to: 1162
334
+ /* 1145 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
335
+ /* 1148 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1155
336
+ /* 1152 */ MCD_OPC_Decode, 40, 18, // Opcode: BLRF_u10
337
+ /* 1155 */ MCD_OPC_FilterValue, 1, 62, 0, // Skip to: 1221
338
+ /* 1159 */ MCD_OPC_Decode, 38, 19, // Opcode: BLRB_u10
339
+ /* 1162 */ MCD_OPC_FilterValue, 27, 19, 0, // Skip to: 1185
340
+ /* 1166 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
341
+ /* 1169 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1177
342
+ /* 1173 */ MCD_OPC_Decode, 135, 1, 18, // Opcode: LDAPF_u10
343
+ /* 1177 */ MCD_OPC_FilterValue, 1, 40, 0, // Skip to: 1221
344
+ /* 1181 */ MCD_OPC_Decode, 132, 1, 19, // Opcode: LDAPB_u10
345
+ /* 1185 */ MCD_OPC_FilterValue, 28, 18, 0, // Skip to: 1207
346
+ /* 1189 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
347
+ /* 1192 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1199
348
+ /* 1196 */ MCD_OPC_Decode, 33, 18, // Opcode: BLACP_u10
349
+ /* 1199 */ MCD_OPC_FilterValue, 1, 18, 0, // Skip to: 1221
350
+ /* 1203 */ MCD_OPC_Decode, 157, 1, 18, // Opcode: LDWCP_u10
351
+ /* 1207 */ MCD_OPC_FilterValue, 29, 10, 0, // Skip to: 1221
352
+ /* 1211 */ MCD_OPC_CheckField, 10, 1, 0, 4, 0, // Skip to: 1221
353
+ /* 1217 */ MCD_OPC_Decode, 195, 1, 12, // Opcode: SETC_ru6
354
+ /* 1221 */ MCD_OPC_Fail,
355
+ 0
356
+ };
357
+
358
+ static const uint8_t DecoderTable32[] = {
359
+ /* 0 */ MCD_OPC_ExtractField, 27, 5, // Inst{31-27} ...
360
+ /* 3 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 96
361
+ /* 7 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ...
362
+ /* 10 */ MCD_OPC_FilterValue, 31, 216, 3, // Skip to: 998
363
+ /* 14 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
364
+ /* 17 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 31
365
+ /* 21 */ MCD_OPC_CheckField, 16, 11, 236, 15, 17, 0, // Skip to: 45
366
+ /* 28 */ MCD_OPC_Decode, 31, 20, // Opcode: BITREV_l2r
367
+ /* 31 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 45
368
+ /* 35 */ MCD_OPC_CheckField, 16, 11, 236, 15, 3, 0, // Skip to: 45
369
+ /* 42 */ MCD_OPC_Decode, 56, 20, // Opcode: BYTEREV_l2r
370
+ /* 45 */ MCD_OPC_CheckField, 16, 11, 236, 15, 4, 0, // Skip to: 56
371
+ /* 52 */ MCD_OPC_Decode, 231, 1, 21, // Opcode: STW_l3r
372
+ /* 56 */ MCD_OPC_ExtractField, 20, 7, // Inst{26-20} ...
373
+ /* 59 */ MCD_OPC_FilterValue, 126, 3, 0, // Skip to: 66
374
+ /* 63 */ MCD_OPC_Decode, 66, 22, // Opcode: CRC8_l4r
375
+ /* 66 */ MCD_OPC_FilterValue, 127, 4, 0, // Skip to: 74
376
+ /* 70 */ MCD_OPC_Decode, 170, 1, 23, // Opcode: MACCU_l4r
377
+ /* 74 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
378
+ /* 77 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 85
379
+ /* 81 */ MCD_OPC_Decode, 150, 1, 24, // Opcode: LDIVU_l5r
380
+ /* 85 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 92
381
+ /* 89 */ MCD_OPC_Decode, 126, 24, // Opcode: LADD_l5r
382
+ /* 92 */ MCD_OPC_Decode, 165, 1, 25, // Opcode: LMUL_l6r
383
+ /* 96 */ MCD_OPC_FilterValue, 1, 86, 0, // Skip to: 186
384
+ /* 100 */ MCD_OPC_ExtractField, 11, 5, // Inst{15-11} ...
385
+ /* 103 */ MCD_OPC_FilterValue, 31, 123, 3, // Skip to: 998
386
+ /* 107 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
387
+ /* 110 */ MCD_OPC_FilterValue, 0, 116, 3, // Skip to: 998
388
+ /* 114 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
389
+ /* 117 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 136
390
+ /* 121 */ MCD_OPC_CheckField, 21, 6, 63, 29, 0, // Skip to: 156
391
+ /* 127 */ MCD_OPC_CheckField, 16, 4, 12, 23, 0, // Skip to: 156
392
+ /* 133 */ MCD_OPC_Decode, 65, 20, // Opcode: CLZ_l2r
393
+ /* 136 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 156
394
+ /* 140 */ MCD_OPC_CheckField, 21, 6, 63, 10, 0, // Skip to: 156
395
+ /* 146 */ MCD_OPC_CheckField, 16, 4, 12, 4, 0, // Skip to: 156
396
+ /* 152 */ MCD_OPC_Decode, 191, 1, 26, // Opcode: SETCLK_l2r
397
+ /* 156 */ MCD_OPC_CheckField, 21, 6, 63, 10, 0, // Skip to: 172
398
+ /* 162 */ MCD_OPC_CheckField, 16, 4, 12, 4, 0, // Skip to: 172
399
+ /* 168 */ MCD_OPC_Decode, 244, 1, 21, // Opcode: XOR_l3r
400
+ /* 172 */ MCD_OPC_CheckField, 21, 6, 63, 4, 0, // Skip to: 182
401
+ /* 178 */ MCD_OPC_Decode, 169, 1, 23, // Opcode: MACCS_l4r
402
+ /* 182 */ MCD_OPC_Decode, 167, 1, 24, // Opcode: LSUB_l5r
403
+ /* 186 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 219
404
+ /* 190 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
405
+ /* 193 */ MCD_OPC_FilterValue, 159, 251, 3, 31, 3, // Skip to: 998
406
+ /* 199 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
407
+ /* 202 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 209
408
+ /* 206 */ MCD_OPC_Decode, 110, 20, // Opcode: INITLR_l2r
409
+ /* 209 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 216
410
+ /* 213 */ MCD_OPC_Decode, 101, 20, // Opcode: GETPS_l2r
411
+ /* 216 */ MCD_OPC_Decode, 29, 21, // Opcode: ASHR_l3r
412
+ /* 219 */ MCD_OPC_FilterValue, 3, 31, 0, // Skip to: 254
413
+ /* 223 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
414
+ /* 226 */ MCD_OPC_FilterValue, 159, 251, 3, 254, 2, // Skip to: 998
415
+ /* 232 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
416
+ /* 235 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 243
417
+ /* 239 */ MCD_OPC_Decode, 202, 1, 26, // Opcode: SETPS_l2r
418
+ /* 243 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 250
419
+ /* 247 */ MCD_OPC_Decode, 94, 20, // Opcode: GETD_l2r
420
+ /* 250 */ MCD_OPC_Decode, 144, 1, 21, // Opcode: LDAWF_l3r
421
+ /* 254 */ MCD_OPC_FilterValue, 4, 32, 0, // Skip to: 290
422
+ /* 258 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
423
+ /* 261 */ MCD_OPC_FilterValue, 159, 251, 3, 219, 2, // Skip to: 998
424
+ /* 267 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
425
+ /* 270 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 278
426
+ /* 274 */ MCD_OPC_Decode, 236, 1, 20, // Opcode: TESTLCL_l2r
427
+ /* 278 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 286
428
+ /* 282 */ MCD_OPC_Decode, 210, 1, 26, // Opcode: SETTW_l2r
429
+ /* 286 */ MCD_OPC_Decode, 137, 1, 21, // Opcode: LDAWB_l3r
430
+ /* 290 */ MCD_OPC_FilterValue, 5, 32, 0, // Skip to: 326
431
+ /* 294 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
432
+ /* 297 */ MCD_OPC_FilterValue, 159, 251, 3, 183, 2, // Skip to: 998
433
+ /* 303 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
434
+ /* 306 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 314
435
+ /* 310 */ MCD_OPC_Decode, 204, 1, 26, // Opcode: SETRDY_l2r
436
+ /* 314 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 322
437
+ /* 318 */ MCD_OPC_Decode, 193, 1, 20, // Opcode: SETC_l2r
438
+ /* 322 */ MCD_OPC_Decode, 130, 1, 21, // Opcode: LDA16F_l3r
439
+ /* 326 */ MCD_OPC_FilterValue, 6, 31, 0, // Skip to: 361
440
+ /* 330 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
441
+ /* 333 */ MCD_OPC_FilterValue, 159, 251, 3, 147, 2, // Skip to: 998
442
+ /* 339 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
443
+ /* 342 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 350
444
+ /* 346 */ MCD_OPC_Decode, 200, 1, 26, // Opcode: SETN_l2r
445
+ /* 350 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 357
446
+ /* 354 */ MCD_OPC_Decode, 100, 20, // Opcode: GETN_l2r
447
+ /* 357 */ MCD_OPC_Decode, 129, 1, 21, // Opcode: LDA16B_l3r
448
+ /* 361 */ MCD_OPC_FilterValue, 7, 12, 0, // Skip to: 377
449
+ /* 365 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 113, 2, // Skip to: 998
450
+ /* 373 */ MCD_OPC_Decode, 175, 1, 21, // Opcode: MUL_l3r
451
+ /* 377 */ MCD_OPC_FilterValue, 8, 11, 0, // Skip to: 392
452
+ /* 381 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 97, 2, // Skip to: 998
453
+ /* 389 */ MCD_OPC_Decode, 71, 21, // Opcode: DIVS_l3r
454
+ /* 392 */ MCD_OPC_FilterValue, 9, 11, 0, // Skip to: 407
455
+ /* 396 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 82, 2, // Skip to: 998
456
+ /* 404 */ MCD_OPC_Decode, 72, 21, // Opcode: DIVU_l3r
457
+ /* 407 */ MCD_OPC_FilterValue, 10, 31, 0, // Skip to: 442
458
+ /* 411 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
459
+ /* 414 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 428
460
+ /* 418 */ MCD_OPC_CheckField, 10, 6, 60, 62, 2, // Skip to: 998
461
+ /* 424 */ MCD_OPC_Decode, 225, 1, 27, // Opcode: STWDP_lru6
462
+ /* 428 */ MCD_OPC_FilterValue, 1, 54, 2, // Skip to: 998
463
+ /* 432 */ MCD_OPC_CheckField, 10, 6, 60, 48, 2, // Skip to: 998
464
+ /* 438 */ MCD_OPC_Decode, 228, 1, 27, // Opcode: STWSP_lru6
465
+ /* 442 */ MCD_OPC_FilterValue, 11, 31, 0, // Skip to: 477
466
+ /* 446 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
467
+ /* 449 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 463
468
+ /* 453 */ MCD_OPC_CheckField, 10, 6, 60, 27, 2, // Skip to: 998
469
+ /* 459 */ MCD_OPC_Decode, 158, 1, 27, // Opcode: LDWDP_lru6
470
+ /* 463 */ MCD_OPC_FilterValue, 1, 19, 2, // Skip to: 998
471
+ /* 467 */ MCD_OPC_CheckField, 10, 6, 60, 13, 2, // Skip to: 998
472
+ /* 473 */ MCD_OPC_Decode, 161, 1, 27, // Opcode: LDWSP_lru6
473
+ /* 477 */ MCD_OPC_FilterValue, 12, 31, 0, // Skip to: 512
474
+ /* 481 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
475
+ /* 484 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 498
476
+ /* 488 */ MCD_OPC_CheckField, 10, 6, 60, 248, 1, // Skip to: 998
477
+ /* 494 */ MCD_OPC_Decode, 140, 1, 27, // Opcode: LDAWDP_lru6
478
+ /* 498 */ MCD_OPC_FilterValue, 1, 240, 1, // Skip to: 998
479
+ /* 502 */ MCD_OPC_CheckField, 10, 6, 60, 234, 1, // Skip to: 998
480
+ /* 508 */ MCD_OPC_Decode, 145, 1, 27, // Opcode: LDAWSP_lru6
481
+ /* 512 */ MCD_OPC_FilterValue, 13, 31, 0, // Skip to: 547
482
+ /* 516 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
483
+ /* 519 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 533
484
+ /* 523 */ MCD_OPC_CheckField, 10, 6, 60, 213, 1, // Skip to: 998
485
+ /* 529 */ MCD_OPC_Decode, 147, 1, 27, // Opcode: LDC_lru6
486
+ /* 533 */ MCD_OPC_FilterValue, 1, 205, 1, // Skip to: 998
487
+ /* 537 */ MCD_OPC_CheckField, 10, 6, 60, 199, 1, // Skip to: 998
488
+ /* 543 */ MCD_OPC_Decode, 154, 1, 27, // Opcode: LDWCP_lru6
489
+ /* 547 */ MCD_OPC_FilterValue, 14, 94, 0, // Skip to: 645
490
+ /* 551 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
491
+ /* 554 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 599
492
+ /* 558 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
493
+ /* 561 */ MCD_OPC_FilterValue, 60, 177, 1, // Skip to: 998
494
+ /* 565 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
495
+ /* 568 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 575
496
+ /* 572 */ MCD_OPC_Decode, 51, 28, // Opcode: BRFU_lu6
497
+ /* 575 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 582
498
+ /* 579 */ MCD_OPC_Decode, 34, 28, // Opcode: BLAT_lu6
499
+ /* 582 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 589
500
+ /* 586 */ MCD_OPC_Decode, 87, 28, // Opcode: EXTDP_lu6
501
+ /* 589 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 596
502
+ /* 593 */ MCD_OPC_Decode, 119, 28, // Opcode: KCALL_lu6
503
+ /* 596 */ MCD_OPC_Decode, 49, 29, // Opcode: BRFT_lru6
504
+ /* 599 */ MCD_OPC_FilterValue, 1, 139, 1, // Skip to: 998
505
+ /* 603 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
506
+ /* 606 */ MCD_OPC_FilterValue, 60, 132, 1, // Skip to: 998
507
+ /* 610 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
508
+ /* 613 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 620
509
+ /* 617 */ MCD_OPC_Decode, 45, 30, // Opcode: BRBU_lu6
510
+ /* 620 */ MCD_OPC_FilterValue, 13, 3, 0, // Skip to: 627
511
+ /* 624 */ MCD_OPC_Decode, 83, 28, // Opcode: ENTSP_lu6
512
+ /* 627 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 634
513
+ /* 631 */ MCD_OPC_Decode, 89, 28, // Opcode: EXTSP_lu6
514
+ /* 634 */ MCD_OPC_FilterValue, 15, 4, 0, // Skip to: 642
515
+ /* 638 */ MCD_OPC_Decode, 188, 1, 28, // Opcode: RETSP_lu6
516
+ /* 642 */ MCD_OPC_Decode, 43, 31, // Opcode: BRBT_lru6
517
+ /* 645 */ MCD_OPC_FilterValue, 15, 81, 0, // Skip to: 730
518
+ /* 649 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
519
+ /* 652 */ MCD_OPC_FilterValue, 0, 42, 0, // Skip to: 698
520
+ /* 656 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
521
+ /* 659 */ MCD_OPC_FilterValue, 60, 79, 1, // Skip to: 998
522
+ /* 663 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
523
+ /* 666 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 673
524
+ /* 670 */ MCD_OPC_Decode, 63, 28, // Opcode: CLRSR_lu6
525
+ /* 673 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 681
526
+ /* 677 */ MCD_OPC_Decode, 208, 1, 28, // Opcode: SETSR_lu6
527
+ /* 681 */ MCD_OPC_FilterValue, 14, 3, 0, // Skip to: 688
528
+ /* 685 */ MCD_OPC_Decode, 121, 28, // Opcode: KENTSP_lu6
529
+ /* 688 */ MCD_OPC_FilterValue, 15, 3, 0, // Skip to: 695
530
+ /* 692 */ MCD_OPC_Decode, 123, 28, // Opcode: KRESTSP_lu6
531
+ /* 695 */ MCD_OPC_Decode, 47, 29, // Opcode: BRFF_lru6
532
+ /* 698 */ MCD_OPC_FilterValue, 1, 40, 1, // Skip to: 998
533
+ /* 702 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
534
+ /* 705 */ MCD_OPC_FilterValue, 60, 33, 1, // Skip to: 998
535
+ /* 709 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
536
+ /* 712 */ MCD_OPC_FilterValue, 12, 3, 0, // Skip to: 719
537
+ /* 716 */ MCD_OPC_Decode, 103, 28, // Opcode: GETSR_lu6
538
+ /* 719 */ MCD_OPC_FilterValue, 13, 4, 0, // Skip to: 727
539
+ /* 723 */ MCD_OPC_Decode, 138, 1, 28, // Opcode: LDAWCP_lu6
540
+ /* 727 */ MCD_OPC_Decode, 41, 31, // Opcode: BRBF_lru6
541
+ /* 730 */ MCD_OPC_FilterValue, 16, 12, 0, // Skip to: 746
542
+ /* 734 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 0, 1, // Skip to: 998
543
+ /* 742 */ MCD_OPC_Decode, 219, 1, 21, // Opcode: ST16_l3r
544
+ /* 746 */ MCD_OPC_FilterValue, 17, 12, 0, // Skip to: 762
545
+ /* 750 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 240, 0, // Skip to: 998
546
+ /* 758 */ MCD_OPC_Decode, 220, 1, 21, // Opcode: ST8_l3r
547
+ /* 762 */ MCD_OPC_FilterValue, 18, 31, 0, // Skip to: 797
548
+ /* 766 */ MCD_OPC_ExtractField, 11, 16, // Inst{26-11} ...
549
+ /* 769 */ MCD_OPC_FilterValue, 159, 251, 3, 3, 0, // Skip to: 778
550
+ /* 775 */ MCD_OPC_Decode, 28, 32, // Opcode: ASHR_l2rus
551
+ /* 778 */ MCD_OPC_FilterValue, 191, 251, 3, 4, 0, // Skip to: 788
552
+ /* 784 */ MCD_OPC_Decode, 181, 1, 32, // Opcode: OUTPW_l2rus
553
+ /* 788 */ MCD_OPC_FilterValue, 223, 251, 3, 204, 0, // Skip to: 998
554
+ /* 794 */ MCD_OPC_Decode, 113, 32, // Opcode: INPW_l2rus
555
+ /* 797 */ MCD_OPC_FilterValue, 19, 12, 0, // Skip to: 813
556
+ /* 801 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 189, 0, // Skip to: 998
557
+ /* 809 */ MCD_OPC_Decode, 143, 1, 33, // Opcode: LDAWF_l2rus
558
+ /* 813 */ MCD_OPC_FilterValue, 20, 12, 0, // Skip to: 829
559
+ /* 817 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 173, 0, // Skip to: 998
560
+ /* 825 */ MCD_OPC_Decode, 136, 1, 33, // Opcode: LDAWB_l2rus
561
+ /* 829 */ MCD_OPC_FilterValue, 21, 11, 0, // Skip to: 844
562
+ /* 833 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 157, 0, // Skip to: 998
563
+ /* 841 */ MCD_OPC_Decode, 67, 34, // Opcode: CRC_l3r
564
+ /* 844 */ MCD_OPC_FilterValue, 24, 12, 0, // Skip to: 860
565
+ /* 848 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 142, 0, // Skip to: 998
566
+ /* 856 */ MCD_OPC_Decode, 186, 1, 21, // Opcode: REMS_l3r
567
+ /* 860 */ MCD_OPC_FilterValue, 25, 12, 0, // Skip to: 876
568
+ /* 864 */ MCD_OPC_CheckField, 11, 16, 159, 251, 3, 126, 0, // Skip to: 998
569
+ /* 872 */ MCD_OPC_Decode, 187, 1, 21, // Opcode: REMU_l3r
570
+ /* 876 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 909
571
+ /* 880 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
572
+ /* 883 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 896
573
+ /* 887 */ MCD_OPC_CheckField, 10, 6, 60, 105, 0, // Skip to: 998
574
+ /* 893 */ MCD_OPC_Decode, 39, 35, // Opcode: BLRF_lu10
575
+ /* 896 */ MCD_OPC_FilterValue, 1, 98, 0, // Skip to: 998
576
+ /* 900 */ MCD_OPC_CheckField, 10, 6, 60, 92, 0, // Skip to: 998
577
+ /* 906 */ MCD_OPC_Decode, 37, 36, // Opcode: BLRB_lu10
578
+ /* 909 */ MCD_OPC_FilterValue, 27, 31, 0, // Skip to: 944
579
+ /* 913 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
580
+ /* 916 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 930
581
+ /* 920 */ MCD_OPC_CheckField, 10, 6, 60, 72, 0, // Skip to: 998
582
+ /* 926 */ MCD_OPC_Decode, 133, 1, 35, // Opcode: LDAPF_lu10
583
+ /* 930 */ MCD_OPC_FilterValue, 1, 64, 0, // Skip to: 998
584
+ /* 934 */ MCD_OPC_CheckField, 10, 6, 60, 58, 0, // Skip to: 998
585
+ /* 940 */ MCD_OPC_Decode, 131, 1, 36, // Opcode: LDAPB_lu10
586
+ /* 944 */ MCD_OPC_FilterValue, 28, 30, 0, // Skip to: 978
587
+ /* 948 */ MCD_OPC_ExtractField, 26, 1, // Inst{26} ...
588
+ /* 951 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 964
589
+ /* 955 */ MCD_OPC_CheckField, 10, 6, 60, 37, 0, // Skip to: 998
590
+ /* 961 */ MCD_OPC_Decode, 32, 35, // Opcode: BLACP_lu10
591
+ /* 964 */ MCD_OPC_FilterValue, 1, 30, 0, // Skip to: 998
592
+ /* 968 */ MCD_OPC_CheckField, 10, 6, 60, 24, 0, // Skip to: 998
593
+ /* 974 */ MCD_OPC_Decode, 155, 1, 35, // Opcode: LDWCP_lu10
594
+ /* 978 */ MCD_OPC_FilterValue, 29, 16, 0, // Skip to: 998
595
+ /* 982 */ MCD_OPC_CheckField, 26, 1, 0, 10, 0, // Skip to: 998
596
+ /* 988 */ MCD_OPC_CheckField, 10, 6, 60, 4, 0, // Skip to: 998
597
+ /* 994 */ MCD_OPC_Decode, 194, 1, 29, // Opcode: SETC_lru6
598
+ /* 998 */ MCD_OPC_Fail,
599
+ 0
600
+ };
601
+
602
+ static bool checkDecoderPredicate(unsigned Idx, uint64_t Bits)
603
+ {
604
+ return true; //llvm_unreachable("Invalid index!");
605
+ }
606
+
607
+ #define DecodeToMCInst(fname,fieldname, InsnType) \
608
+ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
609
+ uint64_t Address, const void *Decoder) \
610
+ { \
611
+ InsnType tmp; \
612
+ switch (Idx) { \
613
+ default: \
614
+ case 0: \
615
+ return S; \
616
+ case 1: \
617
+ tmp = fieldname(insn, 0, 4); \
618
+ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
619
+ return S; \
620
+ case 2: \
621
+ if (Decode2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
622
+ return S; \
623
+ case 3: \
624
+ if (Decode2RUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
625
+ return S; \
626
+ case 4: \
627
+ if (DecodeR2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
628
+ return S; \
629
+ case 5: \
630
+ if (Decode3RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
631
+ return S; \
632
+ case 6: \
633
+ if (Decode2RImmInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
634
+ return S; \
635
+ case 7: \
636
+ if (Decode2RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
637
+ return S; \
638
+ case 8: \
639
+ if (DecodeRUSSrcDstBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
640
+ return S; \
641
+ case 9: \
642
+ if (DecodeRUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
643
+ return S; \
644
+ case 10: \
645
+ tmp = fieldname(insn, 6, 4); \
646
+ if (DecodeRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
647
+ tmp = fieldname(insn, 0, 6); \
648
+ MCOperand_CreateImm0(MI, tmp); \
649
+ return S; \
650
+ case 11: \
651
+ tmp = fieldname(insn, 0, 6); \
652
+ MCOperand_CreateImm0(MI, tmp); \
653
+ return S; \
654
+ case 12: \
655
+ tmp = fieldname(insn, 6, 4); \
656
+ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
657
+ tmp = fieldname(insn, 0, 6); \
658
+ MCOperand_CreateImm0(MI, tmp); \
659
+ return S; \
660
+ case 13: \
661
+ tmp = fieldname(insn, 0, 6); \
662
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
663
+ return S; \
664
+ case 14: \
665
+ tmp = fieldname(insn, 6, 4); \
666
+ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
667
+ tmp = fieldname(insn, 0, 6); \
668
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
669
+ return S; \
670
+ case 15: \
671
+ if (DecodeRUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
672
+ return S; \
673
+ case 16: \
674
+ if (Decode2RUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
675
+ return S; \
676
+ case 17: \
677
+ if (Decode3RImmInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
678
+ return S; \
679
+ case 18: \
680
+ tmp = fieldname(insn, 0, 10); \
681
+ MCOperand_CreateImm0(MI, tmp); \
682
+ return S; \
683
+ case 19: \
684
+ tmp = fieldname(insn, 0, 10); \
685
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
686
+ return S; \
687
+ case 20: \
688
+ if (DecodeL2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
689
+ return S; \
690
+ case 21: \
691
+ if (DecodeL3RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
692
+ return S; \
693
+ case 22: \
694
+ if (DecodeL4RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
695
+ return S; \
696
+ case 23: \
697
+ if (DecodeL4RSrcDstSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
698
+ return S; \
699
+ case 24: \
700
+ if (DecodeL5RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
701
+ return S; \
702
+ case 25: \
703
+ if (DecodeL6RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
704
+ return S; \
705
+ case 26: \
706
+ if (DecodeLR2RInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
707
+ return S; \
708
+ case 27: \
709
+ tmp = fieldname(insn, 22, 4); \
710
+ if (DecodeRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
711
+ tmp = 0; \
712
+ tmp |= (fieldname(insn, 0, 10) << 6); \
713
+ tmp |= (fieldname(insn, 16, 6) << 0); \
714
+ MCOperand_CreateImm0(MI, tmp); \
715
+ return S; \
716
+ case 28: \
717
+ tmp = 0; \
718
+ tmp |= (fieldname(insn, 0, 10) << 6); \
719
+ tmp |= (fieldname(insn, 16, 6) << 0); \
720
+ MCOperand_CreateImm0(MI, tmp); \
721
+ return S; \
722
+ case 29: \
723
+ tmp = fieldname(insn, 22, 4); \
724
+ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
725
+ tmp = 0; \
726
+ tmp |= (fieldname(insn, 0, 10) << 6); \
727
+ tmp |= (fieldname(insn, 16, 6) << 0); \
728
+ MCOperand_CreateImm0(MI, tmp); \
729
+ return S; \
730
+ case 30: \
731
+ tmp = 0; \
732
+ tmp |= (fieldname(insn, 0, 10) << 6); \
733
+ tmp |= (fieldname(insn, 16, 6) << 0); \
734
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
735
+ return S; \
736
+ case 31: \
737
+ tmp = fieldname(insn, 22, 4); \
738
+ if (DecodeGRRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
739
+ tmp = 0; \
740
+ tmp |= (fieldname(insn, 0, 10) << 6); \
741
+ tmp |= (fieldname(insn, 16, 6) << 0); \
742
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
743
+ return S; \
744
+ case 32: \
745
+ if (DecodeL2RUSBitpInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
746
+ return S; \
747
+ case 33: \
748
+ if (DecodeL2RUSInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
749
+ return S; \
750
+ case 34: \
751
+ if (DecodeL3RSrcDstInstruction(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
752
+ return S; \
753
+ case 35: \
754
+ tmp = 0; \
755
+ tmp |= (fieldname(insn, 0, 10) << 10); \
756
+ tmp |= (fieldname(insn, 16, 10) << 0); \
757
+ MCOperand_CreateImm0(MI, tmp); \
758
+ return S; \
759
+ case 36: \
760
+ tmp = 0; \
761
+ tmp |= (fieldname(insn, 0, 10) << 10); \
762
+ tmp |= (fieldname(insn, 16, 10) << 0); \
763
+ if (DecodeNegImmOperand(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
764
+ return S; \
765
+ } \
766
+ }
767
+
768
+ #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
769
+ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \
770
+ InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \
771
+ { \
772
+ uint64_t Bits = getFeatureBits(feature); \
773
+ const uint8_t *Ptr = DecodeTable; \
774
+ uint32_t CurFieldValue = 0, ExpectedValue; \
775
+ DecodeStatus S = MCDisassembler_Success; \
776
+ unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \
777
+ InsnType Val, FieldValue, PositiveMask, NegativeMask; \
778
+ bool Pred, Fail; \
779
+ for (;;) { \
780
+ switch (*Ptr) { \
781
+ default: \
782
+ return MCDisassembler_Fail; \
783
+ case MCD_OPC_ExtractField: { \
784
+ Start = *++Ptr; \
785
+ Len = *++Ptr; \
786
+ ++Ptr; \
787
+ CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \
788
+ break; \
789
+ } \
790
+ case MCD_OPC_FilterValue: { \
791
+ Val = (InsnType)decodeULEB128(++Ptr, &Len); \
792
+ Ptr += Len; \
793
+ NumToSkip = *Ptr++; \
794
+ NumToSkip |= (*Ptr++) << 8; \
795
+ if (Val != CurFieldValue) \
796
+ Ptr += NumToSkip; \
797
+ break; \
798
+ } \
799
+ case MCD_OPC_CheckField: { \
800
+ Start = *++Ptr; \
801
+ Len = *++Ptr; \
802
+ FieldValue = fieldname(insn, Start, Len); \
803
+ ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \
804
+ Ptr += Len; \
805
+ NumToSkip = *Ptr++; \
806
+ NumToSkip |= (*Ptr++) << 8; \
807
+ if (ExpectedValue != FieldValue) \
808
+ Ptr += NumToSkip; \
809
+ break; \
810
+ } \
811
+ case MCD_OPC_CheckPredicate: { \
812
+ PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \
813
+ Ptr += Len; \
814
+ NumToSkip = *Ptr++; \
815
+ NumToSkip |= (*Ptr++) << 8; \
816
+ Pred = checkDecoderPredicate(PIdx, Bits); \
817
+ if (!Pred) \
818
+ Ptr += NumToSkip; \
819
+ (void)Pred; \
820
+ break; \
821
+ } \
822
+ case MCD_OPC_Decode: { \
823
+ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \
824
+ Ptr += Len; \
825
+ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \
826
+ Ptr += Len; \
827
+ MCInst_setOpcode(MI, Opc); \
828
+ return decoder(S, DecodeIdx, insn, MI, Address, MRI); \
829
+ } \
830
+ case MCD_OPC_SoftFail: { \
831
+ PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \
832
+ Ptr += Len; \
833
+ NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \
834
+ Ptr += Len; \
835
+ Fail = (insn & PositiveMask) || (~insn & NegativeMask); \
836
+ if (Fail) \
837
+ S = MCDisassembler_SoftFail; \
838
+ break; \
839
+ } \
840
+ case MCD_OPC_Fail: { \
841
+ return MCDisassembler_Fail; \
842
+ } \
843
+ } \
844
+ } \
845
+ }
846
+
847
+
848
+ FieldFromInstruction(fieldFromInstruction_2, uint16_t)
849
+ DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint16_t)
850
+ DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint16_t)
851
+ FieldFromInstruction(fieldFromInstruction_4, uint32_t)
852
+ DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t)
853
+ DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t)