hexcore-capstone 1.2.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/LICENSE +26 -0
- package/README.md +191 -0
- package/binding.gyp +168 -0
- package/deps/capstone/LEB128.h +38 -0
- package/deps/capstone/MCDisassembler.h +14 -0
- package/deps/capstone/MCFixedLenDisassembler.h +32 -0
- package/deps/capstone/MCInst.c +270 -0
- package/deps/capstone/MCInst.h +165 -0
- package/deps/capstone/MCInstrDesc.c +41 -0
- package/deps/capstone/MCInstrDesc.h +167 -0
- package/deps/capstone/MCRegisterInfo.c +151 -0
- package/deps/capstone/MCRegisterInfo.h +116 -0
- package/deps/capstone/Mapping.c +254 -0
- package/deps/capstone/Mapping.h +174 -0
- package/deps/capstone/MathExtras.h +442 -0
- package/deps/capstone/SStream.c +181 -0
- package/deps/capstone/SStream.h +40 -0
- package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
- package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
- package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
- package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
- package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
- package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
- package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
- package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
- package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
- package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
- package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
- package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
- package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
- package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
- package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
- package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
- package/deps/capstone/arch/ARM/ARMModule.c +63 -0
- package/deps/capstone/arch/ARM/ARMModule.h +12 -0
- package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
- package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
- package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
- package/deps/capstone/arch/BPF/BPFModule.c +34 -0
- package/deps/capstone/arch/BPF/BPFModule.h +12 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
- package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
- package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
- package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
- package/deps/capstone/arch/EVM/EVMModule.c +33 -0
- package/deps/capstone/arch/EVM/EVMModule.h +12 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
- package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
- package/deps/capstone/arch/M680X/M680XModule.c +77 -0
- package/deps/capstone/arch/M680X/M680XModule.h +12 -0
- package/deps/capstone/arch/M680X/cpu12.inc +335 -0
- package/deps/capstone/arch/M680X/hcs08.inc +60 -0
- package/deps/capstone/arch/M680X/hd6301.inc +15 -0
- package/deps/capstone/arch/M680X/hd6309.inc +259 -0
- package/deps/capstone/arch/M680X/insn_props.inc +367 -0
- package/deps/capstone/arch/M680X/m6800.inc +277 -0
- package/deps/capstone/arch/M680X/m6801.inc +39 -0
- package/deps/capstone/arch/M680X/m6805.inc +277 -0
- package/deps/capstone/arch/M680X/m6808.inc +91 -0
- package/deps/capstone/arch/M680X/m6809.inc +352 -0
- package/deps/capstone/arch/M680X/m6811.inc +105 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
- package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
- package/deps/capstone/arch/M68K/M68KModule.c +42 -0
- package/deps/capstone/arch/M68K/M68KModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
- package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
- package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
- package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
- package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
- package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
- package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
- package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
- package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
- package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
- package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
- package/deps/capstone/arch/Mips/MipsModule.c +52 -0
- package/deps/capstone/arch/Mips/MipsModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
- package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
- package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
- package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
- package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
- package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
- package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
- package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
- package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
- package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
- package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
- package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
- package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
- package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
- package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
- package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
- package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
- package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
- package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
- package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
- package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
- package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
- package/deps/capstone/arch/SH/SHModule.c +39 -0
- package/deps/capstone/arch/SH/SHModule.h +12 -0
- package/deps/capstone/arch/SH/mktable.rb +390 -0
- package/deps/capstone/arch/Sparc/Sparc.h +63 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
- package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
- package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
- package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
- package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
- package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
- package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
- package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
- package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
- package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
- package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
- package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
- package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
- package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
- package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
- package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
- package/deps/capstone/arch/TriCore/TriCore.td +134 -0
- package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
- package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
- package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
- package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
- package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
- package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
- package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
- package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
- package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
- package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
- package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
- package/deps/capstone/arch/WASM/WASMModule.c +33 -0
- package/deps/capstone/arch/WASM/WASMModule.h +12 -0
- package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
- package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
- package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
- package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
- package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
- package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
- package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
- package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
- package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
- package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
- package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
- package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
- package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
- package/deps/capstone/arch/X86/X86Mapping.h +96 -0
- package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
- package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
- package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
- package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
- package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
- package/deps/capstone/arch/X86/X86Module.c +94 -0
- package/deps/capstone/arch/X86/X86Module.h +12 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
- package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
- package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
- package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
- package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
- package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
- package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
- package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
- package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
- package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
- package/deps/capstone/cs.c +1664 -0
- package/deps/capstone/cs_priv.h +101 -0
- package/deps/capstone/cs_simple_types.h +886 -0
- package/deps/capstone/include/capstone/arm.h +991 -0
- package/deps/capstone/include/capstone/arm64.h +3159 -0
- package/deps/capstone/include/capstone/bpf.h +209 -0
- package/deps/capstone/include/capstone/capstone.h +875 -0
- package/deps/capstone/include/capstone/evm.h +188 -0
- package/deps/capstone/include/capstone/m680x.h +537 -0
- package/deps/capstone/include/capstone/m68k.h +613 -0
- package/deps/capstone/include/capstone/mips.h +956 -0
- package/deps/capstone/include/capstone/mos65xx.h +204 -0
- package/deps/capstone/include/capstone/platform.h +122 -0
- package/deps/capstone/include/capstone/ppc.h +2108 -0
- package/deps/capstone/include/capstone/riscv.h +531 -0
- package/deps/capstone/include/capstone/sh.h +465 -0
- package/deps/capstone/include/capstone/sparc.h +520 -0
- package/deps/capstone/include/capstone/systemz.h +2601 -0
- package/deps/capstone/include/capstone/tms320c64x.h +359 -0
- package/deps/capstone/include/capstone/tricore.h +567 -0
- package/deps/capstone/include/capstone/wasm.h +250 -0
- package/deps/capstone/include/capstone/x86.h +1986 -0
- package/deps/capstone/include/capstone/xcore.h +235 -0
- package/deps/capstone/include/platform.h +110 -0
- package/deps/capstone/include/windowsce/intrin.h +12 -0
- package/deps/capstone/include/windowsce/stdint.h +133 -0
- package/deps/capstone/utils.c +140 -0
- package/deps/capstone/utils.h +54 -0
- package/index.d.ts +448 -0
- package/index.js +64 -0
- package/index.mjs +25 -0
- package/package.json +82 -0
- package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
- package/src/capstone_wrapper.cpp +910 -0
- package/src/capstone_wrapper.h +147 -0
- package/src/disasm_async_worker.h +215 -0
- package/src/main.cpp +145 -0
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@@ -0,0 +1,1805 @@
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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2
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|* *|
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3
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|*Target Instruction Enum Values *|
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4
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|* *|
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5
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|* Automatically generated file, do not edit! *|
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|* *|
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7
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\*===----------------------------------------------------------------------===*/
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8
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9
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/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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10
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+
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
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11
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12
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13
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#ifdef GET_INSTRINFO_ENUM
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14
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#undef GET_INSTRINFO_ENUM
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15
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16
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enum {
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17
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Mips_PHI = 0,
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18
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+
Mips_INLINEASM = 1,
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19
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+
Mips_CFI_INSTRUCTION = 2,
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20
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+
Mips_EH_LABEL = 3,
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21
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+
Mips_GC_LABEL = 4,
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22
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+
Mips_KILL = 5,
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23
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+
Mips_EXTRACT_SUBREG = 6,
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24
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+
Mips_INSERT_SUBREG = 7,
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25
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+
Mips_IMPLICIT_DEF = 8,
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26
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+
Mips_SUBREG_TO_REG = 9,
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27
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+
Mips_COPY_TO_REGCLASS = 10,
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28
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+
Mips_DBG_VALUE = 11,
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29
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+
Mips_REG_SEQUENCE = 12,
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30
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+
Mips_COPY = 13,
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31
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+
Mips_BUNDLE = 14,
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32
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+
Mips_LIFETIME_START = 15,
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33
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+
Mips_LIFETIME_END = 16,
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34
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+
Mips_STACKMAP = 17,
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35
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+
Mips_PATCHPOINT = 18,
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36
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+
Mips_LOAD_STACK_GUARD = 19,
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37
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+
Mips_STATEPOINT = 20,
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38
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+
Mips_FRAME_ALLOC = 21,
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39
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+
Mips_ABSQ_S_PH = 22,
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40
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+
Mips_ABSQ_S_QB = 23,
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41
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+
Mips_ABSQ_S_W = 24,
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42
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+
Mips_ADD = 25,
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43
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+
Mips_ADDIUPC = 26,
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44
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+
Mips_ADDIUPC_MM = 27,
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45
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+
Mips_ADDIUR1SP_MM = 28,
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46
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+
Mips_ADDIUR2_MM = 29,
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47
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+
Mips_ADDIUS5_MM = 30,
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48
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+
Mips_ADDIUSP_MM = 31,
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49
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+
Mips_ADDQH_PH = 32,
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50
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+
Mips_ADDQH_R_PH = 33,
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51
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+
Mips_ADDQH_R_W = 34,
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52
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+
Mips_ADDQH_W = 35,
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53
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+
Mips_ADDQ_PH = 36,
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54
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+
Mips_ADDQ_S_PH = 37,
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55
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+
Mips_ADDQ_S_W = 38,
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56
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+
Mips_ADDSC = 39,
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57
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+
Mips_ADDS_A_B = 40,
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58
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+
Mips_ADDS_A_D = 41,
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59
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+
Mips_ADDS_A_H = 42,
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60
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+
Mips_ADDS_A_W = 43,
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61
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+
Mips_ADDS_S_B = 44,
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62
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+
Mips_ADDS_S_D = 45,
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63
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+
Mips_ADDS_S_H = 46,
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64
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+
Mips_ADDS_S_W = 47,
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65
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+
Mips_ADDS_U_B = 48,
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66
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+
Mips_ADDS_U_D = 49,
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67
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+
Mips_ADDS_U_H = 50,
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68
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+
Mips_ADDS_U_W = 51,
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69
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+
Mips_ADDU16_MM = 52,
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70
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+
Mips_ADDUH_QB = 53,
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71
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+
Mips_ADDUH_R_QB = 54,
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72
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+
Mips_ADDU_PH = 55,
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73
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+
Mips_ADDU_QB = 56,
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74
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+
Mips_ADDU_S_PH = 57,
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75
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+
Mips_ADDU_S_QB = 58,
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76
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+
Mips_ADDVI_B = 59,
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77
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+
Mips_ADDVI_D = 60,
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78
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+
Mips_ADDVI_H = 61,
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79
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+
Mips_ADDVI_W = 62,
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80
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+
Mips_ADDV_B = 63,
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81
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+
Mips_ADDV_D = 64,
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82
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+
Mips_ADDV_H = 65,
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83
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+
Mips_ADDV_W = 66,
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84
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+
Mips_ADDWC = 67,
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85
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+
Mips_ADD_A_B = 68,
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86
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+
Mips_ADD_A_D = 69,
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87
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+
Mips_ADD_A_H = 70,
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88
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+
Mips_ADD_A_W = 71,
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89
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+
Mips_ADD_MM = 72,
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90
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+
Mips_ADDi = 73,
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91
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+
Mips_ADDi_MM = 74,
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92
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+
Mips_ADDiu = 75,
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93
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+
Mips_ADDiu_MM = 76,
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94
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+
Mips_ADDu = 77,
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95
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+
Mips_ADDu_MM = 78,
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96
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+
Mips_ADJCALLSTACKDOWN = 79,
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97
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+
Mips_ADJCALLSTACKUP = 80,
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98
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+
Mips_ALIGN = 81,
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99
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+
Mips_ALUIPC = 82,
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100
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+
Mips_AND = 83,
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101
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+
Mips_AND16_MM = 84,
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102
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+
Mips_AND64 = 85,
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103
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+
Mips_ANDI16_MM = 86,
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104
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+
Mips_ANDI_B = 87,
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105
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+
Mips_AND_MM = 88,
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106
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+
Mips_AND_V = 89,
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107
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+
Mips_AND_V_D_PSEUDO = 90,
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108
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+
Mips_AND_V_H_PSEUDO = 91,
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109
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Mips_AND_V_W_PSEUDO = 92,
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110
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+
Mips_ANDi = 93,
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111
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+
Mips_ANDi64 = 94,
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112
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+
Mips_ANDi_MM = 95,
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113
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+
Mips_APPEND = 96,
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114
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+
Mips_ASUB_S_B = 97,
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115
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Mips_ASUB_S_D = 98,
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116
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Mips_ASUB_S_H = 99,
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117
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Mips_ASUB_S_W = 100,
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118
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Mips_ASUB_U_B = 101,
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119
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Mips_ASUB_U_D = 102,
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120
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Mips_ASUB_U_H = 103,
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121
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Mips_ASUB_U_W = 104,
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122
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Mips_ATOMIC_CMP_SWAP_I16 = 105,
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123
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Mips_ATOMIC_CMP_SWAP_I32 = 106,
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124
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Mips_ATOMIC_CMP_SWAP_I64 = 107,
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125
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Mips_ATOMIC_CMP_SWAP_I8 = 108,
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126
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Mips_ATOMIC_LOAD_ADD_I16 = 109,
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127
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Mips_ATOMIC_LOAD_ADD_I32 = 110,
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128
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Mips_ATOMIC_LOAD_ADD_I64 = 111,
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129
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Mips_ATOMIC_LOAD_ADD_I8 = 112,
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130
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Mips_ATOMIC_LOAD_AND_I16 = 113,
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131
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Mips_ATOMIC_LOAD_AND_I32 = 114,
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132
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Mips_ATOMIC_LOAD_AND_I64 = 115,
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133
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Mips_ATOMIC_LOAD_AND_I8 = 116,
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134
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Mips_ATOMIC_LOAD_NAND_I16 = 117,
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135
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Mips_ATOMIC_LOAD_NAND_I32 = 118,
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136
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Mips_ATOMIC_LOAD_NAND_I64 = 119,
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137
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Mips_ATOMIC_LOAD_NAND_I8 = 120,
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138
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Mips_ATOMIC_LOAD_OR_I16 = 121,
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139
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Mips_ATOMIC_LOAD_OR_I32 = 122,
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140
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Mips_ATOMIC_LOAD_OR_I64 = 123,
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141
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Mips_ATOMIC_LOAD_OR_I8 = 124,
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142
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Mips_ATOMIC_LOAD_SUB_I16 = 125,
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143
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Mips_ATOMIC_LOAD_SUB_I32 = 126,
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144
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Mips_ATOMIC_LOAD_SUB_I64 = 127,
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145
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Mips_ATOMIC_LOAD_SUB_I8 = 128,
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146
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Mips_ATOMIC_LOAD_XOR_I16 = 129,
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147
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Mips_ATOMIC_LOAD_XOR_I32 = 130,
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148
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Mips_ATOMIC_LOAD_XOR_I64 = 131,
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149
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Mips_ATOMIC_LOAD_XOR_I8 = 132,
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150
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Mips_ATOMIC_SWAP_I16 = 133,
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151
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+
Mips_ATOMIC_SWAP_I32 = 134,
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152
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Mips_ATOMIC_SWAP_I64 = 135,
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153
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Mips_ATOMIC_SWAP_I8 = 136,
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154
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+
Mips_AUI = 137,
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155
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+
Mips_AUIPC = 138,
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156
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+
Mips_AVER_S_B = 139,
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157
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Mips_AVER_S_D = 140,
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158
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Mips_AVER_S_H = 141,
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159
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Mips_AVER_S_W = 142,
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160
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Mips_AVER_U_B = 143,
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161
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Mips_AVER_U_D = 144,
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162
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Mips_AVER_U_H = 145,
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163
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Mips_AVER_U_W = 146,
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164
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Mips_AVE_S_B = 147,
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165
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Mips_AVE_S_D = 148,
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166
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Mips_AVE_S_H = 149,
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167
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Mips_AVE_S_W = 150,
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168
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+
Mips_AVE_U_B = 151,
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169
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+
Mips_AVE_U_D = 152,
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170
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+
Mips_AVE_U_H = 153,
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171
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+
Mips_AVE_U_W = 154,
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172
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+
Mips_AddiuRxImmX16 = 155,
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173
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+
Mips_AddiuRxPcImmX16 = 156,
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174
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+
Mips_AddiuRxRxImm16 = 157,
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175
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+
Mips_AddiuRxRxImmX16 = 158,
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176
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+
Mips_AddiuRxRyOffMemX16 = 159,
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177
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+
Mips_AddiuSpImm16 = 160,
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178
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+
Mips_AddiuSpImmX16 = 161,
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179
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+
Mips_AdduRxRyRz16 = 162,
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180
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+
Mips_AndRxRxRy16 = 163,
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181
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+
Mips_B = 164,
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182
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+
Mips_B16_MM = 165,
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183
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+
Mips_BADDu = 166,
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184
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+
Mips_BAL = 167,
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185
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+
Mips_BALC = 168,
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186
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+
Mips_BALIGN = 169,
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187
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+
Mips_BAL_BR = 170,
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188
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+
Mips_BBIT0 = 171,
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189
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+
Mips_BBIT032 = 172,
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190
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+
Mips_BBIT1 = 173,
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191
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+
Mips_BBIT132 = 174,
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192
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+
Mips_BC = 175,
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193
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+
Mips_BC0F = 176,
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194
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+
Mips_BC0FL = 177,
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195
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+
Mips_BC0T = 178,
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196
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+
Mips_BC0TL = 179,
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197
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+
Mips_BC1EQZ = 180,
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198
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+
Mips_BC1F = 181,
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199
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+
Mips_BC1FL = 182,
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200
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+
Mips_BC1F_MM = 183,
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201
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+
Mips_BC1NEZ = 184,
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202
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+
Mips_BC1T = 185,
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203
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+
Mips_BC1TL = 186,
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204
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+
Mips_BC1T_MM = 187,
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205
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+
Mips_BC2EQZ = 188,
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206
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+
Mips_BC2F = 189,
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207
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+
Mips_BC2FL = 190,
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208
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+
Mips_BC2NEZ = 191,
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209
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+
Mips_BC2T = 192,
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210
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+
Mips_BC2TL = 193,
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211
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+
Mips_BC3F = 194,
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212
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+
Mips_BC3FL = 195,
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213
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+
Mips_BC3T = 196,
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214
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+
Mips_BC3TL = 197,
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215
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+
Mips_BCLRI_B = 198,
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216
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+
Mips_BCLRI_D = 199,
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217
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+
Mips_BCLRI_H = 200,
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218
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+
Mips_BCLRI_W = 201,
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219
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+
Mips_BCLR_B = 202,
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220
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+
Mips_BCLR_D = 203,
|
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221
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+
Mips_BCLR_H = 204,
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222
|
+
Mips_BCLR_W = 205,
|
|
223
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+
Mips_BEQ = 206,
|
|
224
|
+
Mips_BEQ64 = 207,
|
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225
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+
Mips_BEQC = 208,
|
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226
|
+
Mips_BEQL = 209,
|
|
227
|
+
Mips_BEQZ16_MM = 210,
|
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228
|
+
Mips_BEQZALC = 211,
|
|
229
|
+
Mips_BEQZC = 212,
|
|
230
|
+
Mips_BEQZC_MM = 213,
|
|
231
|
+
Mips_BEQ_MM = 214,
|
|
232
|
+
Mips_BGEC = 215,
|
|
233
|
+
Mips_BGEUC = 216,
|
|
234
|
+
Mips_BGEZ = 217,
|
|
235
|
+
Mips_BGEZ64 = 218,
|
|
236
|
+
Mips_BGEZAL = 219,
|
|
237
|
+
Mips_BGEZALC = 220,
|
|
238
|
+
Mips_BGEZALL = 221,
|
|
239
|
+
Mips_BGEZALS_MM = 222,
|
|
240
|
+
Mips_BGEZAL_MM = 223,
|
|
241
|
+
Mips_BGEZC = 224,
|
|
242
|
+
Mips_BGEZL = 225,
|
|
243
|
+
Mips_BGEZ_MM = 226,
|
|
244
|
+
Mips_BGTZ = 227,
|
|
245
|
+
Mips_BGTZ64 = 228,
|
|
246
|
+
Mips_BGTZALC = 229,
|
|
247
|
+
Mips_BGTZC = 230,
|
|
248
|
+
Mips_BGTZL = 231,
|
|
249
|
+
Mips_BGTZ_MM = 232,
|
|
250
|
+
Mips_BINSLI_B = 233,
|
|
251
|
+
Mips_BINSLI_D = 234,
|
|
252
|
+
Mips_BINSLI_H = 235,
|
|
253
|
+
Mips_BINSLI_W = 236,
|
|
254
|
+
Mips_BINSL_B = 237,
|
|
255
|
+
Mips_BINSL_D = 238,
|
|
256
|
+
Mips_BINSL_H = 239,
|
|
257
|
+
Mips_BINSL_W = 240,
|
|
258
|
+
Mips_BINSRI_B = 241,
|
|
259
|
+
Mips_BINSRI_D = 242,
|
|
260
|
+
Mips_BINSRI_H = 243,
|
|
261
|
+
Mips_BINSRI_W = 244,
|
|
262
|
+
Mips_BINSR_B = 245,
|
|
263
|
+
Mips_BINSR_D = 246,
|
|
264
|
+
Mips_BINSR_H = 247,
|
|
265
|
+
Mips_BINSR_W = 248,
|
|
266
|
+
Mips_BITREV = 249,
|
|
267
|
+
Mips_BITSWAP = 250,
|
|
268
|
+
Mips_BLEZ = 251,
|
|
269
|
+
Mips_BLEZ64 = 252,
|
|
270
|
+
Mips_BLEZALC = 253,
|
|
271
|
+
Mips_BLEZC = 254,
|
|
272
|
+
Mips_BLEZL = 255,
|
|
273
|
+
Mips_BLEZ_MM = 256,
|
|
274
|
+
Mips_BLTC = 257,
|
|
275
|
+
Mips_BLTUC = 258,
|
|
276
|
+
Mips_BLTZ = 259,
|
|
277
|
+
Mips_BLTZ64 = 260,
|
|
278
|
+
Mips_BLTZAL = 261,
|
|
279
|
+
Mips_BLTZALC = 262,
|
|
280
|
+
Mips_BLTZALL = 263,
|
|
281
|
+
Mips_BLTZALS_MM = 264,
|
|
282
|
+
Mips_BLTZAL_MM = 265,
|
|
283
|
+
Mips_BLTZC = 266,
|
|
284
|
+
Mips_BLTZL = 267,
|
|
285
|
+
Mips_BLTZ_MM = 268,
|
|
286
|
+
Mips_BMNZI_B = 269,
|
|
287
|
+
Mips_BMNZ_V = 270,
|
|
288
|
+
Mips_BMZI_B = 271,
|
|
289
|
+
Mips_BMZ_V = 272,
|
|
290
|
+
Mips_BNE = 273,
|
|
291
|
+
Mips_BNE64 = 274,
|
|
292
|
+
Mips_BNEC = 275,
|
|
293
|
+
Mips_BNEGI_B = 276,
|
|
294
|
+
Mips_BNEGI_D = 277,
|
|
295
|
+
Mips_BNEGI_H = 278,
|
|
296
|
+
Mips_BNEGI_W = 279,
|
|
297
|
+
Mips_BNEG_B = 280,
|
|
298
|
+
Mips_BNEG_D = 281,
|
|
299
|
+
Mips_BNEG_H = 282,
|
|
300
|
+
Mips_BNEG_W = 283,
|
|
301
|
+
Mips_BNEL = 284,
|
|
302
|
+
Mips_BNEZ16_MM = 285,
|
|
303
|
+
Mips_BNEZALC = 286,
|
|
304
|
+
Mips_BNEZC = 287,
|
|
305
|
+
Mips_BNEZC_MM = 288,
|
|
306
|
+
Mips_BNE_MM = 289,
|
|
307
|
+
Mips_BNVC = 290,
|
|
308
|
+
Mips_BNZ_B = 291,
|
|
309
|
+
Mips_BNZ_D = 292,
|
|
310
|
+
Mips_BNZ_H = 293,
|
|
311
|
+
Mips_BNZ_V = 294,
|
|
312
|
+
Mips_BNZ_W = 295,
|
|
313
|
+
Mips_BOVC = 296,
|
|
314
|
+
Mips_BPOSGE32 = 297,
|
|
315
|
+
Mips_BPOSGE32_PSEUDO = 298,
|
|
316
|
+
Mips_BREAK = 299,
|
|
317
|
+
Mips_BREAK16_MM = 300,
|
|
318
|
+
Mips_BREAK_MM = 301,
|
|
319
|
+
Mips_BSELI_B = 302,
|
|
320
|
+
Mips_BSEL_D_PSEUDO = 303,
|
|
321
|
+
Mips_BSEL_FD_PSEUDO = 304,
|
|
322
|
+
Mips_BSEL_FW_PSEUDO = 305,
|
|
323
|
+
Mips_BSEL_H_PSEUDO = 306,
|
|
324
|
+
Mips_BSEL_V = 307,
|
|
325
|
+
Mips_BSEL_W_PSEUDO = 308,
|
|
326
|
+
Mips_BSETI_B = 309,
|
|
327
|
+
Mips_BSETI_D = 310,
|
|
328
|
+
Mips_BSETI_H = 311,
|
|
329
|
+
Mips_BSETI_W = 312,
|
|
330
|
+
Mips_BSET_B = 313,
|
|
331
|
+
Mips_BSET_D = 314,
|
|
332
|
+
Mips_BSET_H = 315,
|
|
333
|
+
Mips_BSET_W = 316,
|
|
334
|
+
Mips_BZ_B = 317,
|
|
335
|
+
Mips_BZ_D = 318,
|
|
336
|
+
Mips_BZ_H = 319,
|
|
337
|
+
Mips_BZ_V = 320,
|
|
338
|
+
Mips_BZ_W = 321,
|
|
339
|
+
Mips_B_MM_Pseudo = 322,
|
|
340
|
+
Mips_BeqzRxImm16 = 323,
|
|
341
|
+
Mips_BeqzRxImmX16 = 324,
|
|
342
|
+
Mips_Bimm16 = 325,
|
|
343
|
+
Mips_BimmX16 = 326,
|
|
344
|
+
Mips_BnezRxImm16 = 327,
|
|
345
|
+
Mips_BnezRxImmX16 = 328,
|
|
346
|
+
Mips_Break16 = 329,
|
|
347
|
+
Mips_Bteqz16 = 330,
|
|
348
|
+
Mips_BteqzT8CmpX16 = 331,
|
|
349
|
+
Mips_BteqzT8CmpiX16 = 332,
|
|
350
|
+
Mips_BteqzT8SltX16 = 333,
|
|
351
|
+
Mips_BteqzT8SltiX16 = 334,
|
|
352
|
+
Mips_BteqzT8SltiuX16 = 335,
|
|
353
|
+
Mips_BteqzT8SltuX16 = 336,
|
|
354
|
+
Mips_BteqzX16 = 337,
|
|
355
|
+
Mips_Btnez16 = 338,
|
|
356
|
+
Mips_BtnezT8CmpX16 = 339,
|
|
357
|
+
Mips_BtnezT8CmpiX16 = 340,
|
|
358
|
+
Mips_BtnezT8SltX16 = 341,
|
|
359
|
+
Mips_BtnezT8SltiX16 = 342,
|
|
360
|
+
Mips_BtnezT8SltiuX16 = 343,
|
|
361
|
+
Mips_BtnezT8SltuX16 = 344,
|
|
362
|
+
Mips_BtnezX16 = 345,
|
|
363
|
+
Mips_BuildPairF64 = 346,
|
|
364
|
+
Mips_BuildPairF64_64 = 347,
|
|
365
|
+
Mips_CACHE = 348,
|
|
366
|
+
Mips_CACHE_MM = 349,
|
|
367
|
+
Mips_CACHE_R6 = 350,
|
|
368
|
+
Mips_CEIL_L_D64 = 351,
|
|
369
|
+
Mips_CEIL_L_S = 352,
|
|
370
|
+
Mips_CEIL_W_D32 = 353,
|
|
371
|
+
Mips_CEIL_W_D64 = 354,
|
|
372
|
+
Mips_CEIL_W_MM = 355,
|
|
373
|
+
Mips_CEIL_W_S = 356,
|
|
374
|
+
Mips_CEIL_W_S_MM = 357,
|
|
375
|
+
Mips_CEQI_B = 358,
|
|
376
|
+
Mips_CEQI_D = 359,
|
|
377
|
+
Mips_CEQI_H = 360,
|
|
378
|
+
Mips_CEQI_W = 361,
|
|
379
|
+
Mips_CEQ_B = 362,
|
|
380
|
+
Mips_CEQ_D = 363,
|
|
381
|
+
Mips_CEQ_H = 364,
|
|
382
|
+
Mips_CEQ_W = 365,
|
|
383
|
+
Mips_CFC1 = 366,
|
|
384
|
+
Mips_CFC1_MM = 367,
|
|
385
|
+
Mips_CFCMSA = 368,
|
|
386
|
+
Mips_CINS = 369,
|
|
387
|
+
Mips_CINS32 = 370,
|
|
388
|
+
Mips_CLASS_D = 371,
|
|
389
|
+
Mips_CLASS_S = 372,
|
|
390
|
+
Mips_CLEI_S_B = 373,
|
|
391
|
+
Mips_CLEI_S_D = 374,
|
|
392
|
+
Mips_CLEI_S_H = 375,
|
|
393
|
+
Mips_CLEI_S_W = 376,
|
|
394
|
+
Mips_CLEI_U_B = 377,
|
|
395
|
+
Mips_CLEI_U_D = 378,
|
|
396
|
+
Mips_CLEI_U_H = 379,
|
|
397
|
+
Mips_CLEI_U_W = 380,
|
|
398
|
+
Mips_CLE_S_B = 381,
|
|
399
|
+
Mips_CLE_S_D = 382,
|
|
400
|
+
Mips_CLE_S_H = 383,
|
|
401
|
+
Mips_CLE_S_W = 384,
|
|
402
|
+
Mips_CLE_U_B = 385,
|
|
403
|
+
Mips_CLE_U_D = 386,
|
|
404
|
+
Mips_CLE_U_H = 387,
|
|
405
|
+
Mips_CLE_U_W = 388,
|
|
406
|
+
Mips_CLO = 389,
|
|
407
|
+
Mips_CLO_MM = 390,
|
|
408
|
+
Mips_CLO_R6 = 391,
|
|
409
|
+
Mips_CLTI_S_B = 392,
|
|
410
|
+
Mips_CLTI_S_D = 393,
|
|
411
|
+
Mips_CLTI_S_H = 394,
|
|
412
|
+
Mips_CLTI_S_W = 395,
|
|
413
|
+
Mips_CLTI_U_B = 396,
|
|
414
|
+
Mips_CLTI_U_D = 397,
|
|
415
|
+
Mips_CLTI_U_H = 398,
|
|
416
|
+
Mips_CLTI_U_W = 399,
|
|
417
|
+
Mips_CLT_S_B = 400,
|
|
418
|
+
Mips_CLT_S_D = 401,
|
|
419
|
+
Mips_CLT_S_H = 402,
|
|
420
|
+
Mips_CLT_S_W = 403,
|
|
421
|
+
Mips_CLT_U_B = 404,
|
|
422
|
+
Mips_CLT_U_D = 405,
|
|
423
|
+
Mips_CLT_U_H = 406,
|
|
424
|
+
Mips_CLT_U_W = 407,
|
|
425
|
+
Mips_CLZ = 408,
|
|
426
|
+
Mips_CLZ_MM = 409,
|
|
427
|
+
Mips_CLZ_R6 = 410,
|
|
428
|
+
Mips_CMPGDU_EQ_QB = 411,
|
|
429
|
+
Mips_CMPGDU_LE_QB = 412,
|
|
430
|
+
Mips_CMPGDU_LT_QB = 413,
|
|
431
|
+
Mips_CMPGU_EQ_QB = 414,
|
|
432
|
+
Mips_CMPGU_LE_QB = 415,
|
|
433
|
+
Mips_CMPGU_LT_QB = 416,
|
|
434
|
+
Mips_CMPU_EQ_QB = 417,
|
|
435
|
+
Mips_CMPU_LE_QB = 418,
|
|
436
|
+
Mips_CMPU_LT_QB = 419,
|
|
437
|
+
Mips_CMP_EQ_D = 420,
|
|
438
|
+
Mips_CMP_EQ_PH = 421,
|
|
439
|
+
Mips_CMP_EQ_S = 422,
|
|
440
|
+
Mips_CMP_F_D = 423,
|
|
441
|
+
Mips_CMP_F_S = 424,
|
|
442
|
+
Mips_CMP_LE_D = 425,
|
|
443
|
+
Mips_CMP_LE_PH = 426,
|
|
444
|
+
Mips_CMP_LE_S = 427,
|
|
445
|
+
Mips_CMP_LT_D = 428,
|
|
446
|
+
Mips_CMP_LT_PH = 429,
|
|
447
|
+
Mips_CMP_LT_S = 430,
|
|
448
|
+
Mips_CMP_SAF_D = 431,
|
|
449
|
+
Mips_CMP_SAF_S = 432,
|
|
450
|
+
Mips_CMP_SEQ_D = 433,
|
|
451
|
+
Mips_CMP_SEQ_S = 434,
|
|
452
|
+
Mips_CMP_SLE_D = 435,
|
|
453
|
+
Mips_CMP_SLE_S = 436,
|
|
454
|
+
Mips_CMP_SLT_D = 437,
|
|
455
|
+
Mips_CMP_SLT_S = 438,
|
|
456
|
+
Mips_CMP_SUEQ_D = 439,
|
|
457
|
+
Mips_CMP_SUEQ_S = 440,
|
|
458
|
+
Mips_CMP_SULE_D = 441,
|
|
459
|
+
Mips_CMP_SULE_S = 442,
|
|
460
|
+
Mips_CMP_SULT_D = 443,
|
|
461
|
+
Mips_CMP_SULT_S = 444,
|
|
462
|
+
Mips_CMP_SUN_D = 445,
|
|
463
|
+
Mips_CMP_SUN_S = 446,
|
|
464
|
+
Mips_CMP_UEQ_D = 447,
|
|
465
|
+
Mips_CMP_UEQ_S = 448,
|
|
466
|
+
Mips_CMP_ULE_D = 449,
|
|
467
|
+
Mips_CMP_ULE_S = 450,
|
|
468
|
+
Mips_CMP_ULT_D = 451,
|
|
469
|
+
Mips_CMP_ULT_S = 452,
|
|
470
|
+
Mips_CMP_UN_D = 453,
|
|
471
|
+
Mips_CMP_UN_S = 454,
|
|
472
|
+
Mips_CONSTPOOL_ENTRY = 455,
|
|
473
|
+
Mips_COPY_FD_PSEUDO = 456,
|
|
474
|
+
Mips_COPY_FW_PSEUDO = 457,
|
|
475
|
+
Mips_COPY_S_B = 458,
|
|
476
|
+
Mips_COPY_S_D = 459,
|
|
477
|
+
Mips_COPY_S_H = 460,
|
|
478
|
+
Mips_COPY_S_W = 461,
|
|
479
|
+
Mips_COPY_U_B = 462,
|
|
480
|
+
Mips_COPY_U_D = 463,
|
|
481
|
+
Mips_COPY_U_H = 464,
|
|
482
|
+
Mips_COPY_U_W = 465,
|
|
483
|
+
Mips_CTC1 = 466,
|
|
484
|
+
Mips_CTC1_MM = 467,
|
|
485
|
+
Mips_CTCMSA = 468,
|
|
486
|
+
Mips_CVT_D32_S = 469,
|
|
487
|
+
Mips_CVT_D32_W = 470,
|
|
488
|
+
Mips_CVT_D32_W_MM = 471,
|
|
489
|
+
Mips_CVT_D64_L = 472,
|
|
490
|
+
Mips_CVT_D64_S = 473,
|
|
491
|
+
Mips_CVT_D64_W = 474,
|
|
492
|
+
Mips_CVT_D_S_MM = 475,
|
|
493
|
+
Mips_CVT_L_D64 = 476,
|
|
494
|
+
Mips_CVT_L_D64_MM = 477,
|
|
495
|
+
Mips_CVT_L_S = 478,
|
|
496
|
+
Mips_CVT_L_S_MM = 479,
|
|
497
|
+
Mips_CVT_S_D32 = 480,
|
|
498
|
+
Mips_CVT_S_D32_MM = 481,
|
|
499
|
+
Mips_CVT_S_D64 = 482,
|
|
500
|
+
Mips_CVT_S_L = 483,
|
|
501
|
+
Mips_CVT_S_W = 484,
|
|
502
|
+
Mips_CVT_S_W_MM = 485,
|
|
503
|
+
Mips_CVT_W_D32 = 486,
|
|
504
|
+
Mips_CVT_W_D64 = 487,
|
|
505
|
+
Mips_CVT_W_MM = 488,
|
|
506
|
+
Mips_CVT_W_S = 489,
|
|
507
|
+
Mips_CVT_W_S_MM = 490,
|
|
508
|
+
Mips_C_EQ_D32 = 491,
|
|
509
|
+
Mips_C_EQ_D64 = 492,
|
|
510
|
+
Mips_C_EQ_S = 493,
|
|
511
|
+
Mips_C_F_D32 = 494,
|
|
512
|
+
Mips_C_F_D64 = 495,
|
|
513
|
+
Mips_C_F_S = 496,
|
|
514
|
+
Mips_C_LE_D32 = 497,
|
|
515
|
+
Mips_C_LE_D64 = 498,
|
|
516
|
+
Mips_C_LE_S = 499,
|
|
517
|
+
Mips_C_LT_D32 = 500,
|
|
518
|
+
Mips_C_LT_D64 = 501,
|
|
519
|
+
Mips_C_LT_S = 502,
|
|
520
|
+
Mips_C_NGE_D32 = 503,
|
|
521
|
+
Mips_C_NGE_D64 = 504,
|
|
522
|
+
Mips_C_NGE_S = 505,
|
|
523
|
+
Mips_C_NGLE_D32 = 506,
|
|
524
|
+
Mips_C_NGLE_D64 = 507,
|
|
525
|
+
Mips_C_NGLE_S = 508,
|
|
526
|
+
Mips_C_NGL_D32 = 509,
|
|
527
|
+
Mips_C_NGL_D64 = 510,
|
|
528
|
+
Mips_C_NGL_S = 511,
|
|
529
|
+
Mips_C_NGT_D32 = 512,
|
|
530
|
+
Mips_C_NGT_D64 = 513,
|
|
531
|
+
Mips_C_NGT_S = 514,
|
|
532
|
+
Mips_C_OLE_D32 = 515,
|
|
533
|
+
Mips_C_OLE_D64 = 516,
|
|
534
|
+
Mips_C_OLE_S = 517,
|
|
535
|
+
Mips_C_OLT_D32 = 518,
|
|
536
|
+
Mips_C_OLT_D64 = 519,
|
|
537
|
+
Mips_C_OLT_S = 520,
|
|
538
|
+
Mips_C_SEQ_D32 = 521,
|
|
539
|
+
Mips_C_SEQ_D64 = 522,
|
|
540
|
+
Mips_C_SEQ_S = 523,
|
|
541
|
+
Mips_C_SF_D32 = 524,
|
|
542
|
+
Mips_C_SF_D64 = 525,
|
|
543
|
+
Mips_C_SF_S = 526,
|
|
544
|
+
Mips_C_UEQ_D32 = 527,
|
|
545
|
+
Mips_C_UEQ_D64 = 528,
|
|
546
|
+
Mips_C_UEQ_S = 529,
|
|
547
|
+
Mips_C_ULE_D32 = 530,
|
|
548
|
+
Mips_C_ULE_D64 = 531,
|
|
549
|
+
Mips_C_ULE_S = 532,
|
|
550
|
+
Mips_C_ULT_D32 = 533,
|
|
551
|
+
Mips_C_ULT_D64 = 534,
|
|
552
|
+
Mips_C_ULT_S = 535,
|
|
553
|
+
Mips_C_UN_D32 = 536,
|
|
554
|
+
Mips_C_UN_D64 = 537,
|
|
555
|
+
Mips_C_UN_S = 538,
|
|
556
|
+
Mips_CmpRxRy16 = 539,
|
|
557
|
+
Mips_CmpiRxImm16 = 540,
|
|
558
|
+
Mips_CmpiRxImmX16 = 541,
|
|
559
|
+
Mips_Constant32 = 542,
|
|
560
|
+
Mips_DADD = 543,
|
|
561
|
+
Mips_DADDi = 544,
|
|
562
|
+
Mips_DADDiu = 545,
|
|
563
|
+
Mips_DADDu = 546,
|
|
564
|
+
Mips_DAHI = 547,
|
|
565
|
+
Mips_DALIGN = 548,
|
|
566
|
+
Mips_DATI = 549,
|
|
567
|
+
Mips_DAUI = 550,
|
|
568
|
+
Mips_DBITSWAP = 551,
|
|
569
|
+
Mips_DCLO = 552,
|
|
570
|
+
Mips_DCLO_R6 = 553,
|
|
571
|
+
Mips_DCLZ = 554,
|
|
572
|
+
Mips_DCLZ_R6 = 555,
|
|
573
|
+
Mips_DDIV = 556,
|
|
574
|
+
Mips_DDIVU = 557,
|
|
575
|
+
Mips_DERET = 558,
|
|
576
|
+
Mips_DERET_MM = 559,
|
|
577
|
+
Mips_DEXT = 560,
|
|
578
|
+
Mips_DEXTM = 561,
|
|
579
|
+
Mips_DEXTU = 562,
|
|
580
|
+
Mips_DI = 563,
|
|
581
|
+
Mips_DINS = 564,
|
|
582
|
+
Mips_DINSM = 565,
|
|
583
|
+
Mips_DINSU = 566,
|
|
584
|
+
Mips_DIV = 567,
|
|
585
|
+
Mips_DIVU = 568,
|
|
586
|
+
Mips_DIV_S_B = 569,
|
|
587
|
+
Mips_DIV_S_D = 570,
|
|
588
|
+
Mips_DIV_S_H = 571,
|
|
589
|
+
Mips_DIV_S_W = 572,
|
|
590
|
+
Mips_DIV_U_B = 573,
|
|
591
|
+
Mips_DIV_U_D = 574,
|
|
592
|
+
Mips_DIV_U_H = 575,
|
|
593
|
+
Mips_DIV_U_W = 576,
|
|
594
|
+
Mips_DI_MM = 577,
|
|
595
|
+
Mips_DLSA = 578,
|
|
596
|
+
Mips_DLSA_R6 = 579,
|
|
597
|
+
Mips_DMFC0 = 580,
|
|
598
|
+
Mips_DMFC1 = 581,
|
|
599
|
+
Mips_DMFC2 = 582,
|
|
600
|
+
Mips_DMOD = 583,
|
|
601
|
+
Mips_DMODU = 584,
|
|
602
|
+
Mips_DMTC0 = 585,
|
|
603
|
+
Mips_DMTC1 = 586,
|
|
604
|
+
Mips_DMTC2 = 587,
|
|
605
|
+
Mips_DMUH = 588,
|
|
606
|
+
Mips_DMUHU = 589,
|
|
607
|
+
Mips_DMUL = 590,
|
|
608
|
+
Mips_DMULT = 591,
|
|
609
|
+
Mips_DMULTu = 592,
|
|
610
|
+
Mips_DMULU = 593,
|
|
611
|
+
Mips_DMUL_R6 = 594,
|
|
612
|
+
Mips_DOTP_S_D = 595,
|
|
613
|
+
Mips_DOTP_S_H = 596,
|
|
614
|
+
Mips_DOTP_S_W = 597,
|
|
615
|
+
Mips_DOTP_U_D = 598,
|
|
616
|
+
Mips_DOTP_U_H = 599,
|
|
617
|
+
Mips_DOTP_U_W = 600,
|
|
618
|
+
Mips_DPADD_S_D = 601,
|
|
619
|
+
Mips_DPADD_S_H = 602,
|
|
620
|
+
Mips_DPADD_S_W = 603,
|
|
621
|
+
Mips_DPADD_U_D = 604,
|
|
622
|
+
Mips_DPADD_U_H = 605,
|
|
623
|
+
Mips_DPADD_U_W = 606,
|
|
624
|
+
Mips_DPAQX_SA_W_PH = 607,
|
|
625
|
+
Mips_DPAQX_S_W_PH = 608,
|
|
626
|
+
Mips_DPAQ_SA_L_W = 609,
|
|
627
|
+
Mips_DPAQ_S_W_PH = 610,
|
|
628
|
+
Mips_DPAU_H_QBL = 611,
|
|
629
|
+
Mips_DPAU_H_QBR = 612,
|
|
630
|
+
Mips_DPAX_W_PH = 613,
|
|
631
|
+
Mips_DPA_W_PH = 614,
|
|
632
|
+
Mips_DPOP = 615,
|
|
633
|
+
Mips_DPSQX_SA_W_PH = 616,
|
|
634
|
+
Mips_DPSQX_S_W_PH = 617,
|
|
635
|
+
Mips_DPSQ_SA_L_W = 618,
|
|
636
|
+
Mips_DPSQ_S_W_PH = 619,
|
|
637
|
+
Mips_DPSUB_S_D = 620,
|
|
638
|
+
Mips_DPSUB_S_H = 621,
|
|
639
|
+
Mips_DPSUB_S_W = 622,
|
|
640
|
+
Mips_DPSUB_U_D = 623,
|
|
641
|
+
Mips_DPSUB_U_H = 624,
|
|
642
|
+
Mips_DPSUB_U_W = 625,
|
|
643
|
+
Mips_DPSU_H_QBL = 626,
|
|
644
|
+
Mips_DPSU_H_QBR = 627,
|
|
645
|
+
Mips_DPSX_W_PH = 628,
|
|
646
|
+
Mips_DPS_W_PH = 629,
|
|
647
|
+
Mips_DROTR = 630,
|
|
648
|
+
Mips_DROTR32 = 631,
|
|
649
|
+
Mips_DROTRV = 632,
|
|
650
|
+
Mips_DSBH = 633,
|
|
651
|
+
Mips_DSDIV = 634,
|
|
652
|
+
Mips_DSHD = 635,
|
|
653
|
+
Mips_DSLL = 636,
|
|
654
|
+
Mips_DSLL32 = 637,
|
|
655
|
+
Mips_DSLL64_32 = 638,
|
|
656
|
+
Mips_DSLLV = 639,
|
|
657
|
+
Mips_DSRA = 640,
|
|
658
|
+
Mips_DSRA32 = 641,
|
|
659
|
+
Mips_DSRAV = 642,
|
|
660
|
+
Mips_DSRL = 643,
|
|
661
|
+
Mips_DSRL32 = 644,
|
|
662
|
+
Mips_DSRLV = 645,
|
|
663
|
+
Mips_DSUB = 646,
|
|
664
|
+
Mips_DSUBu = 647,
|
|
665
|
+
Mips_DUDIV = 648,
|
|
666
|
+
Mips_DivRxRy16 = 649,
|
|
667
|
+
Mips_DivuRxRy16 = 650,
|
|
668
|
+
Mips_EHB = 651,
|
|
669
|
+
Mips_EHB_MM = 652,
|
|
670
|
+
Mips_EI = 653,
|
|
671
|
+
Mips_EI_MM = 654,
|
|
672
|
+
Mips_ERET = 655,
|
|
673
|
+
Mips_ERET_MM = 656,
|
|
674
|
+
Mips_EXT = 657,
|
|
675
|
+
Mips_EXTP = 658,
|
|
676
|
+
Mips_EXTPDP = 659,
|
|
677
|
+
Mips_EXTPDPV = 660,
|
|
678
|
+
Mips_EXTPV = 661,
|
|
679
|
+
Mips_EXTRV_RS_W = 662,
|
|
680
|
+
Mips_EXTRV_R_W = 663,
|
|
681
|
+
Mips_EXTRV_S_H = 664,
|
|
682
|
+
Mips_EXTRV_W = 665,
|
|
683
|
+
Mips_EXTR_RS_W = 666,
|
|
684
|
+
Mips_EXTR_R_W = 667,
|
|
685
|
+
Mips_EXTR_S_H = 668,
|
|
686
|
+
Mips_EXTR_W = 669,
|
|
687
|
+
Mips_EXTS = 670,
|
|
688
|
+
Mips_EXTS32 = 671,
|
|
689
|
+
Mips_EXT_MM = 672,
|
|
690
|
+
Mips_ExtractElementF64 = 673,
|
|
691
|
+
Mips_ExtractElementF64_64 = 674,
|
|
692
|
+
Mips_FABS_D = 675,
|
|
693
|
+
Mips_FABS_D32 = 676,
|
|
694
|
+
Mips_FABS_D64 = 677,
|
|
695
|
+
Mips_FABS_MM = 678,
|
|
696
|
+
Mips_FABS_S = 679,
|
|
697
|
+
Mips_FABS_S_MM = 680,
|
|
698
|
+
Mips_FABS_W = 681,
|
|
699
|
+
Mips_FADD_D = 682,
|
|
700
|
+
Mips_FADD_D32 = 683,
|
|
701
|
+
Mips_FADD_D64 = 684,
|
|
702
|
+
Mips_FADD_MM = 685,
|
|
703
|
+
Mips_FADD_S = 686,
|
|
704
|
+
Mips_FADD_S_MM = 687,
|
|
705
|
+
Mips_FADD_W = 688,
|
|
706
|
+
Mips_FCAF_D = 689,
|
|
707
|
+
Mips_FCAF_W = 690,
|
|
708
|
+
Mips_FCEQ_D = 691,
|
|
709
|
+
Mips_FCEQ_W = 692,
|
|
710
|
+
Mips_FCLASS_D = 693,
|
|
711
|
+
Mips_FCLASS_W = 694,
|
|
712
|
+
Mips_FCLE_D = 695,
|
|
713
|
+
Mips_FCLE_W = 696,
|
|
714
|
+
Mips_FCLT_D = 697,
|
|
715
|
+
Mips_FCLT_W = 698,
|
|
716
|
+
Mips_FCMP_D32 = 699,
|
|
717
|
+
Mips_FCMP_D32_MM = 700,
|
|
718
|
+
Mips_FCMP_D64 = 701,
|
|
719
|
+
Mips_FCMP_S32 = 702,
|
|
720
|
+
Mips_FCMP_S32_MM = 703,
|
|
721
|
+
Mips_FCNE_D = 704,
|
|
722
|
+
Mips_FCNE_W = 705,
|
|
723
|
+
Mips_FCOR_D = 706,
|
|
724
|
+
Mips_FCOR_W = 707,
|
|
725
|
+
Mips_FCUEQ_D = 708,
|
|
726
|
+
Mips_FCUEQ_W = 709,
|
|
727
|
+
Mips_FCULE_D = 710,
|
|
728
|
+
Mips_FCULE_W = 711,
|
|
729
|
+
Mips_FCULT_D = 712,
|
|
730
|
+
Mips_FCULT_W = 713,
|
|
731
|
+
Mips_FCUNE_D = 714,
|
|
732
|
+
Mips_FCUNE_W = 715,
|
|
733
|
+
Mips_FCUN_D = 716,
|
|
734
|
+
Mips_FCUN_W = 717,
|
|
735
|
+
Mips_FDIV_D = 718,
|
|
736
|
+
Mips_FDIV_D32 = 719,
|
|
737
|
+
Mips_FDIV_D64 = 720,
|
|
738
|
+
Mips_FDIV_MM = 721,
|
|
739
|
+
Mips_FDIV_S = 722,
|
|
740
|
+
Mips_FDIV_S_MM = 723,
|
|
741
|
+
Mips_FDIV_W = 724,
|
|
742
|
+
Mips_FEXDO_H = 725,
|
|
743
|
+
Mips_FEXDO_W = 726,
|
|
744
|
+
Mips_FEXP2_D = 727,
|
|
745
|
+
Mips_FEXP2_D_1_PSEUDO = 728,
|
|
746
|
+
Mips_FEXP2_W = 729,
|
|
747
|
+
Mips_FEXP2_W_1_PSEUDO = 730,
|
|
748
|
+
Mips_FEXUPL_D = 731,
|
|
749
|
+
Mips_FEXUPL_W = 732,
|
|
750
|
+
Mips_FEXUPR_D = 733,
|
|
751
|
+
Mips_FEXUPR_W = 734,
|
|
752
|
+
Mips_FFINT_S_D = 735,
|
|
753
|
+
Mips_FFINT_S_W = 736,
|
|
754
|
+
Mips_FFINT_U_D = 737,
|
|
755
|
+
Mips_FFINT_U_W = 738,
|
|
756
|
+
Mips_FFQL_D = 739,
|
|
757
|
+
Mips_FFQL_W = 740,
|
|
758
|
+
Mips_FFQR_D = 741,
|
|
759
|
+
Mips_FFQR_W = 742,
|
|
760
|
+
Mips_FILL_B = 743,
|
|
761
|
+
Mips_FILL_D = 744,
|
|
762
|
+
Mips_FILL_FD_PSEUDO = 745,
|
|
763
|
+
Mips_FILL_FW_PSEUDO = 746,
|
|
764
|
+
Mips_FILL_H = 747,
|
|
765
|
+
Mips_FILL_W = 748,
|
|
766
|
+
Mips_FLOG2_D = 749,
|
|
767
|
+
Mips_FLOG2_W = 750,
|
|
768
|
+
Mips_FLOOR_L_D64 = 751,
|
|
769
|
+
Mips_FLOOR_L_S = 752,
|
|
770
|
+
Mips_FLOOR_W_D32 = 753,
|
|
771
|
+
Mips_FLOOR_W_D64 = 754,
|
|
772
|
+
Mips_FLOOR_W_MM = 755,
|
|
773
|
+
Mips_FLOOR_W_S = 756,
|
|
774
|
+
Mips_FLOOR_W_S_MM = 757,
|
|
775
|
+
Mips_FMADD_D = 758,
|
|
776
|
+
Mips_FMADD_W = 759,
|
|
777
|
+
Mips_FMAX_A_D = 760,
|
|
778
|
+
Mips_FMAX_A_W = 761,
|
|
779
|
+
Mips_FMAX_D = 762,
|
|
780
|
+
Mips_FMAX_W = 763,
|
|
781
|
+
Mips_FMIN_A_D = 764,
|
|
782
|
+
Mips_FMIN_A_W = 765,
|
|
783
|
+
Mips_FMIN_D = 766,
|
|
784
|
+
Mips_FMIN_W = 767,
|
|
785
|
+
Mips_FMOV_D32 = 768,
|
|
786
|
+
Mips_FMOV_D32_MM = 769,
|
|
787
|
+
Mips_FMOV_D64 = 770,
|
|
788
|
+
Mips_FMOV_S = 771,
|
|
789
|
+
Mips_FMOV_S_MM = 772,
|
|
790
|
+
Mips_FMSUB_D = 773,
|
|
791
|
+
Mips_FMSUB_W = 774,
|
|
792
|
+
Mips_FMUL_D = 775,
|
|
793
|
+
Mips_FMUL_D32 = 776,
|
|
794
|
+
Mips_FMUL_D64 = 777,
|
|
795
|
+
Mips_FMUL_MM = 778,
|
|
796
|
+
Mips_FMUL_S = 779,
|
|
797
|
+
Mips_FMUL_S_MM = 780,
|
|
798
|
+
Mips_FMUL_W = 781,
|
|
799
|
+
Mips_FNEG_D32 = 782,
|
|
800
|
+
Mips_FNEG_D64 = 783,
|
|
801
|
+
Mips_FNEG_MM = 784,
|
|
802
|
+
Mips_FNEG_S = 785,
|
|
803
|
+
Mips_FNEG_S_MM = 786,
|
|
804
|
+
Mips_FRCP_D = 787,
|
|
805
|
+
Mips_FRCP_W = 788,
|
|
806
|
+
Mips_FRINT_D = 789,
|
|
807
|
+
Mips_FRINT_W = 790,
|
|
808
|
+
Mips_FRSQRT_D = 791,
|
|
809
|
+
Mips_FRSQRT_W = 792,
|
|
810
|
+
Mips_FSAF_D = 793,
|
|
811
|
+
Mips_FSAF_W = 794,
|
|
812
|
+
Mips_FSEQ_D = 795,
|
|
813
|
+
Mips_FSEQ_W = 796,
|
|
814
|
+
Mips_FSLE_D = 797,
|
|
815
|
+
Mips_FSLE_W = 798,
|
|
816
|
+
Mips_FSLT_D = 799,
|
|
817
|
+
Mips_FSLT_W = 800,
|
|
818
|
+
Mips_FSNE_D = 801,
|
|
819
|
+
Mips_FSNE_W = 802,
|
|
820
|
+
Mips_FSOR_D = 803,
|
|
821
|
+
Mips_FSOR_W = 804,
|
|
822
|
+
Mips_FSQRT_D = 805,
|
|
823
|
+
Mips_FSQRT_D32 = 806,
|
|
824
|
+
Mips_FSQRT_D64 = 807,
|
|
825
|
+
Mips_FSQRT_MM = 808,
|
|
826
|
+
Mips_FSQRT_S = 809,
|
|
827
|
+
Mips_FSQRT_S_MM = 810,
|
|
828
|
+
Mips_FSQRT_W = 811,
|
|
829
|
+
Mips_FSUB_D = 812,
|
|
830
|
+
Mips_FSUB_D32 = 813,
|
|
831
|
+
Mips_FSUB_D64 = 814,
|
|
832
|
+
Mips_FSUB_MM = 815,
|
|
833
|
+
Mips_FSUB_S = 816,
|
|
834
|
+
Mips_FSUB_S_MM = 817,
|
|
835
|
+
Mips_FSUB_W = 818,
|
|
836
|
+
Mips_FSUEQ_D = 819,
|
|
837
|
+
Mips_FSUEQ_W = 820,
|
|
838
|
+
Mips_FSULE_D = 821,
|
|
839
|
+
Mips_FSULE_W = 822,
|
|
840
|
+
Mips_FSULT_D = 823,
|
|
841
|
+
Mips_FSULT_W = 824,
|
|
842
|
+
Mips_FSUNE_D = 825,
|
|
843
|
+
Mips_FSUNE_W = 826,
|
|
844
|
+
Mips_FSUN_D = 827,
|
|
845
|
+
Mips_FSUN_W = 828,
|
|
846
|
+
Mips_FTINT_S_D = 829,
|
|
847
|
+
Mips_FTINT_S_W = 830,
|
|
848
|
+
Mips_FTINT_U_D = 831,
|
|
849
|
+
Mips_FTINT_U_W = 832,
|
|
850
|
+
Mips_FTQ_H = 833,
|
|
851
|
+
Mips_FTQ_W = 834,
|
|
852
|
+
Mips_FTRUNC_S_D = 835,
|
|
853
|
+
Mips_FTRUNC_S_W = 836,
|
|
854
|
+
Mips_FTRUNC_U_D = 837,
|
|
855
|
+
Mips_FTRUNC_U_W = 838,
|
|
856
|
+
Mips_GotPrologue16 = 839,
|
|
857
|
+
Mips_HADD_S_D = 840,
|
|
858
|
+
Mips_HADD_S_H = 841,
|
|
859
|
+
Mips_HADD_S_W = 842,
|
|
860
|
+
Mips_HADD_U_D = 843,
|
|
861
|
+
Mips_HADD_U_H = 844,
|
|
862
|
+
Mips_HADD_U_W = 845,
|
|
863
|
+
Mips_HSUB_S_D = 846,
|
|
864
|
+
Mips_HSUB_S_H = 847,
|
|
865
|
+
Mips_HSUB_S_W = 848,
|
|
866
|
+
Mips_HSUB_U_D = 849,
|
|
867
|
+
Mips_HSUB_U_H = 850,
|
|
868
|
+
Mips_HSUB_U_W = 851,
|
|
869
|
+
Mips_ILVEV_B = 852,
|
|
870
|
+
Mips_ILVEV_D = 853,
|
|
871
|
+
Mips_ILVEV_H = 854,
|
|
872
|
+
Mips_ILVEV_W = 855,
|
|
873
|
+
Mips_ILVL_B = 856,
|
|
874
|
+
Mips_ILVL_D = 857,
|
|
875
|
+
Mips_ILVL_H = 858,
|
|
876
|
+
Mips_ILVL_W = 859,
|
|
877
|
+
Mips_ILVOD_B = 860,
|
|
878
|
+
Mips_ILVOD_D = 861,
|
|
879
|
+
Mips_ILVOD_H = 862,
|
|
880
|
+
Mips_ILVOD_W = 863,
|
|
881
|
+
Mips_ILVR_B = 864,
|
|
882
|
+
Mips_ILVR_D = 865,
|
|
883
|
+
Mips_ILVR_H = 866,
|
|
884
|
+
Mips_ILVR_W = 867,
|
|
885
|
+
Mips_INS = 868,
|
|
886
|
+
Mips_INSERT_B = 869,
|
|
887
|
+
Mips_INSERT_B_VIDX_PSEUDO = 870,
|
|
888
|
+
Mips_INSERT_D = 871,
|
|
889
|
+
Mips_INSERT_D_VIDX_PSEUDO = 872,
|
|
890
|
+
Mips_INSERT_FD_PSEUDO = 873,
|
|
891
|
+
Mips_INSERT_FD_VIDX_PSEUDO = 874,
|
|
892
|
+
Mips_INSERT_FW_PSEUDO = 875,
|
|
893
|
+
Mips_INSERT_FW_VIDX_PSEUDO = 876,
|
|
894
|
+
Mips_INSERT_H = 877,
|
|
895
|
+
Mips_INSERT_H_VIDX_PSEUDO = 878,
|
|
896
|
+
Mips_INSERT_W = 879,
|
|
897
|
+
Mips_INSERT_W_VIDX_PSEUDO = 880,
|
|
898
|
+
Mips_INSV = 881,
|
|
899
|
+
Mips_INSVE_B = 882,
|
|
900
|
+
Mips_INSVE_D = 883,
|
|
901
|
+
Mips_INSVE_H = 884,
|
|
902
|
+
Mips_INSVE_W = 885,
|
|
903
|
+
Mips_INS_MM = 886,
|
|
904
|
+
Mips_J = 887,
|
|
905
|
+
Mips_JAL = 888,
|
|
906
|
+
Mips_JALR = 889,
|
|
907
|
+
Mips_JALR16_MM = 890,
|
|
908
|
+
Mips_JALR64 = 891,
|
|
909
|
+
Mips_JALR64Pseudo = 892,
|
|
910
|
+
Mips_JALRPseudo = 893,
|
|
911
|
+
Mips_JALRS16_MM = 894,
|
|
912
|
+
Mips_JALRS_MM = 895,
|
|
913
|
+
Mips_JALR_HB = 896,
|
|
914
|
+
Mips_JALR_MM = 897,
|
|
915
|
+
Mips_JALS_MM = 898,
|
|
916
|
+
Mips_JALX = 899,
|
|
917
|
+
Mips_JALX_MM = 900,
|
|
918
|
+
Mips_JAL_MM = 901,
|
|
919
|
+
Mips_JIALC = 902,
|
|
920
|
+
Mips_JIC = 903,
|
|
921
|
+
Mips_JR = 904,
|
|
922
|
+
Mips_JR16_MM = 905,
|
|
923
|
+
Mips_JR64 = 906,
|
|
924
|
+
Mips_JRADDIUSP = 907,
|
|
925
|
+
Mips_JRC16_MM = 908,
|
|
926
|
+
Mips_JR_HB = 909,
|
|
927
|
+
Mips_JR_HB_R6 = 910,
|
|
928
|
+
Mips_JR_MM = 911,
|
|
929
|
+
Mips_J_MM = 912,
|
|
930
|
+
Mips_Jal16 = 913,
|
|
931
|
+
Mips_JalB16 = 914,
|
|
932
|
+
Mips_JalOneReg = 915,
|
|
933
|
+
Mips_JalTwoReg = 916,
|
|
934
|
+
Mips_JrRa16 = 917,
|
|
935
|
+
Mips_JrcRa16 = 918,
|
|
936
|
+
Mips_JrcRx16 = 919,
|
|
937
|
+
Mips_JumpLinkReg16 = 920,
|
|
938
|
+
Mips_LB = 921,
|
|
939
|
+
Mips_LB64 = 922,
|
|
940
|
+
Mips_LBU16_MM = 923,
|
|
941
|
+
Mips_LBUX = 924,
|
|
942
|
+
Mips_LB_MM = 925,
|
|
943
|
+
Mips_LBu = 926,
|
|
944
|
+
Mips_LBu64 = 927,
|
|
945
|
+
Mips_LBu_MM = 928,
|
|
946
|
+
Mips_LD = 929,
|
|
947
|
+
Mips_LDC1 = 930,
|
|
948
|
+
Mips_LDC164 = 931,
|
|
949
|
+
Mips_LDC1_MM = 932,
|
|
950
|
+
Mips_LDC2 = 933,
|
|
951
|
+
Mips_LDC2_R6 = 934,
|
|
952
|
+
Mips_LDC3 = 935,
|
|
953
|
+
Mips_LDI_B = 936,
|
|
954
|
+
Mips_LDI_D = 937,
|
|
955
|
+
Mips_LDI_H = 938,
|
|
956
|
+
Mips_LDI_W = 939,
|
|
957
|
+
Mips_LDL = 940,
|
|
958
|
+
Mips_LDPC = 941,
|
|
959
|
+
Mips_LDR = 942,
|
|
960
|
+
Mips_LDXC1 = 943,
|
|
961
|
+
Mips_LDXC164 = 944,
|
|
962
|
+
Mips_LD_B = 945,
|
|
963
|
+
Mips_LD_D = 946,
|
|
964
|
+
Mips_LD_H = 947,
|
|
965
|
+
Mips_LD_W = 948,
|
|
966
|
+
Mips_LEA_ADDiu = 949,
|
|
967
|
+
Mips_LEA_ADDiu64 = 950,
|
|
968
|
+
Mips_LEA_ADDiu_MM = 951,
|
|
969
|
+
Mips_LH = 952,
|
|
970
|
+
Mips_LH64 = 953,
|
|
971
|
+
Mips_LHU16_MM = 954,
|
|
972
|
+
Mips_LHX = 955,
|
|
973
|
+
Mips_LH_MM = 956,
|
|
974
|
+
Mips_LHu = 957,
|
|
975
|
+
Mips_LHu64 = 958,
|
|
976
|
+
Mips_LHu_MM = 959,
|
|
977
|
+
Mips_LI16_MM = 960,
|
|
978
|
+
Mips_LL = 961,
|
|
979
|
+
Mips_LLD = 962,
|
|
980
|
+
Mips_LLD_R6 = 963,
|
|
981
|
+
Mips_LL_MM = 964,
|
|
982
|
+
Mips_LL_R6 = 965,
|
|
983
|
+
Mips_LOAD_ACC128 = 966,
|
|
984
|
+
Mips_LOAD_ACC64 = 967,
|
|
985
|
+
Mips_LOAD_ACC64DSP = 968,
|
|
986
|
+
Mips_LOAD_CCOND_DSP = 969,
|
|
987
|
+
Mips_LONG_BRANCH_ADDiu = 970,
|
|
988
|
+
Mips_LONG_BRANCH_DADDiu = 971,
|
|
989
|
+
Mips_LONG_BRANCH_LUi = 972,
|
|
990
|
+
Mips_LSA = 973,
|
|
991
|
+
Mips_LSA_R6 = 974,
|
|
992
|
+
Mips_LUXC1 = 975,
|
|
993
|
+
Mips_LUXC164 = 976,
|
|
994
|
+
Mips_LUXC1_MM = 977,
|
|
995
|
+
Mips_LUi = 978,
|
|
996
|
+
Mips_LUi64 = 979,
|
|
997
|
+
Mips_LUi_MM = 980,
|
|
998
|
+
Mips_LW = 981,
|
|
999
|
+
Mips_LW16_MM = 982,
|
|
1000
|
+
Mips_LW64 = 983,
|
|
1001
|
+
Mips_LWC1 = 984,
|
|
1002
|
+
Mips_LWC1_MM = 985,
|
|
1003
|
+
Mips_LWC2 = 986,
|
|
1004
|
+
Mips_LWC2_R6 = 987,
|
|
1005
|
+
Mips_LWC3 = 988,
|
|
1006
|
+
Mips_LWGP_MM = 989,
|
|
1007
|
+
Mips_LWL = 990,
|
|
1008
|
+
Mips_LWL64 = 991,
|
|
1009
|
+
Mips_LWL_MM = 992,
|
|
1010
|
+
Mips_LWM16_MM = 993,
|
|
1011
|
+
Mips_LWM32_MM = 994,
|
|
1012
|
+
Mips_LWM_MM = 995,
|
|
1013
|
+
Mips_LWPC = 996,
|
|
1014
|
+
Mips_LWP_MM = 997,
|
|
1015
|
+
Mips_LWR = 998,
|
|
1016
|
+
Mips_LWR64 = 999,
|
|
1017
|
+
Mips_LWR_MM = 1000,
|
|
1018
|
+
Mips_LWSP_MM = 1001,
|
|
1019
|
+
Mips_LWUPC = 1002,
|
|
1020
|
+
Mips_LWU_MM = 1003,
|
|
1021
|
+
Mips_LWX = 1004,
|
|
1022
|
+
Mips_LWXC1 = 1005,
|
|
1023
|
+
Mips_LWXC1_MM = 1006,
|
|
1024
|
+
Mips_LWXS_MM = 1007,
|
|
1025
|
+
Mips_LW_MM = 1008,
|
|
1026
|
+
Mips_LWu = 1009,
|
|
1027
|
+
Mips_LbRxRyOffMemX16 = 1010,
|
|
1028
|
+
Mips_LbuRxRyOffMemX16 = 1011,
|
|
1029
|
+
Mips_LhRxRyOffMemX16 = 1012,
|
|
1030
|
+
Mips_LhuRxRyOffMemX16 = 1013,
|
|
1031
|
+
Mips_LiRxImm16 = 1014,
|
|
1032
|
+
Mips_LiRxImmAlignX16 = 1015,
|
|
1033
|
+
Mips_LiRxImmX16 = 1016,
|
|
1034
|
+
Mips_LoadAddr32Imm = 1017,
|
|
1035
|
+
Mips_LoadAddr32Reg = 1018,
|
|
1036
|
+
Mips_LoadImm32Reg = 1019,
|
|
1037
|
+
Mips_LoadImm64Reg = 1020,
|
|
1038
|
+
Mips_LwConstant32 = 1021,
|
|
1039
|
+
Mips_LwRxPcTcp16 = 1022,
|
|
1040
|
+
Mips_LwRxPcTcpX16 = 1023,
|
|
1041
|
+
Mips_LwRxRyOffMemX16 = 1024,
|
|
1042
|
+
Mips_LwRxSpImmX16 = 1025,
|
|
1043
|
+
Mips_MADD = 1026,
|
|
1044
|
+
Mips_MADDF_D = 1027,
|
|
1045
|
+
Mips_MADDF_S = 1028,
|
|
1046
|
+
Mips_MADDR_Q_H = 1029,
|
|
1047
|
+
Mips_MADDR_Q_W = 1030,
|
|
1048
|
+
Mips_MADDU = 1031,
|
|
1049
|
+
Mips_MADDU_DSP = 1032,
|
|
1050
|
+
Mips_MADDU_MM = 1033,
|
|
1051
|
+
Mips_MADDV_B = 1034,
|
|
1052
|
+
Mips_MADDV_D = 1035,
|
|
1053
|
+
Mips_MADDV_H = 1036,
|
|
1054
|
+
Mips_MADDV_W = 1037,
|
|
1055
|
+
Mips_MADD_D32 = 1038,
|
|
1056
|
+
Mips_MADD_D32_MM = 1039,
|
|
1057
|
+
Mips_MADD_D64 = 1040,
|
|
1058
|
+
Mips_MADD_DSP = 1041,
|
|
1059
|
+
Mips_MADD_MM = 1042,
|
|
1060
|
+
Mips_MADD_Q_H = 1043,
|
|
1061
|
+
Mips_MADD_Q_W = 1044,
|
|
1062
|
+
Mips_MADD_S = 1045,
|
|
1063
|
+
Mips_MADD_S_MM = 1046,
|
|
1064
|
+
Mips_MAQ_SA_W_PHL = 1047,
|
|
1065
|
+
Mips_MAQ_SA_W_PHR = 1048,
|
|
1066
|
+
Mips_MAQ_S_W_PHL = 1049,
|
|
1067
|
+
Mips_MAQ_S_W_PHR = 1050,
|
|
1068
|
+
Mips_MAXA_D = 1051,
|
|
1069
|
+
Mips_MAXA_S = 1052,
|
|
1070
|
+
Mips_MAXI_S_B = 1053,
|
|
1071
|
+
Mips_MAXI_S_D = 1054,
|
|
1072
|
+
Mips_MAXI_S_H = 1055,
|
|
1073
|
+
Mips_MAXI_S_W = 1056,
|
|
1074
|
+
Mips_MAXI_U_B = 1057,
|
|
1075
|
+
Mips_MAXI_U_D = 1058,
|
|
1076
|
+
Mips_MAXI_U_H = 1059,
|
|
1077
|
+
Mips_MAXI_U_W = 1060,
|
|
1078
|
+
Mips_MAX_A_B = 1061,
|
|
1079
|
+
Mips_MAX_A_D = 1062,
|
|
1080
|
+
Mips_MAX_A_H = 1063,
|
|
1081
|
+
Mips_MAX_A_W = 1064,
|
|
1082
|
+
Mips_MAX_D = 1065,
|
|
1083
|
+
Mips_MAX_S = 1066,
|
|
1084
|
+
Mips_MAX_S_B = 1067,
|
|
1085
|
+
Mips_MAX_S_D = 1068,
|
|
1086
|
+
Mips_MAX_S_H = 1069,
|
|
1087
|
+
Mips_MAX_S_W = 1070,
|
|
1088
|
+
Mips_MAX_U_B = 1071,
|
|
1089
|
+
Mips_MAX_U_D = 1072,
|
|
1090
|
+
Mips_MAX_U_H = 1073,
|
|
1091
|
+
Mips_MAX_U_W = 1074,
|
|
1092
|
+
Mips_MFC0 = 1075,
|
|
1093
|
+
Mips_MFC1 = 1076,
|
|
1094
|
+
Mips_MFC1_MM = 1077,
|
|
1095
|
+
Mips_MFC2 = 1078,
|
|
1096
|
+
Mips_MFHC1_D32 = 1079,
|
|
1097
|
+
Mips_MFHC1_D64 = 1080,
|
|
1098
|
+
Mips_MFHC1_MM = 1081,
|
|
1099
|
+
Mips_MFHI = 1082,
|
|
1100
|
+
Mips_MFHI16_MM = 1083,
|
|
1101
|
+
Mips_MFHI64 = 1084,
|
|
1102
|
+
Mips_MFHI_DSP = 1085,
|
|
1103
|
+
Mips_MFHI_MM = 1086,
|
|
1104
|
+
Mips_MFLO = 1087,
|
|
1105
|
+
Mips_MFLO16_MM = 1088,
|
|
1106
|
+
Mips_MFLO64 = 1089,
|
|
1107
|
+
Mips_MFLO_DSP = 1090,
|
|
1108
|
+
Mips_MFLO_MM = 1091,
|
|
1109
|
+
Mips_MINA_D = 1092,
|
|
1110
|
+
Mips_MINA_S = 1093,
|
|
1111
|
+
Mips_MINI_S_B = 1094,
|
|
1112
|
+
Mips_MINI_S_D = 1095,
|
|
1113
|
+
Mips_MINI_S_H = 1096,
|
|
1114
|
+
Mips_MINI_S_W = 1097,
|
|
1115
|
+
Mips_MINI_U_B = 1098,
|
|
1116
|
+
Mips_MINI_U_D = 1099,
|
|
1117
|
+
Mips_MINI_U_H = 1100,
|
|
1118
|
+
Mips_MINI_U_W = 1101,
|
|
1119
|
+
Mips_MIN_A_B = 1102,
|
|
1120
|
+
Mips_MIN_A_D = 1103,
|
|
1121
|
+
Mips_MIN_A_H = 1104,
|
|
1122
|
+
Mips_MIN_A_W = 1105,
|
|
1123
|
+
Mips_MIN_D = 1106,
|
|
1124
|
+
Mips_MIN_S = 1107,
|
|
1125
|
+
Mips_MIN_S_B = 1108,
|
|
1126
|
+
Mips_MIN_S_D = 1109,
|
|
1127
|
+
Mips_MIN_S_H = 1110,
|
|
1128
|
+
Mips_MIN_S_W = 1111,
|
|
1129
|
+
Mips_MIN_U_B = 1112,
|
|
1130
|
+
Mips_MIN_U_D = 1113,
|
|
1131
|
+
Mips_MIN_U_H = 1114,
|
|
1132
|
+
Mips_MIN_U_W = 1115,
|
|
1133
|
+
Mips_MIPSeh_return32 = 1116,
|
|
1134
|
+
Mips_MIPSeh_return64 = 1117,
|
|
1135
|
+
Mips_MOD = 1118,
|
|
1136
|
+
Mips_MODSUB = 1119,
|
|
1137
|
+
Mips_MODU = 1120,
|
|
1138
|
+
Mips_MOD_S_B = 1121,
|
|
1139
|
+
Mips_MOD_S_D = 1122,
|
|
1140
|
+
Mips_MOD_S_H = 1123,
|
|
1141
|
+
Mips_MOD_S_W = 1124,
|
|
1142
|
+
Mips_MOD_U_B = 1125,
|
|
1143
|
+
Mips_MOD_U_D = 1126,
|
|
1144
|
+
Mips_MOD_U_H = 1127,
|
|
1145
|
+
Mips_MOD_U_W = 1128,
|
|
1146
|
+
Mips_MOVE16_MM = 1129,
|
|
1147
|
+
Mips_MOVEP_MM = 1130,
|
|
1148
|
+
Mips_MOVE_V = 1131,
|
|
1149
|
+
Mips_MOVF_D32 = 1132,
|
|
1150
|
+
Mips_MOVF_D32_MM = 1133,
|
|
1151
|
+
Mips_MOVF_D64 = 1134,
|
|
1152
|
+
Mips_MOVF_I = 1135,
|
|
1153
|
+
Mips_MOVF_I64 = 1136,
|
|
1154
|
+
Mips_MOVF_I_MM = 1137,
|
|
1155
|
+
Mips_MOVF_S = 1138,
|
|
1156
|
+
Mips_MOVF_S_MM = 1139,
|
|
1157
|
+
Mips_MOVN_I64_D64 = 1140,
|
|
1158
|
+
Mips_MOVN_I64_I = 1141,
|
|
1159
|
+
Mips_MOVN_I64_I64 = 1142,
|
|
1160
|
+
Mips_MOVN_I64_S = 1143,
|
|
1161
|
+
Mips_MOVN_I_D32 = 1144,
|
|
1162
|
+
Mips_MOVN_I_D32_MM = 1145,
|
|
1163
|
+
Mips_MOVN_I_D64 = 1146,
|
|
1164
|
+
Mips_MOVN_I_I = 1147,
|
|
1165
|
+
Mips_MOVN_I_I64 = 1148,
|
|
1166
|
+
Mips_MOVN_I_MM = 1149,
|
|
1167
|
+
Mips_MOVN_I_S = 1150,
|
|
1168
|
+
Mips_MOVN_I_S_MM = 1151,
|
|
1169
|
+
Mips_MOVT_D32 = 1152,
|
|
1170
|
+
Mips_MOVT_D32_MM = 1153,
|
|
1171
|
+
Mips_MOVT_D64 = 1154,
|
|
1172
|
+
Mips_MOVT_I = 1155,
|
|
1173
|
+
Mips_MOVT_I64 = 1156,
|
|
1174
|
+
Mips_MOVT_I_MM = 1157,
|
|
1175
|
+
Mips_MOVT_S = 1158,
|
|
1176
|
+
Mips_MOVT_S_MM = 1159,
|
|
1177
|
+
Mips_MOVZ_I64_D64 = 1160,
|
|
1178
|
+
Mips_MOVZ_I64_I = 1161,
|
|
1179
|
+
Mips_MOVZ_I64_I64 = 1162,
|
|
1180
|
+
Mips_MOVZ_I64_S = 1163,
|
|
1181
|
+
Mips_MOVZ_I_D32 = 1164,
|
|
1182
|
+
Mips_MOVZ_I_D32_MM = 1165,
|
|
1183
|
+
Mips_MOVZ_I_D64 = 1166,
|
|
1184
|
+
Mips_MOVZ_I_I = 1167,
|
|
1185
|
+
Mips_MOVZ_I_I64 = 1168,
|
|
1186
|
+
Mips_MOVZ_I_MM = 1169,
|
|
1187
|
+
Mips_MOVZ_I_S = 1170,
|
|
1188
|
+
Mips_MOVZ_I_S_MM = 1171,
|
|
1189
|
+
Mips_MSUB = 1172,
|
|
1190
|
+
Mips_MSUBF_D = 1173,
|
|
1191
|
+
Mips_MSUBF_S = 1174,
|
|
1192
|
+
Mips_MSUBR_Q_H = 1175,
|
|
1193
|
+
Mips_MSUBR_Q_W = 1176,
|
|
1194
|
+
Mips_MSUBU = 1177,
|
|
1195
|
+
Mips_MSUBU_DSP = 1178,
|
|
1196
|
+
Mips_MSUBU_MM = 1179,
|
|
1197
|
+
Mips_MSUBV_B = 1180,
|
|
1198
|
+
Mips_MSUBV_D = 1181,
|
|
1199
|
+
Mips_MSUBV_H = 1182,
|
|
1200
|
+
Mips_MSUBV_W = 1183,
|
|
1201
|
+
Mips_MSUB_D32 = 1184,
|
|
1202
|
+
Mips_MSUB_D32_MM = 1185,
|
|
1203
|
+
Mips_MSUB_D64 = 1186,
|
|
1204
|
+
Mips_MSUB_DSP = 1187,
|
|
1205
|
+
Mips_MSUB_MM = 1188,
|
|
1206
|
+
Mips_MSUB_Q_H = 1189,
|
|
1207
|
+
Mips_MSUB_Q_W = 1190,
|
|
1208
|
+
Mips_MSUB_S = 1191,
|
|
1209
|
+
Mips_MSUB_S_MM = 1192,
|
|
1210
|
+
Mips_MTC0 = 1193,
|
|
1211
|
+
Mips_MTC1 = 1194,
|
|
1212
|
+
Mips_MTC1_MM = 1195,
|
|
1213
|
+
Mips_MTC2 = 1196,
|
|
1214
|
+
Mips_MTHC1_D32 = 1197,
|
|
1215
|
+
Mips_MTHC1_D64 = 1198,
|
|
1216
|
+
Mips_MTHC1_MM = 1199,
|
|
1217
|
+
Mips_MTHI = 1200,
|
|
1218
|
+
Mips_MTHI64 = 1201,
|
|
1219
|
+
Mips_MTHI_DSP = 1202,
|
|
1220
|
+
Mips_MTHI_MM = 1203,
|
|
1221
|
+
Mips_MTHLIP = 1204,
|
|
1222
|
+
Mips_MTLO = 1205,
|
|
1223
|
+
Mips_MTLO64 = 1206,
|
|
1224
|
+
Mips_MTLO_DSP = 1207,
|
|
1225
|
+
Mips_MTLO_MM = 1208,
|
|
1226
|
+
Mips_MTM0 = 1209,
|
|
1227
|
+
Mips_MTM1 = 1210,
|
|
1228
|
+
Mips_MTM2 = 1211,
|
|
1229
|
+
Mips_MTP0 = 1212,
|
|
1230
|
+
Mips_MTP1 = 1213,
|
|
1231
|
+
Mips_MTP2 = 1214,
|
|
1232
|
+
Mips_MUH = 1215,
|
|
1233
|
+
Mips_MUHU = 1216,
|
|
1234
|
+
Mips_MUL = 1217,
|
|
1235
|
+
Mips_MULEQ_S_W_PHL = 1218,
|
|
1236
|
+
Mips_MULEQ_S_W_PHR = 1219,
|
|
1237
|
+
Mips_MULEU_S_PH_QBL = 1220,
|
|
1238
|
+
Mips_MULEU_S_PH_QBR = 1221,
|
|
1239
|
+
Mips_MULQ_RS_PH = 1222,
|
|
1240
|
+
Mips_MULQ_RS_W = 1223,
|
|
1241
|
+
Mips_MULQ_S_PH = 1224,
|
|
1242
|
+
Mips_MULQ_S_W = 1225,
|
|
1243
|
+
Mips_MULR_Q_H = 1226,
|
|
1244
|
+
Mips_MULR_Q_W = 1227,
|
|
1245
|
+
Mips_MULSAQ_S_W_PH = 1228,
|
|
1246
|
+
Mips_MULSA_W_PH = 1229,
|
|
1247
|
+
Mips_MULT = 1230,
|
|
1248
|
+
Mips_MULTU_DSP = 1231,
|
|
1249
|
+
Mips_MULT_DSP = 1232,
|
|
1250
|
+
Mips_MULT_MM = 1233,
|
|
1251
|
+
Mips_MULTu = 1234,
|
|
1252
|
+
Mips_MULTu_MM = 1235,
|
|
1253
|
+
Mips_MULU = 1236,
|
|
1254
|
+
Mips_MULV_B = 1237,
|
|
1255
|
+
Mips_MULV_D = 1238,
|
|
1256
|
+
Mips_MULV_H = 1239,
|
|
1257
|
+
Mips_MULV_W = 1240,
|
|
1258
|
+
Mips_MUL_MM = 1241,
|
|
1259
|
+
Mips_MUL_PH = 1242,
|
|
1260
|
+
Mips_MUL_Q_H = 1243,
|
|
1261
|
+
Mips_MUL_Q_W = 1244,
|
|
1262
|
+
Mips_MUL_R6 = 1245,
|
|
1263
|
+
Mips_MUL_S_PH = 1246,
|
|
1264
|
+
Mips_Mfhi16 = 1247,
|
|
1265
|
+
Mips_Mflo16 = 1248,
|
|
1266
|
+
Mips_Move32R16 = 1249,
|
|
1267
|
+
Mips_MoveR3216 = 1250,
|
|
1268
|
+
Mips_MultRxRy16 = 1251,
|
|
1269
|
+
Mips_MultRxRyRz16 = 1252,
|
|
1270
|
+
Mips_MultuRxRy16 = 1253,
|
|
1271
|
+
Mips_MultuRxRyRz16 = 1254,
|
|
1272
|
+
Mips_NLOC_B = 1255,
|
|
1273
|
+
Mips_NLOC_D = 1256,
|
|
1274
|
+
Mips_NLOC_H = 1257,
|
|
1275
|
+
Mips_NLOC_W = 1258,
|
|
1276
|
+
Mips_NLZC_B = 1259,
|
|
1277
|
+
Mips_NLZC_D = 1260,
|
|
1278
|
+
Mips_NLZC_H = 1261,
|
|
1279
|
+
Mips_NLZC_W = 1262,
|
|
1280
|
+
Mips_NMADD_D32 = 1263,
|
|
1281
|
+
Mips_NMADD_D32_MM = 1264,
|
|
1282
|
+
Mips_NMADD_D64 = 1265,
|
|
1283
|
+
Mips_NMADD_S = 1266,
|
|
1284
|
+
Mips_NMADD_S_MM = 1267,
|
|
1285
|
+
Mips_NMSUB_D32 = 1268,
|
|
1286
|
+
Mips_NMSUB_D32_MM = 1269,
|
|
1287
|
+
Mips_NMSUB_D64 = 1270,
|
|
1288
|
+
Mips_NMSUB_S = 1271,
|
|
1289
|
+
Mips_NMSUB_S_MM = 1272,
|
|
1290
|
+
Mips_NOP = 1273,
|
|
1291
|
+
Mips_NOR = 1274,
|
|
1292
|
+
Mips_NOR64 = 1275,
|
|
1293
|
+
Mips_NORI_B = 1276,
|
|
1294
|
+
Mips_NOR_MM = 1277,
|
|
1295
|
+
Mips_NOR_V = 1278,
|
|
1296
|
+
Mips_NOR_V_D_PSEUDO = 1279,
|
|
1297
|
+
Mips_NOR_V_H_PSEUDO = 1280,
|
|
1298
|
+
Mips_NOR_V_W_PSEUDO = 1281,
|
|
1299
|
+
Mips_NOT16_MM = 1282,
|
|
1300
|
+
Mips_NegRxRy16 = 1283,
|
|
1301
|
+
Mips_NotRxRy16 = 1284,
|
|
1302
|
+
Mips_OR = 1285,
|
|
1303
|
+
Mips_OR16_MM = 1286,
|
|
1304
|
+
Mips_OR64 = 1287,
|
|
1305
|
+
Mips_ORI_B = 1288,
|
|
1306
|
+
Mips_OR_MM = 1289,
|
|
1307
|
+
Mips_OR_V = 1290,
|
|
1308
|
+
Mips_OR_V_D_PSEUDO = 1291,
|
|
1309
|
+
Mips_OR_V_H_PSEUDO = 1292,
|
|
1310
|
+
Mips_OR_V_W_PSEUDO = 1293,
|
|
1311
|
+
Mips_ORi = 1294,
|
|
1312
|
+
Mips_ORi64 = 1295,
|
|
1313
|
+
Mips_ORi_MM = 1296,
|
|
1314
|
+
Mips_OrRxRxRy16 = 1297,
|
|
1315
|
+
Mips_PACKRL_PH = 1298,
|
|
1316
|
+
Mips_PAUSE = 1299,
|
|
1317
|
+
Mips_PAUSE_MM = 1300,
|
|
1318
|
+
Mips_PCKEV_B = 1301,
|
|
1319
|
+
Mips_PCKEV_D = 1302,
|
|
1320
|
+
Mips_PCKEV_H = 1303,
|
|
1321
|
+
Mips_PCKEV_W = 1304,
|
|
1322
|
+
Mips_PCKOD_B = 1305,
|
|
1323
|
+
Mips_PCKOD_D = 1306,
|
|
1324
|
+
Mips_PCKOD_H = 1307,
|
|
1325
|
+
Mips_PCKOD_W = 1308,
|
|
1326
|
+
Mips_PCNT_B = 1309,
|
|
1327
|
+
Mips_PCNT_D = 1310,
|
|
1328
|
+
Mips_PCNT_H = 1311,
|
|
1329
|
+
Mips_PCNT_W = 1312,
|
|
1330
|
+
Mips_PICK_PH = 1313,
|
|
1331
|
+
Mips_PICK_QB = 1314,
|
|
1332
|
+
Mips_POP = 1315,
|
|
1333
|
+
Mips_PRECEQU_PH_QBL = 1316,
|
|
1334
|
+
Mips_PRECEQU_PH_QBLA = 1317,
|
|
1335
|
+
Mips_PRECEQU_PH_QBR = 1318,
|
|
1336
|
+
Mips_PRECEQU_PH_QBRA = 1319,
|
|
1337
|
+
Mips_PRECEQ_W_PHL = 1320,
|
|
1338
|
+
Mips_PRECEQ_W_PHR = 1321,
|
|
1339
|
+
Mips_PRECEU_PH_QBL = 1322,
|
|
1340
|
+
Mips_PRECEU_PH_QBLA = 1323,
|
|
1341
|
+
Mips_PRECEU_PH_QBR = 1324,
|
|
1342
|
+
Mips_PRECEU_PH_QBRA = 1325,
|
|
1343
|
+
Mips_PRECRQU_S_QB_PH = 1326,
|
|
1344
|
+
Mips_PRECRQ_PH_W = 1327,
|
|
1345
|
+
Mips_PRECRQ_QB_PH = 1328,
|
|
1346
|
+
Mips_PRECRQ_RS_PH_W = 1329,
|
|
1347
|
+
Mips_PRECR_QB_PH = 1330,
|
|
1348
|
+
Mips_PRECR_SRA_PH_W = 1331,
|
|
1349
|
+
Mips_PRECR_SRA_R_PH_W = 1332,
|
|
1350
|
+
Mips_PREF = 1333,
|
|
1351
|
+
Mips_PREF_MM = 1334,
|
|
1352
|
+
Mips_PREF_R6 = 1335,
|
|
1353
|
+
Mips_PREPEND = 1336,
|
|
1354
|
+
Mips_PseudoCMPU_EQ_QB = 1337,
|
|
1355
|
+
Mips_PseudoCMPU_LE_QB = 1338,
|
|
1356
|
+
Mips_PseudoCMPU_LT_QB = 1339,
|
|
1357
|
+
Mips_PseudoCMP_EQ_PH = 1340,
|
|
1358
|
+
Mips_PseudoCMP_LE_PH = 1341,
|
|
1359
|
+
Mips_PseudoCMP_LT_PH = 1342,
|
|
1360
|
+
Mips_PseudoCVT_D32_W = 1343,
|
|
1361
|
+
Mips_PseudoCVT_D64_L = 1344,
|
|
1362
|
+
Mips_PseudoCVT_D64_W = 1345,
|
|
1363
|
+
Mips_PseudoCVT_S_L = 1346,
|
|
1364
|
+
Mips_PseudoCVT_S_W = 1347,
|
|
1365
|
+
Mips_PseudoDMULT = 1348,
|
|
1366
|
+
Mips_PseudoDMULTu = 1349,
|
|
1367
|
+
Mips_PseudoDSDIV = 1350,
|
|
1368
|
+
Mips_PseudoDUDIV = 1351,
|
|
1369
|
+
Mips_PseudoIndirectBranch = 1352,
|
|
1370
|
+
Mips_PseudoIndirectBranch64 = 1353,
|
|
1371
|
+
Mips_PseudoMADD = 1354,
|
|
1372
|
+
Mips_PseudoMADDU = 1355,
|
|
1373
|
+
Mips_PseudoMFHI = 1356,
|
|
1374
|
+
Mips_PseudoMFHI64 = 1357,
|
|
1375
|
+
Mips_PseudoMFLO = 1358,
|
|
1376
|
+
Mips_PseudoMFLO64 = 1359,
|
|
1377
|
+
Mips_PseudoMSUB = 1360,
|
|
1378
|
+
Mips_PseudoMSUBU = 1361,
|
|
1379
|
+
Mips_PseudoMTLOHI = 1362,
|
|
1380
|
+
Mips_PseudoMTLOHI64 = 1363,
|
|
1381
|
+
Mips_PseudoMTLOHI_DSP = 1364,
|
|
1382
|
+
Mips_PseudoMULT = 1365,
|
|
1383
|
+
Mips_PseudoMULTu = 1366,
|
|
1384
|
+
Mips_PseudoPICK_PH = 1367,
|
|
1385
|
+
Mips_PseudoPICK_QB = 1368,
|
|
1386
|
+
Mips_PseudoReturn = 1369,
|
|
1387
|
+
Mips_PseudoReturn64 = 1370,
|
|
1388
|
+
Mips_PseudoSDIV = 1371,
|
|
1389
|
+
Mips_PseudoSELECTFP_F_D32 = 1372,
|
|
1390
|
+
Mips_PseudoSELECTFP_F_D64 = 1373,
|
|
1391
|
+
Mips_PseudoSELECTFP_F_I = 1374,
|
|
1392
|
+
Mips_PseudoSELECTFP_F_I64 = 1375,
|
|
1393
|
+
Mips_PseudoSELECTFP_F_S = 1376,
|
|
1394
|
+
Mips_PseudoSELECTFP_T_D32 = 1377,
|
|
1395
|
+
Mips_PseudoSELECTFP_T_D64 = 1378,
|
|
1396
|
+
Mips_PseudoSELECTFP_T_I = 1379,
|
|
1397
|
+
Mips_PseudoSELECTFP_T_I64 = 1380,
|
|
1398
|
+
Mips_PseudoSELECTFP_T_S = 1381,
|
|
1399
|
+
Mips_PseudoSELECT_D32 = 1382,
|
|
1400
|
+
Mips_PseudoSELECT_D64 = 1383,
|
|
1401
|
+
Mips_PseudoSELECT_I = 1384,
|
|
1402
|
+
Mips_PseudoSELECT_I64 = 1385,
|
|
1403
|
+
Mips_PseudoSELECT_S = 1386,
|
|
1404
|
+
Mips_PseudoUDIV = 1387,
|
|
1405
|
+
Mips_RADDU_W_QB = 1388,
|
|
1406
|
+
Mips_RDDSP = 1389,
|
|
1407
|
+
Mips_RDHWR = 1390,
|
|
1408
|
+
Mips_RDHWR64 = 1391,
|
|
1409
|
+
Mips_RDHWR_MM = 1392,
|
|
1410
|
+
Mips_REPLV_PH = 1393,
|
|
1411
|
+
Mips_REPLV_QB = 1394,
|
|
1412
|
+
Mips_REPL_PH = 1395,
|
|
1413
|
+
Mips_REPL_QB = 1396,
|
|
1414
|
+
Mips_RINT_D = 1397,
|
|
1415
|
+
Mips_RINT_S = 1398,
|
|
1416
|
+
Mips_ROTR = 1399,
|
|
1417
|
+
Mips_ROTRV = 1400,
|
|
1418
|
+
Mips_ROTRV_MM = 1401,
|
|
1419
|
+
Mips_ROTR_MM = 1402,
|
|
1420
|
+
Mips_ROUND_L_D64 = 1403,
|
|
1421
|
+
Mips_ROUND_L_S = 1404,
|
|
1422
|
+
Mips_ROUND_W_D32 = 1405,
|
|
1423
|
+
Mips_ROUND_W_D64 = 1406,
|
|
1424
|
+
Mips_ROUND_W_MM = 1407,
|
|
1425
|
+
Mips_ROUND_W_S = 1408,
|
|
1426
|
+
Mips_ROUND_W_S_MM = 1409,
|
|
1427
|
+
Mips_Restore16 = 1410,
|
|
1428
|
+
Mips_RestoreX16 = 1411,
|
|
1429
|
+
Mips_RetRA = 1412,
|
|
1430
|
+
Mips_RetRA16 = 1413,
|
|
1431
|
+
Mips_SAT_S_B = 1414,
|
|
1432
|
+
Mips_SAT_S_D = 1415,
|
|
1433
|
+
Mips_SAT_S_H = 1416,
|
|
1434
|
+
Mips_SAT_S_W = 1417,
|
|
1435
|
+
Mips_SAT_U_B = 1418,
|
|
1436
|
+
Mips_SAT_U_D = 1419,
|
|
1437
|
+
Mips_SAT_U_H = 1420,
|
|
1438
|
+
Mips_SAT_U_W = 1421,
|
|
1439
|
+
Mips_SB = 1422,
|
|
1440
|
+
Mips_SB16_MM = 1423,
|
|
1441
|
+
Mips_SB64 = 1424,
|
|
1442
|
+
Mips_SB_MM = 1425,
|
|
1443
|
+
Mips_SC = 1426,
|
|
1444
|
+
Mips_SCD = 1427,
|
|
1445
|
+
Mips_SCD_R6 = 1428,
|
|
1446
|
+
Mips_SC_MM = 1429,
|
|
1447
|
+
Mips_SC_R6 = 1430,
|
|
1448
|
+
Mips_SD = 1431,
|
|
1449
|
+
Mips_SDBBP = 1432,
|
|
1450
|
+
Mips_SDBBP16_MM = 1433,
|
|
1451
|
+
Mips_SDBBP_MM = 1434,
|
|
1452
|
+
Mips_SDBBP_R6 = 1435,
|
|
1453
|
+
Mips_SDC1 = 1436,
|
|
1454
|
+
Mips_SDC164 = 1437,
|
|
1455
|
+
Mips_SDC1_MM = 1438,
|
|
1456
|
+
Mips_SDC2 = 1439,
|
|
1457
|
+
Mips_SDC2_R6 = 1440,
|
|
1458
|
+
Mips_SDC3 = 1441,
|
|
1459
|
+
Mips_SDIV = 1442,
|
|
1460
|
+
Mips_SDIV_MM = 1443,
|
|
1461
|
+
Mips_SDL = 1444,
|
|
1462
|
+
Mips_SDR = 1445,
|
|
1463
|
+
Mips_SDXC1 = 1446,
|
|
1464
|
+
Mips_SDXC164 = 1447,
|
|
1465
|
+
Mips_SEB = 1448,
|
|
1466
|
+
Mips_SEB64 = 1449,
|
|
1467
|
+
Mips_SEB_MM = 1450,
|
|
1468
|
+
Mips_SEH = 1451,
|
|
1469
|
+
Mips_SEH64 = 1452,
|
|
1470
|
+
Mips_SEH_MM = 1453,
|
|
1471
|
+
Mips_SELEQZ = 1454,
|
|
1472
|
+
Mips_SELEQZ64 = 1455,
|
|
1473
|
+
Mips_SELEQZ_D = 1456,
|
|
1474
|
+
Mips_SELEQZ_S = 1457,
|
|
1475
|
+
Mips_SELNEZ = 1458,
|
|
1476
|
+
Mips_SELNEZ64 = 1459,
|
|
1477
|
+
Mips_SELNEZ_D = 1460,
|
|
1478
|
+
Mips_SELNEZ_S = 1461,
|
|
1479
|
+
Mips_SEL_D = 1462,
|
|
1480
|
+
Mips_SEL_S = 1463,
|
|
1481
|
+
Mips_SEQ = 1464,
|
|
1482
|
+
Mips_SEQi = 1465,
|
|
1483
|
+
Mips_SH = 1466,
|
|
1484
|
+
Mips_SH16_MM = 1467,
|
|
1485
|
+
Mips_SH64 = 1468,
|
|
1486
|
+
Mips_SHF_B = 1469,
|
|
1487
|
+
Mips_SHF_H = 1470,
|
|
1488
|
+
Mips_SHF_W = 1471,
|
|
1489
|
+
Mips_SHILO = 1472,
|
|
1490
|
+
Mips_SHILOV = 1473,
|
|
1491
|
+
Mips_SHLLV_PH = 1474,
|
|
1492
|
+
Mips_SHLLV_QB = 1475,
|
|
1493
|
+
Mips_SHLLV_S_PH = 1476,
|
|
1494
|
+
Mips_SHLLV_S_W = 1477,
|
|
1495
|
+
Mips_SHLL_PH = 1478,
|
|
1496
|
+
Mips_SHLL_QB = 1479,
|
|
1497
|
+
Mips_SHLL_S_PH = 1480,
|
|
1498
|
+
Mips_SHLL_S_W = 1481,
|
|
1499
|
+
Mips_SHRAV_PH = 1482,
|
|
1500
|
+
Mips_SHRAV_QB = 1483,
|
|
1501
|
+
Mips_SHRAV_R_PH = 1484,
|
|
1502
|
+
Mips_SHRAV_R_QB = 1485,
|
|
1503
|
+
Mips_SHRAV_R_W = 1486,
|
|
1504
|
+
Mips_SHRA_PH = 1487,
|
|
1505
|
+
Mips_SHRA_QB = 1488,
|
|
1506
|
+
Mips_SHRA_R_PH = 1489,
|
|
1507
|
+
Mips_SHRA_R_QB = 1490,
|
|
1508
|
+
Mips_SHRA_R_W = 1491,
|
|
1509
|
+
Mips_SHRLV_PH = 1492,
|
|
1510
|
+
Mips_SHRLV_QB = 1493,
|
|
1511
|
+
Mips_SHRL_PH = 1494,
|
|
1512
|
+
Mips_SHRL_QB = 1495,
|
|
1513
|
+
Mips_SH_MM = 1496,
|
|
1514
|
+
Mips_SLDI_B = 1497,
|
|
1515
|
+
Mips_SLDI_D = 1498,
|
|
1516
|
+
Mips_SLDI_H = 1499,
|
|
1517
|
+
Mips_SLDI_W = 1500,
|
|
1518
|
+
Mips_SLD_B = 1501,
|
|
1519
|
+
Mips_SLD_D = 1502,
|
|
1520
|
+
Mips_SLD_H = 1503,
|
|
1521
|
+
Mips_SLD_W = 1504,
|
|
1522
|
+
Mips_SLL = 1505,
|
|
1523
|
+
Mips_SLL16_MM = 1506,
|
|
1524
|
+
Mips_SLL64_32 = 1507,
|
|
1525
|
+
Mips_SLL64_64 = 1508,
|
|
1526
|
+
Mips_SLLI_B = 1509,
|
|
1527
|
+
Mips_SLLI_D = 1510,
|
|
1528
|
+
Mips_SLLI_H = 1511,
|
|
1529
|
+
Mips_SLLI_W = 1512,
|
|
1530
|
+
Mips_SLLV = 1513,
|
|
1531
|
+
Mips_SLLV_MM = 1514,
|
|
1532
|
+
Mips_SLL_B = 1515,
|
|
1533
|
+
Mips_SLL_D = 1516,
|
|
1534
|
+
Mips_SLL_H = 1517,
|
|
1535
|
+
Mips_SLL_MM = 1518,
|
|
1536
|
+
Mips_SLL_W = 1519,
|
|
1537
|
+
Mips_SLT = 1520,
|
|
1538
|
+
Mips_SLT64 = 1521,
|
|
1539
|
+
Mips_SLT_MM = 1522,
|
|
1540
|
+
Mips_SLTi = 1523,
|
|
1541
|
+
Mips_SLTi64 = 1524,
|
|
1542
|
+
Mips_SLTi_MM = 1525,
|
|
1543
|
+
Mips_SLTiu = 1526,
|
|
1544
|
+
Mips_SLTiu64 = 1527,
|
|
1545
|
+
Mips_SLTiu_MM = 1528,
|
|
1546
|
+
Mips_SLTu = 1529,
|
|
1547
|
+
Mips_SLTu64 = 1530,
|
|
1548
|
+
Mips_SLTu_MM = 1531,
|
|
1549
|
+
Mips_SNE = 1532,
|
|
1550
|
+
Mips_SNEi = 1533,
|
|
1551
|
+
Mips_SNZ_B_PSEUDO = 1534,
|
|
1552
|
+
Mips_SNZ_D_PSEUDO = 1535,
|
|
1553
|
+
Mips_SNZ_H_PSEUDO = 1536,
|
|
1554
|
+
Mips_SNZ_V_PSEUDO = 1537,
|
|
1555
|
+
Mips_SNZ_W_PSEUDO = 1538,
|
|
1556
|
+
Mips_SPLATI_B = 1539,
|
|
1557
|
+
Mips_SPLATI_D = 1540,
|
|
1558
|
+
Mips_SPLATI_H = 1541,
|
|
1559
|
+
Mips_SPLATI_W = 1542,
|
|
1560
|
+
Mips_SPLAT_B = 1543,
|
|
1561
|
+
Mips_SPLAT_D = 1544,
|
|
1562
|
+
Mips_SPLAT_H = 1545,
|
|
1563
|
+
Mips_SPLAT_W = 1546,
|
|
1564
|
+
Mips_SRA = 1547,
|
|
1565
|
+
Mips_SRAI_B = 1548,
|
|
1566
|
+
Mips_SRAI_D = 1549,
|
|
1567
|
+
Mips_SRAI_H = 1550,
|
|
1568
|
+
Mips_SRAI_W = 1551,
|
|
1569
|
+
Mips_SRARI_B = 1552,
|
|
1570
|
+
Mips_SRARI_D = 1553,
|
|
1571
|
+
Mips_SRARI_H = 1554,
|
|
1572
|
+
Mips_SRARI_W = 1555,
|
|
1573
|
+
Mips_SRAR_B = 1556,
|
|
1574
|
+
Mips_SRAR_D = 1557,
|
|
1575
|
+
Mips_SRAR_H = 1558,
|
|
1576
|
+
Mips_SRAR_W = 1559,
|
|
1577
|
+
Mips_SRAV = 1560,
|
|
1578
|
+
Mips_SRAV_MM = 1561,
|
|
1579
|
+
Mips_SRA_B = 1562,
|
|
1580
|
+
Mips_SRA_D = 1563,
|
|
1581
|
+
Mips_SRA_H = 1564,
|
|
1582
|
+
Mips_SRA_MM = 1565,
|
|
1583
|
+
Mips_SRA_W = 1566,
|
|
1584
|
+
Mips_SRL = 1567,
|
|
1585
|
+
Mips_SRL16_MM = 1568,
|
|
1586
|
+
Mips_SRLI_B = 1569,
|
|
1587
|
+
Mips_SRLI_D = 1570,
|
|
1588
|
+
Mips_SRLI_H = 1571,
|
|
1589
|
+
Mips_SRLI_W = 1572,
|
|
1590
|
+
Mips_SRLRI_B = 1573,
|
|
1591
|
+
Mips_SRLRI_D = 1574,
|
|
1592
|
+
Mips_SRLRI_H = 1575,
|
|
1593
|
+
Mips_SRLRI_W = 1576,
|
|
1594
|
+
Mips_SRLR_B = 1577,
|
|
1595
|
+
Mips_SRLR_D = 1578,
|
|
1596
|
+
Mips_SRLR_H = 1579,
|
|
1597
|
+
Mips_SRLR_W = 1580,
|
|
1598
|
+
Mips_SRLV = 1581,
|
|
1599
|
+
Mips_SRLV_MM = 1582,
|
|
1600
|
+
Mips_SRL_B = 1583,
|
|
1601
|
+
Mips_SRL_D = 1584,
|
|
1602
|
+
Mips_SRL_H = 1585,
|
|
1603
|
+
Mips_SRL_MM = 1586,
|
|
1604
|
+
Mips_SRL_W = 1587,
|
|
1605
|
+
Mips_SSNOP = 1588,
|
|
1606
|
+
Mips_SSNOP_MM = 1589,
|
|
1607
|
+
Mips_STORE_ACC128 = 1590,
|
|
1608
|
+
Mips_STORE_ACC64 = 1591,
|
|
1609
|
+
Mips_STORE_ACC64DSP = 1592,
|
|
1610
|
+
Mips_STORE_CCOND_DSP = 1593,
|
|
1611
|
+
Mips_ST_B = 1594,
|
|
1612
|
+
Mips_ST_D = 1595,
|
|
1613
|
+
Mips_ST_H = 1596,
|
|
1614
|
+
Mips_ST_W = 1597,
|
|
1615
|
+
Mips_SUB = 1598,
|
|
1616
|
+
Mips_SUBQH_PH = 1599,
|
|
1617
|
+
Mips_SUBQH_R_PH = 1600,
|
|
1618
|
+
Mips_SUBQH_R_W = 1601,
|
|
1619
|
+
Mips_SUBQH_W = 1602,
|
|
1620
|
+
Mips_SUBQ_PH = 1603,
|
|
1621
|
+
Mips_SUBQ_S_PH = 1604,
|
|
1622
|
+
Mips_SUBQ_S_W = 1605,
|
|
1623
|
+
Mips_SUBSUS_U_B = 1606,
|
|
1624
|
+
Mips_SUBSUS_U_D = 1607,
|
|
1625
|
+
Mips_SUBSUS_U_H = 1608,
|
|
1626
|
+
Mips_SUBSUS_U_W = 1609,
|
|
1627
|
+
Mips_SUBSUU_S_B = 1610,
|
|
1628
|
+
Mips_SUBSUU_S_D = 1611,
|
|
1629
|
+
Mips_SUBSUU_S_H = 1612,
|
|
1630
|
+
Mips_SUBSUU_S_W = 1613,
|
|
1631
|
+
Mips_SUBS_S_B = 1614,
|
|
1632
|
+
Mips_SUBS_S_D = 1615,
|
|
1633
|
+
Mips_SUBS_S_H = 1616,
|
|
1634
|
+
Mips_SUBS_S_W = 1617,
|
|
1635
|
+
Mips_SUBS_U_B = 1618,
|
|
1636
|
+
Mips_SUBS_U_D = 1619,
|
|
1637
|
+
Mips_SUBS_U_H = 1620,
|
|
1638
|
+
Mips_SUBS_U_W = 1621,
|
|
1639
|
+
Mips_SUBU16_MM = 1622,
|
|
1640
|
+
Mips_SUBUH_QB = 1623,
|
|
1641
|
+
Mips_SUBUH_R_QB = 1624,
|
|
1642
|
+
Mips_SUBU_PH = 1625,
|
|
1643
|
+
Mips_SUBU_QB = 1626,
|
|
1644
|
+
Mips_SUBU_S_PH = 1627,
|
|
1645
|
+
Mips_SUBU_S_QB = 1628,
|
|
1646
|
+
Mips_SUBVI_B = 1629,
|
|
1647
|
+
Mips_SUBVI_D = 1630,
|
|
1648
|
+
Mips_SUBVI_H = 1631,
|
|
1649
|
+
Mips_SUBVI_W = 1632,
|
|
1650
|
+
Mips_SUBV_B = 1633,
|
|
1651
|
+
Mips_SUBV_D = 1634,
|
|
1652
|
+
Mips_SUBV_H = 1635,
|
|
1653
|
+
Mips_SUBV_W = 1636,
|
|
1654
|
+
Mips_SUB_MM = 1637,
|
|
1655
|
+
Mips_SUBu = 1638,
|
|
1656
|
+
Mips_SUBu_MM = 1639,
|
|
1657
|
+
Mips_SUXC1 = 1640,
|
|
1658
|
+
Mips_SUXC164 = 1641,
|
|
1659
|
+
Mips_SUXC1_MM = 1642,
|
|
1660
|
+
Mips_SW = 1643,
|
|
1661
|
+
Mips_SW16_MM = 1644,
|
|
1662
|
+
Mips_SW64 = 1645,
|
|
1663
|
+
Mips_SWC1 = 1646,
|
|
1664
|
+
Mips_SWC1_MM = 1647,
|
|
1665
|
+
Mips_SWC2 = 1648,
|
|
1666
|
+
Mips_SWC2_R6 = 1649,
|
|
1667
|
+
Mips_SWC3 = 1650,
|
|
1668
|
+
Mips_SWL = 1651,
|
|
1669
|
+
Mips_SWL64 = 1652,
|
|
1670
|
+
Mips_SWL_MM = 1653,
|
|
1671
|
+
Mips_SWM16_MM = 1654,
|
|
1672
|
+
Mips_SWM32_MM = 1655,
|
|
1673
|
+
Mips_SWM_MM = 1656,
|
|
1674
|
+
Mips_SWP_MM = 1657,
|
|
1675
|
+
Mips_SWR = 1658,
|
|
1676
|
+
Mips_SWR64 = 1659,
|
|
1677
|
+
Mips_SWR_MM = 1660,
|
|
1678
|
+
Mips_SWSP_MM = 1661,
|
|
1679
|
+
Mips_SWXC1 = 1662,
|
|
1680
|
+
Mips_SWXC1_MM = 1663,
|
|
1681
|
+
Mips_SW_MM = 1664,
|
|
1682
|
+
Mips_SYNC = 1665,
|
|
1683
|
+
Mips_SYNCI = 1666,
|
|
1684
|
+
Mips_SYNC_MM = 1667,
|
|
1685
|
+
Mips_SYSCALL = 1668,
|
|
1686
|
+
Mips_SYSCALL_MM = 1669,
|
|
1687
|
+
Mips_SZ_B_PSEUDO = 1670,
|
|
1688
|
+
Mips_SZ_D_PSEUDO = 1671,
|
|
1689
|
+
Mips_SZ_H_PSEUDO = 1672,
|
|
1690
|
+
Mips_SZ_V_PSEUDO = 1673,
|
|
1691
|
+
Mips_SZ_W_PSEUDO = 1674,
|
|
1692
|
+
Mips_Save16 = 1675,
|
|
1693
|
+
Mips_SaveX16 = 1676,
|
|
1694
|
+
Mips_SbRxRyOffMemX16 = 1677,
|
|
1695
|
+
Mips_SebRx16 = 1678,
|
|
1696
|
+
Mips_SehRx16 = 1679,
|
|
1697
|
+
Mips_SelBeqZ = 1680,
|
|
1698
|
+
Mips_SelBneZ = 1681,
|
|
1699
|
+
Mips_SelTBteqZCmp = 1682,
|
|
1700
|
+
Mips_SelTBteqZCmpi = 1683,
|
|
1701
|
+
Mips_SelTBteqZSlt = 1684,
|
|
1702
|
+
Mips_SelTBteqZSlti = 1685,
|
|
1703
|
+
Mips_SelTBteqZSltiu = 1686,
|
|
1704
|
+
Mips_SelTBteqZSltu = 1687,
|
|
1705
|
+
Mips_SelTBtneZCmp = 1688,
|
|
1706
|
+
Mips_SelTBtneZCmpi = 1689,
|
|
1707
|
+
Mips_SelTBtneZSlt = 1690,
|
|
1708
|
+
Mips_SelTBtneZSlti = 1691,
|
|
1709
|
+
Mips_SelTBtneZSltiu = 1692,
|
|
1710
|
+
Mips_SelTBtneZSltu = 1693,
|
|
1711
|
+
Mips_ShRxRyOffMemX16 = 1694,
|
|
1712
|
+
Mips_SllX16 = 1695,
|
|
1713
|
+
Mips_SllvRxRy16 = 1696,
|
|
1714
|
+
Mips_SltCCRxRy16 = 1697,
|
|
1715
|
+
Mips_SltRxRy16 = 1698,
|
|
1716
|
+
Mips_SltiCCRxImmX16 = 1699,
|
|
1717
|
+
Mips_SltiRxImm16 = 1700,
|
|
1718
|
+
Mips_SltiRxImmX16 = 1701,
|
|
1719
|
+
Mips_SltiuCCRxImmX16 = 1702,
|
|
1720
|
+
Mips_SltiuRxImm16 = 1703,
|
|
1721
|
+
Mips_SltiuRxImmX16 = 1704,
|
|
1722
|
+
Mips_SltuCCRxRy16 = 1705,
|
|
1723
|
+
Mips_SltuRxRy16 = 1706,
|
|
1724
|
+
Mips_SltuRxRyRz16 = 1707,
|
|
1725
|
+
Mips_SraX16 = 1708,
|
|
1726
|
+
Mips_SravRxRy16 = 1709,
|
|
1727
|
+
Mips_SrlX16 = 1710,
|
|
1728
|
+
Mips_SrlvRxRy16 = 1711,
|
|
1729
|
+
Mips_SubuRxRyRz16 = 1712,
|
|
1730
|
+
Mips_SwRxRyOffMemX16 = 1713,
|
|
1731
|
+
Mips_SwRxSpImmX16 = 1714,
|
|
1732
|
+
Mips_TAILCALL = 1715,
|
|
1733
|
+
Mips_TAILCALL64_R = 1716,
|
|
1734
|
+
Mips_TAILCALL_R = 1717,
|
|
1735
|
+
Mips_TEQ = 1718,
|
|
1736
|
+
Mips_TEQI = 1719,
|
|
1737
|
+
Mips_TEQI_MM = 1720,
|
|
1738
|
+
Mips_TEQ_MM = 1721,
|
|
1739
|
+
Mips_TGE = 1722,
|
|
1740
|
+
Mips_TGEI = 1723,
|
|
1741
|
+
Mips_TGEIU = 1724,
|
|
1742
|
+
Mips_TGEIU_MM = 1725,
|
|
1743
|
+
Mips_TGEI_MM = 1726,
|
|
1744
|
+
Mips_TGEU = 1727,
|
|
1745
|
+
Mips_TGEU_MM = 1728,
|
|
1746
|
+
Mips_TGE_MM = 1729,
|
|
1747
|
+
Mips_TLBP = 1730,
|
|
1748
|
+
Mips_TLBP_MM = 1731,
|
|
1749
|
+
Mips_TLBR = 1732,
|
|
1750
|
+
Mips_TLBR_MM = 1733,
|
|
1751
|
+
Mips_TLBWI = 1734,
|
|
1752
|
+
Mips_TLBWI_MM = 1735,
|
|
1753
|
+
Mips_TLBWR = 1736,
|
|
1754
|
+
Mips_TLBWR_MM = 1737,
|
|
1755
|
+
Mips_TLT = 1738,
|
|
1756
|
+
Mips_TLTI = 1739,
|
|
1757
|
+
Mips_TLTIU_MM = 1740,
|
|
1758
|
+
Mips_TLTI_MM = 1741,
|
|
1759
|
+
Mips_TLTU = 1742,
|
|
1760
|
+
Mips_TLTU_MM = 1743,
|
|
1761
|
+
Mips_TLT_MM = 1744,
|
|
1762
|
+
Mips_TNE = 1745,
|
|
1763
|
+
Mips_TNEI = 1746,
|
|
1764
|
+
Mips_TNEI_MM = 1747,
|
|
1765
|
+
Mips_TNE_MM = 1748,
|
|
1766
|
+
Mips_TRAP = 1749,
|
|
1767
|
+
Mips_TRUNC_L_D64 = 1750,
|
|
1768
|
+
Mips_TRUNC_L_S = 1751,
|
|
1769
|
+
Mips_TRUNC_W_D32 = 1752,
|
|
1770
|
+
Mips_TRUNC_W_D64 = 1753,
|
|
1771
|
+
Mips_TRUNC_W_MM = 1754,
|
|
1772
|
+
Mips_TRUNC_W_S = 1755,
|
|
1773
|
+
Mips_TRUNC_W_S_MM = 1756,
|
|
1774
|
+
Mips_TTLTIU = 1757,
|
|
1775
|
+
Mips_UDIV = 1758,
|
|
1776
|
+
Mips_UDIV_MM = 1759,
|
|
1777
|
+
Mips_V3MULU = 1760,
|
|
1778
|
+
Mips_VMM0 = 1761,
|
|
1779
|
+
Mips_VMULU = 1762,
|
|
1780
|
+
Mips_VSHF_B = 1763,
|
|
1781
|
+
Mips_VSHF_D = 1764,
|
|
1782
|
+
Mips_VSHF_H = 1765,
|
|
1783
|
+
Mips_VSHF_W = 1766,
|
|
1784
|
+
Mips_WAIT = 1767,
|
|
1785
|
+
Mips_WAIT_MM = 1768,
|
|
1786
|
+
Mips_WRDSP = 1769,
|
|
1787
|
+
Mips_WSBH = 1770,
|
|
1788
|
+
Mips_WSBH_MM = 1771,
|
|
1789
|
+
Mips_XOR = 1772,
|
|
1790
|
+
Mips_XOR16_MM = 1773,
|
|
1791
|
+
Mips_XOR64 = 1774,
|
|
1792
|
+
Mips_XORI_B = 1775,
|
|
1793
|
+
Mips_XOR_MM = 1776,
|
|
1794
|
+
Mips_XOR_V = 1777,
|
|
1795
|
+
Mips_XOR_V_D_PSEUDO = 1778,
|
|
1796
|
+
Mips_XOR_V_H_PSEUDO = 1779,
|
|
1797
|
+
Mips_XOR_V_W_PSEUDO = 1780,
|
|
1798
|
+
Mips_XORi = 1781,
|
|
1799
|
+
Mips_XORi64 = 1782,
|
|
1800
|
+
Mips_XORi_MM = 1783,
|
|
1801
|
+
Mips_XorRxRxRy16 = 1784,
|
|
1802
|
+
Mips_INSTRUCTION_LIST_END = 1785
|
|
1803
|
+
};
|
|
1804
|
+
|
|
1805
|
+
#endif // GET_INSTRINFO_ENUM
|