hexcore-capstone 1.2.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/LICENSE +26 -0
- package/README.md +191 -0
- package/binding.gyp +168 -0
- package/deps/capstone/LEB128.h +38 -0
- package/deps/capstone/MCDisassembler.h +14 -0
- package/deps/capstone/MCFixedLenDisassembler.h +32 -0
- package/deps/capstone/MCInst.c +270 -0
- package/deps/capstone/MCInst.h +165 -0
- package/deps/capstone/MCInstrDesc.c +41 -0
- package/deps/capstone/MCInstrDesc.h +167 -0
- package/deps/capstone/MCRegisterInfo.c +151 -0
- package/deps/capstone/MCRegisterInfo.h +116 -0
- package/deps/capstone/Mapping.c +254 -0
- package/deps/capstone/Mapping.h +174 -0
- package/deps/capstone/MathExtras.h +442 -0
- package/deps/capstone/SStream.c +181 -0
- package/deps/capstone/SStream.h +40 -0
- package/deps/capstone/arch/AArch64/AArch64AddressingModes.h +945 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.c +77 -0
- package/deps/capstone/arch/AArch64/AArch64BaseInfo.h +585 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.c +2280 -0
- package/deps/capstone/arch/AArch64/AArch64Disassembler.h +18 -0
- package/deps/capstone/arch/AArch64/AArch64GenAsmWriter.inc +26589 -0
- package/deps/capstone/arch/AArch64/AArch64GenDisassemblerTables.inc +27322 -0
- package/deps/capstone/arch/AArch64/AArch64GenInstrInfo.inc +13194 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterInfo.inc +3814 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterName.inc +714 -0
- package/deps/capstone/arch/AArch64/AArch64GenRegisterV.inc +673 -0
- package/deps/capstone/arch/AArch64/AArch64GenSubtargetInfo.inc +229 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands.inc +2863 -0
- package/deps/capstone/arch/AArch64/AArch64GenSystemOperands_enum.inc +21 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.c +3029 -0
- package/deps/capstone/arch/AArch64/AArch64InstPrinter.h +28 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.c +883 -0
- package/deps/capstone/arch/AArch64/AArch64Mapping.h +43 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsn.inc +37790 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnName.inc +1282 -0
- package/deps/capstone/arch/AArch64/AArch64MappingInsnOp.inc +26994 -0
- package/deps/capstone/arch/AArch64/AArch64Module.c +44 -0
- package/deps/capstone/arch/AArch64/AArch64Module.h +12 -0
- package/deps/capstone/arch/ARM/ARMAddressingModes.h +698 -0
- package/deps/capstone/arch/ARM/ARMBaseInfo.h +486 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.c +5763 -0
- package/deps/capstone/arch/ARM/ARMDisassembler.h +18 -0
- package/deps/capstone/arch/ARM/ARMGenAsmWriter.inc +9545 -0
- package/deps/capstone/arch/ARM/ARMGenDisassemblerTables.inc +15185 -0
- package/deps/capstone/arch/ARM/ARMGenInstrInfo.inc +6632 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterInfo.inc +2102 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenRegisterName_digit.inc +231 -0
- package/deps/capstone/arch/ARM/ARMGenSubtargetInfo.inc +162 -0
- package/deps/capstone/arch/ARM/ARMGenSystemRegister.inc +270 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.c +3364 -0
- package/deps/capstone/arch/ARM/ARMInstPrinter.h +43 -0
- package/deps/capstone/arch/ARM/ARMMapping.c +551 -0
- package/deps/capstone/arch/ARM/ARMMapping.h +40 -0
- package/deps/capstone/arch/ARM/ARMMappingInsn.inc +18772 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnName.inc +475 -0
- package/deps/capstone/arch/ARM/ARMMappingInsnOp.inc +10729 -0
- package/deps/capstone/arch/ARM/ARMModule.c +63 -0
- package/deps/capstone/arch/ARM/ARMModule.h +12 -0
- package/deps/capstone/arch/BPF/BPFConstants.h +88 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.c +464 -0
- package/deps/capstone/arch/BPF/BPFDisassembler.h +27 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.c +285 -0
- package/deps/capstone/arch/BPF/BPFInstPrinter.h +16 -0
- package/deps/capstone/arch/BPF/BPFMapping.c +513 -0
- package/deps/capstone/arch/BPF/BPFMapping.h +21 -0
- package/deps/capstone/arch/BPF/BPFModule.c +34 -0
- package/deps/capstone/arch/BPF/BPFModule.h +12 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.c +379 -0
- package/deps/capstone/arch/EVM/EVMDisassembler.h +12 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.c +20 -0
- package/deps/capstone/arch/EVM/EVMInstPrinter.h +17 -0
- package/deps/capstone/arch/EVM/EVMMapping.c +344 -0
- package/deps/capstone/arch/EVM/EVMMapping.h +8 -0
- package/deps/capstone/arch/EVM/EVMMappingInsn.inc +259 -0
- package/deps/capstone/arch/EVM/EVMModule.c +33 -0
- package/deps/capstone/arch/EVM/EVMModule.h +12 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.c +2307 -0
- package/deps/capstone/arch/M680X/M680XDisassembler.h +17 -0
- package/deps/capstone/arch/M680X/M680XDisassemblerInternals.h +57 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.c +360 -0
- package/deps/capstone/arch/M680X/M680XInstPrinter.h +25 -0
- package/deps/capstone/arch/M680X/M680XModule.c +77 -0
- package/deps/capstone/arch/M680X/M680XModule.h +12 -0
- package/deps/capstone/arch/M680X/cpu12.inc +335 -0
- package/deps/capstone/arch/M680X/hcs08.inc +60 -0
- package/deps/capstone/arch/M680X/hd6301.inc +15 -0
- package/deps/capstone/arch/M680X/hd6309.inc +259 -0
- package/deps/capstone/arch/M680X/insn_props.inc +367 -0
- package/deps/capstone/arch/M680X/m6800.inc +277 -0
- package/deps/capstone/arch/M680X/m6801.inc +39 -0
- package/deps/capstone/arch/M680X/m6805.inc +277 -0
- package/deps/capstone/arch/M680X/m6808.inc +91 -0
- package/deps/capstone/arch/M680X/m6809.inc +352 -0
- package/deps/capstone/arch/M680X/m6811.inc +105 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.c +3668 -0
- package/deps/capstone/arch/M68K/M68KDisassembler.h +30 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.c +387 -0
- package/deps/capstone/arch/M68K/M68KInstPrinter.h +21 -0
- package/deps/capstone/arch/M68K/M68KInstructionTable.inc +65540 -0
- package/deps/capstone/arch/M68K/M68KModule.c +42 -0
- package/deps/capstone/arch/M68K/M68KModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.c +544 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassembler.h +22 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXDisassemblerInternals.h +23 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.c +79 -0
- package/deps/capstone/arch/MOS65XX/MOS65XXModule.h +12 -0
- package/deps/capstone/arch/MOS65XX/instruction_info.inc +106 -0
- package/deps/capstone/arch/MOS65XX/m6502.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65816.inc +256 -0
- package/deps/capstone/arch/MOS65XX/m65c02.inc +256 -0
- package/deps/capstone/arch/MOS65XX/mw65c02.inc +256 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.c +1794 -0
- package/deps/capstone/arch/Mips/MipsDisassembler.h +16 -0
- package/deps/capstone/arch/Mips/MipsGenAsmWriter.inc +5725 -0
- package/deps/capstone/arch/Mips/MipsGenDisassemblerTables.inc +6942 -0
- package/deps/capstone/arch/Mips/MipsGenInstrInfo.inc +1805 -0
- package/deps/capstone/arch/Mips/MipsGenRegisterInfo.inc +1679 -0
- package/deps/capstone/arch/Mips/MipsGenSubtargetInfo.inc +52 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.c +424 -0
- package/deps/capstone/arch/Mips/MipsInstPrinter.h +25 -0
- package/deps/capstone/arch/Mips/MipsMapping.c +1070 -0
- package/deps/capstone/arch/Mips/MipsMapping.h +25 -0
- package/deps/capstone/arch/Mips/MipsMappingInsn.inc +9315 -0
- package/deps/capstone/arch/Mips/MipsModule.c +52 -0
- package/deps/capstone/arch/Mips/MipsModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.c +627 -0
- package/deps/capstone/arch/PowerPC/PPCDisassembler.h +17 -0
- package/deps/capstone/arch/PowerPC/PPCGenAsmWriter.inc +11451 -0
- package/deps/capstone/arch/PowerPC/PPCGenDisassemblerTables.inc +6886 -0
- package/deps/capstone/arch/PowerPC/PPCGenInstrInfo.inc +4772 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterInfo.inc +1122 -0
- package/deps/capstone/arch/PowerPC/PPCGenRegisterName.inc +278 -0
- package/deps/capstone/arch/PowerPC/PPCGenSubtargetInfo.inc +90 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.c +1238 -0
- package/deps/capstone/arch/PowerPC/PPCInstPrinter.h +15 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.c +570 -0
- package/deps/capstone/arch/PowerPC/PPCMapping.h +40 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsn.inc +13220 -0
- package/deps/capstone/arch/PowerPC/PPCMappingInsnName.inc +1731 -0
- package/deps/capstone/arch/PowerPC/PPCModule.c +45 -0
- package/deps/capstone/arch/PowerPC/PPCModule.h +12 -0
- package/deps/capstone/arch/PowerPC/PPCPredicates.h +62 -0
- package/deps/capstone/arch/RISCV/RISCVBaseInfo.h +106 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.c +433 -0
- package/deps/capstone/arch/RISCV/RISCVDisassembler.h +18 -0
- package/deps/capstone/arch/RISCV/RISCVGenAsmWriter.inc +2651 -0
- package/deps/capstone/arch/RISCV/RISCVGenDisassemblerTables.inc +1776 -0
- package/deps/capstone/arch/RISCV/RISCVGenInsnNameMaps.inc +275 -0
- package/deps/capstone/arch/RISCV/RISCVGenInstrInfo.inc +470 -0
- package/deps/capstone/arch/RISCV/RISCVGenRegisterInfo.inc +426 -0
- package/deps/capstone/arch/RISCV/RISCVGenSubtargetInfo.inc +33 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.c +447 -0
- package/deps/capstone/arch/RISCV/RISCVInstPrinter.h +24 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.c +366 -0
- package/deps/capstone/arch/RISCV/RISCVMapping.h +22 -0
- package/deps/capstone/arch/RISCV/RISCVMappingInsn.inc +1635 -0
- package/deps/capstone/arch/RISCV/RISCVModule.c +42 -0
- package/deps/capstone/arch/RISCV/RISCVModule.h +12 -0
- package/deps/capstone/arch/SH/SHDisassembler.c +2221 -0
- package/deps/capstone/arch/SH/SHDisassembler.h +19 -0
- package/deps/capstone/arch/SH/SHInsnTable.inc +66 -0
- package/deps/capstone/arch/SH/SHInstPrinter.c +438 -0
- package/deps/capstone/arch/SH/SHInstPrinter.h +23 -0
- package/deps/capstone/arch/SH/SHModule.c +39 -0
- package/deps/capstone/arch/SH/SHModule.h +12 -0
- package/deps/capstone/arch/SH/mktable.rb +390 -0
- package/deps/capstone/arch/Sparc/Sparc.h +63 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.c +500 -0
- package/deps/capstone/arch/Sparc/SparcDisassembler.h +17 -0
- package/deps/capstone/arch/Sparc/SparcGenAsmWriter.inc +5709 -0
- package/deps/capstone/arch/Sparc/SparcGenDisassemblerTables.inc +2028 -0
- package/deps/capstone/arch/Sparc/SparcGenInstrInfo.inc +514 -0
- package/deps/capstone/arch/Sparc/SparcGenRegisterInfo.inc +451 -0
- package/deps/capstone/arch/Sparc/SparcGenSubtargetInfo.inc +27 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.c +446 -0
- package/deps/capstone/arch/Sparc/SparcInstPrinter.h +17 -0
- package/deps/capstone/arch/Sparc/SparcMapping.c +665 -0
- package/deps/capstone/arch/Sparc/SparcMapping.h +34 -0
- package/deps/capstone/arch/Sparc/SparcMappingInsn.inc +2643 -0
- package/deps/capstone/arch/Sparc/SparcModule.c +45 -0
- package/deps/capstone/arch/Sparc/SparcModule.h +12 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.c +484 -0
- package/deps/capstone/arch/SystemZ/SystemZDisassembler.h +17 -0
- package/deps/capstone/arch/SystemZ/SystemZGenAsmWriter.inc +11575 -0
- package/deps/capstone/arch/SystemZ/SystemZGenDisassemblerTables.inc +10262 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInsnNameMaps.inc +2348 -0
- package/deps/capstone/arch/SystemZ/SystemZGenInstrInfo.inc +2820 -0
- package/deps/capstone/arch/SystemZ/SystemZGenRegisterInfo.inc +741 -0
- package/deps/capstone/arch/SystemZ/SystemZGenSubtargetInfo.inc +49 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.c +433 -0
- package/deps/capstone/arch/SystemZ/SystemZInstPrinter.h +15 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.c +195 -0
- package/deps/capstone/arch/SystemZ/SystemZMCTargetDesc.h +51 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.c +479 -0
- package/deps/capstone/arch/SystemZ/SystemZMapping.h +23 -0
- package/deps/capstone/arch/SystemZ/SystemZMappingInsn.inc +14175 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.c +44 -0
- package/deps/capstone/arch/SystemZ/SystemZModule.h +12 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.c +628 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xDisassembler.h +19 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenAsmWriter.inc +684 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc +1352 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenInstrInfo.inc +298 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc +277 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.c +572 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xInstPrinter.h +15 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.c +1926 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xMapping.h +26 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.c +39 -0
- package/deps/capstone/arch/TMS320C64x/TMS320C64xModule.h +12 -0
- package/deps/capstone/arch/TriCore/TriCore.td +134 -0
- package/deps/capstone/arch/TriCore/TriCoreCallingConv.td +61 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.c +1655 -0
- package/deps/capstone/arch/TriCore/TriCoreDisassembler.h +18 -0
- package/deps/capstone/arch/TriCore/TriCoreGenAsmWriter.inc +3691 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSFeatureName.inc +22 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsn.inc +8938 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnName.inc +404 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSMappingInsnOp.inc +7994 -0
- package/deps/capstone/arch/TriCore/TriCoreGenCSOpGroup.inc +32 -0
- package/deps/capstone/arch/TriCore/TriCoreGenDisassemblerTables.inc +4044 -0
- package/deps/capstone/arch/TriCore/TriCoreGenInstrInfo.inc +2693 -0
- package/deps/capstone/arch/TriCore/TriCoreGenRegisterInfo.inc +295 -0
- package/deps/capstone/arch/TriCore/TriCoreGenSubtargetInfo.inc +40 -0
- package/deps/capstone/arch/TriCore/TriCoreInstPrinter.c +488 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrFormats.td +773 -0
- package/deps/capstone/arch/TriCore/TriCoreInstrInfo.td +1873 -0
- package/deps/capstone/arch/TriCore/TriCoreLinkage.h +21 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.c +241 -0
- package/deps/capstone/arch/TriCore/TriCoreMapping.h +32 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.c +44 -0
- package/deps/capstone/arch/TriCore/TriCoreModule.h +11 -0
- package/deps/capstone/arch/TriCore/TriCoreRegisterInfo.td +153 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.c +1009 -0
- package/deps/capstone/arch/WASM/WASMDisassembler.h +12 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.c +47 -0
- package/deps/capstone/arch/WASM/WASMInstPrinter.h +18 -0
- package/deps/capstone/arch/WASM/WASMMapping.c +333 -0
- package/deps/capstone/arch/WASM/WASMMapping.h +9 -0
- package/deps/capstone/arch/WASM/WASMModule.c +33 -0
- package/deps/capstone/arch/WASM/WASMModule.h +12 -0
- package/deps/capstone/arch/X86/X86ATTInstPrinter.c +997 -0
- package/deps/capstone/arch/X86/X86BaseInfo.h +50 -0
- package/deps/capstone/arch/X86/X86Disassembler.c +1033 -0
- package/deps/capstone/arch/X86/X86Disassembler.h +28 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.c +2358 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoder.h +725 -0
- package/deps/capstone/arch/X86/X86DisassemblerDecoderCommon.h +483 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter.inc +49199 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1.inc +33196 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter1_reduce.inc +2531 -0
- package/deps/capstone/arch/X86/X86GenAsmWriter_reduce.inc +2855 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables.inc +112961 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables2.inc +102151 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce.inc +28047 -0
- package/deps/capstone/arch/X86/X86GenDisassemblerTables_reduce2.inc +18827 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo.inc +15158 -0
- package/deps/capstone/arch/X86/X86GenInstrInfo_reduce.inc +1564 -0
- package/deps/capstone/arch/X86/X86GenRegisterInfo.inc +1549 -0
- package/deps/capstone/arch/X86/X86GenRegisterName.inc +292 -0
- package/deps/capstone/arch/X86/X86GenRegisterName1.inc +291 -0
- package/deps/capstone/arch/X86/X86ImmSize.inc +335 -0
- package/deps/capstone/arch/X86/X86InstPrinter.h +26 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.c +116 -0
- package/deps/capstone/arch/X86/X86InstPrinterCommon.h +16 -0
- package/deps/capstone/arch/X86/X86IntelInstPrinter.c +1061 -0
- package/deps/capstone/arch/X86/X86Lookup16.inc +16874 -0
- package/deps/capstone/arch/X86/X86Lookup16_reduce.inc +2308 -0
- package/deps/capstone/arch/X86/X86Mapping.c +2266 -0
- package/deps/capstone/arch/X86/X86Mapping.h +96 -0
- package/deps/capstone/arch/X86/X86MappingInsn.inc +105977 -0
- package/deps/capstone/arch/X86/X86MappingInsnName.inc +1527 -0
- package/deps/capstone/arch/X86/X86MappingInsnName_reduce.inc +348 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp.inc +75700 -0
- package/deps/capstone/arch/X86/X86MappingInsnOp_reduce.inc +7729 -0
- package/deps/capstone/arch/X86/X86MappingInsn_reduce.inc +10819 -0
- package/deps/capstone/arch/X86/X86MappingReg.inc +280 -0
- package/deps/capstone/arch/X86/X86Module.c +94 -0
- package/deps/capstone/arch/X86/X86Module.h +12 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.c +794 -0
- package/deps/capstone/arch/XCore/XCoreDisassembler.h +17 -0
- package/deps/capstone/arch/XCore/XCoreGenAsmWriter.inc +772 -0
- package/deps/capstone/arch/XCore/XCoreGenDisassemblerTables.inc +853 -0
- package/deps/capstone/arch/XCore/XCoreGenInstrInfo.inc +267 -0
- package/deps/capstone/arch/XCore/XCoreGenRegisterInfo.inc +110 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.c +250 -0
- package/deps/capstone/arch/XCore/XCoreInstPrinter.h +18 -0
- package/deps/capstone/arch/XCore/XCoreMapping.c +297 -0
- package/deps/capstone/arch/XCore/XCoreMapping.h +26 -0
- package/deps/capstone/arch/XCore/XCoreMappingInsn.inc +1287 -0
- package/deps/capstone/arch/XCore/XCoreModule.c +41 -0
- package/deps/capstone/arch/XCore/XCoreModule.h +12 -0
- package/deps/capstone/cs.c +1664 -0
- package/deps/capstone/cs_priv.h +101 -0
- package/deps/capstone/cs_simple_types.h +886 -0
- package/deps/capstone/include/capstone/arm.h +991 -0
- package/deps/capstone/include/capstone/arm64.h +3159 -0
- package/deps/capstone/include/capstone/bpf.h +209 -0
- package/deps/capstone/include/capstone/capstone.h +875 -0
- package/deps/capstone/include/capstone/evm.h +188 -0
- package/deps/capstone/include/capstone/m680x.h +537 -0
- package/deps/capstone/include/capstone/m68k.h +613 -0
- package/deps/capstone/include/capstone/mips.h +956 -0
- package/deps/capstone/include/capstone/mos65xx.h +204 -0
- package/deps/capstone/include/capstone/platform.h +122 -0
- package/deps/capstone/include/capstone/ppc.h +2108 -0
- package/deps/capstone/include/capstone/riscv.h +531 -0
- package/deps/capstone/include/capstone/sh.h +465 -0
- package/deps/capstone/include/capstone/sparc.h +520 -0
- package/deps/capstone/include/capstone/systemz.h +2601 -0
- package/deps/capstone/include/capstone/tms320c64x.h +359 -0
- package/deps/capstone/include/capstone/tricore.h +567 -0
- package/deps/capstone/include/capstone/wasm.h +250 -0
- package/deps/capstone/include/capstone/x86.h +1986 -0
- package/deps/capstone/include/capstone/xcore.h +235 -0
- package/deps/capstone/include/platform.h +110 -0
- package/deps/capstone/include/windowsce/intrin.h +12 -0
- package/deps/capstone/include/windowsce/stdint.h +133 -0
- package/deps/capstone/utils.c +140 -0
- package/deps/capstone/utils.h +54 -0
- package/index.d.ts +448 -0
- package/index.js +64 -0
- package/index.mjs +25 -0
- package/package.json +82 -0
- package/prebuilds/win32-x64/hexcore-capstone.node +0 -0
- package/src/capstone_wrapper.cpp +910 -0
- package/src/capstone_wrapper.h +147 -0
- package/src/disasm_async_worker.h +215 -0
- package/src/main.cpp +145 -0
|
@@ -0,0 +1,19 @@
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1
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+
/* Capstone Disassembly Engine */
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2
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+
/* By Nguyen Anh Quynh, 2018 */
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3
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+
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4
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+
#ifndef CS_SHDISASSEMBLER_H
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5
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+
#define CS_SHDISASSEMBLER_H
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6
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+
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7
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+
#include "../../MCInst.h"
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8
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+
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9
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+
typedef struct sh_info {
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10
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+
cs_sh op;
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11
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+
} sh_info;
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12
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+
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13
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+
bool SH_getInstruction(csh ud, const uint8_t *code, size_t code_len,
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14
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+
MCInst *instr, uint16_t *size, uint64_t address, void *info);
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15
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+
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16
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+
void SH_reg_access(const cs_insn *insn,
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17
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+
cs_regs regs_read, uint8_t *regs_read_count,
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18
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+
cs_regs regs_write, uint8_t *regs_write_count);
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19
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+
#endif
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@@ -0,0 +1,66 @@
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1
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+
bool (*decode[])(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode, sh_info *info, cs_detail *detail) = {
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2
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+
/// 00000000
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3
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+
NULL, NULL, opSTC, op0xx3, opMOV_B, opMOV_W, opMOV_L, opMUL_L,
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4
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+
/// 00001000
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5
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+
op0xx8, op0xx9, op0xxa, op0xxb, opMOV_B, opMOV_W, opMOV_L, opMAC_L,
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6
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+
/// 00010000
|
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7
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+
opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp,
|
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8
|
+
/// 00011000
|
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9
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+
opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp,
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10
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+
/// 00100000
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11
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+
opMOV_rind, opMOV_rind, opMOV_rind, NULL, opMOV_rpd, opMOV_rpd, opMOV_rpd, opDIV0S,
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12
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+
/// 00101000
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13
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+
opTST, opAND, opXOR, opOR, opCMP_STR, opXTRCT, opMULU_W, opMULS_W,
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14
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+
/// 00110000
|
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15
|
+
opCMP_EQ, NULL, opCMP_HS, opCMP_GE, opDIV1, opDMULU_L, opCMP_HI, opCMP_GT,
|
|
16
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+
/// 00111000
|
|
17
|
+
opSUB, NULL, opSUBC, opSUBV, opADD_r, opDMULS_L, opADDC, opADDV,
|
|
18
|
+
/// 01000000
|
|
19
|
+
op4xx0, op4xx1, op4xx2, opSTC_L, op4xx4, op4xx5, op4xx6, opLDC_L,
|
|
20
|
+
/// 01001000
|
|
21
|
+
op4xx8, op4xx9, op4xxa, op4xxb, opSHAD, opSHLD, opLDC, opMAC_W,
|
|
22
|
+
/// 01010000
|
|
23
|
+
opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp,
|
|
24
|
+
/// 01011000
|
|
25
|
+
opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp, opMOV_L_dsp,
|
|
26
|
+
/// 01100000
|
|
27
|
+
opMOV_rind, opMOV_rind, opMOV_rind, opMOV, opMOV_rpi, opMOV_rpi, opMOV_rpi, opNOT,
|
|
28
|
+
/// 01101000
|
|
29
|
+
opSWAP_B, opSWAP_W, opNEGC, opNEG, opEXTU_B, opEXTU_W, opEXTS_B, opEXTS_W,
|
|
30
|
+
/// 01110000
|
|
31
|
+
opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i,
|
|
32
|
+
/// 01111000
|
|
33
|
+
opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i, opADD_i,
|
|
34
|
+
/// 10000000
|
|
35
|
+
opMOV_BW_dsp, opMOV_BW_dsp, opSETRC, opJSR_N, opMOV_BW_dsp, opMOV_BW_dsp, op86xx, op87xx,
|
|
36
|
+
/// 10001000
|
|
37
|
+
opCMP_EQi, opBT, opLDRC, opBF, opLDRS, opBT_S, opLDRE, opBF_S,
|
|
38
|
+
/// 10010000
|
|
39
|
+
opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc,
|
|
40
|
+
/// 10011000
|
|
41
|
+
opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc,
|
|
42
|
+
/// 10100000
|
|
43
|
+
opBRA, opBRA, opBRA, opBRA, opBRA, opBRA, opBRA, opBRA,
|
|
44
|
+
/// 10101000
|
|
45
|
+
opBRA, opBRA, opBRA, opBRA, opBRA, opBRA, opBRA, opBRA,
|
|
46
|
+
/// 10110000
|
|
47
|
+
opBSR, opBSR, opBSR, opBSR, opBSR, opBSR, opBSR, opBSR,
|
|
48
|
+
/// 10111000
|
|
49
|
+
opBSR, opBSR, opBSR, opBSR, opBSR, opBSR, opBSR, opBSR,
|
|
50
|
+
/// 11000000
|
|
51
|
+
opMOV_gbr, opMOV_gbr, opMOV_gbr, opTRAPA, opMOV_gbr, opMOV_gbr, opMOV_gbr, opMOVA,
|
|
52
|
+
/// 11001000
|
|
53
|
+
opTST_i, opAND_i, opXOR_i, opOR_i, opTST_B, opAND_B, opXOR_B, opOR_B,
|
|
54
|
+
/// 11010000
|
|
55
|
+
opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc,
|
|
56
|
+
/// 11011000
|
|
57
|
+
opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc, opMOV_pc,
|
|
58
|
+
/// 11100000
|
|
59
|
+
opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i,
|
|
60
|
+
/// 11101000
|
|
61
|
+
opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i, opMOV_i,
|
|
62
|
+
/// 11110000
|
|
63
|
+
opFADD, opFSUB, opFMUL, opFDIV, opFCMP_EQ, opFCMP_GT, opfxx6, opfxx7,
|
|
64
|
+
/// 11111000
|
|
65
|
+
opfxx8, opfxx9, opfxxa, opfxxb, opFMOV, opfxxd, opFMAC, NULL,
|
|
66
|
+
};
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|
@@ -0,0 +1,438 @@
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|
|
1
|
+
/* Capstone Disassembly Engine */
|
|
2
|
+
/* By Yoshinori Sato, 2022 */
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|
3
|
+
|
|
4
|
+
#include <string.h>
|
|
5
|
+
#include "SHInstPrinter.h"
|
|
6
|
+
|
|
7
|
+
|
|
8
|
+
#ifndef CAPSTONE_DIET
|
|
9
|
+
static const char* const s_reg_names[] = {
|
|
10
|
+
"invalid",
|
|
11
|
+
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
|
|
12
|
+
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
|
|
13
|
+
"r0_bank", "r1_bank", "r2_bank", "r3_bank",
|
|
14
|
+
"r4_bank", "r5_bank", "r6_bank", "r7_bank",
|
|
15
|
+
"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
|
|
16
|
+
"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
|
|
17
|
+
"dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
|
|
18
|
+
"xd0", "xd2", "xd4", "xd6", "xd8", "xd10", "xd12", "xd14",
|
|
19
|
+
"xf0", "xf1", "xf2", "xf3", "xf4", "xf5", "xf6", "xf7",
|
|
20
|
+
"xf8", "xf9", "xf10", "xf11", "xf12", "xf13", "xf14", "xf15",
|
|
21
|
+
"fv0", "fv4", "fv8", "fv12",
|
|
22
|
+
"xmtrx",
|
|
23
|
+
"pc", "pr", "mach", "macl",
|
|
24
|
+
"sr", "gbr", "ssr", "spc", "sgr", "dbr", "vbr", "tbr",
|
|
25
|
+
"rs", "re", "mod",
|
|
26
|
+
"fpul", "fpscr",
|
|
27
|
+
"x0", "x1", "y0", "y1", "a0", "a1", "a0g", "a1g", "m0", "m1",
|
|
28
|
+
"dsr",
|
|
29
|
+
"0x0", "0x1", "0x2", "0x3", "0x4", "0x5", "0x6", "0x7",
|
|
30
|
+
"0x8", "0x9", "0xa", "0xb", "0xc", "0xd", "0xe", "0xf",
|
|
31
|
+
};
|
|
32
|
+
#endif
|
|
33
|
+
|
|
34
|
+
const char* SH_reg_name(csh handle, unsigned int reg)
|
|
35
|
+
{
|
|
36
|
+
#ifdef CAPSTONE_DIET
|
|
37
|
+
return NULL;
|
|
38
|
+
#else
|
|
39
|
+
if (reg >= ARR_SIZE(s_reg_names)) {
|
|
40
|
+
return NULL;
|
|
41
|
+
}
|
|
42
|
+
return s_reg_names[(int)reg];
|
|
43
|
+
#endif
|
|
44
|
+
}
|
|
45
|
+
|
|
46
|
+
|
|
47
|
+
void SH_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id)
|
|
48
|
+
{
|
|
49
|
+
insn->id = id; // These id's matches for sh
|
|
50
|
+
}
|
|
51
|
+
|
|
52
|
+
#ifndef CAPSTONE_DIET
|
|
53
|
+
static const char* const s_insn_names[] = {
|
|
54
|
+
"unknwon",
|
|
55
|
+
"add", "add", "addc", "addv", "and",
|
|
56
|
+
"band", "bandnot", "bclr",
|
|
57
|
+
"bf", "bf/s", "bld", "bldnot", "bor", "bornot", "bra", "braf",
|
|
58
|
+
"bset", "bsr", "bsrf", "bst", "bt", "bt/s", "bxor",
|
|
59
|
+
"clips", "clipu",
|
|
60
|
+
"clrdmxy",
|
|
61
|
+
"clrmac", "clrs", "clrt",
|
|
62
|
+
"cmp/eq", "cmp/ge", "cmp/gt", "cmp/hi", "cmp/hs", "cmp/pl",
|
|
63
|
+
"cmp/pz", "cmp/str",
|
|
64
|
+
"div0s", "div0u", "div1",
|
|
65
|
+
"divs", "divu",
|
|
66
|
+
"dmuls.l", "dmulu.l",
|
|
67
|
+
"dt",
|
|
68
|
+
"exts", "exts", "extu", "extu",
|
|
69
|
+
"fabs", "fadd", "fcmp/eq", "fcmp/gt",
|
|
70
|
+
"fcnvds", "fcnvsd", "fdiv",
|
|
71
|
+
"fipr", "fldi0", "fldi1", "flds", "float",
|
|
72
|
+
"fmac", "fmov", "fmul", "fneg", "fpchg",
|
|
73
|
+
"frchg", "fsca", "fschg", "fsqrt", "fsrra",
|
|
74
|
+
"fsts", "fsub", "ftrc", "ftrv",
|
|
75
|
+
"icbi",
|
|
76
|
+
"jmp", "jsr", "jsr/n",
|
|
77
|
+
"ldbank",
|
|
78
|
+
"ldc", "ldrc", "ldre", "ldrs", "lds",
|
|
79
|
+
"ldtlb",
|
|
80
|
+
"mac.l", "mac.w",
|
|
81
|
+
"mov", "mova", "movca", "movco", "movi20", "movi20s",
|
|
82
|
+
"movli", "movml", "movmu", "movrt", "movt", "movu", "movua",
|
|
83
|
+
"mul.l", "mulr", "muls", "mulu",
|
|
84
|
+
"neg", "negc",
|
|
85
|
+
"nop",
|
|
86
|
+
"not", "nott",
|
|
87
|
+
"ocbi", "ocbp", "ocbwb",
|
|
88
|
+
"or",
|
|
89
|
+
"pref", "prefi",
|
|
90
|
+
"resbank",
|
|
91
|
+
"rotcl", "rotcr", "rotl", "rotr",
|
|
92
|
+
"rte", "rts", "rts/n", "rtv/n",
|
|
93
|
+
"setdmx", "setdmy", "setrc",
|
|
94
|
+
"sets", "sett",
|
|
95
|
+
"shad", "shal", "shar", "shld", "shll",
|
|
96
|
+
"shll16", "shll2", "shll8",
|
|
97
|
+
"shlr", "shlr16", "shlr2", "shlr8",
|
|
98
|
+
"sleep",
|
|
99
|
+
"stbank",
|
|
100
|
+
"stc", "sts",
|
|
101
|
+
"sub", "subc", "subv",
|
|
102
|
+
"swap", "swap",
|
|
103
|
+
"synco",
|
|
104
|
+
"tas",
|
|
105
|
+
"trapa",
|
|
106
|
+
"tst",
|
|
107
|
+
"xor",
|
|
108
|
+
"xtrct",
|
|
109
|
+
};
|
|
110
|
+
#endif
|
|
111
|
+
|
|
112
|
+
const char* SH_insn_name(csh handle, unsigned int id)
|
|
113
|
+
{
|
|
114
|
+
#ifdef CAPSTONE_DIET
|
|
115
|
+
return NULL;
|
|
116
|
+
#else
|
|
117
|
+
if (id >= ARR_SIZE(s_insn_names)) {
|
|
118
|
+
return NULL;
|
|
119
|
+
}
|
|
120
|
+
return s_insn_names[id];
|
|
121
|
+
#endif
|
|
122
|
+
}
|
|
123
|
+
|
|
124
|
+
#ifndef CAPSTONE_DIET
|
|
125
|
+
#endif
|
|
126
|
+
|
|
127
|
+
#ifndef CAPSTONE_DIET
|
|
128
|
+
static void print_dsp_double(SStream *O, sh_info *info, int xy)
|
|
129
|
+
{
|
|
130
|
+
char suffix_xy = 'x' + xy;
|
|
131
|
+
int i;
|
|
132
|
+
if (info->op.operands[xy].dsp.insn == SH_INS_DSP_NOP) {
|
|
133
|
+
if ((info->op.operands[0].dsp.insn == SH_INS_DSP_NOP) &&
|
|
134
|
+
(info->op.operands[1].dsp.insn == SH_INS_DSP_NOP)) {
|
|
135
|
+
SStream_concat(O, "nop%c", suffix_xy);
|
|
136
|
+
}
|
|
137
|
+
} else {
|
|
138
|
+
SStream_concat(O, "mov%c", suffix_xy);
|
|
139
|
+
switch(info->op.operands[xy].dsp.size) {
|
|
140
|
+
case 16:
|
|
141
|
+
SStream_concat0(O, ".w ");
|
|
142
|
+
break;
|
|
143
|
+
case 32:
|
|
144
|
+
SStream_concat0(O, ".l ");
|
|
145
|
+
break;
|
|
146
|
+
}
|
|
147
|
+
|
|
148
|
+
for (i = 0; i < 2; i++) {
|
|
149
|
+
switch(info->op.operands[xy].dsp.operand[i]) {
|
|
150
|
+
default:
|
|
151
|
+
break;
|
|
152
|
+
case SH_OP_DSP_REG_IND:
|
|
153
|
+
SStream_concat(O, "@%s", s_reg_names[info->op.operands[xy].dsp.r[i]]);
|
|
154
|
+
break;
|
|
155
|
+
case SH_OP_DSP_REG_POST:
|
|
156
|
+
SStream_concat(O, "@%s+", s_reg_names[info->op.operands[xy].dsp.r[i]]);
|
|
157
|
+
break;
|
|
158
|
+
case SH_OP_DSP_REG_INDEX:
|
|
159
|
+
SStream_concat(O, "@%s+%s", s_reg_names[info->op.operands[xy].dsp.r[i]], s_reg_names[SH_REG_R8 + xy]);
|
|
160
|
+
break;
|
|
161
|
+
case SH_OP_DSP_REG:
|
|
162
|
+
SStream_concat(O, "%s", s_reg_names[info->op.operands[xy].dsp.r[i]]);
|
|
163
|
+
break;
|
|
164
|
+
}
|
|
165
|
+
if (i == 0)
|
|
166
|
+
SStream_concat0(O, ",");
|
|
167
|
+
}
|
|
168
|
+
}
|
|
169
|
+
if (xy == 0)
|
|
170
|
+
SStream_concat0(O, " ");
|
|
171
|
+
}
|
|
172
|
+
|
|
173
|
+
static const char *s_dsp_insns[] = {
|
|
174
|
+
"invalid",
|
|
175
|
+
"nop",
|
|
176
|
+
"mov",
|
|
177
|
+
"pshl",
|
|
178
|
+
"psha",
|
|
179
|
+
"pmuls",
|
|
180
|
+
"pclr_pmuls",
|
|
181
|
+
"psub_pmuls",
|
|
182
|
+
"padd_pmuls",
|
|
183
|
+
"psubc",
|
|
184
|
+
"paddc",
|
|
185
|
+
"pcmp",
|
|
186
|
+
"pabs",
|
|
187
|
+
"prnd",
|
|
188
|
+
"psub",
|
|
189
|
+
"psub",
|
|
190
|
+
"padd",
|
|
191
|
+
"pand",
|
|
192
|
+
"pxor",
|
|
193
|
+
"por",
|
|
194
|
+
"pdec",
|
|
195
|
+
"pinc",
|
|
196
|
+
"pclr",
|
|
197
|
+
"pdmsb",
|
|
198
|
+
"pneg",
|
|
199
|
+
"pcopy",
|
|
200
|
+
"psts",
|
|
201
|
+
"plds",
|
|
202
|
+
"pswap",
|
|
203
|
+
"pwad",
|
|
204
|
+
"pwsb",
|
|
205
|
+
};
|
|
206
|
+
|
|
207
|
+
static void print_dsp(SStream *O, sh_info *info)
|
|
208
|
+
{
|
|
209
|
+
int i;
|
|
210
|
+
switch(info->op.op_count) {
|
|
211
|
+
case 1:
|
|
212
|
+
// single transfer
|
|
213
|
+
SStream_concat0(O, "movs");
|
|
214
|
+
switch(info->op.operands[0].dsp.size) {
|
|
215
|
+
case 16:
|
|
216
|
+
SStream_concat0(O, ".w ");
|
|
217
|
+
break;
|
|
218
|
+
case 32:
|
|
219
|
+
SStream_concat0(O, ".l ");
|
|
220
|
+
break;
|
|
221
|
+
}
|
|
222
|
+
for (i = 0; i < 2; i++) {
|
|
223
|
+
switch(info->op.operands[0].dsp.operand[i]) {
|
|
224
|
+
default:
|
|
225
|
+
break;
|
|
226
|
+
case SH_OP_DSP_REG_PRE:
|
|
227
|
+
SStream_concat(O, "@-%s", s_reg_names[info->op.operands[0].dsp.r[i]]);
|
|
228
|
+
break;
|
|
229
|
+
case SH_OP_DSP_REG_IND:
|
|
230
|
+
SStream_concat(O, "@%s", s_reg_names[info->op.operands[0].dsp.r[i]]);
|
|
231
|
+
break;
|
|
232
|
+
case SH_OP_DSP_REG_POST:
|
|
233
|
+
SStream_concat(O, "@%s+", s_reg_names[info->op.operands[0].dsp.r[i]]);
|
|
234
|
+
break;
|
|
235
|
+
case SH_OP_DSP_REG_INDEX:
|
|
236
|
+
SStream_concat(O, "@%s+%s", s_reg_names[info->op.operands[0].dsp.r[i]],s_reg_names[SH_REG_R8]);
|
|
237
|
+
break;
|
|
238
|
+
case SH_OP_DSP_REG:
|
|
239
|
+
SStream_concat(O, "%s", s_reg_names[info->op.operands[0].dsp.r[i]]);
|
|
240
|
+
}
|
|
241
|
+
if (i == 0)
|
|
242
|
+
SStream_concat0(O, ",");
|
|
243
|
+
}
|
|
244
|
+
break;
|
|
245
|
+
case 2: // Double transfer
|
|
246
|
+
print_dsp_double(O, info, 0);
|
|
247
|
+
print_dsp_double(O, info, 1);
|
|
248
|
+
break;
|
|
249
|
+
case 3: // Parallel
|
|
250
|
+
switch(info->op.operands[2].dsp.cc) {
|
|
251
|
+
default:
|
|
252
|
+
break;
|
|
253
|
+
case SH_DSP_CC_DCT:
|
|
254
|
+
SStream_concat0(O,"dct ");
|
|
255
|
+
break;
|
|
256
|
+
case SH_DSP_CC_DCF:
|
|
257
|
+
SStream_concat0(O,"dcf ");
|
|
258
|
+
break;
|
|
259
|
+
}
|
|
260
|
+
switch(info->op.operands[2].dsp.insn) {
|
|
261
|
+
case SH_INS_DSP_PSUB_PMULS:
|
|
262
|
+
case SH_INS_DSP_PADD_PMULS:
|
|
263
|
+
switch(info->op.operands[2].dsp.insn) {
|
|
264
|
+
default:
|
|
265
|
+
break;
|
|
266
|
+
case SH_INS_DSP_PSUB_PMULS:
|
|
267
|
+
SStream_concat0(O, "psub ");
|
|
268
|
+
break;
|
|
269
|
+
case SH_INS_DSP_PADD_PMULS:
|
|
270
|
+
SStream_concat0(O, "padd ");
|
|
271
|
+
break;
|
|
272
|
+
}
|
|
273
|
+
for (i = 0; i < 6; i++) {
|
|
274
|
+
SStream_concat(O, "%s", s_reg_names[info->op.operands[2].dsp.r[i]]);
|
|
275
|
+
if ((i % 3) < 2)
|
|
276
|
+
SStream_concat0(O, ",");
|
|
277
|
+
if (i == 2)
|
|
278
|
+
SStream_concat(O, " %s ", s_dsp_insns[SH_INS_DSP_PMULS]);
|
|
279
|
+
}
|
|
280
|
+
break;
|
|
281
|
+
case SH_INS_DSP_PCLR_PMULS:
|
|
282
|
+
SStream_concat0(O, s_dsp_insns[SH_INS_DSP_PCLR]);
|
|
283
|
+
SStream_concat(O, " %s ", s_reg_names[info->op.operands[2].dsp.r[3]]);
|
|
284
|
+
SStream_concat(O, "%s ", s_dsp_insns[SH_INS_DSP_PMULS]);
|
|
285
|
+
for (i = 0; i < 3; i++) {
|
|
286
|
+
SStream_concat(O, "%s", s_reg_names[info->op.operands[2].dsp.r[i]]);
|
|
287
|
+
if (i < 2)
|
|
288
|
+
SStream_concat0(O, ",");
|
|
289
|
+
}
|
|
290
|
+
break;
|
|
291
|
+
|
|
292
|
+
default:
|
|
293
|
+
SStream_concat0(O, s_dsp_insns[info->op.operands[2].dsp.insn]);
|
|
294
|
+
SStream_concat0(O, " ");
|
|
295
|
+
for (i = 0; i < 3; i++) {
|
|
296
|
+
if (info->op.operands[2].dsp.r[i] == SH_REG_INVALID) {
|
|
297
|
+
if (i == 0) {
|
|
298
|
+
SStream_concat(O, "#%d", info->op.operands[2].dsp.imm);
|
|
299
|
+
}
|
|
300
|
+
} else
|
|
301
|
+
SStream_concat(O, "%s", s_reg_names[info->op.operands[2].dsp.r[i]]);
|
|
302
|
+
if (i < 2 && info->op.operands[2].dsp.r[i + 1] != SH_REG_INVALID)
|
|
303
|
+
SStream_concat0(O, ",");
|
|
304
|
+
}
|
|
305
|
+
}
|
|
306
|
+
|
|
307
|
+
if (info->op.operands[0].dsp.insn != SH_INS_DSP_NOP) {
|
|
308
|
+
SStream_concat0(O, " ");
|
|
309
|
+
print_dsp_double(O, info, 0);
|
|
310
|
+
}
|
|
311
|
+
if (info->op.operands[1].dsp.insn != SH_INS_DSP_NOP) {
|
|
312
|
+
SStream_concat0(O, " ");
|
|
313
|
+
print_dsp_double(O, info, 1);
|
|
314
|
+
}
|
|
315
|
+
break;
|
|
316
|
+
}
|
|
317
|
+
}
|
|
318
|
+
|
|
319
|
+
static void PrintMemop(SStream *O, sh_op_mem *op) {
|
|
320
|
+
switch(op->address) {
|
|
321
|
+
case SH_OP_MEM_INVALID:
|
|
322
|
+
break;
|
|
323
|
+
case SH_OP_MEM_REG_IND:
|
|
324
|
+
SStream_concat(O, "@%s", s_reg_names[op->reg]);
|
|
325
|
+
break;
|
|
326
|
+
case SH_OP_MEM_REG_POST:
|
|
327
|
+
SStream_concat(O, "@%s+", s_reg_names[op->reg]);
|
|
328
|
+
break;
|
|
329
|
+
case SH_OP_MEM_REG_PRE:
|
|
330
|
+
SStream_concat(O, "@-%s", s_reg_names[op->reg]);
|
|
331
|
+
break;
|
|
332
|
+
case SH_OP_MEM_REG_DISP:
|
|
333
|
+
SStream_concat(O, "@(%d,%s)", op->disp, s_reg_names[op->reg]);
|
|
334
|
+
break;
|
|
335
|
+
case SH_OP_MEM_REG_R0: /// <= R0 indexed
|
|
336
|
+
SStream_concat(O, "@(%s,%s)",
|
|
337
|
+
s_reg_names[SH_REG_R0], s_reg_names[op->reg]);
|
|
338
|
+
break;
|
|
339
|
+
case SH_OP_MEM_GBR_DISP: /// <= GBR based displaysment
|
|
340
|
+
SStream_concat(O, "@(%d,%s)",
|
|
341
|
+
op->disp, s_reg_names[SH_REG_GBR]);
|
|
342
|
+
break;
|
|
343
|
+
case SH_OP_MEM_GBR_R0: /// <= GBR based R0 indexed
|
|
344
|
+
SStream_concat(O, "@(%s,%s)",
|
|
345
|
+
s_reg_names[SH_REG_R0], s_reg_names[SH_REG_GBR]);
|
|
346
|
+
break;
|
|
347
|
+
case SH_OP_MEM_PCR: /// <= PC relative
|
|
348
|
+
SStream_concat(O, "0x%x", op->disp);
|
|
349
|
+
break;
|
|
350
|
+
case SH_OP_MEM_TBR_DISP: /// <= GBR based displaysment
|
|
351
|
+
SStream_concat(O, "@@(%d,%s)",
|
|
352
|
+
op->disp, s_reg_names[SH_REG_TBR]);
|
|
353
|
+
break;
|
|
354
|
+
}
|
|
355
|
+
}
|
|
356
|
+
#endif
|
|
357
|
+
|
|
358
|
+
void SH_printInst(MCInst* MI, SStream* O, void* PrinterInfo)
|
|
359
|
+
{
|
|
360
|
+
#ifndef CAPSTONE_DIET
|
|
361
|
+
sh_info *info = (sh_info *)PrinterInfo;
|
|
362
|
+
int i;
|
|
363
|
+
int imm;
|
|
364
|
+
|
|
365
|
+
if (MI->Opcode == SH_INS_DSP) {
|
|
366
|
+
print_dsp(O, info);
|
|
367
|
+
return;
|
|
368
|
+
}
|
|
369
|
+
|
|
370
|
+
SStream_concat0(O, (char*)s_insn_names[MI->Opcode]);
|
|
371
|
+
switch(info->op.size) {
|
|
372
|
+
case 8:
|
|
373
|
+
SStream_concat0(O, ".b");
|
|
374
|
+
break;
|
|
375
|
+
case 16:
|
|
376
|
+
SStream_concat0(O, ".w");
|
|
377
|
+
break;
|
|
378
|
+
case 32:
|
|
379
|
+
SStream_concat0(O, ".l");
|
|
380
|
+
break;
|
|
381
|
+
case 64:
|
|
382
|
+
SStream_concat0(O, ".d");
|
|
383
|
+
break;
|
|
384
|
+
}
|
|
385
|
+
SStream_concat0(O, " ");
|
|
386
|
+
for (i = 0; i < info->op.op_count; i++) {
|
|
387
|
+
switch(info->op.operands[i].type) {
|
|
388
|
+
case SH_OP_INVALID:
|
|
389
|
+
break;
|
|
390
|
+
case SH_OP_REG:
|
|
391
|
+
SStream_concat0(O, s_reg_names[info->op.operands[i].reg]);
|
|
392
|
+
break;
|
|
393
|
+
case SH_OP_IMM:
|
|
394
|
+
imm = info->op.operands[i].imm;
|
|
395
|
+
SStream_concat(O, "#%d", imm);
|
|
396
|
+
break;
|
|
397
|
+
case SH_OP_MEM:
|
|
398
|
+
PrintMemop(O, &info->op.operands[i].mem);
|
|
399
|
+
break;
|
|
400
|
+
}
|
|
401
|
+
if (i < (info->op.op_count - 1)) {
|
|
402
|
+
SStream_concat0(O, ",");
|
|
403
|
+
}
|
|
404
|
+
}
|
|
405
|
+
#endif
|
|
406
|
+
}
|
|
407
|
+
|
|
408
|
+
#ifndef CAPSTONE_DIET
|
|
409
|
+
static const name_map group_name_maps[] = {
|
|
410
|
+
{ SH_GRP_INVALID , NULL },
|
|
411
|
+
{ SH_GRP_JUMP, "jump" },
|
|
412
|
+
{ SH_GRP_CALL, "call" },
|
|
413
|
+
{ SH_GRP_INT, "int" },
|
|
414
|
+
{ SH_GRP_RET , "ret" },
|
|
415
|
+
{ SH_GRP_IRET, "iret" },
|
|
416
|
+
{ SH_GRP_PRIVILEGE, "privilege" },
|
|
417
|
+
{ SH_GRP_BRANCH_RELATIVE, "branch_relative" },
|
|
418
|
+
{ SH_GRP_SH2, "SH2" },
|
|
419
|
+
{ SH_GRP_SH2E, "SH2E" },
|
|
420
|
+
{ SH_GRP_SH2DSP, "SH2-DSP" },
|
|
421
|
+
{ SH_GRP_SH2A, "SH2A" },
|
|
422
|
+
{ SH_GRP_SH2AFPU, "SH2A-FPU" },
|
|
423
|
+
{ SH_GRP_SH3, "SH3" },
|
|
424
|
+
{ SH_GRP_SH3DSP, "SH3-DSP" },
|
|
425
|
+
{ SH_GRP_SH4, "SH4" },
|
|
426
|
+
{ SH_GRP_SH4A, "SH4A" },
|
|
427
|
+
};
|
|
428
|
+
#endif
|
|
429
|
+
|
|
430
|
+
const char *SH_group_name(csh handle, unsigned int id)
|
|
431
|
+
{
|
|
432
|
+
#ifndef CAPSTONE_DIET
|
|
433
|
+
return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
|
|
434
|
+
#else
|
|
435
|
+
return NULL;
|
|
436
|
+
#endif
|
|
437
|
+
}
|
|
438
|
+
|
|
@@ -0,0 +1,23 @@
|
|
|
1
|
+
/* Capstone Disassembly Engine */
|
|
2
|
+
/* By Yoshinori Sato, 2022 */
|
|
3
|
+
|
|
4
|
+
#ifndef CS_SHINSTPRINTER_H
|
|
5
|
+
#define CS_SHINSTPRINTER_H
|
|
6
|
+
|
|
7
|
+
|
|
8
|
+
#include "capstone/capstone.h"
|
|
9
|
+
#include "../../utils.h"
|
|
10
|
+
#include "../../MCInst.h"
|
|
11
|
+
#include "../../SStream.h"
|
|
12
|
+
#include "../../cs_priv.h"
|
|
13
|
+
#include "SHDisassembler.h"
|
|
14
|
+
|
|
15
|
+
struct SStream;
|
|
16
|
+
|
|
17
|
+
void SH_printInst(MCInst *MI, struct SStream *O, void *Info);
|
|
18
|
+
const char* SH_reg_name(csh handle, unsigned int reg);
|
|
19
|
+
void SH_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id);
|
|
20
|
+
const char* SH_insn_name(csh handle, unsigned int id);
|
|
21
|
+
const char *SH_group_name(csh handle, unsigned int id);
|
|
22
|
+
|
|
23
|
+
#endif
|
|
@@ -0,0 +1,39 @@
|
|
|
1
|
+
/* Capstone Disassembly Engine */
|
|
2
|
+
/* By Yoshinori Sato 2022 */
|
|
3
|
+
|
|
4
|
+
#ifdef CAPSTONE_HAS_SH
|
|
5
|
+
|
|
6
|
+
#include "../../cs_priv.h"
|
|
7
|
+
#include "SHDisassembler.h"
|
|
8
|
+
#include "SHInstPrinter.h"
|
|
9
|
+
#include "SHModule.h"
|
|
10
|
+
|
|
11
|
+
cs_err SH_global_init(cs_struct *ud)
|
|
12
|
+
{
|
|
13
|
+
sh_info *info;
|
|
14
|
+
|
|
15
|
+
info = cs_mem_malloc(sizeof(sh_info));
|
|
16
|
+
if (!info) {
|
|
17
|
+
return CS_ERR_MEM;
|
|
18
|
+
}
|
|
19
|
+
|
|
20
|
+
ud->printer = SH_printInst;
|
|
21
|
+
ud->printer_info = info;
|
|
22
|
+
ud->reg_name = SH_reg_name;
|
|
23
|
+
ud->insn_id = SH_get_insn_id;
|
|
24
|
+
ud->insn_name = SH_insn_name;
|
|
25
|
+
ud->group_name = SH_group_name;
|
|
26
|
+
ud->disasm = SH_getInstruction;
|
|
27
|
+
#ifndef CAPSTONE_DIET
|
|
28
|
+
ud->reg_access = SH_reg_access;
|
|
29
|
+
#endif
|
|
30
|
+
|
|
31
|
+
return CS_ERR_OK;
|
|
32
|
+
}
|
|
33
|
+
|
|
34
|
+
cs_err SH_option(cs_struct *handle, cs_opt_type type, size_t value)
|
|
35
|
+
{
|
|
36
|
+
return CS_ERR_OK;
|
|
37
|
+
}
|
|
38
|
+
|
|
39
|
+
#endif
|
|
@@ -0,0 +1,12 @@
|
|
|
1
|
+
/* Capstone Disassembly Engine */
|
|
2
|
+
/* By Yoshinori Sato, 2022 */
|
|
3
|
+
|
|
4
|
+
#ifndef CS_SH_MODULE_H
|
|
5
|
+
#define CS_SH_MODULE_H
|
|
6
|
+
|
|
7
|
+
#include "../../utils.h"
|
|
8
|
+
|
|
9
|
+
cs_err SH_global_init(cs_struct *ud);
|
|
10
|
+
cs_err SH_option(cs_struct *handle, cs_opt_type type, size_t value);
|
|
11
|
+
|
|
12
|
+
#endif
|