hexcore-capstone 1.2.0

package/deps/capstone/arch/X86/X86MappingReg.inc

@@ -0,0 +1,280 @@
+/* Capstone Disassembly Engine, http://www.capstone-engine.org */
+/* This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org) */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
+
+{ X86_AH, X86_REG_AH },
+{ X86_AL, X86_REG_AL },
+{ X86_AX, X86_REG_AX },
+{ X86_BH, X86_REG_BH },
+{ X86_BL, X86_REG_BL },
+{ X86_BP, X86_REG_BP },
+{ X86_BPH, 0 },
+{ X86_BPL, X86_REG_BPL },
+{ X86_BX, X86_REG_BX },
+{ X86_CH, X86_REG_CH },
+{ X86_CL, X86_REG_CL },
+{ X86_CS, X86_REG_CS },
+{ X86_CX, X86_REG_CX },
+{ X86_DF, 0 },
+{ X86_DH, X86_REG_DH },
+{ X86_DI, X86_REG_DI },
+{ X86_DIH, 0 },
+{ X86_DIL, X86_REG_DIL },
+{ X86_DL, X86_REG_DL },
+{ X86_DS, X86_REG_DS },
+{ X86_DX, X86_REG_DX },
+{ X86_EAX, X86_REG_EAX },
+{ X86_EBP, X86_REG_EBP },
+{ X86_EBX, X86_REG_EBX },
+{ X86_ECX, X86_REG_ECX },
+{ X86_EDI, X86_REG_EDI },
+{ X86_EDX, X86_REG_EDX },
+{ X86_EFLAGS, X86_REG_EFLAGS },
+{ X86_EIP, X86_REG_EIP },
+{ X86_EIZ, X86_REG_EIZ },
+{ X86_ES, X86_REG_ES },
+{ X86_ESI, X86_REG_ESI },
+{ X86_ESP, X86_REG_ESP },
+{ X86_FPSW, X86_REG_FPSW },
+{ X86_FS, X86_REG_FS },
+{ X86_GS, X86_REG_GS },
+{ X86_HAX, 0 },
+{ X86_HBP, 0 },
+{ X86_HBX, 0 },
+{ X86_HCX, 0 },
+{ X86_HDI, 0 },
+{ X86_HDX, 0 },
+{ X86_HIP, 0 },
+{ X86_HSI, 0 },
+{ X86_HSP, 0 },
+{ X86_IP, X86_REG_IP },
+{ X86_RAX, X86_REG_RAX },
+{ X86_RBP, X86_REG_RBP },
+{ X86_RBX, X86_REG_RBX },
+{ X86_RCX, X86_REG_RCX },
+{ X86_RDI, X86_REG_RDI },
+{ X86_RDX, X86_REG_RDX },
+{ X86_RIP, X86_REG_RIP },
+{ X86_RIZ, X86_REG_RIZ },
+{ X86_RSI, X86_REG_RSI },
+{ X86_RSP, X86_REG_RSP },
+{ X86_SI, X86_REG_SI },
+{ X86_SIH, 0 },
+{ X86_SIL, X86_REG_SIL },
+{ X86_SP, X86_REG_SP },
+{ X86_SPH, 0 },
+{ X86_SPL, X86_REG_SPL },
+{ X86_SS, X86_REG_SS },
+{ X86_SSP, 0 },
+{ X86_BND0, X86_REG_BND0 },
+{ X86_BND1, X86_REG_BND1 },
+{ X86_BND2, X86_REG_BND2 },
+{ X86_BND3, X86_REG_BND3 },
+{ X86_CR0, X86_REG_CR0 },
+{ X86_CR1, X86_REG_CR1 },
+{ X86_CR2, X86_REG_CR2 },
+{ X86_CR3, X86_REG_CR3 },
+{ X86_CR4, X86_REG_CR4 },
+{ X86_CR5, X86_REG_CR5 },
+{ X86_CR6, X86_REG_CR6 },
+{ X86_CR7, X86_REG_CR7 },
+{ X86_CR8, X86_REG_CR8 },
+{ X86_CR9, X86_REG_CR9 },
+{ X86_CR10, X86_REG_CR10 },
+{ X86_CR11, X86_REG_CR11 },
+{ X86_CR12, X86_REG_CR12 },
+{ X86_CR13, X86_REG_CR13 },
+{ X86_CR14, X86_REG_CR14 },
+{ X86_CR15, X86_REG_CR15 },
+{ X86_DR0, X86_REG_DR0 },
+{ X86_DR1, X86_REG_DR1 },
+{ X86_DR2, X86_REG_DR2 },
+{ X86_DR3, X86_REG_DR3 },
+{ X86_DR4, X86_REG_DR4 },
+{ X86_DR5, X86_REG_DR5 },
+{ X86_DR6, X86_REG_DR6 },
+{ X86_DR7, X86_REG_DR7 },
+{ X86_DR8, X86_REG_DR8 },
+{ X86_DR9, X86_REG_DR9 },
+{ X86_DR10, X86_REG_DR10 },
+{ X86_DR11, X86_REG_DR11 },
+{ X86_DR12, X86_REG_DR12 },
+{ X86_DR13, X86_REG_DR13 },
+{ X86_DR14, X86_REG_DR14 },
+{ X86_DR15, X86_REG_DR15 },
+{ X86_FP0, X86_REG_FP0 },
+{ X86_FP1, X86_REG_FP1 },
+{ X86_FP2, X86_REG_FP2 },
+{ X86_FP3, X86_REG_FP3 },
+{ X86_FP4, X86_REG_FP4 },
+{ X86_FP5, X86_REG_FP5 },
+{ X86_FP6, X86_REG_FP6 },
+{ X86_FP7, X86_REG_FP7 },
+{ X86_K0, X86_REG_K0 },
+{ X86_K1, X86_REG_K1 },
+{ X86_K2, X86_REG_K2 },
+{ X86_K3, X86_REG_K3 },
+{ X86_K4, X86_REG_K4 },
+{ X86_K5, X86_REG_K5 },
+{ X86_K6, X86_REG_K6 },
+{ X86_K7, X86_REG_K7 },
+{ X86_MM0, X86_REG_MM0 },
+{ X86_MM1, X86_REG_MM1 },
+{ X86_MM2, X86_REG_MM2 },
+{ X86_MM3, X86_REG_MM3 },
+{ X86_MM4, X86_REG_MM4 },
+{ X86_MM5, X86_REG_MM5 },
+{ X86_MM6, X86_REG_MM6 },
+{ X86_MM7, X86_REG_MM7 },
+{ X86_R8, X86_REG_R8 },
+{ X86_R9, X86_REG_R9 },
+{ X86_R10, X86_REG_R10 },
+{ X86_R11, X86_REG_R11 },
+{ X86_R12, X86_REG_R12 },
+{ X86_R13, X86_REG_R13 },
+{ X86_R14, X86_REG_R14 },
+{ X86_R15, X86_REG_R15 },
+{ X86_ST0, X86_REG_ST0 },
+{ X86_ST1, X86_REG_ST1 },
+{ X86_ST2, X86_REG_ST2 },
+{ X86_ST3, X86_REG_ST3 },
+{ X86_ST4, X86_REG_ST4 },
+{ X86_ST5, X86_REG_ST5 },
+{ X86_ST6, X86_REG_ST6 },
+{ X86_ST7, X86_REG_ST7 },
+{ X86_XMM0, X86_REG_XMM0 },
+{ X86_XMM1, X86_REG_XMM1 },
+{ X86_XMM2, X86_REG_XMM2 },
+{ X86_XMM3, X86_REG_XMM3 },
+{ X86_XMM4, X86_REG_XMM4 },
+{ X86_XMM5, X86_REG_XMM5 },
+{ X86_XMM6, X86_REG_XMM6 },
+{ X86_XMM7, X86_REG_XMM7 },
+{ X86_XMM8, X86_REG_XMM8 },
+{ X86_XMM9, X86_REG_XMM9 },
+{ X86_XMM10, X86_REG_XMM10 },
+{ X86_XMM11, X86_REG_XMM11 },
+{ X86_XMM12, X86_REG_XMM12 },
+{ X86_XMM13, X86_REG_XMM13 },
+{ X86_XMM14, X86_REG_XMM14 },
+{ X86_XMM15, X86_REG_XMM15 },
+{ X86_XMM16, X86_REG_XMM16 },
+{ X86_XMM17, X86_REG_XMM17 },
+{ X86_XMM18, X86_REG_XMM18 },
+{ X86_XMM19, X86_REG_XMM19 },
+{ X86_XMM20, X86_REG_XMM20 },
+{ X86_XMM21, X86_REG_XMM21 },
+{ X86_XMM22, X86_REG_XMM22 },
+{ X86_XMM23, X86_REG_XMM23 },
+{ X86_XMM24, X86_REG_XMM24 },
+{ X86_XMM25, X86_REG_XMM25 },
+{ X86_XMM26, X86_REG_XMM26 },
+{ X86_XMM27, X86_REG_XMM27 },
+{ X86_XMM28, X86_REG_XMM28 },
+{ X86_XMM29, X86_REG_XMM29 },
+{ X86_XMM30, X86_REG_XMM30 },
+{ X86_XMM31, X86_REG_XMM31 },
+{ X86_YMM0, X86_REG_YMM0 },
+{ X86_YMM1, X86_REG_YMM1 },
+{ X86_YMM2, X86_REG_YMM2 },
+{ X86_YMM3, X86_REG_YMM3 },
+{ X86_YMM4, X86_REG_YMM4 },
+{ X86_YMM5, X86_REG_YMM5 },
+{ X86_YMM6, X86_REG_YMM6 },
+{ X86_YMM7, X86_REG_YMM7 },
+{ X86_YMM8, X86_REG_YMM8 },
+{ X86_YMM9, X86_REG_YMM9 },
+{ X86_YMM10, X86_REG_YMM10 },
+{ X86_YMM11, X86_REG_YMM11 },
+{ X86_YMM12, X86_REG_YMM12 },
+{ X86_YMM13, X86_REG_YMM13 },
+{ X86_YMM14, X86_REG_YMM14 },
+{ X86_YMM15, X86_REG_YMM15 },
+{ X86_YMM16, X86_REG_YMM16 },
+{ X86_YMM17, X86_REG_YMM17 },
+{ X86_YMM18, X86_REG_YMM18 },
+{ X86_YMM19, X86_REG_YMM19 },
+{ X86_YMM20, X86_REG_YMM20 },
+{ X86_YMM21, X86_REG_YMM21 },
+{ X86_YMM22, X86_REG_YMM22 },
+{ X86_YMM23, X86_REG_YMM23 },
+{ X86_YMM24, X86_REG_YMM24 },
+{ X86_YMM25, X86_REG_YMM25 },
+{ X86_YMM26, X86_REG_YMM26 },
+{ X86_YMM27, X86_REG_YMM27 },
+{ X86_YMM28, X86_REG_YMM28 },
+{ X86_YMM29, X86_REG_YMM29 },
+{ X86_YMM30, X86_REG_YMM30 },
+{ X86_YMM31, X86_REG_YMM31 },
+{ X86_ZMM0, X86_REG_ZMM0 },
+{ X86_ZMM1, X86_REG_ZMM1 },
+{ X86_ZMM2, X86_REG_ZMM2 },
+{ X86_ZMM3, X86_REG_ZMM3 },
+{ X86_ZMM4, X86_REG_ZMM4 },
+{ X86_ZMM5, X86_REG_ZMM5 },
+{ X86_ZMM6, X86_REG_ZMM6 },
+{ X86_ZMM7, X86_REG_ZMM7 },
+{ X86_ZMM8, X86_REG_ZMM8 },
+{ X86_ZMM9, X86_REG_ZMM9 },
+{ X86_ZMM10, X86_REG_ZMM10 },
+{ X86_ZMM11, X86_REG_ZMM11 },
+{ X86_ZMM12, X86_REG_ZMM12 },
+{ X86_ZMM13, X86_REG_ZMM13 },
+{ X86_ZMM14, X86_REG_ZMM14 },
+{ X86_ZMM15, X86_REG_ZMM15 },
+{ X86_ZMM16, X86_REG_ZMM16 },
+{ X86_ZMM17, X86_REG_ZMM17 },
+{ X86_ZMM18, X86_REG_ZMM18 },
+{ X86_ZMM19, X86_REG_ZMM19 },
+{ X86_ZMM20, X86_REG_ZMM20 },
+{ X86_ZMM21, X86_REG_ZMM21 },
+{ X86_ZMM22, X86_REG_ZMM22 },
+{ X86_ZMM23, X86_REG_ZMM23 },
+{ X86_ZMM24, X86_REG_ZMM24 },
+{ X86_ZMM25, X86_REG_ZMM25 },
+{ X86_ZMM26, X86_REG_ZMM26 },
+{ X86_ZMM27, X86_REG_ZMM27 },
+{ X86_ZMM28, X86_REG_ZMM28 },
+{ X86_ZMM29, X86_REG_ZMM29 },
+{ X86_ZMM30, X86_REG_ZMM30 },
+{ X86_ZMM31, X86_REG_ZMM31 },
+{ X86_R8B, X86_REG_R8B },
+{ X86_R9B, X86_REG_R9B },
+{ X86_R10B, X86_REG_R10B },
+{ X86_R11B, X86_REG_R11B },
+{ X86_R12B, X86_REG_R12B },
+{ X86_R13B, X86_REG_R13B },
+{ X86_R14B, X86_REG_R14B },
+{ X86_R15B, X86_REG_R15B },
+{ X86_R8BH, 0 },
+{ X86_R9BH, 0 },
+{ X86_R10BH, 0 },
+{ X86_R11BH, 0 },
+{ X86_R12BH, 0 },
+{ X86_R13BH, 0 },
+{ X86_R14BH, 0 },
+{ X86_R15BH, 0 },
+{ X86_R8D, X86_REG_R8D },
+{ X86_R9D, X86_REG_R9D },
+{ X86_R10D, X86_REG_R10D },
+{ X86_R11D, X86_REG_R11D },
+{ X86_R12D, X86_REG_R12D },
+{ X86_R13D, X86_REG_R13D },
+{ X86_R14D, X86_REG_R14D },
+{ X86_R15D, X86_REG_R15D },
+{ X86_R8W, X86_REG_R8W },
+{ X86_R9W, X86_REG_R9W },
+{ X86_R10W, X86_REG_R10W },
+{ X86_R11W, X86_REG_R11W },
+{ X86_R12W, X86_REG_R12W },
+{ X86_R13W, X86_REG_R13W },
+{ X86_R14W, X86_REG_R14W },
+{ X86_R15W, X86_REG_R15W },
+{ X86_R8WH, 0 },
+{ X86_R9WH, 0 },
+{ X86_R10WH, 0 },
+{ X86_R11WH, 0 },
+{ X86_R12WH, 0 },
+{ X86_R13WH, 0 },
+{ X86_R14WH, 0 },
+{ X86_R15WH, 0 },

package/deps/capstone/arch/X86/X86Module.c

@@ -0,0 +1,94 @@
+/* Capstone Disassembly Engine */
+/* By Dang Hoang Vu <danghvu@gmail.com> 2013 */
+
+#ifdef CAPSTONE_HAS_X86
+
+#include "../../cs_priv.h"
+#include "../../MCRegisterInfo.h"
+#include "X86Disassembler.h"
+#include "X86InstPrinter.h"
+#include "X86Mapping.h"
+#include "X86Module.h"
+
+cs_err X86_global_init(cs_struct *ud)
+{
+	MCRegisterInfo *mri;
+	mri = cs_mem_malloc(sizeof(*mri));
+
+	X86_init(mri);
+
+	// by default, we use Intel syntax
+	ud->printer = X86_Intel_printInst;
+	ud->syntax = CS_OPT_SYNTAX_INTEL;
+	ud->printer_info = mri;
+	ud->disasm = X86_getInstruction;
+	ud->reg_name = X86_reg_name;
+	ud->insn_id = X86_get_insn_id;
+	ud->insn_name = X86_insn_name;
+	ud->group_name = X86_group_name;
+	ud->post_printer = X86_postprinter;
+#ifndef CAPSTONE_DIET
+	ud->reg_access = X86_reg_access;
+#endif
+
+	if (ud->mode == CS_MODE_64)
+		ud->regsize_map = regsize_map_64;
+	else
+		ud->regsize_map = regsize_map_32;
+
+	return CS_ERR_OK;
+}
+
+cs_err X86_option(cs_struct *handle, cs_opt_type type, size_t value)
+{
+	switch(type) {
+		default:
+			break;
+		case CS_OPT_MODE:
+			if (value == CS_MODE_64)
+				handle->regsize_map = regsize_map_64;
+			else
+				handle->regsize_map = regsize_map_32;
+
+			handle->mode = (cs_mode)value;
+			break;
+		case CS_OPT_SYNTAX:
+			switch(value) {
+				default:
+					// wrong syntax value
+					handle->errnum = CS_ERR_OPTION;
+					return CS_ERR_OPTION;
+
+				case CS_OPT_SYNTAX_DEFAULT:
+				case CS_OPT_SYNTAX_INTEL:
+					handle->syntax = CS_OPT_SYNTAX_INTEL;
+					handle->printer = X86_Intel_printInst;
+					break;
+
+				case CS_OPT_SYNTAX_MASM:
+					handle->printer = X86_Intel_printInst;
+					handle->syntax = (int)value;
+					break;
+
+				case CS_OPT_SYNTAX_ATT:
+#if !defined(CAPSTONE_DIET) && !defined(CAPSTONE_X86_ATT_DISABLE)
+					handle->printer = X86_ATT_printInst;
+					handle->syntax = CS_OPT_SYNTAX_ATT;
+					break;
+#elif !defined(CAPSTONE_DIET) && defined(CAPSTONE_X86_ATT_DISABLE)
+					// ATT syntax is unsupported
+					handle->errnum = CS_ERR_X86_ATT;
+					return CS_ERR_X86_ATT;
+#else	// CAPSTONE_DIET
+					// this is irrelevant in CAPSTONE_DIET mode
+					handle->errnum = CS_ERR_DIET;
+					return CS_ERR_DIET;
+#endif
+			}
+			break;
+	}
+
+	return CS_ERR_OK;
+}
+
+#endif

package/deps/capstone/arch/X86/X86Module.h

@@ -0,0 +1,12 @@
+/* Capstone Disassembly Engine */
+/* By Travis Finkenauer <tmfinken@gmail.com>, 2018 */
+
+#ifndef CS_X86_MODULE_H
+#define CS_X86_MODULE_H
+
+#include "../../utils.h"
+
+cs_err X86_global_init(cs_struct *ud);
+cs_err X86_option(cs_struct *handle, cs_opt_type type, size_t value);
+
+#endif