crabstone 3.0.3
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- checksums.yaml +7 -0
- data/CHANGES.md +61 -0
- data/LICENSE +25 -0
- data/MANIFEST +312 -0
- data/README.md +103 -0
- data/Rakefile +27 -0
- data/bin/genconst +66 -0
- data/bin/genreg +99 -0
- data/crabstone.gemspec +27 -0
- data/examples/hello_world.rb +43 -0
- data/lib/arch/arm.rb +128 -0
- data/lib/arch/arm64.rb +167 -0
- data/lib/arch/arm64_const.rb +1055 -0
- data/lib/arch/arm64_registers.rb +295 -0
- data/lib/arch/arm_const.rb +777 -0
- data/lib/arch/arm_registers.rb +149 -0
- data/lib/arch/mips.rb +78 -0
- data/lib/arch/mips_const.rb +850 -0
- data/lib/arch/mips_registers.rb +208 -0
- data/lib/arch/ppc.rb +90 -0
- data/lib/arch/ppc_const.rb +1181 -0
- data/lib/arch/ppc_registers.rb +209 -0
- data/lib/arch/sparc.rb +79 -0
- data/lib/arch/sparc_const.rb +461 -0
- data/lib/arch/sparc_registers.rb +121 -0
- data/lib/arch/systemz.rb +79 -0
- data/lib/arch/sysz_const.rb +779 -0
- data/lib/arch/sysz_registers.rb +66 -0
- data/lib/arch/x86.rb +107 -0
- data/lib/arch/x86_const.rb +1698 -0
- data/lib/arch/x86_registers.rb +265 -0
- data/lib/arch/xcore.rb +78 -0
- data/lib/arch/xcore_const.rb +185 -0
- data/lib/arch/xcore_registers.rb +57 -0
- data/lib/crabstone.rb +564 -0
- data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
- data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
- data/test/MC/AArch64/neon-2velem.s.cs +113 -0
- data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
- data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
- data/test/MC/AArch64/neon-across.s.cs +40 -0
- data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
- data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
- data/test/MC/AArch64/neon-crypto.s.cs +15 -0
- data/test/MC/AArch64/neon-extract.s.cs +3 -0
- data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
- data/test/MC/AArch64/neon-max-min.s.cs +37 -0
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
- data/test/MC/AArch64/neon-mov.s.cs +74 -0
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
- data/test/MC/AArch64/neon-perm.s.cs +43 -0
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
- data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
- data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
- data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
- data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
- data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
- data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
- data/test/MC/AArch64/neon-shift.s.cs +22 -0
- data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
- data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
- data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
- data/test/MC/AArch64/neon-tbl.s.cs +21 -0
- data/test/MC/AArch64/trace-regs.s.cs +383 -0
- data/test/MC/ARM/arm-aliases.s.cs +7 -0
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
- data/test/MC/ARM/arm-it-block.s.cs +2 -0
- data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
- data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
- data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
- data/test/MC/ARM/arm_instructions.s.cs +25 -0
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
- data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
- data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
- data/test/MC/ARM/crc32-thumb.s.cs +7 -0
- data/test/MC/ARM/crc32.s.cs +7 -0
- data/test/MC/ARM/dot-req.s.cs +3 -0
- data/test/MC/ARM/fp-armv8.s.cs +52 -0
- data/test/MC/ARM/idiv-thumb.s.cs +3 -0
- data/test/MC/ARM/idiv.s.cs +3 -0
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
- data/test/MC/ARM/mode-switch.s.cs +7 -0
- data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
- data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
- data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
- data/test/MC/ARM/neon-crypto.s.cs +16 -0
- data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
- data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
- data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
- data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neon-v8.s.cs +38 -0
- data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
- data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
- data/test/MC/ARM/neon-vswp.s.cs +3 -0
- data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
- data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
- data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
- data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
- data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
- data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
- data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
- data/test/MC/ARM/thumb-hints.s.cs +12 -0
- data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
- data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
- data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
- data/test/MC/ARM/thumb.s.cs +19 -0
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
- data/test/MC/ARM/thumb2-branches.s.cs +85 -0
- data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
- data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
- data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
- data/test/MC/ARM/vfp4.s.cs +13 -0
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
- data/test/MC/ARM/vpush-vpop.s.cs +9 -0
- data/test/MC/Mips/hilo-addressing.s.cs +4 -0
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
- data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
- data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
- data/test/MC/Mips/micromips-expansions.s.cs +20 -0
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
- data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
- data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
- data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
- data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
- data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
- data/test/MC/Mips/mips-expansions.s.cs +20 -0
- data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
- data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
- data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
- data/test/MC/Mips/mips-register-names.s.cs +33 -0
- data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
- data/test/MC/Mips/mips64-instructions.s.cs +3 -0
- data/test/MC/Mips/mips64-register-names.s.cs +33 -0
- data/test/MC/Mips/mips_directives.s.cs +12 -0
- data/test/MC/Mips/nabi-regs.s.cs +12 -0
- data/test/MC/Mips/set-at-directive.s.cs +6 -0
- data/test/MC/Mips/test_2r.s.cs +16 -0
- data/test/MC/Mips/test_2rf.s.cs +33 -0
- data/test/MC/Mips/test_3r.s.cs +243 -0
- data/test/MC/Mips/test_3rf.s.cs +83 -0
- data/test/MC/Mips/test_bit.s.cs +49 -0
- data/test/MC/Mips/test_cbranch.s.cs +11 -0
- data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
- data/test/MC/Mips/test_elm.s.cs +16 -0
- data/test/MC/Mips/test_elm_insert.s.cs +4 -0
- data/test/MC/Mips/test_elm_insve.s.cs +5 -0
- data/test/MC/Mips/test_i10.s.cs +5 -0
- data/test/MC/Mips/test_i5.s.cs +45 -0
- data/test/MC/Mips/test_i8.s.cs +11 -0
- data/test/MC/Mips/test_lsa.s.cs +5 -0
- data/test/MC/Mips/test_mi10.s.cs +24 -0
- data/test/MC/Mips/test_vec.s.cs +8 -0
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
- data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
- data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
- data/test/MC/README +6 -0
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
- data/test/MC/Sparc/sparc-vis.s.cs +2 -0
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
- data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
- data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
- data/test/MC/SystemZ/insn-good.s.cs +2265 -0
- data/test/MC/SystemZ/regs-good.s.cs +45 -0
- data/test/MC/X86/3DNow.s.cs +29 -0
- data/test/MC/X86/address-size.s.cs +5 -0
- data/test/MC/X86/avx512-encodings.s.cs +12 -0
- data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
- data/test/MC/X86/x86-32-avx.s.cs +833 -0
- data/test/MC/X86/x86-32-fma3.s.cs +169 -0
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
- data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
- data/test/MC/X86/x86_64-encoding.s.cs +59 -0
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
- data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
- data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
- data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
- data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
- data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
- data/test/README +6 -0
- data/test/test.rb +205 -0
- data/test/test.rb.SPEC +235 -0
- data/test/test_arm.rb +202 -0
- data/test/test_arm.rb.SPEC +275 -0
- data/test/test_arm64.rb +150 -0
- data/test/test_arm64.rb.SPEC +116 -0
- data/test/test_detail.rb +228 -0
- data/test/test_detail.rb.SPEC +322 -0
- data/test/test_exhaustive.rb +80 -0
- data/test/test_mips.rb +118 -0
- data/test/test_mips.rb.SPEC +91 -0
- data/test/test_ppc.rb +137 -0
- data/test/test_ppc.rb.SPEC +84 -0
- data/test/test_sanity.rb +83 -0
- data/test/test_skipdata.rb +111 -0
- data/test/test_skipdata.rb.SPEC +58 -0
- data/test/test_sparc.rb +113 -0
- data/test/test_sparc.rb.SPEC +116 -0
- data/test/test_sysz.rb +111 -0
- data/test/test_sysz.rb.SPEC +61 -0
- data/test/test_x86.rb +189 -0
- data/test/test_x86.rb.SPEC +579 -0
- data/test/test_xcore.rb +100 -0
- data/test/test_xcore.rb.SPEC +75 -0
- metadata +393 -0
checksums.yaml
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SHA1:
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metadata.gz: acf2c718e307944c7535140d1048d7bff42e35d3
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data.tar.gz: 60877a5b5d2cbc318431ae9c6019dcdd24e6b75b
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SHA512:
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metadata.gz: 5fc96a476ee596c02d0c60805e27348503aba244a910c3aa4fc8596590c1e9c337a5a8cebd9cb9df8551352f95d07b3d6f957b578b0f4620b25d3a5f6fb734ac
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data.tar.gz: 4821da92a28077e91a03759c8cf986d4b7bd68ff56df30f2d760189d50a0af1f0b6e216a7cca62134b01dbe7647261d8b8319bf2048e96a5cfb6b16a9eeba319
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## 0.0.1
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* Alpha release.
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## 0.0.2
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* Update tests, add syntax sugar
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## 0.0.3
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* Refactoring and cosmetics
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## 0.0.4
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* Verify MIPS support, tests, slight API changes
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## 0.0.5
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* API changes including cs_errno.
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## 0.0.6
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* Final set of API changes before public beta.
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## 1.0.0
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* Move to new github repo
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## 2.0.0
|
23
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* Add PPC support
|
24
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* Assorted API changes
|
25
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* disasm can now ONLY be used with a block ( hopefully fix later )
|
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* THIS IS A BREAKING CHANGE
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## 2.0.1
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* Update X86 constants
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## 2.1rc1
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* Many constant changes
|
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* disasm CAN now return an Array, with a slightly scary built-in finalizer
|
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|
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## 2.1.0
|
36
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* Full compliance with 2.1 API
|
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* Better error handling for diet mode
|
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* Internally change cs_close() signature, so closed handles can't be used
|
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+
|
40
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+
## 2.2.0
|
41
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+
* Add support for Sparc and SystemZ
|
42
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+
|
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## 3.0rc1
|
44
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* Update for C side changes
|
45
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+
* Add support for Xcore
|
46
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+
* ARM, ARM64 and X86 passing, rest waiting for upstream
|
47
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+
|
48
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+
## 3.0rc3
|
49
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+
* Generic groups ( CS_GRP_JUMP, CS_GRP_CALL etc)
|
50
|
+
* Mips 32R6 + MICRO
|
51
|
+
* Many constant changes
|
52
|
+
* PPC CRX operand
|
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+
* X86: added prefixed symbols
|
54
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+
* THIS IS A BREAKING CHANGE ( even from rc1 )
|
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+
|
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+
## 3.0
|
57
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* See https://github.com/aquynh/capstone/wiki/ChangeLog-since-3.0-rc3
|
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+
* Shouldn't be breaking, most changes are internal.
|
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+
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## 3.0.3-rc1
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* Internal binding updates, updated some test specs.
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data/LICENSE
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Copyright (c) 2013 COSEINC. All Rights Reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
|
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|
+
list of conditions and the following disclaimer.
|
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2. Redistributions in binary form must reproduce the above copyright notice,
|
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this list of conditions and the following disclaimer in the documentation and/or
|
11
|
+
other materials provided with the distribution.
|
12
|
+
|
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3. The name of the author(s) may not be used to endorse or promote products
|
14
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derived from this software without specific prior written permission.
|
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|
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THIS SOFTWARE IS PROVIDED BY COSEINC "AS IS" AND ANY EXPRESS OR IMPLIED
|
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WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
18
|
+
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
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SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
20
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+
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
21
|
+
OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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|
+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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|
+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
24
|
+
IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
25
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+
OF SUCH DAMAGE.
|
data/MANIFEST
ADDED
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|
|
1
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* CHANGES.md
|
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|
+
* MANIFEST
|
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|
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* LICENSE
|
4
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+
* Rakefile
|
5
|
+
* README.md
|
6
|
+
|
7
|
+
* examples/hello_world.rb
|
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|
+
|
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* lib/arch/arm.rb
|
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+
* lib/arch/arm64.rb
|
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* lib/arch/arm64_const.rb
|
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* lib/arch/arm64_registers.rb
|
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+
* lib/arch/arm_const.rb
|
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* lib/arch/arm_registers.rb
|
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* lib/arch/const_gen
|
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* lib/arch/mips.rb
|
17
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+
* lib/arch/mips_const.rb
|
18
|
+
* lib/arch/mips_registers.rb
|
19
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+
* lib/arch/ppc.rb
|
20
|
+
* lib/arch/ppc_const.rb
|
21
|
+
* lib/arch/ppc_registers.rb
|
22
|
+
* lib/arch/sparc.rb
|
23
|
+
* lib/arch/sparc_const.rb
|
24
|
+
* lib/arch/sparc_registers.rb
|
25
|
+
* lib/arch/systemz.rb
|
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|
+
* lib/arch/sysz_registers.rb
|
27
|
+
* lib/arch/sysz_const.rb
|
28
|
+
* lib/arch/x86.rb
|
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|
+
* lib/arch/x86_const.rb
|
30
|
+
* lib/arch/x86_registers.rb
|
31
|
+
* lib/arch/xcore.rb
|
32
|
+
* lib/arch/xcore_const.rb
|
33
|
+
* lib/arch/xcore_registers.rb
|
34
|
+
|
35
|
+
* lib/crabstone.rb
|
36
|
+
|
37
|
+
* test/test.rb
|
38
|
+
* test/test.rb.SPEC
|
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|
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* test/test_arm.rb
|
40
|
+
* test/test_arm.rb.SPEC
|
41
|
+
* test/test_arm64.rb
|
42
|
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* test/test_arm64.rb.SPEC
|
43
|
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* test/test_detail.rb
|
44
|
+
* test/test_detail.rb.SPEC
|
45
|
+
* test/test_exhaustive.rb
|
46
|
+
* test/test_mips.rb
|
47
|
+
* test/test_mips.rb.SPEC
|
48
|
+
* test/test_ppc.rb
|
49
|
+
* test/test_ppc.rb.SPEC
|
50
|
+
* test/test_sanity.rb
|
51
|
+
* test/test_skipdata.rb
|
52
|
+
* test/test_skipdata.rb.SPEC
|
53
|
+
* test/test_sparc.rb
|
54
|
+
* test/test_sparc.rb.SPEC
|
55
|
+
* test/test_sysz.rb
|
56
|
+
* test/test_sysz.rb.SPEC
|
57
|
+
* test/test_x86.rb
|
58
|
+
* test/test_x86.rb.SPEC
|
59
|
+
* test/text_xcore.rb
|
60
|
+
* test/test_xcore.rb.SPEC
|
61
|
+
|
62
|
+
* test/MC/README
|
63
|
+
|
64
|
+
* test/MC/AArch64/basic-a64-instructions.s.cs
|
65
|
+
* test/MC/AArch64/gicv3-regs.s.cs
|
66
|
+
* test/MC/AArch64/neon-2velem.s.cs
|
67
|
+
* test/MC/AArch64/neon-3vdiff.s.cs
|
68
|
+
* test/MC/AArch64/neon-aba-abd.s.cs
|
69
|
+
* test/MC/AArch64/neon-across.s.cs
|
70
|
+
* test/MC/AArch64/neon-add-pairwise.s.cs
|
71
|
+
* test/MC/AArch64/neon-add-sub-instructions.s.cs
|
72
|
+
* test/MC/AArch64/neon-bitwise-instructions.s.cs
|
73
|
+
* test/MC/AArch64/neon-compare-instructions.s.cs
|
74
|
+
* test/MC/AArch64/neon-crypto.s.cs
|
75
|
+
* test/MC/AArch64/neon-extract.s.cs
|
76
|
+
* test/MC/AArch64/neon-facge-facgt.s.cs
|
77
|
+
* test/MC/AArch64/neon-frsqrt-frecp.s.cs
|
78
|
+
* test/MC/AArch64/neon-halving-add-sub.s.cs
|
79
|
+
* test/MC/AArch64/neon-max-min-pairwise.s.cs
|
80
|
+
* test/MC/AArch64/neon-max-min.s.cs
|
81
|
+
* test/MC/AArch64/neon-mla-mls-instructions.s.cs
|
82
|
+
* test/MC/AArch64/neon-mov.s.cs
|
83
|
+
* test/MC/AArch64/neon-mul-div-instructions.s.cs
|
84
|
+
* test/MC/AArch64/neon-perm.s.cs
|
85
|
+
* test/MC/AArch64/neon-rounding-halving-add.s.cs
|
86
|
+
* test/MC/AArch64/neon-rounding-shift.s.cs
|
87
|
+
* test/MC/AArch64/neon-saturating-add-sub.s.cs
|
88
|
+
* test/MC/AArch64/neon-saturating-rounding-shift.s.cs
|
89
|
+
* test/MC/AArch64/neon-saturating-shift.s.cs
|
90
|
+
* test/MC/AArch64/neon-scalar-abs.s.cs
|
91
|
+
* test/MC/AArch64/neon-scalar-add-sub.s.cs
|
92
|
+
* test/MC/AArch64/neon-scalar-by-elem-mla.s.cs
|
93
|
+
* test/MC/AArch64/neon-scalar-by-elem-mul.s.cs
|
94
|
+
* test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs
|
95
|
+
* test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs
|
96
|
+
* test/MC/AArch64/neon-scalar-compare.s.cs
|
97
|
+
* test/MC/AArch64/neon-scalar-cvt.s.cs
|
98
|
+
* test/MC/AArch64/neon-scalar-dup.s.cs
|
99
|
+
* test/MC/AArch64/neon-scalar-extract-narrow.s.cs
|
100
|
+
* test/MC/AArch64/neon-scalar-fp-compare.s.cs
|
101
|
+
* test/MC/AArch64/neon-scalar-mul.s.cs
|
102
|
+
* test/MC/AArch64/neon-scalar-neg.s.cs
|
103
|
+
* test/MC/AArch64/neon-scalar-recip.s.cs
|
104
|
+
* test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs
|
105
|
+
* test/MC/AArch64/neon-scalar-rounding-shift.s.cs
|
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|
+
* test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs
|
107
|
+
* test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs
|
108
|
+
* test/MC/AArch64/neon-scalar-saturating-shift.s.cs
|
109
|
+
* test/MC/AArch64/neon-scalar-shift-imm.s.cs
|
110
|
+
* test/MC/AArch64/neon-scalar-shift.s.cs
|
111
|
+
* test/MC/AArch64/neon-shift-left-long.s.cs
|
112
|
+
* test/MC/AArch64/neon-shift.s.cs
|
113
|
+
* test/MC/AArch64/neon-simd-copy.s.cs
|
114
|
+
* test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs
|
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|
+
* test/MC/AArch64/neon-simd-ldst-one-elem.s.cs
|
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|
+
* test/MC/AArch64/neon-simd-misc.s.cs
|
117
|
+
* test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs
|
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|
+
* test/MC/AArch64/neon-simd-shift.s.cs
|
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|
+
* test/MC/AArch64/neon-tbl.s.cs
|
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|
+
* test/MC/AArch64/trace-regs.s.cs
|
121
|
+
|
122
|
+
* test/MC/ARM/arm-aliases.s.cs
|
123
|
+
* test/MC/ARM/arm-arithmetic-aliases.s.cs
|
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|
+
* test/MC/ARM/arm-it-block.s.cs
|
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|
+
* test/MC/ARM/arm-memory-instructions.s.cs
|
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|
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* test/MC/ARM/arm-shift-encoding.s.cs
|
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|
+
* test/MC/ARM/arm-thumb-trustzone.s.cs
|
128
|
+
* test/MC/ARM/arm-trustzone.s.cs
|
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|
+
* test/MC/ARM/arm_addrmode2.s.cs
|
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|
+
* test/MC/ARM/arm_addrmode3.s.cs
|
131
|
+
* test/MC/ARM/arm_instructions.s.cs
|
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* test/MC/ARM/basic-arm-instructions-v8.s.cs
|
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|
+
* test/MC/ARM/basic-arm-instructions.s.cs
|
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|
+
* test/MC/ARM/basic-thumb-instructions.s.cs
|
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|
+
* test/MC/ARM/basic-thumb2-instructions-v8.s.cs
|
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+
* test/MC/ARM/basic-thumb2-instructions.s.cs
|
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* test/MC/ARM/crc32-thumb.s.cs
|
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|
+
* test/MC/ARM/crc32.s.cs
|
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|
+
* test/MC/ARM/dot-req.s.cs
|
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|
+
* test/MC/ARM/fp-armv8.s.cs
|
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+
* test/MC/ARM/idiv-thumb.s.cs
|
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|
+
* test/MC/ARM/idiv.s.cs
|
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|
+
* test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs
|
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|
+
* test/MC/ARM/load-store-acquire-release-v8.s.cs
|
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|
+
* test/MC/ARM/mode-switch.s.cs
|
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|
+
* test/MC/ARM/neon-abs-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-absdiff-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-add-encoding.s.cs
|
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+
* test/MC/ARM/neon-bitcount-encoding.s.cs
|
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+
* test/MC/ARM/neon-bitwise-encoding.s.cs
|
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* test/MC/ARM/neon-cmp-encoding.s.cs
|
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+
* test/MC/ARM/neon-convert-encoding.s.cs
|
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* test/MC/ARM/neon-crypto.s.cs
|
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+
* test/MC/ARM/neon-dup-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-minmax-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-mov-encoding.s.cs
|
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* test/MC/ARM/neon-mul-accum-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-mul-encoding.s.cs
|
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|
+
* test/MC/ARM/neon-neg-encoding.s.cs
|
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* test/MC/ARM/neon-pairwise-encoding.s.cs
|
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* test/MC/ARM/neon-reciprocal-encoding.s.cs
|
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* test/MC/ARM/neon-reverse-encoding.s.cs
|
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* test/MC/ARM/neon-satshift-encoding.s.cs
|
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* test/MC/ARM/neon-shift-encoding.s.cs
|
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* test/MC/ARM/neon-shiftaccum-encoding.s.cs
|
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* test/MC/ARM/neon-shuffle-encoding.s.cs
|
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* test/MC/ARM/neon-sub-encoding.s.cs
|
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* test/MC/ARM/neon-table-encoding.s.cs
|
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* test/MC/ARM/neon-v8.s.cs
|
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* test/MC/ARM/neon-vld-encoding.s.cs
|
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* test/MC/ARM/neon-vst-encoding.s.cs
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* test/MC/ARM/neon-vswp.s.cs
|
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* test/MC/ARM/neont2-abs-encoding.s.cs
|
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* test/MC/ARM/neont2-absdiff-encoding.s.cs
|
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* test/MC/ARM/neont2-add-encoding.s.cs
|
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* test/MC/ARM/neont2-bitcount-encoding.s.cs
|
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* test/MC/ARM/neont2-bitwise-encoding.s.cs
|
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* test/MC/ARM/neont2-cmp-encoding.s.cs
|
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* test/MC/ARM/neont2-convert-encoding.s.cs
|
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* test/MC/ARM/neont2-dup-encoding.s.cs
|
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* test/MC/ARM/neont2-minmax-encoding.s.cs
|
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* test/MC/ARM/neont2-mov-encoding.s.cs
|
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* test/MC/ARM/neont2-mul-accum-encoding.s.cs
|
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* test/MC/ARM/neont2-mul-encoding.s.cs
|
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* test/MC/ARM/neont2-neg-encoding.s.cs
|
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* test/MC/ARM/neont2-pairwise-encoding.s.cs
|
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* test/MC/ARM/neont2-reciprocal-encoding.s.cs
|
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* test/MC/ARM/neont2-reverse-encoding.s.cs
|
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* test/MC/ARM/neont2-satshift-encoding.s.cs
|
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* test/MC/ARM/neont2-shift-encoding.s.cs
|
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* test/MC/ARM/neont2-shiftaccum-encoding.s.cs
|
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* test/MC/ARM/neont2-shuffle-encoding.s.cs
|
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* test/MC/ARM/neont2-sub-encoding.s.cs
|
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* test/MC/ARM/neont2-table-encoding.s.cs
|
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* test/MC/ARM/neont2-vld-encoding.s.cs
|
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+
* test/MC/ARM/neont2-vst-encoding.s.cs
|
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* test/MC/ARM/simple-fp-encoding.s.cs
|
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+
* test/MC/ARM/thumb-fp-armv8.s.cs
|
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* test/MC/ARM/thumb-hints.s.cs
|
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* test/MC/ARM/thumb-neon-crypto.s.cs
|
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* test/MC/ARM/thumb-neon-v8.s.cs
|
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* test/MC/ARM/thumb-shift-encoding.s.cs
|
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* test/MC/ARM/thumb.s.cs
|
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* test/MC/ARM/thumb2-b.w-encodingT4.s.cs
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* test/MC/ARM/thumb2-branches.s.cs
|
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* test/MC/ARM/thumb2-mclass.s.cs
|
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* test/MC/ARM/thumb2-narrow-dp.ll.cs
|
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* test/MC/ARM/thumb2-pldw.s.cs
|
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* test/MC/ARM/vfp4-thumb.s.cs
|
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* test/MC/ARM/vfp4.s.cs
|
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* test/MC/ARM/vpush-vpop-thumb.s.cs
|
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* test/MC/ARM/vpush-vpop.s.cs
|
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+
|
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+
* test/MC/Mips/hilo-addressing.s.cs
|
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* test/MC/Mips/micromips-alu-instructions-EB.s.cs
|
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* test/MC/Mips/micromips-alu-instructions.s.cs
|
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* test/MC/Mips/micromips-branch-instructions-EB.s.cs
|
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* test/MC/Mips/micromips-branch-instructions.s.cs
|
219
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+
* test/MC/Mips/micromips-expansions.s.cs
|
220
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+
* test/MC/Mips/micromips-jump-instructions-EB.s.cs
|
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* test/MC/Mips/micromips-jump-instructions.s.cs
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+
* test/MC/Mips/micromips-loadstore-instructions-EB.s.cs
|
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* test/MC/Mips/micromips-loadstore-instructions.s.cs
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* test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs
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* test/MC/Mips/micromips-loadstore-unaligned.s.cs
|
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* test/MC/Mips/micromips-movcond-instructions-EB.s.cs
|
227
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+
* test/MC/Mips/micromips-movcond-instructions.s.cs
|
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+
* test/MC/Mips/micromips-multiply-instructions-EB.s.cs
|
229
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+
* test/MC/Mips/micromips-multiply-instructions.s.cs
|
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|
+
* test/MC/Mips/micromips-shift-instructions-EB.s.cs
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* test/MC/Mips/micromips-shift-instructions.s.cs
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* test/MC/Mips/micromips-trap-instructions-EB.s.cs
|
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+
* test/MC/Mips/micromips-trap-instructions.s.cs
|
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|
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* test/MC/Mips/mips-alu-instructions.s.cs
|
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* test/MC/Mips/mips-control-instructions-64.s.cs
|
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* test/MC/Mips/mips-control-instructions.s.cs
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* test/MC/Mips/mips-coprocessor-encodings.s.cs
|
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* test/MC/Mips/mips-dsp-instructions.s.cs
|
239
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+
* test/MC/Mips/mips-expansions.s.cs
|
240
|
+
* test/MC/Mips/mips-fpu-instructions.s.cs
|
241
|
+
* test/MC/Mips/mips-jump-instructions.s.cs
|
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+
* test/MC/Mips/mips-memory-instructions.s.cs
|
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+
* test/MC/Mips/mips-register-names.s.cs
|
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+
* test/MC/Mips/mips64-alu-instructions.s.cs
|
245
|
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* test/MC/Mips/mips64-instructions.s.cs
|
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+
* test/MC/Mips/mips64-register-names.s.cs
|
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+
* test/MC/Mips/mips_directives.s.cs
|
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+
* test/MC/Mips/nabi-regs.s.cs
|
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|
+
* test/MC/Mips/set-at-directive.s.cs
|
250
|
+
* test/MC/Mips/test_2r.s.cs
|
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|
+
* test/MC/Mips/test_2rf.s.cs
|
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+
* test/MC/Mips/test_3r.s.cs
|
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+
* test/MC/Mips/test_3rf.s.cs
|
254
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+
* test/MC/Mips/test_bit.s.cs
|
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|
+
* test/MC/Mips/test_cbranch.s.cs
|
256
|
+
* test/MC/Mips/test_ctrlregs.s.cs
|
257
|
+
* test/MC/Mips/test_elm.s.cs
|
258
|
+
* test/MC/Mips/test_elm_insert.s.cs
|
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* test/MC/Mips/test_elm_insve.s.cs
|
260
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+
* test/MC/Mips/test_i10.s.cs
|
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* test/MC/Mips/test_i5.s.cs
|
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|
+
* test/MC/Mips/test_i8.s.cs
|
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|
+
* test/MC/Mips/test_lsa.s.cs
|
264
|
+
* test/MC/Mips/test_mi10.s.cs
|
265
|
+
* test/MC/Mips/test_vec.s.cs
|
266
|
+
|
267
|
+
* test/MC/PowerPC/ppc64-encoding-bookII.s.cs
|
268
|
+
* test/MC/PowerPC/ppc64-encoding-bookIII.s.cs
|
269
|
+
* test/MC/PowerPC/ppc64-encoding-ext.s.cs
|
270
|
+
* test/MC/PowerPC/ppc64-encoding-fp.s.cs
|
271
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* test/MC/PowerPC/ppc64-encoding-vmx.s.cs
|
272
|
+
* test/MC/PowerPC/ppc64-encoding.s.cs
|
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|
+
* test/MC/PowerPC/ppc64-operands.s.cs
|
274
|
+
|
275
|
+
* test/MC/Sparc/sparc-alu-instructions.s.cs
|
276
|
+
* test/MC/Sparc/sparc-atomic-instructions.s.cs
|
277
|
+
* test/MC/Sparc/sparc-ctrl-instructions.s.cs
|
278
|
+
* test/MC/Sparc/sparc-fp-instructions.s.cs
|
279
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+
* test/MC/Sparc/sparc-mem-instructions.s.cs
|
280
|
+
* test/MC/Sparc/sparc-vis.s.cs
|
281
|
+
* test/MC/Sparc/sparc64-alu-instructions.s.cs
|
282
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* test/MC/Sparc/sparc64-ctrl-instructions.s.cs
|
283
|
+
* test/MC/Sparc/sparcv8-instructions.s.cs
|
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|
+
* test/MC/Sparc/sparcv9-instructions.s.cs
|
285
|
+
|
286
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* test/MC/SystemZ/insn-good-z196.s.cs
|
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+
* test/MC/SystemZ/insn-good.s.cs
|
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|
+
* test/MC/SystemZ/regs-good.s.cs
|
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+
|
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+
* test/MC/X86/3DNow.s.cs
|
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* test/MC/X86/address-size.s.cs
|
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|
+
* test/MC/X86/avx512-encodings.s.cs
|
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|
+
* test/MC/X86/intel-syntax-encoding.s.cs
|
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|
+
* test/MC/X86/x86-32-avx.s.cs
|
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|
+
* test/MC/X86/x86-32-fma3.s.cs
|
296
|
+
* test/MC/X86/x86-32-ms-inline-asm.s.cs
|
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|
+
* test/MC/X86/x86_64-avx-clmul-encoding.s.cs
|
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|
+
* test/MC/X86/x86_64-avx-encoding.s.cs
|
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|
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* test/MC/X86/x86_64-bmi-encoding.s.cs
|
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|
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* test/MC/X86/x86_64-encoding.s.cs
|
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|
+
* test/MC/X86/x86_64-fma3-encoding.s.cs
|
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|
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* test/MC/X86/x86_64-fma4-encoding.s.cs
|
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|
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* test/MC/X86/x86_64-hle-encoding.s.cs
|
304
|
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* test/MC/X86/x86_64-imm-widths.s.cs
|
305
|
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* test/MC/X86/x86_64-rand-encoding.s.cs
|
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|
+
* test/MC/X86/x86_64-rtm-encoding.s.cs
|
307
|
+
* test/MC/X86/x86_64-sse4a.s.cs
|
308
|
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* test/MC/X86/x86_64-tbm-encoding.s.cs
|
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* test/MC/X86/x86_64-xop-encoding.s.cs
|
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|
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* bin/genconst
|
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* bin/genreg
|
data/README.md
ADDED
@@ -0,0 +1,103 @@
|
|
1
|
+
crabstone
|
2
|
+
====
|
3
|
+
|
4
|
+
STATUS
|
5
|
+
===
|
6
|
+
|
7
|
+
Hopefully working.
|
8
|
+
|
9
|
+
Current Library binding: 3.0.3-rc1
|
10
|
+
----
|
11
|
+
|
12
|
+
( FROM THE CAPSTONE README )
|
13
|
+
|
14
|
+
Capstone is a disassembly framework with the target of becoming the ultimate
|
15
|
+
disasm engine for binary analysis and reversing in the security community.
|
16
|
+
|
17
|
+
Created by Nguyen Anh Quynh, then developed and maintained by a small community,
|
18
|
+
Capstone offers some unparalleled features:
|
19
|
+
|
20
|
+
- Support multiple hardware architectures: ARM, ARM64 (aka ARMv8), Mips, X86, Sparc & SystemZ.
|
21
|
+
|
22
|
+
- Having clean/simple/lightweight/intuitive architecture-neutral API.
|
23
|
+
|
24
|
+
- Provide details on disassembled instruction (called “decomposer” by others).
|
25
|
+
|
26
|
+
- Provide semantics of the disassembled instruction, such as list of implicit
|
27
|
+
registers read & written.
|
28
|
+
|
29
|
+
- Implemented in pure C language, with lightweight wrappers for C++, Python,
|
30
|
+
Ruby, OCaml, C#, Java and Go available.
|
31
|
+
|
32
|
+
- Native support for Windows & *nix platforms (MacOSX, Linux & *BSD confirmed).
|
33
|
+
|
34
|
+
- Thread-safe by design.
|
35
|
+
|
36
|
+
- Distributed under the open source BSD license.
|
37
|
+
|
38
|
+
To install:
|
39
|
+
----
|
40
|
+
|
41
|
+
First install the capstone library from either https://github.com/aquynh/capstone
|
42
|
+
or http://www.capstone-engine.org
|
43
|
+
|
44
|
+
Then (until we publish a gem) clone the repo, then do this:
|
45
|
+
|
46
|
+
```bash
|
47
|
+
gem build crabstone.gemspec
|
48
|
+
gem install crabstone-3.0.3.gem
|
49
|
+
rake test
|
50
|
+
```
|
51
|
+
|
52
|
+
To write code:
|
53
|
+
----
|
54
|
+
|
55
|
+
Check the tests for more examples. Here is "Hello World":
|
56
|
+
```ruby
|
57
|
+
require 'crabstone'
|
58
|
+
include Crabstone
|
59
|
+
|
60
|
+
arm = (
|
61
|
+
"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22" <<
|
62
|
+
"\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
|
63
|
+
)
|
64
|
+
|
65
|
+
begin
|
66
|
+
|
67
|
+
cs = Disassembler.new(ARCH_ARM, MODE_ARM)
|
68
|
+
puts "Hello from Capstone v #{cs.version.join('.')}!"
|
69
|
+
puts "Disasm:"
|
70
|
+
|
71
|
+
begin
|
72
|
+
cs.disasm(arm, 0x1000).each {|i|
|
73
|
+
printf("0x%x:\t%s\t\t%s\n",i.address, i.mnemonic, i.op_str)
|
74
|
+
}
|
75
|
+
rescue
|
76
|
+
fail "Disassembly error: #{$!}"
|
77
|
+
ensure
|
78
|
+
cs.close
|
79
|
+
end
|
80
|
+
|
81
|
+
rescue
|
82
|
+
fail "Unable to open engine: #{$!}"
|
83
|
+
end
|
84
|
+
```
|
85
|
+
|
86
|
+
Interpreter Support:
|
87
|
+
----
|
88
|
+
|
89
|
+
I test with JRuby >= 1.7.8, MRI >= 2.0.0. If it doesn't work with any of those
|
90
|
+
it's a bug. If it doesn't work with like Rubinius or REE or 1.8 or whatever then
|
91
|
+
"patches welcome". ( AFAIK it does, actually, work with rbx )
|
92
|
+
|
93
|
+
Contributing:
|
94
|
+
----
|
95
|
+
|
96
|
+
If you feel like chipping in, especially with better tests or examples, or (please!!) documentation, fork and send me a pull req.
|
97
|
+
|
98
|
+
|
99
|
+
Library Author: Nguyen Anh Quynh
|
100
|
+
Binding Authors: Nguyen Anh Quynh, Tan Sheng Di, Ben Nagy
|
101
|
+
License: BSD style - details in the LICENSE file
|
102
|
+
(c) 2013 COSEINC. All Rights Reserved.
|
103
|
+
|