crabstone 3.0.3

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Files changed (302) hide show
  1. checksums.yaml +7 -0
  2. data/CHANGES.md +61 -0
  3. data/LICENSE +25 -0
  4. data/MANIFEST +312 -0
  5. data/README.md +103 -0
  6. data/Rakefile +27 -0
  7. data/bin/genconst +66 -0
  8. data/bin/genreg +99 -0
  9. data/crabstone.gemspec +27 -0
  10. data/examples/hello_world.rb +43 -0
  11. data/lib/arch/arm.rb +128 -0
  12. data/lib/arch/arm64.rb +167 -0
  13. data/lib/arch/arm64_const.rb +1055 -0
  14. data/lib/arch/arm64_registers.rb +295 -0
  15. data/lib/arch/arm_const.rb +777 -0
  16. data/lib/arch/arm_registers.rb +149 -0
  17. data/lib/arch/mips.rb +78 -0
  18. data/lib/arch/mips_const.rb +850 -0
  19. data/lib/arch/mips_registers.rb +208 -0
  20. data/lib/arch/ppc.rb +90 -0
  21. data/lib/arch/ppc_const.rb +1181 -0
  22. data/lib/arch/ppc_registers.rb +209 -0
  23. data/lib/arch/sparc.rb +79 -0
  24. data/lib/arch/sparc_const.rb +461 -0
  25. data/lib/arch/sparc_registers.rb +121 -0
  26. data/lib/arch/systemz.rb +79 -0
  27. data/lib/arch/sysz_const.rb +779 -0
  28. data/lib/arch/sysz_registers.rb +66 -0
  29. data/lib/arch/x86.rb +107 -0
  30. data/lib/arch/x86_const.rb +1698 -0
  31. data/lib/arch/x86_registers.rb +265 -0
  32. data/lib/arch/xcore.rb +78 -0
  33. data/lib/arch/xcore_const.rb +185 -0
  34. data/lib/arch/xcore_registers.rb +57 -0
  35. data/lib/crabstone.rb +564 -0
  36. data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
  37. data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
  38. data/test/MC/AArch64/neon-2velem.s.cs +113 -0
  39. data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
  40. data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
  41. data/test/MC/AArch64/neon-across.s.cs +40 -0
  42. data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
  43. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
  44. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
  45. data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
  46. data/test/MC/AArch64/neon-crypto.s.cs +15 -0
  47. data/test/MC/AArch64/neon-extract.s.cs +3 -0
  48. data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
  49. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
  50. data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
  51. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
  52. data/test/MC/AArch64/neon-max-min.s.cs +37 -0
  53. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
  54. data/test/MC/AArch64/neon-mov.s.cs +74 -0
  55. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
  56. data/test/MC/AArch64/neon-perm.s.cs +43 -0
  57. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
  58. data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
  59. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
  60. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
  61. data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
  62. data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
  63. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
  64. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
  65. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
  66. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
  67. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
  68. data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
  69. data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
  70. data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
  71. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
  72. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
  73. data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
  74. data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
  75. data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
  76. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
  77. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
  78. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
  79. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
  80. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
  81. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
  82. data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
  83. data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
  84. data/test/MC/AArch64/neon-shift.s.cs +22 -0
  85. data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
  86. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
  87. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
  88. data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
  89. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
  90. data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
  91. data/test/MC/AArch64/neon-tbl.s.cs +21 -0
  92. data/test/MC/AArch64/trace-regs.s.cs +383 -0
  93. data/test/MC/ARM/arm-aliases.s.cs +7 -0
  94. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
  95. data/test/MC/ARM/arm-it-block.s.cs +2 -0
  96. data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
  97. data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
  98. data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
  99. data/test/MC/ARM/arm-trustzone.s.cs +3 -0
  100. data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
  101. data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
  102. data/test/MC/ARM/arm_instructions.s.cs +25 -0
  103. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
  104. data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
  105. data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
  106. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
  107. data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
  108. data/test/MC/ARM/crc32-thumb.s.cs +7 -0
  109. data/test/MC/ARM/crc32.s.cs +7 -0
  110. data/test/MC/ARM/dot-req.s.cs +3 -0
  111. data/test/MC/ARM/fp-armv8.s.cs +52 -0
  112. data/test/MC/ARM/idiv-thumb.s.cs +3 -0
  113. data/test/MC/ARM/idiv.s.cs +3 -0
  114. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
  115. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
  116. data/test/MC/ARM/mode-switch.s.cs +7 -0
  117. data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
  118. data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
  119. data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
  120. data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
  121. data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
  122. data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
  123. data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
  124. data/test/MC/ARM/neon-crypto.s.cs +16 -0
  125. data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
  126. data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
  127. data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
  128. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
  129. data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
  130. data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
  131. data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
  132. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
  133. data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
  134. data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
  135. data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
  136. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
  137. data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
  138. data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
  139. data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
  140. data/test/MC/ARM/neon-v8.s.cs +38 -0
  141. data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
  142. data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
  143. data/test/MC/ARM/neon-vswp.s.cs +3 -0
  144. data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
  145. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
  146. data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
  147. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
  148. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
  149. data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
  150. data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
  151. data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
  152. data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
  153. data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
  154. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
  155. data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
  156. data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
  157. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
  158. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
  159. data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
  160. data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
  161. data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
  162. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
  163. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
  164. data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
  165. data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
  166. data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
  167. data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
  168. data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
  169. data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
  170. data/test/MC/ARM/thumb-hints.s.cs +12 -0
  171. data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
  172. data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
  173. data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
  174. data/test/MC/ARM/thumb.s.cs +19 -0
  175. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
  176. data/test/MC/ARM/thumb2-branches.s.cs +85 -0
  177. data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
  178. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
  179. data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
  180. data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
  181. data/test/MC/ARM/vfp4.s.cs +13 -0
  182. data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
  183. data/test/MC/ARM/vpush-vpop.s.cs +9 -0
  184. data/test/MC/Mips/hilo-addressing.s.cs +4 -0
  185. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
  186. data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
  187. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
  188. data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
  189. data/test/MC/Mips/micromips-expansions.s.cs +20 -0
  190. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
  191. data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
  192. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
  193. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
  194. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
  195. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
  196. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
  197. data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
  198. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
  199. data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
  200. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
  201. data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
  202. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
  203. data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
  204. data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
  205. data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
  206. data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
  207. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
  208. data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
  209. data/test/MC/Mips/mips-expansions.s.cs +20 -0
  210. data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
  211. data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
  212. data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
  213. data/test/MC/Mips/mips-register-names.s.cs +33 -0
  214. data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
  215. data/test/MC/Mips/mips64-instructions.s.cs +3 -0
  216. data/test/MC/Mips/mips64-register-names.s.cs +33 -0
  217. data/test/MC/Mips/mips_directives.s.cs +12 -0
  218. data/test/MC/Mips/nabi-regs.s.cs +12 -0
  219. data/test/MC/Mips/set-at-directive.s.cs +6 -0
  220. data/test/MC/Mips/test_2r.s.cs +16 -0
  221. data/test/MC/Mips/test_2rf.s.cs +33 -0
  222. data/test/MC/Mips/test_3r.s.cs +243 -0
  223. data/test/MC/Mips/test_3rf.s.cs +83 -0
  224. data/test/MC/Mips/test_bit.s.cs +49 -0
  225. data/test/MC/Mips/test_cbranch.s.cs +11 -0
  226. data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
  227. data/test/MC/Mips/test_elm.s.cs +16 -0
  228. data/test/MC/Mips/test_elm_insert.s.cs +4 -0
  229. data/test/MC/Mips/test_elm_insve.s.cs +5 -0
  230. data/test/MC/Mips/test_i10.s.cs +5 -0
  231. data/test/MC/Mips/test_i5.s.cs +45 -0
  232. data/test/MC/Mips/test_i8.s.cs +11 -0
  233. data/test/MC/Mips/test_lsa.s.cs +5 -0
  234. data/test/MC/Mips/test_mi10.s.cs +24 -0
  235. data/test/MC/Mips/test_vec.s.cs +8 -0
  236. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
  237. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
  238. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
  239. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
  240. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
  241. data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
  242. data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
  243. data/test/MC/README +6 -0
  244. data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
  245. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
  246. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
  247. data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
  248. data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
  249. data/test/MC/Sparc/sparc-vis.s.cs +2 -0
  250. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
  251. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
  252. data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
  253. data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
  254. data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
  255. data/test/MC/SystemZ/insn-good.s.cs +2265 -0
  256. data/test/MC/SystemZ/regs-good.s.cs +45 -0
  257. data/test/MC/X86/3DNow.s.cs +29 -0
  258. data/test/MC/X86/address-size.s.cs +5 -0
  259. data/test/MC/X86/avx512-encodings.s.cs +12 -0
  260. data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
  261. data/test/MC/X86/x86-32-avx.s.cs +833 -0
  262. data/test/MC/X86/x86-32-fma3.s.cs +169 -0
  263. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
  264. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
  265. data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
  266. data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
  267. data/test/MC/X86/x86_64-encoding.s.cs +59 -0
  268. data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
  269. data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
  270. data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
  271. data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
  272. data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
  273. data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
  274. data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
  275. data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
  276. data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
  277. data/test/README +6 -0
  278. data/test/test.rb +205 -0
  279. data/test/test.rb.SPEC +235 -0
  280. data/test/test_arm.rb +202 -0
  281. data/test/test_arm.rb.SPEC +275 -0
  282. data/test/test_arm64.rb +150 -0
  283. data/test/test_arm64.rb.SPEC +116 -0
  284. data/test/test_detail.rb +228 -0
  285. data/test/test_detail.rb.SPEC +322 -0
  286. data/test/test_exhaustive.rb +80 -0
  287. data/test/test_mips.rb +118 -0
  288. data/test/test_mips.rb.SPEC +91 -0
  289. data/test/test_ppc.rb +137 -0
  290. data/test/test_ppc.rb.SPEC +84 -0
  291. data/test/test_sanity.rb +83 -0
  292. data/test/test_skipdata.rb +111 -0
  293. data/test/test_skipdata.rb.SPEC +58 -0
  294. data/test/test_sparc.rb +113 -0
  295. data/test/test_sparc.rb.SPEC +116 -0
  296. data/test/test_sysz.rb +111 -0
  297. data/test/test_sysz.rb.SPEC +61 -0
  298. data/test/test_x86.rb +189 -0
  299. data/test/test_x86.rb.SPEC +579 -0
  300. data/test/test_xcore.rb +100 -0
  301. data/test/test_xcore.rb.SPEC +75 -0
  302. metadata +393 -0
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+ ---
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+ SHA1:
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+ metadata.gz: acf2c718e307944c7535140d1048d7bff42e35d3
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+ data.tar.gz: 60877a5b5d2cbc318431ae9c6019dcdd24e6b75b
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+ SHA512:
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+ metadata.gz: 5fc96a476ee596c02d0c60805e27348503aba244a910c3aa4fc8596590c1e9c337a5a8cebd9cb9df8551352f95d07b3d6f957b578b0f4620b25d3a5f6fb734ac
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@@ -0,0 +1,61 @@
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+ ## 0.0.1
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+ * Alpha release.
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+
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+ ## 0.0.2
5
+ * Update tests, add syntax sugar
6
+
7
+ ## 0.0.3
8
+ * Refactoring and cosmetics
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+
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+ ## 0.0.4
11
+ * Verify MIPS support, tests, slight API changes
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+
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+ ## 0.0.5
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+ * API changes including cs_errno.
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+
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+ ## 0.0.6
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+ * Final set of API changes before public beta.
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+
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+ ## 1.0.0
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+ * Move to new github repo
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+
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+ ## 2.0.0
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+ * Add PPC support
24
+ * Assorted API changes
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+ * disasm can now ONLY be used with a block ( hopefully fix later )
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+ * THIS IS A BREAKING CHANGE
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+
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+ ## 2.0.1
29
+ * Update X86 constants
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+
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+ ## 2.1rc1
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+ * Many constant changes
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+ * disasm CAN now return an Array, with a slightly scary built-in finalizer
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+
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+ ## 2.1.0
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+ * Full compliance with 2.1 API
37
+ * Better error handling for diet mode
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+ * Internally change cs_close() signature, so closed handles can't be used
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+
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+ ## 2.2.0
41
+ * Add support for Sparc and SystemZ
42
+
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+ ## 3.0rc1
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+ * Update for C side changes
45
+ * Add support for Xcore
46
+ * ARM, ARM64 and X86 passing, rest waiting for upstream
47
+
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+ ## 3.0rc3
49
+ * Generic groups ( CS_GRP_JUMP, CS_GRP_CALL etc)
50
+ * Mips 32R6 + MICRO
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+ * Many constant changes
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+ * PPC CRX operand
53
+ * X86: added prefixed symbols
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+ * THIS IS A BREAKING CHANGE ( even from rc1 )
55
+
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+ ## 3.0
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+ * See https://github.com/aquynh/capstone/wiki/ChangeLog-since-3.0-rc3
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+ * Shouldn't be breaking, most changes are internal.
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+
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+ ## 3.0.3-rc1
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+ * Internal binding updates, updated some test specs.
data/LICENSE ADDED
@@ -0,0 +1,25 @@
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+ Copyright (c) 2013 COSEINC. All Rights Reserved.
2
+
3
+ Redistribution and use in source and binary forms, with or without modification,
4
+ are permitted provided that the following conditions are met:
5
+
6
+ 1. Redistributions of source code must retain the above copyright notice, this
7
+ list of conditions and the following disclaimer.
8
+
9
+ 2. Redistributions in binary form must reproduce the above copyright notice,
10
+ this list of conditions and the following disclaimer in the documentation and/or
11
+ other materials provided with the distribution.
12
+
13
+ 3. The name of the author(s) may not be used to endorse or promote products
14
+ derived from this software without specific prior written permission.
15
+
16
+ THIS SOFTWARE IS PROVIDED BY COSEINC "AS IS" AND ANY EXPRESS OR IMPLIED
17
+ WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19
+ SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20
+ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21
+ OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24
+ IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25
+ OF SUCH DAMAGE.
@@ -0,0 +1,312 @@
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+ * CHANGES.md
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+ * MANIFEST
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+ * LICENSE
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+ * Rakefile
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+ * README.md
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+
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+ * examples/hello_world.rb
8
+
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+ * lib/arch/arm.rb
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+ * lib/arch/arm64.rb
11
+ * lib/arch/arm64_const.rb
12
+ * lib/arch/arm64_registers.rb
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+ * lib/arch/arm_const.rb
14
+ * lib/arch/arm_registers.rb
15
+ * lib/arch/const_gen
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+ * lib/arch/mips.rb
17
+ * lib/arch/mips_const.rb
18
+ * lib/arch/mips_registers.rb
19
+ * lib/arch/ppc.rb
20
+ * lib/arch/ppc_const.rb
21
+ * lib/arch/ppc_registers.rb
22
+ * lib/arch/sparc.rb
23
+ * lib/arch/sparc_const.rb
24
+ * lib/arch/sparc_registers.rb
25
+ * lib/arch/systemz.rb
26
+ * lib/arch/sysz_registers.rb
27
+ * lib/arch/sysz_const.rb
28
+ * lib/arch/x86.rb
29
+ * lib/arch/x86_const.rb
30
+ * lib/arch/x86_registers.rb
31
+ * lib/arch/xcore.rb
32
+ * lib/arch/xcore_const.rb
33
+ * lib/arch/xcore_registers.rb
34
+
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+ * lib/crabstone.rb
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+
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+ * test/test.rb
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+ * test/test.rb.SPEC
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+ * test/test_arm.rb
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+ * test/test_arm.rb.SPEC
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+ * test/test_arm64.rb
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+ * test/test_arm64.rb.SPEC
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+ * test/test_detail.rb
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+ * test/test_detail.rb.SPEC
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+ * test/test_exhaustive.rb
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+ * test/test_mips.rb
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+ * test/test_mips.rb.SPEC
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+ * test/test_ppc.rb
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+ * test/test_ppc.rb.SPEC
50
+ * test/test_sanity.rb
51
+ * test/test_skipdata.rb
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+ * test/test_skipdata.rb.SPEC
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+ * test/test_sparc.rb
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+ * test/test_sparc.rb.SPEC
55
+ * test/test_sysz.rb
56
+ * test/test_sysz.rb.SPEC
57
+ * test/test_x86.rb
58
+ * test/test_x86.rb.SPEC
59
+ * test/text_xcore.rb
60
+ * test/test_xcore.rb.SPEC
61
+
62
+ * test/MC/README
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+
64
+ * test/MC/AArch64/basic-a64-instructions.s.cs
65
+ * test/MC/AArch64/gicv3-regs.s.cs
66
+ * test/MC/AArch64/neon-2velem.s.cs
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+ * test/MC/AArch64/neon-3vdiff.s.cs
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+ * test/MC/AArch64/neon-aba-abd.s.cs
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+ * test/MC/AArch64/neon-across.s.cs
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+ * test/MC/AArch64/neon-add-pairwise.s.cs
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+ * test/MC/AArch64/neon-add-sub-instructions.s.cs
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+ * test/MC/AArch64/neon-bitwise-instructions.s.cs
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+ * test/MC/AArch64/neon-compare-instructions.s.cs
74
+ * test/MC/AArch64/neon-crypto.s.cs
75
+ * test/MC/AArch64/neon-extract.s.cs
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+ * test/MC/AArch64/neon-facge-facgt.s.cs
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+ * test/MC/AArch64/neon-frsqrt-frecp.s.cs
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+ * test/MC/AArch64/neon-halving-add-sub.s.cs
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+ * test/MC/AArch64/neon-max-min-pairwise.s.cs
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+ * test/MC/AArch64/neon-max-min.s.cs
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+ * test/MC/AArch64/neon-mla-mls-instructions.s.cs
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+ * test/MC/AArch64/neon-mov.s.cs
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+ * test/MC/AArch64/neon-mul-div-instructions.s.cs
84
+ * test/MC/AArch64/neon-perm.s.cs
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+ * test/MC/AArch64/neon-rounding-halving-add.s.cs
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+ * test/MC/AArch64/neon-rounding-shift.s.cs
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+ * test/MC/AArch64/neon-saturating-add-sub.s.cs
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+ * test/MC/AArch64/neon-saturating-rounding-shift.s.cs
89
+ * test/MC/AArch64/neon-saturating-shift.s.cs
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+ * test/MC/AArch64/neon-scalar-abs.s.cs
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+ * test/MC/AArch64/neon-scalar-add-sub.s.cs
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+ * test/MC/AArch64/neon-scalar-by-elem-mla.s.cs
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+ * test/MC/AArch64/neon-scalar-by-elem-mul.s.cs
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+ * test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs
95
+ * test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs
96
+ * test/MC/AArch64/neon-scalar-compare.s.cs
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+ * test/MC/AArch64/neon-scalar-cvt.s.cs
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+ * test/MC/AArch64/neon-scalar-dup.s.cs
99
+ * test/MC/AArch64/neon-scalar-extract-narrow.s.cs
100
+ * test/MC/AArch64/neon-scalar-fp-compare.s.cs
101
+ * test/MC/AArch64/neon-scalar-mul.s.cs
102
+ * test/MC/AArch64/neon-scalar-neg.s.cs
103
+ * test/MC/AArch64/neon-scalar-recip.s.cs
104
+ * test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs
105
+ * test/MC/AArch64/neon-scalar-rounding-shift.s.cs
106
+ * test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs
107
+ * test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs
108
+ * test/MC/AArch64/neon-scalar-saturating-shift.s.cs
109
+ * test/MC/AArch64/neon-scalar-shift-imm.s.cs
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+ * test/MC/AArch64/neon-scalar-shift.s.cs
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+ * test/MC/AArch64/neon-shift-left-long.s.cs
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+ * test/MC/AArch64/neon-shift.s.cs
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+ * test/MC/AArch64/neon-simd-copy.s.cs
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+ * test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs
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+ * test/MC/AArch64/neon-simd-ldst-one-elem.s.cs
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+ * test/MC/AArch64/neon-simd-misc.s.cs
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+ * test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs
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+ * test/MC/AArch64/neon-simd-shift.s.cs
119
+ * test/MC/AArch64/neon-tbl.s.cs
120
+ * test/MC/AArch64/trace-regs.s.cs
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+
122
+ * test/MC/ARM/arm-aliases.s.cs
123
+ * test/MC/ARM/arm-arithmetic-aliases.s.cs
124
+ * test/MC/ARM/arm-it-block.s.cs
125
+ * test/MC/ARM/arm-memory-instructions.s.cs
126
+ * test/MC/ARM/arm-shift-encoding.s.cs
127
+ * test/MC/ARM/arm-thumb-trustzone.s.cs
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+ * test/MC/ARM/arm-trustzone.s.cs
129
+ * test/MC/ARM/arm_addrmode2.s.cs
130
+ * test/MC/ARM/arm_addrmode3.s.cs
131
+ * test/MC/ARM/arm_instructions.s.cs
132
+ * test/MC/ARM/basic-arm-instructions-v8.s.cs
133
+ * test/MC/ARM/basic-arm-instructions.s.cs
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+ * test/MC/ARM/basic-thumb-instructions.s.cs
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+ * test/MC/ARM/basic-thumb2-instructions-v8.s.cs
136
+ * test/MC/ARM/basic-thumb2-instructions.s.cs
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+ * test/MC/ARM/crc32-thumb.s.cs
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+ * test/MC/ARM/crc32.s.cs
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+ * test/MC/ARM/dot-req.s.cs
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+ * test/MC/ARM/fp-armv8.s.cs
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+ * test/MC/ARM/idiv-thumb.s.cs
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+ * test/MC/ARM/idiv.s.cs
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+ * test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs
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+ * test/MC/ARM/load-store-acquire-release-v8.s.cs
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+ * test/MC/ARM/mode-switch.s.cs
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+ * test/MC/ARM/neon-abs-encoding.s.cs
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+ * test/MC/ARM/neon-absdiff-encoding.s.cs
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+ * test/MC/ARM/neon-add-encoding.s.cs
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+ * test/MC/ARM/neon-bitcount-encoding.s.cs
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+ * test/MC/ARM/neon-bitwise-encoding.s.cs
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+ * test/MC/ARM/neon-cmp-encoding.s.cs
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+ * test/MC/ARM/neon-convert-encoding.s.cs
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+ * test/MC/ARM/neon-crypto.s.cs
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+ * test/MC/ARM/neon-dup-encoding.s.cs
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+ * test/MC/ARM/neon-minmax-encoding.s.cs
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+ * test/MC/ARM/neon-mov-encoding.s.cs
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+ * test/MC/ARM/neon-mul-accum-encoding.s.cs
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+ * test/MC/ARM/neon-mul-encoding.s.cs
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+ * test/MC/ARM/neon-neg-encoding.s.cs
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+ * test/MC/ARM/neon-pairwise-encoding.s.cs
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+ * test/MC/ARM/neon-reciprocal-encoding.s.cs
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+ * test/MC/ARM/neon-reverse-encoding.s.cs
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+ * test/MC/ARM/neon-satshift-encoding.s.cs
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+ * test/MC/ARM/neon-shift-encoding.s.cs
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+ * test/MC/ARM/neon-shiftaccum-encoding.s.cs
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+ * test/MC/ARM/neon-shuffle-encoding.s.cs
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+ * test/MC/ARM/neon-sub-encoding.s.cs
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+ * test/MC/ARM/neon-table-encoding.s.cs
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+ * test/MC/ARM/neon-v8.s.cs
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+ * test/MC/ARM/neon-vld-encoding.s.cs
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+ * test/MC/ARM/neon-vst-encoding.s.cs
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+ * test/MC/ARM/neon-vswp.s.cs
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+ * test/MC/ARM/neont2-abs-encoding.s.cs
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+ * test/MC/ARM/neont2-absdiff-encoding.s.cs
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+ * test/MC/ARM/neont2-add-encoding.s.cs
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+ * test/MC/ARM/neont2-bitcount-encoding.s.cs
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+ * test/MC/ARM/neont2-bitwise-encoding.s.cs
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+ * test/MC/ARM/neont2-cmp-encoding.s.cs
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+ * test/MC/ARM/neont2-convert-encoding.s.cs
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+ * test/MC/ARM/neont2-dup-encoding.s.cs
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+ * test/MC/ARM/neont2-minmax-encoding.s.cs
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+ * test/MC/ARM/neont2-mov-encoding.s.cs
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+ * test/MC/ARM/neont2-mul-accum-encoding.s.cs
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+ * test/MC/ARM/neont2-mul-encoding.s.cs
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+ * test/MC/ARM/neont2-neg-encoding.s.cs
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+ * test/MC/ARM/neont2-pairwise-encoding.s.cs
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+ * test/MC/ARM/neont2-reciprocal-encoding.s.cs
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+ * test/MC/ARM/neont2-reverse-encoding.s.cs
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+ * test/MC/ARM/neont2-satshift-encoding.s.cs
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+ * test/MC/ARM/neont2-shift-encoding.s.cs
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+ * test/MC/ARM/neont2-shiftaccum-encoding.s.cs
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+ * test/MC/ARM/neont2-shuffle-encoding.s.cs
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+ * test/MC/ARM/neont2-sub-encoding.s.cs
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+ * test/MC/ARM/neont2-table-encoding.s.cs
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+ * test/MC/ARM/neont2-vld-encoding.s.cs
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+ * test/MC/ARM/neont2-vst-encoding.s.cs
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+ * test/MC/ARM/simple-fp-encoding.s.cs
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+ * test/MC/ARM/thumb-fp-armv8.s.cs
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+ * test/MC/ARM/thumb-hints.s.cs
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+ * test/MC/ARM/thumb-neon-crypto.s.cs
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+ * test/MC/ARM/thumb-neon-v8.s.cs
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+ * test/MC/ARM/thumb-shift-encoding.s.cs
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+ * test/MC/ARM/thumb.s.cs
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+ * test/MC/ARM/thumb2-b.w-encodingT4.s.cs
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+ * test/MC/ARM/thumb2-branches.s.cs
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+ * test/MC/ARM/thumb2-mclass.s.cs
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+ * test/MC/ARM/thumb2-narrow-dp.ll.cs
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+ * test/MC/ARM/thumb2-pldw.s.cs
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+ * test/MC/ARM/vfp4-thumb.s.cs
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+ * test/MC/ARM/vfp4.s.cs
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+ * test/MC/ARM/vpush-vpop-thumb.s.cs
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+ * test/MC/ARM/vpush-vpop.s.cs
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+
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+ * test/MC/Mips/hilo-addressing.s.cs
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+ * test/MC/Mips/micromips-alu-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-alu-instructions.s.cs
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+ * test/MC/Mips/micromips-branch-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-branch-instructions.s.cs
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+ * test/MC/Mips/micromips-expansions.s.cs
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+ * test/MC/Mips/micromips-jump-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-jump-instructions.s.cs
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+ * test/MC/Mips/micromips-loadstore-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-loadstore-instructions.s.cs
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+ * test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs
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+ * test/MC/Mips/micromips-loadstore-unaligned.s.cs
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+ * test/MC/Mips/micromips-movcond-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-movcond-instructions.s.cs
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+ * test/MC/Mips/micromips-multiply-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-multiply-instructions.s.cs
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+ * test/MC/Mips/micromips-shift-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-shift-instructions.s.cs
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+ * test/MC/Mips/micromips-trap-instructions-EB.s.cs
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+ * test/MC/Mips/micromips-trap-instructions.s.cs
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+ * test/MC/Mips/mips-alu-instructions.s.cs
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+ * test/MC/Mips/mips-control-instructions-64.s.cs
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+ * test/MC/Mips/mips-control-instructions.s.cs
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+ * test/MC/Mips/mips-coprocessor-encodings.s.cs
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+ * test/MC/Mips/mips-dsp-instructions.s.cs
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+ * test/MC/Mips/mips-expansions.s.cs
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+ * test/MC/Mips/mips-fpu-instructions.s.cs
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+ * test/MC/Mips/mips-jump-instructions.s.cs
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+ * test/MC/Mips/mips-memory-instructions.s.cs
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+ * test/MC/Mips/mips-register-names.s.cs
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+ * test/MC/Mips/mips64-alu-instructions.s.cs
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+ * test/MC/Mips/mips64-instructions.s.cs
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+ * test/MC/Mips/mips64-register-names.s.cs
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+ * test/MC/Mips/mips_directives.s.cs
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+ * test/MC/Mips/nabi-regs.s.cs
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+ * test/MC/Mips/set-at-directive.s.cs
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+ * test/MC/Mips/test_2r.s.cs
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+ * test/MC/Mips/test_2rf.s.cs
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+ * test/MC/Mips/test_3r.s.cs
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+ * test/MC/Mips/test_3rf.s.cs
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+ * test/MC/Mips/test_bit.s.cs
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+ * test/MC/Mips/test_cbranch.s.cs
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+ * test/MC/Mips/test_ctrlregs.s.cs
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+ * test/MC/Mips/test_elm.s.cs
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+ * test/MC/Mips/test_elm_insert.s.cs
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+ * test/MC/Mips/test_elm_insve.s.cs
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+ * test/MC/Mips/test_i10.s.cs
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+ * test/MC/Mips/test_i5.s.cs
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+ * test/MC/Mips/test_i8.s.cs
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+ * test/MC/Mips/test_lsa.s.cs
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+ * test/MC/Mips/test_mi10.s.cs
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+ * test/MC/Mips/test_vec.s.cs
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+
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+ * test/MC/PowerPC/ppc64-encoding-bookII.s.cs
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+ * test/MC/PowerPC/ppc64-encoding-bookIII.s.cs
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+ * test/MC/PowerPC/ppc64-encoding-ext.s.cs
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+ * test/MC/PowerPC/ppc64-encoding-fp.s.cs
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+ * test/MC/PowerPC/ppc64-encoding-vmx.s.cs
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+ * test/MC/PowerPC/ppc64-encoding.s.cs
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+ * test/MC/PowerPC/ppc64-operands.s.cs
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+
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+ * test/MC/Sparc/sparc-alu-instructions.s.cs
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+ * test/MC/Sparc/sparc-atomic-instructions.s.cs
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+ * test/MC/Sparc/sparc-ctrl-instructions.s.cs
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+ * test/MC/Sparc/sparc-fp-instructions.s.cs
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+ * test/MC/Sparc/sparc-mem-instructions.s.cs
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+ * test/MC/Sparc/sparc-vis.s.cs
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+ * test/MC/Sparc/sparc64-alu-instructions.s.cs
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+ * test/MC/Sparc/sparc64-ctrl-instructions.s.cs
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+ * test/MC/Sparc/sparcv8-instructions.s.cs
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+ * test/MC/Sparc/sparcv9-instructions.s.cs
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+
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+ * test/MC/SystemZ/insn-good-z196.s.cs
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+ * test/MC/SystemZ/insn-good.s.cs
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+ * test/MC/SystemZ/regs-good.s.cs
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+
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+ * test/MC/X86/3DNow.s.cs
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+ * test/MC/X86/address-size.s.cs
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+ * test/MC/X86/avx512-encodings.s.cs
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+ * test/MC/X86/intel-syntax-encoding.s.cs
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+ * test/MC/X86/x86-32-avx.s.cs
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+ * test/MC/X86/x86-32-fma3.s.cs
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+ * test/MC/X86/x86-32-ms-inline-asm.s.cs
297
+ * test/MC/X86/x86_64-avx-clmul-encoding.s.cs
298
+ * test/MC/X86/x86_64-avx-encoding.s.cs
299
+ * test/MC/X86/x86_64-bmi-encoding.s.cs
300
+ * test/MC/X86/x86_64-encoding.s.cs
301
+ * test/MC/X86/x86_64-fma3-encoding.s.cs
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+ * test/MC/X86/x86_64-fma4-encoding.s.cs
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+ * test/MC/X86/x86_64-hle-encoding.s.cs
304
+ * test/MC/X86/x86_64-imm-widths.s.cs
305
+ * test/MC/X86/x86_64-rand-encoding.s.cs
306
+ * test/MC/X86/x86_64-rtm-encoding.s.cs
307
+ * test/MC/X86/x86_64-sse4a.s.cs
308
+ * test/MC/X86/x86_64-tbm-encoding.s.cs
309
+ * test/MC/X86/x86_64-xop-encoding.s.cs
310
+
311
+ * bin/genconst
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+ * bin/genreg
@@ -0,0 +1,103 @@
1
+ crabstone
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+ ====
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+
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+ STATUS
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+ ===
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+
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+ Hopefully working.
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+
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+ Current Library binding: 3.0.3-rc1
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+ ----
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+
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+ ( FROM THE CAPSTONE README )
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+
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+ Capstone is a disassembly framework with the target of becoming the ultimate
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+ disasm engine for binary analysis and reversing in the security community.
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+
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+ Created by Nguyen Anh Quynh, then developed and maintained by a small community,
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+ Capstone offers some unparalleled features:
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+
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+ - Support multiple hardware architectures: ARM, ARM64 (aka ARMv8), Mips, X86, Sparc & SystemZ.
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+
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+ - Having clean/simple/lightweight/intuitive architecture-neutral API.
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+
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+ - Provide details on disassembled instruction (called “decomposer” by others).
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+
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+ - Provide semantics of the disassembled instruction, such as list of implicit
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+ registers read & written.
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+
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+ - Implemented in pure C language, with lightweight wrappers for C++, Python,
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+ Ruby, OCaml, C#, Java and Go available.
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+
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+ - Native support for Windows & *nix platforms (MacOSX, Linux & *BSD confirmed).
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+
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+ - Thread-safe by design.
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+
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+ - Distributed under the open source BSD license.
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+
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+ To install:
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+ ----
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+
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+ First install the capstone library from either https://github.com/aquynh/capstone
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+ or http://www.capstone-engine.org
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+
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+ Then (until we publish a gem) clone the repo, then do this:
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+
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+ ```bash
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+ gem build crabstone.gemspec
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+ gem install crabstone-3.0.3.gem
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+ rake test
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+ ```
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+
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+ To write code:
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+ ----
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+
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+ Check the tests for more examples. Here is "Hello World":
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+ ```ruby
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+ require 'crabstone'
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+ include Crabstone
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+
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+ arm = (
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+ "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22" <<
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+ "\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
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+ )
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+
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+ begin
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+
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+ cs = Disassembler.new(ARCH_ARM, MODE_ARM)
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+ puts "Hello from Capstone v #{cs.version.join('.')}!"
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+ puts "Disasm:"
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+
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+ begin
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+ cs.disasm(arm, 0x1000).each {|i|
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+ printf("0x%x:\t%s\t\t%s\n",i.address, i.mnemonic, i.op_str)
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+ }
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+ rescue
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+ fail "Disassembly error: #{$!}"
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+ ensure
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+ cs.close
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+ end
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+
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+ rescue
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+ fail "Unable to open engine: #{$!}"
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+ end
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+ ```
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+
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+ Interpreter Support:
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+ ----
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+
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+ I test with JRuby >= 1.7.8, MRI >= 2.0.0. If it doesn't work with any of those
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+ it's a bug. If it doesn't work with like Rubinius or REE or 1.8 or whatever then
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+ "patches welcome". ( AFAIK it does, actually, work with rbx )
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+
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+ Contributing:
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+ ----
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+
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+ If you feel like chipping in, especially with better tests or examples, or (please!!) documentation, fork and send me a pull req.
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+
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+
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+ Library Author: Nguyen Anh Quynh
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+ Binding Authors: Nguyen Anh Quynh, Tan Sheng Di, Ben Nagy
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+ License: BSD style - details in the LICENSE file
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+ (c) 2013 COSEINC. All Rights Reserved.
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+