crabstone 3.0.3
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +7 -0
- data/CHANGES.md +61 -0
- data/LICENSE +25 -0
- data/MANIFEST +312 -0
- data/README.md +103 -0
- data/Rakefile +27 -0
- data/bin/genconst +66 -0
- data/bin/genreg +99 -0
- data/crabstone.gemspec +27 -0
- data/examples/hello_world.rb +43 -0
- data/lib/arch/arm.rb +128 -0
- data/lib/arch/arm64.rb +167 -0
- data/lib/arch/arm64_const.rb +1055 -0
- data/lib/arch/arm64_registers.rb +295 -0
- data/lib/arch/arm_const.rb +777 -0
- data/lib/arch/arm_registers.rb +149 -0
- data/lib/arch/mips.rb +78 -0
- data/lib/arch/mips_const.rb +850 -0
- data/lib/arch/mips_registers.rb +208 -0
- data/lib/arch/ppc.rb +90 -0
- data/lib/arch/ppc_const.rb +1181 -0
- data/lib/arch/ppc_registers.rb +209 -0
- data/lib/arch/sparc.rb +79 -0
- data/lib/arch/sparc_const.rb +461 -0
- data/lib/arch/sparc_registers.rb +121 -0
- data/lib/arch/systemz.rb +79 -0
- data/lib/arch/sysz_const.rb +779 -0
- data/lib/arch/sysz_registers.rb +66 -0
- data/lib/arch/x86.rb +107 -0
- data/lib/arch/x86_const.rb +1698 -0
- data/lib/arch/x86_registers.rb +265 -0
- data/lib/arch/xcore.rb +78 -0
- data/lib/arch/xcore_const.rb +185 -0
- data/lib/arch/xcore_registers.rb +57 -0
- data/lib/crabstone.rb +564 -0
- data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
- data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
- data/test/MC/AArch64/neon-2velem.s.cs +113 -0
- data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
- data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
- data/test/MC/AArch64/neon-across.s.cs +40 -0
- data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
- data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
- data/test/MC/AArch64/neon-crypto.s.cs +15 -0
- data/test/MC/AArch64/neon-extract.s.cs +3 -0
- data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
- data/test/MC/AArch64/neon-max-min.s.cs +37 -0
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
- data/test/MC/AArch64/neon-mov.s.cs +74 -0
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
- data/test/MC/AArch64/neon-perm.s.cs +43 -0
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
- data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
- data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
- data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
- data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
- data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
- data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
- data/test/MC/AArch64/neon-shift.s.cs +22 -0
- data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
- data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
- data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
- data/test/MC/AArch64/neon-tbl.s.cs +21 -0
- data/test/MC/AArch64/trace-regs.s.cs +383 -0
- data/test/MC/ARM/arm-aliases.s.cs +7 -0
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
- data/test/MC/ARM/arm-it-block.s.cs +2 -0
- data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
- data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
- data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
- data/test/MC/ARM/arm_instructions.s.cs +25 -0
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
- data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
- data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
- data/test/MC/ARM/crc32-thumb.s.cs +7 -0
- data/test/MC/ARM/crc32.s.cs +7 -0
- data/test/MC/ARM/dot-req.s.cs +3 -0
- data/test/MC/ARM/fp-armv8.s.cs +52 -0
- data/test/MC/ARM/idiv-thumb.s.cs +3 -0
- data/test/MC/ARM/idiv.s.cs +3 -0
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
- data/test/MC/ARM/mode-switch.s.cs +7 -0
- data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
- data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
- data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
- data/test/MC/ARM/neon-crypto.s.cs +16 -0
- data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
- data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
- data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
- data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neon-v8.s.cs +38 -0
- data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
- data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
- data/test/MC/ARM/neon-vswp.s.cs +3 -0
- data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
- data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
- data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
- data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
- data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
- data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
- data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
- data/test/MC/ARM/thumb-hints.s.cs +12 -0
- data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
- data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
- data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
- data/test/MC/ARM/thumb.s.cs +19 -0
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
- data/test/MC/ARM/thumb2-branches.s.cs +85 -0
- data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
- data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
- data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
- data/test/MC/ARM/vfp4.s.cs +13 -0
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
- data/test/MC/ARM/vpush-vpop.s.cs +9 -0
- data/test/MC/Mips/hilo-addressing.s.cs +4 -0
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
- data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
- data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
- data/test/MC/Mips/micromips-expansions.s.cs +20 -0
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
- data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
- data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
- data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
- data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
- data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
- data/test/MC/Mips/mips-expansions.s.cs +20 -0
- data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
- data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
- data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
- data/test/MC/Mips/mips-register-names.s.cs +33 -0
- data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
- data/test/MC/Mips/mips64-instructions.s.cs +3 -0
- data/test/MC/Mips/mips64-register-names.s.cs +33 -0
- data/test/MC/Mips/mips_directives.s.cs +12 -0
- data/test/MC/Mips/nabi-regs.s.cs +12 -0
- data/test/MC/Mips/set-at-directive.s.cs +6 -0
- data/test/MC/Mips/test_2r.s.cs +16 -0
- data/test/MC/Mips/test_2rf.s.cs +33 -0
- data/test/MC/Mips/test_3r.s.cs +243 -0
- data/test/MC/Mips/test_3rf.s.cs +83 -0
- data/test/MC/Mips/test_bit.s.cs +49 -0
- data/test/MC/Mips/test_cbranch.s.cs +11 -0
- data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
- data/test/MC/Mips/test_elm.s.cs +16 -0
- data/test/MC/Mips/test_elm_insert.s.cs +4 -0
- data/test/MC/Mips/test_elm_insve.s.cs +5 -0
- data/test/MC/Mips/test_i10.s.cs +5 -0
- data/test/MC/Mips/test_i5.s.cs +45 -0
- data/test/MC/Mips/test_i8.s.cs +11 -0
- data/test/MC/Mips/test_lsa.s.cs +5 -0
- data/test/MC/Mips/test_mi10.s.cs +24 -0
- data/test/MC/Mips/test_vec.s.cs +8 -0
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
- data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
- data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
- data/test/MC/README +6 -0
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
- data/test/MC/Sparc/sparc-vis.s.cs +2 -0
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
- data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
- data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
- data/test/MC/SystemZ/insn-good.s.cs +2265 -0
- data/test/MC/SystemZ/regs-good.s.cs +45 -0
- data/test/MC/X86/3DNow.s.cs +29 -0
- data/test/MC/X86/address-size.s.cs +5 -0
- data/test/MC/X86/avx512-encodings.s.cs +12 -0
- data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
- data/test/MC/X86/x86-32-avx.s.cs +833 -0
- data/test/MC/X86/x86-32-fma3.s.cs +169 -0
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
- data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
- data/test/MC/X86/x86_64-encoding.s.cs +59 -0
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
- data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
- data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
- data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
- data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
- data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
- data/test/README +6 -0
- data/test/test.rb +205 -0
- data/test/test.rb.SPEC +235 -0
- data/test/test_arm.rb +202 -0
- data/test/test_arm.rb.SPEC +275 -0
- data/test/test_arm64.rb +150 -0
- data/test/test_arm64.rb.SPEC +116 -0
- data/test/test_detail.rb +228 -0
- data/test/test_detail.rb.SPEC +322 -0
- data/test/test_exhaustive.rb +80 -0
- data/test/test_mips.rb +118 -0
- data/test/test_mips.rb.SPEC +91 -0
- data/test/test_ppc.rb +137 -0
- data/test/test_ppc.rb.SPEC +84 -0
- data/test/test_sanity.rb +83 -0
- data/test/test_skipdata.rb +111 -0
- data/test/test_skipdata.rb.SPEC +58 -0
- data/test/test_sparc.rb +113 -0
- data/test/test_sparc.rb.SPEC +116 -0
- data/test/test_sysz.rb +111 -0
- data/test/test_sysz.rb.SPEC +61 -0
- data/test/test_x86.rb +189 -0
- data/test/test_x86.rb.SPEC +579 -0
- data/test/test_xcore.rb +100 -0
- data/test/test_xcore.rb.SPEC +75 -0
- metadata +393 -0
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# Library by Nguyen Anh Quynh
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# Original binding by Nguyen Anh Quynh and Tan Sheng Di
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# Additional binding work by Ben Nagy
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# (c) 2013 COSEINC. All Rights Reserved.
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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# Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
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# 2015-05-02T13:24:08+12:00
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module Crabstone
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module SysZ
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REG_LOOKUP = {
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'INVALID' => 0,
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'0' => 1,
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'1' => 2,
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'2' => 3,
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'3' => 4,
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'4' => 5,
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'5' => 6,
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'6' => 7,
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'7' => 8,
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'8' => 9,
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'9' => 10,
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'10' => 11,
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'11' => 12,
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'12' => 13,
|
27
|
+
'13' => 14,
|
28
|
+
'14' => 15,
|
29
|
+
'15' => 16,
|
30
|
+
'CC' => 17,
|
31
|
+
'F0' => 18,
|
32
|
+
'F1' => 19,
|
33
|
+
'F2' => 20,
|
34
|
+
'F3' => 21,
|
35
|
+
'F4' => 22,
|
36
|
+
'F5' => 23,
|
37
|
+
'F6' => 24,
|
38
|
+
'F7' => 25,
|
39
|
+
'F8' => 26,
|
40
|
+
'F9' => 27,
|
41
|
+
'F10' => 28,
|
42
|
+
'F11' => 29,
|
43
|
+
'F12' => 30,
|
44
|
+
'F13' => 31,
|
45
|
+
'F14' => 32,
|
46
|
+
'F15' => 33,
|
47
|
+
'R0L' => 34
|
48
|
+
}
|
49
|
+
|
50
|
+
ID_LOOKUP = REG_LOOKUP.invert
|
51
|
+
|
52
|
+
# alias registers
|
53
|
+
|
54
|
+
SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
|
55
|
+
|
56
|
+
def self.register reg
|
57
|
+
return reg if ID_LOOKUP[reg]
|
58
|
+
return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
|
59
|
+
if reg.respond_to? :upcase
|
60
|
+
return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
|
61
|
+
end
|
62
|
+
REG_LOOKUP['INVALID']
|
63
|
+
end
|
64
|
+
|
65
|
+
end
|
66
|
+
end
|
data/lib/arch/x86.rb
ADDED
@@ -0,0 +1,107 @@
|
|
1
|
+
# Library by Nguyen Anh Quynh
|
2
|
+
# Original binding by Nguyen Anh Quynh and Tan Sheng Di
|
3
|
+
# Additional binding work by Ben Nagy
|
4
|
+
# (c) 2013 COSEINC. All Rights Reserved.
|
5
|
+
|
6
|
+
require 'ffi'
|
7
|
+
|
8
|
+
require_relative 'x86_const'
|
9
|
+
|
10
|
+
module Crabstone
|
11
|
+
module X86
|
12
|
+
|
13
|
+
class MemoryOperand < FFI::Struct
|
14
|
+
layout(
|
15
|
+
:segment, :uint,
|
16
|
+
:base, :uint,
|
17
|
+
:index, :uint,
|
18
|
+
:scale, :int,
|
19
|
+
:disp, :int64
|
20
|
+
)
|
21
|
+
end
|
22
|
+
|
23
|
+
class OperandValue < FFI::Union
|
24
|
+
layout(
|
25
|
+
:reg, :uint,
|
26
|
+
:imm, :int64,
|
27
|
+
:fp, :double,
|
28
|
+
:mem, MemoryOperand
|
29
|
+
)
|
30
|
+
end
|
31
|
+
|
32
|
+
class Operand < FFI::Struct
|
33
|
+
layout(
|
34
|
+
:type, :uint,
|
35
|
+
:value, OperandValue,
|
36
|
+
:size, :uint8,
|
37
|
+
:avx_bcast, :uint,
|
38
|
+
:avx_zero_opmask, :bool
|
39
|
+
)
|
40
|
+
|
41
|
+
# A spoonful of sugar...
|
42
|
+
|
43
|
+
def value
|
44
|
+
case self[:type]
|
45
|
+
when OP_REG
|
46
|
+
self[:value][:reg]
|
47
|
+
when OP_IMM
|
48
|
+
self[:value][:imm]
|
49
|
+
when OP_MEM
|
50
|
+
self[:value][:mem]
|
51
|
+
when OP_FP
|
52
|
+
self[:value][:fp]
|
53
|
+
else
|
54
|
+
nil
|
55
|
+
end
|
56
|
+
end
|
57
|
+
|
58
|
+
def reg?
|
59
|
+
self[:type] == OP_REG
|
60
|
+
end
|
61
|
+
|
62
|
+
def imm?
|
63
|
+
self[:type] == OP_IMM
|
64
|
+
end
|
65
|
+
|
66
|
+
def mem?
|
67
|
+
self[:type] == OP_MEM
|
68
|
+
end
|
69
|
+
|
70
|
+
def fp?
|
71
|
+
self[:type] == OP_FP
|
72
|
+
end
|
73
|
+
|
74
|
+
def valid?
|
75
|
+
[OP_MEM, OP_IMM, OP_FP, OP_REG].include? self[:type]
|
76
|
+
end
|
77
|
+
|
78
|
+
end
|
79
|
+
|
80
|
+
class Instruction < FFI::Struct
|
81
|
+
|
82
|
+
layout(
|
83
|
+
:prefix, [:uint8, 4],
|
84
|
+
:opcode, [:uint8, 4],
|
85
|
+
:rex, :uint8,
|
86
|
+
:addr_size, :uint8,
|
87
|
+
:modrm, :uint8,
|
88
|
+
:sib, :uint8,
|
89
|
+
:disp, :int32,
|
90
|
+
:sib_index, :uint,
|
91
|
+
:sib_scale, :int8,
|
92
|
+
:sib_base, :uint,
|
93
|
+
:sse_cc, :uint,
|
94
|
+
:avx_cc, :uint,
|
95
|
+
:avx_sae, :bool,
|
96
|
+
:avx_rm, :uint,
|
97
|
+
:op_count, :uint8,
|
98
|
+
:operands, [Operand, 8]
|
99
|
+
)
|
100
|
+
|
101
|
+
def operands
|
102
|
+
self[:operands].first self[:op_count]
|
103
|
+
end
|
104
|
+
|
105
|
+
end
|
106
|
+
end
|
107
|
+
end
|
@@ -0,0 +1,1698 @@
|
|
1
|
+
# Library by Nguyen Anh Quynh
|
2
|
+
# Original binding by Nguyen Anh Quynh and Tan Sheng Di
|
3
|
+
# Additional binding work by Ben Nagy
|
4
|
+
# (c) 2013 COSEINC. All Rights Reserved.
|
5
|
+
|
6
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
7
|
+
# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
|
8
|
+
# 2015-05-02T13:24:01+12:00
|
9
|
+
|
10
|
+
module Crabstone
|
11
|
+
module X86
|
12
|
+
|
13
|
+
# X86 registers
|
14
|
+
|
15
|
+
REG_INVALID = 0
|
16
|
+
REG_AH = 1
|
17
|
+
REG_AL = 2
|
18
|
+
REG_AX = 3
|
19
|
+
REG_BH = 4
|
20
|
+
REG_BL = 5
|
21
|
+
REG_BP = 6
|
22
|
+
REG_BPL = 7
|
23
|
+
REG_BX = 8
|
24
|
+
REG_CH = 9
|
25
|
+
REG_CL = 10
|
26
|
+
REG_CS = 11
|
27
|
+
REG_CX = 12
|
28
|
+
REG_DH = 13
|
29
|
+
REG_DI = 14
|
30
|
+
REG_DIL = 15
|
31
|
+
REG_DL = 16
|
32
|
+
REG_DS = 17
|
33
|
+
REG_DX = 18
|
34
|
+
REG_EAX = 19
|
35
|
+
REG_EBP = 20
|
36
|
+
REG_EBX = 21
|
37
|
+
REG_ECX = 22
|
38
|
+
REG_EDI = 23
|
39
|
+
REG_EDX = 24
|
40
|
+
REG_EFLAGS = 25
|
41
|
+
REG_EIP = 26
|
42
|
+
REG_EIZ = 27
|
43
|
+
REG_ES = 28
|
44
|
+
REG_ESI = 29
|
45
|
+
REG_ESP = 30
|
46
|
+
REG_FPSW = 31
|
47
|
+
REG_FS = 32
|
48
|
+
REG_GS = 33
|
49
|
+
REG_IP = 34
|
50
|
+
REG_RAX = 35
|
51
|
+
REG_RBP = 36
|
52
|
+
REG_RBX = 37
|
53
|
+
REG_RCX = 38
|
54
|
+
REG_RDI = 39
|
55
|
+
REG_RDX = 40
|
56
|
+
REG_RIP = 41
|
57
|
+
REG_RIZ = 42
|
58
|
+
REG_RSI = 43
|
59
|
+
REG_RSP = 44
|
60
|
+
REG_SI = 45
|
61
|
+
REG_SIL = 46
|
62
|
+
REG_SP = 47
|
63
|
+
REG_SPL = 48
|
64
|
+
REG_SS = 49
|
65
|
+
REG_CR0 = 50
|
66
|
+
REG_CR1 = 51
|
67
|
+
REG_CR2 = 52
|
68
|
+
REG_CR3 = 53
|
69
|
+
REG_CR4 = 54
|
70
|
+
REG_CR5 = 55
|
71
|
+
REG_CR6 = 56
|
72
|
+
REG_CR7 = 57
|
73
|
+
REG_CR8 = 58
|
74
|
+
REG_CR9 = 59
|
75
|
+
REG_CR10 = 60
|
76
|
+
REG_CR11 = 61
|
77
|
+
REG_CR12 = 62
|
78
|
+
REG_CR13 = 63
|
79
|
+
REG_CR14 = 64
|
80
|
+
REG_CR15 = 65
|
81
|
+
REG_DR0 = 66
|
82
|
+
REG_DR1 = 67
|
83
|
+
REG_DR2 = 68
|
84
|
+
REG_DR3 = 69
|
85
|
+
REG_DR4 = 70
|
86
|
+
REG_DR5 = 71
|
87
|
+
REG_DR6 = 72
|
88
|
+
REG_DR7 = 73
|
89
|
+
REG_FP0 = 74
|
90
|
+
REG_FP1 = 75
|
91
|
+
REG_FP2 = 76
|
92
|
+
REG_FP3 = 77
|
93
|
+
REG_FP4 = 78
|
94
|
+
REG_FP5 = 79
|
95
|
+
REG_FP6 = 80
|
96
|
+
REG_FP7 = 81
|
97
|
+
REG_K0 = 82
|
98
|
+
REG_K1 = 83
|
99
|
+
REG_K2 = 84
|
100
|
+
REG_K3 = 85
|
101
|
+
REG_K4 = 86
|
102
|
+
REG_K5 = 87
|
103
|
+
REG_K6 = 88
|
104
|
+
REG_K7 = 89
|
105
|
+
REG_MM0 = 90
|
106
|
+
REG_MM1 = 91
|
107
|
+
REG_MM2 = 92
|
108
|
+
REG_MM3 = 93
|
109
|
+
REG_MM4 = 94
|
110
|
+
REG_MM5 = 95
|
111
|
+
REG_MM6 = 96
|
112
|
+
REG_MM7 = 97
|
113
|
+
REG_R8 = 98
|
114
|
+
REG_R9 = 99
|
115
|
+
REG_R10 = 100
|
116
|
+
REG_R11 = 101
|
117
|
+
REG_R12 = 102
|
118
|
+
REG_R13 = 103
|
119
|
+
REG_R14 = 104
|
120
|
+
REG_R15 = 105
|
121
|
+
REG_ST0 = 106
|
122
|
+
REG_ST1 = 107
|
123
|
+
REG_ST2 = 108
|
124
|
+
REG_ST3 = 109
|
125
|
+
REG_ST4 = 110
|
126
|
+
REG_ST5 = 111
|
127
|
+
REG_ST6 = 112
|
128
|
+
REG_ST7 = 113
|
129
|
+
REG_XMM0 = 114
|
130
|
+
REG_XMM1 = 115
|
131
|
+
REG_XMM2 = 116
|
132
|
+
REG_XMM3 = 117
|
133
|
+
REG_XMM4 = 118
|
134
|
+
REG_XMM5 = 119
|
135
|
+
REG_XMM6 = 120
|
136
|
+
REG_XMM7 = 121
|
137
|
+
REG_XMM8 = 122
|
138
|
+
REG_XMM9 = 123
|
139
|
+
REG_XMM10 = 124
|
140
|
+
REG_XMM11 = 125
|
141
|
+
REG_XMM12 = 126
|
142
|
+
REG_XMM13 = 127
|
143
|
+
REG_XMM14 = 128
|
144
|
+
REG_XMM15 = 129
|
145
|
+
REG_XMM16 = 130
|
146
|
+
REG_XMM17 = 131
|
147
|
+
REG_XMM18 = 132
|
148
|
+
REG_XMM19 = 133
|
149
|
+
REG_XMM20 = 134
|
150
|
+
REG_XMM21 = 135
|
151
|
+
REG_XMM22 = 136
|
152
|
+
REG_XMM23 = 137
|
153
|
+
REG_XMM24 = 138
|
154
|
+
REG_XMM25 = 139
|
155
|
+
REG_XMM26 = 140
|
156
|
+
REG_XMM27 = 141
|
157
|
+
REG_XMM28 = 142
|
158
|
+
REG_XMM29 = 143
|
159
|
+
REG_XMM30 = 144
|
160
|
+
REG_XMM31 = 145
|
161
|
+
REG_YMM0 = 146
|
162
|
+
REG_YMM1 = 147
|
163
|
+
REG_YMM2 = 148
|
164
|
+
REG_YMM3 = 149
|
165
|
+
REG_YMM4 = 150
|
166
|
+
REG_YMM5 = 151
|
167
|
+
REG_YMM6 = 152
|
168
|
+
REG_YMM7 = 153
|
169
|
+
REG_YMM8 = 154
|
170
|
+
REG_YMM9 = 155
|
171
|
+
REG_YMM10 = 156
|
172
|
+
REG_YMM11 = 157
|
173
|
+
REG_YMM12 = 158
|
174
|
+
REG_YMM13 = 159
|
175
|
+
REG_YMM14 = 160
|
176
|
+
REG_YMM15 = 161
|
177
|
+
REG_YMM16 = 162
|
178
|
+
REG_YMM17 = 163
|
179
|
+
REG_YMM18 = 164
|
180
|
+
REG_YMM19 = 165
|
181
|
+
REG_YMM20 = 166
|
182
|
+
REG_YMM21 = 167
|
183
|
+
REG_YMM22 = 168
|
184
|
+
REG_YMM23 = 169
|
185
|
+
REG_YMM24 = 170
|
186
|
+
REG_YMM25 = 171
|
187
|
+
REG_YMM26 = 172
|
188
|
+
REG_YMM27 = 173
|
189
|
+
REG_YMM28 = 174
|
190
|
+
REG_YMM29 = 175
|
191
|
+
REG_YMM30 = 176
|
192
|
+
REG_YMM31 = 177
|
193
|
+
REG_ZMM0 = 178
|
194
|
+
REG_ZMM1 = 179
|
195
|
+
REG_ZMM2 = 180
|
196
|
+
REG_ZMM3 = 181
|
197
|
+
REG_ZMM4 = 182
|
198
|
+
REG_ZMM5 = 183
|
199
|
+
REG_ZMM6 = 184
|
200
|
+
REG_ZMM7 = 185
|
201
|
+
REG_ZMM8 = 186
|
202
|
+
REG_ZMM9 = 187
|
203
|
+
REG_ZMM10 = 188
|
204
|
+
REG_ZMM11 = 189
|
205
|
+
REG_ZMM12 = 190
|
206
|
+
REG_ZMM13 = 191
|
207
|
+
REG_ZMM14 = 192
|
208
|
+
REG_ZMM15 = 193
|
209
|
+
REG_ZMM16 = 194
|
210
|
+
REG_ZMM17 = 195
|
211
|
+
REG_ZMM18 = 196
|
212
|
+
REG_ZMM19 = 197
|
213
|
+
REG_ZMM20 = 198
|
214
|
+
REG_ZMM21 = 199
|
215
|
+
REG_ZMM22 = 200
|
216
|
+
REG_ZMM23 = 201
|
217
|
+
REG_ZMM24 = 202
|
218
|
+
REG_ZMM25 = 203
|
219
|
+
REG_ZMM26 = 204
|
220
|
+
REG_ZMM27 = 205
|
221
|
+
REG_ZMM28 = 206
|
222
|
+
REG_ZMM29 = 207
|
223
|
+
REG_ZMM30 = 208
|
224
|
+
REG_ZMM31 = 209
|
225
|
+
REG_R8B = 210
|
226
|
+
REG_R9B = 211
|
227
|
+
REG_R10B = 212
|
228
|
+
REG_R11B = 213
|
229
|
+
REG_R12B = 214
|
230
|
+
REG_R13B = 215
|
231
|
+
REG_R14B = 216
|
232
|
+
REG_R15B = 217
|
233
|
+
REG_R8D = 218
|
234
|
+
REG_R9D = 219
|
235
|
+
REG_R10D = 220
|
236
|
+
REG_R11D = 221
|
237
|
+
REG_R12D = 222
|
238
|
+
REG_R13D = 223
|
239
|
+
REG_R14D = 224
|
240
|
+
REG_R15D = 225
|
241
|
+
REG_R8W = 226
|
242
|
+
REG_R9W = 227
|
243
|
+
REG_R10W = 228
|
244
|
+
REG_R11W = 229
|
245
|
+
REG_R12W = 230
|
246
|
+
REG_R13W = 231
|
247
|
+
REG_R14W = 232
|
248
|
+
REG_R15W = 233
|
249
|
+
REG_ENDING = 234
|
250
|
+
|
251
|
+
# Operand type for instruction's operands
|
252
|
+
|
253
|
+
OP_INVALID = 0
|
254
|
+
OP_REG = 1
|
255
|
+
OP_IMM = 2
|
256
|
+
OP_MEM = 3
|
257
|
+
OP_FP = 4
|
258
|
+
|
259
|
+
# AVX broadcast type
|
260
|
+
|
261
|
+
AVX_BCAST_INVALID = 0
|
262
|
+
AVX_BCAST_2 = 1
|
263
|
+
AVX_BCAST_4 = 2
|
264
|
+
AVX_BCAST_8 = 3
|
265
|
+
AVX_BCAST_16 = 4
|
266
|
+
|
267
|
+
# SSE Code Condition type
|
268
|
+
|
269
|
+
SSE_CC_INVALID = 0
|
270
|
+
SSE_CC_EQ = 1
|
271
|
+
SSE_CC_LT = 2
|
272
|
+
SSE_CC_LE = 3
|
273
|
+
SSE_CC_UNORD = 4
|
274
|
+
SSE_CC_NEQ = 5
|
275
|
+
SSE_CC_NLT = 6
|
276
|
+
SSE_CC_NLE = 7
|
277
|
+
SSE_CC_ORD = 8
|
278
|
+
SSE_CC_EQ_UQ = 9
|
279
|
+
SSE_CC_NGE = 10
|
280
|
+
SSE_CC_NGT = 11
|
281
|
+
SSE_CC_FALSE = 12
|
282
|
+
SSE_CC_NEQ_OQ = 13
|
283
|
+
SSE_CC_GE = 14
|
284
|
+
SSE_CC_GT = 15
|
285
|
+
SSE_CC_TRUE = 16
|
286
|
+
|
287
|
+
# AVX Code Condition type
|
288
|
+
|
289
|
+
AVX_CC_INVALID = 0
|
290
|
+
AVX_CC_EQ = 1
|
291
|
+
AVX_CC_LT = 2
|
292
|
+
AVX_CC_LE = 3
|
293
|
+
AVX_CC_UNORD = 4
|
294
|
+
AVX_CC_NEQ = 5
|
295
|
+
AVX_CC_NLT = 6
|
296
|
+
AVX_CC_NLE = 7
|
297
|
+
AVX_CC_ORD = 8
|
298
|
+
AVX_CC_EQ_UQ = 9
|
299
|
+
AVX_CC_NGE = 10
|
300
|
+
AVX_CC_NGT = 11
|
301
|
+
AVX_CC_FALSE = 12
|
302
|
+
AVX_CC_NEQ_OQ = 13
|
303
|
+
AVX_CC_GE = 14
|
304
|
+
AVX_CC_GT = 15
|
305
|
+
AVX_CC_TRUE = 16
|
306
|
+
AVX_CC_EQ_OS = 17
|
307
|
+
AVX_CC_LT_OQ = 18
|
308
|
+
AVX_CC_LE_OQ = 19
|
309
|
+
AVX_CC_UNORD_S = 20
|
310
|
+
AVX_CC_NEQ_US = 21
|
311
|
+
AVX_CC_NLT_UQ = 22
|
312
|
+
AVX_CC_NLE_UQ = 23
|
313
|
+
AVX_CC_ORD_S = 24
|
314
|
+
AVX_CC_EQ_US = 25
|
315
|
+
AVX_CC_NGE_UQ = 26
|
316
|
+
AVX_CC_NGT_UQ = 27
|
317
|
+
AVX_CC_FALSE_OS = 28
|
318
|
+
AVX_CC_NEQ_OS = 29
|
319
|
+
AVX_CC_GE_OQ = 30
|
320
|
+
AVX_CC_GT_OQ = 31
|
321
|
+
AVX_CC_TRUE_US = 32
|
322
|
+
|
323
|
+
# AVX static rounding mode type
|
324
|
+
|
325
|
+
AVX_RM_INVALID = 0
|
326
|
+
AVX_RM_RN = 1
|
327
|
+
AVX_RM_RD = 2
|
328
|
+
AVX_RM_RU = 3
|
329
|
+
AVX_RM_RZ = 4
|
330
|
+
|
331
|
+
# Instruction prefixes - to be used in cs_x86.prefix[]
|
332
|
+
PREFIX_LOCK = 0xf0
|
333
|
+
PREFIX_REP = 0xf3
|
334
|
+
PREFIX_REPNE = 0xf2
|
335
|
+
PREFIX_CS = 0x2e
|
336
|
+
PREFIX_SS = 0x36
|
337
|
+
PREFIX_DS = 0x3e
|
338
|
+
PREFIX_ES = 0x26
|
339
|
+
PREFIX_FS = 0x64
|
340
|
+
PREFIX_GS = 0x65
|
341
|
+
PREFIX_OPSIZE = 0x66
|
342
|
+
PREFIX_ADDRSIZE = 0x67
|
343
|
+
|
344
|
+
# X86 instructions
|
345
|
+
|
346
|
+
INS_INVALID = 0
|
347
|
+
INS_AAA = 1
|
348
|
+
INS_AAD = 2
|
349
|
+
INS_AAM = 3
|
350
|
+
INS_AAS = 4
|
351
|
+
INS_FABS = 5
|
352
|
+
INS_ADC = 6
|
353
|
+
INS_ADCX = 7
|
354
|
+
INS_ADD = 8
|
355
|
+
INS_ADDPD = 9
|
356
|
+
INS_ADDPS = 10
|
357
|
+
INS_ADDSD = 11
|
358
|
+
INS_ADDSS = 12
|
359
|
+
INS_ADDSUBPD = 13
|
360
|
+
INS_ADDSUBPS = 14
|
361
|
+
INS_FADD = 15
|
362
|
+
INS_FIADD = 16
|
363
|
+
INS_FADDP = 17
|
364
|
+
INS_ADOX = 18
|
365
|
+
INS_AESDECLAST = 19
|
366
|
+
INS_AESDEC = 20
|
367
|
+
INS_AESENCLAST = 21
|
368
|
+
INS_AESENC = 22
|
369
|
+
INS_AESIMC = 23
|
370
|
+
INS_AESKEYGENASSIST = 24
|
371
|
+
INS_AND = 25
|
372
|
+
INS_ANDN = 26
|
373
|
+
INS_ANDNPD = 27
|
374
|
+
INS_ANDNPS = 28
|
375
|
+
INS_ANDPD = 29
|
376
|
+
INS_ANDPS = 30
|
377
|
+
INS_ARPL = 31
|
378
|
+
INS_BEXTR = 32
|
379
|
+
INS_BLCFILL = 33
|
380
|
+
INS_BLCI = 34
|
381
|
+
INS_BLCIC = 35
|
382
|
+
INS_BLCMSK = 36
|
383
|
+
INS_BLCS = 37
|
384
|
+
INS_BLENDPD = 38
|
385
|
+
INS_BLENDPS = 39
|
386
|
+
INS_BLENDVPD = 40
|
387
|
+
INS_BLENDVPS = 41
|
388
|
+
INS_BLSFILL = 42
|
389
|
+
INS_BLSI = 43
|
390
|
+
INS_BLSIC = 44
|
391
|
+
INS_BLSMSK = 45
|
392
|
+
INS_BLSR = 46
|
393
|
+
INS_BOUND = 47
|
394
|
+
INS_BSF = 48
|
395
|
+
INS_BSR = 49
|
396
|
+
INS_BSWAP = 50
|
397
|
+
INS_BT = 51
|
398
|
+
INS_BTC = 52
|
399
|
+
INS_BTR = 53
|
400
|
+
INS_BTS = 54
|
401
|
+
INS_BZHI = 55
|
402
|
+
INS_CALL = 56
|
403
|
+
INS_CBW = 57
|
404
|
+
INS_CDQ = 58
|
405
|
+
INS_CDQE = 59
|
406
|
+
INS_FCHS = 60
|
407
|
+
INS_CLAC = 61
|
408
|
+
INS_CLC = 62
|
409
|
+
INS_CLD = 63
|
410
|
+
INS_CLFLUSH = 64
|
411
|
+
INS_CLGI = 65
|
412
|
+
INS_CLI = 66
|
413
|
+
INS_CLTS = 67
|
414
|
+
INS_CMC = 68
|
415
|
+
INS_CMOVA = 69
|
416
|
+
INS_CMOVAE = 70
|
417
|
+
INS_CMOVB = 71
|
418
|
+
INS_CMOVBE = 72
|
419
|
+
INS_FCMOVBE = 73
|
420
|
+
INS_FCMOVB = 74
|
421
|
+
INS_CMOVE = 75
|
422
|
+
INS_FCMOVE = 76
|
423
|
+
INS_CMOVG = 77
|
424
|
+
INS_CMOVGE = 78
|
425
|
+
INS_CMOVL = 79
|
426
|
+
INS_CMOVLE = 80
|
427
|
+
INS_FCMOVNBE = 81
|
428
|
+
INS_FCMOVNB = 82
|
429
|
+
INS_CMOVNE = 83
|
430
|
+
INS_FCMOVNE = 84
|
431
|
+
INS_CMOVNO = 85
|
432
|
+
INS_CMOVNP = 86
|
433
|
+
INS_FCMOVNU = 87
|
434
|
+
INS_CMOVNS = 88
|
435
|
+
INS_CMOVO = 89
|
436
|
+
INS_CMOVP = 90
|
437
|
+
INS_FCMOVU = 91
|
438
|
+
INS_CMOVS = 92
|
439
|
+
INS_CMP = 93
|
440
|
+
INS_CMPPD = 94
|
441
|
+
INS_CMPPS = 95
|
442
|
+
INS_CMPSB = 96
|
443
|
+
INS_CMPSD = 97
|
444
|
+
INS_CMPSQ = 98
|
445
|
+
INS_CMPSS = 99
|
446
|
+
INS_CMPSW = 100
|
447
|
+
INS_CMPXCHG16B = 101
|
448
|
+
INS_CMPXCHG = 102
|
449
|
+
INS_CMPXCHG8B = 103
|
450
|
+
INS_COMISD = 104
|
451
|
+
INS_COMISS = 105
|
452
|
+
INS_FCOMP = 106
|
453
|
+
INS_FCOMPI = 107
|
454
|
+
INS_FCOMI = 108
|
455
|
+
INS_FCOM = 109
|
456
|
+
INS_FCOS = 110
|
457
|
+
INS_CPUID = 111
|
458
|
+
INS_CQO = 112
|
459
|
+
INS_CRC32 = 113
|
460
|
+
INS_CVTDQ2PD = 114
|
461
|
+
INS_CVTDQ2PS = 115
|
462
|
+
INS_CVTPD2DQ = 116
|
463
|
+
INS_CVTPD2PS = 117
|
464
|
+
INS_CVTPS2DQ = 118
|
465
|
+
INS_CVTPS2PD = 119
|
466
|
+
INS_CVTSD2SI = 120
|
467
|
+
INS_CVTSD2SS = 121
|
468
|
+
INS_CVTSI2SD = 122
|
469
|
+
INS_CVTSI2SS = 123
|
470
|
+
INS_CVTSS2SD = 124
|
471
|
+
INS_CVTSS2SI = 125
|
472
|
+
INS_CVTTPD2DQ = 126
|
473
|
+
INS_CVTTPS2DQ = 127
|
474
|
+
INS_CVTTSD2SI = 128
|
475
|
+
INS_CVTTSS2SI = 129
|
476
|
+
INS_CWD = 130
|
477
|
+
INS_CWDE = 131
|
478
|
+
INS_DAA = 132
|
479
|
+
INS_DAS = 133
|
480
|
+
INS_DATA16 = 134
|
481
|
+
INS_DEC = 135
|
482
|
+
INS_DIV = 136
|
483
|
+
INS_DIVPD = 137
|
484
|
+
INS_DIVPS = 138
|
485
|
+
INS_FDIVR = 139
|
486
|
+
INS_FIDIVR = 140
|
487
|
+
INS_FDIVRP = 141
|
488
|
+
INS_DIVSD = 142
|
489
|
+
INS_DIVSS = 143
|
490
|
+
INS_FDIV = 144
|
491
|
+
INS_FIDIV = 145
|
492
|
+
INS_FDIVP = 146
|
493
|
+
INS_DPPD = 147
|
494
|
+
INS_DPPS = 148
|
495
|
+
INS_RET = 149
|
496
|
+
INS_ENCLS = 150
|
497
|
+
INS_ENCLU = 151
|
498
|
+
INS_ENTER = 152
|
499
|
+
INS_EXTRACTPS = 153
|
500
|
+
INS_EXTRQ = 154
|
501
|
+
INS_F2XM1 = 155
|
502
|
+
INS_LCALL = 156
|
503
|
+
INS_LJMP = 157
|
504
|
+
INS_FBLD = 158
|
505
|
+
INS_FBSTP = 159
|
506
|
+
INS_FCOMPP = 160
|
507
|
+
INS_FDECSTP = 161
|
508
|
+
INS_FEMMS = 162
|
509
|
+
INS_FFREE = 163
|
510
|
+
INS_FICOM = 164
|
511
|
+
INS_FICOMP = 165
|
512
|
+
INS_FINCSTP = 166
|
513
|
+
INS_FLDCW = 167
|
514
|
+
INS_FLDENV = 168
|
515
|
+
INS_FLDL2E = 169
|
516
|
+
INS_FLDL2T = 170
|
517
|
+
INS_FLDLG2 = 171
|
518
|
+
INS_FLDLN2 = 172
|
519
|
+
INS_FLDPI = 173
|
520
|
+
INS_FNCLEX = 174
|
521
|
+
INS_FNINIT = 175
|
522
|
+
INS_FNOP = 176
|
523
|
+
INS_FNSTCW = 177
|
524
|
+
INS_FNSTSW = 178
|
525
|
+
INS_FPATAN = 179
|
526
|
+
INS_FPREM = 180
|
527
|
+
INS_FPREM1 = 181
|
528
|
+
INS_FPTAN = 182
|
529
|
+
INS_FRNDINT = 183
|
530
|
+
INS_FRSTOR = 184
|
531
|
+
INS_FNSAVE = 185
|
532
|
+
INS_FSCALE = 186
|
533
|
+
INS_FSETPM = 187
|
534
|
+
INS_FSINCOS = 188
|
535
|
+
INS_FNSTENV = 189
|
536
|
+
INS_FXAM = 190
|
537
|
+
INS_FXRSTOR = 191
|
538
|
+
INS_FXRSTOR64 = 192
|
539
|
+
INS_FXSAVE = 193
|
540
|
+
INS_FXSAVE64 = 194
|
541
|
+
INS_FXTRACT = 195
|
542
|
+
INS_FYL2X = 196
|
543
|
+
INS_FYL2XP1 = 197
|
544
|
+
INS_MOVAPD = 198
|
545
|
+
INS_MOVAPS = 199
|
546
|
+
INS_ORPD = 200
|
547
|
+
INS_ORPS = 201
|
548
|
+
INS_VMOVAPD = 202
|
549
|
+
INS_VMOVAPS = 203
|
550
|
+
INS_XORPD = 204
|
551
|
+
INS_XORPS = 205
|
552
|
+
INS_GETSEC = 206
|
553
|
+
INS_HADDPD = 207
|
554
|
+
INS_HADDPS = 208
|
555
|
+
INS_HLT = 209
|
556
|
+
INS_HSUBPD = 210
|
557
|
+
INS_HSUBPS = 211
|
558
|
+
INS_IDIV = 212
|
559
|
+
INS_FILD = 213
|
560
|
+
INS_IMUL = 214
|
561
|
+
INS_IN = 215
|
562
|
+
INS_INC = 216
|
563
|
+
INS_INSB = 217
|
564
|
+
INS_INSERTPS = 218
|
565
|
+
INS_INSERTQ = 219
|
566
|
+
INS_INSD = 220
|
567
|
+
INS_INSW = 221
|
568
|
+
INS_INT = 222
|
569
|
+
INS_INT1 = 223
|
570
|
+
INS_INT3 = 224
|
571
|
+
INS_INTO = 225
|
572
|
+
INS_INVD = 226
|
573
|
+
INS_INVEPT = 227
|
574
|
+
INS_INVLPG = 228
|
575
|
+
INS_INVLPGA = 229
|
576
|
+
INS_INVPCID = 230
|
577
|
+
INS_INVVPID = 231
|
578
|
+
INS_IRET = 232
|
579
|
+
INS_IRETD = 233
|
580
|
+
INS_IRETQ = 234
|
581
|
+
INS_FISTTP = 235
|
582
|
+
INS_FIST = 236
|
583
|
+
INS_FISTP = 237
|
584
|
+
INS_UCOMISD = 238
|
585
|
+
INS_UCOMISS = 239
|
586
|
+
INS_VCMP = 240
|
587
|
+
INS_VCOMISD = 241
|
588
|
+
INS_VCOMISS = 242
|
589
|
+
INS_VCVTSD2SS = 243
|
590
|
+
INS_VCVTSI2SD = 244
|
591
|
+
INS_VCVTSI2SS = 245
|
592
|
+
INS_VCVTSS2SD = 246
|
593
|
+
INS_VCVTTSD2SI = 247
|
594
|
+
INS_VCVTTSD2USI = 248
|
595
|
+
INS_VCVTTSS2SI = 249
|
596
|
+
INS_VCVTTSS2USI = 250
|
597
|
+
INS_VCVTUSI2SD = 251
|
598
|
+
INS_VCVTUSI2SS = 252
|
599
|
+
INS_VUCOMISD = 253
|
600
|
+
INS_VUCOMISS = 254
|
601
|
+
INS_JAE = 255
|
602
|
+
INS_JA = 256
|
603
|
+
INS_JBE = 257
|
604
|
+
INS_JB = 258
|
605
|
+
INS_JCXZ = 259
|
606
|
+
INS_JECXZ = 260
|
607
|
+
INS_JE = 261
|
608
|
+
INS_JGE = 262
|
609
|
+
INS_JG = 263
|
610
|
+
INS_JLE = 264
|
611
|
+
INS_JL = 265
|
612
|
+
INS_JMP = 266
|
613
|
+
INS_JNE = 267
|
614
|
+
INS_JNO = 268
|
615
|
+
INS_JNP = 269
|
616
|
+
INS_JNS = 270
|
617
|
+
INS_JO = 271
|
618
|
+
INS_JP = 272
|
619
|
+
INS_JRCXZ = 273
|
620
|
+
INS_JS = 274
|
621
|
+
INS_KANDB = 275
|
622
|
+
INS_KANDD = 276
|
623
|
+
INS_KANDNB = 277
|
624
|
+
INS_KANDND = 278
|
625
|
+
INS_KANDNQ = 279
|
626
|
+
INS_KANDNW = 280
|
627
|
+
INS_KANDQ = 281
|
628
|
+
INS_KANDW = 282
|
629
|
+
INS_KMOVB = 283
|
630
|
+
INS_KMOVD = 284
|
631
|
+
INS_KMOVQ = 285
|
632
|
+
INS_KMOVW = 286
|
633
|
+
INS_KNOTB = 287
|
634
|
+
INS_KNOTD = 288
|
635
|
+
INS_KNOTQ = 289
|
636
|
+
INS_KNOTW = 290
|
637
|
+
INS_KORB = 291
|
638
|
+
INS_KORD = 292
|
639
|
+
INS_KORQ = 293
|
640
|
+
INS_KORTESTW = 294
|
641
|
+
INS_KORW = 295
|
642
|
+
INS_KSHIFTLW = 296
|
643
|
+
INS_KSHIFTRW = 297
|
644
|
+
INS_KUNPCKBW = 298
|
645
|
+
INS_KXNORB = 299
|
646
|
+
INS_KXNORD = 300
|
647
|
+
INS_KXNORQ = 301
|
648
|
+
INS_KXNORW = 302
|
649
|
+
INS_KXORB = 303
|
650
|
+
INS_KXORD = 304
|
651
|
+
INS_KXORQ = 305
|
652
|
+
INS_KXORW = 306
|
653
|
+
INS_LAHF = 307
|
654
|
+
INS_LAR = 308
|
655
|
+
INS_LDDQU = 309
|
656
|
+
INS_LDMXCSR = 310
|
657
|
+
INS_LDS = 311
|
658
|
+
INS_FLDZ = 312
|
659
|
+
INS_FLD1 = 313
|
660
|
+
INS_FLD = 314
|
661
|
+
INS_LEA = 315
|
662
|
+
INS_LEAVE = 316
|
663
|
+
INS_LES = 317
|
664
|
+
INS_LFENCE = 318
|
665
|
+
INS_LFS = 319
|
666
|
+
INS_LGDT = 320
|
667
|
+
INS_LGS = 321
|
668
|
+
INS_LIDT = 322
|
669
|
+
INS_LLDT = 323
|
670
|
+
INS_LMSW = 324
|
671
|
+
INS_OR = 325
|
672
|
+
INS_SUB = 326
|
673
|
+
INS_XOR = 327
|
674
|
+
INS_LODSB = 328
|
675
|
+
INS_LODSD = 329
|
676
|
+
INS_LODSQ = 330
|
677
|
+
INS_LODSW = 331
|
678
|
+
INS_LOOP = 332
|
679
|
+
INS_LOOPE = 333
|
680
|
+
INS_LOOPNE = 334
|
681
|
+
INS_RETF = 335
|
682
|
+
INS_RETFQ = 336
|
683
|
+
INS_LSL = 337
|
684
|
+
INS_LSS = 338
|
685
|
+
INS_LTR = 339
|
686
|
+
INS_XADD = 340
|
687
|
+
INS_LZCNT = 341
|
688
|
+
INS_MASKMOVDQU = 342
|
689
|
+
INS_MAXPD = 343
|
690
|
+
INS_MAXPS = 344
|
691
|
+
INS_MAXSD = 345
|
692
|
+
INS_MAXSS = 346
|
693
|
+
INS_MFENCE = 347
|
694
|
+
INS_MINPD = 348
|
695
|
+
INS_MINPS = 349
|
696
|
+
INS_MINSD = 350
|
697
|
+
INS_MINSS = 351
|
698
|
+
INS_CVTPD2PI = 352
|
699
|
+
INS_CVTPI2PD = 353
|
700
|
+
INS_CVTPI2PS = 354
|
701
|
+
INS_CVTPS2PI = 355
|
702
|
+
INS_CVTTPD2PI = 356
|
703
|
+
INS_CVTTPS2PI = 357
|
704
|
+
INS_EMMS = 358
|
705
|
+
INS_MASKMOVQ = 359
|
706
|
+
INS_MOVD = 360
|
707
|
+
INS_MOVDQ2Q = 361
|
708
|
+
INS_MOVNTQ = 362
|
709
|
+
INS_MOVQ2DQ = 363
|
710
|
+
INS_MOVQ = 364
|
711
|
+
INS_PABSB = 365
|
712
|
+
INS_PABSD = 366
|
713
|
+
INS_PABSW = 367
|
714
|
+
INS_PACKSSDW = 368
|
715
|
+
INS_PACKSSWB = 369
|
716
|
+
INS_PACKUSWB = 370
|
717
|
+
INS_PADDB = 371
|
718
|
+
INS_PADDD = 372
|
719
|
+
INS_PADDQ = 373
|
720
|
+
INS_PADDSB = 374
|
721
|
+
INS_PADDSW = 375
|
722
|
+
INS_PADDUSB = 376
|
723
|
+
INS_PADDUSW = 377
|
724
|
+
INS_PADDW = 378
|
725
|
+
INS_PALIGNR = 379
|
726
|
+
INS_PANDN = 380
|
727
|
+
INS_PAND = 381
|
728
|
+
INS_PAVGB = 382
|
729
|
+
INS_PAVGW = 383
|
730
|
+
INS_PCMPEQB = 384
|
731
|
+
INS_PCMPEQD = 385
|
732
|
+
INS_PCMPEQW = 386
|
733
|
+
INS_PCMPGTB = 387
|
734
|
+
INS_PCMPGTD = 388
|
735
|
+
INS_PCMPGTW = 389
|
736
|
+
INS_PEXTRW = 390
|
737
|
+
INS_PHADDSW = 391
|
738
|
+
INS_PHADDW = 392
|
739
|
+
INS_PHADDD = 393
|
740
|
+
INS_PHSUBD = 394
|
741
|
+
INS_PHSUBSW = 395
|
742
|
+
INS_PHSUBW = 396
|
743
|
+
INS_PINSRW = 397
|
744
|
+
INS_PMADDUBSW = 398
|
745
|
+
INS_PMADDWD = 399
|
746
|
+
INS_PMAXSW = 400
|
747
|
+
INS_PMAXUB = 401
|
748
|
+
INS_PMINSW = 402
|
749
|
+
INS_PMINUB = 403
|
750
|
+
INS_PMOVMSKB = 404
|
751
|
+
INS_PMULHRSW = 405
|
752
|
+
INS_PMULHUW = 406
|
753
|
+
INS_PMULHW = 407
|
754
|
+
INS_PMULLW = 408
|
755
|
+
INS_PMULUDQ = 409
|
756
|
+
INS_POR = 410
|
757
|
+
INS_PSADBW = 411
|
758
|
+
INS_PSHUFB = 412
|
759
|
+
INS_PSHUFW = 413
|
760
|
+
INS_PSIGNB = 414
|
761
|
+
INS_PSIGND = 415
|
762
|
+
INS_PSIGNW = 416
|
763
|
+
INS_PSLLD = 417
|
764
|
+
INS_PSLLQ = 418
|
765
|
+
INS_PSLLW = 419
|
766
|
+
INS_PSRAD = 420
|
767
|
+
INS_PSRAW = 421
|
768
|
+
INS_PSRLD = 422
|
769
|
+
INS_PSRLQ = 423
|
770
|
+
INS_PSRLW = 424
|
771
|
+
INS_PSUBB = 425
|
772
|
+
INS_PSUBD = 426
|
773
|
+
INS_PSUBQ = 427
|
774
|
+
INS_PSUBSB = 428
|
775
|
+
INS_PSUBSW = 429
|
776
|
+
INS_PSUBUSB = 430
|
777
|
+
INS_PSUBUSW = 431
|
778
|
+
INS_PSUBW = 432
|
779
|
+
INS_PUNPCKHBW = 433
|
780
|
+
INS_PUNPCKHDQ = 434
|
781
|
+
INS_PUNPCKHWD = 435
|
782
|
+
INS_PUNPCKLBW = 436
|
783
|
+
INS_PUNPCKLDQ = 437
|
784
|
+
INS_PUNPCKLWD = 438
|
785
|
+
INS_PXOR = 439
|
786
|
+
INS_MONITOR = 440
|
787
|
+
INS_MONTMUL = 441
|
788
|
+
INS_MOV = 442
|
789
|
+
INS_MOVABS = 443
|
790
|
+
INS_MOVBE = 444
|
791
|
+
INS_MOVDDUP = 445
|
792
|
+
INS_MOVDQA = 446
|
793
|
+
INS_MOVDQU = 447
|
794
|
+
INS_MOVHLPS = 448
|
795
|
+
INS_MOVHPD = 449
|
796
|
+
INS_MOVHPS = 450
|
797
|
+
INS_MOVLHPS = 451
|
798
|
+
INS_MOVLPD = 452
|
799
|
+
INS_MOVLPS = 453
|
800
|
+
INS_MOVMSKPD = 454
|
801
|
+
INS_MOVMSKPS = 455
|
802
|
+
INS_MOVNTDQA = 456
|
803
|
+
INS_MOVNTDQ = 457
|
804
|
+
INS_MOVNTI = 458
|
805
|
+
INS_MOVNTPD = 459
|
806
|
+
INS_MOVNTPS = 460
|
807
|
+
INS_MOVNTSD = 461
|
808
|
+
INS_MOVNTSS = 462
|
809
|
+
INS_MOVSB = 463
|
810
|
+
INS_MOVSD = 464
|
811
|
+
INS_MOVSHDUP = 465
|
812
|
+
INS_MOVSLDUP = 466
|
813
|
+
INS_MOVSQ = 467
|
814
|
+
INS_MOVSS = 468
|
815
|
+
INS_MOVSW = 469
|
816
|
+
INS_MOVSX = 470
|
817
|
+
INS_MOVSXD = 471
|
818
|
+
INS_MOVUPD = 472
|
819
|
+
INS_MOVUPS = 473
|
820
|
+
INS_MOVZX = 474
|
821
|
+
INS_MPSADBW = 475
|
822
|
+
INS_MUL = 476
|
823
|
+
INS_MULPD = 477
|
824
|
+
INS_MULPS = 478
|
825
|
+
INS_MULSD = 479
|
826
|
+
INS_MULSS = 480
|
827
|
+
INS_MULX = 481
|
828
|
+
INS_FMUL = 482
|
829
|
+
INS_FIMUL = 483
|
830
|
+
INS_FMULP = 484
|
831
|
+
INS_MWAIT = 485
|
832
|
+
INS_NEG = 486
|
833
|
+
INS_NOP = 487
|
834
|
+
INS_NOT = 488
|
835
|
+
INS_OUT = 489
|
836
|
+
INS_OUTSB = 490
|
837
|
+
INS_OUTSD = 491
|
838
|
+
INS_OUTSW = 492
|
839
|
+
INS_PACKUSDW = 493
|
840
|
+
INS_PAUSE = 494
|
841
|
+
INS_PAVGUSB = 495
|
842
|
+
INS_PBLENDVB = 496
|
843
|
+
INS_PBLENDW = 497
|
844
|
+
INS_PCLMULQDQ = 498
|
845
|
+
INS_PCMPEQQ = 499
|
846
|
+
INS_PCMPESTRI = 500
|
847
|
+
INS_PCMPESTRM = 501
|
848
|
+
INS_PCMPGTQ = 502
|
849
|
+
INS_PCMPISTRI = 503
|
850
|
+
INS_PCMPISTRM = 504
|
851
|
+
INS_PDEP = 505
|
852
|
+
INS_PEXT = 506
|
853
|
+
INS_PEXTRB = 507
|
854
|
+
INS_PEXTRD = 508
|
855
|
+
INS_PEXTRQ = 509
|
856
|
+
INS_PF2ID = 510
|
857
|
+
INS_PF2IW = 511
|
858
|
+
INS_PFACC = 512
|
859
|
+
INS_PFADD = 513
|
860
|
+
INS_PFCMPEQ = 514
|
861
|
+
INS_PFCMPGE = 515
|
862
|
+
INS_PFCMPGT = 516
|
863
|
+
INS_PFMAX = 517
|
864
|
+
INS_PFMIN = 518
|
865
|
+
INS_PFMUL = 519
|
866
|
+
INS_PFNACC = 520
|
867
|
+
INS_PFPNACC = 521
|
868
|
+
INS_PFRCPIT1 = 522
|
869
|
+
INS_PFRCPIT2 = 523
|
870
|
+
INS_PFRCP = 524
|
871
|
+
INS_PFRSQIT1 = 525
|
872
|
+
INS_PFRSQRT = 526
|
873
|
+
INS_PFSUBR = 527
|
874
|
+
INS_PFSUB = 528
|
875
|
+
INS_PHMINPOSUW = 529
|
876
|
+
INS_PI2FD = 530
|
877
|
+
INS_PI2FW = 531
|
878
|
+
INS_PINSRB = 532
|
879
|
+
INS_PINSRD = 533
|
880
|
+
INS_PINSRQ = 534
|
881
|
+
INS_PMAXSB = 535
|
882
|
+
INS_PMAXSD = 536
|
883
|
+
INS_PMAXUD = 537
|
884
|
+
INS_PMAXUW = 538
|
885
|
+
INS_PMINSB = 539
|
886
|
+
INS_PMINSD = 540
|
887
|
+
INS_PMINUD = 541
|
888
|
+
INS_PMINUW = 542
|
889
|
+
INS_PMOVSXBD = 543
|
890
|
+
INS_PMOVSXBQ = 544
|
891
|
+
INS_PMOVSXBW = 545
|
892
|
+
INS_PMOVSXDQ = 546
|
893
|
+
INS_PMOVSXWD = 547
|
894
|
+
INS_PMOVSXWQ = 548
|
895
|
+
INS_PMOVZXBD = 549
|
896
|
+
INS_PMOVZXBQ = 550
|
897
|
+
INS_PMOVZXBW = 551
|
898
|
+
INS_PMOVZXDQ = 552
|
899
|
+
INS_PMOVZXWD = 553
|
900
|
+
INS_PMOVZXWQ = 554
|
901
|
+
INS_PMULDQ = 555
|
902
|
+
INS_PMULHRW = 556
|
903
|
+
INS_PMULLD = 557
|
904
|
+
INS_POP = 558
|
905
|
+
INS_POPAW = 559
|
906
|
+
INS_POPAL = 560
|
907
|
+
INS_POPCNT = 561
|
908
|
+
INS_POPF = 562
|
909
|
+
INS_POPFD = 563
|
910
|
+
INS_POPFQ = 564
|
911
|
+
INS_PREFETCH = 565
|
912
|
+
INS_PREFETCHNTA = 566
|
913
|
+
INS_PREFETCHT0 = 567
|
914
|
+
INS_PREFETCHT1 = 568
|
915
|
+
INS_PREFETCHT2 = 569
|
916
|
+
INS_PREFETCHW = 570
|
917
|
+
INS_PSHUFD = 571
|
918
|
+
INS_PSHUFHW = 572
|
919
|
+
INS_PSHUFLW = 573
|
920
|
+
INS_PSLLDQ = 574
|
921
|
+
INS_PSRLDQ = 575
|
922
|
+
INS_PSWAPD = 576
|
923
|
+
INS_PTEST = 577
|
924
|
+
INS_PUNPCKHQDQ = 578
|
925
|
+
INS_PUNPCKLQDQ = 579
|
926
|
+
INS_PUSH = 580
|
927
|
+
INS_PUSHAW = 581
|
928
|
+
INS_PUSHAL = 582
|
929
|
+
INS_PUSHF = 583
|
930
|
+
INS_PUSHFD = 584
|
931
|
+
INS_PUSHFQ = 585
|
932
|
+
INS_RCL = 586
|
933
|
+
INS_RCPPS = 587
|
934
|
+
INS_RCPSS = 588
|
935
|
+
INS_RCR = 589
|
936
|
+
INS_RDFSBASE = 590
|
937
|
+
INS_RDGSBASE = 591
|
938
|
+
INS_RDMSR = 592
|
939
|
+
INS_RDPMC = 593
|
940
|
+
INS_RDRAND = 594
|
941
|
+
INS_RDSEED = 595
|
942
|
+
INS_RDTSC = 596
|
943
|
+
INS_RDTSCP = 597
|
944
|
+
INS_ROL = 598
|
945
|
+
INS_ROR = 599
|
946
|
+
INS_RORX = 600
|
947
|
+
INS_ROUNDPD = 601
|
948
|
+
INS_ROUNDPS = 602
|
949
|
+
INS_ROUNDSD = 603
|
950
|
+
INS_ROUNDSS = 604
|
951
|
+
INS_RSM = 605
|
952
|
+
INS_RSQRTPS = 606
|
953
|
+
INS_RSQRTSS = 607
|
954
|
+
INS_SAHF = 608
|
955
|
+
INS_SAL = 609
|
956
|
+
INS_SALC = 610
|
957
|
+
INS_SAR = 611
|
958
|
+
INS_SARX = 612
|
959
|
+
INS_SBB = 613
|
960
|
+
INS_SCASB = 614
|
961
|
+
INS_SCASD = 615
|
962
|
+
INS_SCASQ = 616
|
963
|
+
INS_SCASW = 617
|
964
|
+
INS_SETAE = 618
|
965
|
+
INS_SETA = 619
|
966
|
+
INS_SETBE = 620
|
967
|
+
INS_SETB = 621
|
968
|
+
INS_SETE = 622
|
969
|
+
INS_SETGE = 623
|
970
|
+
INS_SETG = 624
|
971
|
+
INS_SETLE = 625
|
972
|
+
INS_SETL = 626
|
973
|
+
INS_SETNE = 627
|
974
|
+
INS_SETNO = 628
|
975
|
+
INS_SETNP = 629
|
976
|
+
INS_SETNS = 630
|
977
|
+
INS_SETO = 631
|
978
|
+
INS_SETP = 632
|
979
|
+
INS_SETS = 633
|
980
|
+
INS_SFENCE = 634
|
981
|
+
INS_SGDT = 635
|
982
|
+
INS_SHA1MSG1 = 636
|
983
|
+
INS_SHA1MSG2 = 637
|
984
|
+
INS_SHA1NEXTE = 638
|
985
|
+
INS_SHA1RNDS4 = 639
|
986
|
+
INS_SHA256MSG1 = 640
|
987
|
+
INS_SHA256MSG2 = 641
|
988
|
+
INS_SHA256RNDS2 = 642
|
989
|
+
INS_SHL = 643
|
990
|
+
INS_SHLD = 644
|
991
|
+
INS_SHLX = 645
|
992
|
+
INS_SHR = 646
|
993
|
+
INS_SHRD = 647
|
994
|
+
INS_SHRX = 648
|
995
|
+
INS_SHUFPD = 649
|
996
|
+
INS_SHUFPS = 650
|
997
|
+
INS_SIDT = 651
|
998
|
+
INS_FSIN = 652
|
999
|
+
INS_SKINIT = 653
|
1000
|
+
INS_SLDT = 654
|
1001
|
+
INS_SMSW = 655
|
1002
|
+
INS_SQRTPD = 656
|
1003
|
+
INS_SQRTPS = 657
|
1004
|
+
INS_SQRTSD = 658
|
1005
|
+
INS_SQRTSS = 659
|
1006
|
+
INS_FSQRT = 660
|
1007
|
+
INS_STAC = 661
|
1008
|
+
INS_STC = 662
|
1009
|
+
INS_STD = 663
|
1010
|
+
INS_STGI = 664
|
1011
|
+
INS_STI = 665
|
1012
|
+
INS_STMXCSR = 666
|
1013
|
+
INS_STOSB = 667
|
1014
|
+
INS_STOSD = 668
|
1015
|
+
INS_STOSQ = 669
|
1016
|
+
INS_STOSW = 670
|
1017
|
+
INS_STR = 671
|
1018
|
+
INS_FST = 672
|
1019
|
+
INS_FSTP = 673
|
1020
|
+
INS_FSTPNCE = 674
|
1021
|
+
INS_SUBPD = 675
|
1022
|
+
INS_SUBPS = 676
|
1023
|
+
INS_FSUBR = 677
|
1024
|
+
INS_FISUBR = 678
|
1025
|
+
INS_FSUBRP = 679
|
1026
|
+
INS_SUBSD = 680
|
1027
|
+
INS_SUBSS = 681
|
1028
|
+
INS_FSUB = 682
|
1029
|
+
INS_FISUB = 683
|
1030
|
+
INS_FSUBP = 684
|
1031
|
+
INS_SWAPGS = 685
|
1032
|
+
INS_SYSCALL = 686
|
1033
|
+
INS_SYSENTER = 687
|
1034
|
+
INS_SYSEXIT = 688
|
1035
|
+
INS_SYSRET = 689
|
1036
|
+
INS_T1MSKC = 690
|
1037
|
+
INS_TEST = 691
|
1038
|
+
INS_UD2 = 692
|
1039
|
+
INS_FTST = 693
|
1040
|
+
INS_TZCNT = 694
|
1041
|
+
INS_TZMSK = 695
|
1042
|
+
INS_FUCOMPI = 696
|
1043
|
+
INS_FUCOMI = 697
|
1044
|
+
INS_FUCOMPP = 698
|
1045
|
+
INS_FUCOMP = 699
|
1046
|
+
INS_FUCOM = 700
|
1047
|
+
INS_UD2B = 701
|
1048
|
+
INS_UNPCKHPD = 702
|
1049
|
+
INS_UNPCKHPS = 703
|
1050
|
+
INS_UNPCKLPD = 704
|
1051
|
+
INS_UNPCKLPS = 705
|
1052
|
+
INS_VADDPD = 706
|
1053
|
+
INS_VADDPS = 707
|
1054
|
+
INS_VADDSD = 708
|
1055
|
+
INS_VADDSS = 709
|
1056
|
+
INS_VADDSUBPD = 710
|
1057
|
+
INS_VADDSUBPS = 711
|
1058
|
+
INS_VAESDECLAST = 712
|
1059
|
+
INS_VAESDEC = 713
|
1060
|
+
INS_VAESENCLAST = 714
|
1061
|
+
INS_VAESENC = 715
|
1062
|
+
INS_VAESIMC = 716
|
1063
|
+
INS_VAESKEYGENASSIST = 717
|
1064
|
+
INS_VALIGND = 718
|
1065
|
+
INS_VALIGNQ = 719
|
1066
|
+
INS_VANDNPD = 720
|
1067
|
+
INS_VANDNPS = 721
|
1068
|
+
INS_VANDPD = 722
|
1069
|
+
INS_VANDPS = 723
|
1070
|
+
INS_VBLENDMPD = 724
|
1071
|
+
INS_VBLENDMPS = 725
|
1072
|
+
INS_VBLENDPD = 726
|
1073
|
+
INS_VBLENDPS = 727
|
1074
|
+
INS_VBLENDVPD = 728
|
1075
|
+
INS_VBLENDVPS = 729
|
1076
|
+
INS_VBROADCASTF128 = 730
|
1077
|
+
INS_VBROADCASTI128 = 731
|
1078
|
+
INS_VBROADCASTI32X4 = 732
|
1079
|
+
INS_VBROADCASTI64X4 = 733
|
1080
|
+
INS_VBROADCASTSD = 734
|
1081
|
+
INS_VBROADCASTSS = 735
|
1082
|
+
INS_VCMPPD = 736
|
1083
|
+
INS_VCMPPS = 737
|
1084
|
+
INS_VCMPSD = 738
|
1085
|
+
INS_VCMPSS = 739
|
1086
|
+
INS_VCVTDQ2PD = 740
|
1087
|
+
INS_VCVTDQ2PS = 741
|
1088
|
+
INS_VCVTPD2DQX = 742
|
1089
|
+
INS_VCVTPD2DQ = 743
|
1090
|
+
INS_VCVTPD2PSX = 744
|
1091
|
+
INS_VCVTPD2PS = 745
|
1092
|
+
INS_VCVTPD2UDQ = 746
|
1093
|
+
INS_VCVTPH2PS = 747
|
1094
|
+
INS_VCVTPS2DQ = 748
|
1095
|
+
INS_VCVTPS2PD = 749
|
1096
|
+
INS_VCVTPS2PH = 750
|
1097
|
+
INS_VCVTPS2UDQ = 751
|
1098
|
+
INS_VCVTSD2SI = 752
|
1099
|
+
INS_VCVTSD2USI = 753
|
1100
|
+
INS_VCVTSS2SI = 754
|
1101
|
+
INS_VCVTSS2USI = 755
|
1102
|
+
INS_VCVTTPD2DQX = 756
|
1103
|
+
INS_VCVTTPD2DQ = 757
|
1104
|
+
INS_VCVTTPD2UDQ = 758
|
1105
|
+
INS_VCVTTPS2DQ = 759
|
1106
|
+
INS_VCVTTPS2UDQ = 760
|
1107
|
+
INS_VCVTUDQ2PD = 761
|
1108
|
+
INS_VCVTUDQ2PS = 762
|
1109
|
+
INS_VDIVPD = 763
|
1110
|
+
INS_VDIVPS = 764
|
1111
|
+
INS_VDIVSD = 765
|
1112
|
+
INS_VDIVSS = 766
|
1113
|
+
INS_VDPPD = 767
|
1114
|
+
INS_VDPPS = 768
|
1115
|
+
INS_VERR = 769
|
1116
|
+
INS_VERW = 770
|
1117
|
+
INS_VEXTRACTF128 = 771
|
1118
|
+
INS_VEXTRACTF32X4 = 772
|
1119
|
+
INS_VEXTRACTF64X4 = 773
|
1120
|
+
INS_VEXTRACTI128 = 774
|
1121
|
+
INS_VEXTRACTI32X4 = 775
|
1122
|
+
INS_VEXTRACTI64X4 = 776
|
1123
|
+
INS_VEXTRACTPS = 777
|
1124
|
+
INS_VFMADD132PD = 778
|
1125
|
+
INS_VFMADD132PS = 779
|
1126
|
+
INS_VFMADD213PD = 780
|
1127
|
+
INS_VFMADD213PS = 781
|
1128
|
+
INS_VFMADDPD = 782
|
1129
|
+
INS_VFMADD231PD = 783
|
1130
|
+
INS_VFMADDPS = 784
|
1131
|
+
INS_VFMADD231PS = 785
|
1132
|
+
INS_VFMADDSD = 786
|
1133
|
+
INS_VFMADD213SD = 787
|
1134
|
+
INS_VFMADD132SD = 788
|
1135
|
+
INS_VFMADD231SD = 789
|
1136
|
+
INS_VFMADDSS = 790
|
1137
|
+
INS_VFMADD213SS = 791
|
1138
|
+
INS_VFMADD132SS = 792
|
1139
|
+
INS_VFMADD231SS = 793
|
1140
|
+
INS_VFMADDSUB132PD = 794
|
1141
|
+
INS_VFMADDSUB132PS = 795
|
1142
|
+
INS_VFMADDSUB213PD = 796
|
1143
|
+
INS_VFMADDSUB213PS = 797
|
1144
|
+
INS_VFMADDSUBPD = 798
|
1145
|
+
INS_VFMADDSUB231PD = 799
|
1146
|
+
INS_VFMADDSUBPS = 800
|
1147
|
+
INS_VFMADDSUB231PS = 801
|
1148
|
+
INS_VFMSUB132PD = 802
|
1149
|
+
INS_VFMSUB132PS = 803
|
1150
|
+
INS_VFMSUB213PD = 804
|
1151
|
+
INS_VFMSUB213PS = 805
|
1152
|
+
INS_VFMSUBADD132PD = 806
|
1153
|
+
INS_VFMSUBADD132PS = 807
|
1154
|
+
INS_VFMSUBADD213PD = 808
|
1155
|
+
INS_VFMSUBADD213PS = 809
|
1156
|
+
INS_VFMSUBADDPD = 810
|
1157
|
+
INS_VFMSUBADD231PD = 811
|
1158
|
+
INS_VFMSUBADDPS = 812
|
1159
|
+
INS_VFMSUBADD231PS = 813
|
1160
|
+
INS_VFMSUBPD = 814
|
1161
|
+
INS_VFMSUB231PD = 815
|
1162
|
+
INS_VFMSUBPS = 816
|
1163
|
+
INS_VFMSUB231PS = 817
|
1164
|
+
INS_VFMSUBSD = 818
|
1165
|
+
INS_VFMSUB213SD = 819
|
1166
|
+
INS_VFMSUB132SD = 820
|
1167
|
+
INS_VFMSUB231SD = 821
|
1168
|
+
INS_VFMSUBSS = 822
|
1169
|
+
INS_VFMSUB213SS = 823
|
1170
|
+
INS_VFMSUB132SS = 824
|
1171
|
+
INS_VFMSUB231SS = 825
|
1172
|
+
INS_VFNMADD132PD = 826
|
1173
|
+
INS_VFNMADD132PS = 827
|
1174
|
+
INS_VFNMADD213PD = 828
|
1175
|
+
INS_VFNMADD213PS = 829
|
1176
|
+
INS_VFNMADDPD = 830
|
1177
|
+
INS_VFNMADD231PD = 831
|
1178
|
+
INS_VFNMADDPS = 832
|
1179
|
+
INS_VFNMADD231PS = 833
|
1180
|
+
INS_VFNMADDSD = 834
|
1181
|
+
INS_VFNMADD213SD = 835
|
1182
|
+
INS_VFNMADD132SD = 836
|
1183
|
+
INS_VFNMADD231SD = 837
|
1184
|
+
INS_VFNMADDSS = 838
|
1185
|
+
INS_VFNMADD213SS = 839
|
1186
|
+
INS_VFNMADD132SS = 840
|
1187
|
+
INS_VFNMADD231SS = 841
|
1188
|
+
INS_VFNMSUB132PD = 842
|
1189
|
+
INS_VFNMSUB132PS = 843
|
1190
|
+
INS_VFNMSUB213PD = 844
|
1191
|
+
INS_VFNMSUB213PS = 845
|
1192
|
+
INS_VFNMSUBPD = 846
|
1193
|
+
INS_VFNMSUB231PD = 847
|
1194
|
+
INS_VFNMSUBPS = 848
|
1195
|
+
INS_VFNMSUB231PS = 849
|
1196
|
+
INS_VFNMSUBSD = 850
|
1197
|
+
INS_VFNMSUB213SD = 851
|
1198
|
+
INS_VFNMSUB132SD = 852
|
1199
|
+
INS_VFNMSUB231SD = 853
|
1200
|
+
INS_VFNMSUBSS = 854
|
1201
|
+
INS_VFNMSUB213SS = 855
|
1202
|
+
INS_VFNMSUB132SS = 856
|
1203
|
+
INS_VFNMSUB231SS = 857
|
1204
|
+
INS_VFRCZPD = 858
|
1205
|
+
INS_VFRCZPS = 859
|
1206
|
+
INS_VFRCZSD = 860
|
1207
|
+
INS_VFRCZSS = 861
|
1208
|
+
INS_VORPD = 862
|
1209
|
+
INS_VORPS = 863
|
1210
|
+
INS_VXORPD = 864
|
1211
|
+
INS_VXORPS = 865
|
1212
|
+
INS_VGATHERDPD = 866
|
1213
|
+
INS_VGATHERDPS = 867
|
1214
|
+
INS_VGATHERPF0DPD = 868
|
1215
|
+
INS_VGATHERPF0DPS = 869
|
1216
|
+
INS_VGATHERPF0QPD = 870
|
1217
|
+
INS_VGATHERPF0QPS = 871
|
1218
|
+
INS_VGATHERPF1DPD = 872
|
1219
|
+
INS_VGATHERPF1DPS = 873
|
1220
|
+
INS_VGATHERPF1QPD = 874
|
1221
|
+
INS_VGATHERPF1QPS = 875
|
1222
|
+
INS_VGATHERQPD = 876
|
1223
|
+
INS_VGATHERQPS = 877
|
1224
|
+
INS_VHADDPD = 878
|
1225
|
+
INS_VHADDPS = 879
|
1226
|
+
INS_VHSUBPD = 880
|
1227
|
+
INS_VHSUBPS = 881
|
1228
|
+
INS_VINSERTF128 = 882
|
1229
|
+
INS_VINSERTF32X4 = 883
|
1230
|
+
INS_VINSERTF64X4 = 884
|
1231
|
+
INS_VINSERTI128 = 885
|
1232
|
+
INS_VINSERTI32X4 = 886
|
1233
|
+
INS_VINSERTI64X4 = 887
|
1234
|
+
INS_VINSERTPS = 888
|
1235
|
+
INS_VLDDQU = 889
|
1236
|
+
INS_VLDMXCSR = 890
|
1237
|
+
INS_VMASKMOVDQU = 891
|
1238
|
+
INS_VMASKMOVPD = 892
|
1239
|
+
INS_VMASKMOVPS = 893
|
1240
|
+
INS_VMAXPD = 894
|
1241
|
+
INS_VMAXPS = 895
|
1242
|
+
INS_VMAXSD = 896
|
1243
|
+
INS_VMAXSS = 897
|
1244
|
+
INS_VMCALL = 898
|
1245
|
+
INS_VMCLEAR = 899
|
1246
|
+
INS_VMFUNC = 900
|
1247
|
+
INS_VMINPD = 901
|
1248
|
+
INS_VMINPS = 902
|
1249
|
+
INS_VMINSD = 903
|
1250
|
+
INS_VMINSS = 904
|
1251
|
+
INS_VMLAUNCH = 905
|
1252
|
+
INS_VMLOAD = 906
|
1253
|
+
INS_VMMCALL = 907
|
1254
|
+
INS_VMOVQ = 908
|
1255
|
+
INS_VMOVDDUP = 909
|
1256
|
+
INS_VMOVD = 910
|
1257
|
+
INS_VMOVDQA32 = 911
|
1258
|
+
INS_VMOVDQA64 = 912
|
1259
|
+
INS_VMOVDQA = 913
|
1260
|
+
INS_VMOVDQU16 = 914
|
1261
|
+
INS_VMOVDQU32 = 915
|
1262
|
+
INS_VMOVDQU64 = 916
|
1263
|
+
INS_VMOVDQU8 = 917
|
1264
|
+
INS_VMOVDQU = 918
|
1265
|
+
INS_VMOVHLPS = 919
|
1266
|
+
INS_VMOVHPD = 920
|
1267
|
+
INS_VMOVHPS = 921
|
1268
|
+
INS_VMOVLHPS = 922
|
1269
|
+
INS_VMOVLPD = 923
|
1270
|
+
INS_VMOVLPS = 924
|
1271
|
+
INS_VMOVMSKPD = 925
|
1272
|
+
INS_VMOVMSKPS = 926
|
1273
|
+
INS_VMOVNTDQA = 927
|
1274
|
+
INS_VMOVNTDQ = 928
|
1275
|
+
INS_VMOVNTPD = 929
|
1276
|
+
INS_VMOVNTPS = 930
|
1277
|
+
INS_VMOVSD = 931
|
1278
|
+
INS_VMOVSHDUP = 932
|
1279
|
+
INS_VMOVSLDUP = 933
|
1280
|
+
INS_VMOVSS = 934
|
1281
|
+
INS_VMOVUPD = 935
|
1282
|
+
INS_VMOVUPS = 936
|
1283
|
+
INS_VMPSADBW = 937
|
1284
|
+
INS_VMPTRLD = 938
|
1285
|
+
INS_VMPTRST = 939
|
1286
|
+
INS_VMREAD = 940
|
1287
|
+
INS_VMRESUME = 941
|
1288
|
+
INS_VMRUN = 942
|
1289
|
+
INS_VMSAVE = 943
|
1290
|
+
INS_VMULPD = 944
|
1291
|
+
INS_VMULPS = 945
|
1292
|
+
INS_VMULSD = 946
|
1293
|
+
INS_VMULSS = 947
|
1294
|
+
INS_VMWRITE = 948
|
1295
|
+
INS_VMXOFF = 949
|
1296
|
+
INS_VMXON = 950
|
1297
|
+
INS_VPABSB = 951
|
1298
|
+
INS_VPABSD = 952
|
1299
|
+
INS_VPABSQ = 953
|
1300
|
+
INS_VPABSW = 954
|
1301
|
+
INS_VPACKSSDW = 955
|
1302
|
+
INS_VPACKSSWB = 956
|
1303
|
+
INS_VPACKUSDW = 957
|
1304
|
+
INS_VPACKUSWB = 958
|
1305
|
+
INS_VPADDB = 959
|
1306
|
+
INS_VPADDD = 960
|
1307
|
+
INS_VPADDQ = 961
|
1308
|
+
INS_VPADDSB = 962
|
1309
|
+
INS_VPADDSW = 963
|
1310
|
+
INS_VPADDUSB = 964
|
1311
|
+
INS_VPADDUSW = 965
|
1312
|
+
INS_VPADDW = 966
|
1313
|
+
INS_VPALIGNR = 967
|
1314
|
+
INS_VPANDD = 968
|
1315
|
+
INS_VPANDND = 969
|
1316
|
+
INS_VPANDNQ = 970
|
1317
|
+
INS_VPANDN = 971
|
1318
|
+
INS_VPANDQ = 972
|
1319
|
+
INS_VPAND = 973
|
1320
|
+
INS_VPAVGB = 974
|
1321
|
+
INS_VPAVGW = 975
|
1322
|
+
INS_VPBLENDD = 976
|
1323
|
+
INS_VPBLENDMD = 977
|
1324
|
+
INS_VPBLENDMQ = 978
|
1325
|
+
INS_VPBLENDVB = 979
|
1326
|
+
INS_VPBLENDW = 980
|
1327
|
+
INS_VPBROADCASTB = 981
|
1328
|
+
INS_VPBROADCASTD = 982
|
1329
|
+
INS_VPBROADCASTMB2Q = 983
|
1330
|
+
INS_VPBROADCASTMW2D = 984
|
1331
|
+
INS_VPBROADCASTQ = 985
|
1332
|
+
INS_VPBROADCASTW = 986
|
1333
|
+
INS_VPCLMULQDQ = 987
|
1334
|
+
INS_VPCMOV = 988
|
1335
|
+
INS_VPCMP = 989
|
1336
|
+
INS_VPCMPD = 990
|
1337
|
+
INS_VPCMPEQB = 991
|
1338
|
+
INS_VPCMPEQD = 992
|
1339
|
+
INS_VPCMPEQQ = 993
|
1340
|
+
INS_VPCMPEQW = 994
|
1341
|
+
INS_VPCMPESTRI = 995
|
1342
|
+
INS_VPCMPESTRM = 996
|
1343
|
+
INS_VPCMPGTB = 997
|
1344
|
+
INS_VPCMPGTD = 998
|
1345
|
+
INS_VPCMPGTQ = 999
|
1346
|
+
INS_VPCMPGTW = 1000
|
1347
|
+
INS_VPCMPISTRI = 1001
|
1348
|
+
INS_VPCMPISTRM = 1002
|
1349
|
+
INS_VPCMPQ = 1003
|
1350
|
+
INS_VPCMPUD = 1004
|
1351
|
+
INS_VPCMPUQ = 1005
|
1352
|
+
INS_VPCOMB = 1006
|
1353
|
+
INS_VPCOMD = 1007
|
1354
|
+
INS_VPCOMQ = 1008
|
1355
|
+
INS_VPCOMUB = 1009
|
1356
|
+
INS_VPCOMUD = 1010
|
1357
|
+
INS_VPCOMUQ = 1011
|
1358
|
+
INS_VPCOMUW = 1012
|
1359
|
+
INS_VPCOMW = 1013
|
1360
|
+
INS_VPCONFLICTD = 1014
|
1361
|
+
INS_VPCONFLICTQ = 1015
|
1362
|
+
INS_VPERM2F128 = 1016
|
1363
|
+
INS_VPERM2I128 = 1017
|
1364
|
+
INS_VPERMD = 1018
|
1365
|
+
INS_VPERMI2D = 1019
|
1366
|
+
INS_VPERMI2PD = 1020
|
1367
|
+
INS_VPERMI2PS = 1021
|
1368
|
+
INS_VPERMI2Q = 1022
|
1369
|
+
INS_VPERMIL2PD = 1023
|
1370
|
+
INS_VPERMIL2PS = 1024
|
1371
|
+
INS_VPERMILPD = 1025
|
1372
|
+
INS_VPERMILPS = 1026
|
1373
|
+
INS_VPERMPD = 1027
|
1374
|
+
INS_VPERMPS = 1028
|
1375
|
+
INS_VPERMQ = 1029
|
1376
|
+
INS_VPERMT2D = 1030
|
1377
|
+
INS_VPERMT2PD = 1031
|
1378
|
+
INS_VPERMT2PS = 1032
|
1379
|
+
INS_VPERMT2Q = 1033
|
1380
|
+
INS_VPEXTRB = 1034
|
1381
|
+
INS_VPEXTRD = 1035
|
1382
|
+
INS_VPEXTRQ = 1036
|
1383
|
+
INS_VPEXTRW = 1037
|
1384
|
+
INS_VPGATHERDD = 1038
|
1385
|
+
INS_VPGATHERDQ = 1039
|
1386
|
+
INS_VPGATHERQD = 1040
|
1387
|
+
INS_VPGATHERQQ = 1041
|
1388
|
+
INS_VPHADDBD = 1042
|
1389
|
+
INS_VPHADDBQ = 1043
|
1390
|
+
INS_VPHADDBW = 1044
|
1391
|
+
INS_VPHADDDQ = 1045
|
1392
|
+
INS_VPHADDD = 1046
|
1393
|
+
INS_VPHADDSW = 1047
|
1394
|
+
INS_VPHADDUBD = 1048
|
1395
|
+
INS_VPHADDUBQ = 1049
|
1396
|
+
INS_VPHADDUBW = 1050
|
1397
|
+
INS_VPHADDUDQ = 1051
|
1398
|
+
INS_VPHADDUWD = 1052
|
1399
|
+
INS_VPHADDUWQ = 1053
|
1400
|
+
INS_VPHADDWD = 1054
|
1401
|
+
INS_VPHADDWQ = 1055
|
1402
|
+
INS_VPHADDW = 1056
|
1403
|
+
INS_VPHMINPOSUW = 1057
|
1404
|
+
INS_VPHSUBBW = 1058
|
1405
|
+
INS_VPHSUBDQ = 1059
|
1406
|
+
INS_VPHSUBD = 1060
|
1407
|
+
INS_VPHSUBSW = 1061
|
1408
|
+
INS_VPHSUBWD = 1062
|
1409
|
+
INS_VPHSUBW = 1063
|
1410
|
+
INS_VPINSRB = 1064
|
1411
|
+
INS_VPINSRD = 1065
|
1412
|
+
INS_VPINSRQ = 1066
|
1413
|
+
INS_VPINSRW = 1067
|
1414
|
+
INS_VPLZCNTD = 1068
|
1415
|
+
INS_VPLZCNTQ = 1069
|
1416
|
+
INS_VPMACSDD = 1070
|
1417
|
+
INS_VPMACSDQH = 1071
|
1418
|
+
INS_VPMACSDQL = 1072
|
1419
|
+
INS_VPMACSSDD = 1073
|
1420
|
+
INS_VPMACSSDQH = 1074
|
1421
|
+
INS_VPMACSSDQL = 1075
|
1422
|
+
INS_VPMACSSWD = 1076
|
1423
|
+
INS_VPMACSSWW = 1077
|
1424
|
+
INS_VPMACSWD = 1078
|
1425
|
+
INS_VPMACSWW = 1079
|
1426
|
+
INS_VPMADCSSWD = 1080
|
1427
|
+
INS_VPMADCSWD = 1081
|
1428
|
+
INS_VPMADDUBSW = 1082
|
1429
|
+
INS_VPMADDWD = 1083
|
1430
|
+
INS_VPMASKMOVD = 1084
|
1431
|
+
INS_VPMASKMOVQ = 1085
|
1432
|
+
INS_VPMAXSB = 1086
|
1433
|
+
INS_VPMAXSD = 1087
|
1434
|
+
INS_VPMAXSQ = 1088
|
1435
|
+
INS_VPMAXSW = 1089
|
1436
|
+
INS_VPMAXUB = 1090
|
1437
|
+
INS_VPMAXUD = 1091
|
1438
|
+
INS_VPMAXUQ = 1092
|
1439
|
+
INS_VPMAXUW = 1093
|
1440
|
+
INS_VPMINSB = 1094
|
1441
|
+
INS_VPMINSD = 1095
|
1442
|
+
INS_VPMINSQ = 1096
|
1443
|
+
INS_VPMINSW = 1097
|
1444
|
+
INS_VPMINUB = 1098
|
1445
|
+
INS_VPMINUD = 1099
|
1446
|
+
INS_VPMINUQ = 1100
|
1447
|
+
INS_VPMINUW = 1101
|
1448
|
+
INS_VPMOVDB = 1102
|
1449
|
+
INS_VPMOVDW = 1103
|
1450
|
+
INS_VPMOVMSKB = 1104
|
1451
|
+
INS_VPMOVQB = 1105
|
1452
|
+
INS_VPMOVQD = 1106
|
1453
|
+
INS_VPMOVQW = 1107
|
1454
|
+
INS_VPMOVSDB = 1108
|
1455
|
+
INS_VPMOVSDW = 1109
|
1456
|
+
INS_VPMOVSQB = 1110
|
1457
|
+
INS_VPMOVSQD = 1111
|
1458
|
+
INS_VPMOVSQW = 1112
|
1459
|
+
INS_VPMOVSXBD = 1113
|
1460
|
+
INS_VPMOVSXBQ = 1114
|
1461
|
+
INS_VPMOVSXBW = 1115
|
1462
|
+
INS_VPMOVSXDQ = 1116
|
1463
|
+
INS_VPMOVSXWD = 1117
|
1464
|
+
INS_VPMOVSXWQ = 1118
|
1465
|
+
INS_VPMOVUSDB = 1119
|
1466
|
+
INS_VPMOVUSDW = 1120
|
1467
|
+
INS_VPMOVUSQB = 1121
|
1468
|
+
INS_VPMOVUSQD = 1122
|
1469
|
+
INS_VPMOVUSQW = 1123
|
1470
|
+
INS_VPMOVZXBD = 1124
|
1471
|
+
INS_VPMOVZXBQ = 1125
|
1472
|
+
INS_VPMOVZXBW = 1126
|
1473
|
+
INS_VPMOVZXDQ = 1127
|
1474
|
+
INS_VPMOVZXWD = 1128
|
1475
|
+
INS_VPMOVZXWQ = 1129
|
1476
|
+
INS_VPMULDQ = 1130
|
1477
|
+
INS_VPMULHRSW = 1131
|
1478
|
+
INS_VPMULHUW = 1132
|
1479
|
+
INS_VPMULHW = 1133
|
1480
|
+
INS_VPMULLD = 1134
|
1481
|
+
INS_VPMULLW = 1135
|
1482
|
+
INS_VPMULUDQ = 1136
|
1483
|
+
INS_VPORD = 1137
|
1484
|
+
INS_VPORQ = 1138
|
1485
|
+
INS_VPOR = 1139
|
1486
|
+
INS_VPPERM = 1140
|
1487
|
+
INS_VPROTB = 1141
|
1488
|
+
INS_VPROTD = 1142
|
1489
|
+
INS_VPROTQ = 1143
|
1490
|
+
INS_VPROTW = 1144
|
1491
|
+
INS_VPSADBW = 1145
|
1492
|
+
INS_VPSCATTERDD = 1146
|
1493
|
+
INS_VPSCATTERDQ = 1147
|
1494
|
+
INS_VPSCATTERQD = 1148
|
1495
|
+
INS_VPSCATTERQQ = 1149
|
1496
|
+
INS_VPSHAB = 1150
|
1497
|
+
INS_VPSHAD = 1151
|
1498
|
+
INS_VPSHAQ = 1152
|
1499
|
+
INS_VPSHAW = 1153
|
1500
|
+
INS_VPSHLB = 1154
|
1501
|
+
INS_VPSHLD = 1155
|
1502
|
+
INS_VPSHLQ = 1156
|
1503
|
+
INS_VPSHLW = 1157
|
1504
|
+
INS_VPSHUFB = 1158
|
1505
|
+
INS_VPSHUFD = 1159
|
1506
|
+
INS_VPSHUFHW = 1160
|
1507
|
+
INS_VPSHUFLW = 1161
|
1508
|
+
INS_VPSIGNB = 1162
|
1509
|
+
INS_VPSIGND = 1163
|
1510
|
+
INS_VPSIGNW = 1164
|
1511
|
+
INS_VPSLLDQ = 1165
|
1512
|
+
INS_VPSLLD = 1166
|
1513
|
+
INS_VPSLLQ = 1167
|
1514
|
+
INS_VPSLLVD = 1168
|
1515
|
+
INS_VPSLLVQ = 1169
|
1516
|
+
INS_VPSLLW = 1170
|
1517
|
+
INS_VPSRAD = 1171
|
1518
|
+
INS_VPSRAQ = 1172
|
1519
|
+
INS_VPSRAVD = 1173
|
1520
|
+
INS_VPSRAVQ = 1174
|
1521
|
+
INS_VPSRAW = 1175
|
1522
|
+
INS_VPSRLDQ = 1176
|
1523
|
+
INS_VPSRLD = 1177
|
1524
|
+
INS_VPSRLQ = 1178
|
1525
|
+
INS_VPSRLVD = 1179
|
1526
|
+
INS_VPSRLVQ = 1180
|
1527
|
+
INS_VPSRLW = 1181
|
1528
|
+
INS_VPSUBB = 1182
|
1529
|
+
INS_VPSUBD = 1183
|
1530
|
+
INS_VPSUBQ = 1184
|
1531
|
+
INS_VPSUBSB = 1185
|
1532
|
+
INS_VPSUBSW = 1186
|
1533
|
+
INS_VPSUBUSB = 1187
|
1534
|
+
INS_VPSUBUSW = 1188
|
1535
|
+
INS_VPSUBW = 1189
|
1536
|
+
INS_VPTESTMD = 1190
|
1537
|
+
INS_VPTESTMQ = 1191
|
1538
|
+
INS_VPTESTNMD = 1192
|
1539
|
+
INS_VPTESTNMQ = 1193
|
1540
|
+
INS_VPTEST = 1194
|
1541
|
+
INS_VPUNPCKHBW = 1195
|
1542
|
+
INS_VPUNPCKHDQ = 1196
|
1543
|
+
INS_VPUNPCKHQDQ = 1197
|
1544
|
+
INS_VPUNPCKHWD = 1198
|
1545
|
+
INS_VPUNPCKLBW = 1199
|
1546
|
+
INS_VPUNPCKLDQ = 1200
|
1547
|
+
INS_VPUNPCKLQDQ = 1201
|
1548
|
+
INS_VPUNPCKLWD = 1202
|
1549
|
+
INS_VPXORD = 1203
|
1550
|
+
INS_VPXORQ = 1204
|
1551
|
+
INS_VPXOR = 1205
|
1552
|
+
INS_VRCP14PD = 1206
|
1553
|
+
INS_VRCP14PS = 1207
|
1554
|
+
INS_VRCP14SD = 1208
|
1555
|
+
INS_VRCP14SS = 1209
|
1556
|
+
INS_VRCP28PD = 1210
|
1557
|
+
INS_VRCP28PS = 1211
|
1558
|
+
INS_VRCP28SD = 1212
|
1559
|
+
INS_VRCP28SS = 1213
|
1560
|
+
INS_VRCPPS = 1214
|
1561
|
+
INS_VRCPSS = 1215
|
1562
|
+
INS_VRNDSCALEPD = 1216
|
1563
|
+
INS_VRNDSCALEPS = 1217
|
1564
|
+
INS_VRNDSCALESD = 1218
|
1565
|
+
INS_VRNDSCALESS = 1219
|
1566
|
+
INS_VROUNDPD = 1220
|
1567
|
+
INS_VROUNDPS = 1221
|
1568
|
+
INS_VROUNDSD = 1222
|
1569
|
+
INS_VROUNDSS = 1223
|
1570
|
+
INS_VRSQRT14PD = 1224
|
1571
|
+
INS_VRSQRT14PS = 1225
|
1572
|
+
INS_VRSQRT14SD = 1226
|
1573
|
+
INS_VRSQRT14SS = 1227
|
1574
|
+
INS_VRSQRT28PD = 1228
|
1575
|
+
INS_VRSQRT28PS = 1229
|
1576
|
+
INS_VRSQRT28SD = 1230
|
1577
|
+
INS_VRSQRT28SS = 1231
|
1578
|
+
INS_VRSQRTPS = 1232
|
1579
|
+
INS_VRSQRTSS = 1233
|
1580
|
+
INS_VSCATTERDPD = 1234
|
1581
|
+
INS_VSCATTERDPS = 1235
|
1582
|
+
INS_VSCATTERPF0DPD = 1236
|
1583
|
+
INS_VSCATTERPF0DPS = 1237
|
1584
|
+
INS_VSCATTERPF0QPD = 1238
|
1585
|
+
INS_VSCATTERPF0QPS = 1239
|
1586
|
+
INS_VSCATTERPF1DPD = 1240
|
1587
|
+
INS_VSCATTERPF1DPS = 1241
|
1588
|
+
INS_VSCATTERPF1QPD = 1242
|
1589
|
+
INS_VSCATTERPF1QPS = 1243
|
1590
|
+
INS_VSCATTERQPD = 1244
|
1591
|
+
INS_VSCATTERQPS = 1245
|
1592
|
+
INS_VSHUFPD = 1246
|
1593
|
+
INS_VSHUFPS = 1247
|
1594
|
+
INS_VSQRTPD = 1248
|
1595
|
+
INS_VSQRTPS = 1249
|
1596
|
+
INS_VSQRTSD = 1250
|
1597
|
+
INS_VSQRTSS = 1251
|
1598
|
+
INS_VSTMXCSR = 1252
|
1599
|
+
INS_VSUBPD = 1253
|
1600
|
+
INS_VSUBPS = 1254
|
1601
|
+
INS_VSUBSD = 1255
|
1602
|
+
INS_VSUBSS = 1256
|
1603
|
+
INS_VTESTPD = 1257
|
1604
|
+
INS_VTESTPS = 1258
|
1605
|
+
INS_VUNPCKHPD = 1259
|
1606
|
+
INS_VUNPCKHPS = 1260
|
1607
|
+
INS_VUNPCKLPD = 1261
|
1608
|
+
INS_VUNPCKLPS = 1262
|
1609
|
+
INS_VZEROALL = 1263
|
1610
|
+
INS_VZEROUPPER = 1264
|
1611
|
+
INS_WAIT = 1265
|
1612
|
+
INS_WBINVD = 1266
|
1613
|
+
INS_WRFSBASE = 1267
|
1614
|
+
INS_WRGSBASE = 1268
|
1615
|
+
INS_WRMSR = 1269
|
1616
|
+
INS_XABORT = 1270
|
1617
|
+
INS_XACQUIRE = 1271
|
1618
|
+
INS_XBEGIN = 1272
|
1619
|
+
INS_XCHG = 1273
|
1620
|
+
INS_FXCH = 1274
|
1621
|
+
INS_XCRYPTCBC = 1275
|
1622
|
+
INS_XCRYPTCFB = 1276
|
1623
|
+
INS_XCRYPTCTR = 1277
|
1624
|
+
INS_XCRYPTECB = 1278
|
1625
|
+
INS_XCRYPTOFB = 1279
|
1626
|
+
INS_XEND = 1280
|
1627
|
+
INS_XGETBV = 1281
|
1628
|
+
INS_XLATB = 1282
|
1629
|
+
INS_XRELEASE = 1283
|
1630
|
+
INS_XRSTOR = 1284
|
1631
|
+
INS_XRSTOR64 = 1285
|
1632
|
+
INS_XSAVE = 1286
|
1633
|
+
INS_XSAVE64 = 1287
|
1634
|
+
INS_XSAVEOPT = 1288
|
1635
|
+
INS_XSAVEOPT64 = 1289
|
1636
|
+
INS_XSETBV = 1290
|
1637
|
+
INS_XSHA1 = 1291
|
1638
|
+
INS_XSHA256 = 1292
|
1639
|
+
INS_XSTORE = 1293
|
1640
|
+
INS_XTEST = 1294
|
1641
|
+
INS_ENDING = 1295
|
1642
|
+
|
1643
|
+
# Group of X86 instructions
|
1644
|
+
|
1645
|
+
GRP_INVALID = 0
|
1646
|
+
|
1647
|
+
# Generic groups
|
1648
|
+
GRP_JUMP = 1
|
1649
|
+
GRP_CALL = 2
|
1650
|
+
GRP_RET = 3
|
1651
|
+
GRP_INT = 4
|
1652
|
+
GRP_IRET = 5
|
1653
|
+
|
1654
|
+
# Architecture-specific groups
|
1655
|
+
GRP_VM = 128
|
1656
|
+
GRP_3DNOW = 129
|
1657
|
+
GRP_AES = 130
|
1658
|
+
GRP_ADX = 131
|
1659
|
+
GRP_AVX = 132
|
1660
|
+
GRP_AVX2 = 133
|
1661
|
+
GRP_AVX512 = 134
|
1662
|
+
GRP_BMI = 135
|
1663
|
+
GRP_BMI2 = 136
|
1664
|
+
GRP_CMOV = 137
|
1665
|
+
GRP_F16C = 138
|
1666
|
+
GRP_FMA = 139
|
1667
|
+
GRP_FMA4 = 140
|
1668
|
+
GRP_FSGSBASE = 141
|
1669
|
+
GRP_HLE = 142
|
1670
|
+
GRP_MMX = 143
|
1671
|
+
GRP_MODE32 = 144
|
1672
|
+
GRP_MODE64 = 145
|
1673
|
+
GRP_RTM = 146
|
1674
|
+
GRP_SHA = 147
|
1675
|
+
GRP_SSE1 = 148
|
1676
|
+
GRP_SSE2 = 149
|
1677
|
+
GRP_SSE3 = 150
|
1678
|
+
GRP_SSE41 = 151
|
1679
|
+
GRP_SSE42 = 152
|
1680
|
+
GRP_SSE4A = 153
|
1681
|
+
GRP_SSSE3 = 154
|
1682
|
+
GRP_PCLMUL = 155
|
1683
|
+
GRP_XOP = 156
|
1684
|
+
GRP_CDI = 157
|
1685
|
+
GRP_ERI = 158
|
1686
|
+
GRP_TBM = 159
|
1687
|
+
GRP_16BITMODE = 160
|
1688
|
+
GRP_NOT64BITMODE = 161
|
1689
|
+
GRP_SGX = 162
|
1690
|
+
GRP_DQI = 163
|
1691
|
+
GRP_BWI = 164
|
1692
|
+
GRP_PFI = 165
|
1693
|
+
GRP_VLX = 166
|
1694
|
+
GRP_SMAP = 167
|
1695
|
+
GRP_NOVLX = 168
|
1696
|
+
GRP_ENDING = 169
|
1697
|
+
end
|
1698
|
+
end
|