crabstone 3.0.3
Sign up to get free protection for your applications and to get access to all the features.
- checksums.yaml +7 -0
- data/CHANGES.md +61 -0
- data/LICENSE +25 -0
- data/MANIFEST +312 -0
- data/README.md +103 -0
- data/Rakefile +27 -0
- data/bin/genconst +66 -0
- data/bin/genreg +99 -0
- data/crabstone.gemspec +27 -0
- data/examples/hello_world.rb +43 -0
- data/lib/arch/arm.rb +128 -0
- data/lib/arch/arm64.rb +167 -0
- data/lib/arch/arm64_const.rb +1055 -0
- data/lib/arch/arm64_registers.rb +295 -0
- data/lib/arch/arm_const.rb +777 -0
- data/lib/arch/arm_registers.rb +149 -0
- data/lib/arch/mips.rb +78 -0
- data/lib/arch/mips_const.rb +850 -0
- data/lib/arch/mips_registers.rb +208 -0
- data/lib/arch/ppc.rb +90 -0
- data/lib/arch/ppc_const.rb +1181 -0
- data/lib/arch/ppc_registers.rb +209 -0
- data/lib/arch/sparc.rb +79 -0
- data/lib/arch/sparc_const.rb +461 -0
- data/lib/arch/sparc_registers.rb +121 -0
- data/lib/arch/systemz.rb +79 -0
- data/lib/arch/sysz_const.rb +779 -0
- data/lib/arch/sysz_registers.rb +66 -0
- data/lib/arch/x86.rb +107 -0
- data/lib/arch/x86_const.rb +1698 -0
- data/lib/arch/x86_registers.rb +265 -0
- data/lib/arch/xcore.rb +78 -0
- data/lib/arch/xcore_const.rb +185 -0
- data/lib/arch/xcore_registers.rb +57 -0
- data/lib/crabstone.rb +564 -0
- data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
- data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
- data/test/MC/AArch64/neon-2velem.s.cs +113 -0
- data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
- data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
- data/test/MC/AArch64/neon-across.s.cs +40 -0
- data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
- data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
- data/test/MC/AArch64/neon-crypto.s.cs +15 -0
- data/test/MC/AArch64/neon-extract.s.cs +3 -0
- data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
- data/test/MC/AArch64/neon-max-min.s.cs +37 -0
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
- data/test/MC/AArch64/neon-mov.s.cs +74 -0
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
- data/test/MC/AArch64/neon-perm.s.cs +43 -0
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
- data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
- data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
- data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
- data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
- data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
- data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
- data/test/MC/AArch64/neon-shift.s.cs +22 -0
- data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
- data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
- data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
- data/test/MC/AArch64/neon-tbl.s.cs +21 -0
- data/test/MC/AArch64/trace-regs.s.cs +383 -0
- data/test/MC/ARM/arm-aliases.s.cs +7 -0
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
- data/test/MC/ARM/arm-it-block.s.cs +2 -0
- data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
- data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
- data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
- data/test/MC/ARM/arm_instructions.s.cs +25 -0
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
- data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
- data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
- data/test/MC/ARM/crc32-thumb.s.cs +7 -0
- data/test/MC/ARM/crc32.s.cs +7 -0
- data/test/MC/ARM/dot-req.s.cs +3 -0
- data/test/MC/ARM/fp-armv8.s.cs +52 -0
- data/test/MC/ARM/idiv-thumb.s.cs +3 -0
- data/test/MC/ARM/idiv.s.cs +3 -0
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
- data/test/MC/ARM/mode-switch.s.cs +7 -0
- data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
- data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
- data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
- data/test/MC/ARM/neon-crypto.s.cs +16 -0
- data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
- data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
- data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
- data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neon-v8.s.cs +38 -0
- data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
- data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
- data/test/MC/ARM/neon-vswp.s.cs +3 -0
- data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
- data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
- data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
- data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
- data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
- data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
- data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
- data/test/MC/ARM/thumb-hints.s.cs +12 -0
- data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
- data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
- data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
- data/test/MC/ARM/thumb.s.cs +19 -0
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
- data/test/MC/ARM/thumb2-branches.s.cs +85 -0
- data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
- data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
- data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
- data/test/MC/ARM/vfp4.s.cs +13 -0
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
- data/test/MC/ARM/vpush-vpop.s.cs +9 -0
- data/test/MC/Mips/hilo-addressing.s.cs +4 -0
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
- data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
- data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
- data/test/MC/Mips/micromips-expansions.s.cs +20 -0
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
- data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
- data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
- data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
- data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
- data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
- data/test/MC/Mips/mips-expansions.s.cs +20 -0
- data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
- data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
- data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
- data/test/MC/Mips/mips-register-names.s.cs +33 -0
- data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
- data/test/MC/Mips/mips64-instructions.s.cs +3 -0
- data/test/MC/Mips/mips64-register-names.s.cs +33 -0
- data/test/MC/Mips/mips_directives.s.cs +12 -0
- data/test/MC/Mips/nabi-regs.s.cs +12 -0
- data/test/MC/Mips/set-at-directive.s.cs +6 -0
- data/test/MC/Mips/test_2r.s.cs +16 -0
- data/test/MC/Mips/test_2rf.s.cs +33 -0
- data/test/MC/Mips/test_3r.s.cs +243 -0
- data/test/MC/Mips/test_3rf.s.cs +83 -0
- data/test/MC/Mips/test_bit.s.cs +49 -0
- data/test/MC/Mips/test_cbranch.s.cs +11 -0
- data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
- data/test/MC/Mips/test_elm.s.cs +16 -0
- data/test/MC/Mips/test_elm_insert.s.cs +4 -0
- data/test/MC/Mips/test_elm_insve.s.cs +5 -0
- data/test/MC/Mips/test_i10.s.cs +5 -0
- data/test/MC/Mips/test_i5.s.cs +45 -0
- data/test/MC/Mips/test_i8.s.cs +11 -0
- data/test/MC/Mips/test_lsa.s.cs +5 -0
- data/test/MC/Mips/test_mi10.s.cs +24 -0
- data/test/MC/Mips/test_vec.s.cs +8 -0
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
- data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
- data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
- data/test/MC/README +6 -0
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
- data/test/MC/Sparc/sparc-vis.s.cs +2 -0
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
- data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
- data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
- data/test/MC/SystemZ/insn-good.s.cs +2265 -0
- data/test/MC/SystemZ/regs-good.s.cs +45 -0
- data/test/MC/X86/3DNow.s.cs +29 -0
- data/test/MC/X86/address-size.s.cs +5 -0
- data/test/MC/X86/avx512-encodings.s.cs +12 -0
- data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
- data/test/MC/X86/x86-32-avx.s.cs +833 -0
- data/test/MC/X86/x86-32-fma3.s.cs +169 -0
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
- data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
- data/test/MC/X86/x86_64-encoding.s.cs +59 -0
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
- data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
- data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
- data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
- data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
- data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
- data/test/README +6 -0
- data/test/test.rb +205 -0
- data/test/test.rb.SPEC +235 -0
- data/test/test_arm.rb +202 -0
- data/test/test_arm.rb.SPEC +275 -0
- data/test/test_arm64.rb +150 -0
- data/test/test_arm64.rb.SPEC +116 -0
- data/test/test_detail.rb +228 -0
- data/test/test_detail.rb.SPEC +322 -0
- data/test/test_exhaustive.rb +80 -0
- data/test/test_mips.rb +118 -0
- data/test/test_mips.rb.SPEC +91 -0
- data/test/test_ppc.rb +137 -0
- data/test/test_ppc.rb.SPEC +84 -0
- data/test/test_sanity.rb +83 -0
- data/test/test_skipdata.rb +111 -0
- data/test/test_skipdata.rb.SPEC +58 -0
- data/test/test_sparc.rb +113 -0
- data/test/test_sparc.rb.SPEC +116 -0
- data/test/test_sysz.rb +111 -0
- data/test/test_sysz.rb.SPEC +61 -0
- data/test/test_x86.rb +189 -0
- data/test/test_x86.rb.SPEC +579 -0
- data/test/test_xcore.rb +100 -0
- data/test/test_xcore.rb.SPEC +75 -0
- metadata +393 -0
@@ -0,0 +1,50 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x06,0x20,0x42,0xe2 = sub r2, r2, #6
|
3
|
+
0x06,0x20,0x42,0xe2 = sub r2, r2, #6
|
4
|
+
0x03,0x20,0x42,0xe0 = sub r2, r2, r3
|
5
|
+
0x03,0x20,0x42,0xe0 = sub r2, r2, r3
|
6
|
+
0x06,0x20,0x82,0xe2 = add r2, r2, #6
|
7
|
+
0x06,0x20,0x82,0xe2 = add r2, r2, #6
|
8
|
+
0x03,0x20,0x82,0xe0 = add r2, r2, r3
|
9
|
+
0x03,0x20,0x82,0xe0 = add r2, r2, r3
|
10
|
+
0x06,0x20,0x02,0xe2 = and r2, r2, #6
|
11
|
+
0x06,0x20,0x02,0xe2 = and r2, r2, #6
|
12
|
+
0x03,0x20,0x02,0xe0 = and r2, r2, r3
|
13
|
+
0x03,0x20,0x02,0xe0 = and r2, r2, r3
|
14
|
+
0x06,0x20,0x82,0xe3 = orr r2, r2, #6
|
15
|
+
0x06,0x20,0x82,0xe3 = orr r2, r2, #6
|
16
|
+
0x03,0x20,0x82,0xe1 = orr r2, r2, r3
|
17
|
+
0x03,0x20,0x82,0xe1 = orr r2, r2, r3
|
18
|
+
0x06,0x20,0x22,0xe2 = eor r2, r2, #6
|
19
|
+
0x06,0x20,0x22,0xe2 = eor r2, r2, #6
|
20
|
+
0x03,0x20,0x22,0xe0 = eor r2, r2, r3
|
21
|
+
0x03,0x20,0x22,0xe0 = eor r2, r2, r3
|
22
|
+
0x06,0x20,0xc2,0xe3 = bic r2, r2, #6
|
23
|
+
0x06,0x20,0xc2,0xe3 = bic r2, r2, #6
|
24
|
+
0x03,0x20,0xc2,0xe1 = bic r2, r2, r3
|
25
|
+
0x03,0x20,0xc2,0xe1 = bic r2, r2, r3
|
26
|
+
0x06,0x20,0x52,0x02 = subseq r2, r2, #6
|
27
|
+
0x06,0x20,0x52,0x02 = subseq r2, r2, #6
|
28
|
+
0x03,0x20,0x52,0x00 = subseq r2, r2, r3
|
29
|
+
0x03,0x20,0x52,0x00 = subseq r2, r2, r3
|
30
|
+
0x06,0x20,0x92,0x02 = addseq r2, r2, #6
|
31
|
+
0x06,0x20,0x92,0x02 = addseq r2, r2, #6
|
32
|
+
0x03,0x20,0x92,0x00 = addseq r2, r2, r3
|
33
|
+
0x03,0x20,0x92,0x00 = addseq r2, r2, r3
|
34
|
+
0x06,0x20,0x12,0x02 = andseq r2, r2, #6
|
35
|
+
0x06,0x20,0x12,0x02 = andseq r2, r2, #6
|
36
|
+
0x03,0x20,0x12,0x00 = andseq r2, r2, r3
|
37
|
+
0x03,0x20,0x12,0x00 = andseq r2, r2, r3
|
38
|
+
0x06,0x20,0x92,0x03 = orrseq r2, r2, #6
|
39
|
+
0x06,0x20,0x92,0x03 = orrseq r2, r2, #6
|
40
|
+
0x03,0x20,0x92,0x01 = orrseq r2, r2, r3
|
41
|
+
0x03,0x20,0x92,0x01 = orrseq r2, r2, r3
|
42
|
+
0x06,0x20,0x32,0x02 = eorseq r2, r2, #6
|
43
|
+
0x06,0x20,0x32,0x02 = eorseq r2, r2, #6
|
44
|
+
0x03,0x20,0x32,0x00 = eorseq r2, r2, r3
|
45
|
+
0x03,0x20,0x32,0x00 = eorseq r2, r2, r3
|
46
|
+
0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6
|
47
|
+
0x06,0x20,0xd2,0x03 = bicseq r2, r2, #6
|
48
|
+
0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3
|
49
|
+
0x03,0x20,0xd2,0x01 = bicseq r2, r2, r3
|
50
|
+
0x7b,0x00,0x8f,0xe2 = add r0, pc, #123
|
@@ -0,0 +1,138 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x00,0x50,0x97,0xe5 = ldr r5, [r7]
|
3
|
+
0x3f,0x60,0x93,0xe5 = ldr r6, [r3, #63]
|
4
|
+
0xff,0x2f,0xb4,0xe5 = ldr r2, [r4, #4095]!
|
5
|
+
0x1e,0x10,0x92,0xe4 = ldr r1, [r2], #30
|
6
|
+
0x1e,0x30,0x11,0xe4 = ldr r3, [r1], #-30
|
7
|
+
0x00,0x90,0x12,0xe4 = ldr r9, [r2], #-0
|
8
|
+
0x01,0x30,0x98,0xe7 = ldr r3, [r8, r1]
|
9
|
+
0x03,0x20,0x15,0xe7 = ldr r2, [r5, -r3]
|
10
|
+
0x09,0x10,0xb5,0xe7 = ldr r1, [r5, r9]!
|
11
|
+
0x08,0x60,0x37,0xe7 = ldr r6, [r7, -r8]!
|
12
|
+
0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]!
|
13
|
+
0x02,0x50,0x99,0xe6 = ldr r5, [r9], r2
|
14
|
+
0x06,0x40,0x13,0xe6 = ldr r4, [r3], -r6
|
15
|
+
0x82,0x37,0x18,0xe7 = ldr r3, [r8, -r2, lsl #15]
|
16
|
+
0xc3,0x17,0x95,0xe6 = ldr r1, [r5], r3, asr #15
|
17
|
+
0x00,0x30,0xd8,0xe5 = ldrb r3, [r8]
|
18
|
+
0x3f,0x10,0xdd,0xe5 = ldrb r1, [sp, #63]
|
19
|
+
0xff,0x9f,0xf3,0xe5 = ldrb r9, [r3, #4095]!
|
20
|
+
0x16,0x80,0xd1,0xe4 = ldrb r8, [r1], #22
|
21
|
+
0x13,0x20,0x57,0xe4 = ldrb r2, [r7], #-19
|
22
|
+
0x05,0x90,0xd8,0xe7 = ldrb r9, [r8, r5]
|
23
|
+
0x01,0x10,0x55,0xe7 = ldrb r1, [r5, -r1]
|
24
|
+
0x02,0x30,0xf5,0xe7 = ldrb r3, [r5, r2]!
|
25
|
+
0x03,0x60,0x79,0xe7 = ldrb r6, [r9, -r3]!
|
26
|
+
0x04,0x20,0xd1,0xe6 = ldrb r2, [r1], r4
|
27
|
+
0x05,0x80,0x54,0xe6 = ldrb r8, [r4], -r5
|
28
|
+
0x81,0x77,0x5c,0xe7 = ldrb r7, [r12, -r1, lsl #15]
|
29
|
+
0xc9,0x57,0xd2,0xe6 = ldrb r5, [r2], r9, asr #15
|
30
|
+
0x04,0x30,0xf1,0xe4 = ldrbt r3, [r1], #4
|
31
|
+
0x08,0x20,0x78,0xe4 = ldrbt r2, [r8], #-8
|
32
|
+
0x06,0x80,0xf7,0xe6 = ldrbt r8, [r7], r6
|
33
|
+
0x06,0x16,0x72,0xe6 = ldrbt r1, [r2], -r6, lsl #12
|
34
|
+
0xd0,0x20,0xc5,0xe1 = ldrd r2, r3, [r5]
|
35
|
+
0xdf,0x60,0xc2,0xe1 = ldrd r6, r7, [r2, #15]
|
36
|
+
0xd0,0x02,0xe9,0xe1 = ldrd r0, r1, [r9, #32]!
|
37
|
+
0xd8,0x60,0xc1,0xe0 = ldrd r6, r7, [r1], #8
|
38
|
+
0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0
|
39
|
+
0xd0,0x00,0xc8,0xe0 = ldrd r0, r1, [r8], #0
|
40
|
+
0xd0,0x00,0x48,0xe0 = ldrd r0, r1, [r8], #-0
|
41
|
+
0xd3,0x40,0x81,0xe1 = ldrd r4, r5, [r1, r3]
|
42
|
+
0xd2,0x40,0xa7,0xe1 = ldrd r4, r5, [r7, r2]!
|
43
|
+
0xdc,0x00,0x88,0xe0 = ldrd r0, r1, [r8], r12
|
44
|
+
0xdc,0x00,0x08,0xe0 = ldrd r0, r1, [r8], -r12
|
45
|
+
0xb0,0x30,0xd4,0xe1 = ldrh r3, [r4]
|
46
|
+
0xb4,0x20,0xd7,0xe1 = ldrh r2, [r7, #4]
|
47
|
+
0xb0,0x14,0xf8,0xe1 = ldrh r1, [r8, #64]!
|
48
|
+
0xb4,0xc0,0xdd,0xe0 = ldrh r12, [sp], #4
|
49
|
+
0xb4,0x60,0x95,0xe1 = ldrh r6, [r5, r4]
|
50
|
+
0xbb,0x30,0xb8,0xe1 = ldrh r3, [r8, r11]!
|
51
|
+
0xb1,0x10,0x32,0xe1 = ldrh r1, [r2, -r1]!
|
52
|
+
0xb2,0x90,0x97,0xe0 = ldrh r9, [r7], r2
|
53
|
+
0xb2,0x40,0x13,0xe0 = ldrh r4, [r3], -r2
|
54
|
+
0xb0,0x98,0xf7,0xe0 = ldrht r9, [r7], #128
|
55
|
+
0xbb,0x44,0x73,0xe0 = ldrht r4, [r3], #-75
|
56
|
+
0xb2,0x90,0xb7,0xe0 = ldrht r9, [r7], r2
|
57
|
+
0xb2,0x40,0x33,0xe0 = ldrht r4, [r3], -r2
|
58
|
+
0xd0,0x30,0xd4,0xe1 = ldrsb r3, [r4]
|
59
|
+
0xd1,0x21,0xd7,0xe1 = ldrsb r2, [r7, #17]
|
60
|
+
0xdf,0x1f,0xf8,0xe1 = ldrsb r1, [r8, #255]!
|
61
|
+
0xd9,0xc0,0xdd,0xe0 = ldrsb r12, [sp], #9
|
62
|
+
0xd4,0x60,0x95,0xe1 = ldrsb r6, [r5, r4]
|
63
|
+
0xdb,0x30,0xb8,0xe1 = ldrsb r3, [r8, r11]!
|
64
|
+
0xd1,0x10,0x32,0xe1 = ldrsb r1, [r2, -r1]!
|
65
|
+
0xd2,0x90,0x97,0xe0 = ldrsb r9, [r7], r2
|
66
|
+
0xd2,0x40,0x13,0xe0 = ldrsb r4, [r3], -r2
|
67
|
+
0xd1,0x50,0xf6,0xe0 = ldrsbt r5, [r6], #1
|
68
|
+
0xdc,0x30,0x78,0xe0 = ldrsbt r3, [r8], #-12
|
69
|
+
0xd5,0x80,0xb9,0xe0 = ldrsbt r8, [r9], r5
|
70
|
+
0xd4,0x20,0x31,0xe0 = ldrsbt r2, [r1], -r4
|
71
|
+
0xf0,0x50,0xd9,0xe1 = ldrsh r5, [r9]
|
72
|
+
0xf7,0x40,0xd5,0xe1 = ldrsh r4, [r5, #7]
|
73
|
+
0xf7,0x33,0xf6,0xe1 = ldrsh r3, [r6, #55]!
|
74
|
+
0xf9,0x20,0x57,0xe0 = ldrsh r2, [r7], #-9
|
75
|
+
0xf5,0x30,0x91,0xe1 = ldrsh r3, [r1, r5]
|
76
|
+
0xf1,0x40,0xb6,0xe1 = ldrsh r4, [r6, r1]!
|
77
|
+
0xf6,0x50,0x33,0xe1 = ldrsh r5, [r3, -r6]!
|
78
|
+
0xf8,0x60,0x99,0xe0 = ldrsh r6, [r9], r8
|
79
|
+
0xf3,0x70,0x18,0xe0 = ldrsh r7, [r8], -r3
|
80
|
+
0xf1,0x50,0xf6,0xe0 = ldrsht r5, [r6], #1
|
81
|
+
0xfc,0x30,0x78,0xe0 = ldrsht r3, [r8], #-12
|
82
|
+
0xf5,0x80,0xb9,0xe0 = ldrsht r8, [r9], r5
|
83
|
+
0xf4,0x20,0x31,0xe0 = ldrsht r2, [r1], -r4
|
84
|
+
0x00,0x80,0x8c,0xe5 = str r8, [r12]
|
85
|
+
0x0c,0x70,0x81,0xe5 = str r7, [r1, #12]
|
86
|
+
0x28,0x30,0xa5,0xe5 = str r3, [r5, #40]!
|
87
|
+
0xff,0x9f,0x8d,0xe4 = str r9, [sp], #4095
|
88
|
+
0x80,0x10,0x07,0xe4 = str r1, [r7], #-128
|
89
|
+
0x00,0x10,0x00,0xe4 = str r1, [r0], #-0
|
90
|
+
0x03,0x90,0x86,0xe7 = str r9, [r6, r3]
|
91
|
+
0x02,0x80,0x00,0xe7 = str r8, [r0, -r2]
|
92
|
+
0x06,0x70,0xa1,0xe7 = str r7, [r1, r6]!
|
93
|
+
0x01,0x60,0x2d,0xe7 = str r6, [sp, -r1]!
|
94
|
+
0x09,0x50,0x83,0xe6 = str r5, [r3], r9
|
95
|
+
0x05,0x40,0x02,0xe6 = str r4, [r2], -r5
|
96
|
+
0x02,0x31,0x04,0xe7 = str r3, [r4, -r2, lsl #2]
|
97
|
+
0x43,0x2c,0x87,0xe6 = str r2, [r7], r3, asr #24
|
98
|
+
0x00,0x90,0xc2,0xe5 = strb r9, [r2]
|
99
|
+
0x03,0x70,0xc1,0xe5 = strb r7, [r1, #3]
|
100
|
+
0x95,0x61,0xe4,0xe5 = strb r6, [r4, #405]!
|
101
|
+
0x48,0x50,0xc7,0xe4 = strb r5, [r7], #72
|
102
|
+
0x01,0x10,0x4d,0xe4 = strb r1, [sp], #-1
|
103
|
+
0x09,0x10,0xc2,0xe7 = strb r1, [r2, r9]
|
104
|
+
0x08,0x20,0x43,0xe7 = strb r2, [r3, -r8]
|
105
|
+
0x07,0x30,0xe4,0xe7 = strb r3, [r4, r7]!
|
106
|
+
0x06,0x40,0x65,0xe7 = strb r4, [r5, -r6]!
|
107
|
+
0x05,0x50,0xc6,0xe6 = strb r5, [r6], r5
|
108
|
+
0x04,0x60,0x42,0xe6 = strb r6, [r2], -r4
|
109
|
+
0x83,0x72,0x4c,0xe7 = strb r7, [r12, -r3, lsl #5]
|
110
|
+
0x42,0xd6,0xc7,0xe6 = strb sp, [r7], r2, asr #12
|
111
|
+
0x0c,0x60,0xe2,0xe4 = strbt r6, [r2], #12
|
112
|
+
0x0d,0x50,0x66,0xe4 = strbt r5, [r6], #-13
|
113
|
+
0x05,0x40,0xe9,0xe6 = strbt r4, [r9], r5
|
114
|
+
0x82,0x31,0x68,0xe6 = strbt r3, [r8], -r2, lsl #3
|
115
|
+
0xf0,0x10,0xc4,0xe1 = strd r1, r2, [r4]
|
116
|
+
0xf1,0x20,0xc6,0xe1 = strd r2, r3, [r6, #1]
|
117
|
+
0xf6,0x31,0xe7,0xe1 = strd r3, r4, [r7, #22]!
|
118
|
+
0xf7,0x40,0xc8,0xe0 = strd r4, r5, [r8], #7
|
119
|
+
0xf0,0x50,0xcd,0xe0 = strd r5, r6, [sp], #0
|
120
|
+
0xf0,0x60,0xce,0xe0 = strd r6, r7, [lr], #0
|
121
|
+
0xf0,0x70,0x49,0xe0 = strd r7, r8, [r9], #-0
|
122
|
+
0xf1,0x80,0x84,0xe1 = strd r8, r9, [r4, r1]
|
123
|
+
0xf9,0x70,0xa3,0xe1 = strd r7, r8, [r3, r9]!
|
124
|
+
0xf8,0x60,0x85,0xe0 = strd r6, r7, [r5], r8
|
125
|
+
0xfa,0x50,0x0c,0xe0 = strd r5, r6, [r12], -r10
|
126
|
+
0xb0,0x30,0xc4,0xe1 = strh r3, [r4]
|
127
|
+
0xb4,0x20,0xc7,0xe1 = strh r2, [r7, #4]
|
128
|
+
0xb0,0x14,0xe8,0xe1 = strh r1, [r8, #64]!
|
129
|
+
0xb4,0xc0,0xcd,0xe0 = strh r12, [sp], #4
|
130
|
+
0xb4,0x60,0x85,0xe1 = strh r6, [r5, r4]
|
131
|
+
0xbb,0x30,0xa8,0xe1 = strh r3, [r8, r11]!
|
132
|
+
0xb1,0x10,0x22,0xe1 = strh r1, [r2, -r1]!
|
133
|
+
0xb2,0x90,0x87,0xe0 = strh r9, [r7], r2
|
134
|
+
0xb2,0x40,0x03,0xe0 = strh r4, [r3], -r2
|
135
|
+
0xbc,0x24,0xe5,0xe0 = strht r2, [r5], #76
|
136
|
+
0xb9,0x81,0x61,0xe0 = strht r8, [r1], #-25
|
137
|
+
0xb4,0x50,0xa3,0xe0 = strht r5, [r3], r4
|
138
|
+
0xb0,0x60,0x28,0xe0 = strht r6, [r8], -r0
|
@@ -0,0 +1,50 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0]
|
3
|
+
0x20,0x00,0x90,0xe7 = ldr r0, [r0, r0, lsr #32]
|
4
|
+
0x20,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsr #16]
|
5
|
+
0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0]
|
6
|
+
0x00,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsl #16]
|
7
|
+
0x40,0x00,0x90,0xe7 = ldr r0, [r0, r0, asr #32]
|
8
|
+
0x40,0x08,0x90,0xe7 = ldr r0, [r0, r0, asr #16]
|
9
|
+
0x60,0x00,0x90,0xe7 = ldr r0, [r0, r0, rrx]
|
10
|
+
0x60,0x08,0x90,0xe7 = ldr r0, [r0, r0, ror #16]
|
11
|
+
0x00,0xf0,0xd0,0xf7 = pld [r0, r0]
|
12
|
+
0x20,0xf0,0xd0,0xf7 = pld [r0, r0, lsr #32]
|
13
|
+
0x20,0xf8,0xd0,0xf7 = pld [r0, r0, lsr #16]
|
14
|
+
0x00,0xf0,0xd0,0xf7 = pld [r0, r0]
|
15
|
+
0x00,0xf8,0xd0,0xf7 = pld [r0, r0, lsl #16]
|
16
|
+
0x40,0xf0,0xd0,0xf7 = pld [r0, r0, asr #32]
|
17
|
+
0x40,0xf8,0xd0,0xf7 = pld [r0, r0, asr #16]
|
18
|
+
0x60,0xf0,0xd0,0xf7 = pld [r0, r0, rrx]
|
19
|
+
0x60,0xf8,0xd0,0xf7 = pld [r0, r0, ror #16]
|
20
|
+
0x00,0x00,0x80,0xe7 = str r0, [r0, r0]
|
21
|
+
0x20,0x00,0x80,0xe7 = str r0, [r0, r0, lsr #32]
|
22
|
+
0x20,0x08,0x80,0xe7 = str r0, [r0, r0, lsr #16]
|
23
|
+
0x00,0x00,0x80,0xe7 = str r0, [r0, r0]
|
24
|
+
0x00,0x08,0x80,0xe7 = str r0, [r0, r0, lsl #16]
|
25
|
+
0x40,0x00,0x80,0xe7 = str r0, [r0, r0, asr #32]
|
26
|
+
0x40,0x08,0x80,0xe7 = str r0, [r0, r0, asr #16]
|
27
|
+
0x60,0x00,0x80,0xe7 = str r0, [r0, r0, rrx]
|
28
|
+
0x60,0x08,0x80,0xe7 = str r0, [r0, r0, ror #16]
|
29
|
+
0x62,0x00,0x91,0xe6 = ldr r0, [r1], r2, rrx
|
30
|
+
0x05,0x30,0x94,0xe6 = ldr r3, [r4], r5
|
31
|
+
0x08,0x60,0x87,0xe6 = str r6, [r7], r8
|
32
|
+
0x0b,0x90,0x8a,0xe6 = str r9, [r10], r11
|
33
|
+
0x0f,0xd0,0xae,0xe0 = adc sp, lr, pc
|
34
|
+
0x29,0x10,0xa8,0xe0 = adc r1, r8, r9, lsr #32
|
35
|
+
0x2f,0x28,0xa7,0xe0 = adc r2, r7, pc, lsr #16
|
36
|
+
0x0a,0x30,0xa6,0xe0 = adc r3, r6, r10
|
37
|
+
0x0e,0x48,0xa5,0xe0 = adc r4, r5, lr, lsl #16
|
38
|
+
0x4b,0x50,0xa4,0xe0 = adc r5, r4, r11, asr #32
|
39
|
+
0x4d,0x68,0xa3,0xe0 = adc r6, r3, sp, asr #16
|
40
|
+
0x6c,0x70,0xa2,0xe0 = adc r7, r2, r12, rrx
|
41
|
+
0x60,0x88,0xa1,0xe0 = adc r8, r1, r0, ror #16
|
42
|
+
0x0e,0x00,0x5d,0xe1 = cmp sp, lr
|
43
|
+
0x28,0x00,0x51,0xe1 = cmp r1, r8, lsr #32
|
44
|
+
0x27,0x08,0x52,0xe1 = cmp r2, r7, lsr #16
|
45
|
+
0x06,0x00,0x53,0xe1 = cmp r3, r6
|
46
|
+
0x05,0x08,0x54,0xe1 = cmp r4, r5, lsl #16
|
47
|
+
0x44,0x00,0x55,0xe1 = cmp r5, r4, asr #32
|
48
|
+
0x43,0x08,0x56,0xe1 = cmp r6, r3, asr #16
|
49
|
+
0x62,0x00,0x57,0xe1 = cmp r7, r2, rrx
|
50
|
+
0x61,0x08,0x58,0xe1 = cmp r8, r1, ror #16
|
@@ -0,0 +1,15 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x02,0x10,0xb0,0xe6 = ldrt r1, [r0], r2
|
3
|
+
0xa2,0x11,0xb0,0xe6 = ldrt r1, [r0], r2, lsr #3
|
4
|
+
0x04,0x10,0xb0,0xe4 = ldrt r1, [r0], #4
|
5
|
+
0x02,0x10,0xf0,0xe6 = ldrbt r1, [r0], r2
|
6
|
+
0xa2,0x11,0xf0,0xe6 = ldrbt r1, [r0], r2, lsr #3
|
7
|
+
0x04,0x10,0xf0,0xe4 = ldrbt r1, [r0], #4
|
8
|
+
0x02,0x10,0xa0,0xe6 = strt r1, [r0], r2
|
9
|
+
0xa2,0x11,0xa0,0xe6 = strt r1, [r0], r2, lsr #3
|
10
|
+
0x04,0x10,0xa0,0xe4 = strt r1, [r0], #4
|
11
|
+
0x02,0x10,0xe0,0xe6 = strbt r1, [r0], r2
|
12
|
+
0xa2,0x11,0xe0,0xe6 = strbt r1, [r0], r2, lsr #3
|
13
|
+
0x04,0x10,0xe0,0xe4 = strbt r1, [r0], #4
|
14
|
+
0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]!
|
15
|
+
0xa2,0x11,0xf0,0xe7 = ldrb r1, [r0, r2, lsr #3]!
|
@@ -0,0 +1,9 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0xd2,0x10,0xb0,0xe0 = ldrsbt r1, [r0], r2
|
3
|
+
0xd4,0x10,0xf0,0xe0 = ldrsbt r1, [r0], #4
|
4
|
+
0xf2,0x10,0xb0,0xe0 = ldrsht r1, [r0], r2
|
5
|
+
0xf4,0x10,0xf0,0xe0 = ldrsht r1, [r0], #4
|
6
|
+
0xb2,0x10,0xb0,0xe0 = ldrht r1, [r0], r2
|
7
|
+
0xb4,0x10,0xf0,0xe0 = ldrht r1, [r0], #4
|
8
|
+
0xb2,0x10,0xa0,0xe0 = strht r1, [r0], r2
|
9
|
+
0xb4,0x10,0xe0,0xe0 = strht r1, [r0], #4
|
@@ -0,0 +1,25 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x1e,0xff,0x2f,0xe1 = bx lr
|
3
|
+
0xa0,0x0d,0xe1,0xf2 = vqdmull.s32 q8, d17, d16
|
4
|
+
0x03,0x10,0x02,0xe0 = and r1, r2, r3
|
5
|
+
0x03,0x10,0x12,0xe0 = ands r1, r2, r3
|
6
|
+
0x03,0x10,0x22,0xe0 = eor r1, r2, r3
|
7
|
+
0x03,0x10,0x32,0xe0 = eors r1, r2, r3
|
8
|
+
0x03,0x10,0x42,0xe0 = sub r1, r2, r3
|
9
|
+
0x03,0x10,0x52,0xe0 = subs r1, r2, r3
|
10
|
+
0x03,0x10,0x82,0xe0 = add r1, r2, r3
|
11
|
+
0x03,0x10,0x92,0xe0 = adds r1, r2, r3
|
12
|
+
0x03,0x10,0xa2,0xe0 = adc r1, r2, r3
|
13
|
+
0x03,0x10,0xc2,0xe1 = bic r1, r2, r3
|
14
|
+
0x03,0x10,0xd2,0xe1 = bics r1, r2, r3
|
15
|
+
0x02,0x10,0xa0,0xe1 = mov r1, r2
|
16
|
+
0x02,0x10,0xe0,0xe1 = mvn r1, r2
|
17
|
+
0x02,0x10,0xf0,0xe1 = mvns r1, r2
|
18
|
+
0x90,0x02,0xcb,0xe7 = bfi r0, r0, #5, #7
|
19
|
+
0x7a,0x00,0x20,0xe1 = bkpt #10
|
20
|
+
0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4
|
21
|
+
0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4
|
22
|
+
0x13,0x14,0x82,0xe0 = add r1, r2, r3, lsl r4
|
23
|
+
0x30,0x0f,0xa6,0xe6 = ssat16 r0, #7, r0
|
24
|
+
0x00,0x00,0x0a,0xf1 = cpsie none, #0
|
25
|
+
0xb0,0x30,0x42,0xe1 = strh r3, [r2, #-0]
|
@@ -0,0 +1,10 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM+CS_MODE_V8, None
|
2
|
+
0x59,0xf0,0x7f,0xf5 = dmb ishld
|
3
|
+
0x51,0xf0,0x7f,0xf5 = dmb oshld
|
4
|
+
0x55,0xf0,0x7f,0xf5 = dmb nshld
|
5
|
+
0x5d,0xf0,0x7f,0xf5 = dmb ld
|
6
|
+
0x49,0xf0,0x7f,0xf5 = dsb ishld
|
7
|
+
0x41,0xf0,0x7f,0xf5 = dsb oshld
|
8
|
+
0x45,0xf0,0x7f,0xf5 = dsb nshld
|
9
|
+
0x4d,0xf0,0x7f,0xf5 = dsb ld
|
10
|
+
0x05,0xf0,0x20,0xe3 = sevl
|
@@ -0,0 +1,997 @@
|
|
1
|
+
# CS_ARCH_ARM, CS_MODE_ARM, None
|
2
|
+
0x0f,0x10,0xa2,0xe2 = adc r1, r2, #15
|
3
|
+
0xf0,0x10,0xa2,0xe2 = adc r1, r2, #240
|
4
|
+
0x0f,0x1c,0xa2,0xe2 = adc r1, r2, #3840
|
5
|
+
0x0f,0x1a,0xa2,0xe2 = adc r1, r2, #61440
|
6
|
+
0x0f,0x18,0xa2,0xe2 = adc r1, r2, #983040
|
7
|
+
0x0f,0x16,0xa2,0xe2 = adc r1, r2, #15728640
|
8
|
+
0x0f,0x14,0xa2,0xe2 = adc r1, r2, #251658240
|
9
|
+
0x0f,0x12,0xa2,0xe2 = adc r1, r2, #4026531840
|
10
|
+
0xff,0x12,0xa2,0xe2 = adc r1, r2, #4026531855
|
11
|
+
0x0f,0x1c,0xb2,0xe2 = adcs r1, r2, #3840
|
12
|
+
0x0f,0x1c,0xb2,0x02 = adcseq r1, r2, #3840
|
13
|
+
0x0f,0x1c,0xa2,0x02 = adceq r1, r2, #3840
|
14
|
+
0x06,0x40,0xa5,0xe0 = adc r4, r5, r6
|
15
|
+
0x86,0x40,0xa5,0xe0 = adc r4, r5, r6, lsl #1
|
16
|
+
0x86,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsl #31
|
17
|
+
0xa6,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #1
|
18
|
+
0xa6,0x4f,0xa5,0xe0 = adc r4, r5, r6, lsr #31
|
19
|
+
0x26,0x40,0xa5,0xe0 = adc r4, r5, r6, lsr #32
|
20
|
+
0xc6,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #1
|
21
|
+
0xc6,0x4f,0xa5,0xe0 = adc r4, r5, r6, asr #31
|
22
|
+
0x46,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #32
|
23
|
+
0xe6,0x40,0xa5,0xe0 = adc r4, r5, r6, ror #1
|
24
|
+
0xe6,0x4f,0xa5,0xe0 = adc r4, r5, r6, ror #31
|
25
|
+
0x18,0x69,0xa7,0xe0 = adc r6, r7, r8, lsl r9
|
26
|
+
0x38,0x69,0xa7,0xe0 = adc r6, r7, r8, lsr r9
|
27
|
+
0x58,0x69,0xa7,0xe0 = adc r6, r7, r8, asr r9
|
28
|
+
0x78,0x69,0xa7,0xe0 = adc r6, r7, r8, ror r9
|
29
|
+
0x66,0x40,0xa5,0xe0 = adc r4, r5, r6, rrx
|
30
|
+
0x06,0x50,0xa5,0xe0 = adc r5, r5, r6
|
31
|
+
0x85,0x40,0xa4,0xe0 = adc r4, r4, r5, lsl #1
|
32
|
+
0x85,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsl #31
|
33
|
+
0xa5,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #1
|
34
|
+
0xa5,0x4f,0xa4,0xe0 = adc r4, r4, r5, lsr #31
|
35
|
+
0x25,0x40,0xa4,0xe0 = adc r4, r4, r5, lsr #32
|
36
|
+
0xc5,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #1
|
37
|
+
0xc5,0x4f,0xa4,0xe0 = adc r4, r4, r5, asr #31
|
38
|
+
0x45,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #32
|
39
|
+
0xe5,0x40,0xa4,0xe0 = adc r4, r4, r5, ror #1
|
40
|
+
0xe5,0x4f,0xa4,0xe0 = adc r4, r4, r5, ror #31
|
41
|
+
0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx
|
42
|
+
0x17,0x69,0xa6,0xe0 = adc r6, r6, r7, lsl r9
|
43
|
+
0x37,0x69,0xa6,0xe0 = adc r6, r6, r7, lsr r9
|
44
|
+
0x57,0x69,0xa6,0xe0 = adc r6, r6, r7, asr r9
|
45
|
+
0x77,0x69,0xa6,0xe0 = adc r6, r6, r7, ror r9
|
46
|
+
0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx
|
47
|
+
0x0f,0x4a,0x85,0xe2 = add r4, r5, #61440
|
48
|
+
0x06,0x40,0x85,0xe0 = add r4, r5, r6
|
49
|
+
0x86,0x42,0x85,0xe0 = add r4, r5, r6, lsl #5
|
50
|
+
0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5
|
51
|
+
0xa6,0x42,0x85,0xe0 = add r4, r5, r6, lsr #5
|
52
|
+
0xc6,0x42,0x85,0xe0 = add r4, r5, r6, asr #5
|
53
|
+
0xe6,0x42,0x85,0xe0 = add r4, r5, r6, ror #5
|
54
|
+
0x18,0x69,0x87,0xe0 = add r6, r7, r8, lsl r9
|
55
|
+
0x13,0x49,0x84,0xe0 = add r4, r4, r3, lsl r9
|
56
|
+
0x38,0x69,0x87,0xe0 = add r6, r7, r8, lsr r9
|
57
|
+
0x58,0x69,0x87,0xe0 = add r6, r7, r8, asr r9
|
58
|
+
0x78,0x69,0x87,0xe0 = add r6, r7, r8, ror r9
|
59
|
+
0x66,0x40,0x85,0xe0 = add r4, r5, r6, rrx
|
60
|
+
0x0f,0x5a,0x85,0xe2 = add r5, r5, #61440
|
61
|
+
0x05,0x40,0x84,0xe0 = add r4, r4, r5
|
62
|
+
0x85,0x42,0x84,0xe0 = add r4, r4, r5, lsl #5
|
63
|
+
0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5
|
64
|
+
0xa5,0x42,0x84,0xe0 = add r4, r4, r5, lsr #5
|
65
|
+
0xc5,0x42,0x84,0xe0 = add r4, r4, r5, asr #5
|
66
|
+
0xe5,0x42,0x84,0xe0 = add r4, r4, r5, ror #5
|
67
|
+
0x17,0x69,0x86,0xe0 = add r6, r6, r7, lsl r9
|
68
|
+
0x37,0x69,0x86,0xe0 = add r6, r6, r7, lsr r9
|
69
|
+
0x57,0x69,0x86,0xe0 = add r6, r6, r7, asr r9
|
70
|
+
0x77,0x69,0x86,0xe0 = add r6, r6, r7, ror r9
|
71
|
+
0x65,0x40,0x84,0xe0 = add r4, r4, r5, rrx
|
72
|
+
0x04,0x00,0x40,0xe2 = sub r0, r0, #4
|
73
|
+
0x15,0x40,0x45,0xe2 = sub r4, r5, #21
|
74
|
+
0x22,0x30,0x81,0xe0 = add r3, r1, r2, lsr #32
|
75
|
+
0x42,0x30,0x81,0xe0 = add r3, r1, r2, asr #32
|
76
|
+
0x0f,0xa0,0x01,0xe2 = and r10, r1, #15
|
77
|
+
0x06,0xa0,0x01,0xe0 = and r10, r1, r6
|
78
|
+
0x06,0xa5,0x01,0xe0 = and r10, r1, r6, lsl #10
|
79
|
+
0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10
|
80
|
+
0x26,0xa5,0x01,0xe0 = and r10, r1, r6, lsr #10
|
81
|
+
0x46,0xa5,0x01,0xe0 = and r10, r1, r6, asr #10
|
82
|
+
0x66,0xa5,0x01,0xe0 = and r10, r1, r6, ror #10
|
83
|
+
0x18,0x62,0x07,0xe0 = and r6, r7, r8, lsl r2
|
84
|
+
0x38,0x62,0x07,0xe0 = and r6, r7, r8, lsr r2
|
85
|
+
0x58,0x62,0x07,0xe0 = and r6, r7, r8, asr r2
|
86
|
+
0x78,0x62,0x07,0xe0 = and r6, r7, r8, ror r2
|
87
|
+
0x66,0xa0,0x01,0xe0 = and r10, r1, r6, rrx
|
88
|
+
0x02,0x21,0xc3,0xe3 = bic r2, r3, #-2147483648
|
89
|
+
0x0f,0x10,0x01,0xe2 = and r1, r1, #15
|
90
|
+
0x01,0xa0,0x0a,0xe0 = and r10, r10, r1
|
91
|
+
0x01,0xa5,0x0a,0xe0 = and r10, r10, r1, lsl #10
|
92
|
+
0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10
|
93
|
+
0x21,0xa5,0x0a,0xe0 = and r10, r10, r1, lsr #10
|
94
|
+
0x41,0xa5,0x0a,0xe0 = and r10, r10, r1, asr #10
|
95
|
+
0x61,0xa5,0x0a,0xe0 = and r10, r10, r1, ror #10
|
96
|
+
0x17,0x62,0x06,0xe0 = and r6, r6, r7, lsl r2
|
97
|
+
0x37,0x62,0x06,0xe0 = and r6, r6, r7, lsr r2
|
98
|
+
0x57,0x62,0x06,0xe0 = and r6, r6, r7, asr r2
|
99
|
+
0x77,0x62,0x06,0xe0 = and r6, r6, r7, ror r2
|
100
|
+
0x61,0xa0,0x0a,0xe0 = and r10, r10, r1, rrx
|
101
|
+
0x22,0x30,0x01,0xe0 = and r3, r1, r2, lsr #32
|
102
|
+
0x42,0x30,0x01,0xe0 = and r3, r1, r2, asr #32
|
103
|
+
0x44,0x20,0xa0,0xe1 = asr r2, r4, #32
|
104
|
+
0x44,0x21,0xa0,0xe1 = asr r2, r4, #2
|
105
|
+
0x04,0x20,0xa0,0xe1 = mov r2, r4
|
106
|
+
0x44,0x41,0xa0,0xe1 = asr r4, r4, #2
|
107
|
+
0x9f,0x51,0xd3,0xe7 = bfc r5, #3, #17
|
108
|
+
0x9f,0x51,0xd3,0x37 = bfclo r5, #3, #17
|
109
|
+
0x92,0x51,0xd3,0xe7 = bfi r5, r2, #3, #17
|
110
|
+
0x92,0x51,0xd3,0x17 = bfine r5, r2, #3, #17
|
111
|
+
0x0f,0xa0,0xc1,0xe3 = bic r10, r1, #15
|
112
|
+
0x06,0xa0,0xc1,0xe1 = bic r10, r1, r6
|
113
|
+
0x06,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsl #10
|
114
|
+
0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10
|
115
|
+
0x26,0xa5,0xc1,0xe1 = bic r10, r1, r6, lsr #10
|
116
|
+
0x46,0xa5,0xc1,0xe1 = bic r10, r1, r6, asr #10
|
117
|
+
0x66,0xa5,0xc1,0xe1 = bic r10, r1, r6, ror #10
|
118
|
+
0x18,0x62,0xc7,0xe1 = bic r6, r7, r8, lsl r2
|
119
|
+
0x38,0x62,0xc7,0xe1 = bic r6, r7, r8, lsr r2
|
120
|
+
0x58,0x62,0xc7,0xe1 = bic r6, r7, r8, asr r2
|
121
|
+
0x78,0x62,0xc7,0xe1 = bic r6, r7, r8, ror r2
|
122
|
+
0x66,0xa0,0xc1,0xe1 = bic r10, r1, r6, rrx
|
123
|
+
0x0f,0x10,0xc1,0xe3 = bic r1, r1, #15
|
124
|
+
0x01,0xa0,0xca,0xe1 = bic r10, r10, r1
|
125
|
+
0x01,0xa5,0xca,0xe1 = bic r10, r10, r1, lsl #10
|
126
|
+
0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10
|
127
|
+
0x21,0xa5,0xca,0xe1 = bic r10, r10, r1, lsr #10
|
128
|
+
0x41,0xa5,0xca,0xe1 = bic r10, r10, r1, asr #10
|
129
|
+
0x61,0xa5,0xca,0xe1 = bic r10, r10, r1, ror #10
|
130
|
+
0x17,0x62,0xc6,0xe1 = bic r6, r6, r7, lsl r2
|
131
|
+
0x37,0x62,0xc6,0xe1 = bic r6, r6, r7, lsr r2
|
132
|
+
0x57,0x62,0xc6,0xe1 = bic r6, r6, r7, asr r2
|
133
|
+
0x77,0x62,0xc6,0xe1 = bic r6, r6, r7, ror r2
|
134
|
+
0x61,0xa0,0xca,0xe1 = bic r10, r10, r1, rrx
|
135
|
+
0x22,0x30,0xc1,0xe1 = bic r3, r1, r2, lsr #32
|
136
|
+
0x42,0x30,0xc1,0xe1 = bic r3, r1, r2, asr #32
|
137
|
+
0x7a,0x00,0x20,0xe1 = bkpt #10
|
138
|
+
0x7f,0xff,0x2f,0xe1 = bkpt #65535
|
139
|
+
0x27,0x3b,0x6d,0x9b = blls #28634268
|
140
|
+
0xa0,0xb0,0x7b,0xfa = blx #32424576
|
141
|
+
0x50,0xd8,0x3d,0xfa = blx #16212288
|
142
|
+
0x32,0xff,0x2f,0xe1 = blx r2
|
143
|
+
0x32,0xff,0x2f,0x11 = blxne r2
|
144
|
+
0x12,0xff,0x2f,0xe1 = bx r2
|
145
|
+
0x12,0xff,0x2f,0x11 = bxne r2
|
146
|
+
0x22,0xff,0x2f,0xe1 = bxj r2
|
147
|
+
0x22,0xff,0x2f,0x11 = bxjne r2
|
148
|
+
0x81,0x17,0x11,0xee = cdp p7, #1, c1, c1, c1, #4
|
149
|
+
0x81,0x17,0x11,0xfe = cdp2 p7, #1, c1, c1, c1, #4
|
150
|
+
0xe0,0x6c,0x0c,0xfe = cdp2 p12, #0, c6, c12, c0, #7
|
151
|
+
0x81,0x17,0x11,0x1e = cdpne p7, #1, c1, c1, c1, #4
|
152
|
+
0x1f,0xf0,0x7f,0xf5 = clrex
|
153
|
+
0x12,0x1f,0x6f,0xe1 = clz r1, r2
|
154
|
+
0x12,0x1f,0x6f,0x01 = clzeq r1, r2
|
155
|
+
0x0f,0x00,0x71,0xe3 = cmn r1, #15
|
156
|
+
0x06,0x00,0x71,0xe1 = cmn r1, r6
|
157
|
+
0x06,0x05,0x71,0xe1 = cmn r1, r6, lsl #10
|
158
|
+
0x26,0x05,0x71,0xe1 = cmn r1, r6, lsr #10
|
159
|
+
0x26,0x05,0x7d,0xe1 = cmn sp, r6, lsr #10
|
160
|
+
0x46,0x05,0x71,0xe1 = cmn r1, r6, asr #10
|
161
|
+
0x66,0x05,0x71,0xe1 = cmn r1, r6, ror #10
|
162
|
+
0x18,0x02,0x77,0xe1 = cmn r7, r8, lsl r2
|
163
|
+
0x38,0x02,0x7d,0xe1 = cmn sp, r8, lsr r2
|
164
|
+
0x58,0x02,0x77,0xe1 = cmn r7, r8, asr r2
|
165
|
+
0x78,0x02,0x77,0xe1 = cmn r7, r8, ror r2
|
166
|
+
0x66,0x00,0x71,0xe1 = cmn r1, r6, rrx
|
167
|
+
0x0f,0x00,0x51,0xe3 = cmp r1, #15
|
168
|
+
0x06,0x00,0x51,0xe1 = cmp r1, r6
|
169
|
+
0x06,0x05,0x51,0xe1 = cmp r1, r6, lsl #10
|
170
|
+
0x26,0x05,0x51,0xe1 = cmp r1, r6, lsr #10
|
171
|
+
0x26,0x05,0x5d,0xe1 = cmp sp, r6, lsr #10
|
172
|
+
0x46,0x05,0x51,0xe1 = cmp r1, r6, asr #10
|
173
|
+
0x66,0x05,0x51,0xe1 = cmp r1, r6, ror #10
|
174
|
+
0x18,0x02,0x57,0xe1 = cmp r7, r8, lsl r2
|
175
|
+
0x38,0x02,0x5d,0xe1 = cmp sp, r8, lsr r2
|
176
|
+
0x58,0x02,0x57,0xe1 = cmp r7, r8, asr r2
|
177
|
+
0x78,0x02,0x57,0xe1 = cmp r7, r8, ror r2
|
178
|
+
0x66,0x00,0x51,0xe1 = cmp r1, r6, rrx
|
179
|
+
0x02,0x00,0x70,0xe3 = cmn r0, #2
|
180
|
+
0x00,0x00,0x5e,0xe3 = cmp lr, #0
|
181
|
+
0xc0,0x01,0x08,0xf1 = cpsie aif
|
182
|
+
0x0f,0x00,0x02,0xf1 = cps #15
|
183
|
+
0xca,0x00,0x0e,0xf1 = cpsid if, #10
|
184
|
+
0xf0,0xf0,0x20,0xe3 = dbg #0
|
185
|
+
0xf5,0xf0,0x20,0xe3 = dbg #5
|
186
|
+
0xff,0xf0,0x20,0xe3 = dbg #15
|
187
|
+
0x5f,0xf0,0x7f,0xf5 = dmb sy
|
188
|
+
0x5e,0xf0,0x7f,0xf5 = dmb st
|
189
|
+
0x5d,0xf0,0x7f,0xf5 = dmb #0xd
|
190
|
+
0x5c,0xf0,0x7f,0xf5 = dmb #0xc
|
191
|
+
0x5b,0xf0,0x7f,0xf5 = dmb ish
|
192
|
+
0x5a,0xf0,0x7f,0xf5 = dmb ishst
|
193
|
+
0x59,0xf0,0x7f,0xf5 = dmb #0x9
|
194
|
+
0x58,0xf0,0x7f,0xf5 = dmb #0x8
|
195
|
+
0x57,0xf0,0x7f,0xf5 = dmb nsh
|
196
|
+
0x56,0xf0,0x7f,0xf5 = dmb nshst
|
197
|
+
0x55,0xf0,0x7f,0xf5 = dmb #0x5
|
198
|
+
0x54,0xf0,0x7f,0xf5 = dmb #0x4
|
199
|
+
0x53,0xf0,0x7f,0xf5 = dmb osh
|
200
|
+
0x52,0xf0,0x7f,0xf5 = dmb oshst
|
201
|
+
0x51,0xf0,0x7f,0xf5 = dmb #0x1
|
202
|
+
0x50,0xf0,0x7f,0xf5 = dmb #0x0
|
203
|
+
0x5f,0xf0,0x7f,0xf5 = dmb sy
|
204
|
+
0x5e,0xf0,0x7f,0xf5 = dmb st
|
205
|
+
0x5b,0xf0,0x7f,0xf5 = dmb ish
|
206
|
+
0x5b,0xf0,0x7f,0xf5 = dmb ish
|
207
|
+
0x5a,0xf0,0x7f,0xf5 = dmb ishst
|
208
|
+
0x5a,0xf0,0x7f,0xf5 = dmb ishst
|
209
|
+
0x57,0xf0,0x7f,0xf5 = dmb nsh
|
210
|
+
0x57,0xf0,0x7f,0xf5 = dmb nsh
|
211
|
+
0x56,0xf0,0x7f,0xf5 = dmb nshst
|
212
|
+
0x56,0xf0,0x7f,0xf5 = dmb nshst
|
213
|
+
0x53,0xf0,0x7f,0xf5 = dmb osh
|
214
|
+
0x52,0xf0,0x7f,0xf5 = dmb oshst
|
215
|
+
0x5f,0xf0,0x7f,0xf5 = dmb sy
|
216
|
+
0x4f,0xf0,0x7f,0xf5 = dsb sy
|
217
|
+
0x4e,0xf0,0x7f,0xf5 = dsb st
|
218
|
+
0x4d,0xf0,0x7f,0xf5 = dsb #0xd
|
219
|
+
0x4c,0xf0,0x7f,0xf5 = dsb #0xc
|
220
|
+
0x4b,0xf0,0x7f,0xf5 = dsb ish
|
221
|
+
0x4a,0xf0,0x7f,0xf5 = dsb ishst
|
222
|
+
0x49,0xf0,0x7f,0xf5 = dsb #0x9
|
223
|
+
0x48,0xf0,0x7f,0xf5 = dsb #0x8
|
224
|
+
0x47,0xf0,0x7f,0xf5 = dsb nsh
|
225
|
+
0x46,0xf0,0x7f,0xf5 = dsb nshst
|
226
|
+
0x45,0xf0,0x7f,0xf5 = dsb #0x5
|
227
|
+
0x44,0xf0,0x7f,0xf5 = dsb #0x4
|
228
|
+
0x43,0xf0,0x7f,0xf5 = dsb osh
|
229
|
+
0x42,0xf0,0x7f,0xf5 = dsb oshst
|
230
|
+
0x41,0xf0,0x7f,0xf5 = dsb #0x1
|
231
|
+
0x40,0xf0,0x7f,0xf5 = dsb #0x0
|
232
|
+
0x48,0xf0,0x7f,0xf5 = dsb #0x8
|
233
|
+
0x47,0xf0,0x7f,0xf5 = dsb nsh
|
234
|
+
0x4f,0xf0,0x7f,0xf5 = dsb sy
|
235
|
+
0x4e,0xf0,0x7f,0xf5 = dsb st
|
236
|
+
0x4b,0xf0,0x7f,0xf5 = dsb ish
|
237
|
+
0x4b,0xf0,0x7f,0xf5 = dsb ish
|
238
|
+
0x4a,0xf0,0x7f,0xf5 = dsb ishst
|
239
|
+
0x4a,0xf0,0x7f,0xf5 = dsb ishst
|
240
|
+
0x47,0xf0,0x7f,0xf5 = dsb nsh
|
241
|
+
0x47,0xf0,0x7f,0xf5 = dsb nsh
|
242
|
+
0x46,0xf0,0x7f,0xf5 = dsb nshst
|
243
|
+
0x46,0xf0,0x7f,0xf5 = dsb nshst
|
244
|
+
0x43,0xf0,0x7f,0xf5 = dsb osh
|
245
|
+
0x42,0xf0,0x7f,0xf5 = dsb oshst
|
246
|
+
0x4f,0xf0,0x7f,0xf5 = dsb sy
|
247
|
+
0x4f,0xf0,0x7f,0xf5 = dsb sy
|
248
|
+
0x42,0xf0,0x7f,0xf5 = dsb oshst
|
249
|
+
0x0f,0x4a,0x25,0xe2 = eor r4, r5, #61440
|
250
|
+
0x06,0x40,0x25,0xe0 = eor r4, r5, r6
|
251
|
+
0x86,0x42,0x25,0xe0 = eor r4, r5, r6, lsl #5
|
252
|
+
0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5
|
253
|
+
0xa6,0x42,0x25,0xe0 = eor r4, r5, r6, lsr #5
|
254
|
+
0xc6,0x42,0x25,0xe0 = eor r4, r5, r6, asr #5
|
255
|
+
0xe6,0x42,0x25,0xe0 = eor r4, r5, r6, ror #5
|
256
|
+
0x18,0x69,0x27,0xe0 = eor r6, r7, r8, lsl r9
|
257
|
+
0x38,0x69,0x27,0xe0 = eor r6, r7, r8, lsr r9
|
258
|
+
0x58,0x69,0x27,0xe0 = eor r6, r7, r8, asr r9
|
259
|
+
0x78,0x69,0x27,0xe0 = eor r6, r7, r8, ror r9
|
260
|
+
0x66,0x40,0x25,0xe0 = eor r4, r5, r6, rrx
|
261
|
+
0x0f,0x5a,0x25,0xe2 = eor r5, r5, #61440
|
262
|
+
0x05,0x40,0x24,0xe0 = eor r4, r4, r5
|
263
|
+
0x85,0x42,0x24,0xe0 = eor r4, r4, r5, lsl #5
|
264
|
+
0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5
|
265
|
+
0xa5,0x42,0x24,0xe0 = eor r4, r4, r5, lsr #5
|
266
|
+
0xc5,0x42,0x24,0xe0 = eor r4, r4, r5, asr #5
|
267
|
+
0xe5,0x42,0x24,0xe0 = eor r4, r4, r5, ror #5
|
268
|
+
0x17,0x69,0x26,0xe0 = eor r6, r6, r7, lsl r9
|
269
|
+
0x37,0x69,0x26,0xe0 = eor r6, r6, r7, lsr r9
|
270
|
+
0x57,0x69,0x26,0xe0 = eor r6, r6, r7, asr r9
|
271
|
+
0x77,0x69,0x26,0xe0 = eor r6, r6, r7, ror r9
|
272
|
+
0x65,0x40,0x24,0xe0 = eor r4, r4, r5, rrx
|
273
|
+
0x22,0x30,0x21,0xe0 = eor r3, r1, r2, lsr #32
|
274
|
+
0x42,0x30,0x21,0xe0 = eor r3, r1, r2, asr #32
|
275
|
+
0x6f,0xf0,0x7f,0xf5 = isb sy
|
276
|
+
0x6f,0xf0,0x7f,0xf5 = isb sy
|
277
|
+
0x6f,0xf0,0x7f,0xf5 = isb sy
|
278
|
+
0x61,0xf0,0x7f,0xf5 = isb #0x1
|
279
|
+
0x01,0x80,0x91,0xfd = ldc2 p0, c8, [r1, #4]
|
280
|
+
0x00,0x71,0x92,0xfd = ldc2 p1, c7, [r2]
|
281
|
+
0x38,0x62,0x13,0xfd = ldc2 p2, c6, [r3, #-224]
|
282
|
+
0x1e,0x53,0x34,0xfd = ldc2 p3, c5, [r4, #-120]!
|
283
|
+
0x04,0x44,0xb5,0xfc = ldc2 p4, c4, [r5], #16
|
284
|
+
0x12,0x35,0x36,0xfc = ldc2 p5, c3, [r6], #-72
|
285
|
+
0x01,0x26,0xd7,0xfd = ldc2l p6, c2, [r7, #4]
|
286
|
+
0x00,0x17,0xd8,0xfd = ldc2l p7, c1, [r8]
|
287
|
+
0x38,0x08,0x59,0xfd = ldc2l p8, c0, [r9, #-224]
|
288
|
+
0x1e,0x19,0x7a,0xfd = ldc2l p9, c1, [r10, #-120]!
|
289
|
+
0x04,0x20,0xfb,0xfc = ldc2l p0, c2, [r11], #16
|
290
|
+
0x12,0x31,0x7c,0xfc = ldc2l p1, c3, [r12], #-72
|
291
|
+
0x01,0x4c,0x90,0xed = ldc p12, c4, [r0, #4]
|
292
|
+
0x00,0x5d,0x91,0xed = ldc p13, c5, [r1]
|
293
|
+
0x38,0x6e,0x12,0xed = ldc p14, c6, [r2, #-224]
|
294
|
+
0x1e,0x7f,0x33,0xed = ldc p15, c7, [r3, #-120]!
|
295
|
+
0x04,0x85,0xb4,0xec = ldc p5, c8, [r4], #16
|
296
|
+
0x12,0x94,0x35,0xec = ldc p4, c9, [r5], #-72
|
297
|
+
0x01,0xa3,0xd6,0xed = ldcl p3, c10, [r6, #4]
|
298
|
+
0x00,0xb2,0xd7,0xed = ldcl p2, c11, [r7]
|
299
|
+
0x38,0xc1,0x58,0xed = ldcl p1, c12, [r8, #-224]
|
300
|
+
0x1e,0xd0,0x79,0xed = ldcl p0, c13, [r9, #-120]!
|
301
|
+
0x04,0xe6,0xfa,0xec = ldcl p6, c14, [r10], #16
|
302
|
+
0x12,0xf7,0x7b,0xec = ldcl p7, c15, [r11], #-72
|
303
|
+
0x01,0x4c,0x90,0x3d = ldclo p12, c4, [r0, #4]
|
304
|
+
0x00,0x5d,0x91,0x8d = ldchi p13, c5, [r1]
|
305
|
+
0x38,0x6e,0x12,0x2d = ldchs p14, c6, [r2, #-224]
|
306
|
+
0x1e,0x7f,0x33,0x3d = ldclo p15, c7, [r3, #-120]!
|
307
|
+
0x04,0x85,0xb4,0x0c = ldceq p5, c8, [r4], #16
|
308
|
+
0x12,0x94,0x35,0xcc = ldcgt p4, c9, [r5], #-72
|
309
|
+
0x01,0xa3,0xd6,0xbd = ldcllt p3, c10, [r6, #4]
|
310
|
+
0x00,0xb2,0xd7,0xad = ldclge p2, c11, [r7]
|
311
|
+
0x38,0xc1,0x58,0xdd = ldclle p1, c12, [r8, #-224]
|
312
|
+
0x1e,0xd0,0x79,0x1d = ldclne p0, c13, [r9, #-120]!
|
313
|
+
0x04,0xe6,0xfa,0x0c = ldcleq p6, c14, [r10], #16
|
314
|
+
0x12,0xf7,0x7b,0x8c = ldclhi p7, c15, [r11], #-72
|
315
|
+
0x19,0x82,0x91,0xfc = ldc2 p2, c8, [r1], {25}
|
316
|
+
0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp}
|
317
|
+
0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp}
|
318
|
+
0x7a,0x20,0x92,0xe9 = ldmib r2, {r1, r3, r4, r5, r6, sp}
|
319
|
+
0x7a,0x20,0x12,0xe8 = ldmda r2, {r1, r3, r4, r5, r6, sp}
|
320
|
+
0x7a,0x20,0x12,0xe9 = ldmdb r2, {r1, r3, r4, r5, r6, sp}
|
321
|
+
0x7a,0x20,0x92,0xe8 = ldm r2, {r1, r3, r4, r5, r6, sp}
|
322
|
+
0x7a,0x20,0xb2,0xe8 = ldm r2!, {r1, r3, r4, r5, r6, sp}
|
323
|
+
0x7a,0x20,0xb2,0xe9 = ldmib r2!, {r1, r3, r4, r5, r6, sp}
|
324
|
+
0x7a,0x20,0x32,0xe8 = ldmda r2!, {r1, r3, r4, r5, r6, sp}
|
325
|
+
0x7a,0x20,0x32,0xe9 = ldmdb r2!, {r1, r3, r4, r5, r6, sp}
|
326
|
+
0x05,0x40,0xd0,0xe8 = ldm r0, {r0, r2, lr} ^
|
327
|
+
0x0f,0x80,0xfd,0xe8 = ldm sp!, {r0, r1, r2, r3, pc} ^
|
328
|
+
0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4]
|
329
|
+
0x9f,0x2f,0xf5,0xe1 = ldrexh r2, [r5]
|
330
|
+
0x9f,0x1f,0x97,0xe1 = ldrex r1, [r7]
|
331
|
+
0x9f,0x6f,0xb8,0xe1 = ldrexd r6, r7, [r8]
|
332
|
+
0xb0,0x80,0x7b,0x80 = ldrhthi r8, [r11], #-0
|
333
|
+
0xb0,0x80,0xfb,0x80 = ldrhthi r8, [r11], #0
|
334
|
+
0x84,0x2f,0xa0,0xe1 = lsl r2, r4, #31
|
335
|
+
0x84,0x20,0xa0,0xe1 = lsl r2, r4, #1
|
336
|
+
0x04,0x20,0xa0,0xe1 = mov r2, r4
|
337
|
+
0x84,0x40,0xa0,0xe1 = lsl r4, r4, #1
|
338
|
+
0x24,0x20,0xa0,0xe1 = lsr r2, r4, #32
|
339
|
+
0x24,0x21,0xa0,0xe1 = lsr r2, r4, #2
|
340
|
+
0x04,0x20,0xa0,0xe1 = mov r2, r4
|
341
|
+
0x24,0x41,0xa0,0xe1 = lsr r4, r4, #2
|
342
|
+
0x91,0x57,0x21,0xee = mcr p7, #1, r5, c1, c1, #4
|
343
|
+
0x91,0x57,0x21,0xfe = mcr2 p7, #1, r5, c1, c1, #4
|
344
|
+
0x91,0x57,0x21,0x9e = mcrls p7, #1, r5, c1, c1, #4
|
345
|
+
0xf1,0x57,0x44,0xec = mcrr p7, #15, r5, r4, c1
|
346
|
+
0xf1,0x57,0x44,0xfc = mcrr2 p7, #15, r5, r4, c1
|
347
|
+
0xf1,0x57,0x44,0xcc = mcrrgt p7, #15, r5, r4, c1
|
348
|
+
0x92,0x43,0x21,0xe0 = mla r1, r2, r3, r4
|
349
|
+
0x92,0x43,0x31,0xe0 = mlas r1, r2, r3, r4
|
350
|
+
0x92,0x43,0x21,0x10 = mlane r1, r2, r3, r4
|
351
|
+
0x92,0x43,0x31,0x10 = mlasne r1, r2, r3, r4
|
352
|
+
0x95,0x36,0x62,0xe0 = mls r2, r5, r6, r3
|
353
|
+
0x95,0x36,0x62,0x10 = mlsne r2, r5, r6, r3
|
354
|
+
0x07,0x30,0xa0,0xe3 = mov r3, #7
|
355
|
+
0xff,0x4e,0xa0,0xe3 = mov r4, #4080
|
356
|
+
0xff,0x58,0xa0,0xe3 = mov r5, #16711680
|
357
|
+
0xff,0x6f,0x0f,0xe3 = movw r6, #65535
|
358
|
+
0xff,0x9f,0x0f,0xe3 = movw r9, #65535
|
359
|
+
0x07,0x30,0xb0,0xe3 = movs r3, #7
|
360
|
+
0xff,0x4e,0xa0,0x03 = moveq r4, #4080
|
361
|
+
0xff,0x58,0xb0,0x03 = movseq r5, #16711680
|
362
|
+
0x03,0x20,0xa0,0xe1 = mov r2, r3
|
363
|
+
0x03,0x20,0xb0,0xe1 = movs r2, r3
|
364
|
+
0x03,0x20,0xa0,0x01 = moveq r2, r3
|
365
|
+
0x03,0x20,0xb0,0x01 = movseq r2, r3
|
366
|
+
0x08,0xc0,0xa0,0xe1 = mov r12, r8
|
367
|
+
0x03,0x20,0xa0,0xe1 = mov r2, r3
|
368
|
+
0x08,0xc0,0xa0,0xe1 = mov r12, r8
|
369
|
+
0x03,0x20,0xa0,0xe1 = mov r2, r3
|
370
|
+
0x08,0xc0,0xa0,0xe1 = mov r12, r8
|
371
|
+
0x03,0x20,0xa0,0xe1 = mov r2, r3
|
372
|
+
0x08,0xc0,0xa0,0xe1 = mov r12, r8
|
373
|
+
0x03,0x20,0xa0,0xe1 = mov r2, r3
|
374
|
+
0x07,0x30,0x40,0xe3 = movt r3, #7
|
375
|
+
0xff,0x6f,0x4f,0xe3 = movt r6, #65535
|
376
|
+
0xf0,0x4f,0x40,0x03 = movteq r4, #4080
|
377
|
+
0x92,0x1e,0x11,0xee = mrc p14, #0, r1, c1, c2, #4
|
378
|
+
0xd6,0xff,0xff,0xee = mrc p15, #7, apsr_nzcv, c15, c6, #6
|
379
|
+
0x92,0x1e,0x11,0xfe = mrc2 p14, #0, r1, c1, c2, #4
|
380
|
+
0x30,0xf9,0xff,0xfe = mrc2 p9, #7, apsr_nzcv, c15, c0, #1
|
381
|
+
0xd6,0xff,0xff,0x0e = mrceq p15, #7, apsr_nzcv, c15, c6, #6
|
382
|
+
0x11,0x57,0x54,0xec = mrrc p7, #1, r5, r4, c1
|
383
|
+
0x11,0x57,0x54,0xfc = mrrc2 p7, #1, r5, r4, c1
|
384
|
+
0x11,0x57,0x54,0x3c = mrrclo p7, #1, r5, r4, c1
|
385
|
+
0x00,0x80,0x0f,0xe1 = mrs r8, apsr
|
386
|
+
0x00,0x80,0x0f,0xe1 = mrs r8, apsr
|
387
|
+
0x00,0x80,0x4f,0xe1 = mrs r8, spsr
|
388
|
+
0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5
|
389
|
+
0x05,0xf0,0x24,0xe3 = msr APSR_g, #5
|
390
|
+
0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5
|
391
|
+
0x05,0xf0,0x28,0xe3 = msr APSR_nzcvq, #5
|
392
|
+
0x05,0xf0,0x2c,0xe3 = msr APSR_nzcvqg, #5
|
393
|
+
0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5
|
394
|
+
0x05,0xf0,0x21,0xe3 = msr CPSR_c, #5
|
395
|
+
0x05,0xf0,0x22,0xe3 = msr CPSR_x, #5
|
396
|
+
0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5
|
397
|
+
0x05,0xf0,0x29,0xe3 = msr CPSR_fc, #5
|
398
|
+
0x05,0xf0,0x2e,0xe3 = msr CPSR_fsx, #5
|
399
|
+
0x05,0xf0,0x69,0xe3 = msr SPSR_fc, #5
|
400
|
+
0x05,0xf0,0x6f,0xe3 = msr SPSR_fsxc, #5
|
401
|
+
0x05,0xf0,0x2f,0xe3 = msr CPSR_fsxc, #5
|
402
|
+
0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0
|
403
|
+
0x00,0xf0,0x24,0xe1 = msr APSR_g, r0
|
404
|
+
0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0
|
405
|
+
0x00,0xf0,0x28,0xe1 = msr APSR_nzcvq, r0
|
406
|
+
0x00,0xf0,0x2c,0xe1 = msr APSR_nzcvqg, r0
|
407
|
+
0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0
|
408
|
+
0x00,0xf0,0x21,0xe1 = msr CPSR_c, r0
|
409
|
+
0x00,0xf0,0x22,0xe1 = msr CPSR_x, r0
|
410
|
+
0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0
|
411
|
+
0x00,0xf0,0x29,0xe1 = msr CPSR_fc, r0
|
412
|
+
0x00,0xf0,0x2e,0xe1 = msr CPSR_fsx, r0
|
413
|
+
0x00,0xf0,0x69,0xe1 = msr SPSR_fc, r0
|
414
|
+
0x00,0xf0,0x6f,0xe1 = msr SPSR_fsxc, r0
|
415
|
+
0x00,0xf0,0x2f,0xe1 = msr CPSR_fsxc, r0
|
416
|
+
0x96,0x07,0x05,0xe0 = mul r5, r6, r7
|
417
|
+
0x96,0x07,0x15,0xe0 = muls r5, r6, r7
|
418
|
+
0x96,0x07,0x05,0xc0 = mulgt r5, r6, r7
|
419
|
+
0x96,0x07,0x15,0xd0 = mulsle r5, r6, r7
|
420
|
+
0x07,0x30,0xe0,0xe3 = mvn r3, #7
|
421
|
+
0xff,0x4e,0xe0,0xe3 = mvn r4, #4080
|
422
|
+
0xff,0x58,0xe0,0xe3 = mvn r5, #16711680
|
423
|
+
0x07,0x30,0xf0,0xe3 = mvns r3, #7
|
424
|
+
0xff,0x4e,0xe0,0x03 = mvneq r4, #4080
|
425
|
+
0xff,0x58,0xf0,0x03 = mvnseq r5, #16711680
|
426
|
+
0x03,0x20,0xe0,0xe1 = mvn r2, r3
|
427
|
+
0x03,0x20,0xf0,0xe1 = mvns r2, r3
|
428
|
+
0x86,0x59,0xe0,0xe1 = mvn r5, r6, lsl #19
|
429
|
+
0xa6,0x54,0xe0,0xe1 = mvn r5, r6, lsr #9
|
430
|
+
0x46,0x52,0xe0,0xe1 = mvn r5, r6, asr #4
|
431
|
+
0x66,0x53,0xe0,0xe1 = mvn r5, r6, ror #6
|
432
|
+
0x66,0x50,0xe0,0xe1 = mvn r5, r6, rrx
|
433
|
+
0x03,0x20,0xe0,0x01 = mvneq r2, r3
|
434
|
+
0x03,0x25,0xf0,0x01 = mvnseq r2, r3, lsl #10
|
435
|
+
0x16,0x57,0xe0,0xe1 = mvn r5, r6, lsl r7
|
436
|
+
0x36,0x57,0xf0,0xe1 = mvns r5, r6, lsr r7
|
437
|
+
0x56,0x57,0xe0,0xc1 = mvngt r5, r6, asr r7
|
438
|
+
0x76,0x57,0xf0,0xb1 = mvnslt r5, r6, ror r7
|
439
|
+
0x00,0x50,0x68,0xe2 = rsb r5, r8, #0
|
440
|
+
0x00,0xf0,0x20,0xe3 = nop
|
441
|
+
0x00,0xf0,0x20,0xe3 = nop
|
442
|
+
0x00,0xf0,0x20,0xc3 = nopgt
|
443
|
+
0x0f,0x4a,0x85,0xe3 = orr r4, r5, #61440
|
444
|
+
0x06,0x40,0x85,0xe1 = orr r4, r5, r6
|
445
|
+
0x86,0x42,0x85,0xe1 = orr r4, r5, r6, lsl #5
|
446
|
+
0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5
|
447
|
+
0xa6,0x42,0x85,0xe1 = orr r4, r5, r6, lsr #5
|
448
|
+
0xc6,0x42,0x85,0xe1 = orr r4, r5, r6, asr #5
|
449
|
+
0xe6,0x42,0x85,0xe1 = orr r4, r5, r6, ror #5
|
450
|
+
0x18,0x69,0x87,0xe1 = orr r6, r7, r8, lsl r9
|
451
|
+
0x38,0x69,0x87,0xe1 = orr r6, r7, r8, lsr r9
|
452
|
+
0x58,0x69,0x87,0xe1 = orr r6, r7, r8, asr r9
|
453
|
+
0x78,0x69,0x87,0xe1 = orr r6, r7, r8, ror r9
|
454
|
+
0x66,0x40,0x85,0xe1 = orr r4, r5, r6, rrx
|
455
|
+
0x0f,0x5a,0x85,0xe3 = orr r5, r5, #61440
|
456
|
+
0x05,0x40,0x84,0xe1 = orr r4, r4, r5
|
457
|
+
0x85,0x42,0x84,0xe1 = orr r4, r4, r5, lsl #5
|
458
|
+
0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5
|
459
|
+
0xa5,0x42,0x84,0xe1 = orr r4, r4, r5, lsr #5
|
460
|
+
0xc5,0x42,0x84,0xe1 = orr r4, r4, r5, asr #5
|
461
|
+
0xe5,0x42,0x84,0xe1 = orr r4, r4, r5, ror #5
|
462
|
+
0x17,0x69,0x86,0xe1 = orr r6, r6, r7, lsl r9
|
463
|
+
0x37,0x69,0x86,0xe1 = orr r6, r6, r7, lsr r9
|
464
|
+
0x57,0x69,0x86,0xe1 = orr r6, r6, r7, asr r9
|
465
|
+
0x77,0x69,0x86,0xe1 = orr r6, r6, r7, ror r9
|
466
|
+
0x65,0x40,0x84,0xe1 = orr r4, r4, r5, rrx
|
467
|
+
0x0f,0x4a,0x95,0x03 = orrseq r4, r5, #61440
|
468
|
+
0x06,0x40,0x85,0x11 = orrne r4, r5, r6
|
469
|
+
0x86,0x42,0x95,0x01 = orrseq r4, r5, r6, lsl #5
|
470
|
+
0x78,0x69,0x87,0x31 = orrlo r6, r7, r8, ror r9
|
471
|
+
0x66,0x40,0x95,0x81 = orrshi r4, r5, r6, rrx
|
472
|
+
0x0f,0x5a,0x85,0x23 = orrhs r5, r5, #61440
|
473
|
+
0x05,0x40,0x94,0x01 = orrseq r4, r4, r5
|
474
|
+
0x57,0x69,0x86,0x11 = orrne r6, r6, r7, asr r9
|
475
|
+
0x77,0x69,0x96,0xb1 = orrslt r6, r6, r7, ror r9
|
476
|
+
0x65,0x40,0x94,0xc1 = orrsgt r4, r4, r5, rrx
|
477
|
+
0x22,0x30,0x81,0xe1 = orr r3, r1, r2, lsr #32
|
478
|
+
0x42,0x30,0x81,0xe1 = orr r3, r1, r2, asr #32
|
479
|
+
0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3
|
480
|
+
0x93,0x2f,0x82,0xe6 = pkhbt r2, r2, r3, lsl #31
|
481
|
+
0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3
|
482
|
+
0x93,0x27,0x82,0xe6 = pkhbt r2, r2, r3, lsl #15
|
483
|
+
0x13,0x20,0x82,0xe6 = pkhbt r2, r2, r3
|
484
|
+
0xd3,0x2f,0x82,0xe6 = pkhtb r2, r2, r3, asr #31
|
485
|
+
0xd3,0x27,0x82,0xe6 = pkhtb r2, r2, r3, asr #15
|
486
|
+
0x04,0x70,0x9d,0xe4 = pop {r7}
|
487
|
+
0x80,0x07,0xbd,0xe8 = pop {r7, r8, r9, r10}
|
488
|
+
0x04,0x70,0x2d,0xe5 = push {r7}
|
489
|
+
0x80,0x07,0x2d,0xe9 = push {r7, r8, r9, r10}
|
490
|
+
0x52,0x10,0x03,0xe1 = qadd r1, r2, r3
|
491
|
+
0x52,0x10,0x03,0x11 = qaddne r1, r2, r3
|
492
|
+
0x13,0x1f,0x22,0xe6 = qadd16 r1, r2, r3
|
493
|
+
0x13,0x1f,0x22,0xc6 = qadd16gt r1, r2, r3
|
494
|
+
0x93,0x1f,0x22,0xe6 = qadd8 r1, r2, r3
|
495
|
+
0x93,0x1f,0x22,0xd6 = qadd8le r1, r2, r3
|
496
|
+
0x57,0x60,0x48,0xe1 = qdadd r6, r7, r8
|
497
|
+
0x57,0x60,0x48,0x81 = qdaddhi r6, r7, r8
|
498
|
+
0x57,0x60,0x68,0xe1 = qdsub r6, r7, r8
|
499
|
+
0x57,0x60,0x68,0x81 = qdsubhi r6, r7, r8
|
500
|
+
0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0
|
501
|
+
0x50,0x9f,0x2c,0x06 = qsaxeq r9, r12, r0
|
502
|
+
0x52,0x10,0x23,0xe1 = qsub r1, r2, r3
|
503
|
+
0x52,0x10,0x23,0x11 = qsubne r1, r2, r3
|
504
|
+
0x73,0x1f,0x22,0xe6 = qsub16 r1, r2, r3
|
505
|
+
0x73,0x1f,0x22,0xc6 = qsub16gt r1, r2, r3
|
506
|
+
0xf3,0x1f,0x22,0xe6 = qsub8 r1, r2, r3
|
507
|
+
0xf3,0x1f,0x22,0xd6 = qsub8le r1, r2, r3
|
508
|
+
0x32,0x1f,0xff,0xe6 = rbit r1, r2
|
509
|
+
0x32,0x1f,0xff,0x16 = rbitne r1, r2
|
510
|
+
0x39,0x1f,0xbf,0xe6 = rev r1, r9
|
511
|
+
0x35,0x1f,0xbf,0x16 = revne r1, r5
|
512
|
+
0xb3,0x8f,0xbf,0xe6 = rev16 r8, r3
|
513
|
+
0xb4,0xcf,0xbf,0x16 = rev16ne r12, r4
|
514
|
+
0xb9,0x4f,0xff,0xe6 = revsh r4, r9
|
515
|
+
0xb1,0x9f,0xff,0x16 = revshne r9, r1
|
516
|
+
0x00,0x0a,0x12,0xf8 = rfeda r2
|
517
|
+
0x00,0x0a,0x13,0xf9 = rfedb r3
|
518
|
+
0x00,0x0a,0x95,0xf8 = rfeia r5
|
519
|
+
0x00,0x0a,0x96,0xf9 = rfeib r6
|
520
|
+
0x00,0x0a,0x34,0xf8 = rfeda r4!
|
521
|
+
0x00,0x0a,0x37,0xf9 = rfedb r7!
|
522
|
+
0x00,0x0a,0xb9,0xf8 = rfeia r9!
|
523
|
+
0x00,0x0a,0xb8,0xf9 = rfeib r8!
|
524
|
+
0x00,0x0a,0x12,0xf8 = rfeda r2
|
525
|
+
0x00,0x0a,0x13,0xf9 = rfedb r3
|
526
|
+
0x00,0x0a,0x95,0xf8 = rfeia r5
|
527
|
+
0x00,0x0a,0x96,0xf9 = rfeib r6
|
528
|
+
0x00,0x0a,0x34,0xf8 = rfeda r4!
|
529
|
+
0x00,0x0a,0x37,0xf9 = rfedb r7!
|
530
|
+
0x00,0x0a,0xb9,0xf8 = rfeia r9!
|
531
|
+
0x00,0x0a,0xb8,0xf9 = rfeib r8!
|
532
|
+
0x00,0x0a,0x91,0xf8 = rfeia r1
|
533
|
+
0x00,0x0a,0xb1,0xf8 = rfeia r1!
|
534
|
+
0xe4,0x2f,0xa0,0xe1 = ror r2, r4, #31
|
535
|
+
0xe4,0x20,0xa0,0xe1 = ror r2, r4, #1
|
536
|
+
0x04,0x20,0xa0,0xe1 = mov r2, r4
|
537
|
+
0xe4,0x40,0xa0,0xe1 = ror r4, r4, #1
|
538
|
+
0x0f,0x4a,0x65,0xe2 = rsb r4, r5, #61440
|
539
|
+
0x06,0x40,0x65,0xe0 = rsb r4, r5, r6
|
540
|
+
0x86,0x42,0x65,0xe0 = rsb r4, r5, r6, lsl #5
|
541
|
+
0xa6,0x42,0x65,0x30 = rsblo r4, r5, r6, lsr #5
|
542
|
+
0xa6,0x42,0x65,0xe0 = rsb r4, r5, r6, lsr #5
|
543
|
+
0xc6,0x42,0x65,0xe0 = rsb r4, r5, r6, asr #5
|
544
|
+
0xe6,0x42,0x65,0xe0 = rsb r4, r5, r6, ror #5
|
545
|
+
0x18,0x69,0x67,0xe0 = rsb r6, r7, r8, lsl r9
|
546
|
+
0x38,0x69,0x67,0xe0 = rsb r6, r7, r8, lsr r9
|
547
|
+
0x58,0x69,0x67,0xe0 = rsb r6, r7, r8, asr r9
|
548
|
+
0x78,0x69,0x67,0xd0 = rsble r6, r7, r8, ror r9
|
549
|
+
0x66,0x40,0x65,0xe0 = rsb r4, r5, r6, rrx
|
550
|
+
0x0f,0x5a,0x65,0xe2 = rsb r5, r5, #61440
|
551
|
+
0x05,0x40,0x64,0xe0 = rsb r4, r4, r5
|
552
|
+
0x85,0x42,0x64,0xe0 = rsb r4, r4, r5, lsl #5
|
553
|
+
0xa5,0x42,0x64,0xe0 = rsb r4, r4, r5, lsr #5
|
554
|
+
0xa5,0x42,0x64,0x10 = rsbne r4, r4, r5, lsr #5
|
555
|
+
0xc5,0x42,0x64,0xe0 = rsb r4, r4, r5, asr #5
|
556
|
+
0xe5,0x42,0x64,0xe0 = rsb r4, r4, r5, ror #5
|
557
|
+
0x17,0x69,0x66,0xc0 = rsbgt r6, r6, r7, lsl r9
|
558
|
+
0x37,0x69,0x66,0xe0 = rsb r6, r6, r7, lsr r9
|
559
|
+
0x57,0x69,0x66,0xe0 = rsb r6, r6, r7, asr r9
|
560
|
+
0x77,0x69,0x66,0xe0 = rsb r6, r6, r7, ror r9
|
561
|
+
0x65,0x40,0x64,0xe0 = rsb r4, r4, r5, rrx
|
562
|
+
0x0f,0x4a,0xe5,0xe2 = rsc r4, r5, #61440
|
563
|
+
0x06,0x40,0xe5,0xe0 = rsc r4, r5, r6
|
564
|
+
0x86,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsl #5
|
565
|
+
0xa6,0x42,0xe5,0x30 = rsclo r4, r5, r6, lsr #5
|
566
|
+
0xa6,0x42,0xe5,0xe0 = rsc r4, r5, r6, lsr #5
|
567
|
+
0xc6,0x42,0xe5,0xe0 = rsc r4, r5, r6, asr #5
|
568
|
+
0xe6,0x42,0xe5,0xe0 = rsc r4, r5, r6, ror #5
|
569
|
+
0x18,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsl r9
|
570
|
+
0x38,0x69,0xe7,0xe0 = rsc r6, r7, r8, lsr r9
|
571
|
+
0x58,0x69,0xe7,0xe0 = rsc r6, r7, r8, asr r9
|
572
|
+
0x78,0x69,0xe7,0xd0 = rscle r6, r7, r8, ror r9
|
573
|
+
0xfe,0x1e,0xf8,0xe2 = rscs r1, r8, #4064
|
574
|
+
0x0f,0x5a,0xe5,0xe2 = rsc r5, r5, #61440
|
575
|
+
0x05,0x40,0xe4,0xe0 = rsc r4, r4, r5
|
576
|
+
0x85,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsl #5
|
577
|
+
0xa5,0x42,0xe4,0xe0 = rsc r4, r4, r5, lsr #5
|
578
|
+
0xa5,0x42,0xe4,0x10 = rscne r4, r4, r5, lsr #5
|
579
|
+
0xc5,0x42,0xe4,0xe0 = rsc r4, r4, r5, asr #5
|
580
|
+
0xe5,0x42,0xe4,0xe0 = rsc r4, r4, r5, ror #5
|
581
|
+
0x17,0x69,0xe6,0xc0 = rscgt r6, r6, r7, lsl r9
|
582
|
+
0x37,0x69,0xe6,0xe0 = rsc r6, r6, r7, lsr r9
|
583
|
+
0x57,0x69,0xe6,0xe0 = rsc r6, r6, r7, asr r9
|
584
|
+
0x77,0x69,0xe6,0xe0 = rsc r6, r6, r7, ror r9
|
585
|
+
0x61,0x00,0xa0,0xe1 = rrx r0, r1
|
586
|
+
0x6f,0xd0,0xa0,0xe1 = rrx sp, pc
|
587
|
+
0x6e,0xf0,0xa0,0xe1 = rrx pc, lr
|
588
|
+
0x6d,0xe0,0xa0,0xe1 = rrx lr, sp
|
589
|
+
0x61,0x00,0xb0,0xe1 = rrxs r0, r1
|
590
|
+
0x6f,0xd0,0xb0,0xe1 = rrxs sp, pc
|
591
|
+
0x6e,0xf0,0xb0,0xe1 = rrxs pc, lr
|
592
|
+
0x6d,0xe0,0xb0,0xe1 = rrxs lr, sp
|
593
|
+
0x13,0x1f,0x12,0xe6 = sadd16 r1, r2, r3
|
594
|
+
0x13,0x1f,0x12,0xc6 = sadd16gt r1, r2, r3
|
595
|
+
0x93,0x1f,0x12,0xe6 = sadd8 r1, r2, r3
|
596
|
+
0x93,0x1f,0x12,0xd6 = sadd8le r1, r2, r3
|
597
|
+
0x30,0x9f,0x1c,0xe6 = sasx r9, r12, r0
|
598
|
+
0x30,0x9f,0x1c,0x06 = sasxeq r9, r12, r0
|
599
|
+
0x0f,0x4a,0xc5,0xe2 = sbc r4, r5, #61440
|
600
|
+
0x06,0x40,0xc5,0xe0 = sbc r4, r5, r6
|
601
|
+
0x86,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsl #5
|
602
|
+
0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5
|
603
|
+
0xa6,0x42,0xc5,0xe0 = sbc r4, r5, r6, lsr #5
|
604
|
+
0xc6,0x42,0xc5,0xe0 = sbc r4, r5, r6, asr #5
|
605
|
+
0xe6,0x42,0xc5,0xe0 = sbc r4, r5, r6, ror #5
|
606
|
+
0x18,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsl r9
|
607
|
+
0x38,0x69,0xc7,0xe0 = sbc r6, r7, r8, lsr r9
|
608
|
+
0x58,0x69,0xc7,0xe0 = sbc r6, r7, r8, asr r9
|
609
|
+
0x78,0x69,0xc7,0xe0 = sbc r6, r7, r8, ror r9
|
610
|
+
0x0f,0x5a,0xc5,0xe2 = sbc r5, r5, #61440
|
611
|
+
0x05,0x40,0xc4,0xe0 = sbc r4, r4, r5
|
612
|
+
0x85,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsl #5
|
613
|
+
0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5
|
614
|
+
0xa5,0x42,0xc4,0xe0 = sbc r4, r4, r5, lsr #5
|
615
|
+
0xc5,0x42,0xc4,0xe0 = sbc r4, r4, r5, asr #5
|
616
|
+
0xe5,0x42,0xc4,0xe0 = sbc r4, r4, r5, ror #5
|
617
|
+
0x17,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsl r9
|
618
|
+
0x37,0x69,0xc6,0xe0 = sbc r6, r6, r7, lsr r9
|
619
|
+
0x57,0x69,0xc6,0xe0 = sbc r6, r6, r7, asr r9
|
620
|
+
0x77,0x69,0xc6,0xe0 = sbc r6, r6, r7, ror r9
|
621
|
+
0x55,0x48,0xa0,0xe7 = sbfx r4, r5, #16, #1
|
622
|
+
0x55,0x48,0xaf,0xc7 = sbfxgt r4, r5, #16, #16
|
623
|
+
0xb1,0x9f,0x82,0xe6 = sel r9, r2, r1
|
624
|
+
0xb1,0x9f,0x82,0x16 = selne r9, r2, r1
|
625
|
+
0x00,0x02,0x01,0xf1 = setend be
|
626
|
+
0x00,0x02,0x01,0xf1 = setend be
|
627
|
+
0x00,0x00,0x01,0xf1 = setend le
|
628
|
+
0x00,0x00,0x01,0xf1 = setend le
|
629
|
+
0x04,0xf0,0x20,0xe3 = sev
|
630
|
+
0x04,0xf0,0x20,0x03 = seveq
|
631
|
+
0x12,0x4f,0x38,0xe6 = shadd16 r4, r8, r2
|
632
|
+
0x12,0x4f,0x38,0xc6 = shadd16gt r4, r8, r2
|
633
|
+
0x92,0x4f,0x38,0xe6 = shadd8 r4, r8, r2
|
634
|
+
0x92,0x4f,0x38,0xc6 = shadd8gt r4, r8, r2
|
635
|
+
0x32,0x4f,0x38,0xe6 = shasx r4, r8, r2
|
636
|
+
0x32,0x4f,0x38,0xc6 = shasxgt r4, r8, r2
|
637
|
+
0x72,0x4f,0x38,0xe6 = shsub16 r4, r8, r2
|
638
|
+
0x72,0x4f,0x38,0xc6 = shsub16gt r4, r8, r2
|
639
|
+
0xf2,0x4f,0x38,0xe6 = shsub8 r4, r8, r2
|
640
|
+
0xf2,0x4f,0x38,0xc6 = shsub8gt r4, r8, r2
|
641
|
+
0x81,0x09,0x03,0xe1 = smlabb r3, r1, r9, r0
|
642
|
+
0xc6,0x14,0x05,0xe1 = smlabt r5, r6, r4, r1
|
643
|
+
0xa2,0x23,0x04,0xe1 = smlatb r4, r2, r3, r2
|
644
|
+
0xe3,0x48,0x08,0xe1 = smlatt r8, r3, r8, r4
|
645
|
+
0x81,0x09,0x03,0xa1 = smlabbge r3, r1, r9, r0
|
646
|
+
0xc6,0x14,0x05,0xd1 = smlabtle r5, r6, r4, r1
|
647
|
+
0xa2,0x23,0x04,0x11 = smlatbne r4, r2, r3, r2
|
648
|
+
0xe3,0x48,0x08,0x01 = smlatteq r8, r3, r8, r4
|
649
|
+
0x13,0x85,0x02,0xe7 = smlad r2, r3, r5, r8
|
650
|
+
0x33,0x85,0x02,0xe7 = smladx r2, r3, r5, r8
|
651
|
+
0x13,0x85,0x02,0x07 = smladeq r2, r3, r5, r8
|
652
|
+
0x33,0x85,0x02,0x87 = smladxhi r2, r3, r5, r8
|
653
|
+
0x95,0x28,0xe3,0xe0 = smlal r2, r3, r5, r8
|
654
|
+
0x95,0x28,0xf3,0xe0 = smlals r2, r3, r5, r8
|
655
|
+
0x95,0x28,0xe3,0x00 = smlaleq r2, r3, r5, r8
|
656
|
+
0x95,0x28,0xf3,0x80 = smlalshi r2, r3, r5, r8
|
657
|
+
0x89,0x30,0x41,0xe1 = smlalbb r3, r1, r9, r0
|
658
|
+
0xc4,0x51,0x46,0xe1 = smlalbt r5, r6, r4, r1
|
659
|
+
0xa3,0x42,0x42,0xe1 = smlaltb r4, r2, r3, r2
|
660
|
+
0xe8,0x84,0x43,0xe1 = smlaltt r8, r3, r8, r4
|
661
|
+
0x89,0x30,0x41,0xa1 = smlalbbge r3, r1, r9, r0
|
662
|
+
0xc4,0x51,0x46,0xd1 = smlalbtle r5, r6, r4, r1
|
663
|
+
0xa3,0x42,0x42,0x11 = smlaltbne r4, r2, r3, r2
|
664
|
+
0xe8,0x84,0x43,0x01 = smlaltteq r8, r3, r8, r4
|
665
|
+
0x15,0x28,0x43,0xe7 = smlald r2, r3, r5, r8
|
666
|
+
0x35,0x28,0x43,0xe7 = smlaldx r2, r3, r5, r8
|
667
|
+
0x15,0x28,0x43,0x07 = smlaldeq r2, r3, r5, r8
|
668
|
+
0x35,0x28,0x43,0x87 = smlaldxhi r2, r3, r5, r8
|
669
|
+
0x83,0x8a,0x22,0xe1 = smlawb r2, r3, r10, r8
|
670
|
+
0xc3,0x95,0x28,0xe1 = smlawt r8, r3, r5, r9
|
671
|
+
0x87,0x85,0x22,0x01 = smlawbeq r2, r7, r5, r8
|
672
|
+
0xc3,0x80,0x21,0x81 = smlawthi r1, r3, r0, r8
|
673
|
+
0x53,0x85,0x02,0xe7 = smlsd r2, r3, r5, r8
|
674
|
+
0x73,0x85,0x02,0xe7 = smlsdx r2, r3, r5, r8
|
675
|
+
0x53,0x85,0x02,0x07 = smlsdeq r2, r3, r5, r8
|
676
|
+
0x73,0x85,0x02,0x87 = smlsdxhi r2, r3, r5, r8
|
677
|
+
0x55,0x21,0x49,0xe7 = smlsld r2, r9, r5, r1
|
678
|
+
0x72,0x48,0x4b,0xe7 = smlsldx r4, r11, r2, r8
|
679
|
+
0x55,0x86,0x42,0x07 = smlsldeq r8, r2, r5, r6
|
680
|
+
0x73,0x18,0x40,0x87 = smlsldxhi r1, r0, r3, r8
|
681
|
+
0x12,0x43,0x51,0xe7 = smmla r1, r2, r3, r4
|
682
|
+
0x33,0x12,0x54,0xe7 = smmlar r4, r3, r2, r1
|
683
|
+
0x12,0x43,0x51,0x37 = smmlalo r1, r2, r3, r4
|
684
|
+
0x33,0x12,0x54,0x27 = smmlarhs r4, r3, r2, r1
|
685
|
+
0xd2,0x43,0x51,0xe7 = smmls r1, r2, r3, r4
|
686
|
+
0xf3,0x12,0x54,0xe7 = smmlsr r4, r3, r2, r1
|
687
|
+
0xd2,0x43,0x51,0x37 = smmlslo r1, r2, r3, r4
|
688
|
+
0xf3,0x12,0x54,0x27 = smmlsrhs r4, r3, r2, r1
|
689
|
+
0x13,0xf4,0x52,0xe7 = smmul r2, r3, r4
|
690
|
+
0x32,0xf1,0x53,0xe7 = smmulr r3, r2, r1
|
691
|
+
0x13,0xf4,0x52,0x37 = smmullo r2, r3, r4
|
692
|
+
0x32,0xf1,0x53,0x27 = smmulrhs r3, r2, r1
|
693
|
+
0x13,0xf4,0x02,0xe7 = smuad r2, r3, r4
|
694
|
+
0x32,0xf1,0x03,0xe7 = smuadx r3, r2, r1
|
695
|
+
0x13,0xf4,0x02,0xb7 = smuadlt r2, r3, r4
|
696
|
+
0x32,0xf1,0x03,0xa7 = smuadxge r3, r2, r1
|
697
|
+
0x89,0x00,0x63,0xe1 = smulbb r3, r9, r0
|
698
|
+
0xc4,0x01,0x65,0xe1 = smulbt r5, r4, r1
|
699
|
+
0xa2,0x02,0x64,0xe1 = smultb r4, r2, r2
|
700
|
+
0xe3,0x04,0x68,0xe1 = smultt r8, r3, r4
|
701
|
+
0x89,0x00,0x61,0xa1 = smulbbge r1, r9, r0
|
702
|
+
0xc6,0x04,0x65,0xd1 = smulbtle r5, r6, r4
|
703
|
+
0xa3,0x02,0x62,0x11 = smultbne r2, r3, r2
|
704
|
+
0xe3,0x04,0x68,0x01 = smultteq r8, r3, r4
|
705
|
+
0x90,0x31,0xc9,0xe0 = smull r3, r9, r0, r1
|
706
|
+
0x90,0x32,0xd9,0xe0 = smulls r3, r9, r0, r2
|
707
|
+
0x94,0x85,0xc3,0x00 = smulleq r8, r3, r4, r5
|
708
|
+
0x94,0x83,0xd3,0x00 = smullseq r8, r3, r4, r3
|
709
|
+
0xa9,0x00,0x23,0xe1 = smulwb r3, r9, r0
|
710
|
+
0xe9,0x02,0x23,0xe1 = smulwt r3, r9, r2
|
711
|
+
0x50,0xf1,0x03,0xe7 = smusd r3, r0, r1
|
712
|
+
0x79,0xf2,0x03,0xe7 = smusdx r3, r9, r2
|
713
|
+
0x53,0xf2,0x08,0x07 = smusdeq r8, r3, r2
|
714
|
+
0x74,0xf3,0x07,0x17 = smusdxne r7, r4, r3
|
715
|
+
0x05,0x05,0x4d,0xf8 = srsda sp, #5
|
716
|
+
0x01,0x05,0x4d,0xf9 = srsdb sp, #1
|
717
|
+
0x00,0x05,0xcd,0xf8 = srsia sp, #0
|
718
|
+
0x0f,0x05,0xcd,0xf9 = srsib sp, #15
|
719
|
+
0x1f,0x05,0x6d,0xf8 = srsda sp!, #31
|
720
|
+
0x13,0x05,0x6d,0xf9 = srsdb sp!, #19
|
721
|
+
0x02,0x05,0xed,0xf8 = srsia sp!, #2
|
722
|
+
0x0e,0x05,0xed,0xf9 = srsib sp!, #14
|
723
|
+
0x0b,0x05,0xcd,0xf9 = srsib sp, #11
|
724
|
+
0x0a,0x05,0xcd,0xf8 = srsia sp, #10
|
725
|
+
0x09,0x05,0x4d,0xf9 = srsdb sp, #9
|
726
|
+
0x05,0x05,0x4d,0xf8 = srsda sp, #5
|
727
|
+
0x05,0x05,0xed,0xf9 = srsib sp!, #5
|
728
|
+
0x05,0x05,0xed,0xf8 = srsia sp!, #5
|
729
|
+
0x05,0x05,0x6d,0xf9 = srsdb sp!, #5
|
730
|
+
0x05,0x05,0x6d,0xf8 = srsda sp!, #5
|
731
|
+
0x05,0x05,0xcd,0xf8 = srsia sp, #5
|
732
|
+
0x05,0x05,0xed,0xf8 = srsia sp!, #5
|
733
|
+
0x05,0x05,0x4d,0xf8 = srsda sp, #5
|
734
|
+
0x01,0x05,0x4d,0xf9 = srsdb sp, #1
|
735
|
+
0x00,0x05,0xcd,0xf8 = srsia sp, #0
|
736
|
+
0x0f,0x05,0xcd,0xf9 = srsib sp, #15
|
737
|
+
0x1f,0x05,0x6d,0xf8 = srsda sp!, #31
|
738
|
+
0x13,0x05,0x6d,0xf9 = srsdb sp!, #19
|
739
|
+
0x02,0x05,0xed,0xf8 = srsia sp!, #2
|
740
|
+
0x0e,0x05,0xed,0xf9 = srsib sp!, #14
|
741
|
+
0x0b,0x05,0xcd,0xf9 = srsib sp, #11
|
742
|
+
0x0a,0x05,0xcd,0xf8 = srsia sp, #10
|
743
|
+
0x09,0x05,0x4d,0xf9 = srsdb sp, #9
|
744
|
+
0x05,0x05,0x4d,0xf8 = srsda sp, #5
|
745
|
+
0x05,0x05,0xed,0xf9 = srsib sp!, #5
|
746
|
+
0x05,0x05,0xed,0xf8 = srsia sp!, #5
|
747
|
+
0x05,0x05,0x6d,0xf9 = srsdb sp!, #5
|
748
|
+
0x05,0x05,0x6d,0xf8 = srsda sp!, #5
|
749
|
+
0x05,0x05,0xcd,0xf8 = srsia sp, #5
|
750
|
+
0x05,0x05,0xed,0xf8 = srsia sp!, #5
|
751
|
+
0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10
|
752
|
+
0x1a,0x80,0xa0,0xe6 = ssat r8, #1, r10
|
753
|
+
0x9a,0x8f,0xa0,0xe6 = ssat r8, #1, r10, lsl #31
|
754
|
+
0x5a,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #32
|
755
|
+
0xda,0x80,0xa0,0xe6 = ssat r8, #1, r10, asr #1
|
756
|
+
0x37,0x2f,0xa0,0xe6 = ssat16 r2, #1, r7
|
757
|
+
0x35,0x3f,0xaf,0xe6 = ssat16 r3, #16, r5
|
758
|
+
0x54,0x2f,0x13,0xe6 = ssax r2, r3, r4
|
759
|
+
0x54,0x2f,0x13,0xb6 = ssaxlt r2, r3, r4
|
760
|
+
0x76,0x1f,0x10,0xe6 = ssub16 r1, r0, r6
|
761
|
+
0x72,0x5f,0x13,0x16 = ssub16ne r5, r3, r2
|
762
|
+
0xf4,0x9f,0x12,0xe6 = ssub8 r9, r2, r4
|
763
|
+
0xf2,0x5f,0x11,0x06 = ssub8eq r5, r1, r2
|
764
|
+
0x01,0x80,0x81,0xfd = stc2 p0, c8, [r1, #4]
|
765
|
+
0x00,0x71,0x82,0xfd = stc2 p1, c7, [r2]
|
766
|
+
0x38,0x62,0x03,0xfd = stc2 p2, c6, [r3, #-224]
|
767
|
+
0x1e,0x53,0x24,0xfd = stc2 p3, c5, [r4, #-120]!
|
768
|
+
0x04,0x44,0xa5,0xfc = stc2 p4, c4, [r5], #16
|
769
|
+
0x12,0x35,0x26,0xfc = stc2 p5, c3, [r6], #-72
|
770
|
+
0x01,0x26,0xc7,0xfd = stc2l p6, c2, [r7, #4]
|
771
|
+
0x00,0x17,0xc8,0xfd = stc2l p7, c1, [r8]
|
772
|
+
0x38,0x08,0x49,0xfd = stc2l p8, c0, [r9, #-224]
|
773
|
+
0x1e,0x19,0x6a,0xfd = stc2l p9, c1, [r10, #-120]!
|
774
|
+
0x04,0x20,0xeb,0xfc = stc2l p0, c2, [r11], #16
|
775
|
+
0x12,0x31,0x6c,0xfc = stc2l p1, c3, [r12], #-72
|
776
|
+
0x01,0x4c,0x80,0xed = stc p12, c4, [r0, #4]
|
777
|
+
0x00,0x5d,0x81,0xed = stc p13, c5, [r1]
|
778
|
+
0x38,0x6e,0x02,0xed = stc p14, c6, [r2, #-224]
|
779
|
+
0x1e,0x7f,0x23,0xed = stc p15, c7, [r3, #-120]!
|
780
|
+
0x04,0x85,0xa4,0xec = stc p5, c8, [r4], #16
|
781
|
+
0x12,0x94,0x25,0xec = stc p4, c9, [r5], #-72
|
782
|
+
0x01,0xa3,0xc6,0xed = stcl p3, c10, [r6, #4]
|
783
|
+
0x00,0xb2,0xc7,0xed = stcl p2, c11, [r7]
|
784
|
+
0x38,0xc1,0x48,0xed = stcl p1, c12, [r8, #-224]
|
785
|
+
0x1e,0xd0,0x69,0xed = stcl p0, c13, [r9, #-120]!
|
786
|
+
0x04,0xe6,0xea,0xec = stcl p6, c14, [r10], #16
|
787
|
+
0x12,0xf7,0x6b,0xec = stcl p7, c15, [r11], #-72
|
788
|
+
0x01,0x4c,0x80,0x3d = stclo p12, c4, [r0, #4]
|
789
|
+
0x00,0x5d,0x81,0x8d = stchi p13, c5, [r1]
|
790
|
+
0x38,0x6e,0x02,0x2d = stchs p14, c6, [r2, #-224]
|
791
|
+
0x1e,0x7f,0x23,0x3d = stclo p15, c7, [r3, #-120]!
|
792
|
+
0x04,0x85,0xa4,0x0c = stceq p5, c8, [r4], #16
|
793
|
+
0x12,0x94,0x25,0xcc = stcgt p4, c9, [r5], #-72
|
794
|
+
0x01,0xa3,0xc6,0xbd = stcllt p3, c10, [r6, #4]
|
795
|
+
0x00,0xb2,0xc7,0xad = stclge p2, c11, [r7]
|
796
|
+
0x38,0xc1,0x48,0xdd = stclle p1, c12, [r8, #-224]
|
797
|
+
0x1e,0xd0,0x69,0x1d = stclne p0, c13, [r9, #-120]!
|
798
|
+
0x04,0xe6,0xea,0x0c = stcleq p6, c14, [r10], #16
|
799
|
+
0x12,0xf7,0x6b,0x8c = stclhi p7, c15, [r11], #-72
|
800
|
+
0x19,0x82,0x81,0xfc = stc2 p2, c8, [r1], {25}
|
801
|
+
0x7a,0x20,0x82,0xe8 = stm r2, {r1, r3, r4, r5, r6, sp}
|
802
|
+
0x7a,0x40,0x83,0xe8 = stm r3, {r1, r3, r4, r5, r6, lr}
|
803
|
+
0x7a,0x20,0x84,0xe9 = stmib r4, {r1, r3, r4, r5, r6, sp}
|
804
|
+
0x7a,0x20,0x05,0xe8 = stmda r5, {r1, r3, r4, r5, r6, sp}
|
805
|
+
0x7a,0x01,0x06,0xe9 = stmdb r6, {r1, r3, r4, r5, r6, r8}
|
806
|
+
0x7a,0x20,0x0d,0xe9 = stmdb sp, {r1, r3, r4, r5, r6, sp}
|
807
|
+
0x7a,0x20,0xa8,0xe8 = stm r8!, {r1, r3, r4, r5, r6, sp}
|
808
|
+
0x7a,0x20,0xa9,0xe9 = stmib r9!, {r1, r3, r4, r5, r6, sp}
|
809
|
+
0x7a,0x00,0x2d,0xe8 = stmda sp!, {r1, r3, r4, r5, r6}
|
810
|
+
0xa2,0x20,0x20,0xe9 = stmdb r0!, {r1, r5, r7, sp}
|
811
|
+
0x93,0x1f,0xc4,0xe1 = strexb r1, r3, [r4]
|
812
|
+
0x92,0x4f,0xe5,0xe1 = strexh r4, r2, [r5]
|
813
|
+
0x91,0x2f,0x87,0xe1 = strex r2, r1, [r7]
|
814
|
+
0x92,0x6f,0xa8,0xe1 = strexd r6, r2, r3, [r8]
|
815
|
+
0x00,0x30,0x2a,0x55 = strpl r3, [r10, #-0]!
|
816
|
+
0x00,0x30,0xaa,0x55 = strpl r3, [r10, #0]!
|
817
|
+
0x0f,0x4a,0x45,0xe2 = sub r4, r5, #61440
|
818
|
+
0x06,0x40,0x45,0xe0 = sub r4, r5, r6
|
819
|
+
0x86,0x42,0x45,0xe0 = sub r4, r5, r6, lsl #5
|
820
|
+
0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5
|
821
|
+
0xa6,0x42,0x45,0xe0 = sub r4, r5, r6, lsr #5
|
822
|
+
0xc6,0x42,0x45,0xe0 = sub r4, r5, r6, asr #5
|
823
|
+
0xe6,0x42,0x45,0xe0 = sub r4, r5, r6, ror #5
|
824
|
+
0x18,0x69,0x47,0xe0 = sub r6, r7, r8, lsl r9
|
825
|
+
0x38,0x69,0x47,0xe0 = sub r6, r7, r8, lsr r9
|
826
|
+
0x58,0x69,0x47,0xe0 = sub r6, r7, r8, asr r9
|
827
|
+
0x78,0x69,0x47,0xe0 = sub r6, r7, r8, ror r9
|
828
|
+
0x0f,0x5a,0x45,0xe2 = sub r5, r5, #61440
|
829
|
+
0x05,0x40,0x44,0xe0 = sub r4, r4, r5
|
830
|
+
0x85,0x42,0x44,0xe0 = sub r4, r4, r5, lsl #5
|
831
|
+
0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5
|
832
|
+
0xa5,0x42,0x44,0xe0 = sub r4, r4, r5, lsr #5
|
833
|
+
0xc5,0x42,0x44,0xe0 = sub r4, r4, r5, asr #5
|
834
|
+
0xe5,0x42,0x44,0xe0 = sub r4, r4, r5, ror #5
|
835
|
+
0x17,0x69,0x46,0xe0 = sub r6, r6, r7, lsl r9
|
836
|
+
0x37,0x69,0x46,0xe0 = sub r6, r6, r7, lsr r9
|
837
|
+
0x57,0x69,0x46,0xe0 = sub r6, r6, r7, asr r9
|
838
|
+
0x77,0x69,0x46,0xe0 = sub r6, r6, r7, ror r9
|
839
|
+
0x22,0x30,0x41,0xe0 = sub r3, r1, r2, lsr #32
|
840
|
+
0x42,0x30,0x41,0xe0 = sub r3, r1, r2, asr #32
|
841
|
+
0x10,0x00,0x00,0xef = svc #16
|
842
|
+
0x00,0x00,0x00,0xef = svc #0
|
843
|
+
0xff,0xff,0xff,0xef = svc #16777215
|
844
|
+
0x92,0x10,0x03,0xe1 = swp r1, r2, [r3]
|
845
|
+
0x94,0x40,0x06,0xe1 = swp r4, r4, [r6]
|
846
|
+
0x91,0x50,0x49,0xe1 = swpb r5, r1, [r9]
|
847
|
+
0x74,0x20,0xa3,0xe6 = sxtab r2, r3, r4
|
848
|
+
0x76,0x40,0xa5,0xe6 = sxtab r4, r5, r6
|
849
|
+
0x79,0x64,0xa2,0xb6 = sxtablt r6, r2, r9, ror #8
|
850
|
+
0x74,0x58,0xa1,0xe6 = sxtab r5, r1, r4, ror #16
|
851
|
+
0x73,0x7c,0xa8,0xe6 = sxtab r7, r8, r3, ror #24
|
852
|
+
0x74,0x00,0x81,0xa6 = sxtab16ge r0, r1, r4
|
853
|
+
0x77,0x60,0x82,0xe6 = sxtab16 r6, r2, r7
|
854
|
+
0x78,0x34,0x85,0xe6 = sxtab16 r3, r5, r8, ror #8
|
855
|
+
0x71,0x38,0x82,0xe6 = sxtab16 r3, r2, r1, ror #16
|
856
|
+
0x73,0x1c,0x82,0x06 = sxtab16eq r1, r2, r3, ror #24
|
857
|
+
0x79,0x10,0xb3,0xe6 = sxtah r1, r3, r9
|
858
|
+
0x76,0x60,0xb1,0x86 = sxtahhi r6, r1, r6
|
859
|
+
0x73,0x34,0xb8,0xe6 = sxtah r3, r8, r3, ror #8
|
860
|
+
0x74,0x28,0xb2,0x36 = sxtahlo r2, r2, r4, ror #16
|
861
|
+
0x73,0x9c,0xb3,0xe6 = sxtah r9, r3, r3, ror #24
|
862
|
+
0x74,0x20,0xaf,0xa6 = sxtbge r2, r4
|
863
|
+
0x76,0x50,0xaf,0xe6 = sxtb r5, r6
|
864
|
+
0x79,0x64,0xaf,0xe6 = sxtb r6, r9, ror #8
|
865
|
+
0x71,0x58,0xaf,0x36 = sxtblo r5, r1, ror #16
|
866
|
+
0x73,0x8c,0xaf,0xe6 = sxtb r8, r3, ror #24
|
867
|
+
0x74,0x10,0x8f,0xe6 = sxtb16 r1, r4
|
868
|
+
0x77,0x60,0x8f,0xe6 = sxtb16 r6, r7
|
869
|
+
0x75,0x34,0x8f,0x26 = sxtb16hs r3, r5, ror #8
|
870
|
+
0x71,0x38,0x8f,0xe6 = sxtb16 r3, r1, ror #16
|
871
|
+
0x73,0x2c,0x8f,0xa6 = sxtb16ge r2, r3, ror #24
|
872
|
+
0x79,0x30,0xbf,0x16 = sxthne r3, r9
|
873
|
+
0x76,0x10,0xbf,0xe6 = sxth r1, r6
|
874
|
+
0x78,0x34,0xbf,0xe6 = sxth r3, r8, ror #8
|
875
|
+
0x72,0x28,0xbf,0xd6 = sxthle r2, r2, ror #16
|
876
|
+
0x73,0x9c,0xbf,0xe6 = sxth r9, r3, ror #24
|
877
|
+
0x0f,0x0a,0x35,0xe3 = teq r5, #61440
|
878
|
+
0x05,0x00,0x34,0xe1 = teq r4, r5
|
879
|
+
0x85,0x02,0x34,0xe1 = teq r4, r5, lsl #5
|
880
|
+
0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5
|
881
|
+
0xa5,0x02,0x34,0xe1 = teq r4, r5, lsr #5
|
882
|
+
0xc5,0x02,0x34,0xe1 = teq r4, r5, asr #5
|
883
|
+
0xe5,0x02,0x34,0xe1 = teq r4, r5, ror #5
|
884
|
+
0x17,0x09,0x36,0xe1 = teq r6, r7, lsl r9
|
885
|
+
0x37,0x09,0x36,0xe1 = teq r6, r7, lsr r9
|
886
|
+
0x57,0x09,0x36,0xe1 = teq r6, r7, asr r9
|
887
|
+
0x77,0x09,0x36,0xe1 = teq r6, r7, ror r9
|
888
|
+
0x0f,0x0a,0x15,0xe3 = tst r5, #61440
|
889
|
+
0x05,0x00,0x14,0xe1 = tst r4, r5
|
890
|
+
0x85,0x02,0x14,0xe1 = tst r4, r5, lsl #5
|
891
|
+
0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5
|
892
|
+
0xa5,0x02,0x14,0xe1 = tst r4, r5, lsr #5
|
893
|
+
0xc5,0x02,0x14,0xe1 = tst r4, r5, asr #5
|
894
|
+
0xe5,0x02,0x14,0xe1 = tst r4, r5, ror #5
|
895
|
+
0x17,0x09,0x16,0xe1 = tst r6, r7, lsl r9
|
896
|
+
0x37,0x09,0x16,0xe1 = tst r6, r7, lsr r9
|
897
|
+
0x57,0x09,0x16,0xe1 = tst r6, r7, asr r9
|
898
|
+
0x77,0x09,0x16,0xe1 = tst r6, r7, ror r9
|
899
|
+
0x13,0x1f,0x52,0xe6 = uadd16 r1, r2, r3
|
900
|
+
0x13,0x1f,0x52,0xc6 = uadd16gt r1, r2, r3
|
901
|
+
0x93,0x1f,0x52,0xe6 = uadd8 r1, r2, r3
|
902
|
+
0x93,0x1f,0x52,0xd6 = uadd8le r1, r2, r3
|
903
|
+
0x30,0x9f,0x5c,0xe6 = uasx r9, r12, r0
|
904
|
+
0x30,0x9f,0x5c,0x06 = uasxeq r9, r12, r0
|
905
|
+
0x55,0x48,0xe0,0xe7 = ubfx r4, r5, #16, #1
|
906
|
+
0x55,0x48,0xef,0xc7 = ubfxgt r4, r5, #16, #16
|
907
|
+
0x12,0x4f,0x78,0xe6 = uhadd16 r4, r8, r2
|
908
|
+
0x12,0x4f,0x78,0xc6 = uhadd16gt r4, r8, r2
|
909
|
+
0x92,0x4f,0x78,0xe6 = uhadd8 r4, r8, r2
|
910
|
+
0x92,0x4f,0x78,0xc6 = uhadd8gt r4, r8, r2
|
911
|
+
0x32,0x4f,0x78,0xe6 = uhasx r4, r8, r2
|
912
|
+
0x32,0x4f,0x78,0xc6 = uhasxgt r4, r8, r2
|
913
|
+
0x72,0x4f,0x78,0xe6 = uhsub16 r4, r8, r2
|
914
|
+
0x72,0x4f,0x78,0xc6 = uhsub16gt r4, r8, r2
|
915
|
+
0xf2,0x4f,0x78,0xe6 = uhsub8 r4, r8, r2
|
916
|
+
0xf2,0x4f,0x78,0xc6 = uhsub8gt r4, r8, r2
|
917
|
+
0x95,0x36,0x44,0xe0 = umaal r3, r4, r5, r6
|
918
|
+
0x95,0x36,0x44,0xb0 = umaallt r3, r4, r5, r6
|
919
|
+
0x96,0x28,0xa4,0xe0 = umlal r2, r4, r6, r8
|
920
|
+
0x92,0x66,0xa1,0xc0 = umlalgt r6, r1, r2, r6
|
921
|
+
0x92,0x23,0xb9,0xe0 = umlals r2, r9, r2, r3
|
922
|
+
0x91,0x32,0xb5,0x00 = umlalseq r3, r5, r1, r2
|
923
|
+
0x96,0x28,0x84,0xe0 = umull r2, r4, r6, r8
|
924
|
+
0x92,0x66,0x81,0xc0 = umullgt r6, r1, r2, r6
|
925
|
+
0x92,0x23,0x99,0xe0 = umulls r2, r9, r2, r3
|
926
|
+
0x91,0x32,0x95,0x00 = umullseq r3, r5, r1, r2
|
927
|
+
0x13,0x1f,0x62,0xe6 = uqadd16 r1, r2, r3
|
928
|
+
0x19,0x4f,0x67,0xc6 = uqadd16gt r4, r7, r9
|
929
|
+
0x98,0x3f,0x64,0xe6 = uqadd8 r3, r4, r8
|
930
|
+
0x92,0x8f,0x61,0xd6 = uqadd8le r8, r1, r2
|
931
|
+
0x31,0x2f,0x64,0xe6 = uqasx r2, r4, r1
|
932
|
+
0x39,0x5f,0x62,0x86 = uqasxhi r5, r2, r9
|
933
|
+
0x57,0x1f,0x63,0xe6 = uqsax r1, r3, r7
|
934
|
+
0x52,0x3f,0x66,0xe6 = uqsax r3, r6, r2
|
935
|
+
0x73,0x1f,0x65,0xe6 = uqsub16 r1, r5, r3
|
936
|
+
0x75,0x3f,0x62,0xc6 = uqsub16gt r3, r2, r5
|
937
|
+
0xf4,0x2f,0x61,0xe6 = uqsub8 r2, r1, r4
|
938
|
+
0xf9,0x4f,0x66,0xd6 = uqsub8le r4, r6, r9
|
939
|
+
0x11,0xf4,0x82,0xe7 = usad8 r2, r1, r4
|
940
|
+
0x16,0xf9,0x84,0xd7 = usad8le r4, r6, r9
|
941
|
+
0x15,0x73,0x81,0xe7 = usada8 r1, r5, r3, r7
|
942
|
+
0x12,0x15,0x83,0xc7 = usada8gt r3, r2, r5, r1
|
943
|
+
0x1a,0x80,0xe1,0xe6 = usat r8, #1, r10
|
944
|
+
0x1a,0x80,0xe4,0xe6 = usat r8, #4, r10
|
945
|
+
0x9a,0x8f,0xe5,0xe6 = usat r8, #5, r10, lsl #31
|
946
|
+
0x5a,0x80,0xff,0xe6 = usat r8, #31, r10, asr #32
|
947
|
+
0xda,0x80,0xf0,0xe6 = usat r8, #16, r10, asr #1
|
948
|
+
0x37,0x2f,0xe2,0xe6 = usat16 r2, #2, r7
|
949
|
+
0x35,0x3f,0xef,0xe6 = usat16 r3, #15, r5
|
950
|
+
0x54,0x2f,0x53,0xe6 = usax r2, r3, r4
|
951
|
+
0x54,0x2f,0x53,0x16 = usaxne r2, r3, r4
|
952
|
+
0x77,0x4f,0x52,0xe6 = usub16 r4, r2, r7
|
953
|
+
0x73,0x1f,0x51,0x86 = usub16hi r1, r1, r3
|
954
|
+
0xf5,0x1f,0x58,0xe6 = usub8 r1, r8, r5
|
955
|
+
0xf3,0x9f,0x52,0xd6 = usub8le r9, r2, r3
|
956
|
+
0x74,0x20,0xe3,0xe6 = uxtab r2, r3, r4
|
957
|
+
0x76,0x40,0xe5,0xe6 = uxtab r4, r5, r6
|
958
|
+
0x79,0x64,0xe2,0xb6 = uxtablt r6, r2, r9, ror #8
|
959
|
+
0x74,0x58,0xe1,0xe6 = uxtab r5, r1, r4, ror #16
|
960
|
+
0x73,0x7c,0xe8,0xe6 = uxtab r7, r8, r3, ror #24
|
961
|
+
0x74,0x00,0xc1,0xa6 = uxtab16ge r0, r1, r4
|
962
|
+
0x77,0x60,0xc2,0xe6 = uxtab16 r6, r2, r7
|
963
|
+
0x78,0x34,0xc5,0xe6 = uxtab16 r3, r5, r8, ror #8
|
964
|
+
0x71,0x38,0xc2,0xe6 = uxtab16 r3, r2, r1, ror #16
|
965
|
+
0x73,0x1c,0xc2,0x06 = uxtab16eq r1, r2, r3, ror #24
|
966
|
+
0x79,0x10,0xf3,0xe6 = uxtah r1, r3, r9
|
967
|
+
0x76,0x60,0xf1,0x86 = uxtahhi r6, r1, r6
|
968
|
+
0x73,0x34,0xf8,0xe6 = uxtah r3, r8, r3, ror #8
|
969
|
+
0x74,0x28,0xf2,0x36 = uxtahlo r2, r2, r4, ror #16
|
970
|
+
0x73,0x9c,0xf3,0xe6 = uxtah r9, r3, r3, ror #24
|
971
|
+
0x74,0x20,0xef,0xa6 = uxtbge r2, r4
|
972
|
+
0x76,0x50,0xef,0xe6 = uxtb r5, r6
|
973
|
+
0x79,0x64,0xef,0xe6 = uxtb r6, r9, ror #8
|
974
|
+
0x71,0x58,0xef,0x36 = uxtblo r5, r1, ror #16
|
975
|
+
0x73,0x8c,0xef,0xe6 = uxtb r8, r3, ror #24
|
976
|
+
0x74,0x10,0xcf,0xe6 = uxtb16 r1, r4
|
977
|
+
0x77,0x60,0xcf,0xe6 = uxtb16 r6, r7
|
978
|
+
0x75,0x34,0xcf,0x26 = uxtb16hs r3, r5, ror #8
|
979
|
+
0x71,0x38,0xcf,0xe6 = uxtb16 r3, r1, ror #16
|
980
|
+
0x73,0x2c,0xcf,0xa6 = uxtb16ge r2, r3, ror #24
|
981
|
+
0x79,0x30,0xff,0x16 = uxthne r3, r9
|
982
|
+
0x76,0x10,0xff,0xe6 = uxth r1, r6
|
983
|
+
0x78,0x34,0xff,0xe6 = uxth r3, r8, ror #8
|
984
|
+
0x72,0x28,0xff,0xd6 = uxthle r2, r2, ror #16
|
985
|
+
0x73,0x9c,0xff,0xe6 = uxth r9, r3, ror #24
|
986
|
+
0x02,0xf0,0x20,0xe3 = wfe
|
987
|
+
0x02,0xf0,0x20,0x83 = wfehi
|
988
|
+
0x03,0xf0,0x20,0xe3 = wfi
|
989
|
+
0x03,0xf0,0x20,0xb3 = wfilt
|
990
|
+
0x01,0xf0,0x20,0xe3 = yield
|
991
|
+
0x01,0xf0,0x20,0x13 = yieldne
|
992
|
+
0x04,0xf0,0x20,0xe3 = sev
|
993
|
+
0x03,0xf0,0x20,0xe3 = wfi
|
994
|
+
0x02,0xf0,0x20,0xe3 = wfe
|
995
|
+
0x01,0xf0,0x20,0xe3 = yield
|
996
|
+
0x00,0xf0,0x20,0xe3 = nop
|
997
|
+
0xef,0xf0,0x20,0xc3 = hintgt #239
|