crabstone 3.0.3

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (302) hide show
  1. checksums.yaml +7 -0
  2. data/CHANGES.md +61 -0
  3. data/LICENSE +25 -0
  4. data/MANIFEST +312 -0
  5. data/README.md +103 -0
  6. data/Rakefile +27 -0
  7. data/bin/genconst +66 -0
  8. data/bin/genreg +99 -0
  9. data/crabstone.gemspec +27 -0
  10. data/examples/hello_world.rb +43 -0
  11. data/lib/arch/arm.rb +128 -0
  12. data/lib/arch/arm64.rb +167 -0
  13. data/lib/arch/arm64_const.rb +1055 -0
  14. data/lib/arch/arm64_registers.rb +295 -0
  15. data/lib/arch/arm_const.rb +777 -0
  16. data/lib/arch/arm_registers.rb +149 -0
  17. data/lib/arch/mips.rb +78 -0
  18. data/lib/arch/mips_const.rb +850 -0
  19. data/lib/arch/mips_registers.rb +208 -0
  20. data/lib/arch/ppc.rb +90 -0
  21. data/lib/arch/ppc_const.rb +1181 -0
  22. data/lib/arch/ppc_registers.rb +209 -0
  23. data/lib/arch/sparc.rb +79 -0
  24. data/lib/arch/sparc_const.rb +461 -0
  25. data/lib/arch/sparc_registers.rb +121 -0
  26. data/lib/arch/systemz.rb +79 -0
  27. data/lib/arch/sysz_const.rb +779 -0
  28. data/lib/arch/sysz_registers.rb +66 -0
  29. data/lib/arch/x86.rb +107 -0
  30. data/lib/arch/x86_const.rb +1698 -0
  31. data/lib/arch/x86_registers.rb +265 -0
  32. data/lib/arch/xcore.rb +78 -0
  33. data/lib/arch/xcore_const.rb +185 -0
  34. data/lib/arch/xcore_registers.rb +57 -0
  35. data/lib/crabstone.rb +564 -0
  36. data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
  37. data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
  38. data/test/MC/AArch64/neon-2velem.s.cs +113 -0
  39. data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
  40. data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
  41. data/test/MC/AArch64/neon-across.s.cs +40 -0
  42. data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
  43. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
  44. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
  45. data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
  46. data/test/MC/AArch64/neon-crypto.s.cs +15 -0
  47. data/test/MC/AArch64/neon-extract.s.cs +3 -0
  48. data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
  49. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
  50. data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
  51. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
  52. data/test/MC/AArch64/neon-max-min.s.cs +37 -0
  53. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
  54. data/test/MC/AArch64/neon-mov.s.cs +74 -0
  55. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
  56. data/test/MC/AArch64/neon-perm.s.cs +43 -0
  57. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
  58. data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
  59. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
  60. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
  61. data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
  62. data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
  63. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
  64. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
  65. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
  66. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
  67. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
  68. data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
  69. data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
  70. data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
  71. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
  72. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
  73. data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
  74. data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
  75. data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
  76. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
  77. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
  78. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
  79. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
  80. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
  81. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
  82. data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
  83. data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
  84. data/test/MC/AArch64/neon-shift.s.cs +22 -0
  85. data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
  86. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
  87. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
  88. data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
  89. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
  90. data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
  91. data/test/MC/AArch64/neon-tbl.s.cs +21 -0
  92. data/test/MC/AArch64/trace-regs.s.cs +383 -0
  93. data/test/MC/ARM/arm-aliases.s.cs +7 -0
  94. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
  95. data/test/MC/ARM/arm-it-block.s.cs +2 -0
  96. data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
  97. data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
  98. data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
  99. data/test/MC/ARM/arm-trustzone.s.cs +3 -0
  100. data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
  101. data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
  102. data/test/MC/ARM/arm_instructions.s.cs +25 -0
  103. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
  104. data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
  105. data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
  106. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
  107. data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
  108. data/test/MC/ARM/crc32-thumb.s.cs +7 -0
  109. data/test/MC/ARM/crc32.s.cs +7 -0
  110. data/test/MC/ARM/dot-req.s.cs +3 -0
  111. data/test/MC/ARM/fp-armv8.s.cs +52 -0
  112. data/test/MC/ARM/idiv-thumb.s.cs +3 -0
  113. data/test/MC/ARM/idiv.s.cs +3 -0
  114. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
  115. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
  116. data/test/MC/ARM/mode-switch.s.cs +7 -0
  117. data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
  118. data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
  119. data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
  120. data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
  121. data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
  122. data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
  123. data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
  124. data/test/MC/ARM/neon-crypto.s.cs +16 -0
  125. data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
  126. data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
  127. data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
  128. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
  129. data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
  130. data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
  131. data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
  132. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
  133. data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
  134. data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
  135. data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
  136. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
  137. data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
  138. data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
  139. data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
  140. data/test/MC/ARM/neon-v8.s.cs +38 -0
  141. data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
  142. data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
  143. data/test/MC/ARM/neon-vswp.s.cs +3 -0
  144. data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
  145. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
  146. data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
  147. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
  148. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
  149. data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
  150. data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
  151. data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
  152. data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
  153. data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
  154. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
  155. data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
  156. data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
  157. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
  158. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
  159. data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
  160. data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
  161. data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
  162. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
  163. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
  164. data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
  165. data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
  166. data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
  167. data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
  168. data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
  169. data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
  170. data/test/MC/ARM/thumb-hints.s.cs +12 -0
  171. data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
  172. data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
  173. data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
  174. data/test/MC/ARM/thumb.s.cs +19 -0
  175. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
  176. data/test/MC/ARM/thumb2-branches.s.cs +85 -0
  177. data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
  178. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
  179. data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
  180. data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
  181. data/test/MC/ARM/vfp4.s.cs +13 -0
  182. data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
  183. data/test/MC/ARM/vpush-vpop.s.cs +9 -0
  184. data/test/MC/Mips/hilo-addressing.s.cs +4 -0
  185. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
  186. data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
  187. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
  188. data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
  189. data/test/MC/Mips/micromips-expansions.s.cs +20 -0
  190. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
  191. data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
  192. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
  193. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
  194. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
  195. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
  196. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
  197. data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
  198. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
  199. data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
  200. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
  201. data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
  202. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
  203. data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
  204. data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
  205. data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
  206. data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
  207. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
  208. data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
  209. data/test/MC/Mips/mips-expansions.s.cs +20 -0
  210. data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
  211. data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
  212. data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
  213. data/test/MC/Mips/mips-register-names.s.cs +33 -0
  214. data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
  215. data/test/MC/Mips/mips64-instructions.s.cs +3 -0
  216. data/test/MC/Mips/mips64-register-names.s.cs +33 -0
  217. data/test/MC/Mips/mips_directives.s.cs +12 -0
  218. data/test/MC/Mips/nabi-regs.s.cs +12 -0
  219. data/test/MC/Mips/set-at-directive.s.cs +6 -0
  220. data/test/MC/Mips/test_2r.s.cs +16 -0
  221. data/test/MC/Mips/test_2rf.s.cs +33 -0
  222. data/test/MC/Mips/test_3r.s.cs +243 -0
  223. data/test/MC/Mips/test_3rf.s.cs +83 -0
  224. data/test/MC/Mips/test_bit.s.cs +49 -0
  225. data/test/MC/Mips/test_cbranch.s.cs +11 -0
  226. data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
  227. data/test/MC/Mips/test_elm.s.cs +16 -0
  228. data/test/MC/Mips/test_elm_insert.s.cs +4 -0
  229. data/test/MC/Mips/test_elm_insve.s.cs +5 -0
  230. data/test/MC/Mips/test_i10.s.cs +5 -0
  231. data/test/MC/Mips/test_i5.s.cs +45 -0
  232. data/test/MC/Mips/test_i8.s.cs +11 -0
  233. data/test/MC/Mips/test_lsa.s.cs +5 -0
  234. data/test/MC/Mips/test_mi10.s.cs +24 -0
  235. data/test/MC/Mips/test_vec.s.cs +8 -0
  236. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
  237. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
  238. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
  239. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
  240. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
  241. data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
  242. data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
  243. data/test/MC/README +6 -0
  244. data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
  245. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
  246. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
  247. data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
  248. data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
  249. data/test/MC/Sparc/sparc-vis.s.cs +2 -0
  250. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
  251. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
  252. data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
  253. data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
  254. data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
  255. data/test/MC/SystemZ/insn-good.s.cs +2265 -0
  256. data/test/MC/SystemZ/regs-good.s.cs +45 -0
  257. data/test/MC/X86/3DNow.s.cs +29 -0
  258. data/test/MC/X86/address-size.s.cs +5 -0
  259. data/test/MC/X86/avx512-encodings.s.cs +12 -0
  260. data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
  261. data/test/MC/X86/x86-32-avx.s.cs +833 -0
  262. data/test/MC/X86/x86-32-fma3.s.cs +169 -0
  263. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
  264. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
  265. data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
  266. data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
  267. data/test/MC/X86/x86_64-encoding.s.cs +59 -0
  268. data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
  269. data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
  270. data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
  271. data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
  272. data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
  273. data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
  274. data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
  275. data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
  276. data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
  277. data/test/README +6 -0
  278. data/test/test.rb +205 -0
  279. data/test/test.rb.SPEC +235 -0
  280. data/test/test_arm.rb +202 -0
  281. data/test/test_arm.rb.SPEC +275 -0
  282. data/test/test_arm64.rb +150 -0
  283. data/test/test_arm64.rb.SPEC +116 -0
  284. data/test/test_detail.rb +228 -0
  285. data/test/test_detail.rb.SPEC +322 -0
  286. data/test/test_exhaustive.rb +80 -0
  287. data/test/test_mips.rb +118 -0
  288. data/test/test_mips.rb.SPEC +91 -0
  289. data/test/test_ppc.rb +137 -0
  290. data/test/test_ppc.rb.SPEC +84 -0
  291. data/test/test_sanity.rb +83 -0
  292. data/test/test_skipdata.rb +111 -0
  293. data/test/test_skipdata.rb.SPEC +58 -0
  294. data/test/test_sparc.rb +113 -0
  295. data/test/test_sparc.rb.SPEC +116 -0
  296. data/test/test_sysz.rb +111 -0
  297. data/test/test_sysz.rb.SPEC +61 -0
  298. data/test/test_x86.rb +189 -0
  299. data/test/test_x86.rb.SPEC +579 -0
  300. data/test/test_xcore.rb +100 -0
  301. data/test/test_xcore.rb.SPEC +75 -0
  302. metadata +393 -0
@@ -0,0 +1,43 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x7e,0x32,0x83,0x11 = precrq.qb.ph $16, $17, $18
3
+ 0x7e,0x53,0x8d,0x11 = precrq.ph.w $17, $18, $19
4
+ 0x7e,0x74,0x95,0x51 = precrq_rs.ph.w $18, $19, $20
5
+ 0x7e,0x95,0x9b,0xd1 = precrqu_s.qb.ph $19, $20, $21
6
+ 0x7c,0x15,0xa3,0x12 = preceq.w.phl $20, $21
7
+ 0x7c,0x16,0xab,0x52 = preceq.w.phr $21, $22
8
+ 0x7c,0x17,0xb1,0x12 = precequ.ph.qbl $22, $23
9
+ 0x7c,0x18,0xb9,0x52 = precequ.ph.qbr $23, $24
10
+ 0x7c,0x19,0xc1,0x92 = precequ.ph.qbla $24, $25
11
+ 0x7c,0x1a,0xc9,0xd2 = precequ.ph.qbra $25, $26
12
+ 0x7c,0x1b,0xd7,0x12 = preceu.ph.qbl $26, $27
13
+ 0x7c,0x1c,0xdf,0x52 = preceu.ph.qbr $27, $gp
14
+ 0x7c,0x1d,0xe7,0x92 = preceu.ph.qbla $gp, $sp
15
+ 0x7c,0x1e,0xef,0xd2 = preceu.ph.qbra $sp, $fp
16
+ 0x7f,0x19,0xbb,0x51 = precr.qb.ph $23, $24, $25
17
+ 0x7f,0x38,0x07,0x91 = precr_sra.ph.w $24, $25, 0
18
+ 0x7f,0x38,0xff,0x91 = precr_sra.ph.w $24, $25, 31
19
+ 0x7f,0x59,0x07,0xd1 = precr_sra_r.ph.w $25, $26, 0
20
+ 0x7f,0x59,0xff,0xd1 = precr_sra_r.ph.w $25, $26, 31
21
+ 0x7f,0x54,0x51,0x8a = lbux $10, $20($26)
22
+ 0x7f,0x75,0x59,0x0a = lhx $11, $21($27)
23
+ 0x7f,0x96,0x60,0x0a = lwx $12, $22($gp)
24
+ 0x00,0x43,0x18,0x18 = mult $ac3, $2, $3
25
+ 0x00,0x85,0x10,0x19 = multu $ac2, $4, $5
26
+ 0x70,0xc7,0x08,0x00 = madd $ac1, $6, $7
27
+ 0x71,0x09,0x00,0x01 = maddu $ac0, $8, $9
28
+ 0x71,0x4b,0x18,0x04 = msub $ac3, $10, $11
29
+ 0x71,0x8d,0x10,0x05 = msubu $ac2, $12, $13
30
+ 0x00,0x20,0x70,0x10 = mfhi $14, $ac1
31
+ 0x00,0x00,0x78,0x12 = mflo $15, $ac0
32
+ 0x02,0x00,0x18,0x11 = mthi $16, $ac3
33
+ 0x02,0x20,0x10,0x13 = mtlo $17, $ac2
34
+ 0x00,0x43,0x00,0x18 = mult $2, $3
35
+ 0x00,0x85,0x00,0x19 = multu $4, $5
36
+ 0x70,0xc7,0x00,0x00 = madd $6, $7
37
+ 0x71,0x09,0x00,0x01 = maddu $8, $9
38
+ 0x71,0x4b,0x00,0x04 = msub $10, $11
39
+ 0x71,0x8d,0x00,0x05 = msubu $12, $13
40
+ 0x00,0x00,0x70,0x10 = mfhi $14
41
+ 0x00,0x00,0x78,0x12 = mflo $15
42
+ 0x02,0x00,0x00,0x11 = mthi $16
43
+ 0x02,0x20,0x00,0x13 = mtlo $17
@@ -0,0 +1,20 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32, None
2
+ 0x7b,0x00,0x05,0x34 = ori $5, $zero, 123
3
+ 0xd7,0xf6,0x06,0x24 = addiu $6, $zero, -2345
4
+ 0x01,0x00,0x07,0x3c = lui $7, 1
5
+ 0x02,0x00,0xe7,0x34 = ori $7, $7, 2
6
+ 0x14,0x00,0x04,0x24 = addiu $4, $zero, 20
7
+ 0x01,0x00,0x07,0x3c = lui $7, 1
8
+ 0x02,0x00,0xe7,0x34 = ori $7, $7, 2
9
+ 0x14,0x00,0xa4,0x24 = addiu $4, $5, 20
10
+ 0x01,0x00,0x07,0x3c = lui $7, 1
11
+ 0x02,0x00,0xe7,0x34 = ori $7, $7, 2
12
+ 0x21,0x38,0xe8,0x00 = addu $7, $7, $8
13
+ 0x21,0x50,0x44,0x01 = addu $10, $10, $4
14
+ 0x21,0x08,0x29,0x00 = addu $1, $1, $9
15
+ 0x0a,0x00,0x0a,0x3c = lui $10, 10
16
+ 0x21,0x50,0x44,0x01 = addu $10, $10, $4
17
+ 0x7b,0x00,0x4a,0x8d = lw $10, 123($10)
18
+ 0x02,0x00,0x01,0x3c = lui $1, 2
19
+ 0x21,0x08,0x29,0x00 = addu $1, $1, $9
20
+ 0x40,0xe2,0x2a,0xac = sw $10, 57920($1)
@@ -0,0 +1,93 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32, None
2
+ 0x05,0x73,0x20,0x46 = abs.d $f12, $f14
3
+ 0x85,0x39,0x00,0x46 = abs.s $f6, $f7
4
+ 0x00,0x62,0x2e,0x46 = add.d $f8, $f12, $f14
5
+ 0x40,0x32,0x07,0x46 = add.s $f9, $f6, $f7
6
+ 0x0f,0x73,0x20,0x46 = floor.w.d $f12, $f14
7
+ 0x8f,0x39,0x00,0x46 = floor.w.s $f6, $f7
8
+ 0x0e,0x73,0x20,0x46 = ceil.w.d $f12, $f14
9
+ 0x8e,0x39,0x00,0x46 = ceil.w.s $f6, $f7
10
+ 0x02,0x62,0x2e,0x46 = mul.d $f8, $f12, $f14
11
+ 0x42,0x32,0x07,0x46 = mul.s $f9, $f6, $f7
12
+ 0x07,0x73,0x20,0x46 = neg.d $f12, $f14
13
+ 0x87,0x39,0x00,0x46 = neg.s $f6, $f7
14
+ 0x0c,0x73,0x20,0x46 = round.w.d $f12, $f14
15
+ 0x8c,0x39,0x00,0x46 = round.w.s $f6, $f7
16
+ 0x04,0x73,0x20,0x46 = sqrt.d $f12, $f14
17
+ 0x84,0x39,0x00,0x46 = sqrt.s $f6, $f7
18
+ 0x01,0x62,0x2e,0x46 = sub.d $f8, $f12, $f14
19
+ 0x41,0x32,0x07,0x46 = sub.s $f9, $f6, $f7
20
+ 0x0d,0x73,0x20,0x46 = trunc.w.d $f12, $f14
21
+ 0x8d,0x39,0x00,0x46 = trunc.w.s $f6, $f7
22
+ 0x32,0x60,0x2e,0x46 = c.eq.d $f12, $f14
23
+ 0x32,0x30,0x07,0x46 = c.eq.s $f6, $f7
24
+ 0x30,0x60,0x2e,0x46 = c.f.d $f12, $f14
25
+ 0x30,0x30,0x07,0x46 = c.f.s $f6, $f7
26
+ 0x3e,0x60,0x2e,0x46 = c.le.d $f12, $f14
27
+ 0x3e,0x30,0x07,0x46 = c.le.s $f6, $f7
28
+ 0x3c,0x60,0x2e,0x46 = c.lt.d $f12, $f14
29
+ 0x3c,0x30,0x07,0x46 = c.lt.s $f6, $f7
30
+ 0x3d,0x60,0x2e,0x46 = c.nge.d $f12, $f14
31
+ 0x3d,0x30,0x07,0x46 = c.nge.s $f6, $f7
32
+ 0x3b,0x60,0x2e,0x46 = c.ngl.d $f12, $f14
33
+ 0x3b,0x30,0x07,0x46 = c.ngl.s $f6, $f7
34
+ 0x39,0x60,0x2e,0x46 = c.ngle.d $f12, $f14
35
+ 0x39,0x30,0x07,0x46 = c.ngle.s $f6, $f7
36
+ 0x3f,0x60,0x2e,0x46 = c.ngt.d $f12, $f14
37
+ 0x3f,0x30,0x07,0x46 = c.ngt.s $f6, $f7
38
+ 0x36,0x60,0x2e,0x46 = c.ole.d $f12, $f14
39
+ 0x36,0x30,0x07,0x46 = c.ole.s $f6, $f7
40
+ 0x34,0x60,0x2e,0x46 = c.olt.d $f12, $f14
41
+ 0x34,0x30,0x07,0x46 = c.olt.s $f6, $f7
42
+ 0x3a,0x60,0x2e,0x46 = c.seq.d $f12, $f14
43
+ 0x3a,0x30,0x07,0x46 = c.seq.s $f6, $f7
44
+ 0x38,0x60,0x2e,0x46 = c.sf.d $f12, $f14
45
+ 0x38,0x30,0x07,0x46 = c.sf.s $f6, $f7
46
+ 0x33,0x60,0x2e,0x46 = c.ueq.d $f12, $f14
47
+ 0x33,0xe0,0x12,0x46 = c.ueq.s $f28, $f18
48
+ 0x37,0x60,0x2e,0x46 = c.ule.d $f12, $f14
49
+ 0x37,0x30,0x07,0x46 = c.ule.s $f6, $f7
50
+ 0x35,0x60,0x2e,0x46 = c.ult.d $f12, $f14
51
+ 0x35,0x30,0x07,0x46 = c.ult.s $f6, $f7
52
+ 0x31,0x60,0x2e,0x46 = c.un.d $f12, $f14
53
+ 0x31,0x30,0x07,0x46 = c.un.s $f6, $f7
54
+ 0xa1,0x39,0x00,0x46 = cvt.d.s $f6, $f7
55
+ 0x21,0x73,0x80,0x46 = cvt.d.w $f12, $f14
56
+ 0x20,0x73,0x20,0x46 = cvt.s.d $f12, $f14
57
+ 0xa0,0x39,0x80,0x46 = cvt.s.w $f6, $f7
58
+ 0x24,0x73,0x20,0x46 = cvt.w.d $f12, $f14
59
+ 0xa4,0x39,0x00,0x46 = cvt.w.s $f6, $f7
60
+ 0x00,0x00,0x46,0x44 = cfc1 $6, $0
61
+ 0x00,0xf8,0xca,0x44 = ctc1 $10, $31
62
+ 0x00,0x38,0x06,0x44 = mfc1 $6, $f7
63
+ 0x10,0x28,0x00,0x00 = mfhi $5
64
+ 0x12,0x28,0x00,0x00 = mflo $5
65
+ 0x86,0x41,0x20,0x46 = mov.d $f6, $f8
66
+ 0x86,0x39,0x00,0x46 = mov.s $f6, $f7
67
+ 0x00,0x38,0x86,0x44 = mtc1 $6, $f7
68
+ 0x11,0x00,0xe0,0x00 = mthi $7
69
+ 0x13,0x00,0xe0,0x00 = mtlo $7
70
+ 0xc6,0x23,0xe9,0xe4 = swc1 $f9, 9158($7)
71
+ 0x00,0x38,0x06,0x40 = mfc0 $6, $7, 0
72
+ 0x00,0x40,0x89,0x40 = mtc0 $9, $8, 0
73
+ 0x00,0x38,0x05,0x48 = mfc2 $5, $7, 0
74
+ 0x00,0x20,0x89,0x48 = mtc2 $9, $4, 0
75
+ 0x02,0x38,0x06,0x40 = mfc0 $6, $7, 2
76
+ 0x03,0x40,0x89,0x40 = mtc0 $9, $8, 3
77
+ 0x04,0x38,0x05,0x48 = mfc2 $5, $7, 4
78
+ 0x05,0x20,0x89,0x48 = mtc2 $9, $4, 5
79
+ 0x01,0x10,0x20,0x00 = movf $2, $1, $fcc0
80
+ 0x01,0x10,0x21,0x00 = movt $2, $1, $fcc0
81
+ 0x01,0x20,0xb1,0x00 = movt $4, $5, $fcc4
82
+ 0x11,0x31,0x28,0x46 = movf.d $f4, $f6, $fcc2
83
+ 0x11,0x31,0x14,0x46 = movf.s $f4, $f6, $fcc5
84
+ 0x05,0x00,0xa6,0x4c = luxc1 $f0, $6($5)
85
+ 0x0d,0x20,0xb8,0x4c = suxc1 $f4, $24($5)
86
+ 0x00,0x05,0xcc,0x4d = lwxc1 $f20, $12($14)
87
+ 0x08,0xd0,0xd2,0x4e = swxc1 $f26, $18($22)
88
+ 0x00,0x20,0x71,0x44 = mfhc1 $17, $f4
89
+ 0x00,0x30,0xf1,0x44 = mthc1 $17, $f6
90
+ 0x10,0x00,0xa4,0xeb = swc2 $4, 16($sp)
91
+ 0x10,0x00,0xa4,0xfb = sdc2 $4, 16($sp)
92
+ 0x0c,0x00,0xeb,0xcb = lwc2 $11, 12($ra)
93
+ 0x0c,0x00,0xeb,0xdb = ldc2 $11, 12($ra)
@@ -0,0 +1 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32, None
@@ -0,0 +1,17 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32, None
2
+ 0x10,0x00,0xa4,0xa0 = sb $4, 16($5)
3
+ 0x10,0x00,0xa4,0xe0 = sc $4, 16($5)
4
+ 0x10,0x00,0xa4,0xa4 = sh $4, 16($5)
5
+ 0x10,0x00,0xa4,0xac = sw $4, 16($5)
6
+ 0x00,0x00,0xa7,0xac = sw $7, 0($5)
7
+ 0x10,0x00,0xa2,0xe4 = swc1 $f2, 16($5)
8
+ 0x10,0x00,0xa4,0xa8 = swl $4, 16($5)
9
+ 0x04,0x00,0xa4,0x80 = lb $4, 4($5)
10
+ 0x04,0x00,0xa4,0x8c = lw $4, 4($5)
11
+ 0x04,0x00,0xa4,0x90 = lbu $4, 4($5)
12
+ 0x04,0x00,0xa4,0x84 = lh $4, 4($5)
13
+ 0x04,0x00,0xa4,0x94 = lhu $4, 4($5)
14
+ 0x04,0x00,0xa4,0xc0 = ll $4, 4($5)
15
+ 0x04,0x00,0xa4,0x8c = lw $4, 4($5)
16
+ 0x00,0x00,0xe7,0x8c = lw $7, 0($7)
17
+ 0x10,0x00,0xa2,0x8f = lw $2, 16($sp)
@@ -0,0 +1,33 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x24,0x00,0x00,0x00 = addiu $zero, $zero, 0
3
+ 0x24,0x01,0x00,0x00 = addiu $at, $zero, 0
4
+ 0x24,0x02,0x00,0x00 = addiu $v0, $zero, 0
5
+ 0x24,0x03,0x00,0x00 = addiu $v1, $zero, 0
6
+ 0x24,0x04,0x00,0x00 = addiu $a0, $zero, 0
7
+ 0x24,0x05,0x00,0x00 = addiu $a1, $zero, 0
8
+ 0x24,0x06,0x00,0x00 = addiu $a2, $zero, 0
9
+ 0x24,0x07,0x00,0x00 = addiu $a3, $zero, 0
10
+ 0x24,0x08,0x00,0x00 = addiu $t0, $zero, 0
11
+ 0x24,0x09,0x00,0x00 = addiu $t1, $zero, 0
12
+ 0x24,0x0a,0x00,0x00 = addiu $t2, $zero, 0
13
+ 0x24,0x0b,0x00,0x00 = addiu $t3, $zero, 0
14
+ 0x24,0x0c,0x00,0x00 = addiu $t4, $zero, 0
15
+ 0x24,0x0d,0x00,0x00 = addiu $t5, $zero, 0
16
+ 0x24,0x0e,0x00,0x00 = addiu $t6, $zero, 0
17
+ 0x24,0x0f,0x00,0x00 = addiu $t7, $zero, 0
18
+ 0x24,0x10,0x00,0x00 = addiu $s0, $zero, 0
19
+ 0x24,0x11,0x00,0x00 = addiu $s1, $zero, 0
20
+ 0x24,0x12,0x00,0x00 = addiu $s2, $zero, 0
21
+ 0x24,0x13,0x00,0x00 = addiu $s3, $zero, 0
22
+ 0x24,0x14,0x00,0x00 = addiu $s4, $zero, 0
23
+ 0x24,0x15,0x00,0x00 = addiu $s5, $zero, 0
24
+ 0x24,0x16,0x00,0x00 = addiu $s6, $zero, 0
25
+ 0x24,0x17,0x00,0x00 = addiu $s7, $zero, 0
26
+ 0x24,0x18,0x00,0x00 = addiu $t8, $zero, 0
27
+ 0x24,0x19,0x00,0x00 = addiu $t9, $zero, 0
28
+ 0x24,0x1a,0x00,0x00 = addiu $k0, $zero, 0
29
+ 0x24,0x1b,0x00,0x00 = addiu $k1, $zero, 0
30
+ 0x24,0x1c,0x00,0x00 = addiu $gp, $zero, 0
31
+ 0x24,0x1d,0x00,0x00 = addiu $sp, $zero, 0
32
+ 0x24,0x1e,0x00,0x00 = addiu $fp, $zero, 0
33
+ 0x24,0x1f,0x00,0x00 = addiu $sp, $zero, 0
@@ -0,0 +1,47 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS64, None
2
+ 0x24,0x48,0xc7,0x00 = and $9, $6, $7
3
+ 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767
4
+ 0x67,0x45,0xc9,0x30 = andi $9, $6, 17767
5
+ 0x21,0x30,0xe6,0x70 = clo $6, $7
6
+ 0x20,0x30,0xe6,0x70 = clz $6, $7
7
+ 0x84,0x61,0x33,0x7d = ins $19, $9, 6, 7
8
+ 0x27,0x48,0xc7,0x00 = nor $9, $6, $7
9
+ 0x25,0x18,0x65,0x00 = or $3, $3, $5
10
+ 0x67,0x45,0xa4,0x34 = ori $4, $5, 17767
11
+ 0x67,0x45,0xc9,0x34 = ori $9, $6, 17767
12
+ 0xc2,0x49,0x26,0x00 = rotr $9, $6, 7
13
+ 0x46,0x48,0xe6,0x00 = rotrv $9, $6, $7
14
+ 0xc0,0x21,0x03,0x00 = sll $4, $3, 7
15
+ 0x04,0x10,0xa3,0x00 = sllv $2, $3, $5
16
+ 0x2a,0x18,0x65,0x00 = slt $3, $3, $5
17
+ 0x67,0x00,0x63,0x28 = slti $3, $3, 103
18
+ 0x67,0x00,0x63,0x28 = slti $3, $3, 103
19
+ 0x67,0x00,0x63,0x2c = sltiu $3, $3, 103
20
+ 0x2b,0x18,0x65,0x00 = sltu $3, $3, $5
21
+ 0xc3,0x21,0x03,0x00 = sra $4, $3, 7
22
+ 0x07,0x10,0xa3,0x00 = srav $2, $3, $5
23
+ 0xc2,0x21,0x03,0x00 = srl $4, $3, 7
24
+ 0x06,0x10,0xa3,0x00 = srlv $2, $3, $5
25
+ 0x26,0x18,0x65,0x00 = xor $3, $3, $5
26
+ 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767
27
+ 0x67,0x45,0xc9,0x38 = xori $9, $6, 17767
28
+ 0xa0,0x30,0x07,0x7c = wsbh $6, $7
29
+ 0x27,0x38,0x00,0x01 = not $7, $8
30
+ 0x2c,0x48,0xc7,0x00 = dadd $9, $6, $7
31
+ 0x67,0x45,0xc9,0x60 = daddi $9, $6, 17767
32
+ 0x67,0xc5,0xc9,0x64 = daddiu $9, $6, -15001
33
+ 0x67,0x45,0xc9,0x60 = daddi $9, $6, 17767
34
+ 0x67,0x45,0x29,0x61 = daddi $9, $9, 17767
35
+ 0x67,0xc5,0xc9,0x64 = daddiu $9, $6, -15001
36
+ 0x67,0xc5,0x29,0x65 = daddiu $9, $9, -15001
37
+ 0x2d,0x48,0xc7,0x00 = daddu $9, $6, $7
38
+ 0x3a,0x4d,0x26,0x00 = drotr $9, $6, 20
39
+ 0x3e,0x4d,0x26,0x00 = drotr32 $9, $6, 52
40
+ 0x00,0x00,0xc7,0x70 = madd $6, $7
41
+ 0x01,0x00,0xc7,0x70 = maddu $6, $7
42
+ 0x04,0x00,0xc7,0x70 = msub $6, $7
43
+ 0x05,0x00,0xc7,0x70 = msubu $6, $7
44
+ 0x18,0x00,0x65,0x00 = mult $3, $5
45
+ 0x19,0x00,0x65,0x00 = multu $3, $5
46
+ 0x2f,0x20,0x65,0x00 = dsubu $4, $3, $5
47
+ 0x2d,0x38,0x00,0x01 = move $7, $8
@@ -0,0 +1,3 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS64, None
2
+ 0x81,0x00,0x42,0x4d = ldxc1 $f2, $2($10)
3
+ 0x09,0x40,0x24,0x4f = sdxc1 $f8, $4($25)
@@ -0,0 +1,33 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None
2
+ 0x64,0x00,0x00,0x00 = daddiu $zero, $zero, 0
3
+ 0x64,0x01,0x00,0x00 = daddiu $at, $zero, 0
4
+ 0x64,0x02,0x00,0x00 = daddiu $v0, $zero, 0
5
+ 0x64,0x03,0x00,0x00 = daddiu $v1, $zero, 0
6
+ 0x64,0x04,0x00,0x00 = daddiu $a0, $zero, 0
7
+ 0x64,0x05,0x00,0x00 = daddiu $a1, $zero, 0
8
+ 0x64,0x06,0x00,0x00 = daddiu $a2, $zero, 0
9
+ 0x64,0x07,0x00,0x00 = daddiu $a2, $zero, 0
10
+ 0x64,0x08,0x00,0x00 = daddiu $a4, $zero, 0
11
+ 0x64,0x09,0x00,0x00 = daddiu $a5, $zero, 0
12
+ 0x64,0x0a,0x00,0x00 = daddiu $a6, $zero, 0
13
+ 0x64,0x0b,0x00,0x00 = daddiu $a7, $zero, 0
14
+ 0x64,0x0c,0x00,0x00 = daddiu $t4, $zero, 0
15
+ 0x64,0x0d,0x00,0x00 = daddiu $t5, $zero, 0
16
+ 0x64,0x0e,0x00,0x00 = daddiu $t6, $zero, 0
17
+ 0x64,0x0f,0x00,0x00 = daddiu $t7, $zero, 0
18
+ 0x64,0x10,0x00,0x00 = daddiu $s0, $zero, 0
19
+ 0x64,0x11,0x00,0x00 = daddiu $s1, $zero, 0
20
+ 0x64,0x12,0x00,0x00 = daddiu $s2, $zero, 0
21
+ 0x64,0x13,0x00,0x00 = daddiu $s3, $zero, 0
22
+ 0x64,0x14,0x00,0x00 = daddiu $s4, $zero, 0
23
+ 0x64,0x15,0x00,0x00 = daddiu $s5, $zero, 0
24
+ 0x64,0x16,0x00,0x00 = daddiu $s6, $zero, 0
25
+ 0x64,0x17,0x00,0x00 = daddiu $s7, $zero, 0
26
+ 0x64,0x18,0x00,0x00 = daddiu $t8, $zero, 0
27
+ 0x64,0x19,0x00,0x00 = daddiu $t9, $zero, 0
28
+ 0x64,0x1a,0x00,0x00 = daddiu $kt0, $zero, 0
29
+ 0x64,0x1b,0x00,0x00 = daddiu $kt1, $zero, 0
30
+ 0x64,0x1c,0x00,0x00 = daddiu $gp, $zero, 0
31
+ 0x64,0x1d,0x00,0x00 = daddiu $sp, $zero, 0
32
+ 0x64,0x1e,0x00,0x00 = daddiu $s8, $zero, 0
33
+ 0x64,0x1f,0x00,0x00 = daddiu $ra, $zero, 0
@@ -0,0 +1,12 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x10,0x00,0x01,0x4d = b 1332
3
+ 0x08,0x00,0x01,0x4c = j 1328
4
+ 0x0c,0x00,0x01,0x4c = jal 1328
5
+ 0x10,0x00,0x01,0x4d = b 1332
6
+ 0x00,0x00,0x00,0x00 = nop
7
+ 0x08,0x00,0x01,0x4c = j 1328
8
+ 0x00,0x00,0x00,0x00 = nop
9
+ 0x0c,0x00,0x01,0x4c = jal 1328
10
+ 0x00,0x00,0x00,0x00 = nop
11
+ 0x46,0x00,0x39,0x85 = abs.s $f6, $f7
12
+ 0x01,0xef,0x18,0x24 = and $3, $15, $15
@@ -0,0 +1,12 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None
2
+ 0x02,0x04,0x80,0x20 = add $16, $16, $4
3
+ 0x02,0x06,0x80,0x20 = add $16, $16, $6
4
+ 0x02,0x07,0x80,0x20 = add $16, $16, $7
5
+ 0x02,0x08,0x80,0x20 = add $16, $16, $8
6
+ 0x02,0x09,0x80,0x20 = add $16, $16, $9
7
+ 0x02,0x0a,0x80,0x20 = add $16, $16, $10
8
+ 0x02,0x0b,0x80,0x20 = add $16, $16, $11
9
+ 0x02,0x0c,0x80,0x20 = add $16, $16, $12
10
+ 0x02,0x0d,0x80,0x20 = add $16, $16, $13
11
+ 0x02,0x0e,0x80,0x20 = add $16, $16, $14
12
+ 0x02,0x0f,0x80,0x20 = add $16, $16, $15
@@ -0,0 +1,6 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32, None
2
+ 0x08,0x00,0x60,0x00 = jr $3
3
+ 0x08,0x00,0x80,0x03 = jr $gp
4
+ 0x08,0x00,0xc0,0x03 = jr $fp
5
+ 0x08,0x00,0xa0,0x03 = jr $sp
6
+ 0x08,0x00,0xe0,0x03 = jr $ra
@@ -0,0 +1,16 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x7b,0x00,0x4f,0x9e = fill.b $w30, $9
3
+ 0x7b,0x01,0xbf,0xde = fill.h $w31, $23
4
+ 0x7b,0x02,0xc4,0x1e = fill.w $w16, $24
5
+ 0x7b,0x08,0x05,0x5e = nloc.b $w21, $w0
6
+ 0x7b,0x09,0xfc,0x9e = nloc.h $w18, $w31
7
+ 0x7b,0x0a,0xb8,0x9e = nloc.w $w2, $w23
8
+ 0x7b,0x0b,0x51,0x1e = nloc.d $w4, $w10
9
+ 0x7b,0x0c,0x17,0xde = nlzc.b $w31, $w2
10
+ 0x7b,0x0d,0xb6,0xde = nlzc.h $w27, $w22
11
+ 0x7b,0x0e,0xea,0x9e = nlzc.w $w10, $w29
12
+ 0x7b,0x0f,0x4e,0x5e = nlzc.d $w25, $w9
13
+ 0x7b,0x04,0x95,0x1e = pcnt.b $w20, $w18
14
+ 0x7b,0x05,0x40,0x1e = pcnt.h $w0, $w8
15
+ 0x7b,0x06,0x4d,0xde = pcnt.w $w23, $w9
16
+ 0x7b,0x07,0xc5,0x5e = pcnt.d $w21, $w24
@@ -0,0 +1,33 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x7b,0x20,0x66,0x9e = fclass.w $w26, $w12
3
+ 0x7b,0x21,0x8e,0x1e = fclass.d $w24, $w17
4
+ 0x7b,0x30,0x02,0x1e = fexupl.w $w8, $w0
5
+ 0x7b,0x31,0xec,0x5e = fexupl.d $w17, $w29
6
+ 0x7b,0x32,0x23,0x5e = fexupr.w $w13, $w4
7
+ 0x7b,0x33,0x11,0x5e = fexupr.d $w5, $w2
8
+ 0x7b,0x3c,0xed,0x1e = ffint_s.w $w20, $w29
9
+ 0x7b,0x3d,0x7b,0x1e = ffint_s.d $w12, $w15
10
+ 0x7b,0x3e,0xd9,0xde = ffint_u.w $w7, $w27
11
+ 0x7b,0x3f,0x84,0xde = ffint_u.d $w19, $w16
12
+ 0x7b,0x34,0x6f,0xde = ffql.w $w31, $w13
13
+ 0x7b,0x35,0x6b,0x1e = ffql.d $w12, $w13
14
+ 0x7b,0x36,0xf6,0xde = ffqr.w $w27, $w30
15
+ 0x7b,0x37,0x7f,0x9e = ffqr.d $w30, $w15
16
+ 0x7b,0x2e,0xfe,0x5e = flog2.w $w25, $w31
17
+ 0x7b,0x2f,0x54,0x9e = flog2.d $w18, $w10
18
+ 0x7b,0x2c,0x79,0xde = frint.w $w7, $w15
19
+ 0x7b,0x2d,0xb5,0x5e = frint.d $w21, $w22
20
+ 0x7b,0x2a,0x04,0xde = frcp.w $w19, $w0
21
+ 0x7b,0x2b,0x71,0x1e = frcp.d $w4, $w14
22
+ 0x7b,0x28,0x8b,0x1e = frsqrt.w $w12, $w17
23
+ 0x7b,0x29,0x5d,0xde = frsqrt.d $w23, $w11
24
+ 0x7b,0x26,0x58,0x1e = fsqrt.w $w0, $w11
25
+ 0x7b,0x27,0x63,0xde = fsqrt.d $w15, $w12
26
+ 0x7b,0x38,0x2f,0x9e = ftint_s.w $w30, $w5
27
+ 0x7b,0x39,0xb9,0x5e = ftint_s.d $w5, $w23
28
+ 0x7b,0x3a,0x75,0x1e = ftint_u.w $w20, $w14
29
+ 0x7b,0x3b,0xad,0xde = ftint_u.d $w23, $w21
30
+ 0x7b,0x22,0x8f,0x5e = ftrunc_s.w $w29, $w17
31
+ 0x7b,0x23,0xdb,0x1e = ftrunc_s.d $w12, $w27
32
+ 0x7b,0x24,0x7c,0x5e = ftrunc_u.w $w17, $w15
33
+ 0x7b,0x25,0xd9,0x5e = ftrunc_u.d $w5, $w27
@@ -0,0 +1,243 @@
1
+ # CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
2
+ 0x78,0x04,0x4e,0x90 = add_a.b $w26, $w9, $w4
3
+ 0x78,0x3f,0xdd,0xd0 = add_a.h $w23, $w27, $w31
4
+ 0x78,0x56,0x32,0xd0 = add_a.w $w11, $w6, $w22
5
+ 0x78,0x60,0x51,0x90 = add_a.d $w6, $w10, $w0
6
+ 0x78,0x93,0xc4,0xd0 = adds_a.b $w19, $w24, $w19
7
+ 0x78,0xa4,0x36,0x50 = adds_a.h $w25, $w6, $w4
8
+ 0x78,0xdb,0x8e,0x50 = adds_a.w $w25, $w17, $w27
9
+ 0x78,0xfa,0x93,0xd0 = adds_a.d $w15, $w18, $w26
10
+ 0x79,0x13,0x5f,0x50 = adds_s.b $w29, $w11, $w19
11
+ 0x79,0x3a,0xb9,0x50 = adds_s.h $w5, $w23, $w26
12
+ 0x79,0x4d,0x74,0x10 = adds_s.w $w16, $w14, $w13
13
+ 0x79,0x7c,0x70,0x90 = adds_s.d $w2, $w14, $w28
14
+ 0x79,0x8e,0x88,0xd0 = adds_u.b $w3, $w17, $w14
15
+ 0x79,0xa4,0xf2,0x90 = adds_u.h $w10, $w30, $w4
16
+ 0x79,0xd4,0x93,0xd0 = adds_u.w $w15, $w18, $w20
17
+ 0x79,0xe9,0x57,0x90 = adds_u.d $w30, $w10, $w9
18
+ 0x78,0x15,0xa6,0x0e = addv.b $w24, $w20, $w21
19
+ 0x78,0x3b,0x69,0x0e = addv.h $w4, $w13, $w27
20
+ 0x78,0x4e,0x5c,0xce = addv.w $w19, $w11, $w14
21
+ 0x78,0x7f,0xa8,0x8e = addv.d $w2, $w21, $w31
22
+ 0x7a,0x03,0x85,0xd1 = asub_s.b $w23, $w16, $w3
23
+ 0x7a,0x39,0x8d,0x91 = asub_s.h $w22, $w17, $w25
24
+ 0x7a,0x49,0x0e,0x11 = asub_s.w $w24, $w1, $w9
25
+ 0x7a,0x6c,0x63,0x51 = asub_s.d $w13, $w12, $w12
26
+ 0x7a,0x8b,0xea,0x91 = asub_u.b $w10, $w29, $w11
27
+ 0x7a,0xaf,0x4c,0x91 = asub_u.h $w18, $w9, $w15
28
+ 0x7a,0xdf,0x9a,0x91 = asub_u.w $w10, $w19, $w31
29
+ 0x7a,0xe0,0x54,0x51 = asub_u.d $w17, $w10, $w0
30
+ 0x7a,0x01,0x28,0x90 = ave_s.b $w2, $w5, $w1
31
+ 0x7a,0x29,0x9c,0x10 = ave_s.h $w16, $w19, $w9
32
+ 0x7a,0x45,0xfc,0x50 = ave_s.w $w17, $w31, $w5
33
+ 0x7a,0x6a,0xce,0xd0 = ave_s.d $w27, $w25, $w10
34
+ 0x7a,0x89,0x9c,0x10 = ave_u.b $w16, $w19, $w9
35
+ 0x7a,0xab,0xe7,0x10 = ave_u.h $w28, $w28, $w11
36
+ 0x7a,0xcb,0x62,0xd0 = ave_u.w $w11, $w12, $w11
37
+ 0x7a,0xfc,0x9f,0x90 = ave_u.d $w30, $w19, $w28
38
+ 0x7b,0x02,0x86,0x90 = aver_s.b $w26, $w16, $w2
39
+ 0x7b,0x3b,0xdf,0xd0 = aver_s.h $w31, $w27, $w27
40
+ 0x7b,0x59,0x97,0x10 = aver_s.w $w28, $w18, $w25
41
+ 0x7b,0x7b,0xaf,0x50 = aver_s.d $w29, $w21, $w27
42
+ 0x7b,0x83,0xd7,0x50 = aver_u.b $w29, $w26, $w3
43
+ 0x7b,0xa9,0x94,0x90 = aver_u.h $w18, $w18, $w9
44
+ 0x7b,0xdd,0xcc,0x50 = aver_u.w $w17, $w25, $w29
45
+ 0x7b,0xf3,0xb5,0x90 = aver_u.d $w22, $w22, $w19
46
+ 0x79,0x9d,0x78,0x8d = bclr.b $w2, $w15, $w29
47
+ 0x79,0xbc,0xac,0x0d = bclr.h $w16, $w21, $w28
48
+ 0x79,0xc9,0x14,0xcd = bclr.w $w19, $w2, $w9
49
+ 0x79,0xe4,0xfe,0xcd = bclr.d $w27, $w31, $w4
50
+ 0x7b,0x18,0x81,0x4d = binsl.b $w5, $w16, $w24
51
+ 0x7b,0x2a,0x2f,0x8d = binsl.h $w30, $w5, $w10
52
+ 0x7b,0x4d,0x7b,0x8d = binsl.w $w14, $w15, $w13
53
+ 0x7b,0x6c,0xa5,0xcd = binsl.d $w23, $w20, $w12
54
+ 0x7b,0x82,0x5d,0x8d = binsr.b $w22, $w11, $w2
55
+ 0x7b,0xa6,0xd0,0x0d = binsr.h $w0, $w26, $w6
56
+ 0x7b,0xdc,0x1e,0x8d = binsr.w $w26, $w3, $w28
57
+ 0x7b,0xf5,0x00,0x0d = binsr.d $w0, $w0, $w21
58
+ 0x7a,0x98,0x58,0x0d = bneg.b $w0, $w11, $w24
59
+ 0x7a,0xa4,0x87,0x0d = bneg.h $w28, $w16, $w4
60
+ 0x7a,0xd3,0xd0,0xcd = bneg.w $w3, $w26, $w19
61
+ 0x7a,0xef,0xeb,0x4d = bneg.d $w13, $w29, $w15
62
+ 0x7a,0x1f,0x2f,0xcd = bset.b $w31, $w5, $w31
63
+ 0x7a,0x26,0x63,0x8d = bset.h $w14, $w12, $w6
64
+ 0x7a,0x4c,0x4f,0xcd = bset.w $w31, $w9, $w12
65
+ 0x7a,0x65,0xb1,0x4d = bset.d $w5, $w22, $w5
66
+ 0x78,0x12,0xff,0xcf = ceq.b $w31, $w31, $w18
67
+ 0x78,0x29,0xda,0x8f = ceq.h $w10, $w27, $w9
68
+ 0x78,0x4e,0x2a,0x4f = ceq.w $w9, $w5, $w14
69
+ 0x78,0x60,0x89,0x4f = ceq.d $w5, $w17, $w0
70
+ 0x7a,0x09,0x25,0xcf = cle_s.b $w23, $w4, $w9
71
+ 0x7a,0x33,0xdd,0x8f = cle_s.h $w22, $w27, $w19
72
+ 0x7a,0x4a,0xd7,0x8f = cle_s.w $w30, $w26, $w10
73
+ 0x7a,0x6a,0x2c,0x8f = cle_s.d $w18, $w5, $w10
74
+ 0x7a,0x80,0xc8,0x4f = cle_u.b $w1, $w25, $w0
75
+ 0x7a,0xbd,0x01,0xcf = cle_u.h $w7, $w0, $w29
76
+ 0x7a,0xc1,0x96,0x4f = cle_u.w $w25, $w18, $w1
77
+ 0x7a,0xfe,0x01,0x8f = cle_u.d $w6, $w0, $w30
78
+ 0x79,0x15,0x16,0x4f = clt_s.b $w25, $w2, $w21
79
+ 0x79,0x29,0x98,0x8f = clt_s.h $w2, $w19, $w9
80
+ 0x79,0x50,0x45,0xcf = clt_s.w $w23, $w8, $w16
81
+ 0x79,0x6c,0xf1,0xcf = clt_s.d $w7, $w30, $w12
82
+ 0x79,0x8d,0xf8,0x8f = clt_u.b $w2, $w31, $w13
83
+ 0x79,0xb7,0xfc,0x0f = clt_u.h $w16, $w31, $w23
84
+ 0x79,0xc9,0xc0,0xcf = clt_u.w $w3, $w24, $w9
85
+ 0x79,0xe1,0x01,0xcf = clt_u.d $w7, $w0, $w1
86
+ 0x7a,0x12,0x1f,0x52 = div_s.b $w29, $w3, $w18
87
+ 0x7a,0x2d,0x84,0x52 = div_s.h $w17, $w16, $w13
88
+ 0x7a,0x5e,0xc9,0x12 = div_s.w $w4, $w25, $w30
89
+ 0x7a,0x74,0x4f,0xd2 = div_s.d $w31, $w9, $w20
90
+ 0x7a,0x8a,0xe9,0x92 = div_u.b $w6, $w29, $w10
91
+ 0x7a,0xae,0xae,0x12 = div_u.h $w24, $w21, $w14
92
+ 0x7a,0xd9,0x77,0x52 = div_u.w $w29, $w14, $w25
93
+ 0x7a,0xf5,0x0f,0xd2 = div_u.d $w31, $w1, $w21
94
+ 0x78,0x39,0xb5,0xd3 = dotp_s.h $w23, $w22, $w25
95
+ 0x78,0x45,0x75,0x13 = dotp_s.w $w20, $w14, $w5
96
+ 0x78,0x76,0x14,0x53 = dotp_s.d $w17, $w2, $w22
97
+ 0x78,0xa6,0x13,0x53 = dotp_u.h $w13, $w2, $w6
98
+ 0x78,0xd5,0xb3,0xd3 = dotp_u.w $w15, $w22, $w21
99
+ 0x78,0xfa,0x81,0x13 = dotp_u.d $w4, $w16, $w26
100
+ 0x79,0x36,0xe0,0x53 = dpadd_s.h $w1, $w28, $w22
101
+ 0x79,0x4c,0x0a,0x93 = dpadd_s.w $w10, $w1, $w12
102
+ 0x79,0x7b,0xa8,0xd3 = dpadd_s.d $w3, $w21, $w27
103
+ 0x79,0xb4,0x2c,0x53 = dpadd_u.h $w17, $w5, $w20
104
+ 0x79,0xd0,0x46,0x13 = dpadd_u.w $w24, $w8, $w16
105
+ 0x79,0xf0,0xeb,0xd3 = dpadd_u.d $w15, $w29, $w16
106
+ 0x7a,0x2c,0x59,0x13 = dpsub_s.h $w4, $w11, $w12
107
+ 0x7a,0x46,0x39,0x13 = dpsub_s.w $w4, $w7, $w6
108
+ 0x7a,0x7c,0x67,0xd3 = dpsub_s.d $w31, $w12, $w28
109
+ 0x7a,0xb1,0xc9,0x13 = dpsub_u.h $w4, $w25, $w17
110
+ 0x7a,0xd0,0xcc,0xd3 = dpsub_u.w $w19, $w25, $w16
111
+ 0x7a,0xfa,0x51,0xd3 = dpsub_u.d $w7, $w10, $w26
112
+ 0x7a,0x22,0xc7,0x15 = hadd_s.h $w28, $w24, $w2
113
+ 0x7a,0x4b,0x8e,0x15 = hadd_s.w $w24, $w17, $w11
114
+ 0x7a,0x74,0x7c,0x55 = hadd_s.d $w17, $w15, $w20
115
+ 0x7a,0xb1,0xeb,0x15 = hadd_u.h $w12, $w29, $w17
116
+ 0x7a,0xc6,0x2a,0x55 = hadd_u.w $w9, $w5, $w6
117
+ 0x7a,0xe6,0xa0,0x55 = hadd_u.d $w1, $w20, $w6
118
+ 0x7b,0x3d,0x74,0x15 = hsub_s.h $w16, $w14, $w29
119
+ 0x7b,0x4b,0x6a,0x55 = hsub_s.w $w9, $w13, $w11
120
+ 0x7b,0x6e,0x97,0x95 = hsub_s.d $w30, $w18, $w14
121
+ 0x7b,0xae,0x61,0xd5 = hsub_u.h $w7, $w12, $w14
122
+ 0x7b,0xc5,0x2d,0x55 = hsub_u.w $w21, $w5, $w5
123
+ 0x7b,0xff,0x62,0xd5 = hsub_u.d $w11, $w12, $w31
124
+ 0x7b,0x1e,0x84,0x94 = ilvev.b $w18, $w16, $w30
125
+ 0x7b,0x2d,0x03,0x94 = ilvev.h $w14, $w0, $w13
126
+ 0x7b,0x56,0xcb,0x14 = ilvev.w $w12, $w25, $w22
127
+ 0x7b,0x63,0xdf,0x94 = ilvev.d $w30, $w27, $w3
128
+ 0x7a,0x15,0x1f,0x54 = ilvl.b $w29, $w3, $w21
129
+ 0x7a,0x31,0x56,0xd4 = ilvl.h $w27, $w10, $w17
130
+ 0x7a,0x40,0x09,0x94 = ilvl.w $w6, $w1, $w0
131
+ 0x7a,0x78,0x80,0xd4 = ilvl.d $w3, $w16, $w24
132
+ 0x7b,0x94,0x2a,0xd4 = ilvod.b $w11, $w5, $w20
133
+ 0x7b,0xbf,0x6c,0x94 = ilvod.h $w18, $w13, $w31
134
+ 0x7b,0xd8,0x87,0x54 = ilvod.w $w29, $w16, $w24
135
+ 0x7b,0xfd,0x65,0x94 = ilvod.d $w22, $w12, $w29
136
+ 0x7a,0x86,0xf1,0x14 = ilvr.b $w4, $w30, $w6
137
+ 0x7a,0xbd,0x9f,0x14 = ilvr.h $w28, $w19, $w29
138
+ 0x7a,0xd5,0xa4,0x94 = ilvr.w $w18, $w20, $w21
139
+ 0x7a,0xec,0xf5,0xd4 = ilvr.d $w23, $w30, $w12
140
+ 0x78,0x9d,0xfc,0x52 = maddv.b $w17, $w31, $w29
141
+ 0x78,0xa9,0xc1,0xd2 = maddv.h $w7, $w24, $w9
142
+ 0x78,0xd4,0xb5,0x92 = maddv.w $w22, $w22, $w20
143
+ 0x78,0xf4,0xd7,0x92 = maddv.d $w30, $w26, $w20
144
+ 0x7b,0x17,0x5d,0xce = max_a.b $w23, $w11, $w23
145
+ 0x7b,0x3e,0x2d,0x0e = max_a.h $w20, $w5, $w30
146
+ 0x7b,0x5e,0x91,0xce = max_a.w $w7, $w18, $w30
147
+ 0x7b,0x7f,0x42,0x0e = max_a.d $w8, $w8, $w31
148
+ 0x79,0x13,0x0a,0x8e = max_s.b $w10, $w1, $w19
149
+ 0x79,0x31,0xeb,0xce = max_s.h $w15, $w29, $w17
150
+ 0x79,0x4e,0xeb,0xce = max_s.w $w15, $w29, $w14
151
+ 0x79,0x63,0xc6,0x4e = max_s.d $w25, $w24, $w3
152
+ 0x79,0x85,0xc3,0x0e = max_u.b $w12, $w24, $w5
153
+ 0x79,0xa7,0x31,0x4e = max_u.h $w5, $w6, $w7
154
+ 0x79,0xc7,0x24,0x0e = max_u.w $w16, $w4, $w7
155
+ 0x79,0xf8,0x66,0x8e = max_u.d $w26, $w12, $w24
156
+ 0x7b,0x81,0xd1,0x0e = min_a.b $w4, $w26, $w1
157
+ 0x7b,0xbf,0x6b,0x0e = min_a.h $w12, $w13, $w31
158
+ 0x7b,0xc0,0xa7,0x0e = min_a.w $w28, $w20, $w0
159
+ 0x7b,0xf3,0xa3,0x0e = min_a.d $w12, $w20, $w19
160
+ 0x7a,0x0e,0x1c,0xce = min_s.b $w19, $w3, $w14
161
+ 0x7a,0x28,0xae,0xce = min_s.h $w27, $w21, $w8
162
+ 0x7a,0x5e,0x70,0x0e = min_s.w $w0, $w14, $w30
163
+ 0x7a,0x75,0x41,0x8e = min_s.d $w6, $w8, $w21
164
+ 0x7a,0x88,0xd5,0x8e = min_u.b $w22, $w26, $w8
165
+ 0x7a,0xac,0xd9,0xce = min_u.h $w7, $w27, $w12
166
+ 0x7a,0xce,0xa2,0x0e = min_u.w $w8, $w20, $w14
167
+ 0x7a,0xef,0x76,0x8e = min_u.d $w26, $w14, $w15
168
+ 0x7b,0x1a,0x0c,0x92 = mod_s.b $w18, $w1, $w26
169
+ 0x7b,0x3c,0xf7,0xd2 = mod_s.h $w31, $w30, $w28
170
+ 0x7b,0x4d,0x30,0x92 = mod_s.w $w2, $w6, $w13
171
+ 0x7b,0x76,0xdd,0x52 = mod_s.d $w21, $w27, $w22
172
+ 0x7b,0x8d,0x3c,0x12 = mod_u.b $w16, $w7, $w13
173
+ 0x7b,0xa7,0x46,0x12 = mod_u.h $w24, $w8, $w7
174
+ 0x7b,0xd1,0x17,0x92 = mod_u.w $w30, $w2, $w17
175
+ 0x7b,0xf9,0x17,0xd2 = mod_u.d $w31, $w2, $w25
176
+ 0x79,0x0c,0x2b,0x92 = msubv.b $w14, $w5, $w12
177
+ 0x79,0x3e,0x39,0x92 = msubv.h $w6, $w7, $w30
178
+ 0x79,0x55,0x13,0x52 = msubv.w $w13, $w2, $w21
179
+ 0x79,0x7b,0x74,0x12 = msubv.d $w16, $w14, $w27
180
+ 0x78,0x0d,0x1d,0x12 = mulv.b $w20, $w3, $w13
181
+ 0x78,0x2e,0xd6,0xd2 = mulv.h $w27, $w26, $w14
182
+ 0x78,0x43,0xea,0x92 = mulv.w $w10, $w29, $w3
183
+ 0x78,0x7d,0x99,0xd2 = mulv.d $w7, $w19, $w29
184
+ 0x79,0x07,0xd9,0x54 = pckev.b $w5, $w27, $w7
185
+ 0x79,0x3b,0x20,0x54 = pckev.h $w1, $w4, $w27
186
+ 0x79,0x40,0xa7,0x94 = pckev.w $w30, $w20, $w0
187
+ 0x79,0x6f,0x09,0x94 = pckev.d $w6, $w1, $w15
188
+ 0x79,0x9e,0xe4,0x94 = pckod.b $w18, $w28, $w30
189
+ 0x79,0xa8,0x2e,0x94 = pckod.h $w26, $w5, $w8
190
+ 0x79,0xc2,0x22,0x54 = pckod.w $w9, $w4, $w2
191
+ 0x79,0xf4,0xb7,0x94 = pckod.d $w30, $w22, $w20
192
+ 0x78,0x0c,0xb9,0x54 = sld.b $w5, $w23[$12]
193
+ 0x78,0x23,0xb8,0x54 = sld.h $w1, $w23[$3]
194
+ 0x78,0x49,0x45,0x14 = sld.w $w20, $w8[$9]
195
+ 0x78,0x7e,0xb9,0xd4 = sld.d $w7, $w23[$fp]
196
+ 0x78,0x11,0x00,0xcd = sll.b $w3, $w0, $w17
197
+ 0x78,0x23,0xdc,0x4d = sll.h $w17, $w27, $w3
198
+ 0x78,0x46,0x3c,0x0d = sll.w $w16, $w7, $w6
199
+ 0x78,0x7a,0x02,0x4d = sll.d $w9, $w0, $w26
200
+ 0x78,0x81,0x0f,0x14 = splat.b $w28, $w1[$1]
201
+ 0x78,0xab,0x58,0x94 = splat.h $w2, $w11[$11]
202
+ 0x78,0xcb,0x05,0x94 = splat.w $w22, $w0[$11]
203
+ 0x78,0xe2,0x00,0x14 = splat.d $w0, $w0[$2]
204
+ 0x78,0x91,0x27,0x0d = sra.b $w28, $w4, $w17
205
+ 0x78,0xa3,0x4b,0x4d = sra.h $w13, $w9, $w3
206
+ 0x78,0xd3,0xae,0xcd = sra.w $w27, $w21, $w19
207
+ 0x78,0xf7,0x47,0x8d = sra.d $w30, $w8, $w23
208
+ 0x78,0x92,0x94,0xd5 = srar.b $w19, $w18, $w18
209
+ 0x78,0xa8,0xb9,0xd5 = srar.h $w7, $w23, $w8
210
+ 0x78,0xc2,0x60,0x55 = srar.w $w1, $w12, $w2
211
+ 0x78,0xee,0x3d,0x55 = srar.d $w21, $w7, $w14
212
+ 0x79,0x13,0x1b,0x0d = srl.b $w12, $w3, $w19
213
+ 0x79,0x34,0xfd,0xcd = srl.h $w23, $w31, $w20
214
+ 0x79,0x4b,0xdc,0x8d = srl.w $w18, $w27, $w11
215
+ 0x79,0x7a,0x60,0xcd = srl.d $w3, $w12, $w26
216
+ 0x79,0x0b,0xab,0xd5 = srlr.b $w15, $w21, $w11
217
+ 0x79,0x33,0x6d,0x55 = srlr.h $w21, $w13, $w19
218
+ 0x79,0x43,0xf1,0x95 = srlr.w $w6, $w30, $w3
219
+ 0x79,0x6e,0x10,0x55 = srlr.d $w1, $w2, $w14
220
+ 0x78,0x01,0x7e,0x51 = subs_s.b $w25, $w15, $w1
221
+ 0x78,0x36,0xcf,0x11 = subs_s.h $w28, $w25, $w22
222
+ 0x78,0x55,0x62,0x91 = subs_s.w $w10, $w12, $w21
223
+ 0x78,0x72,0xa1,0x11 = subs_s.d $w4, $w20, $w18
224
+ 0x78,0x99,0x35,0x51 = subs_u.b $w21, $w6, $w25
225
+ 0x78,0xa7,0x50,0xd1 = subs_u.h $w3, $w10, $w7
226
+ 0x78,0xca,0x7a,0x51 = subs_u.w $w9, $w15, $w10
227
+ 0x78,0xea,0x99,0xd1 = subs_u.d $w7, $w19, $w10
228
+ 0x79,0x0c,0x39,0x91 = subsus_u.b $w6, $w7, $w12
229
+ 0x79,0x33,0xe9,0x91 = subsus_u.h $w6, $w29, $w19
230
+ 0x79,0x47,0x79,0xd1 = subsus_u.w $w7, $w15, $w7
231
+ 0x79,0x6f,0x1a,0x51 = subsus_u.d $w9, $w3, $w15
232
+ 0x79,0x9f,0x1d,0x91 = subsuu_s.b $w22, $w3, $w31
233
+ 0x79,0xb6,0xbc,0xd1 = subsuu_s.h $w19, $w23, $w22
234
+ 0x79,0xcd,0x52,0x51 = subsuu_s.w $w9, $w10, $w13
235
+ 0x79,0xe0,0x31,0x51 = subsuu_s.d $w5, $w6, $w0
236
+ 0x78,0x93,0x69,0x8e = subv.b $w6, $w13, $w19
237
+ 0x78,0xac,0xc9,0x0e = subv.h $w4, $w25, $w12
238
+ 0x78,0xcb,0xde,0xce = subv.w $w27, $w27, $w11
239
+ 0x78,0xea,0xc2,0x4e = subv.d $w9, $w24, $w10
240
+ 0x78,0x05,0x80,0xd5 = vshf.b $w3, $w16, $w5
241
+ 0x78,0x28,0x9d,0x15 = vshf.h $w20, $w19, $w8
242
+ 0x78,0x59,0xf4,0x15 = vshf.w $w16, $w30, $w25
243
+ 0x78,0x6f,0x5c,0xd5 = vshf.d $w19, $w11, $w15