crabstone 3.0.3

data/test/test_xcore.rb

@@ -0,0 +1,100 @@
+#!/usr/bin/env ruby
+
+# Library by Nguyen Anh Quynh
+# Original binding by Nguyen Anh Quynh and Tan Sheng Di
+# Additional binding work by Ben Nagy
+# (c) 2013 COSEINC. All Rights Reserved.
+
+require 'crabstone'
+require 'stringio'
+
+module TestXCore
+
+  XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10\x09\xfd\xec\xa7"
+
+  include Crabstone
+  include Crabstone::XCore
+
+  @platforms = [
+    Hash[
+      'arch' => ARCH_XCORE,
+      'mode' => MODE_BIG_ENDIAN,
+      'code' => XCORE_CODE,
+      'comment' => "XCore"
+    ],
+  ]
+
+  def self.uint32 i
+    Integer(i) & 0xffffffff
+  end
+
+  def self.print_detail cs, insn, sio
+    if insn.op_count > 0
+      sio.puts "\top_count: #{insn.op_count}"
+      insn.operands.each_with_index do |op,idx|
+        case op[:type]
+        when OP_REG
+          sio.puts "\t\toperands[#{idx}].type: REG = #{cs.reg_name(op.value)}"
+        when OP_IMM
+          sio.puts "\t\toperands[#{idx}].type: IMM = 0x#{self.uint32(op.value).to_s(16)}"
+        when OP_MEM
+          sio.puts "\t\toperands[#{idx}].type: MEM"
+          if op.value[:base].nonzero?
+            sio.puts "\t\t\toperands[#{idx}].mem.base: REG = %s" % cs.reg_name(op.value[:base])
+          end
+          if op.value[:index].nonzero?
+            sio.puts "\t\t\toperands[#{idx}].mem.index: REG = %s" % cs.reg_name(op.value[:index])
+          end
+          if op.value[:disp].nonzero?
+            sio.puts "\t\t\toperands[#{idx}].mem.disp: 0x%x" % (self.uint32(op.value[:disp]))
+          end
+          if op.value[:direct] != 1
+            sio.puts "\t\t\toperands[#{idx}].mem.direct: -1"
+          end
+        end
+      end
+    end
+    sio.puts
+  end
+
+  ours = StringIO.new
+
+  begin
+    cs    = Disassembler.new(0,0)
+    print "XCore Test: Capstone v #{cs.version.join('.')} - "
+  ensure
+    cs.close
+  end
+
+  #Test through all modes and architectures
+  @platforms.each do |p|
+    ours.puts "****************"
+    ours.puts "Platform: #{p['comment']}"
+    ours.puts "Code:#{p['code'].bytes.map {|b| "0x%.2x" % b}.join(' ')} "
+    ours.puts "Disasm:"
+
+    cs    = Disassembler.new(p['arch'], p['mode'])
+    cs.decomposer = true
+    cache = nil
+
+    cs.disasm(p['code'], 0x1000).each {|insn|
+      ours.puts "0x#{insn.address.to_s(16)}:\t#{insn.mnemonic}\t#{insn.op_str}"
+      self.print_detail(cs, insn, ours)
+      cache = insn.address + insn.size
+    }
+
+    cs.close
+    ours.printf("0x%x:\n", cache)
+    ours.puts
+  end
+
+  ours.rewind
+  theirs = File.binread(__FILE__ + ".SPEC")
+  if ours.read == theirs
+    puts "#{__FILE__}: PASS"
+  else
+    ours.rewind
+    puts ours.read
+    puts "#{__FILE__}: FAIL"
+  end
+end

data/test/test_xcore.rb.SPEC

@@ -0,0 +1,75 @@
+****************
+Platform: XCore
+Code:0xfe 0x0f 0xfe 0x17 0x13 0x17 0xc6 0xfe 0xec 0x17 0x97 0xf8 0xec 0x4f 0x1f 0xfd 0xec 0x37 0x07 0xf2 0x45 0x5b 0xf9 0xfa 0x02 0x06 0x1b 0x10 0x09 0xfd 0xec 0xa7 
+Disasm:
+0x1000:	get	r11, ed
+	op_count: 2
+		operands[0].type: REG = r11
+		operands[1].type: REG = ed
+
+0x1002:	ldw	et, sp[4]
+	op_count: 2
+		operands[0].type: REG = et
+		operands[1].type: MEM
+			operands[1].mem.base: REG = sp
+			operands[1].mem.disp: 0x4
+
+0x1004:	setd	res[r3], r4
+	op_count: 2
+		operands[0].type: MEM
+			operands[0].mem.base: REG = r3
+		operands[1].type: REG = r4
+
+0x1006:	init	t[r2]:lr, r1
+	op_count: 2
+		operands[0].type: MEM
+			operands[0].mem.base: REG = r2
+			operands[0].mem.index: REG = lr
+		operands[1].type: REG = r1
+
+0x100a:	divu	r9, r1, r3
+	op_count: 3
+		operands[0].type: REG = r9
+		operands[1].type: REG = r1
+		operands[2].type: REG = r3
+
+0x100e:	lda16	r9, r3[-r11]
+	op_count: 2
+		operands[0].type: REG = r9
+		operands[1].type: MEM
+			operands[1].mem.base: REG = r3
+			operands[1].mem.index: REG = r11
+			operands[1].mem.direct: -1
+
+0x1012:	ldw	dp, dp[0x81c5]
+	op_count: 2
+		operands[0].type: REG = dp
+		operands[1].type: MEM
+			operands[1].mem.base: REG = dp
+			operands[1].mem.disp: 0x81c5
+
+0x1016:	lmul	r11, r0, r2, r5, r8, r10
+	op_count: 6
+		operands[0].type: REG = r11
+		operands[1].type: REG = r0
+		operands[2].type: REG = r2
+		operands[3].type: REG = r5
+		operands[4].type: REG = r8
+		operands[5].type: REG = r10
+
+0x101a:	add	r1, r2, r3
+	op_count: 3
+		operands[0].type: REG = r1
+		operands[1].type: REG = r2
+		operands[2].type: REG = r3
+
+0x101c:	ldaw	r8, r2[-9]
+	op_count: 2
+		operands[0].type: REG = r8
+		operands[1].type: MEM
+			operands[1].mem.base: REG = r2
+			operands[1].mem.disp: 0x9
+			operands[1].mem.direct: -1
+
+0x1020:
+

metadata

@@ -0,0 +1,393 @@
+--- !ruby/object:Gem::Specification
+name: crabstone
+version: !ruby/object:Gem::Version
+  version: 3.0.3
+platform: ruby
+authors:
+- Ben Nagy
+autorequire: 
+bindir: bin
+cert_chain: []
+date: 2017-06-06 00:00:00.000000000 Z
+dependencies:
+- !ruby/object:Gem::Dependency
+  name: ffi
+  requirement: !ruby/object:Gem::Requirement
+    requirements:
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: '0'
+  type: :runtime
+  prerelease: false
+  version_requirements: !ruby/object:Gem::Requirement
+    requirements:
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: '0'
+- !ruby/object:Gem::Dependency
+  name: test-unit
+  requirement: !ruby/object:Gem::Requirement
+    requirements:
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: '0'
+  type: :development
+  prerelease: false
+  version_requirements: !ruby/object:Gem::Requirement
+    requirements:
+    - - ">="
+      - !ruby/object:Gem::Version
+        version: '0'
+description: |2+
+
+    Capstone is a disassembly engine written by Nguyen Anh Quynh, available here
+    https://github.com/aquynh/capstone. This is the Ruby FFI binding. We test
+    against MRI 2.0.0,  2.1.0 and JRuby 1.7.8. AFAIK it works with rubinius
+    2.2.1.
+
+email: crabstone@ben.iagu.net
+executables: []
+extensions: []
+extra_rdoc_files:
+- CHANGES.md
+- README.md
+- MANIFEST
+files:
+- CHANGES.md
+- LICENSE
+- MANIFEST
+- README.md
+- Rakefile
+- bin/genconst
+- bin/genreg
+- crabstone.gemspec
+- examples/hello_world.rb
+- lib/arch/arm.rb
+- lib/arch/arm64.rb
+- lib/arch/arm64_const.rb
+- lib/arch/arm64_registers.rb
+- lib/arch/arm_const.rb
+- lib/arch/arm_registers.rb
+- lib/arch/mips.rb
+- lib/arch/mips_const.rb
+- lib/arch/mips_registers.rb
+- lib/arch/ppc.rb
+- lib/arch/ppc_const.rb
+- lib/arch/ppc_registers.rb
+- lib/arch/sparc.rb
+- lib/arch/sparc_const.rb
+- lib/arch/sparc_registers.rb
+- lib/arch/systemz.rb
+- lib/arch/sysz_const.rb
+- lib/arch/sysz_registers.rb
+- lib/arch/x86.rb
+- lib/arch/x86_const.rb
+- lib/arch/x86_registers.rb
+- lib/arch/xcore.rb
+- lib/arch/xcore_const.rb
+- lib/arch/xcore_registers.rb
+- lib/crabstone.rb
+- test/MC/AArch64/basic-a64-instructions.s.cs
+- test/MC/AArch64/gicv3-regs.s.cs
+- test/MC/AArch64/neon-2velem.s.cs
+- test/MC/AArch64/neon-3vdiff.s.cs
+- test/MC/AArch64/neon-aba-abd.s.cs
+- test/MC/AArch64/neon-across.s.cs
+- test/MC/AArch64/neon-add-pairwise.s.cs
+- test/MC/AArch64/neon-add-sub-instructions.s.cs
+- test/MC/AArch64/neon-bitwise-instructions.s.cs
+- test/MC/AArch64/neon-compare-instructions.s.cs
+- test/MC/AArch64/neon-crypto.s.cs
+- test/MC/AArch64/neon-extract.s.cs
+- test/MC/AArch64/neon-facge-facgt.s.cs
+- test/MC/AArch64/neon-frsqrt-frecp.s.cs
+- test/MC/AArch64/neon-halving-add-sub.s.cs
+- test/MC/AArch64/neon-max-min-pairwise.s.cs
+- test/MC/AArch64/neon-max-min.s.cs
+- test/MC/AArch64/neon-mla-mls-instructions.s.cs
+- test/MC/AArch64/neon-mov.s.cs
+- test/MC/AArch64/neon-mul-div-instructions.s.cs
+- test/MC/AArch64/neon-perm.s.cs
+- test/MC/AArch64/neon-rounding-halving-add.s.cs
+- test/MC/AArch64/neon-rounding-shift.s.cs
+- test/MC/AArch64/neon-saturating-add-sub.s.cs
+- test/MC/AArch64/neon-saturating-rounding-shift.s.cs
+- test/MC/AArch64/neon-saturating-shift.s.cs
+- test/MC/AArch64/neon-scalar-abs.s.cs
+- test/MC/AArch64/neon-scalar-add-sub.s.cs
+- test/MC/AArch64/neon-scalar-by-elem-mla.s.cs
+- test/MC/AArch64/neon-scalar-by-elem-mul.s.cs
+- test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs
+- test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs
+- test/MC/AArch64/neon-scalar-compare.s.cs
+- test/MC/AArch64/neon-scalar-cvt.s.cs
+- test/MC/AArch64/neon-scalar-dup.s.cs
+- test/MC/AArch64/neon-scalar-extract-narrow.s.cs
+- test/MC/AArch64/neon-scalar-fp-compare.s.cs
+- test/MC/AArch64/neon-scalar-mul.s.cs
+- test/MC/AArch64/neon-scalar-neg.s.cs
+- test/MC/AArch64/neon-scalar-recip.s.cs
+- test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs
+- test/MC/AArch64/neon-scalar-rounding-shift.s.cs
+- test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs
+- test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs
+- test/MC/AArch64/neon-scalar-saturating-shift.s.cs
+- test/MC/AArch64/neon-scalar-shift-imm.s.cs
+- test/MC/AArch64/neon-scalar-shift.s.cs
+- test/MC/AArch64/neon-shift-left-long.s.cs
+- test/MC/AArch64/neon-shift.s.cs
+- test/MC/AArch64/neon-simd-copy.s.cs
+- test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs
+- test/MC/AArch64/neon-simd-ldst-one-elem.s.cs
+- test/MC/AArch64/neon-simd-misc.s.cs
+- test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs
+- test/MC/AArch64/neon-simd-shift.s.cs
+- test/MC/AArch64/neon-tbl.s.cs
+- test/MC/AArch64/trace-regs.s.cs
+- test/MC/ARM/arm-aliases.s.cs
+- test/MC/ARM/arm-arithmetic-aliases.s.cs
+- test/MC/ARM/arm-it-block.s.cs
+- test/MC/ARM/arm-memory-instructions.s.cs
+- test/MC/ARM/arm-shift-encoding.s.cs
+- test/MC/ARM/arm-thumb-trustzone.s.cs
+- test/MC/ARM/arm-trustzone.s.cs
+- test/MC/ARM/arm_addrmode2.s.cs
+- test/MC/ARM/arm_addrmode3.s.cs
+- test/MC/ARM/arm_instructions.s.cs
+- test/MC/ARM/basic-arm-instructions-v8.s.cs
+- test/MC/ARM/basic-arm-instructions.s.cs
+- test/MC/ARM/basic-thumb-instructions.s.cs
+- test/MC/ARM/basic-thumb2-instructions-v8.s.cs
+- test/MC/ARM/basic-thumb2-instructions.s.cs
+- test/MC/ARM/crc32-thumb.s.cs
+- test/MC/ARM/crc32.s.cs
+- test/MC/ARM/dot-req.s.cs
+- test/MC/ARM/fp-armv8.s.cs
+- test/MC/ARM/idiv-thumb.s.cs
+- test/MC/ARM/idiv.s.cs
+- test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs
+- test/MC/ARM/load-store-acquire-release-v8.s.cs
+- test/MC/ARM/mode-switch.s.cs
+- test/MC/ARM/neon-abs-encoding.s.cs
+- test/MC/ARM/neon-absdiff-encoding.s.cs
+- test/MC/ARM/neon-add-encoding.s.cs
+- test/MC/ARM/neon-bitcount-encoding.s.cs
+- test/MC/ARM/neon-bitwise-encoding.s.cs
+- test/MC/ARM/neon-cmp-encoding.s.cs
+- test/MC/ARM/neon-convert-encoding.s.cs
+- test/MC/ARM/neon-crypto.s.cs
+- test/MC/ARM/neon-dup-encoding.s.cs
+- test/MC/ARM/neon-minmax-encoding.s.cs
+- test/MC/ARM/neon-mov-encoding.s.cs
+- test/MC/ARM/neon-mul-accum-encoding.s.cs
+- test/MC/ARM/neon-mul-encoding.s.cs
+- test/MC/ARM/neon-neg-encoding.s.cs
+- test/MC/ARM/neon-pairwise-encoding.s.cs
+- test/MC/ARM/neon-reciprocal-encoding.s.cs
+- test/MC/ARM/neon-reverse-encoding.s.cs
+- test/MC/ARM/neon-satshift-encoding.s.cs
+- test/MC/ARM/neon-shift-encoding.s.cs
+- test/MC/ARM/neon-shiftaccum-encoding.s.cs
+- test/MC/ARM/neon-shuffle-encoding.s.cs
+- test/MC/ARM/neon-sub-encoding.s.cs
+- test/MC/ARM/neon-table-encoding.s.cs
+- test/MC/ARM/neon-v8.s.cs
+- test/MC/ARM/neon-vld-encoding.s.cs
+- test/MC/ARM/neon-vst-encoding.s.cs
+- test/MC/ARM/neon-vswp.s.cs
+- test/MC/ARM/neont2-abs-encoding.s.cs
+- test/MC/ARM/neont2-absdiff-encoding.s.cs
+- test/MC/ARM/neont2-add-encoding.s.cs
+- test/MC/ARM/neont2-bitcount-encoding.s.cs
+- test/MC/ARM/neont2-bitwise-encoding.s.cs
+- test/MC/ARM/neont2-cmp-encoding.s.cs
+- test/MC/ARM/neont2-convert-encoding.s.cs
+- test/MC/ARM/neont2-dup-encoding.s.cs
+- test/MC/ARM/neont2-minmax-encoding.s.cs
+- test/MC/ARM/neont2-mov-encoding.s.cs
+- test/MC/ARM/neont2-mul-accum-encoding.s.cs
+- test/MC/ARM/neont2-mul-encoding.s.cs
+- test/MC/ARM/neont2-neg-encoding.s.cs
+- test/MC/ARM/neont2-pairwise-encoding.s.cs
+- test/MC/ARM/neont2-reciprocal-encoding.s.cs
+- test/MC/ARM/neont2-reverse-encoding.s.cs
+- test/MC/ARM/neont2-satshift-encoding.s.cs
+- test/MC/ARM/neont2-shift-encoding.s.cs
+- test/MC/ARM/neont2-shiftaccum-encoding.s.cs
+- test/MC/ARM/neont2-shuffle-encoding.s.cs
+- test/MC/ARM/neont2-sub-encoding.s.cs
+- test/MC/ARM/neont2-table-encoding.s.cs
+- test/MC/ARM/neont2-vld-encoding.s.cs
+- test/MC/ARM/neont2-vst-encoding.s.cs
+- test/MC/ARM/simple-fp-encoding.s.cs
+- test/MC/ARM/thumb-fp-armv8.s.cs
+- test/MC/ARM/thumb-hints.s.cs
+- test/MC/ARM/thumb-neon-crypto.s.cs
+- test/MC/ARM/thumb-neon-v8.s.cs
+- test/MC/ARM/thumb-shift-encoding.s.cs
+- test/MC/ARM/thumb.s.cs
+- test/MC/ARM/thumb2-b.w-encodingT4.s.cs
+- test/MC/ARM/thumb2-branches.s.cs
+- test/MC/ARM/thumb2-mclass.s.cs
+- test/MC/ARM/thumb2-narrow-dp.ll.cs
+- test/MC/ARM/thumb2-pldw.s.cs
+- test/MC/ARM/vfp4-thumb.s.cs
+- test/MC/ARM/vfp4.s.cs
+- test/MC/ARM/vpush-vpop-thumb.s.cs
+- test/MC/ARM/vpush-vpop.s.cs
+- test/MC/Mips/hilo-addressing.s.cs
+- test/MC/Mips/micromips-alu-instructions-EB.s.cs
+- test/MC/Mips/micromips-alu-instructions.s.cs
+- test/MC/Mips/micromips-branch-instructions-EB.s.cs
+- test/MC/Mips/micromips-branch-instructions.s.cs
+- test/MC/Mips/micromips-expansions.s.cs
+- test/MC/Mips/micromips-jump-instructions-EB.s.cs
+- test/MC/Mips/micromips-jump-instructions.s.cs
+- test/MC/Mips/micromips-loadstore-instructions-EB.s.cs
+- test/MC/Mips/micromips-loadstore-instructions.s.cs
+- test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs
+- test/MC/Mips/micromips-loadstore-unaligned.s.cs
+- test/MC/Mips/micromips-movcond-instructions-EB.s.cs
+- test/MC/Mips/micromips-movcond-instructions.s.cs
+- test/MC/Mips/micromips-multiply-instructions-EB.s.cs
+- test/MC/Mips/micromips-multiply-instructions.s.cs
+- test/MC/Mips/micromips-shift-instructions-EB.s.cs
+- test/MC/Mips/micromips-shift-instructions.s.cs
+- test/MC/Mips/micromips-trap-instructions-EB.s.cs
+- test/MC/Mips/micromips-trap-instructions.s.cs
+- test/MC/Mips/mips-alu-instructions.s.cs
+- test/MC/Mips/mips-control-instructions-64.s.cs
+- test/MC/Mips/mips-control-instructions.s.cs
+- test/MC/Mips/mips-coprocessor-encodings.s.cs
+- test/MC/Mips/mips-dsp-instructions.s.cs
+- test/MC/Mips/mips-expansions.s.cs
+- test/MC/Mips/mips-fpu-instructions.s.cs
+- test/MC/Mips/mips-jump-instructions.s.cs
+- test/MC/Mips/mips-memory-instructions.s.cs
+- test/MC/Mips/mips-register-names.s.cs
+- test/MC/Mips/mips64-alu-instructions.s.cs
+- test/MC/Mips/mips64-instructions.s.cs
+- test/MC/Mips/mips64-register-names.s.cs
+- test/MC/Mips/mips_directives.s.cs
+- test/MC/Mips/nabi-regs.s.cs
+- test/MC/Mips/set-at-directive.s.cs
+- test/MC/Mips/test_2r.s.cs
+- test/MC/Mips/test_2rf.s.cs
+- test/MC/Mips/test_3r.s.cs
+- test/MC/Mips/test_3rf.s.cs
+- test/MC/Mips/test_bit.s.cs
+- test/MC/Mips/test_cbranch.s.cs
+- test/MC/Mips/test_ctrlregs.s.cs
+- test/MC/Mips/test_elm.s.cs
+- test/MC/Mips/test_elm_insert.s.cs
+- test/MC/Mips/test_elm_insve.s.cs
+- test/MC/Mips/test_i10.s.cs
+- test/MC/Mips/test_i5.s.cs
+- test/MC/Mips/test_i8.s.cs
+- test/MC/Mips/test_lsa.s.cs
+- test/MC/Mips/test_mi10.s.cs
+- test/MC/Mips/test_vec.s.cs
+- test/MC/PowerPC/ppc64-encoding-bookII.s.cs
+- test/MC/PowerPC/ppc64-encoding-bookIII.s.cs
+- test/MC/PowerPC/ppc64-encoding-ext.s.cs
+- test/MC/PowerPC/ppc64-encoding-fp.s.cs
+- test/MC/PowerPC/ppc64-encoding-vmx.s.cs
+- test/MC/PowerPC/ppc64-encoding.s.cs
+- test/MC/PowerPC/ppc64-operands.s.cs
+- test/MC/README
+- test/MC/Sparc/sparc-alu-instructions.s.cs
+- test/MC/Sparc/sparc-atomic-instructions.s.cs
+- test/MC/Sparc/sparc-ctrl-instructions.s.cs
+- test/MC/Sparc/sparc-fp-instructions.s.cs
+- test/MC/Sparc/sparc-mem-instructions.s.cs
+- test/MC/Sparc/sparc-vis.s.cs
+- test/MC/Sparc/sparc64-alu-instructions.s.cs
+- test/MC/Sparc/sparc64-ctrl-instructions.s.cs
+- test/MC/Sparc/sparcv8-instructions.s.cs
+- test/MC/Sparc/sparcv9-instructions.s.cs
+- test/MC/SystemZ/insn-good-z196.s.cs
+- test/MC/SystemZ/insn-good.s.cs
+- test/MC/SystemZ/regs-good.s.cs
+- test/MC/X86/3DNow.s.cs
+- test/MC/X86/address-size.s.cs
+- test/MC/X86/avx512-encodings.s.cs
+- test/MC/X86/intel-syntax-encoding.s.cs
+- test/MC/X86/x86-32-avx.s.cs
+- test/MC/X86/x86-32-fma3.s.cs
+- test/MC/X86/x86-32-ms-inline-asm.s.cs
+- test/MC/X86/x86_64-avx-clmul-encoding.s.cs
+- test/MC/X86/x86_64-avx-encoding.s.cs
+- test/MC/X86/x86_64-bmi-encoding.s.cs
+- test/MC/X86/x86_64-encoding.s.cs
+- test/MC/X86/x86_64-fma3-encoding.s.cs
+- test/MC/X86/x86_64-fma4-encoding.s.cs
+- test/MC/X86/x86_64-hle-encoding.s.cs
+- test/MC/X86/x86_64-imm-widths.s.cs
+- test/MC/X86/x86_64-rand-encoding.s.cs
+- test/MC/X86/x86_64-rtm-encoding.s.cs
+- test/MC/X86/x86_64-sse4a.s.cs
+- test/MC/X86/x86_64-tbm-encoding.s.cs
+- test/MC/X86/x86_64-xop-encoding.s.cs
+- test/README
+- test/test.rb
+- test/test.rb.SPEC
+- test/test_arm.rb
+- test/test_arm.rb.SPEC
+- test/test_arm64.rb
+- test/test_arm64.rb.SPEC
+- test/test_detail.rb
+- test/test_detail.rb.SPEC
+- test/test_exhaustive.rb
+- test/test_mips.rb
+- test/test_mips.rb.SPEC
+- test/test_ppc.rb
+- test/test_ppc.rb.SPEC
+- test/test_sanity.rb
+- test/test_skipdata.rb
+- test/test_skipdata.rb.SPEC
+- test/test_sparc.rb
+- test/test_sparc.rb.SPEC
+- test/test_sysz.rb
+- test/test_sysz.rb.SPEC
+- test/test_x86.rb
+- test/test_x86.rb.SPEC
+- test/test_xcore.rb
+- test/test_xcore.rb.SPEC
+homepage: https://github.com/bnagy/crabstone
+licenses:
+- BSD
+metadata: {}
+post_install_message: 
+rdoc_options: []
+require_paths:
+- lib
+required_ruby_version: !ruby/object:Gem::Requirement
+  requirements:
+  - - ">="
+    - !ruby/object:Gem::Version
+      version: '0'
+required_rubygems_version: !ruby/object:Gem::Requirement
+  requirements:
+  - - ">="
+    - !ruby/object:Gem::Version
+      version: '0'
+requirements: []
+rubyforge_project: 
+rubygems_version: 2.5.2
+signing_key: 
+specification_version: 4
+summary: Ruby FFI bindings for the capstone disassembly engine
+test_files:
+- test/test_arm64.rb
+- test/test_detail.rb
+- test/test_xcore.rb
+- test/test_x86.rb
+- test/test.rb
+- test/test_sanity.rb
+- test/test_exhaustive.rb
+- test/test_sysz.rb
+- test/test_ppc.rb
+- test/test_mips.rb
+- test/test_sparc.rb
+- test/test_skipdata.rb
+- test/test_arm.rb