crabstone 3.0.3

data/lib/arch/ppc_registers.rb

@@ -0,0 +1,209 @@
+# Library by Nguyen Anh Quynh
+# Original binding by Nguyen Anh Quynh and Tan Sheng Di
+# Additional binding work by Ben Nagy
+# (c) 2013 COSEINC. All Rights Reserved.
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+# Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
+# 2015-05-02T13:24:07+12:00
+
+module Crabstone
+  module PPC
+    REG_LOOKUP = {
+      'INVALID' => 0,
+      'CARRY' => 1,
+      'CC' => 2,
+      'CR0' => 3,
+      'CR1' => 4,
+      'CR2' => 5,
+      'CR3' => 6,
+      'CR4' => 7,
+      'CR5' => 8,
+      'CR6' => 9,
+      'CR7' => 10,
+      'CTR' => 11,
+      'F0' => 12,
+      'F1' => 13,
+      'F2' => 14,
+      'F3' => 15,
+      'F4' => 16,
+      'F5' => 17,
+      'F6' => 18,
+      'F7' => 19,
+      'F8' => 20,
+      'F9' => 21,
+      'F10' => 22,
+      'F11' => 23,
+      'F12' => 24,
+      'F13' => 25,
+      'F14' => 26,
+      'F15' => 27,
+      'F16' => 28,
+      'F17' => 29,
+      'F18' => 30,
+      'F19' => 31,
+      'F20' => 32,
+      'F21' => 33,
+      'F22' => 34,
+      'F23' => 35,
+      'F24' => 36,
+      'F25' => 37,
+      'F26' => 38,
+      'F27' => 39,
+      'F28' => 40,
+      'F29' => 41,
+      'F30' => 42,
+      'F31' => 43,
+      'LR' => 44,
+      'R0' => 45,
+      'R1' => 46,
+      'R2' => 47,
+      'R3' => 48,
+      'R4' => 49,
+      'R5' => 50,
+      'R6' => 51,
+      'R7' => 52,
+      'R8' => 53,
+      'R9' => 54,
+      'R10' => 55,
+      'R11' => 56,
+      'R12' => 57,
+      'R13' => 58,
+      'R14' => 59,
+      'R15' => 60,
+      'R16' => 61,
+      'R17' => 62,
+      'R18' => 63,
+      'R19' => 64,
+      'R20' => 65,
+      'R21' => 66,
+      'R22' => 67,
+      'R23' => 68,
+      'R24' => 69,
+      'R25' => 70,
+      'R26' => 71,
+      'R27' => 72,
+      'R28' => 73,
+      'R29' => 74,
+      'R30' => 75,
+      'R31' => 76,
+      'V0' => 77,
+      'V1' => 78,
+      'V2' => 79,
+      'V3' => 80,
+      'V4' => 81,
+      'V5' => 82,
+      'V6' => 83,
+      'V7' => 84,
+      'V8' => 85,
+      'V9' => 86,
+      'V10' => 87,
+      'V11' => 88,
+      'V12' => 89,
+      'V13' => 90,
+      'V14' => 91,
+      'V15' => 92,
+      'V16' => 93,
+      'V17' => 94,
+      'V18' => 95,
+      'V19' => 96,
+      'V20' => 97,
+      'V21' => 98,
+      'V22' => 99,
+      'V23' => 100,
+      'V24' => 101,
+      'V25' => 102,
+      'V26' => 103,
+      'V27' => 104,
+      'V28' => 105,
+      'V29' => 106,
+      'V30' => 107,
+      'V31' => 108,
+      'VRSAVE' => 109,
+      'VS0' => 110,
+      'VS1' => 111,
+      'VS2' => 112,
+      'VS3' => 113,
+      'VS4' => 114,
+      'VS5' => 115,
+      'VS6' => 116,
+      'VS7' => 117,
+      'VS8' => 118,
+      'VS9' => 119,
+      'VS10' => 120,
+      'VS11' => 121,
+      'VS12' => 122,
+      'VS13' => 123,
+      'VS14' => 124,
+      'VS15' => 125,
+      'VS16' => 126,
+      'VS17' => 127,
+      'VS18' => 128,
+      'VS19' => 129,
+      'VS20' => 130,
+      'VS21' => 131,
+      'VS22' => 132,
+      'VS23' => 133,
+      'VS24' => 134,
+      'VS25' => 135,
+      'VS26' => 136,
+      'VS27' => 137,
+      'VS28' => 138,
+      'VS29' => 139,
+      'VS30' => 140,
+      'VS31' => 141,
+      'VS32' => 142,
+      'VS33' => 143,
+      'VS34' => 144,
+      'VS35' => 145,
+      'VS36' => 146,
+      'VS37' => 147,
+      'VS38' => 148,
+      'VS39' => 149,
+      'VS40' => 150,
+      'VS41' => 151,
+      'VS42' => 152,
+      'VS43' => 153,
+      'VS44' => 154,
+      'VS45' => 155,
+      'VS46' => 156,
+      'VS47' => 157,
+      'VS48' => 158,
+      'VS49' => 159,
+      'VS50' => 160,
+      'VS51' => 161,
+      'VS52' => 162,
+      'VS53' => 163,
+      'VS54' => 164,
+      'VS55' => 165,
+      'VS56' => 166,
+      'VS57' => 167,
+      'VS58' => 168,
+      'VS59' => 169,
+      'VS60' => 170,
+      'VS61' => 171,
+      'VS62' => 172,
+      'VS63' => 173,
+      'RM' => 174,
+      'CTR8' => 175,
+      'LR8' => 176,
+      'CR1EQ' => 177
+    }
+
+    ID_LOOKUP = REG_LOOKUP.invert
+
+    # alias registers
+
+    SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
+
+    def self.register reg
+      return reg if ID_LOOKUP[reg]
+      return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
+      if reg.respond_to? :upcase
+        return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
+      end
+      REG_LOOKUP['INVALID']
+    end
+
+  end
+end

data/lib/arch/sparc.rb

@@ -0,0 +1,79 @@
+# Library by Nguyen Anh Quynh
+# Original binding by Nguyen Anh Quynh and Tan Sheng Di
+# Additional binding work by Ben Nagy
+# (c) 2013 COSEINC. All Rights Reserved.
+
+require 'ffi'
+
+require_relative 'sparc_const'
+
+module Crabstone
+    module Sparc
+
+        class MemoryOperand < FFI::Struct
+            layout(
+                :base, :uint8,
+                :index, :uint8,
+                :disp, :int32
+            )
+        end
+
+        class OperandValue < FFI::Union
+            layout(
+                :reg, :uint,
+                :imm, :int32,
+                :mem, MemoryOperand
+            )
+        end
+
+        class Operand < FFI::Struct
+            layout(
+                :type, :uint,
+                :value, OperandValue
+            )
+
+            def value
+                case self[:type]
+                when OP_REG
+                    self[:value][:reg]
+                when OP_IMM
+                    self[:value][:imm]
+                when OP_MEM
+                    self[:value][:mem]
+                else
+                    nil
+                end
+            end
+
+            def reg?
+                self[:type] == OP_REG
+            end
+
+            def imm?
+                self[:type] == OP_IMM
+            end
+
+            def mem?
+                self[:type] == OP_MEM
+            end
+
+            def valid?
+                [OP_MEM, OP_IMM, OP_REG].include? self[:type]
+            end
+        end
+
+        class Instruction < FFI::Struct
+            layout(
+                :cc, :uint,
+                :hint, :uint,
+                :op_count, :uint8,
+                :operands, [Operand, 4],
+            )
+
+            def operands
+                self[:operands].take_while {|op| op[:type].nonzero?}
+            end
+
+        end
+    end
+end

data/lib/arch/sparc_const.rb

@@ -0,0 +1,461 @@
+# Library by Nguyen Anh Quynh
+# Original binding by Nguyen Anh Quynh and Tan Sheng Di
+# Additional binding work by Ben Nagy
+# (c) 2013 COSEINC. All Rights Reserved.
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
+# 2015-05-02T13:24:01+12:00
+
+module Crabstone
+  module Sparc
+
+    # Enums corresponding to Sparc condition codes, both icc's and fcc's.
+    
+    CC_INVALID = 0
+    
+    # Integer condition codes
+    CC_ICC_A = 8+256
+    CC_ICC_N = 0+256
+    CC_ICC_NE = 9+256
+    CC_ICC_E = 1+256
+    CC_ICC_G = 10+256
+    CC_ICC_LE = 2+256
+    CC_ICC_GE = 11+256
+    CC_ICC_L = 3+256
+    CC_ICC_GU = 12+256
+    CC_ICC_LEU = 4+256
+    CC_ICC_CC = 13+256
+    CC_ICC_CS = 5+256
+    CC_ICC_POS = 14+256
+    CC_ICC_NEG = 6+256
+    CC_ICC_VC = 15+256
+    CC_ICC_VS = 7+256
+    
+    # Floating condition codes
+    CC_FCC_A = 8+16+256
+    CC_FCC_N = 0+16+256
+    CC_FCC_U = 7+16+256
+    CC_FCC_G = 6+16+256
+    CC_FCC_UG = 5+16+256
+    CC_FCC_L = 4+16+256
+    CC_FCC_UL = 3+16+256
+    CC_FCC_LG = 2+16+256
+    CC_FCC_NE = 1+16+256
+    CC_FCC_E = 9+16+256
+    CC_FCC_UE = 10+16+256
+    CC_FCC_GE = 11+16+256
+    CC_FCC_UGE = 12+16+256
+    CC_FCC_LE = 13+16+256
+    CC_FCC_ULE = 14+16+256
+    CC_FCC_O = 15+16+256
+    
+    # Branch hint
+    
+    HINT_INVALID = 0
+    HINT_A = 1<<0
+    HINT_PT = 1<<1
+    HINT_PN = 1<<2
+    
+    # Operand type for instruction's operands
+    
+    OP_INVALID = 0
+    OP_REG = 1
+    OP_IMM = 2
+    OP_MEM = 3
+    
+    # SPARC registers
+    
+    REG_INVALID = 0
+    REG_F0 = 1
+    REG_F1 = 2
+    REG_F2 = 3
+    REG_F3 = 4
+    REG_F4 = 5
+    REG_F5 = 6
+    REG_F6 = 7
+    REG_F7 = 8
+    REG_F8 = 9
+    REG_F9 = 10
+    REG_F10 = 11
+    REG_F11 = 12
+    REG_F12 = 13
+    REG_F13 = 14
+    REG_F14 = 15
+    REG_F15 = 16
+    REG_F16 = 17
+    REG_F17 = 18
+    REG_F18 = 19
+    REG_F19 = 20
+    REG_F20 = 21
+    REG_F21 = 22
+    REG_F22 = 23
+    REG_F23 = 24
+    REG_F24 = 25
+    REG_F25 = 26
+    REG_F26 = 27
+    REG_F27 = 28
+    REG_F28 = 29
+    REG_F29 = 30
+    REG_F30 = 31
+    REG_F31 = 32
+    REG_F32 = 33
+    REG_F34 = 34
+    REG_F36 = 35
+    REG_F38 = 36
+    REG_F40 = 37
+    REG_F42 = 38
+    REG_F44 = 39
+    REG_F46 = 40
+    REG_F48 = 41
+    REG_F50 = 42
+    REG_F52 = 43
+    REG_F54 = 44
+    REG_F56 = 45
+    REG_F58 = 46
+    REG_F60 = 47
+    REG_F62 = 48
+    REG_FCC0 = 49
+    REG_FCC1 = 50
+    REG_FCC2 = 51
+    REG_FCC3 = 52
+    REG_FP = 53
+    REG_G0 = 54
+    REG_G1 = 55
+    REG_G2 = 56
+    REG_G3 = 57
+    REG_G4 = 58
+    REG_G5 = 59
+    REG_G6 = 60
+    REG_G7 = 61
+    REG_I0 = 62
+    REG_I1 = 63
+    REG_I2 = 64
+    REG_I3 = 65
+    REG_I4 = 66
+    REG_I5 = 67
+    REG_I7 = 68
+    REG_ICC = 69
+    REG_L0 = 70
+    REG_L1 = 71
+    REG_L2 = 72
+    REG_L3 = 73
+    REG_L4 = 74
+    REG_L5 = 75
+    REG_L6 = 76
+    REG_L7 = 77
+    REG_O0 = 78
+    REG_O1 = 79
+    REG_O2 = 80
+    REG_O3 = 81
+    REG_O4 = 82
+    REG_O5 = 83
+    REG_O7 = 84
+    REG_SP = 85
+    REG_Y = 86
+    REG_XCC = 87
+    REG_ENDING = 88
+    REG_O6 = REG_SP
+    REG_I6 = REG_FP
+    
+    # SPARC instruction
+    
+    INS_INVALID = 0
+    INS_ADDCC = 1
+    INS_ADDX = 2
+    INS_ADDXCC = 3
+    INS_ADDXC = 4
+    INS_ADDXCCC = 5
+    INS_ADD = 6
+    INS_ALIGNADDR = 7
+    INS_ALIGNADDRL = 8
+    INS_ANDCC = 9
+    INS_ANDNCC = 10
+    INS_ANDN = 11
+    INS_AND = 12
+    INS_ARRAY16 = 13
+    INS_ARRAY32 = 14
+    INS_ARRAY8 = 15
+    INS_B = 16
+    INS_JMP = 17
+    INS_BMASK = 18
+    INS_FB = 19
+    INS_BRGEZ = 20
+    INS_BRGZ = 21
+    INS_BRLEZ = 22
+    INS_BRLZ = 23
+    INS_BRNZ = 24
+    INS_BRZ = 25
+    INS_BSHUFFLE = 26
+    INS_CALL = 27
+    INS_CASX = 28
+    INS_CAS = 29
+    INS_CMASK16 = 30
+    INS_CMASK32 = 31
+    INS_CMASK8 = 32
+    INS_CMP = 33
+    INS_EDGE16 = 34
+    INS_EDGE16L = 35
+    INS_EDGE16LN = 36
+    INS_EDGE16N = 37
+    INS_EDGE32 = 38
+    INS_EDGE32L = 39
+    INS_EDGE32LN = 40
+    INS_EDGE32N = 41
+    INS_EDGE8 = 42
+    INS_EDGE8L = 43
+    INS_EDGE8LN = 44
+    INS_EDGE8N = 45
+    INS_FABSD = 46
+    INS_FABSQ = 47
+    INS_FABSS = 48
+    INS_FADDD = 49
+    INS_FADDQ = 50
+    INS_FADDS = 51
+    INS_FALIGNDATA = 52
+    INS_FAND = 53
+    INS_FANDNOT1 = 54
+    INS_FANDNOT1S = 55
+    INS_FANDNOT2 = 56
+    INS_FANDNOT2S = 57
+    INS_FANDS = 58
+    INS_FCHKSM16 = 59
+    INS_FCMPD = 60
+    INS_FCMPEQ16 = 61
+    INS_FCMPEQ32 = 62
+    INS_FCMPGT16 = 63
+    INS_FCMPGT32 = 64
+    INS_FCMPLE16 = 65
+    INS_FCMPLE32 = 66
+    INS_FCMPNE16 = 67
+    INS_FCMPNE32 = 68
+    INS_FCMPQ = 69
+    INS_FCMPS = 70
+    INS_FDIVD = 71
+    INS_FDIVQ = 72
+    INS_FDIVS = 73
+    INS_FDMULQ = 74
+    INS_FDTOI = 75
+    INS_FDTOQ = 76
+    INS_FDTOS = 77
+    INS_FDTOX = 78
+    INS_FEXPAND = 79
+    INS_FHADDD = 80
+    INS_FHADDS = 81
+    INS_FHSUBD = 82
+    INS_FHSUBS = 83
+    INS_FITOD = 84
+    INS_FITOQ = 85
+    INS_FITOS = 86
+    INS_FLCMPD = 87
+    INS_FLCMPS = 88
+    INS_FLUSHW = 89
+    INS_FMEAN16 = 90
+    INS_FMOVD = 91
+    INS_FMOVQ = 92
+    INS_FMOVRDGEZ = 93
+    INS_FMOVRQGEZ = 94
+    INS_FMOVRSGEZ = 95
+    INS_FMOVRDGZ = 96
+    INS_FMOVRQGZ = 97
+    INS_FMOVRSGZ = 98
+    INS_FMOVRDLEZ = 99
+    INS_FMOVRQLEZ = 100
+    INS_FMOVRSLEZ = 101
+    INS_FMOVRDLZ = 102
+    INS_FMOVRQLZ = 103
+    INS_FMOVRSLZ = 104
+    INS_FMOVRDNZ = 105
+    INS_FMOVRQNZ = 106
+    INS_FMOVRSNZ = 107
+    INS_FMOVRDZ = 108
+    INS_FMOVRQZ = 109
+    INS_FMOVRSZ = 110
+    INS_FMOVS = 111
+    INS_FMUL8SUX16 = 112
+    INS_FMUL8ULX16 = 113
+    INS_FMUL8X16 = 114
+    INS_FMUL8X16AL = 115
+    INS_FMUL8X16AU = 116
+    INS_FMULD = 117
+    INS_FMULD8SUX16 = 118
+    INS_FMULD8ULX16 = 119
+    INS_FMULQ = 120
+    INS_FMULS = 121
+    INS_FNADDD = 122
+    INS_FNADDS = 123
+    INS_FNAND = 124
+    INS_FNANDS = 125
+    INS_FNEGD = 126
+    INS_FNEGQ = 127
+    INS_FNEGS = 128
+    INS_FNHADDD = 129
+    INS_FNHADDS = 130
+    INS_FNOR = 131
+    INS_FNORS = 132
+    INS_FNOT1 = 133
+    INS_FNOT1S = 134
+    INS_FNOT2 = 135
+    INS_FNOT2S = 136
+    INS_FONE = 137
+    INS_FONES = 138
+    INS_FOR = 139
+    INS_FORNOT1 = 140
+    INS_FORNOT1S = 141
+    INS_FORNOT2 = 142
+    INS_FORNOT2S = 143
+    INS_FORS = 144
+    INS_FPACK16 = 145
+    INS_FPACK32 = 146
+    INS_FPACKFIX = 147
+    INS_FPADD16 = 148
+    INS_FPADD16S = 149
+    INS_FPADD32 = 150
+    INS_FPADD32S = 151
+    INS_FPADD64 = 152
+    INS_FPMERGE = 153
+    INS_FPSUB16 = 154
+    INS_FPSUB16S = 155
+    INS_FPSUB32 = 156
+    INS_FPSUB32S = 157
+    INS_FQTOD = 158
+    INS_FQTOI = 159
+    INS_FQTOS = 160
+    INS_FQTOX = 161
+    INS_FSLAS16 = 162
+    INS_FSLAS32 = 163
+    INS_FSLL16 = 164
+    INS_FSLL32 = 165
+    INS_FSMULD = 166
+    INS_FSQRTD = 167
+    INS_FSQRTQ = 168
+    INS_FSQRTS = 169
+    INS_FSRA16 = 170
+    INS_FSRA32 = 171
+    INS_FSRC1 = 172
+    INS_FSRC1S = 173
+    INS_FSRC2 = 174
+    INS_FSRC2S = 175
+    INS_FSRL16 = 176
+    INS_FSRL32 = 177
+    INS_FSTOD = 178
+    INS_FSTOI = 179
+    INS_FSTOQ = 180
+    INS_FSTOX = 181
+    INS_FSUBD = 182
+    INS_FSUBQ = 183
+    INS_FSUBS = 184
+    INS_FXNOR = 185
+    INS_FXNORS = 186
+    INS_FXOR = 187
+    INS_FXORS = 188
+    INS_FXTOD = 189
+    INS_FXTOQ = 190
+    INS_FXTOS = 191
+    INS_FZERO = 192
+    INS_FZEROS = 193
+    INS_JMPL = 194
+    INS_LDD = 195
+    INS_LD = 196
+    INS_LDQ = 197
+    INS_LDSB = 198
+    INS_LDSH = 199
+    INS_LDSW = 200
+    INS_LDUB = 201
+    INS_LDUH = 202
+    INS_LDX = 203
+    INS_LZCNT = 204
+    INS_MEMBAR = 205
+    INS_MOVDTOX = 206
+    INS_MOV = 207
+    INS_MOVRGEZ = 208
+    INS_MOVRGZ = 209
+    INS_MOVRLEZ = 210
+    INS_MOVRLZ = 211
+    INS_MOVRNZ = 212
+    INS_MOVRZ = 213
+    INS_MOVSTOSW = 214
+    INS_MOVSTOUW = 215
+    INS_MULX = 216
+    INS_NOP = 217
+    INS_ORCC = 218
+    INS_ORNCC = 219
+    INS_ORN = 220
+    INS_OR = 221
+    INS_PDIST = 222
+    INS_PDISTN = 223
+    INS_POPC = 224
+    INS_RD = 225
+    INS_RESTORE = 226
+    INS_RETT = 227
+    INS_SAVE = 228
+    INS_SDIVCC = 229
+    INS_SDIVX = 230
+    INS_SDIV = 231
+    INS_SETHI = 232
+    INS_SHUTDOWN = 233
+    INS_SIAM = 234
+    INS_SLLX = 235
+    INS_SLL = 236
+    INS_SMULCC = 237
+    INS_SMUL = 238
+    INS_SRAX = 239
+    INS_SRA = 240
+    INS_SRLX = 241
+    INS_SRL = 242
+    INS_STBAR = 243
+    INS_STB = 244
+    INS_STD = 245
+    INS_ST = 246
+    INS_STH = 247
+    INS_STQ = 248
+    INS_STX = 249
+    INS_SUBCC = 250
+    INS_SUBX = 251
+    INS_SUBXCC = 252
+    INS_SUB = 253
+    INS_SWAP = 254
+    INS_TADDCCTV = 255
+    INS_TADDCC = 256
+    INS_T = 257
+    INS_TSUBCCTV = 258
+    INS_TSUBCC = 259
+    INS_UDIVCC = 260
+    INS_UDIVX = 261
+    INS_UDIV = 262
+    INS_UMULCC = 263
+    INS_UMULXHI = 264
+    INS_UMUL = 265
+    INS_UNIMP = 266
+    INS_FCMPED = 267
+    INS_FCMPEQ = 268
+    INS_FCMPES = 269
+    INS_WR = 270
+    INS_XMULX = 271
+    INS_XMULXHI = 272
+    INS_XNORCC = 273
+    INS_XNOR = 274
+    INS_XORCC = 275
+    INS_XOR = 276
+    INS_RET = 277
+    INS_RETL = 278
+    INS_ENDING = 279
+    
+    # Group of SPARC instructions
+    
+    GRP_INVALID = 0
+    
+    # Generic groups
+    GRP_JUMP = 1
+    
+    # Architecture-specific groups
+    GRP_HARDQUAD = 128
+    GRP_V9 = 129
+    GRP_VIS = 130
+    GRP_VIS2 = 131
+    GRP_VIS3 = 132
+    GRP_32BIT = 133
+    GRP_64BIT = 134
+    GRP_ENDING = 135
+  end
+end