crabstone 3.0.3

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Files changed (302) hide show
  1. checksums.yaml +7 -0
  2. data/CHANGES.md +61 -0
  3. data/LICENSE +25 -0
  4. data/MANIFEST +312 -0
  5. data/README.md +103 -0
  6. data/Rakefile +27 -0
  7. data/bin/genconst +66 -0
  8. data/bin/genreg +99 -0
  9. data/crabstone.gemspec +27 -0
  10. data/examples/hello_world.rb +43 -0
  11. data/lib/arch/arm.rb +128 -0
  12. data/lib/arch/arm64.rb +167 -0
  13. data/lib/arch/arm64_const.rb +1055 -0
  14. data/lib/arch/arm64_registers.rb +295 -0
  15. data/lib/arch/arm_const.rb +777 -0
  16. data/lib/arch/arm_registers.rb +149 -0
  17. data/lib/arch/mips.rb +78 -0
  18. data/lib/arch/mips_const.rb +850 -0
  19. data/lib/arch/mips_registers.rb +208 -0
  20. data/lib/arch/ppc.rb +90 -0
  21. data/lib/arch/ppc_const.rb +1181 -0
  22. data/lib/arch/ppc_registers.rb +209 -0
  23. data/lib/arch/sparc.rb +79 -0
  24. data/lib/arch/sparc_const.rb +461 -0
  25. data/lib/arch/sparc_registers.rb +121 -0
  26. data/lib/arch/systemz.rb +79 -0
  27. data/lib/arch/sysz_const.rb +779 -0
  28. data/lib/arch/sysz_registers.rb +66 -0
  29. data/lib/arch/x86.rb +107 -0
  30. data/lib/arch/x86_const.rb +1698 -0
  31. data/lib/arch/x86_registers.rb +265 -0
  32. data/lib/arch/xcore.rb +78 -0
  33. data/lib/arch/xcore_const.rb +185 -0
  34. data/lib/arch/xcore_registers.rb +57 -0
  35. data/lib/crabstone.rb +564 -0
  36. data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
  37. data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
  38. data/test/MC/AArch64/neon-2velem.s.cs +113 -0
  39. data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
  40. data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
  41. data/test/MC/AArch64/neon-across.s.cs +40 -0
  42. data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
  43. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
  44. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
  45. data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
  46. data/test/MC/AArch64/neon-crypto.s.cs +15 -0
  47. data/test/MC/AArch64/neon-extract.s.cs +3 -0
  48. data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
  49. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
  50. data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
  51. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
  52. data/test/MC/AArch64/neon-max-min.s.cs +37 -0
  53. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
  54. data/test/MC/AArch64/neon-mov.s.cs +74 -0
  55. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
  56. data/test/MC/AArch64/neon-perm.s.cs +43 -0
  57. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
  58. data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
  59. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
  60. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
  61. data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
  62. data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
  63. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
  64. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
  65. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
  66. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
  67. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
  68. data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
  69. data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
  70. data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
  71. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
  72. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
  73. data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
  74. data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
  75. data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
  76. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
  77. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
  78. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
  79. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
  80. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
  81. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
  82. data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
  83. data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
  84. data/test/MC/AArch64/neon-shift.s.cs +22 -0
  85. data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
  86. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
  87. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
  88. data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
  89. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
  90. data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
  91. data/test/MC/AArch64/neon-tbl.s.cs +21 -0
  92. data/test/MC/AArch64/trace-regs.s.cs +383 -0
  93. data/test/MC/ARM/arm-aliases.s.cs +7 -0
  94. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
  95. data/test/MC/ARM/arm-it-block.s.cs +2 -0
  96. data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
  97. data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
  98. data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
  99. data/test/MC/ARM/arm-trustzone.s.cs +3 -0
  100. data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
  101. data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
  102. data/test/MC/ARM/arm_instructions.s.cs +25 -0
  103. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
  104. data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
  105. data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
  106. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
  107. data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
  108. data/test/MC/ARM/crc32-thumb.s.cs +7 -0
  109. data/test/MC/ARM/crc32.s.cs +7 -0
  110. data/test/MC/ARM/dot-req.s.cs +3 -0
  111. data/test/MC/ARM/fp-armv8.s.cs +52 -0
  112. data/test/MC/ARM/idiv-thumb.s.cs +3 -0
  113. data/test/MC/ARM/idiv.s.cs +3 -0
  114. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
  115. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
  116. data/test/MC/ARM/mode-switch.s.cs +7 -0
  117. data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
  118. data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
  119. data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
  120. data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
  121. data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
  122. data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
  123. data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
  124. data/test/MC/ARM/neon-crypto.s.cs +16 -0
  125. data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
  126. data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
  127. data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
  128. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
  129. data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
  130. data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
  131. data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
  132. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
  133. data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
  134. data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
  135. data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
  136. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
  137. data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
  138. data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
  139. data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
  140. data/test/MC/ARM/neon-v8.s.cs +38 -0
  141. data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
  142. data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
  143. data/test/MC/ARM/neon-vswp.s.cs +3 -0
  144. data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
  145. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
  146. data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
  147. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
  148. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
  149. data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
  150. data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
  151. data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
  152. data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
  153. data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
  154. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
  155. data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
  156. data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
  157. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
  158. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
  159. data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
  160. data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
  161. data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
  162. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
  163. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
  164. data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
  165. data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
  166. data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
  167. data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
  168. data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
  169. data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
  170. data/test/MC/ARM/thumb-hints.s.cs +12 -0
  171. data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
  172. data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
  173. data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
  174. data/test/MC/ARM/thumb.s.cs +19 -0
  175. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
  176. data/test/MC/ARM/thumb2-branches.s.cs +85 -0
  177. data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
  178. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
  179. data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
  180. data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
  181. data/test/MC/ARM/vfp4.s.cs +13 -0
  182. data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
  183. data/test/MC/ARM/vpush-vpop.s.cs +9 -0
  184. data/test/MC/Mips/hilo-addressing.s.cs +4 -0
  185. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
  186. data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
  187. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
  188. data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
  189. data/test/MC/Mips/micromips-expansions.s.cs +20 -0
  190. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
  191. data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
  192. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
  193. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
  194. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
  195. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
  196. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
  197. data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
  198. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
  199. data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
  200. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
  201. data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
  202. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
  203. data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
  204. data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
  205. data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
  206. data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
  207. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
  208. data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
  209. data/test/MC/Mips/mips-expansions.s.cs +20 -0
  210. data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
  211. data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
  212. data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
  213. data/test/MC/Mips/mips-register-names.s.cs +33 -0
  214. data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
  215. data/test/MC/Mips/mips64-instructions.s.cs +3 -0
  216. data/test/MC/Mips/mips64-register-names.s.cs +33 -0
  217. data/test/MC/Mips/mips_directives.s.cs +12 -0
  218. data/test/MC/Mips/nabi-regs.s.cs +12 -0
  219. data/test/MC/Mips/set-at-directive.s.cs +6 -0
  220. data/test/MC/Mips/test_2r.s.cs +16 -0
  221. data/test/MC/Mips/test_2rf.s.cs +33 -0
  222. data/test/MC/Mips/test_3r.s.cs +243 -0
  223. data/test/MC/Mips/test_3rf.s.cs +83 -0
  224. data/test/MC/Mips/test_bit.s.cs +49 -0
  225. data/test/MC/Mips/test_cbranch.s.cs +11 -0
  226. data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
  227. data/test/MC/Mips/test_elm.s.cs +16 -0
  228. data/test/MC/Mips/test_elm_insert.s.cs +4 -0
  229. data/test/MC/Mips/test_elm_insve.s.cs +5 -0
  230. data/test/MC/Mips/test_i10.s.cs +5 -0
  231. data/test/MC/Mips/test_i5.s.cs +45 -0
  232. data/test/MC/Mips/test_i8.s.cs +11 -0
  233. data/test/MC/Mips/test_lsa.s.cs +5 -0
  234. data/test/MC/Mips/test_mi10.s.cs +24 -0
  235. data/test/MC/Mips/test_vec.s.cs +8 -0
  236. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
  237. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
  238. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
  239. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
  240. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
  241. data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
  242. data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
  243. data/test/MC/README +6 -0
  244. data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
  245. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
  246. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
  247. data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
  248. data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
  249. data/test/MC/Sparc/sparc-vis.s.cs +2 -0
  250. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
  251. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
  252. data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
  253. data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
  254. data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
  255. data/test/MC/SystemZ/insn-good.s.cs +2265 -0
  256. data/test/MC/SystemZ/regs-good.s.cs +45 -0
  257. data/test/MC/X86/3DNow.s.cs +29 -0
  258. data/test/MC/X86/address-size.s.cs +5 -0
  259. data/test/MC/X86/avx512-encodings.s.cs +12 -0
  260. data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
  261. data/test/MC/X86/x86-32-avx.s.cs +833 -0
  262. data/test/MC/X86/x86-32-fma3.s.cs +169 -0
  263. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
  264. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
  265. data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
  266. data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
  267. data/test/MC/X86/x86_64-encoding.s.cs +59 -0
  268. data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
  269. data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
  270. data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
  271. data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
  272. data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
  273. data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
  274. data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
  275. data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
  276. data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
  277. data/test/README +6 -0
  278. data/test/test.rb +205 -0
  279. data/test/test.rb.SPEC +235 -0
  280. data/test/test_arm.rb +202 -0
  281. data/test/test_arm.rb.SPEC +275 -0
  282. data/test/test_arm64.rb +150 -0
  283. data/test/test_arm64.rb.SPEC +116 -0
  284. data/test/test_detail.rb +228 -0
  285. data/test/test_detail.rb.SPEC +322 -0
  286. data/test/test_exhaustive.rb +80 -0
  287. data/test/test_mips.rb +118 -0
  288. data/test/test_mips.rb.SPEC +91 -0
  289. data/test/test_ppc.rb +137 -0
  290. data/test/test_ppc.rb.SPEC +84 -0
  291. data/test/test_sanity.rb +83 -0
  292. data/test/test_skipdata.rb +111 -0
  293. data/test/test_skipdata.rb.SPEC +58 -0
  294. data/test/test_sparc.rb +113 -0
  295. data/test/test_sparc.rb.SPEC +116 -0
  296. data/test/test_sysz.rb +111 -0
  297. data/test/test_sysz.rb.SPEC +61 -0
  298. data/test/test_x86.rb +189 -0
  299. data/test/test_x86.rb.SPEC +579 -0
  300. data/test/test_xcore.rb +100 -0
  301. data/test/test_xcore.rb.SPEC +75 -0
  302. metadata +393 -0
data/test/MC/PowerPC/ppc64-encoding-fp.s.cs ADDED
@@ -0,0 +1,110 @@
1
+ # CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
2
+ 0xc0,0x44,0x00,0x80 = lfs 2, 128(4)
3
+ 0x7c,0x43,0x24,0x2e = lfsx 2, 3, 4
4
+ 0xc4,0x44,0x00,0x80 = lfsu 2, 128(4)
5
+ 0x7c,0x43,0x24,0x6e = lfsux 2, 3, 4
6
+ 0xc8,0x44,0x00,0x80 = lfd 2, 128(4)
7
+ 0x7c,0x43,0x24,0xae = lfdx 2, 3, 4
8
+ 0xcc,0x44,0x00,0x80 = lfdu 2, 128(4)
9
+ 0x7c,0x43,0x24,0xee = lfdux 2, 3, 4
10
+ 0x7c,0x43,0x26,0xae = lfiwax 2, 3, 4
11
+ 0x7c,0x43,0x26,0xee = lfiwzx 2, 3, 4
12
+ 0xd0,0x44,0x00,0x80 = stfs 2, 128(4)
13
+ 0x7c,0x43,0x25,0x2e = stfsx 2, 3, 4
14
+ 0xd4,0x44,0x00,0x80 = stfsu 2, 128(4)
15
+ 0x7c,0x43,0x25,0x6e = stfsux 2, 3, 4
16
+ 0xd8,0x44,0x00,0x80 = stfd 2, 128(4)
17
+ 0x7c,0x43,0x25,0xae = stfdx 2, 3, 4
18
+ 0xdc,0x44,0x00,0x80 = stfdu 2, 128(4)
19
+ 0x7c,0x43,0x25,0xee = stfdux 2, 3, 4
20
+ 0x7c,0x43,0x27,0xae = stfiwx 2, 3, 4
21
+ 0xfc,0x40,0x18,0x90 = fmr 2, 3
22
+ 0xfc,0x40,0x18,0x91 = fmr. 2, 3
23
+ 0xfc,0x40,0x18,0x50 = fneg 2, 3
24
+ 0xfc,0x40,0x18,0x51 = fneg. 2, 3
25
+ 0xfc,0x40,0x1a,0x10 = fabs 2, 3
26
+ 0xfc,0x40,0x1a,0x11 = fabs. 2, 3
27
+ 0xfc,0x40,0x19,0x10 = fnabs 2, 3
28
+ 0xfc,0x40,0x19,0x11 = fnabs. 2, 3
29
+ 0xfc,0x43,0x20,0x10 = fcpsgn 2, 3, 4
30
+ 0xfc,0x43,0x20,0x11 = fcpsgn. 2, 3, 4
31
+ 0xfc,0x43,0x20,0x2a = fadd 2, 3, 4
32
+ 0xfc,0x43,0x20,0x2b = fadd. 2, 3, 4
33
+ 0xec,0x43,0x20,0x2a = fadds 2, 3, 4
34
+ 0xec,0x43,0x20,0x2b = fadds. 2, 3, 4
35
+ 0xfc,0x43,0x20,0x28 = fsub 2, 3, 4
36
+ 0xfc,0x43,0x20,0x29 = fsub. 2, 3, 4
37
+ 0xec,0x43,0x20,0x28 = fsubs 2, 3, 4
38
+ 0xec,0x43,0x20,0x29 = fsubs. 2, 3, 4
39
+ 0xfc,0x43,0x01,0x32 = fmul 2, 3, 4
40
+ 0xfc,0x43,0x01,0x33 = fmul. 2, 3, 4
41
+ 0xec,0x43,0x01,0x32 = fmuls 2, 3, 4
42
+ 0xec,0x43,0x01,0x33 = fmuls. 2, 3, 4
43
+ 0xfc,0x43,0x20,0x24 = fdiv 2, 3, 4
44
+ 0xfc,0x43,0x20,0x25 = fdiv. 2, 3, 4
45
+ 0xec,0x43,0x20,0x24 = fdivs 2, 3, 4
46
+ 0xec,0x43,0x20,0x25 = fdivs. 2, 3, 4
47
+ 0xfc,0x40,0x18,0x2c = fsqrt 2, 3
48
+ 0xfc,0x40,0x18,0x2d = fsqrt. 2, 3
49
+ 0xec,0x40,0x18,0x2c = fsqrts 2, 3
50
+ 0xec,0x40,0x18,0x2d = fsqrts. 2, 3
51
+ 0xfc,0x40,0x18,0x30 = fre 2, 3
52
+ 0xfc,0x40,0x18,0x31 = fre. 2, 3
53
+ 0xec,0x40,0x18,0x30 = fres 2, 3
54
+ 0xec,0x40,0x18,0x31 = fres. 2, 3
55
+ 0xfc,0x40,0x18,0x34 = frsqrte 2, 3
56
+ 0xfc,0x40,0x18,0x35 = frsqrte. 2, 3
57
+ 0xec,0x40,0x18,0x34 = frsqrtes 2, 3
58
+ 0xec,0x40,0x18,0x35 = frsqrtes. 2, 3
59
+ 0xfc,0x43,0x29,0x3a = fmadd 2, 3, 4, 5
60
+ 0xfc,0x43,0x29,0x3b = fmadd. 2, 3, 4, 5
61
+ 0xec,0x43,0x29,0x3a = fmadds 2, 3, 4, 5
62
+ 0xec,0x43,0x29,0x3b = fmadds. 2, 3, 4, 5
63
+ 0xfc,0x43,0x29,0x38 = fmsub 2, 3, 4, 5
64
+ 0xfc,0x43,0x29,0x39 = fmsub. 2, 3, 4, 5
65
+ 0xec,0x43,0x29,0x38 = fmsubs 2, 3, 4, 5
66
+ 0xec,0x43,0x29,0x39 = fmsubs. 2, 3, 4, 5
67
+ 0xfc,0x43,0x29,0x3e = fnmadd 2, 3, 4, 5
68
+ 0xfc,0x43,0x29,0x3f = fnmadd. 2, 3, 4, 5
69
+ 0xec,0x43,0x29,0x3e = fnmadds 2, 3, 4, 5
70
+ 0xec,0x43,0x29,0x3f = fnmadds. 2, 3, 4, 5
71
+ 0xfc,0x43,0x29,0x3c = fnmsub 2, 3, 4, 5
72
+ 0xfc,0x43,0x29,0x3d = fnmsub. 2, 3, 4, 5
73
+ 0xec,0x43,0x29,0x3c = fnmsubs 2, 3, 4, 5
74
+ 0xec,0x43,0x29,0x3d = fnmsubs. 2, 3, 4, 5
75
+ 0xfc,0x40,0x18,0x18 = frsp 2, 3
76
+ 0xfc,0x40,0x18,0x19 = frsp. 2, 3
77
+ 0xfc,0x40,0x1e,0x5c = fctid 2, 3
78
+ 0xfc,0x40,0x1e,0x5d = fctid. 2, 3
79
+ 0xfc,0x40,0x1e,0x5e = fctidz 2, 3
80
+ 0xfc,0x40,0x1e,0x5f = fctidz. 2, 3
81
+ 0xfc,0x40,0x1f,0x5e = fctiduz 2, 3
82
+ 0xfc,0x40,0x1f,0x5f = fctiduz. 2, 3
83
+ 0xfc,0x40,0x18,0x1c = fctiw 2, 3
84
+ 0xfc,0x40,0x18,0x1d = fctiw. 2, 3
85
+ 0xfc,0x40,0x18,0x1e = fctiwz 2, 3
86
+ 0xfc,0x40,0x18,0x1f = fctiwz. 2, 3
87
+ 0xfc,0x40,0x19,0x1e = fctiwuz 2, 3
88
+ 0xfc,0x40,0x19,0x1f = fctiwuz. 2, 3
89
+ 0xfc,0x40,0x1e,0x9c = fcfid 2, 3
90
+ 0xfc,0x40,0x1e,0x9d = fcfid. 2, 3
91
+ 0xfc,0x40,0x1f,0x9c = fcfidu 2, 3
92
+ 0xfc,0x40,0x1f,0x9d = fcfidu. 2, 3
93
+ 0xec,0x40,0x1e,0x9c = fcfids 2, 3
94
+ 0xec,0x40,0x1e,0x9d = fcfids. 2, 3
95
+ 0xec,0x40,0x1f,0x9c = fcfidus 2, 3
96
+ 0xec,0x40,0x1f,0x9d = fcfidus. 2, 3
97
+ 0xfc,0x40,0x1b,0x10 = frin 2, 3
98
+ 0xfc,0x40,0x1b,0x11 = frin. 2, 3
99
+ 0xfc,0x40,0x1b,0x90 = frip 2, 3
100
+ 0xfc,0x40,0x1b,0x91 = frip. 2, 3
101
+ 0xfc,0x40,0x1b,0x50 = friz 2, 3
102
+ 0xfc,0x40,0x1b,0x51 = friz. 2, 3
103
+ 0xfc,0x40,0x1b,0xd0 = frim 2, 3
104
+ 0xfc,0x40,0x1b,0xd1 = frim. 2, 3
105
+ 0xfd,0x03,0x20,0x00 = fcmpu 2, 3, 4
106
+ 0xfc,0x43,0x29,0x2e = fsel 2, 3, 4, 5
107
+ 0xfc,0x43,0x29,0x2f = fsel. 2, 3, 4, 5
108
+ 0xfc,0x40,0x04,0x8e = mffs 2
109
+ 0xff,0xe0,0x00,0x8c = mtfsb0 31
110
+ 0xff,0xe0,0x00,0x4c = mtfsb1 31
data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs ADDED
@@ -0,0 +1,170 @@
1
+ # CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
2
+ 0x7c,0x43,0x20,0x0e = lvebx 2, 3, 4
3
+ 0x7c,0x43,0x20,0x4e = lvehx 2, 3, 4
4
+ 0x7c,0x43,0x20,0x8e = lvewx 2, 3, 4
5
+ 0x7c,0x43,0x20,0xce = lvx 2, 3, 4
6
+ 0x7c,0x43,0x22,0xce = lvxl 2, 3, 4
7
+ 0x7c,0x43,0x21,0x0e = stvebx 2, 3, 4
8
+ 0x7c,0x43,0x21,0x4e = stvehx 2, 3, 4
9
+ 0x7c,0x43,0x21,0x8e = stvewx 2, 3, 4
10
+ 0x7c,0x43,0x21,0xce = stvx 2, 3, 4
11
+ 0x7c,0x43,0x23,0xce = stvxl 2, 3, 4
12
+ 0x7c,0x43,0x20,0x0c = lvsl 2, 3, 4
13
+ 0x7c,0x43,0x20,0x4c = lvsr 2, 3, 4
14
+ 0x10,0x43,0x23,0x0e = vpkpx 2, 3, 4
15
+ 0x10,0x43,0x21,0x8e = vpkshss 2, 3, 4
16
+ 0x10,0x43,0x21,0x0e = vpkshus 2, 3, 4
17
+ 0x10,0x43,0x21,0xce = vpkswss 2, 3, 4
18
+ 0x10,0x43,0x21,0x4e = vpkswus 2, 3, 4
19
+ 0x10,0x43,0x20,0x0e = vpkuhum 2, 3, 4
20
+ 0x10,0x43,0x20,0x8e = vpkuhus 2, 3, 4
21
+ 0x10,0x43,0x20,0x4e = vpkuwum 2, 3, 4
22
+ 0x10,0x43,0x20,0xce = vpkuwus 2, 3, 4
23
+ 0x10,0x40,0x1b,0x4e = vupkhpx 2, 3
24
+ 0x10,0x40,0x1a,0x0e = vupkhsb 2, 3
25
+ 0x10,0x40,0x1a,0x4e = vupkhsh 2, 3
26
+ 0x10,0x40,0x1b,0xce = vupklpx 2, 3
27
+ 0x10,0x40,0x1a,0x8e = vupklsb 2, 3
28
+ 0x10,0x40,0x1a,0xce = vupklsh 2, 3
29
+ 0x10,0x43,0x20,0x0c = vmrghb 2, 3, 4
30
+ 0x10,0x43,0x20,0x4c = vmrghh 2, 3, 4
31
+ 0x10,0x43,0x20,0x8c = vmrghw 2, 3, 4
32
+ 0x10,0x43,0x21,0x0c = vmrglb 2, 3, 4
33
+ 0x10,0x43,0x21,0x4c = vmrglh 2, 3, 4
34
+ 0x10,0x43,0x21,0x8c = vmrglw 2, 3, 4
35
+ 0x10,0x41,0x1a,0x0c = vspltb 2, 3, 1
36
+ 0x10,0x41,0x1a,0x4c = vsplth 2, 3, 1
37
+ 0x10,0x41,0x1a,0x8c = vspltw 2, 3, 1
38
+ 0x10,0x43,0x03,0x0c = vspltisb 2, 3
39
+ 0x10,0x43,0x03,0x4c = vspltish 2, 3
40
+ 0x10,0x43,0x03,0x8c = vspltisw 2, 3
41
+ 0x10,0x43,0x21,0x6b = vperm 2, 3, 4, 5
42
+ 0x10,0x43,0x21,0x6a = vsel 2, 3, 4, 5
43
+ 0x10,0x43,0x21,0xc4 = vsl 2, 3, 4
44
+ 0x10,0x43,0x21,0x6c = vsldoi 2, 3, 4, 5
45
+ 0x10,0x43,0x24,0x0c = vslo 2, 3, 4
46
+ 0x10,0x43,0x22,0xc4 = vsr 2, 3, 4
47
+ 0x10,0x43,0x24,0x4c = vsro 2, 3, 4
48
+ 0x10,0x43,0x21,0x80 = vaddcuw 2, 3, 4
49
+ 0x10,0x43,0x23,0x00 = vaddsbs 2, 3, 4
50
+ 0x10,0x43,0x23,0x40 = vaddshs 2, 3, 4
51
+ 0x10,0x43,0x23,0x80 = vaddsws 2, 3, 4
52
+ 0x10,0x43,0x20,0x00 = vaddubm 2, 3, 4
53
+ 0x10,0x43,0x20,0x40 = vadduhm 2, 3, 4
54
+ 0x10,0x43,0x20,0x80 = vadduwm 2, 3, 4
55
+ 0x10,0x43,0x22,0x00 = vaddubs 2, 3, 4
56
+ 0x10,0x43,0x22,0x40 = vadduhs 2, 3, 4
57
+ 0x10,0x43,0x22,0x80 = vadduws 2, 3, 4
58
+ 0x10,0x43,0x25,0x80 = vsubcuw 2, 3, 4
59
+ 0x10,0x43,0x27,0x00 = vsubsbs 2, 3, 4
60
+ 0x10,0x43,0x27,0x40 = vsubshs 2, 3, 4
61
+ 0x10,0x43,0x27,0x80 = vsubsws 2, 3, 4
62
+ 0x10,0x43,0x24,0x00 = vsububm 2, 3, 4
63
+ 0x10,0x43,0x24,0x40 = vsubuhm 2, 3, 4
64
+ 0x10,0x43,0x24,0x80 = vsubuwm 2, 3, 4
65
+ 0x10,0x43,0x26,0x00 = vsububs 2, 3, 4
66
+ 0x10,0x43,0x26,0x40 = vsubuhs 2, 3, 4
67
+ 0x10,0x43,0x26,0x80 = vsubuws 2, 3, 4
68
+ 0x10,0x43,0x23,0x08 = vmulesb 2, 3, 4
69
+ 0x10,0x43,0x23,0x48 = vmulesh 2, 3, 4
70
+ 0x10,0x43,0x22,0x08 = vmuleub 2, 3, 4
71
+ 0x10,0x43,0x22,0x48 = vmuleuh 2, 3, 4
72
+ 0x10,0x43,0x21,0x08 = vmulosb 2, 3, 4
73
+ 0x10,0x43,0x21,0x48 = vmulosh 2, 3, 4
74
+ 0x10,0x43,0x20,0x08 = vmuloub 2, 3, 4
75
+ 0x10,0x43,0x20,0x48 = vmulouh 2, 3, 4
76
+ 0x10,0x43,0x21,0x60 = vmhaddshs 2, 3, 4, 5
77
+ 0x10,0x43,0x21,0x61 = vmhraddshs 2, 3, 4, 5
78
+ 0x10,0x43,0x21,0x62 = vmladduhm 2, 3, 4, 5
79
+ 0x10,0x43,0x21,0x64 = vmsumubm 2, 3, 4, 5
80
+ 0x10,0x43,0x21,0x65 = vmsummbm 2, 3, 4, 5
81
+ 0x10,0x43,0x21,0x68 = vmsumshm 2, 3, 4, 5
82
+ 0x10,0x43,0x21,0x69 = vmsumshs 2, 3, 4, 5
83
+ 0x10,0x43,0x21,0x66 = vmsumuhm 2, 3, 4, 5
84
+ 0x10,0x43,0x21,0x67 = vmsumuhs 2, 3, 4, 5
85
+ 0x10,0x43,0x27,0x88 = vsumsws 2, 3, 4
86
+ 0x10,0x43,0x26,0x88 = vsum2sws 2, 3, 4
87
+ 0x10,0x43,0x27,0x08 = vsum4sbs 2, 3, 4
88
+ 0x10,0x43,0x26,0x48 = vsum4shs 2, 3, 4
89
+ 0x10,0x43,0x26,0x08 = vsum4ubs 2, 3, 4
90
+ 0x10,0x43,0x25,0x02 = vavgsb 2, 3, 4
91
+ 0x10,0x43,0x25,0x42 = vavgsh 2, 3, 4
92
+ 0x10,0x43,0x25,0x82 = vavgsw 2, 3, 4
93
+ 0x10,0x43,0x24,0x02 = vavgub 2, 3, 4
94
+ 0x10,0x43,0x24,0x42 = vavguh 2, 3, 4
95
+ 0x10,0x43,0x24,0x82 = vavguw 2, 3, 4
96
+ 0x10,0x43,0x21,0x02 = vmaxsb 2, 3, 4
97
+ 0x10,0x43,0x21,0x42 = vmaxsh 2, 3, 4
98
+ 0x10,0x43,0x21,0x82 = vmaxsw 2, 3, 4
99
+ 0x10,0x43,0x20,0x02 = vmaxub 2, 3, 4
100
+ 0x10,0x43,0x20,0x42 = vmaxuh 2, 3, 4
101
+ 0x10,0x43,0x20,0x82 = vmaxuw 2, 3, 4
102
+ 0x10,0x43,0x23,0x02 = vminsb 2, 3, 4
103
+ 0x10,0x43,0x23,0x42 = vminsh 2, 3, 4
104
+ 0x10,0x43,0x23,0x82 = vminsw 2, 3, 4
105
+ 0x10,0x43,0x22,0x02 = vminub 2, 3, 4
106
+ 0x10,0x43,0x22,0x42 = vminuh 2, 3, 4
107
+ 0x10,0x43,0x22,0x82 = vminuw 2, 3, 4
108
+ 0x10,0x43,0x20,0x06 = vcmpequb 2, 3, 4
109
+ 0x10,0x43,0x24,0x06 = vcmpequb. 2, 3, 4
110
+ 0x10,0x43,0x20,0x46 = vcmpequh 2, 3, 4
111
+ 0x10,0x43,0x24,0x46 = vcmpequh. 2, 3, 4
112
+ 0x10,0x43,0x20,0x86 = vcmpequw 2, 3, 4
113
+ 0x10,0x43,0x24,0x86 = vcmpequw. 2, 3, 4
114
+ 0x10,0x43,0x23,0x06 = vcmpgtsb 2, 3, 4
115
+ 0x10,0x43,0x27,0x06 = vcmpgtsb. 2, 3, 4
116
+ 0x10,0x43,0x23,0x46 = vcmpgtsh 2, 3, 4
117
+ 0x10,0x43,0x27,0x46 = vcmpgtsh. 2, 3, 4
118
+ 0x10,0x43,0x23,0x86 = vcmpgtsw 2, 3, 4
119
+ 0x10,0x43,0x27,0x86 = vcmpgtsw. 2, 3, 4
120
+ 0x10,0x43,0x22,0x06 = vcmpgtub 2, 3, 4
121
+ 0x10,0x43,0x26,0x06 = vcmpgtub. 2, 3, 4
122
+ 0x10,0x43,0x22,0x46 = vcmpgtuh 2, 3, 4
123
+ 0x10,0x43,0x26,0x46 = vcmpgtuh. 2, 3, 4
124
+ 0x10,0x43,0x22,0x86 = vcmpgtuw 2, 3, 4
125
+ 0x10,0x43,0x26,0x86 = vcmpgtuw. 2, 3, 4
126
+ 0x10,0x43,0x24,0x04 = vand 2, 3, 4
127
+ 0x10,0x43,0x24,0x44 = vandc 2, 3, 4
128
+ 0x10,0x43,0x25,0x04 = vnor 2, 3, 4
129
+ 0x10,0x43,0x24,0x84 = vor 2, 3, 4
130
+ 0x10,0x43,0x24,0xc4 = vxor 2, 3, 4
131
+ 0x10,0x43,0x20,0x04 = vrlb 2, 3, 4
132
+ 0x10,0x43,0x20,0x44 = vrlh 2, 3, 4
133
+ 0x10,0x43,0x20,0x84 = vrlw 2, 3, 4
134
+ 0x10,0x43,0x21,0x04 = vslb 2, 3, 4
135
+ 0x10,0x43,0x21,0x44 = vslh 2, 3, 4
136
+ 0x10,0x43,0x21,0x84 = vslw 2, 3, 4
137
+ 0x10,0x43,0x22,0x04 = vsrb 2, 3, 4
138
+ 0x10,0x43,0x22,0x44 = vsrh 2, 3, 4
139
+ 0x10,0x43,0x22,0x84 = vsrw 2, 3, 4
140
+ 0x10,0x43,0x23,0x04 = vsrab 2, 3, 4
141
+ 0x10,0x43,0x23,0x44 = vsrah 2, 3, 4
142
+ 0x10,0x43,0x23,0x84 = vsraw 2, 3, 4
143
+ 0x10,0x43,0x20,0x0a = vaddfp 2, 3, 4
144
+ 0x10,0x43,0x20,0x4a = vsubfp 2, 3, 4
145
+ 0x10,0x43,0x29,0x2e = vmaddfp 2, 3, 4, 5
146
+ 0x10,0x43,0x29,0x2f = vnmsubfp 2, 3, 4, 5
147
+ 0x10,0x43,0x24,0x0a = vmaxfp 2, 3, 4
148
+ 0x10,0x43,0x24,0x4a = vminfp 2, 3, 4
149
+ 0x10,0x44,0x1b,0xca = vctsxs 2, 3, 4
150
+ 0x10,0x44,0x1b,0x8a = vctuxs 2, 3, 4
151
+ 0x10,0x44,0x1b,0x4a = vcfsx 2, 3, 4
152
+ 0x10,0x44,0x1b,0x0a = vcfux 2, 3, 4
153
+ 0x10,0x40,0x1a,0xca = vrfim 2, 3
154
+ 0x10,0x40,0x1a,0x0a = vrfin 2, 3
155
+ 0x10,0x40,0x1a,0x8a = vrfip 2, 3
156
+ 0x10,0x40,0x1a,0x4a = vrfiz 2, 3
157
+ 0x10,0x43,0x23,0xc6 = vcmpbfp 2, 3, 4
158
+ 0x10,0x43,0x27,0xc6 = vcmpbfp. 2, 3, 4
159
+ 0x10,0x43,0x20,0xc6 = vcmpeqfp 2, 3, 4
160
+ 0x10,0x43,0x24,0xc6 = vcmpeqfp. 2, 3, 4
161
+ 0x10,0x43,0x21,0xc6 = vcmpgefp 2, 3, 4
162
+ 0x10,0x43,0x25,0xc6 = vcmpgefp. 2, 3, 4
163
+ 0x10,0x43,0x22,0xc6 = vcmpgtfp 2, 3, 4
164
+ 0x10,0x43,0x26,0xc6 = vcmpgtfp. 2, 3, 4
165
+ 0x10,0x40,0x19,0x8a = vexptefp 2, 3
166
+ 0x10,0x40,0x19,0xca = vlogefp 2, 3
167
+ 0x10,0x40,0x19,0x0a = vrefp 2, 3
168
+ 0x10,0x40,0x19,0x4a = vrsqrtefp 2, 3
169
+ 0x10,0x00,0x16,0x44 = mtvscr 2
170
+ 0x10,0x40,0x06,0x04 = mfvscr 2
data/test/MC/PowerPC/ppc64-encoding.s.cs ADDED
@@ -0,0 +1,202 @@
1
+ # CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
2
+ 0x4c,0x8a,0x18,0x20 = bclr 4, 10, 3
3
+ 0x4c,0x8a,0x00,0x20 = bclr 4, 10, 0
4
+ 0x4c,0x8a,0x18,0x21 = bclrl 4, 10, 3
5
+ 0x4c,0x8a,0x00,0x21 = bclrl 4, 10, 0
6
+ 0x4c,0x8a,0x1c,0x20 = bcctr 4, 10, 3
7
+ 0x4c,0x8a,0x04,0x20 = bcctr 4, 10, 0
8
+ 0x4c,0x8a,0x1c,0x21 = bcctrl 4, 10, 3
9
+ 0x4c,0x8a,0x04,0x21 = bcctrl 4, 10, 0
10
+ 0x4c,0x43,0x22,0x02 = crand 2, 3, 4
11
+ 0x4c,0x43,0x21,0xc2 = crnand 2, 3, 4
12
+ 0x4c,0x43,0x23,0x82 = cror 2, 3, 4
13
+ 0x4c,0x43,0x21,0x82 = crxor 2, 3, 4
14
+ 0x4c,0x43,0x20,0x42 = crnor 2, 3, 4
15
+ 0x4c,0x43,0x22,0x42 = creqv 2, 3, 4
16
+ 0x4c,0x43,0x21,0x02 = crandc 2, 3, 4
17
+ 0x4c,0x43,0x23,0x42 = crorc 2, 3, 4
18
+ 0x4d,0x0c,0x00,0x00 = mcrf 2, 3
19
+ 0x44,0x00,0x00,0x22 = sc 1
20
+ 0x44,0x00,0x00,0x02 = sc 0
21
+ 0x88,0x44,0x00,0x80 = lbz 2, 128(4)
22
+ 0x7c,0x43,0x20,0xae = lbzx 2, 3, 4
23
+ 0x8c,0x44,0x00,0x80 = lbzu 2, 128(4)
24
+ 0x7c,0x43,0x20,0xee = lbzux 2, 3, 4
25
+ 0xa0,0x44,0x00,0x80 = lhz 2, 128(4)
26
+ 0x7c,0x43,0x22,0x2e = lhzx 2, 3, 4
27
+ 0xa4,0x44,0x00,0x80 = lhzu 2, 128(4)
28
+ 0x7c,0x43,0x22,0x6e = lhzux 2, 3, 4
29
+ 0xa8,0x44,0x00,0x80 = lha 2, 128(4)
30
+ 0x7c,0x43,0x22,0xae = lhax 2, 3, 4
31
+ 0xac,0x44,0x00,0x80 = lhau 2, 128(4)
32
+ 0x7c,0x43,0x22,0xee = lhaux 2, 3, 4
33
+ 0x80,0x44,0x00,0x80 = lwz 2, 128(4)
34
+ 0x7c,0x43,0x20,0x2e = lwzx 2, 3, 4
35
+ 0x84,0x44,0x00,0x80 = lwzu 2, 128(4)
36
+ 0x7c,0x43,0x20,0x6e = lwzux 2, 3, 4
37
+ 0xe8,0x44,0x00,0x82 = lwa 2, 128(4)
38
+ 0x7c,0x43,0x22,0xaa = lwax 2, 3, 4
39
+ 0x7c,0x43,0x22,0xea = lwaux 2, 3, 4
40
+ 0xe8,0x44,0x00,0x80 = ld 2, 128(4)
41
+ 0x7c,0x43,0x20,0x2a = ldx 2, 3, 4
42
+ 0xe8,0x44,0x00,0x81 = ldu 2, 128(4)
43
+ 0x7c,0x43,0x20,0x6a = ldux 2, 3, 4
44
+ 0x98,0x44,0x00,0x80 = stb 2, 128(4)
45
+ 0x7c,0x43,0x21,0xae = stbx 2, 3, 4
46
+ 0x9c,0x44,0x00,0x80 = stbu 2, 128(4)
47
+ 0x7c,0x43,0x21,0xee = stbux 2, 3, 4
48
+ 0xb0,0x44,0x00,0x80 = sth 2, 128(4)
49
+ 0x7c,0x43,0x23,0x2e = sthx 2, 3, 4
50
+ 0xb4,0x44,0x00,0x80 = sthu 2, 128(4)
51
+ 0x7c,0x43,0x23,0x6e = sthux 2, 3, 4
52
+ 0x90,0x44,0x00,0x80 = stw 2, 128(4)
53
+ 0x7c,0x43,0x21,0x2e = stwx 2, 3, 4
54
+ 0x94,0x44,0x00,0x80 = stwu 2, 128(4)
55
+ 0x7c,0x43,0x21,0x6e = stwux 2, 3, 4
56
+ 0xf8,0x44,0x00,0x80 = std 2, 128(4)
57
+ 0x7c,0x43,0x21,0x2a = stdx 2, 3, 4
58
+ 0xf8,0x44,0x00,0x81 = stdu 2, 128(4)
59
+ 0x7c,0x43,0x21,0x6a = stdux 2, 3, 4
60
+ 0x7c,0x43,0x26,0x2c = lhbrx 2, 3, 4
61
+ 0x7c,0x43,0x27,0x2c = sthbrx 2, 3, 4
62
+ 0x7c,0x43,0x24,0x2c = lwbrx 2, 3, 4
63
+ 0x7c,0x43,0x25,0x2c = stwbrx 2, 3, 4
64
+ 0x7c,0x43,0x24,0x28 = ldbrx 2, 3, 4
65
+ 0x7c,0x43,0x25,0x28 = stdbrx 2, 3, 4
66
+ 0xb8,0x41,0x00,0x80 = lmw 2, 128(1)
67
+ 0xbc,0x41,0x00,0x80 = stmw 2, 128(1)
68
+ 0x38,0x43,0x00,0x80 = addi 2, 3, 128
69
+ 0x3c,0x43,0x00,0x80 = addis 2, 3, 128
70
+ 0x7c,0x43,0x22,0x14 = add 2, 3, 4
71
+ 0x7c,0x43,0x22,0x15 = add. 2, 3, 4
72
+ 0x7c,0x43,0x20,0x50 = subf 2, 3, 4
73
+ 0x7c,0x43,0x20,0x51 = subf. 2, 3, 4
74
+ 0x30,0x43,0x00,0x80 = addic 2, 3, 128
75
+ 0x34,0x43,0x00,0x80 = addic. 2, 3, 128
76
+ 0x20,0x43,0x00,0x04 = subfic 2, 3, 4
77
+ 0x7c,0x43,0x20,0x14 = addc 2, 3, 4
78
+ 0x7c,0x43,0x20,0x15 = addc. 2, 3, 4
79
+ 0x7c,0x43,0x20,0x10 = subfc 2, 3, 4
80
+ 0x7c,0x43,0x20,0x10 = subfc 2, 3, 4
81
+ 0x7c,0x43,0x21,0x14 = adde 2, 3, 4
82
+ 0x7c,0x43,0x21,0x15 = adde. 2, 3, 4
83
+ 0x7c,0x43,0x21,0x10 = subfe 2, 3, 4
84
+ 0x7c,0x43,0x21,0x11 = subfe. 2, 3, 4
85
+ 0x7c,0x43,0x01,0xd4 = addme 2, 3
86
+ 0x7c,0x43,0x01,0xd5 = addme. 2, 3
87
+ 0x7c,0x43,0x01,0xd0 = subfme 2, 3
88
+ 0x7c,0x43,0x01,0xd1 = subfme. 2, 3
89
+ 0x7c,0x43,0x01,0x94 = addze 2, 3
90
+ 0x7c,0x43,0x01,0x95 = addze. 2, 3
91
+ 0x7c,0x43,0x01,0x90 = subfze 2, 3
92
+ 0x7c,0x43,0x01,0x91 = subfze. 2, 3
93
+ 0x7c,0x43,0x00,0xd0 = neg 2, 3
94
+ 0x7c,0x43,0x00,0xd1 = neg. 2, 3
95
+ 0x1c,0x43,0x00,0x80 = mulli 2, 3, 128
96
+ 0x7c,0x43,0x20,0x96 = mulhw 2, 3, 4
97
+ 0x7c,0x43,0x20,0x97 = mulhw. 2, 3, 4
98
+ 0x7c,0x43,0x21,0xd6 = mullw 2, 3, 4
99
+ 0x7c,0x43,0x21,0xd7 = mullw. 2, 3, 4
100
+ 0x7c,0x43,0x20,0x16 = mulhwu 2, 3, 4
101
+ 0x7c,0x43,0x20,0x17 = mulhwu. 2, 3, 4
102
+ 0x7c,0x43,0x23,0xd6 = divw 2, 3, 4
103
+ 0x7c,0x43,0x23,0xd7 = divw. 2, 3, 4
104
+ 0x7c,0x43,0x23,0x96 = divwu 2, 3, 4
105
+ 0x7c,0x43,0x23,0x97 = divwu. 2, 3, 4
106
+ 0x7c,0x43,0x21,0xd2 = mulld 2, 3, 4
107
+ 0x7c,0x43,0x21,0xd3 = mulld. 2, 3, 4
108
+ 0x7c,0x43,0x20,0x92 = mulhd 2, 3, 4
109
+ 0x7c,0x43,0x20,0x93 = mulhd. 2, 3, 4
110
+ 0x7c,0x43,0x20,0x12 = mulhdu 2, 3, 4
111
+ 0x7c,0x43,0x20,0x13 = mulhdu. 2, 3, 4
112
+ 0x7c,0x43,0x23,0xd2 = divd 2, 3, 4
113
+ 0x7c,0x43,0x23,0xd3 = divd. 2, 3, 4
114
+ 0x7c,0x43,0x23,0x92 = divdu 2, 3, 4
115
+ 0x7c,0x43,0x23,0x93 = divdu. 2, 3, 4
116
+ 0x2d,0x23,0x00,0x80 = cmpdi 2, 3, 128
117
+ 0x7d,0x23,0x20,0x00 = cmpd 2, 3, 4
118
+ 0x29,0x23,0x00,0x80 = cmpldi 2, 3, 128
119
+ 0x7d,0x23,0x20,0x40 = cmpld 2, 3, 4
120
+ 0x2d,0x03,0x00,0x80 = cmpwi 2, 3, 128
121
+ 0x7d,0x03,0x20,0x00 = cmpw 2, 3, 4
122
+ 0x29,0x03,0x00,0x80 = cmplwi 2, 3, 128
123
+ 0x7d,0x03,0x20,0x40 = cmplw 2, 3, 4
124
+ 0x0c,0x43,0x00,0x04 = twi 2, 3, 4
125
+ 0x7c,0x43,0x20,0x08 = tw 2, 3, 4
126
+ 0x08,0x43,0x00,0x04 = tdi 2, 3, 4
127
+ 0x7c,0x43,0x20,0x88 = td 2, 3, 4
128
+ 0x7c,0x43,0x21,0x5e = isel 2, 3, 4, 5
129
+ 0x70,0x62,0x00,0x80 = andi. 2, 3, 128
130
+ 0x74,0x62,0x00,0x80 = andis. 2, 3, 128
131
+ 0x60,0x62,0x00,0x80 = ori 2, 3, 128
132
+ 0x64,0x62,0x00,0x80 = oris 2, 3, 128
133
+ 0x68,0x62,0x00,0x80 = xori 2, 3, 128
134
+ 0x6c,0x62,0x00,0x80 = xoris 2, 3, 128
135
+ 0x7c,0x62,0x20,0x38 = and 2, 3, 4
136
+ 0x7c,0x62,0x20,0x39 = and. 2, 3, 4
137
+ 0x7c,0x62,0x22,0x78 = xor 2, 3, 4
138
+ 0x7c,0x62,0x22,0x79 = xor. 2, 3, 4
139
+ 0x7c,0x62,0x23,0xb8 = nand 2, 3, 4
140
+ 0x7c,0x62,0x23,0xb9 = nand. 2, 3, 4
141
+ 0x7c,0x62,0x23,0x78 = or 2, 3, 4
142
+ 0x7c,0x62,0x23,0x79 = or. 2, 3, 4
143
+ 0x7c,0x62,0x20,0xf8 = nor 2, 3, 4
144
+ 0x7c,0x62,0x20,0xf9 = nor. 2, 3, 4
145
+ 0x7c,0x62,0x22,0x38 = eqv 2, 3, 4
146
+ 0x7c,0x62,0x22,0x39 = eqv. 2, 3, 4
147
+ 0x7c,0x62,0x20,0x78 = andc 2, 3, 4
148
+ 0x7c,0x62,0x20,0x79 = andc. 2, 3, 4
149
+ 0x7c,0x62,0x23,0x38 = orc 2, 3, 4
150
+ 0x7c,0x62,0x23,0x39 = orc. 2, 3, 4
151
+ 0x7c,0x62,0x07,0x74 = extsb 2, 3
152
+ 0x7c,0x62,0x07,0x75 = extsb. 2, 3
153
+ 0x7c,0x62,0x07,0x34 = extsh 2, 3
154
+ 0x7c,0x62,0x07,0x35 = extsh. 2, 3
155
+ 0x7c,0x62,0x00,0x34 = cntlzw 2, 3
156
+ 0x7c,0x62,0x00,0x35 = cntlzw. 2, 3
157
+ 0x7c,0x62,0x02,0xf4 = popcntw 2, 3
158
+ 0x7c,0x62,0x07,0xb4 = extsw 2, 3
159
+ 0x7c,0x62,0x07,0xb5 = extsw. 2, 3
160
+ 0x7c,0x62,0x00,0x74 = cntlzd 2, 3
161
+ 0x7c,0x62,0x00,0x75 = cntlzd. 2, 3
162
+ 0x7c,0x62,0x03,0xf4 = popcntd 2, 3
163
+ 0x54,0x62,0x21,0x4c = rlwinm 2, 3, 4, 5, 6
164
+ 0x54,0x62,0x21,0x4d = rlwinm. 2, 3, 4, 5, 6
165
+ 0x5c,0x62,0x21,0x4c = rlwnm 2, 3, 4, 5, 6
166
+ 0x5c,0x62,0x21,0x4d = rlwnm. 2, 3, 4, 5, 6
167
+ 0x50,0x62,0x21,0x4c = rlwimi 2, 3, 4, 5, 6
168
+ 0x50,0x62,0x21,0x4d = rlwimi. 2, 3, 4, 5, 6
169
+ 0x78,0x62,0x21,0x40 = rldicl 2, 3, 4, 5
170
+ 0x78,0x62,0x21,0x41 = rldicl. 2, 3, 4, 5
171
+ 0x78,0x62,0x21,0x44 = rldicr 2, 3, 4, 5
172
+ 0x78,0x62,0x21,0x45 = rldicr. 2, 3, 4, 5
173
+ 0x78,0x62,0x21,0x48 = rldic 2, 3, 4, 5
174
+ 0x78,0x62,0x21,0x49 = rldic. 2, 3, 4, 5
175
+ 0x78,0x62,0x21,0x50 = rldcl 2, 3, 4, 5
176
+ 0x78,0x62,0x21,0x51 = rldcl. 2, 3, 4, 5
177
+ 0x78,0x62,0x21,0x52 = rldcr 2, 3, 4, 5
178
+ 0x78,0x62,0x21,0x53 = rldcr. 2, 3, 4, 5
179
+ 0x78,0x62,0x21,0x4c = rldimi 2, 3, 4, 5
180
+ 0x78,0x62,0x21,0x4d = rldimi. 2, 3, 4, 5
181
+ 0x7c,0x62,0x20,0x30 = slw 2, 3, 4
182
+ 0x7c,0x62,0x20,0x31 = slw. 2, 3, 4
183
+ 0x7c,0x62,0x24,0x30 = srw 2, 3, 4
184
+ 0x7c,0x62,0x24,0x31 = srw. 2, 3, 4
185
+ 0x7c,0x62,0x26,0x70 = srawi 2, 3, 4
186
+ 0x7c,0x62,0x26,0x71 = srawi. 2, 3, 4
187
+ 0x7c,0x62,0x26,0x30 = sraw 2, 3, 4
188
+ 0x7c,0x62,0x26,0x31 = sraw. 2, 3, 4
189
+ 0x7c,0x62,0x20,0x36 = sld 2, 3, 4
190
+ 0x7c,0x62,0x20,0x37 = sld. 2, 3, 4
191
+ 0x7c,0x62,0x24,0x36 = srd 2, 3, 4
192
+ 0x7c,0x62,0x24,0x37 = srd. 2, 3, 4
193
+ 0x7c,0x62,0x26,0x74 = sradi 2, 3, 4
194
+ 0x7c,0x62,0x26,0x75 = sradi. 2, 3, 4
195
+ 0x7c,0x62,0x26,0x34 = srad 2, 3, 4
196
+ 0x7c,0x62,0x26,0x35 = srad. 2, 3, 4
197
+ 0x7c,0x58,0x93,0xa6 = mtspr 600, 2
198
+ 0x7c,0x58,0x92,0xa6 = mfspr 2, 600
199
+ 0x7c,0x47,0xb1,0x20 = mtcrf 123, 2
200
+ 0x7c,0x40,0x00,0x26 = mfcr 2
201
+ 0x7c,0x51,0x01,0x20 = mtocrf 16, 2
202
+ 0x7e,0x10,0x80,0x26 = mfocrf 16, 8