crabstone 3.0.3
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- checksums.yaml +7 -0
- data/CHANGES.md +61 -0
- data/LICENSE +25 -0
- data/MANIFEST +312 -0
- data/README.md +103 -0
- data/Rakefile +27 -0
- data/bin/genconst +66 -0
- data/bin/genreg +99 -0
- data/crabstone.gemspec +27 -0
- data/examples/hello_world.rb +43 -0
- data/lib/arch/arm.rb +128 -0
- data/lib/arch/arm64.rb +167 -0
- data/lib/arch/arm64_const.rb +1055 -0
- data/lib/arch/arm64_registers.rb +295 -0
- data/lib/arch/arm_const.rb +777 -0
- data/lib/arch/arm_registers.rb +149 -0
- data/lib/arch/mips.rb +78 -0
- data/lib/arch/mips_const.rb +850 -0
- data/lib/arch/mips_registers.rb +208 -0
- data/lib/arch/ppc.rb +90 -0
- data/lib/arch/ppc_const.rb +1181 -0
- data/lib/arch/ppc_registers.rb +209 -0
- data/lib/arch/sparc.rb +79 -0
- data/lib/arch/sparc_const.rb +461 -0
- data/lib/arch/sparc_registers.rb +121 -0
- data/lib/arch/systemz.rb +79 -0
- data/lib/arch/sysz_const.rb +779 -0
- data/lib/arch/sysz_registers.rb +66 -0
- data/lib/arch/x86.rb +107 -0
- data/lib/arch/x86_const.rb +1698 -0
- data/lib/arch/x86_registers.rb +265 -0
- data/lib/arch/xcore.rb +78 -0
- data/lib/arch/xcore_const.rb +185 -0
- data/lib/arch/xcore_registers.rb +57 -0
- data/lib/crabstone.rb +564 -0
- data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
- data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
- data/test/MC/AArch64/neon-2velem.s.cs +113 -0
- data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
- data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
- data/test/MC/AArch64/neon-across.s.cs +40 -0
- data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
- data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
- data/test/MC/AArch64/neon-crypto.s.cs +15 -0
- data/test/MC/AArch64/neon-extract.s.cs +3 -0
- data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
- data/test/MC/AArch64/neon-max-min.s.cs +37 -0
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
- data/test/MC/AArch64/neon-mov.s.cs +74 -0
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
- data/test/MC/AArch64/neon-perm.s.cs +43 -0
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
- data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
- data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
- data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
- data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
- data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
- data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
- data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
- data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
- data/test/MC/AArch64/neon-shift.s.cs +22 -0
- data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
- data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
- data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
- data/test/MC/AArch64/neon-tbl.s.cs +21 -0
- data/test/MC/AArch64/trace-regs.s.cs +383 -0
- data/test/MC/ARM/arm-aliases.s.cs +7 -0
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
- data/test/MC/ARM/arm-it-block.s.cs +2 -0
- data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
- data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm-trustzone.s.cs +3 -0
- data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
- data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
- data/test/MC/ARM/arm_instructions.s.cs +25 -0
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
- data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
- data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
- data/test/MC/ARM/crc32-thumb.s.cs +7 -0
- data/test/MC/ARM/crc32.s.cs +7 -0
- data/test/MC/ARM/dot-req.s.cs +3 -0
- data/test/MC/ARM/fp-armv8.s.cs +52 -0
- data/test/MC/ARM/idiv-thumb.s.cs +3 -0
- data/test/MC/ARM/idiv.s.cs +3 -0
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
- data/test/MC/ARM/mode-switch.s.cs +7 -0
- data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
- data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
- data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
- data/test/MC/ARM/neon-crypto.s.cs +16 -0
- data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
- data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
- data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
- data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
- data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neon-v8.s.cs +38 -0
- data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
- data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
- data/test/MC/ARM/neon-vswp.s.cs +3 -0
- data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
- data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
- data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
- data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
- data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
- data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
- data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
- data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
- data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
- data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
- data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
- data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
- data/test/MC/ARM/thumb-hints.s.cs +12 -0
- data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
- data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
- data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
- data/test/MC/ARM/thumb.s.cs +19 -0
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
- data/test/MC/ARM/thumb2-branches.s.cs +85 -0
- data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
- data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
- data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
- data/test/MC/ARM/vfp4.s.cs +13 -0
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
- data/test/MC/ARM/vpush-vpop.s.cs +9 -0
- data/test/MC/Mips/hilo-addressing.s.cs +4 -0
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
- data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
- data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
- data/test/MC/Mips/micromips-expansions.s.cs +20 -0
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
- data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
- data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
- data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
- data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
- data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
- data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
- data/test/MC/Mips/mips-expansions.s.cs +20 -0
- data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
- data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
- data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
- data/test/MC/Mips/mips-register-names.s.cs +33 -0
- data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
- data/test/MC/Mips/mips64-instructions.s.cs +3 -0
- data/test/MC/Mips/mips64-register-names.s.cs +33 -0
- data/test/MC/Mips/mips_directives.s.cs +12 -0
- data/test/MC/Mips/nabi-regs.s.cs +12 -0
- data/test/MC/Mips/set-at-directive.s.cs +6 -0
- data/test/MC/Mips/test_2r.s.cs +16 -0
- data/test/MC/Mips/test_2rf.s.cs +33 -0
- data/test/MC/Mips/test_3r.s.cs +243 -0
- data/test/MC/Mips/test_3rf.s.cs +83 -0
- data/test/MC/Mips/test_bit.s.cs +49 -0
- data/test/MC/Mips/test_cbranch.s.cs +11 -0
- data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
- data/test/MC/Mips/test_elm.s.cs +16 -0
- data/test/MC/Mips/test_elm_insert.s.cs +4 -0
- data/test/MC/Mips/test_elm_insve.s.cs +5 -0
- data/test/MC/Mips/test_i10.s.cs +5 -0
- data/test/MC/Mips/test_i5.s.cs +45 -0
- data/test/MC/Mips/test_i8.s.cs +11 -0
- data/test/MC/Mips/test_lsa.s.cs +5 -0
- data/test/MC/Mips/test_mi10.s.cs +24 -0
- data/test/MC/Mips/test_vec.s.cs +8 -0
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
- data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
- data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
- data/test/MC/README +6 -0
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
- data/test/MC/Sparc/sparc-vis.s.cs +2 -0
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
- data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
- data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
- data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
- data/test/MC/SystemZ/insn-good.s.cs +2265 -0
- data/test/MC/SystemZ/regs-good.s.cs +45 -0
- data/test/MC/X86/3DNow.s.cs +29 -0
- data/test/MC/X86/address-size.s.cs +5 -0
- data/test/MC/X86/avx512-encodings.s.cs +12 -0
- data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
- data/test/MC/X86/x86-32-avx.s.cs +833 -0
- data/test/MC/X86/x86-32-fma3.s.cs +169 -0
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
- data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
- data/test/MC/X86/x86_64-encoding.s.cs +59 -0
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
- data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
- data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
- data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
- data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
- data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
- data/test/README +6 -0
- data/test/test.rb +205 -0
- data/test/test.rb.SPEC +235 -0
- data/test/test_arm.rb +202 -0
- data/test/test_arm.rb.SPEC +275 -0
- data/test/test_arm64.rb +150 -0
- data/test/test_arm64.rb.SPEC +116 -0
- data/test/test_detail.rb +228 -0
- data/test/test_detail.rb.SPEC +322 -0
- data/test/test_exhaustive.rb +80 -0
- data/test/test_mips.rb +118 -0
- data/test/test_mips.rb.SPEC +91 -0
- data/test/test_ppc.rb +137 -0
- data/test/test_ppc.rb.SPEC +84 -0
- data/test/test_sanity.rb +83 -0
- data/test/test_skipdata.rb +111 -0
- data/test/test_skipdata.rb.SPEC +58 -0
- data/test/test_sparc.rb +113 -0
- data/test/test_sparc.rb.SPEC +116 -0
- data/test/test_sysz.rb +111 -0
- data/test/test_sysz.rb.SPEC +61 -0
- data/test/test_x86.rb +189 -0
- data/test/test_x86.rb.SPEC +579 -0
- data/test/test_xcore.rb +100 -0
- data/test/test_xcore.rb.SPEC +75 -0
- metadata +393 -0
@@ -0,0 +1,83 @@
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# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
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2
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0x78,0x1c,0x9f,0x1b = fadd.w $w28, $w19, $w28
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3
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0x78,0x3d,0x13,0x5b = fadd.d $w13, $w2, $w29
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4
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0x78,0x19,0x5b,0x9a = fcaf.w $w14, $w11, $w25
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5
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0x78,0x33,0x08,0x5a = fcaf.d $w1, $w1, $w19
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6
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0x78,0x90,0xb8,0x5a = fceq.w $w1, $w23, $w16
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7
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0x78,0xb0,0x40,0x1a = fceq.d $w0, $w8, $w16
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8
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0x79,0x98,0x4c,0x1a = fcle.w $w16, $w9, $w24
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9
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0x79,0xa1,0x76,0xda = fcle.d $w27, $w14, $w1
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10
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0x79,0x08,0x47,0x1a = fclt.w $w28, $w8, $w8
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11
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0x79,0x2b,0xcf,0x9a = fclt.d $w30, $w25, $w11
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12
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0x78,0xd7,0x90,0x9c = fcne.w $w2, $w18, $w23
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13
|
+
0x78,0xef,0xa3,0x9c = fcne.d $w14, $w20, $w15
|
14
|
+
0x78,0x59,0x92,0x9c = fcor.w $w10, $w18, $w25
|
15
|
+
0x78,0x6b,0xcc,0x5c = fcor.d $w17, $w25, $w11
|
16
|
+
0x78,0xd5,0x13,0x9a = fcueq.w $w14, $w2, $w21
|
17
|
+
0x78,0xe7,0x1f,0x5a = fcueq.d $w29, $w3, $w7
|
18
|
+
0x79,0xc3,0x2c,0x5a = fcule.w $w17, $w5, $w3
|
19
|
+
0x79,0xfe,0x0f,0xda = fcule.d $w31, $w1, $w30
|
20
|
+
0x79,0x49,0xc9,0x9a = fcult.w $w6, $w25, $w9
|
21
|
+
0x79,0x71,0x46,0xda = fcult.d $w27, $w8, $w17
|
22
|
+
0x78,0x48,0xa1,0x1a = fcun.w $w4, $w20, $w8
|
23
|
+
0x78,0x63,0x5f,0x5a = fcun.d $w29, $w11, $w3
|
24
|
+
0x78,0x93,0x93,0x5c = fcune.w $w13, $w18, $w19
|
25
|
+
0x78,0xb5,0xd4,0x1c = fcune.d $w16, $w26, $w21
|
26
|
+
0x78,0xc2,0xc3,0x5b = fdiv.w $w13, $w24, $w2
|
27
|
+
0x78,0xf9,0x24,0xdb = fdiv.d $w19, $w4, $w25
|
28
|
+
0x7a,0x10,0x02,0x1b = fexdo.h $w8, $w0, $w16
|
29
|
+
0x7a,0x3b,0x68,0x1b = fexdo.w $w0, $w13, $w27
|
30
|
+
0x79,0xc3,0x04,0x5b = fexp2.w $w17, $w0, $w3
|
31
|
+
0x79,0xea,0x05,0x9b = fexp2.d $w22, $w0, $w10
|
32
|
+
0x79,0x17,0x37,0x5b = fmadd.w $w29, $w6, $w23
|
33
|
+
0x79,0x35,0xe2,0xdb = fmadd.d $w11, $w28, $w21
|
34
|
+
0x7b,0x8d,0xb8,0x1b = fmax.w $w0, $w23, $w13
|
35
|
+
0x7b,0xa8,0x96,0x9b = fmax.d $w26, $w18, $w8
|
36
|
+
0x7b,0xca,0x82,0x9b = fmax_a.w $w10, $w16, $w10
|
37
|
+
0x7b,0xf6,0x4f,0x9b = fmax_a.d $w30, $w9, $w22
|
38
|
+
0x7b,0x1e,0x0e,0x1b = fmin.w $w24, $w1, $w30
|
39
|
+
0x7b,0x2a,0xde,0xdb = fmin.d $w27, $w27, $w10
|
40
|
+
0x7b,0x54,0xea,0x9b = fmin_a.w $w10, $w29, $w20
|
41
|
+
0x7b,0x78,0xf3,0x5b = fmin_a.d $w13, $w30, $w24
|
42
|
+
0x79,0x40,0xcc,0x5b = fmsub.w $w17, $w25, $w0
|
43
|
+
0x79,0x70,0x92,0x1b = fmsub.d $w8, $w18, $w16
|
44
|
+
0x78,0x8f,0x78,0xdb = fmul.w $w3, $w15, $w15
|
45
|
+
0x78,0xaa,0xf2,0x5b = fmul.d $w9, $w30, $w10
|
46
|
+
0x7a,0x0a,0x2e,0x5a = fsaf.w $w25, $w5, $w10
|
47
|
+
0x7a,0x3d,0x1e,0x5a = fsaf.d $w25, $w3, $w29
|
48
|
+
0x7a,0x8d,0x8a,0xda = fseq.w $w11, $w17, $w13
|
49
|
+
0x7a,0xbf,0x07,0x5a = fseq.d $w29, $w0, $w31
|
50
|
+
0x7b,0x9f,0xff,0x9a = fsle.w $w30, $w31, $w31
|
51
|
+
0x7b,0xb8,0xbc,0x9a = fsle.d $w18, $w23, $w24
|
52
|
+
0x7b,0x06,0x2b,0x1a = fslt.w $w12, $w5, $w6
|
53
|
+
0x7b,0x35,0xd4,0x1a = fslt.d $w16, $w26, $w21
|
54
|
+
0x7a,0xcc,0x0f,0x9c = fsne.w $w30, $w1, $w12
|
55
|
+
0x7a,0xf7,0x6b,0x9c = fsne.d $w14, $w13, $w23
|
56
|
+
0x7a,0x5b,0x6e,0xdc = fsor.w $w27, $w13, $w27
|
57
|
+
0x7a,0x6b,0xc3,0x1c = fsor.d $w12, $w24, $w11
|
58
|
+
0x78,0x41,0xd7,0xdb = fsub.w $w31, $w26, $w1
|
59
|
+
0x78,0x7b,0x8c,0xdb = fsub.d $w19, $w17, $w27
|
60
|
+
0x7a,0xd9,0xc4,0x1a = fsueq.w $w16, $w24, $w25
|
61
|
+
0x7a,0xee,0x74,0x9a = fsueq.d $w18, $w14, $w14
|
62
|
+
0x7b,0xcd,0xf5,0xda = fsule.w $w23, $w30, $w13
|
63
|
+
0x7b,0xfa,0x58,0x9a = fsule.d $w2, $w11, $w26
|
64
|
+
0x7b,0x56,0xd2,0xda = fsult.w $w11, $w26, $w22
|
65
|
+
0x7b,0x7e,0xb9,0x9a = fsult.d $w6, $w23, $w30
|
66
|
+
0x7a,0x5c,0x90,0xda = fsun.w $w3, $w18, $w28
|
67
|
+
0x7a,0x73,0x5c,0x9a = fsun.d $w18, $w11, $w19
|
68
|
+
0x7a,0x82,0xfc,0x1c = fsune.w $w16, $w31, $w2
|
69
|
+
0x7a,0xb1,0xd0,0xdc = fsune.d $w3, $w26, $w17
|
70
|
+
0x7a,0x98,0x24,0x1b = ftq.h $w16, $w4, $w24
|
71
|
+
0x7a,0xb9,0x29,0x5b = ftq.w $w5, $w5, $w25
|
72
|
+
0x79,0x4a,0xa4,0x1c = madd_q.h $w16, $w20, $w10
|
73
|
+
0x79,0x69,0x17,0x1c = madd_q.w $w28, $w2, $w9
|
74
|
+
0x7b,0x49,0x92,0x1c = maddr_q.h $w8, $w18, $w9
|
75
|
+
0x7b,0x70,0x67,0x5c = maddr_q.w $w29, $w12, $w16
|
76
|
+
0x79,0x8a,0xd6,0x1c = msub_q.h $w24, $w26, $w10
|
77
|
+
0x79,0xbc,0xf3,0x5c = msub_q.w $w13, $w30, $w28
|
78
|
+
0x7b,0x8b,0xab,0x1c = msubr_q.h $w12, $w21, $w11
|
79
|
+
0x7b,0xb4,0x70,0x5c = msubr_q.w $w1, $w14, $w20
|
80
|
+
0x79,0x1e,0x81,0x9c = mul_q.h $w6, $w16, $w30
|
81
|
+
0x79,0x24,0x0c,0x1c = mul_q.w $w16, $w1, $w4
|
82
|
+
0x7b,0x13,0xa1,0x9c = mulr_q.h $w6, $w20, $w19
|
83
|
+
0x7b,0x34,0x0e,0xdc = mulr_q.w $w27, $w1, $w20
|
@@ -0,0 +1,49 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x79,0xf2,0xf5,0x49 = bclri.b $w21, $w30, 2
|
3
|
+
0x79,0xe0,0xae,0x09 = bclri.h $w24, $w21, 0
|
4
|
+
0x79,0xc3,0xf5,0xc9 = bclri.w $w23, $w30, 3
|
5
|
+
0x79,0x80,0x5a,0x49 = bclri.d $w9, $w11, 0
|
6
|
+
0x7b,0x71,0x66,0x49 = binsli.b $w25, $w12, 1
|
7
|
+
0x7b,0x60,0xb5,0x49 = binsli.h $w21, $w22, 0
|
8
|
+
0x7b,0x40,0x25,0x89 = binsli.w $w22, $w4, 0
|
9
|
+
0x7b,0x06,0x11,0x89 = binsli.d $w6, $w2, 6
|
10
|
+
0x7b,0xf0,0x9b,0xc9 = binsri.b $w15, $w19, 0
|
11
|
+
0x7b,0xe1,0xf2,0x09 = binsri.h $w8, $w30, 1
|
12
|
+
0x7b,0xc5,0x98,0x89 = binsri.w $w2, $w19, 5
|
13
|
+
0x7b,0x81,0xa4,0x89 = binsri.d $w18, $w20, 1
|
14
|
+
0x7a,0xf0,0x9e,0x09 = bnegi.b $w24, $w19, 0
|
15
|
+
0x7a,0xe3,0x5f,0x09 = bnegi.h $w28, $w11, 3
|
16
|
+
0x7a,0xc5,0xd8,0x49 = bnegi.w $w1, $w27, 5
|
17
|
+
0x7a,0x81,0xa9,0x09 = bnegi.d $w4, $w21, 1
|
18
|
+
0x7a,0x70,0x44,0x89 = bseti.b $w18, $w8, 0
|
19
|
+
0x7a,0x62,0x76,0x09 = bseti.h $w24, $w14, 2
|
20
|
+
0x7a,0x44,0x92,0x49 = bseti.w $w9, $w18, 4
|
21
|
+
0x7a,0x01,0x79,0xc9 = bseti.d $w7, $w15, 1
|
22
|
+
0x78,0x72,0xff,0xca = sat_s.b $w31, $w31, 2
|
23
|
+
0x78,0x60,0x9c,0xca = sat_s.h $w19, $w19, 0
|
24
|
+
0x78,0x40,0xec,0xca = sat_s.w $w19, $w29, 0
|
25
|
+
0x78,0x00,0xb2,0xca = sat_s.d $w11, $w22, 0
|
26
|
+
0x78,0xf3,0x68,0x4a = sat_u.b $w1, $w13, 3
|
27
|
+
0x78,0xe4,0xc7,0x8a = sat_u.h $w30, $w24, 4
|
28
|
+
0x78,0xc0,0x6f,0xca = sat_u.w $w31, $w13, 0
|
29
|
+
0x78,0x85,0x87,0x4a = sat_u.d $w29, $w16, 5
|
30
|
+
0x78,0x71,0x55,0xc9 = slli.b $w23, $w10, 1
|
31
|
+
0x78,0x61,0x92,0x49 = slli.h $w9, $w18, 1
|
32
|
+
0x78,0x44,0xea,0xc9 = slli.w $w11, $w29, 4
|
33
|
+
0x78,0x01,0xa6,0x49 = slli.d $w25, $w20, 1
|
34
|
+
0x78,0xf1,0xee,0x09 = srai.b $w24, $w29, 1
|
35
|
+
0x78,0xe0,0x30,0x49 = srai.h $w1, $w6, 0
|
36
|
+
0x78,0xc1,0xd1,0xc9 = srai.w $w7, $w26, 1
|
37
|
+
0x78,0x83,0xcd,0x09 = srai.d $w20, $w25, 3
|
38
|
+
0x79,0x70,0xc9,0x4a = srari.b $w5, $w25, 0
|
39
|
+
0x79,0x64,0x31,0xca = srari.h $w7, $w6, 4
|
40
|
+
0x79,0x45,0x5c,0x4a = srari.w $w17, $w11, 5
|
41
|
+
0x79,0x05,0xcd,0x4a = srari.d $w21, $w25, 5
|
42
|
+
0x79,0x72,0x00,0x89 = srli.b $w2, $w0, 2
|
43
|
+
0x79,0x62,0xff,0xc9 = srli.h $w31, $w31, 2
|
44
|
+
0x79,0x44,0x49,0x49 = srli.w $w5, $w9, 4
|
45
|
+
0x79,0x05,0xd6,0xc9 = srli.d $w27, $w26, 5
|
46
|
+
0x79,0xf0,0x1c,0x8a = srlri.b $w18, $w3, 0
|
47
|
+
0x79,0xe3,0x10,0x4a = srlri.h $w1, $w2, 3
|
48
|
+
0x79,0xc2,0xb2,0xca = srlri.w $w11, $w22, 2
|
49
|
+
0x79,0x86,0x56,0x0a = srlri.d $w24, $w10, 6
|
@@ -0,0 +1,11 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x47,0x80,0x00,0x01 = bnz.b $w0, 4
|
3
|
+
0x47,0xa1,0x00,0x04 = bnz.h $w1, 16
|
4
|
+
0x47,0xc2,0x00,0x20 = bnz.w $w2, 128
|
5
|
+
0x47,0xe3,0xff,0xe0 = bnz.d $w3, -128
|
6
|
+
0x45,0xe0,0x00,0x01 = bnz.v $w0, 4
|
7
|
+
0x47,0x00,0x00,0x20 = bz.b $w0, 128
|
8
|
+
0x47,0x21,0x00,0x40 = bz.h $w1, 256
|
9
|
+
0x47,0x42,0x00,0x80 = bz.w $w2, 512
|
10
|
+
0x47,0x63,0xff,0x00 = bz.d $w3, -1024
|
11
|
+
0x45,0x60,0x00,0x01 = bz.v $w0, 4
|
@@ -0,0 +1,33 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x78,0x7e,0x00,0x59 = cfcmsa $1, $0
|
3
|
+
0x78,0x7e,0x00,0x59 = cfcmsa $1, $0
|
4
|
+
0x78,0x7e,0x08,0x99 = cfcmsa $2, $1
|
5
|
+
0x78,0x7e,0x08,0x99 = cfcmsa $2, $1
|
6
|
+
0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2
|
7
|
+
0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2
|
8
|
+
0x78,0x7e,0x19,0x19 = cfcmsa $4, $3
|
9
|
+
0x78,0x7e,0x19,0x19 = cfcmsa $4, $3
|
10
|
+
0x78,0x7e,0x21,0x59 = cfcmsa $5, $4
|
11
|
+
0x78,0x7e,0x21,0x59 = cfcmsa $5, $4
|
12
|
+
0x78,0x7e,0x29,0x99 = cfcmsa $6, $5
|
13
|
+
0x78,0x7e,0x29,0x99 = cfcmsa $6, $5
|
14
|
+
0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6
|
15
|
+
0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6
|
16
|
+
0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7
|
17
|
+
0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7
|
18
|
+
0x78,0x3e,0x08,0x19 = ctcmsa $0, $1
|
19
|
+
0x78,0x3e,0x08,0x19 = ctcmsa $0, $1
|
20
|
+
0x78,0x3e,0x10,0x59 = ctcmsa $1, $2
|
21
|
+
0x78,0x3e,0x10,0x59 = ctcmsa $1, $2
|
22
|
+
0x78,0x3e,0x18,0x99 = ctcmsa $2, $3
|
23
|
+
0x78,0x3e,0x18,0x99 = ctcmsa $2, $3
|
24
|
+
0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4
|
25
|
+
0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4
|
26
|
+
0x78,0x3e,0x29,0x19 = ctcmsa $4, $5
|
27
|
+
0x78,0x3e,0x29,0x19 = ctcmsa $4, $5
|
28
|
+
0x78,0x3e,0x31,0x59 = ctcmsa $5, $6
|
29
|
+
0x78,0x3e,0x31,0x59 = ctcmsa $5, $6
|
30
|
+
0x78,0x3e,0x39,0x99 = ctcmsa $6, $7
|
31
|
+
0x78,0x3e,0x39,0x99 = ctcmsa $6, $7
|
32
|
+
0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8
|
33
|
+
0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8
|
@@ -0,0 +1,16 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x78,0x82,0x43,0x59 = copy_s.b $13, $w8[2]
|
3
|
+
0x78,0xa0,0xc8,0x59 = copy_s.h $1, $w25[0]
|
4
|
+
0x78,0xb1,0x2d,0x99 = copy_s.w $22, $w5[1]
|
5
|
+
0x78,0xc4,0xa5,0x99 = copy_u.b $22, $w20[4]
|
6
|
+
0x78,0xe0,0x25,0x19 = copy_u.h $20, $w4[0]
|
7
|
+
0x78,0xf2,0x6f,0x99 = copy_u.w $fp, $w13[2]
|
8
|
+
0x78,0x04,0xe8,0x19 = sldi.b $w0, $w29[4]
|
9
|
+
0x78,0x20,0x8a,0x19 = sldi.h $w8, $w17[0]
|
10
|
+
0x78,0x32,0xdd,0x19 = sldi.w $w20, $w27[2]
|
11
|
+
0x78,0x38,0x61,0x19 = sldi.d $w4, $w12[0]
|
12
|
+
0x78,0x42,0x1e,0x59 = splati.b $w25, $w3[2]
|
13
|
+
0x78,0x61,0xe6,0x19 = splati.h $w24, $w28[1]
|
14
|
+
0x78,0x70,0x93,0x59 = splati.w $w13, $w18[0]
|
15
|
+
0x78,0x78,0x0f,0x19 = splati.d $w28, $w1[0]
|
16
|
+
0x78,0xbe,0xc5,0xd9 = move.v $w23, $w24
|
@@ -0,0 +1,45 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x78,0x1e,0xf8,0xc6 = addvi.b $w3, $w31, 30
|
3
|
+
0x78,0x3a,0x6e,0x06 = addvi.h $w24, $w13, 26
|
4
|
+
0x78,0x5a,0xa6,0x86 = addvi.w $w26, $w20, 26
|
5
|
+
0x78,0x75,0x0c,0x06 = addvi.d $w16, $w1, 21
|
6
|
+
0x78,0x18,0xae,0x07 = ceqi.b $w24, $w21, -8
|
7
|
+
0x78,0x22,0x7f,0xc7 = ceqi.h $w31, $w15, 2
|
8
|
+
0x78,0x5f,0x0b,0x07 = ceqi.w $w12, $w1, -1
|
9
|
+
0x78,0x67,0xb6,0x07 = ceqi.d $w24, $w22, 7
|
10
|
+
0x7a,0x01,0x83,0x07 = clei_s.b $w12, $w16, 1
|
11
|
+
0x7a,0x37,0x50,0x87 = clei_s.h $w2, $w10, -9
|
12
|
+
0x7a,0x56,0x59,0x07 = clei_s.w $w4, $w11, -10
|
13
|
+
0x7a,0x76,0xe8,0x07 = clei_s.d $w0, $w29, -10
|
14
|
+
0x7a,0x83,0x8d,0x47 = clei_u.b $w21, $w17, 3
|
15
|
+
0x7a,0xb1,0x3f,0x47 = clei_u.h $w29, $w7, 17
|
16
|
+
0x7a,0xc2,0x08,0x47 = clei_u.w $w1, $w1, 2
|
17
|
+
0x7a,0xfd,0xde,0xc7 = clei_u.d $w27, $w27, 29
|
18
|
+
0x79,0x19,0x6c,0xc7 = clti_s.b $w19, $w13, -7
|
19
|
+
0x79,0x34,0x53,0xc7 = clti_s.h $w15, $w10, -12
|
20
|
+
0x79,0x4b,0x63,0x07 = clti_s.w $w12, $w12, 11
|
21
|
+
0x79,0x71,0xa7,0x47 = clti_s.d $w29, $w20, -15
|
22
|
+
0x79,0x9d,0x4b,0x87 = clti_u.b $w14, $w9, 29
|
23
|
+
0x79,0xb9,0xce,0x07 = clti_u.h $w24, $w25, 25
|
24
|
+
0x79,0xd6,0x08,0x47 = clti_u.w $w1, $w1, 22
|
25
|
+
0x79,0xe1,0xcd,0x47 = clti_u.d $w21, $w25, 1
|
26
|
+
0x79,0x01,0xad,0x86 = maxi_s.b $w22, $w21, 1
|
27
|
+
0x79,0x38,0x2f,0x46 = maxi_s.h $w29, $w5, -8
|
28
|
+
0x79,0x54,0x50,0x46 = maxi_s.w $w1, $w10, -12
|
29
|
+
0x79,0x70,0xeb,0x46 = maxi_s.d $w13, $w29, -16
|
30
|
+
0x79,0x8c,0x05,0x06 = maxi_u.b $w20, $w0, 12
|
31
|
+
0x79,0xa3,0x70,0x46 = maxi_u.h $w1, $w14, 3
|
32
|
+
0x79,0xcb,0xb6,0xc6 = maxi_u.w $w27, $w22, 11
|
33
|
+
0x79,0xe4,0x36,0x86 = maxi_u.d $w26, $w6, 4
|
34
|
+
0x7a,0x01,0x09,0x06 = mini_s.b $w4, $w1, 1
|
35
|
+
0x7a,0x37,0xde,0xc6 = mini_s.h $w27, $w27, -9
|
36
|
+
0x7a,0x49,0x5f,0x06 = mini_s.w $w28, $w11, 9
|
37
|
+
0x7a,0x6a,0x52,0xc6 = mini_s.d $w11, $w10, 10
|
38
|
+
0x7a,0x9b,0xbc,0x86 = mini_u.b $w18, $w23, 27
|
39
|
+
0x7a,0xb2,0xd1,0xc6 = mini_u.h $w7, $w26, 18
|
40
|
+
0x7a,0xda,0x62,0xc6 = mini_u.w $w11, $w12, 26
|
41
|
+
0x7a,0xe2,0x7a,0xc6 = mini_u.d $w11, $w15, 2
|
42
|
+
0x78,0x93,0xa6,0x06 = subvi.b $w24, $w20, 19
|
43
|
+
0x78,0xa4,0x9a,0xc6 = subvi.h $w11, $w19, 4
|
44
|
+
0x78,0xcb,0x53,0x06 = subvi.w $w12, $w10, 11
|
45
|
+
0x78,0xe7,0x84,0xc6 = subvi.d $w19, $w16, 7
|
@@ -0,0 +1,11 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x78,0x30,0xe8,0x80 = andi.b $w2, $w29, 48
|
3
|
+
0x78,0x7e,0xb1,0x81 = bmnzi.b $w6, $w22, 126
|
4
|
+
0x79,0x58,0x0e,0xc1 = bmzi.b $w27, $w1, 88
|
5
|
+
0x7a,0xbd,0x1f,0x41 = bseli.b $w29, $w3, 189
|
6
|
+
0x7a,0x38,0x88,0x40 = nori.b $w1, $w17, 56
|
7
|
+
0x79,0x87,0xa6,0x80 = ori.b $w26, $w20, 135
|
8
|
+
0x78,0x69,0xf4,0xc2 = shf.b $w19, $w30, 105
|
9
|
+
0x79,0x4c,0x44,0x42 = shf.h $w17, $w8, 76
|
10
|
+
0x7a,0x5d,0x1b,0x82 = shf.w $w14, $w3, 93
|
11
|
+
0x7b,0x14,0x54,0x00 = xori.b $w16, $w10, 20
|
@@ -0,0 +1,24 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x7a,0x00,0x08,0x20 = ld.b $w0, -512($1)
|
3
|
+
0x78,0x00,0x10,0x60 = ld.b $w1, 0($2)
|
4
|
+
0x79,0xff,0x18,0xa0 = ld.b $w2, 511($3)
|
5
|
+
0x7a,0x00,0x20,0xe1 = ld.h $w3, -1024($4)
|
6
|
+
0x7b,0x00,0x29,0x21 = ld.h $w4, -512($5)
|
7
|
+
0x78,0x00,0x31,0x61 = ld.h $w5, 0($6)
|
8
|
+
0x79,0x00,0x39,0xa1 = ld.h $w6, 512($7)
|
9
|
+
0x79,0xff,0x41,0xe1 = ld.h $w7, 1022($8)
|
10
|
+
0x7a,0x00,0x4a,0x22 = ld.w $w8, -2048($9)
|
11
|
+
0x7b,0x00,0x52,0x62 = ld.w $w9, -1024($10)
|
12
|
+
0x7b,0x80,0x5a,0xa2 = ld.w $w10, -512($11)
|
13
|
+
0x78,0x80,0x62,0xe2 = ld.w $w11, 512($12)
|
14
|
+
0x79,0x00,0x6b,0x22 = ld.w $w12, 1024($13)
|
15
|
+
0x79,0xff,0x73,0x62 = ld.w $w13, 2044($14)
|
16
|
+
0x7a,0x00,0x7b,0xa3 = ld.d $w14, -4096($15)
|
17
|
+
0x7b,0x00,0x83,0xe3 = ld.d $w15, -2048($16)
|
18
|
+
0x7b,0x80,0x8c,0x23 = ld.d $w16, -1024($17)
|
19
|
+
0x7b,0xc0,0x94,0x63 = ld.d $w17, -512($18)
|
20
|
+
0x78,0x00,0x9c,0xa3 = ld.d $w18, 0($19)
|
21
|
+
0x78,0x40,0xa4,0xe3 = ld.d $w19, 512($20)
|
22
|
+
0x78,0x80,0xad,0x23 = ld.d $w20, 1024($21)
|
23
|
+
0x79,0x00,0xb5,0x63 = ld.d $w21, 2048($22)
|
24
|
+
0x79,0xff,0xbd,0xa3 = ld.d $w22, 4088($23)
|
@@ -0,0 +1,8 @@
|
|
1
|
+
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
+
0x78,0x1b,0xa6,0x5e = and.v $w25, $w20, $w27
|
3
|
+
0x78,0x87,0x34,0x5e = bmnz.v $w17, $w6, $w7
|
4
|
+
0x78,0xa9,0x88,0xde = bmz.v $w3, $w17, $w9
|
5
|
+
0x78,0xce,0x02,0x1e = bsel.v $w8, $w0, $w14
|
6
|
+
0x78,0x40,0xf9,0xde = nor.v $w7, $w31, $w0
|
7
|
+
0x78,0x3e,0xd6,0x1e = or.v $w24, $w26, $w30
|
8
|
+
0x78,0x6f,0xd9,0xde = xor.v $w7, $w27, $w15
|
@@ -0,0 +1,25 @@
|
|
1
|
+
# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
|
2
|
+
0x7c,0x02,0x1f,0xac = icbi 2, 3
|
3
|
+
0x7c,0x02,0x1a,0x2c = dcbt 2, 3
|
4
|
+
0x7c,0x02,0x19,0xec = dcbtst 2, 3
|
5
|
+
0x7c,0x02,0x1f,0xec = dcbz 2, 3
|
6
|
+
0x7c,0x02,0x18,0x6c = dcbst 2, 3
|
7
|
+
0x4c,0x00,0x01,0x2c = isync
|
8
|
+
0x7c,0x43,0x21,0x2d = stwcx. 2, 3, 4
|
9
|
+
0x7c,0x43,0x21,0xad = stdcx. 2, 3, 4
|
10
|
+
0x7c,0x40,0x04,0xac = sync 2
|
11
|
+
0x7c,0x00,0x06,0xac = eieio
|
12
|
+
0x7c,0x40,0x00,0x7c = wait 2
|
13
|
+
0x7c,0x02,0x18,0xac = dcbf 2, 3
|
14
|
+
0x7c,0x43,0x20,0x28 = lwarx 2, 3, 4
|
15
|
+
0x7c,0x43,0x20,0xa8 = ldarx 2, 3, 4
|
16
|
+
0x7c,0x00,0x04,0xac = sync 0
|
17
|
+
0x7c,0x00,0x04,0xac = sync 0
|
18
|
+
0x7c,0x20,0x04,0xac = sync 1
|
19
|
+
0x7c,0x40,0x04,0xac = sync 2
|
20
|
+
0x7c,0x00,0x00,0x7c = wait 0
|
21
|
+
0x7c,0x20,0x00,0x7c = wait 1
|
22
|
+
0x7c,0x40,0x00,0x7c = wait 2
|
23
|
+
0x7c,0x5b,0x1a,0xe6 = mftb 2, 123
|
24
|
+
0x7c,0x4c,0x42,0xe6 = mftb 2, 268
|
25
|
+
0x7c,0x4d,0x42,0xe6 = mftb 2, 269
|
@@ -0,0 +1,35 @@
|
|
1
|
+
# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
|
2
|
+
0x7c,0x80,0x01,0x24 = mtmsr 4, 0
|
3
|
+
0x7c,0x81,0x01,0x24 = mtmsr 4, 1
|
4
|
+
0x7c,0x80,0x00,0xa6 = mfmsr 4
|
5
|
+
0x7c,0x80,0x01,0x64 = mtmsrd 4, 0
|
6
|
+
0x7c,0x81,0x01,0x64 = mtmsrd 4, 1
|
7
|
+
0x7c,0x90,0x42,0xa6 = mfspr 4, 272
|
8
|
+
0x7c,0x91,0x42,0xa6 = mfspr 4, 273
|
9
|
+
0x7c,0x92,0x42,0xa6 = mfspr 4, 274
|
10
|
+
0x7c,0x93,0x42,0xa6 = mfspr 4, 275
|
11
|
+
0x7c,0x90,0x43,0xa6 = mtspr 272, 4
|
12
|
+
0x7c,0x91,0x43,0xa6 = mtspr 273, 4
|
13
|
+
0x7c,0x92,0x43,0xa6 = mtspr 274, 4
|
14
|
+
0x7c,0x93,0x43,0xa6 = mtspr 275, 4
|
15
|
+
0x7c,0x90,0x43,0xa6 = mtspr 272, 4
|
16
|
+
0x7c,0x91,0x43,0xa6 = mtspr 273, 4
|
17
|
+
0x7c,0x92,0x43,0xa6 = mtspr 274, 4
|
18
|
+
0x7c,0x93,0x43,0xa6 = mtspr 275, 4
|
19
|
+
0x7c,0x98,0x43,0xa6 = mtspr 280, 4
|
20
|
+
0x7c,0x96,0x02,0xa6 = mfspr 4, 22
|
21
|
+
0x7c,0x96,0x03,0xa6 = mtspr 22, 4
|
22
|
+
0x7c,0x9f,0x42,0xa6 = mfspr 4, 287
|
23
|
+
0x7c,0x99,0x02,0xa6 = mfspr 4, 25
|
24
|
+
0x7c,0x99,0x03,0xa6 = mtspr 25, 4
|
25
|
+
0x7c,0x9a,0x02,0xa6 = mfspr 4, 26
|
26
|
+
0x7c,0x9a,0x03,0xa6 = mtspr 26, 4
|
27
|
+
0x7c,0x9b,0x02,0xa6 = mfspr 4, 27
|
28
|
+
0x7c,0x9b,0x03,0xa6 = mtspr 27, 4
|
29
|
+
0x7c,0x00,0x23,0x64 = slbie 4
|
30
|
+
0x7c,0x80,0x2b,0x24 = slbmte 4, 5
|
31
|
+
0x7c,0x80,0x2f,0x26 = slbmfee 4, 5
|
32
|
+
0x7c,0x00,0x03,0xe4 = slbia
|
33
|
+
0x7c,0x00,0x04,0x6c = tlbsync
|
34
|
+
0x7c,0x00,0x22,0x24 = tlbiel 4
|
35
|
+
0x7c,0x00,0x22,0x64 = tlbie 4,0
|
@@ -0,0 +1,535 @@
|
|
1
|
+
# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
|
2
|
+
0x4d,0x82,0x00,0x20 = beqlr 0
|
3
|
+
0x4d,0x86,0x00,0x20 = beqlr 1
|
4
|
+
0x4d,0x8a,0x00,0x20 = beqlr 2
|
5
|
+
0x4d,0x8e,0x00,0x20 = beqlr 3
|
6
|
+
0x4d,0x92,0x00,0x20 = beqlr 4
|
7
|
+
0x4d,0x96,0x00,0x20 = beqlr 5
|
8
|
+
0x4d,0x9a,0x00,0x20 = beqlr 6
|
9
|
+
0x4d,0x9e,0x00,0x20 = beqlr 7
|
10
|
+
0x4d,0x80,0x00,0x20 = bclr 12, 0, 0
|
11
|
+
0x4d,0x81,0x00,0x20 = bclr 12, 1, 0
|
12
|
+
0x4d,0x82,0x00,0x20 = bclr 12, 2, 0
|
13
|
+
0x4d,0x83,0x00,0x20 = bclr 12, 3, 0
|
14
|
+
0x4d,0x83,0x00,0x20 = bclr 12, 3, 0
|
15
|
+
0x4d,0x84,0x00,0x20 = bclr 12, 4, 0
|
16
|
+
0x4d,0x85,0x00,0x20 = bclr 12, 5, 0
|
17
|
+
0x4d,0x86,0x00,0x20 = bclr 12, 6, 0
|
18
|
+
0x4d,0x87,0x00,0x20 = bclr 12, 7, 0
|
19
|
+
0x4d,0x87,0x00,0x20 = bclr 12, 7, 0
|
20
|
+
0x4d,0x88,0x00,0x20 = bclr 12, 8, 0
|
21
|
+
0x4d,0x89,0x00,0x20 = bclr 12, 9, 0
|
22
|
+
0x4d,0x8a,0x00,0x20 = bclr 12, 10, 0
|
23
|
+
0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0
|
24
|
+
0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0
|
25
|
+
0x4d,0x8c,0x00,0x20 = bclr 12, 12, 0
|
26
|
+
0x4d,0x8d,0x00,0x20 = bclr 12, 13, 0
|
27
|
+
0x4d,0x8e,0x00,0x20 = bclr 12, 14, 0
|
28
|
+
0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0
|
29
|
+
0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0
|
30
|
+
0x4d,0x90,0x00,0x20 = bclr 12, 16, 0
|
31
|
+
0x4d,0x91,0x00,0x20 = bclr 12, 17, 0
|
32
|
+
0x4d,0x92,0x00,0x20 = bclr 12, 18, 0
|
33
|
+
0x4d,0x93,0x00,0x20 = bclr 12, 19, 0
|
34
|
+
0x4d,0x93,0x00,0x20 = bclr 12, 19, 0
|
35
|
+
0x4d,0x94,0x00,0x20 = bclr 12, 20, 0
|
36
|
+
0x4d,0x95,0x00,0x20 = bclr 12, 21, 0
|
37
|
+
0x4d,0x96,0x00,0x20 = bclr 12, 22, 0
|
38
|
+
0x4d,0x97,0x00,0x20 = bclr 12, 23, 0
|
39
|
+
0x4d,0x97,0x00,0x20 = bclr 12, 23, 0
|
40
|
+
0x4d,0x98,0x00,0x20 = bclr 12, 24, 0
|
41
|
+
0x4d,0x99,0x00,0x20 = bclr 12, 25, 0
|
42
|
+
0x4d,0x9a,0x00,0x20 = bclr 12, 26, 0
|
43
|
+
0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0
|
44
|
+
0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0
|
45
|
+
0x4d,0x9c,0x00,0x20 = bclr 12, 28, 0
|
46
|
+
0x4d,0x9d,0x00,0x20 = bclr 12, 29, 0
|
47
|
+
0x4d,0x9e,0x00,0x20 = bclr 12, 30, 0
|
48
|
+
0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0
|
49
|
+
0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0
|
50
|
+
0x4e,0x80,0x00,0x20 = blr
|
51
|
+
0x4e,0x80,0x04,0x20 = bctr
|
52
|
+
0x4e,0x80,0x00,0x21 = blrl
|
53
|
+
0x4e,0x80,0x04,0x21 = bctrl
|
54
|
+
0x4d,0x82,0x00,0x20 = bclr 12, 2, 0
|
55
|
+
0x4d,0x82,0x04,0x20 = bcctr 12, 2, 0
|
56
|
+
0x4d,0x82,0x00,0x21 = bclrl 12, 2, 0
|
57
|
+
0x4d,0x82,0x04,0x21 = bcctrl 12, 2, 0
|
58
|
+
0x4d,0xe2,0x00,0x20 = bclr 15, 2, 0
|
59
|
+
0x4d,0xe2,0x04,0x20 = bcctr 15, 2, 0
|
60
|
+
0x4d,0xe2,0x00,0x21 = bclrl 15, 2, 0
|
61
|
+
0x4d,0xe2,0x04,0x21 = bcctrl 15, 2, 0
|
62
|
+
0x4d,0xc2,0x00,0x20 = bclr 14, 2, 0
|
63
|
+
0x4d,0xc2,0x04,0x20 = bcctr 14, 2, 0
|
64
|
+
0x4d,0xc2,0x00,0x21 = bclrl 14, 2, 0
|
65
|
+
0x4d,0xc2,0x04,0x21 = bcctrl 14, 2, 0
|
66
|
+
0x4c,0x82,0x00,0x20 = bclr 4, 2, 0
|
67
|
+
0x4c,0x82,0x04,0x20 = bcctr 4, 2, 0
|
68
|
+
0x4c,0x82,0x00,0x21 = bclrl 4, 2, 0
|
69
|
+
0x4c,0x82,0x04,0x21 = bcctrl 4, 2, 0
|
70
|
+
0x4c,0xe2,0x00,0x20 = bclr 7, 2, 0
|
71
|
+
0x4c,0xe2,0x04,0x20 = bcctr 7, 2, 0
|
72
|
+
0x4c,0xe2,0x00,0x21 = bclrl 7, 2, 0
|
73
|
+
0x4c,0xe2,0x04,0x21 = bcctrl 7, 2, 0
|
74
|
+
0x4c,0xc2,0x00,0x20 = bclr 6, 2, 0
|
75
|
+
0x4c,0xc2,0x04,0x20 = bcctr 6, 2, 0
|
76
|
+
0x4c,0xc2,0x00,0x21 = bclrl 6, 2, 0
|
77
|
+
0x4c,0xc2,0x04,0x21 = bcctrl 6, 2, 0
|
78
|
+
0x4e,0x00,0x00,0x20 = bdnzlr
|
79
|
+
0x4e,0x00,0x00,0x21 = bdnzlrl
|
80
|
+
0x4f,0x20,0x00,0x20 = bdnzlr+
|
81
|
+
0x4f,0x20,0x00,0x21 = bdnzlrl+
|
82
|
+
0x4f,0x00,0x00,0x20 = bdnzlr-
|
83
|
+
0x4f,0x00,0x00,0x21 = bdnzlrl-
|
84
|
+
0x4d,0x02,0x00,0x20 = bclr 8, 2, 0
|
85
|
+
0x4d,0x02,0x00,0x21 = bclrl 8, 2, 0
|
86
|
+
0x4c,0x02,0x00,0x20 = bclr 0, 2, 0
|
87
|
+
0x4c,0x02,0x00,0x21 = bclrl 0, 2, 0
|
88
|
+
0x4e,0x40,0x00,0x20 = bdzlr
|
89
|
+
0x4e,0x40,0x00,0x21 = bdzlrl
|
90
|
+
0x4f,0x60,0x00,0x20 = bdzlr+
|
91
|
+
0x4f,0x60,0x00,0x21 = bdzlrl+
|
92
|
+
0x4f,0x40,0x00,0x20 = bdzlr-
|
93
|
+
0x4f,0x40,0x00,0x21 = bdzlrl-
|
94
|
+
0x4d,0x42,0x00,0x20 = bclr 10, 2, 0
|
95
|
+
0x4d,0x42,0x00,0x21 = bclrl 10, 2, 0
|
96
|
+
0x4c,0x42,0x00,0x20 = bclr 2, 2, 0
|
97
|
+
0x4c,0x42,0x00,0x21 = bclrl 2, 2, 0
|
98
|
+
0x4d,0x88,0x00,0x20 = bltlr 2
|
99
|
+
0x4d,0x80,0x00,0x20 = bltlr 0
|
100
|
+
0x4d,0x88,0x04,0x20 = bltctr 2
|
101
|
+
0x4d,0x80,0x04,0x20 = bltctr 0
|
102
|
+
0x4d,0x88,0x00,0x21 = bltlrl 2
|
103
|
+
0x4d,0x80,0x00,0x21 = bltlrl 0
|
104
|
+
0x4d,0x88,0x04,0x21 = bltctrl 2
|
105
|
+
0x4d,0x80,0x04,0x21 = bltctrl 0
|
106
|
+
0x4d,0xe8,0x00,0x20 = bltlr+ 2
|
107
|
+
0x4d,0xe0,0x00,0x20 = bltlr+ 0
|
108
|
+
0x4d,0xe8,0x04,0x20 = bltctr+ 2
|
109
|
+
0x4d,0xe0,0x04,0x20 = bltctr+ 0
|
110
|
+
0x4d,0xe8,0x00,0x21 = bltlrl+ 2
|
111
|
+
0x4d,0xe0,0x00,0x21 = bltlrl+ 0
|
112
|
+
0x4d,0xe8,0x04,0x21 = bltctrl+ 2
|
113
|
+
0x4d,0xe0,0x04,0x21 = bltctrl+ 0
|
114
|
+
0x4d,0xc8,0x00,0x20 = bltlr- 2
|
115
|
+
0x4d,0xc0,0x00,0x20 = bltlr- 0
|
116
|
+
0x4d,0xc8,0x04,0x20 = bltctr- 2
|
117
|
+
0x4d,0xc0,0x04,0x20 = bltctr- 0
|
118
|
+
0x4d,0xc8,0x00,0x21 = bltlrl- 2
|
119
|
+
0x4d,0xc0,0x00,0x21 = bltlrl- 0
|
120
|
+
0x4d,0xc8,0x04,0x21 = bltctrl- 2
|
121
|
+
0x4d,0xc0,0x04,0x21 = bltctrl- 0
|
122
|
+
0x4c,0x89,0x00,0x20 = blelr 2
|
123
|
+
0x4c,0x81,0x00,0x20 = blelr 0
|
124
|
+
0x4c,0x89,0x04,0x20 = blectr 2
|
125
|
+
0x4c,0x81,0x04,0x20 = blectr 0
|
126
|
+
0x4c,0x89,0x00,0x21 = blelrl 2
|
127
|
+
0x4c,0x81,0x00,0x21 = blelrl 0
|
128
|
+
0x4c,0x89,0x04,0x21 = blectrl 2
|
129
|
+
0x4c,0x81,0x04,0x21 = blectrl 0
|
130
|
+
0x4c,0xe9,0x00,0x20 = blelr+ 2
|
131
|
+
0x4c,0xe1,0x00,0x20 = blelr+ 0
|
132
|
+
0x4c,0xe9,0x04,0x20 = blectr+ 2
|
133
|
+
0x4c,0xe1,0x04,0x20 = blectr+ 0
|
134
|
+
0x4c,0xe9,0x00,0x21 = blelrl+ 2
|
135
|
+
0x4c,0xe1,0x00,0x21 = blelrl+ 0
|
136
|
+
0x4c,0xe9,0x04,0x21 = blectrl+ 2
|
137
|
+
0x4c,0xe1,0x04,0x21 = blectrl+ 0
|
138
|
+
0x4c,0xc9,0x00,0x20 = blelr- 2
|
139
|
+
0x4c,0xc1,0x00,0x20 = blelr- 0
|
140
|
+
0x4c,0xc9,0x04,0x20 = blectr- 2
|
141
|
+
0x4c,0xc1,0x04,0x20 = blectr- 0
|
142
|
+
0x4c,0xc9,0x00,0x21 = blelrl- 2
|
143
|
+
0x4c,0xc1,0x00,0x21 = blelrl- 0
|
144
|
+
0x4c,0xc9,0x04,0x21 = blectrl- 2
|
145
|
+
0x4c,0xc1,0x04,0x21 = blectrl- 0
|
146
|
+
0x4d,0x8a,0x00,0x20 = beqlr 2
|
147
|
+
0x4d,0x82,0x00,0x20 = beqlr 0
|
148
|
+
0x4d,0x8a,0x04,0x20 = beqctr 2
|
149
|
+
0x4d,0x82,0x04,0x20 = beqctr 0
|
150
|
+
0x4d,0x8a,0x00,0x21 = beqlrl 2
|
151
|
+
0x4d,0x82,0x00,0x21 = beqlrl 0
|
152
|
+
0x4d,0x8a,0x04,0x21 = beqctrl 2
|
153
|
+
0x4d,0x82,0x04,0x21 = beqctrl 0
|
154
|
+
0x4d,0xea,0x00,0x20 = beqlr+ 2
|
155
|
+
0x4d,0xe2,0x00,0x20 = beqlr+ 0
|
156
|
+
0x4d,0xea,0x04,0x20 = beqctr+ 2
|
157
|
+
0x4d,0xe2,0x04,0x20 = beqctr+ 0
|
158
|
+
0x4d,0xea,0x00,0x21 = beqlrl+ 2
|
159
|
+
0x4d,0xe2,0x00,0x21 = beqlrl+ 0
|
160
|
+
0x4d,0xea,0x04,0x21 = beqctrl+ 2
|
161
|
+
0x4d,0xe2,0x04,0x21 = beqctrl+ 0
|
162
|
+
0x4d,0xca,0x00,0x20 = beqlr- 2
|
163
|
+
0x4d,0xc2,0x00,0x20 = beqlr- 0
|
164
|
+
0x4d,0xca,0x04,0x20 = beqctr- 2
|
165
|
+
0x4d,0xc2,0x04,0x20 = beqctr- 0
|
166
|
+
0x4d,0xca,0x00,0x21 = beqlrl- 2
|
167
|
+
0x4d,0xc2,0x00,0x21 = beqlrl- 0
|
168
|
+
0x4d,0xca,0x04,0x21 = beqctrl- 2
|
169
|
+
0x4d,0xc2,0x04,0x21 = beqctrl- 0
|
170
|
+
0x4c,0x88,0x00,0x20 = bgelr 2
|
171
|
+
0x4c,0x80,0x00,0x20 = bgelr 0
|
172
|
+
0x4c,0x88,0x04,0x20 = bgectr 2
|
173
|
+
0x4c,0x80,0x04,0x20 = bgectr 0
|
174
|
+
0x4c,0x88,0x00,0x21 = bgelrl 2
|
175
|
+
0x4c,0x80,0x00,0x21 = bgelrl 0
|
176
|
+
0x4c,0x88,0x04,0x21 = bgectrl 2
|
177
|
+
0x4c,0x80,0x04,0x21 = bgectrl 0
|
178
|
+
0x4c,0xe8,0x00,0x20 = bgelr+ 2
|
179
|
+
0x4c,0xe0,0x00,0x20 = bgelr+ 0
|
180
|
+
0x4c,0xe8,0x04,0x20 = bgectr+ 2
|
181
|
+
0x4c,0xe0,0x04,0x20 = bgectr+ 0
|
182
|
+
0x4c,0xe8,0x00,0x21 = bgelrl+ 2
|
183
|
+
0x4c,0xe0,0x00,0x21 = bgelrl+ 0
|
184
|
+
0x4c,0xe8,0x04,0x21 = bgectrl+ 2
|
185
|
+
0x4c,0xe0,0x04,0x21 = bgectrl+ 0
|
186
|
+
0x4c,0xc8,0x00,0x20 = bgelr- 2
|
187
|
+
0x4c,0xc0,0x00,0x20 = bgelr- 0
|
188
|
+
0x4c,0xc8,0x04,0x20 = bgectr- 2
|
189
|
+
0x4c,0xc0,0x04,0x20 = bgectr- 0
|
190
|
+
0x4c,0xc8,0x00,0x21 = bgelrl- 2
|
191
|
+
0x4c,0xc0,0x00,0x21 = bgelrl- 0
|
192
|
+
0x4c,0xc8,0x04,0x21 = bgectrl- 2
|
193
|
+
0x4c,0xc0,0x04,0x21 = bgectrl- 0
|
194
|
+
0x4d,0x89,0x00,0x20 = bgtlr 2
|
195
|
+
0x4d,0x81,0x00,0x20 = bgtlr 0
|
196
|
+
0x4d,0x89,0x04,0x20 = bgtctr 2
|
197
|
+
0x4d,0x81,0x04,0x20 = bgtctr 0
|
198
|
+
0x4d,0x89,0x00,0x21 = bgtlrl 2
|
199
|
+
0x4d,0x81,0x00,0x21 = bgtlrl 0
|
200
|
+
0x4d,0x89,0x04,0x21 = bgtctrl 2
|
201
|
+
0x4d,0x81,0x04,0x21 = bgtctrl 0
|
202
|
+
0x4d,0xe9,0x00,0x20 = bgtlr+ 2
|
203
|
+
0x4d,0xe1,0x00,0x20 = bgtlr+ 0
|
204
|
+
0x4d,0xe9,0x04,0x20 = bgtctr+ 2
|
205
|
+
0x4d,0xe1,0x04,0x20 = bgtctr+ 0
|
206
|
+
0x4d,0xe9,0x00,0x21 = bgtlrl+ 2
|
207
|
+
0x4d,0xe1,0x00,0x21 = bgtlrl+ 0
|
208
|
+
0x4d,0xe9,0x04,0x21 = bgtctrl+ 2
|
209
|
+
0x4d,0xe1,0x04,0x21 = bgtctrl+ 0
|
210
|
+
0x4d,0xc9,0x00,0x20 = bgtlr- 2
|
211
|
+
0x4d,0xc1,0x00,0x20 = bgtlr- 0
|
212
|
+
0x4d,0xc9,0x04,0x20 = bgtctr- 2
|
213
|
+
0x4d,0xc1,0x04,0x20 = bgtctr- 0
|
214
|
+
0x4d,0xc9,0x00,0x21 = bgtlrl- 2
|
215
|
+
0x4d,0xc1,0x00,0x21 = bgtlrl- 0
|
216
|
+
0x4d,0xc9,0x04,0x21 = bgtctrl- 2
|
217
|
+
0x4d,0xc1,0x04,0x21 = bgtctrl- 0
|
218
|
+
0x4c,0x88,0x00,0x20 = bgelr 2
|
219
|
+
0x4c,0x80,0x00,0x20 = bgelr 0
|
220
|
+
0x4c,0x88,0x04,0x20 = bgectr 2
|
221
|
+
0x4c,0x80,0x04,0x20 = bgectr 0
|
222
|
+
0x4c,0x88,0x00,0x21 = bgelrl 2
|
223
|
+
0x4c,0x80,0x00,0x21 = bgelrl 0
|
224
|
+
0x4c,0x88,0x04,0x21 = bgectrl 2
|
225
|
+
0x4c,0x80,0x04,0x21 = bgectrl 0
|
226
|
+
0x4c,0xe8,0x00,0x20 = bgelr+ 2
|
227
|
+
0x4c,0xe0,0x00,0x20 = bgelr+ 0
|
228
|
+
0x4c,0xe8,0x04,0x20 = bgectr+ 2
|
229
|
+
0x4c,0xe0,0x04,0x20 = bgectr+ 0
|
230
|
+
0x4c,0xe8,0x00,0x21 = bgelrl+ 2
|
231
|
+
0x4c,0xe0,0x00,0x21 = bgelrl+ 0
|
232
|
+
0x4c,0xe8,0x04,0x21 = bgectrl+ 2
|
233
|
+
0x4c,0xe0,0x04,0x21 = bgectrl+ 0
|
234
|
+
0x4c,0xc8,0x00,0x20 = bgelr- 2
|
235
|
+
0x4c,0xc0,0x00,0x20 = bgelr- 0
|
236
|
+
0x4c,0xc8,0x04,0x20 = bgectr- 2
|
237
|
+
0x4c,0xc0,0x04,0x20 = bgectr- 0
|
238
|
+
0x4c,0xc8,0x00,0x21 = bgelrl- 2
|
239
|
+
0x4c,0xc0,0x00,0x21 = bgelrl- 0
|
240
|
+
0x4c,0xc8,0x04,0x21 = bgectrl- 2
|
241
|
+
0x4c,0xc0,0x04,0x21 = bgectrl- 0
|
242
|
+
0x4c,0x8a,0x00,0x20 = bnelr 2
|
243
|
+
0x4c,0x82,0x00,0x20 = bnelr 0
|
244
|
+
0x4c,0x8a,0x04,0x20 = bnectr 2
|
245
|
+
0x4c,0x82,0x04,0x20 = bnectr 0
|
246
|
+
0x4c,0x8a,0x00,0x21 = bnelrl 2
|
247
|
+
0x4c,0x82,0x00,0x21 = bnelrl 0
|
248
|
+
0x4c,0x8a,0x04,0x21 = bnectrl 2
|
249
|
+
0x4c,0x82,0x04,0x21 = bnectrl 0
|
250
|
+
0x4c,0xea,0x00,0x20 = bnelr+ 2
|
251
|
+
0x4c,0xe2,0x00,0x20 = bnelr+ 0
|
252
|
+
0x4c,0xea,0x04,0x20 = bnectr+ 2
|
253
|
+
0x4c,0xe2,0x04,0x20 = bnectr+ 0
|
254
|
+
0x4c,0xea,0x00,0x21 = bnelrl+ 2
|
255
|
+
0x4c,0xe2,0x00,0x21 = bnelrl+ 0
|
256
|
+
0x4c,0xea,0x04,0x21 = bnectrl+ 2
|
257
|
+
0x4c,0xe2,0x04,0x21 = bnectrl+ 0
|
258
|
+
0x4c,0xca,0x00,0x20 = bnelr- 2
|
259
|
+
0x4c,0xc2,0x00,0x20 = bnelr- 0
|
260
|
+
0x4c,0xca,0x04,0x20 = bnectr- 2
|
261
|
+
0x4c,0xc2,0x04,0x20 = bnectr- 0
|
262
|
+
0x4c,0xca,0x00,0x21 = bnelrl- 2
|
263
|
+
0x4c,0xc2,0x00,0x21 = bnelrl- 0
|
264
|
+
0x4c,0xca,0x04,0x21 = bnectrl- 2
|
265
|
+
0x4c,0xc2,0x04,0x21 = bnectrl- 0
|
266
|
+
0x4c,0x89,0x00,0x20 = blelr 2
|
267
|
+
0x4c,0x81,0x00,0x20 = blelr 0
|
268
|
+
0x4c,0x89,0x04,0x20 = blectr 2
|
269
|
+
0x4c,0x81,0x04,0x20 = blectr 0
|
270
|
+
0x4c,0x89,0x00,0x21 = blelrl 2
|
271
|
+
0x4c,0x81,0x00,0x21 = blelrl 0
|
272
|
+
0x4c,0x89,0x04,0x21 = blectrl 2
|
273
|
+
0x4c,0x81,0x04,0x21 = blectrl 0
|
274
|
+
0x4c,0xe9,0x00,0x20 = blelr+ 2
|
275
|
+
0x4c,0xe1,0x00,0x20 = blelr+ 0
|
276
|
+
0x4c,0xe9,0x04,0x20 = blectr+ 2
|
277
|
+
0x4c,0xe1,0x04,0x20 = blectr+ 0
|
278
|
+
0x4c,0xe9,0x00,0x21 = blelrl+ 2
|
279
|
+
0x4c,0xe1,0x00,0x21 = blelrl+ 0
|
280
|
+
0x4c,0xe9,0x04,0x21 = blectrl+ 2
|
281
|
+
0x4c,0xe1,0x04,0x21 = blectrl+ 0
|
282
|
+
0x4c,0xc9,0x00,0x20 = blelr- 2
|
283
|
+
0x4c,0xc1,0x00,0x20 = blelr- 0
|
284
|
+
0x4c,0xc9,0x04,0x20 = blectr- 2
|
285
|
+
0x4c,0xc1,0x04,0x20 = blectr- 0
|
286
|
+
0x4c,0xc9,0x00,0x21 = blelrl- 2
|
287
|
+
0x4c,0xc1,0x00,0x21 = blelrl- 0
|
288
|
+
0x4c,0xc9,0x04,0x21 = blectrl- 2
|
289
|
+
0x4c,0xc1,0x04,0x21 = blectrl- 0
|
290
|
+
0x4d,0x8b,0x00,0x20 = bunlr 2
|
291
|
+
0x4d,0x83,0x00,0x20 = bunlr 0
|
292
|
+
0x4d,0x8b,0x04,0x20 = bunctr 2
|
293
|
+
0x4d,0x83,0x04,0x20 = bunctr 0
|
294
|
+
0x4d,0x8b,0x00,0x21 = bunlrl 2
|
295
|
+
0x4d,0x83,0x00,0x21 = bunlrl 0
|
296
|
+
0x4d,0x8b,0x04,0x21 = bunctrl 2
|
297
|
+
0x4d,0x83,0x04,0x21 = bunctrl 0
|
298
|
+
0x4d,0xeb,0x00,0x20 = bunlr+ 2
|
299
|
+
0x4d,0xe3,0x00,0x20 = bunlr+ 0
|
300
|
+
0x4d,0xeb,0x04,0x20 = bunctr+ 2
|
301
|
+
0x4d,0xe3,0x04,0x20 = bunctr+ 0
|
302
|
+
0x4d,0xeb,0x00,0x21 = bunlrl+ 2
|
303
|
+
0x4d,0xe3,0x00,0x21 = bunlrl+ 0
|
304
|
+
0x4d,0xeb,0x04,0x21 = bunctrl+ 2
|
305
|
+
0x4d,0xe3,0x04,0x21 = bunctrl+ 0
|
306
|
+
0x4d,0xcb,0x00,0x20 = bunlr- 2
|
307
|
+
0x4d,0xc3,0x00,0x20 = bunlr- 0
|
308
|
+
0x4d,0xcb,0x04,0x20 = bunctr- 2
|
309
|
+
0x4d,0xc3,0x04,0x20 = bunctr- 0
|
310
|
+
0x4d,0xcb,0x00,0x21 = bunlrl- 2
|
311
|
+
0x4d,0xc3,0x00,0x21 = bunlrl- 0
|
312
|
+
0x4d,0xcb,0x04,0x21 = bunctrl- 2
|
313
|
+
0x4d,0xc3,0x04,0x21 = bunctrl- 0
|
314
|
+
0x4c,0x8b,0x00,0x20 = bnulr 2
|
315
|
+
0x4c,0x83,0x00,0x20 = bnulr 0
|
316
|
+
0x4c,0x8b,0x04,0x20 = bnuctr 2
|
317
|
+
0x4c,0x83,0x04,0x20 = bnuctr 0
|
318
|
+
0x4c,0x8b,0x00,0x21 = bnulrl 2
|
319
|
+
0x4c,0x83,0x00,0x21 = bnulrl 0
|
320
|
+
0x4c,0x8b,0x04,0x21 = bnuctrl 2
|
321
|
+
0x4c,0x83,0x04,0x21 = bnuctrl 0
|
322
|
+
0x4c,0xeb,0x00,0x20 = bnulr+ 2
|
323
|
+
0x4c,0xe3,0x00,0x20 = bnulr+ 0
|
324
|
+
0x4c,0xeb,0x04,0x20 = bnuctr+ 2
|
325
|
+
0x4c,0xe3,0x04,0x20 = bnuctr+ 0
|
326
|
+
0x4c,0xeb,0x00,0x21 = bnulrl+ 2
|
327
|
+
0x4c,0xe3,0x00,0x21 = bnulrl+ 0
|
328
|
+
0x4c,0xeb,0x04,0x21 = bnuctrl+ 2
|
329
|
+
0x4c,0xe3,0x04,0x21 = bnuctrl+ 0
|
330
|
+
0x4c,0xcb,0x00,0x20 = bnulr- 2
|
331
|
+
0x4c,0xc3,0x00,0x20 = bnulr- 0
|
332
|
+
0x4c,0xcb,0x04,0x20 = bnuctr- 2
|
333
|
+
0x4c,0xc3,0x04,0x20 = bnuctr- 0
|
334
|
+
0x4c,0xcb,0x00,0x21 = bnulrl- 2
|
335
|
+
0x4c,0xc3,0x00,0x21 = bnulrl- 0
|
336
|
+
0x4c,0xcb,0x04,0x21 = bnuctrl- 2
|
337
|
+
0x4c,0xc3,0x04,0x21 = bnuctrl- 0
|
338
|
+
0x4d,0x8b,0x00,0x20 = bunlr 2
|
339
|
+
0x4d,0x83,0x00,0x20 = bunlr 0
|
340
|
+
0x4d,0x8b,0x04,0x20 = bunctr 2
|
341
|
+
0x4d,0x83,0x04,0x20 = bunctr 0
|
342
|
+
0x4d,0x8b,0x00,0x21 = bunlrl 2
|
343
|
+
0x4d,0x83,0x00,0x21 = bunlrl 0
|
344
|
+
0x4d,0x8b,0x04,0x21 = bunctrl 2
|
345
|
+
0x4d,0x83,0x04,0x21 = bunctrl 0
|
346
|
+
0x4d,0xeb,0x00,0x20 = bunlr+ 2
|
347
|
+
0x4d,0xe3,0x00,0x20 = bunlr+ 0
|
348
|
+
0x4d,0xeb,0x04,0x20 = bunctr+ 2
|
349
|
+
0x4d,0xe3,0x04,0x20 = bunctr+ 0
|
350
|
+
0x4d,0xeb,0x00,0x21 = bunlrl+ 2
|
351
|
+
0x4d,0xe3,0x00,0x21 = bunlrl+ 0
|
352
|
+
0x4d,0xeb,0x04,0x21 = bunctrl+ 2
|
353
|
+
0x4d,0xe3,0x04,0x21 = bunctrl+ 0
|
354
|
+
0x4d,0xcb,0x00,0x20 = bunlr- 2
|
355
|
+
0x4d,0xc3,0x00,0x20 = bunlr- 0
|
356
|
+
0x4d,0xcb,0x04,0x20 = bunctr- 2
|
357
|
+
0x4d,0xc3,0x04,0x20 = bunctr- 0
|
358
|
+
0x4d,0xcb,0x00,0x21 = bunlrl- 2
|
359
|
+
0x4d,0xc3,0x00,0x21 = bunlrl- 0
|
360
|
+
0x4d,0xcb,0x04,0x21 = bunctrl- 2
|
361
|
+
0x4d,0xc3,0x04,0x21 = bunctrl- 0
|
362
|
+
0x4c,0x8b,0x00,0x20 = bnulr 2
|
363
|
+
0x4c,0x83,0x00,0x20 = bnulr 0
|
364
|
+
0x4c,0x8b,0x04,0x20 = bnuctr 2
|
365
|
+
0x4c,0x83,0x04,0x20 = bnuctr 0
|
366
|
+
0x4c,0x8b,0x00,0x21 = bnulrl 2
|
367
|
+
0x4c,0x83,0x00,0x21 = bnulrl 0
|
368
|
+
0x4c,0x8b,0x04,0x21 = bnuctrl 2
|
369
|
+
0x4c,0x83,0x04,0x21 = bnuctrl 0
|
370
|
+
0x4c,0xeb,0x00,0x20 = bnulr+ 2
|
371
|
+
0x4c,0xe3,0x00,0x20 = bnulr+ 0
|
372
|
+
0x4c,0xeb,0x04,0x20 = bnuctr+ 2
|
373
|
+
0x4c,0xe3,0x04,0x20 = bnuctr+ 0
|
374
|
+
0x4c,0xeb,0x00,0x21 = bnulrl+ 2
|
375
|
+
0x4c,0xe3,0x00,0x21 = bnulrl+ 0
|
376
|
+
0x4c,0xeb,0x04,0x21 = bnuctrl+ 2
|
377
|
+
0x4c,0xe3,0x04,0x21 = bnuctrl+ 0
|
378
|
+
0x4c,0xcb,0x00,0x20 = bnulr- 2
|
379
|
+
0x4c,0xc3,0x00,0x20 = bnulr- 0
|
380
|
+
0x4c,0xcb,0x04,0x20 = bnuctr- 2
|
381
|
+
0x4c,0xc3,0x04,0x20 = bnuctr- 0
|
382
|
+
0x4c,0xcb,0x00,0x21 = bnulrl- 2
|
383
|
+
0x4c,0xc3,0x00,0x21 = bnulrl- 0
|
384
|
+
0x4c,0xcb,0x04,0x21 = bnuctrl- 2
|
385
|
+
0x4c,0xc3,0x04,0x21 = bnuctrl- 0
|
386
|
+
0x4c,0x42,0x12,0x42 = creqv 2, 2, 2
|
387
|
+
0x4c,0x42,0x11,0x82 = crxor 2, 2, 2
|
388
|
+
0x4c,0x43,0x1b,0x82 = cror 2, 3, 3
|
389
|
+
0x4c,0x43,0x18,0x42 = crnor 2, 3, 3
|
390
|
+
0x38,0x43,0xff,0x80 = addi 2, 3, -128
|
391
|
+
0x3c,0x43,0xff,0x80 = addis 2, 3, -128
|
392
|
+
0x30,0x43,0xff,0x80 = addic 2, 3, -128
|
393
|
+
0x34,0x43,0xff,0x80 = addic. 2, 3, -128
|
394
|
+
0x7c,0x44,0x18,0x50 = subf 2, 4, 3
|
395
|
+
0x7c,0x44,0x18,0x51 = subf. 2, 4, 3
|
396
|
+
0x7c,0x44,0x18,0x10 = subfc 2, 4, 3
|
397
|
+
0x7c,0x44,0x18,0x11 = subfc. 2, 4, 3
|
398
|
+
0x2d,0x23,0x00,0x80 = cmpdi 2, 3, 128
|
399
|
+
0x2c,0x23,0x00,0x80 = cmpdi 0, 3, 128
|
400
|
+
0x7d,0x23,0x20,0x00 = cmpd 2, 3, 4
|
401
|
+
0x7c,0x23,0x20,0x00 = cmpd 0, 3, 4
|
402
|
+
0x29,0x23,0x00,0x80 = cmpldi 2, 3, 128
|
403
|
+
0x28,0x23,0x00,0x80 = cmpldi 0, 3, 128
|
404
|
+
0x7d,0x23,0x20,0x40 = cmpld 2, 3, 4
|
405
|
+
0x7c,0x23,0x20,0x40 = cmpld 0, 3, 4
|
406
|
+
0x2d,0x03,0x00,0x80 = cmpwi 2, 3, 128
|
407
|
+
0x2c,0x03,0x00,0x80 = cmpwi 0, 3, 128
|
408
|
+
0x7d,0x03,0x20,0x00 = cmpw 2, 3, 4
|
409
|
+
0x7c,0x03,0x20,0x00 = cmpw 0, 3, 4
|
410
|
+
0x29,0x03,0x00,0x80 = cmplwi 2, 3, 128
|
411
|
+
0x28,0x03,0x00,0x80 = cmplwi 0, 3, 128
|
412
|
+
0x7d,0x03,0x20,0x40 = cmplw 2, 3, 4
|
413
|
+
0x7c,0x03,0x20,0x40 = cmplw 0, 3, 4
|
414
|
+
0x0e,0x03,0x00,0x04 = twi 16, 3, 4
|
415
|
+
0x7e,0x03,0x20,0x08 = tw 16, 3, 4
|
416
|
+
0x0a,0x03,0x00,0x04 = tdi 16, 3, 4
|
417
|
+
0x7e,0x03,0x20,0x88 = td 16, 3, 4
|
418
|
+
0x0e,0x83,0x00,0x04 = twi 20, 3, 4
|
419
|
+
0x7e,0x83,0x20,0x08 = tw 20, 3, 4
|
420
|
+
0x0a,0x83,0x00,0x04 = tdi 20, 3, 4
|
421
|
+
0x7e,0x83,0x20,0x88 = td 20, 3, 4
|
422
|
+
0x0c,0x83,0x00,0x04 = twi 4, 3, 4
|
423
|
+
0x7c,0x83,0x20,0x08 = tw 4, 3, 4
|
424
|
+
0x08,0x83,0x00,0x04 = tdi 4, 3, 4
|
425
|
+
0x7c,0x83,0x20,0x88 = td 4, 3, 4
|
426
|
+
0x0d,0x83,0x00,0x04 = twi 12, 3, 4
|
427
|
+
0x7d,0x83,0x20,0x08 = tw 12, 3, 4
|
428
|
+
0x09,0x83,0x00,0x04 = tdi 12, 3, 4
|
429
|
+
0x7d,0x83,0x20,0x88 = td 12, 3, 4
|
430
|
+
0x0d,0x03,0x00,0x04 = twi 8, 3, 4
|
431
|
+
0x7d,0x03,0x20,0x08 = tw 8, 3, 4
|
432
|
+
0x09,0x03,0x00,0x04 = tdi 8, 3, 4
|
433
|
+
0x7d,0x03,0x20,0x88 = td 8, 3, 4
|
434
|
+
0x0d,0x83,0x00,0x04 = twi 12, 3, 4
|
435
|
+
0x7d,0x83,0x20,0x08 = tw 12, 3, 4
|
436
|
+
0x09,0x83,0x00,0x04 = tdi 12, 3, 4
|
437
|
+
0x7d,0x83,0x20,0x88 = td 12, 3, 4
|
438
|
+
0x0f,0x03,0x00,0x04 = twi 24, 3, 4
|
439
|
+
0x7f,0x03,0x20,0x08 = tw 24, 3, 4
|
440
|
+
0x0b,0x03,0x00,0x04 = tdi 24, 3, 4
|
441
|
+
0x7f,0x03,0x20,0x88 = td 24, 3, 4
|
442
|
+
0x0e,0x83,0x00,0x04 = twi 20, 3, 4
|
443
|
+
0x7e,0x83,0x20,0x08 = tw 20, 3, 4
|
444
|
+
0x0a,0x83,0x00,0x04 = tdi 20, 3, 4
|
445
|
+
0x7e,0x83,0x20,0x88 = td 20, 3, 4
|
446
|
+
0x0c,0x43,0x00,0x04 = twi 2, 3, 4
|
447
|
+
0x7c,0x43,0x20,0x08 = tw 2, 3, 4
|
448
|
+
0x08,0x43,0x00,0x04 = tdi 2, 3, 4
|
449
|
+
0x7c,0x43,0x20,0x88 = td 2, 3, 4
|
450
|
+
0x0c,0xc3,0x00,0x04 = twi 6, 3, 4
|
451
|
+
0x7c,0xc3,0x20,0x08 = tw 6, 3, 4
|
452
|
+
0x08,0xc3,0x00,0x04 = tdi 6, 3, 4
|
453
|
+
0x7c,0xc3,0x20,0x88 = td 6, 3, 4
|
454
|
+
0x0c,0xa3,0x00,0x04 = twi 5, 3, 4
|
455
|
+
0x7c,0xa3,0x20,0x08 = tw 5, 3, 4
|
456
|
+
0x08,0xa3,0x00,0x04 = tdi 5, 3, 4
|
457
|
+
0x7c,0xa3,0x20,0x88 = td 5, 3, 4
|
458
|
+
0x0c,0x23,0x00,0x04 = twi 1, 3, 4
|
459
|
+
0x7c,0x23,0x20,0x08 = tw 1, 3, 4
|
460
|
+
0x08,0x23,0x00,0x04 = tdi 1, 3, 4
|
461
|
+
0x7c,0x23,0x20,0x88 = td 1, 3, 4
|
462
|
+
0x0c,0xa3,0x00,0x04 = twi 5, 3, 4
|
463
|
+
0x7c,0xa3,0x20,0x08 = tw 5, 3, 4
|
464
|
+
0x08,0xa3,0x00,0x04 = tdi 5, 3, 4
|
465
|
+
0x7c,0xa3,0x20,0x88 = td 5, 3, 4
|
466
|
+
0x0c,0xc3,0x00,0x04 = twi 6, 3, 4
|
467
|
+
0x7c,0xc3,0x20,0x08 = tw 6, 3, 4
|
468
|
+
0x08,0xc3,0x00,0x04 = tdi 6, 3, 4
|
469
|
+
0x7c,0xc3,0x20,0x88 = td 6, 3, 4
|
470
|
+
0x0f,0xe3,0x00,0x04 = twi 31, 3, 4
|
471
|
+
0x7f,0xe3,0x20,0x08 = tw 31, 3, 4
|
472
|
+
0x0b,0xe3,0x00,0x04 = tdi 31, 3, 4
|
473
|
+
0x7f,0xe3,0x20,0x88 = td 31, 3, 4
|
474
|
+
0x7f,0xe0,0x00,0x08 = trap
|
475
|
+
0x78,0x62,0x28,0xc4 = rldicr 2, 3, 5, 3
|
476
|
+
0x78,0x62,0x28,0xc5 = rldicr. 2, 3, 5, 3
|
477
|
+
0x78,0x62,0x4f,0x20 = rldicl 2, 3, 9, 60
|
478
|
+
0x78,0x62,0x4f,0x21 = rldicl. 2, 3, 9, 60
|
479
|
+
0x78,0x62,0xb9,0x4e = rldimi 2, 3, 55, 5
|
480
|
+
0x78,0x62,0xb9,0x4f = rldimi. 2, 3, 55, 5
|
481
|
+
0x78,0x62,0x20,0x00 = rldicl 2, 3, 4, 0
|
482
|
+
0x78,0x62,0x20,0x01 = rldicl. 2, 3, 4, 0
|
483
|
+
0x78,0x62,0xe0,0x02 = rldicl 2, 3, 60, 0
|
484
|
+
0x78,0x62,0xe0,0x03 = rldicl. 2, 3, 60, 0
|
485
|
+
0x78,0x62,0x20,0x10 = rldcl 2, 3, 4, 0
|
486
|
+
0x78,0x62,0x20,0x11 = rldcl. 2, 3, 4, 0
|
487
|
+
0x78,0x62,0x26,0xe4 = sldi 2, 3, 4
|
488
|
+
0x78,0x62,0x26,0xe5 = rldicr. 2, 3, 4, 59
|
489
|
+
0x78,0x62,0xe1,0x02 = rldicl 2, 3, 60, 4
|
490
|
+
0x78,0x62,0xe1,0x03 = rldicl. 2, 3, 60, 4
|
491
|
+
0x78,0x62,0x01,0x00 = rldicl 2, 3, 0, 4
|
492
|
+
0x78,0x62,0x01,0x01 = rldicl. 2, 3, 0, 4
|
493
|
+
0x78,0x62,0x06,0xe4 = rldicr 2, 3, 0, 59
|
494
|
+
0x78,0x62,0x06,0xe5 = rldicr. 2, 3, 0, 59
|
495
|
+
0x78,0x62,0x20,0x48 = rldic 2, 3, 4, 1
|
496
|
+
0x78,0x62,0x20,0x49 = rldic. 2, 3, 4, 1
|
497
|
+
0x54,0x62,0x28,0x06 = rlwinm 2, 3, 5, 0, 3
|
498
|
+
0x54,0x62,0x28,0x07 = rlwinm. 2, 3, 5, 0, 3
|
499
|
+
0x54,0x62,0x4f,0x3e = rlwinm 2, 3, 9, 28, 31
|
500
|
+
0x54,0x62,0x4f,0x3f = rlwinm. 2, 3, 9, 28, 31
|
501
|
+
0x50,0x62,0xd9,0x50 = rlwimi 2, 3, 27, 5, 8
|
502
|
+
0x50,0x62,0xd9,0x51 = rlwimi. 2, 3, 27, 5, 8
|
503
|
+
0x50,0x62,0xb9,0x50 = rlwimi 2, 3, 23, 5, 8
|
504
|
+
0x50,0x62,0xb9,0x51 = rlwimi. 2, 3, 23, 5, 8
|
505
|
+
0x54,0x62,0x20,0x3e = rlwinm 2, 3, 4, 0, 31
|
506
|
+
0x54,0x62,0x20,0x3f = rlwinm. 2, 3, 4, 0, 31
|
507
|
+
0x54,0x62,0xe0,0x3e = rlwinm 2, 3, 28, 0, 31
|
508
|
+
0x54,0x62,0xe0,0x3f = rlwinm. 2, 3, 28, 0, 31
|
509
|
+
0x5c,0x62,0x20,0x3e = rlwnm 2, 3, 4, 0, 31
|
510
|
+
0x5c,0x62,0x20,0x3f = rlwnm. 2, 3, 4, 0, 31
|
511
|
+
0x54,0x62,0x20,0x36 = slwi 2, 3, 4
|
512
|
+
0x54,0x62,0x20,0x37 = rlwinm. 2, 3, 4, 0, 27
|
513
|
+
0x54,0x62,0xe1,0x3e = srwi 2, 3, 4
|
514
|
+
0x54,0x62,0xe1,0x3f = rlwinm. 2, 3, 28, 4, 31
|
515
|
+
0x54,0x62,0x01,0x3e = rlwinm 2, 3, 0, 4, 31
|
516
|
+
0x54,0x62,0x01,0x3f = rlwinm. 2, 3, 0, 4, 31
|
517
|
+
0x54,0x62,0x00,0x36 = rlwinm 2, 3, 0, 0, 27
|
518
|
+
0x54,0x62,0x00,0x37 = rlwinm. 2, 3, 0, 0, 27
|
519
|
+
0x54,0x62,0x20,0x76 = rlwinm 2, 3, 4, 1, 27
|
520
|
+
0x54,0x62,0x20,0x77 = rlwinm. 2, 3, 4, 1, 27
|
521
|
+
0x7c,0x41,0x03,0xa6 = mtspr 1, 2
|
522
|
+
0x7c,0x41,0x02,0xa6 = mfspr 2, 1
|
523
|
+
0x7c,0x48,0x03,0xa6 = mtlr 2
|
524
|
+
0x7c,0x48,0x02,0xa6 = mflr 2
|
525
|
+
0x7c,0x49,0x03,0xa6 = mtctr 2
|
526
|
+
0x7c,0x49,0x02,0xa6 = mfctr 2
|
527
|
+
0x60,0x00,0x00,0x00 = nop
|
528
|
+
0x68,0x00,0x00,0x00 = xori 0, 0, 0
|
529
|
+
0x38,0x40,0x00,0x80 = li 2, 128
|
530
|
+
0x3c,0x40,0x00,0x80 = lis 2, 128
|
531
|
+
0x7c,0x62,0x1b,0x78 = mr 2, 3
|
532
|
+
0x7c,0x62,0x1b,0x79 = or. 2, 3, 3
|
533
|
+
0x7c,0x62,0x18,0xf8 = nor 2, 3, 3
|
534
|
+
0x7c,0x62,0x18,0xf9 = nor. 2, 3, 3
|
535
|
+
0x7c,0x4f,0xf1,0x20 = mtcrf 255, 2
|