crabstone 3.0.3

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (302) hide show
  1. checksums.yaml +7 -0
  2. data/CHANGES.md +61 -0
  3. data/LICENSE +25 -0
  4. data/MANIFEST +312 -0
  5. data/README.md +103 -0
  6. data/Rakefile +27 -0
  7. data/bin/genconst +66 -0
  8. data/bin/genreg +99 -0
  9. data/crabstone.gemspec +27 -0
  10. data/examples/hello_world.rb +43 -0
  11. data/lib/arch/arm.rb +128 -0
  12. data/lib/arch/arm64.rb +167 -0
  13. data/lib/arch/arm64_const.rb +1055 -0
  14. data/lib/arch/arm64_registers.rb +295 -0
  15. data/lib/arch/arm_const.rb +777 -0
  16. data/lib/arch/arm_registers.rb +149 -0
  17. data/lib/arch/mips.rb +78 -0
  18. data/lib/arch/mips_const.rb +850 -0
  19. data/lib/arch/mips_registers.rb +208 -0
  20. data/lib/arch/ppc.rb +90 -0
  21. data/lib/arch/ppc_const.rb +1181 -0
  22. data/lib/arch/ppc_registers.rb +209 -0
  23. data/lib/arch/sparc.rb +79 -0
  24. data/lib/arch/sparc_const.rb +461 -0
  25. data/lib/arch/sparc_registers.rb +121 -0
  26. data/lib/arch/systemz.rb +79 -0
  27. data/lib/arch/sysz_const.rb +779 -0
  28. data/lib/arch/sysz_registers.rb +66 -0
  29. data/lib/arch/x86.rb +107 -0
  30. data/lib/arch/x86_const.rb +1698 -0
  31. data/lib/arch/x86_registers.rb +265 -0
  32. data/lib/arch/xcore.rb +78 -0
  33. data/lib/arch/xcore_const.rb +185 -0
  34. data/lib/arch/xcore_registers.rb +57 -0
  35. data/lib/crabstone.rb +564 -0
  36. data/test/MC/AArch64/basic-a64-instructions.s.cs +2014 -0
  37. data/test/MC/AArch64/gicv3-regs.s.cs +111 -0
  38. data/test/MC/AArch64/neon-2velem.s.cs +113 -0
  39. data/test/MC/AArch64/neon-3vdiff.s.cs +143 -0
  40. data/test/MC/AArch64/neon-aba-abd.s.cs +28 -0
  41. data/test/MC/AArch64/neon-across.s.cs +40 -0
  42. data/test/MC/AArch64/neon-add-pairwise.s.cs +11 -0
  43. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +21 -0
  44. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +17 -0
  45. data/test/MC/AArch64/neon-compare-instructions.s.cs +136 -0
  46. data/test/MC/AArch64/neon-crypto.s.cs +15 -0
  47. data/test/MC/AArch64/neon-extract.s.cs +3 -0
  48. data/test/MC/AArch64/neon-facge-facgt.s.cs +13 -0
  49. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +7 -0
  50. data/test/MC/AArch64/neon-halving-add-sub.s.cs +25 -0
  51. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +37 -0
  52. data/test/MC/AArch64/neon-max-min.s.cs +37 -0
  53. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +19 -0
  54. data/test/MC/AArch64/neon-mov.s.cs +74 -0
  55. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +24 -0
  56. data/test/MC/AArch64/neon-perm.s.cs +43 -0
  57. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +13 -0
  58. data/test/MC/AArch64/neon-rounding-shift.s.cs +15 -0
  59. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +29 -0
  60. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +15 -0
  61. data/test/MC/AArch64/neon-saturating-shift.s.cs +15 -0
  62. data/test/MC/AArch64/neon-scalar-abs.s.cs +8 -0
  63. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +3 -0
  64. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +13 -0
  65. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +13 -0
  66. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +15 -0
  67. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +18 -0
  68. data/test/MC/AArch64/neon-scalar-compare.s.cs +12 -0
  69. data/test/MC/AArch64/neon-scalar-cvt.s.cs +34 -0
  70. data/test/MC/AArch64/neon-scalar-dup.s.cs +23 -0
  71. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +10 -0
  72. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +21 -0
  73. data/test/MC/AArch64/neon-scalar-mul.s.cs +13 -0
  74. data/test/MC/AArch64/neon-scalar-neg.s.cs +6 -0
  75. data/test/MC/AArch64/neon-scalar-recip.s.cs +11 -0
  76. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +3 -0
  77. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +3 -0
  78. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +25 -0
  79. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +9 -0
  80. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +9 -0
  81. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +42 -0
  82. data/test/MC/AArch64/neon-scalar-shift.s.cs +3 -0
  83. data/test/MC/AArch64/neon-shift-left-long.s.cs +13 -0
  84. data/test/MC/AArch64/neon-shift.s.cs +22 -0
  85. data/test/MC/AArch64/neon-simd-copy.s.cs +42 -0
  86. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +197 -0
  87. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +129 -0
  88. data/test/MC/AArch64/neon-simd-misc.s.cs +213 -0
  89. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +107 -0
  90. data/test/MC/AArch64/neon-simd-shift.s.cs +151 -0
  91. data/test/MC/AArch64/neon-tbl.s.cs +21 -0
  92. data/test/MC/AArch64/trace-regs.s.cs +383 -0
  93. data/test/MC/ARM/arm-aliases.s.cs +7 -0
  94. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +50 -0
  95. data/test/MC/ARM/arm-it-block.s.cs +2 -0
  96. data/test/MC/ARM/arm-memory-instructions.s.cs +138 -0
  97. data/test/MC/ARM/arm-shift-encoding.s.cs +50 -0
  98. data/test/MC/ARM/arm-thumb-trustzone.s.cs +3 -0
  99. data/test/MC/ARM/arm-trustzone.s.cs +3 -0
  100. data/test/MC/ARM/arm_addrmode2.s.cs +15 -0
  101. data/test/MC/ARM/arm_addrmode3.s.cs +9 -0
  102. data/test/MC/ARM/arm_instructions.s.cs +25 -0
  103. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +10 -0
  104. data/test/MC/ARM/basic-arm-instructions.s.cs +997 -0
  105. data/test/MC/ARM/basic-thumb-instructions.s.cs +130 -0
  106. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +1 -0
  107. data/test/MC/ARM/basic-thumb2-instructions.s.cs +1242 -0
  108. data/test/MC/ARM/crc32-thumb.s.cs +7 -0
  109. data/test/MC/ARM/crc32.s.cs +7 -0
  110. data/test/MC/ARM/dot-req.s.cs +3 -0
  111. data/test/MC/ARM/fp-armv8.s.cs +52 -0
  112. data/test/MC/ARM/idiv-thumb.s.cs +3 -0
  113. data/test/MC/ARM/idiv.s.cs +3 -0
  114. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +15 -0
  115. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +15 -0
  116. data/test/MC/ARM/mode-switch.s.cs +7 -0
  117. data/test/MC/ARM/neon-abs-encoding.s.cs +15 -0
  118. data/test/MC/ARM/neon-absdiff-encoding.s.cs +39 -0
  119. data/test/MC/ARM/neon-add-encoding.s.cs +119 -0
  120. data/test/MC/ARM/neon-bitcount-encoding.s.cs +15 -0
  121. data/test/MC/ARM/neon-bitwise-encoding.s.cs +126 -0
  122. data/test/MC/ARM/neon-cmp-encoding.s.cs +88 -0
  123. data/test/MC/ARM/neon-convert-encoding.s.cs +27 -0
  124. data/test/MC/ARM/neon-crypto.s.cs +16 -0
  125. data/test/MC/ARM/neon-dup-encoding.s.cs +13 -0
  126. data/test/MC/ARM/neon-minmax-encoding.s.cs +57 -0
  127. data/test/MC/ARM/neon-mov-encoding.s.cs +76 -0
  128. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +39 -0
  129. data/test/MC/ARM/neon-mul-encoding.s.cs +72 -0
  130. data/test/MC/ARM/neon-neg-encoding.s.cs +15 -0
  131. data/test/MC/ARM/neon-pairwise-encoding.s.cs +47 -0
  132. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +13 -0
  133. data/test/MC/ARM/neon-reverse-encoding.s.cs +13 -0
  134. data/test/MC/ARM/neon-satshift-encoding.s.cs +75 -0
  135. data/test/MC/ARM/neon-shift-encoding.s.cs +238 -0
  136. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +97 -0
  137. data/test/MC/ARM/neon-shuffle-encoding.s.cs +59 -0
  138. data/test/MC/ARM/neon-sub-encoding.s.cs +82 -0
  139. data/test/MC/ARM/neon-table-encoding.s.cs +9 -0
  140. data/test/MC/ARM/neon-v8.s.cs +38 -0
  141. data/test/MC/ARM/neon-vld-encoding.s.cs +213 -0
  142. data/test/MC/ARM/neon-vst-encoding.s.cs +120 -0
  143. data/test/MC/ARM/neon-vswp.s.cs +3 -0
  144. data/test/MC/ARM/neont2-abs-encoding.s.cs +15 -0
  145. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +39 -0
  146. data/test/MC/ARM/neont2-add-encoding.s.cs +65 -0
  147. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +15 -0
  148. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +15 -0
  149. data/test/MC/ARM/neont2-cmp-encoding.s.cs +17 -0
  150. data/test/MC/ARM/neont2-convert-encoding.s.cs +19 -0
  151. data/test/MC/ARM/neont2-dup-encoding.s.cs +19 -0
  152. data/test/MC/ARM/neont2-minmax-encoding.s.cs +57 -0
  153. data/test/MC/ARM/neont2-mov-encoding.s.cs +58 -0
  154. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +41 -0
  155. data/test/MC/ARM/neont2-mul-encoding.s.cs +31 -0
  156. data/test/MC/ARM/neont2-neg-encoding.s.cs +15 -0
  157. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +43 -0
  158. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +13 -0
  159. data/test/MC/ARM/neont2-reverse-encoding.s.cs +13 -0
  160. data/test/MC/ARM/neont2-satshift-encoding.s.cs +75 -0
  161. data/test/MC/ARM/neont2-shift-encoding.s.cs +80 -0
  162. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +97 -0
  163. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +23 -0
  164. data/test/MC/ARM/neont2-sub-encoding.s.cs +23 -0
  165. data/test/MC/ARM/neont2-table-encoding.s.cs +9 -0
  166. data/test/MC/ARM/neont2-vld-encoding.s.cs +51 -0
  167. data/test/MC/ARM/neont2-vst-encoding.s.cs +48 -0
  168. data/test/MC/ARM/simple-fp-encoding.s.cs +157 -0
  169. data/test/MC/ARM/thumb-fp-armv8.s.cs +51 -0
  170. data/test/MC/ARM/thumb-hints.s.cs +12 -0
  171. data/test/MC/ARM/thumb-neon-crypto.s.cs +16 -0
  172. data/test/MC/ARM/thumb-neon-v8.s.cs +38 -0
  173. data/test/MC/ARM/thumb-shift-encoding.s.cs +19 -0
  174. data/test/MC/ARM/thumb.s.cs +19 -0
  175. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +2 -0
  176. data/test/MC/ARM/thumb2-branches.s.cs +85 -0
  177. data/test/MC/ARM/thumb2-mclass.s.cs +41 -0
  178. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +379 -0
  179. data/test/MC/ARM/thumb2-pldw.s.cs +2 -0
  180. data/test/MC/ARM/vfp4-thumb.s.cs +13 -0
  181. data/test/MC/ARM/vfp4.s.cs +13 -0
  182. data/test/MC/ARM/vpush-vpop-thumb.s.cs +9 -0
  183. data/test/MC/ARM/vpush-vpop.s.cs +9 -0
  184. data/test/MC/Mips/hilo-addressing.s.cs +4 -0
  185. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +33 -0
  186. data/test/MC/Mips/micromips-alu-instructions.s.cs +33 -0
  187. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +11 -0
  188. data/test/MC/Mips/micromips-branch-instructions.s.cs +11 -0
  189. data/test/MC/Mips/micromips-expansions.s.cs +20 -0
  190. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +5 -0
  191. data/test/MC/Mips/micromips-jump-instructions.s.cs +6 -0
  192. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +9 -0
  193. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +9 -0
  194. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +5 -0
  195. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +5 -0
  196. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +5 -0
  197. data/test/MC/Mips/micromips-movcond-instructions.s.cs +5 -0
  198. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +5 -0
  199. data/test/MC/Mips/micromips-multiply-instructions.s.cs +5 -0
  200. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +9 -0
  201. data/test/MC/Mips/micromips-shift-instructions.s.cs +9 -0
  202. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +13 -0
  203. data/test/MC/Mips/micromips-trap-instructions.s.cs +13 -0
  204. data/test/MC/Mips/mips-alu-instructions.s.cs +53 -0
  205. data/test/MC/Mips/mips-control-instructions-64.s.cs +33 -0
  206. data/test/MC/Mips/mips-control-instructions.s.cs +33 -0
  207. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +17 -0
  208. data/test/MC/Mips/mips-dsp-instructions.s.cs +43 -0
  209. data/test/MC/Mips/mips-expansions.s.cs +20 -0
  210. data/test/MC/Mips/mips-fpu-instructions.s.cs +93 -0
  211. data/test/MC/Mips/mips-jump-instructions.s.cs +1 -0
  212. data/test/MC/Mips/mips-memory-instructions.s.cs +17 -0
  213. data/test/MC/Mips/mips-register-names.s.cs +33 -0
  214. data/test/MC/Mips/mips64-alu-instructions.s.cs +47 -0
  215. data/test/MC/Mips/mips64-instructions.s.cs +3 -0
  216. data/test/MC/Mips/mips64-register-names.s.cs +33 -0
  217. data/test/MC/Mips/mips_directives.s.cs +12 -0
  218. data/test/MC/Mips/nabi-regs.s.cs +12 -0
  219. data/test/MC/Mips/set-at-directive.s.cs +6 -0
  220. data/test/MC/Mips/test_2r.s.cs +16 -0
  221. data/test/MC/Mips/test_2rf.s.cs +33 -0
  222. data/test/MC/Mips/test_3r.s.cs +243 -0
  223. data/test/MC/Mips/test_3rf.s.cs +83 -0
  224. data/test/MC/Mips/test_bit.s.cs +49 -0
  225. data/test/MC/Mips/test_cbranch.s.cs +11 -0
  226. data/test/MC/Mips/test_ctrlregs.s.cs +33 -0
  227. data/test/MC/Mips/test_elm.s.cs +16 -0
  228. data/test/MC/Mips/test_elm_insert.s.cs +4 -0
  229. data/test/MC/Mips/test_elm_insve.s.cs +5 -0
  230. data/test/MC/Mips/test_i10.s.cs +5 -0
  231. data/test/MC/Mips/test_i5.s.cs +45 -0
  232. data/test/MC/Mips/test_i8.s.cs +11 -0
  233. data/test/MC/Mips/test_lsa.s.cs +5 -0
  234. data/test/MC/Mips/test_mi10.s.cs +24 -0
  235. data/test/MC/Mips/test_vec.s.cs +8 -0
  236. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +25 -0
  237. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +35 -0
  238. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +535 -0
  239. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +110 -0
  240. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +170 -0
  241. data/test/MC/PowerPC/ppc64-encoding.s.cs +202 -0
  242. data/test/MC/PowerPC/ppc64-operands.s.cs +32 -0
  243. data/test/MC/README +6 -0
  244. data/test/MC/Sparc/sparc-alu-instructions.s.cs +47 -0
  245. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +7 -0
  246. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +11 -0
  247. data/test/MC/Sparc/sparc-fp-instructions.s.cs +59 -0
  248. data/test/MC/Sparc/sparc-mem-instructions.s.cs +25 -0
  249. data/test/MC/Sparc/sparc-vis.s.cs +2 -0
  250. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +13 -0
  251. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +102 -0
  252. data/test/MC/Sparc/sparcv8-instructions.s.cs +7 -0
  253. data/test/MC/Sparc/sparcv9-instructions.s.cs +1 -0
  254. data/test/MC/SystemZ/insn-good-z196.s.cs +589 -0
  255. data/test/MC/SystemZ/insn-good.s.cs +2265 -0
  256. data/test/MC/SystemZ/regs-good.s.cs +45 -0
  257. data/test/MC/X86/3DNow.s.cs +29 -0
  258. data/test/MC/X86/address-size.s.cs +5 -0
  259. data/test/MC/X86/avx512-encodings.s.cs +12 -0
  260. data/test/MC/X86/intel-syntax-encoding.s.cs +30 -0
  261. data/test/MC/X86/x86-32-avx.s.cs +833 -0
  262. data/test/MC/X86/x86-32-fma3.s.cs +169 -0
  263. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +27 -0
  264. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +11 -0
  265. data/test/MC/X86/x86_64-avx-encoding.s.cs +1058 -0
  266. data/test/MC/X86/x86_64-bmi-encoding.s.cs +51 -0
  267. data/test/MC/X86/x86_64-encoding.s.cs +59 -0
  268. data/test/MC/X86/x86_64-fma3-encoding.s.cs +169 -0
  269. data/test/MC/X86/x86_64-fma4-encoding.s.cs +98 -0
  270. data/test/MC/X86/x86_64-hle-encoding.s.cs +3 -0
  271. data/test/MC/X86/x86_64-imm-widths.s.cs +27 -0
  272. data/test/MC/X86/x86_64-rand-encoding.s.cs +13 -0
  273. data/test/MC/X86/x86_64-rtm-encoding.s.cs +4 -0
  274. data/test/MC/X86/x86_64-sse4a.s.cs +1 -0
  275. data/test/MC/X86/x86_64-tbm-encoding.s.cs +40 -0
  276. data/test/MC/X86/x86_64-xop-encoding.s.cs +152 -0
  277. data/test/README +6 -0
  278. data/test/test.rb +205 -0
  279. data/test/test.rb.SPEC +235 -0
  280. data/test/test_arm.rb +202 -0
  281. data/test/test_arm.rb.SPEC +275 -0
  282. data/test/test_arm64.rb +150 -0
  283. data/test/test_arm64.rb.SPEC +116 -0
  284. data/test/test_detail.rb +228 -0
  285. data/test/test_detail.rb.SPEC +322 -0
  286. data/test/test_exhaustive.rb +80 -0
  287. data/test/test_mips.rb +118 -0
  288. data/test/test_mips.rb.SPEC +91 -0
  289. data/test/test_ppc.rb +137 -0
  290. data/test/test_ppc.rb.SPEC +84 -0
  291. data/test/test_sanity.rb +83 -0
  292. data/test/test_skipdata.rb +111 -0
  293. data/test/test_skipdata.rb.SPEC +58 -0
  294. data/test/test_sparc.rb +113 -0
  295. data/test/test_sparc.rb.SPEC +116 -0
  296. data/test/test_sysz.rb +111 -0
  297. data/test/test_sysz.rb.SPEC +61 -0
  298. data/test/test_x86.rb +189 -0
  299. data/test/test_x86.rb.SPEC +579 -0
  300. data/test/test_xcore.rb +100 -0
  301. data/test/test_xcore.rb.SPEC +75 -0
  302. metadata +393 -0
@@ -0,0 +1,27 @@
1
+ require 'rake'
2
+ require 'rake/clean'
3
+ require 'rake/testtask'
4
+ require 'rbconfig'
5
+
6
+ CLEAN.include('**/*.rbc', '**/*.rbx', '**/*.gem')
7
+
8
+ namespace 'gem' do
9
+ desc 'Create the crabstone gem'
10
+ task :create => [:clean] do
11
+ spec = eval(IO.read('crabstone.gemspec'))
12
+ Gem::Builder.new(spec).build
13
+ end
14
+
15
+ desc 'Install the crabstone gem'
16
+ task :install => [:create] do
17
+ file = Dir["*.gem"].first
18
+ sh "gem install #{file}"
19
+ end
20
+ end
21
+
22
+ Rake::TestTask.new do |t|
23
+ t.verbose = true
24
+ t.warning = true
25
+ end
26
+
27
+ task :default => :test
@@ -0,0 +1,66 @@
1
+ #!/usr/bin/env ruby
2
+
3
+ require 'date'
4
+
5
+ # I hate these little scripts :(
6
+
7
+ unless ARGV.length == 1
8
+ fail "Usage: #{$0} path/to/capstone/bindings/python/capstone"
9
+ end
10
+
11
+ pyfiles = Dir.glob(File.join(ARGV[0], "*_const.py"))
12
+ if pyfiles.empty?
13
+ fail "No *_const.py files found in #{ARGV[0]}"
14
+ end
15
+
16
+ pyfiles.each {|fn|
17
+
18
+ mod = File.basename(fn).split('_').first.upcase
19
+ python = File.read fn
20
+ rbfn = "#{mod.downcase}_const.rb"
21
+
22
+ # Fixup the odd module names
23
+ mod = case mod
24
+ when 'SYSZ'
25
+ 'SysZ'
26
+ when 'XCORE'
27
+ 'XCore'
28
+ when 'SPARC'
29
+ 'Sparc'
30
+ else
31
+ mod
32
+ end
33
+
34
+ puts "Writing #{mod}"
35
+
36
+ prefix = <<END
37
+ # Library by Nguyen Anh Quynh
38
+ # Original binding by Nguyen Anh Quynh and Tan Sheng Di
39
+ # Additional binding work by Ben Nagy
40
+ # (c) 2013 COSEINC. All Rights Reserved.
41
+
42
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
43
+ # Command: #{$0} #{ARGV[0]}
44
+ # #{DateTime.now}
45
+
46
+ module Crabstone
47
+ module #{mod}
48
+
49
+ END
50
+
51
+ postfix = <<END
52
+ end
53
+ end
54
+ END
55
+
56
+ lines = python.lines[2..-1].map {|l|
57
+ l.gsub(/#{mod.upcase}_/, '').sub(%q(//), ' # ')
58
+ }
59
+
60
+ File.open(rbfn, 'w+') {|fh|
61
+ fh.write prefix
62
+ lines.each {|l| fh.write " #{l}"}
63
+ fh.write postfix
64
+ }
65
+
66
+ }
@@ -0,0 +1,99 @@
1
+ #!/usr/bin/env ruby
2
+
3
+ require 'date'
4
+
5
+ # I hate these little scripts :(
6
+
7
+ unless ARGV.length == 1
8
+ fail "Usage: #{$0} path/to/capstone/bindings/python/capstone"
9
+ end
10
+
11
+ pyfiles = Dir.glob(File.join(ARGV[0], "*_const.py"))
12
+ if pyfiles.empty?
13
+ fail "No *_const.py files found in #{ARGV[0]}"
14
+ end
15
+
16
+ pyfiles.each {|fn|
17
+
18
+ mod = File.basename(fn).split('_').first.upcase
19
+ python = File.read fn
20
+ rbfn = "#{mod.downcase}_registers.rb"
21
+
22
+ # Fixup the odd module names
23
+ mod = case mod
24
+ when 'SYSZ'
25
+ 'SysZ'
26
+ when 'XCORE'
27
+ 'XCore'
28
+ when 'SPARC'
29
+ 'Sparc'
30
+ else
31
+ mod
32
+ end
33
+
34
+ puts "Writing #{mod}"
35
+
36
+ prefix = <<END
37
+ # Library by Nguyen Anh Quynh
38
+ # Original binding by Nguyen Anh Quynh and Tan Sheng Di
39
+ # Additional binding work by Ben Nagy
40
+ # (c) 2013 COSEINC. All Rights Reserved.
41
+
42
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
43
+ # Command: #{$0} #{ARGV[0]}
44
+ # #{DateTime.now}
45
+
46
+ module Crabstone
47
+ module #{mod}
48
+ REG_LOOKUP = {
49
+ END
50
+
51
+ middle = <<END
52
+
53
+ ID_LOOKUP = REG_LOOKUP.invert
54
+
55
+ # alias registers
56
+ END
57
+
58
+ postfix = <<END
59
+ SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
60
+
61
+ def self.register reg
62
+ return reg if ID_LOOKUP[reg]
63
+ return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
64
+ if reg.respond_to? :upcase
65
+ return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
66
+ end
67
+ REG_LOOKUP['INVALID']
68
+ end
69
+
70
+ end
71
+ end
72
+ END
73
+
74
+ lines = python.lines[2..-1].map {|l|
75
+ l.gsub(/#{mod.upcase}_/, '').sub(%q(//), ' # ')
76
+ }
77
+
78
+ File.open(rbfn, 'w+') {|fh|
79
+ fh.write prefix
80
+ registers = lines.map {|l|
81
+ next if l=~ /ENDING/
82
+ if l =~ /^REG_(.*) = (\d+)/
83
+ " '#{$1}' => #{$2}"
84
+ end
85
+ }.compact
86
+ fh.write registers.join(",\n")
87
+ fh.write "\n }\n"
88
+ fh.write middle
89
+ lines.each {|l|
90
+ next if l=~ /ENDING/
91
+ if l =~ /^REG_(.*) = REG_(.*)/
92
+ fh.write " REG_LOOKUP['#{$1}'] = REG_LOOKUP['#{$2}']\n"
93
+ end
94
+ }
95
+ fh.puts
96
+ fh.write postfix
97
+ }
98
+
99
+ }
@@ -0,0 +1,27 @@
1
+ require 'rubygems'
2
+
3
+ Gem::Specification.new do |spec|
4
+ spec.name = 'crabstone'
5
+ spec.version = '3.0.3'
6
+ spec.author = 'Ben Nagy'
7
+ spec.license = 'BSD'
8
+ spec.email = 'crabstone@ben.iagu.net'
9
+ spec.homepage = 'https://github.com/bnagy/crabstone'
10
+ spec.summary = 'Ruby FFI bindings for the capstone disassembly engine'
11
+ spec.test_files = Dir['test/*.rb']
12
+ spec.files = Dir['**/*'].delete_if{ |item| item.include?('git') }
13
+
14
+ spec.extra_rdoc_files = ['CHANGES.md', 'README.md', 'MANIFEST']
15
+
16
+ spec.add_runtime_dependency 'ffi' unless RUBY_PLATFORM =~/java/
17
+ spec.add_development_dependency 'test-unit'
18
+
19
+ spec.description = <<-EOF
20
+
21
+ Capstone is a disassembly engine written by Nguyen Anh Quynh, available here
22
+ https://github.com/aquynh/capstone. This is the Ruby FFI binding. We test
23
+ against MRI 2.0.0, 2.1.0 and JRuby 1.7.8. AFAIK it works with rubinius
24
+ 2.2.1.
25
+
26
+ EOF
27
+ end
@@ -0,0 +1,43 @@
1
+ #!/usr/bin/env ruby
2
+
3
+ # Library by Nguyen Anh Quynh
4
+ # Original binding by Nguyen Anh Quynh and Tan Sheng Di
5
+ # Additional binding work by Ben Nagy
6
+ # (c) 2013 COSEINC. All Rights Reserved.
7
+
8
+ require 'crabstone'
9
+ include Crabstone
10
+
11
+ arm = (
12
+ "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22" <<
13
+ "\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
14
+ )
15
+
16
+ begin
17
+
18
+ cs = Disassembler.new(ARCH_ARM, MODE_ARM)
19
+ puts "Hello from Capstone v #{cs.version.join('.')}!"
20
+ puts "Disasm:"
21
+
22
+ begin
23
+ cs.decomposer = true
24
+
25
+ # disasm is an array of Crabstone::Instruction objects
26
+ disasm = cs.disasm(arm, 0x1000)
27
+
28
+ disasm.each {|i|
29
+ printf("0x%x:\t%s\t\t%s\n",i.address, i.mnemonic, i.op_str)
30
+ }
31
+
32
+ disasm = cs.disasm(arm, 0x1000)
33
+ puts disasm.map {|i| "0x%x:\t%s\t\t%s\n" % [i.address, i.mnemonic, i.op_str]}
34
+
35
+ rescue
36
+ fail "Disassembly error: #{$!} #{$@}"
37
+ ensure
38
+ cs.close
39
+ end
40
+
41
+ rescue
42
+ fail "Unable to open engine: #{$!}"
43
+ end
@@ -0,0 +1,128 @@
1
+ # Library by Nguyen Anh Quynh
2
+ # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
+ # Additional binding work by Ben Nagy
4
+ # (c) 2013 COSEINC. All Rights Reserved.
5
+
6
+ require 'ffi'
7
+
8
+ require_relative 'arm_const'
9
+
10
+ module Crabstone
11
+ module ARM
12
+
13
+ class OperandShift < FFI::Struct
14
+ layout(
15
+ :type, :uint,
16
+ :value, :uint
17
+ )
18
+ end
19
+
20
+ class MemoryOperand < FFI::Struct
21
+ layout(
22
+ :base, :uint,
23
+ :index, :uint,
24
+ :scale, :int,
25
+ :disp, :int
26
+ )
27
+ end
28
+
29
+ class OperandValue < FFI::Union
30
+ layout(
31
+ :reg, :uint,
32
+ :imm, :int32,
33
+ :fp, :double,
34
+ :mem, MemoryOperand,
35
+ :setend, :int
36
+ )
37
+ end
38
+
39
+ class Operand < FFI::Struct
40
+ layout(
41
+ :vector_index, :int,
42
+ :shift, OperandShift,
43
+ :type, :uint,
44
+ :value, OperandValue,
45
+ :subtracted, :bool
46
+ )
47
+
48
+ def value
49
+ case self[:type]
50
+ when *[OP_REG, OP_SYSREG]
51
+ self[:value][:reg]
52
+ when *[OP_IMM, OP_CIMM, OP_PIMM]
53
+ self[:value][:imm]
54
+ when OP_MEM
55
+ self[:value][:mem]
56
+ when OP_FP
57
+ self[:value][:fp]
58
+ when OP_SETEND
59
+ self[:value][:setend]
60
+ else
61
+ nil
62
+ end
63
+ end
64
+
65
+ def reg?
66
+ [OP_REG, OP_SYSREG].include? self[:type]
67
+ end
68
+
69
+ def imm?
70
+ [OP_IMM, OP_CIMM, OP_PIMM].include? self[:type]
71
+ end
72
+
73
+ def cimm?
74
+ self[:type] == OP_CIMM
75
+ end
76
+
77
+ def pimm?
78
+ self[:type] == OP_PIMM
79
+ end
80
+
81
+ def mem?
82
+ self[:type] == OP_MEM
83
+ end
84
+
85
+ def fp?
86
+ self[:type] == OP_FP
87
+ end
88
+
89
+ def sysreg?
90
+ self[:type] == OP_SYSREG
91
+ end
92
+
93
+ def valid?
94
+ [
95
+ OP_MEM,
96
+ OP_IMM,
97
+ OP_CIMM,
98
+ OP_PIMM,
99
+ OP_FP,
100
+ OP_REG,
101
+ OP_SYSREG,
102
+ OP_SETEND
103
+ ].include? self[:type]
104
+ end
105
+ end
106
+
107
+ class Instruction < FFI::Struct
108
+ layout(
109
+ :usermode, :bool,
110
+ :vector_size, :int,
111
+ :vector_data, :int,
112
+ :cps_mode, :int,
113
+ :cps_flag, :int,
114
+ :cc, :uint,
115
+ :update_flags, :bool,
116
+ :writeback, :bool,
117
+ :mem_barrier, :int,
118
+ :op_count, :uint8,
119
+ :operands, [Operand, 36]
120
+ )
121
+
122
+ def operands
123
+ self[:operands].take_while {|op| op[:type].nonzero?}
124
+ end
125
+
126
+ end
127
+ end
128
+ end
@@ -0,0 +1,167 @@
1
+ # Library by Nguyen Anh Quynh
2
+ # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
+ # Additional binding work by Ben Nagy
4
+ # (c) 2013 COSEINC. All Rights Reserved.
5
+
6
+ require 'ffi'
7
+
8
+ require_relative 'arm64_const'
9
+
10
+ module Crabstone
11
+ module ARM64
12
+
13
+
14
+ class OperandShift < FFI::Struct
15
+ layout(
16
+ :type, :uint,
17
+ :value, :uint
18
+ )
19
+ end
20
+
21
+ class MemoryOperand < FFI::Struct
22
+ layout(
23
+ :base, :uint,
24
+ :index, :uint,
25
+ :disp, :int32
26
+ )
27
+ end
28
+
29
+ class OperandValue < FFI::Union
30
+ layout(
31
+ :reg, :uint,
32
+ :imm, :int64,
33
+ :fp, :double,
34
+ :mem, MemoryOperand,
35
+ :pstate, :int,
36
+ :sys, :uint,
37
+ :prefetch, :int,
38
+ :barrier, :int
39
+ )
40
+ end
41
+
42
+ class Operand < FFI::Struct
43
+
44
+ layout(
45
+ :vector_index, :int,
46
+ :vas, :int,
47
+ :vess, :int,
48
+ :shift, OperandShift,
49
+ :ext, :uint,
50
+ :type, :uint,
51
+ :value, OperandValue
52
+ )
53
+
54
+ def value
55
+ case self[:type]
56
+ when *[OP_REG, OP_REG_MRS, OP_REG_MSR] # Register operand.
57
+ self[:value][:reg]
58
+ when *[OP_IMM, OP_CIMM] # Immediate operand.
59
+ self[:value][:imm]
60
+ when OP_FP # Floating-Point immediate operand.
61
+ self[:value][:fp]
62
+ when OP_MEM # Memory operand
63
+ self[:value][:mem]
64
+ when OP_PSTATE # PState operand.
65
+ self[:value][:pstate]
66
+ when OP_SYS # SYS operand for IC/DC/AT/TLBI instructions.
67
+ self[:value][:sys]
68
+ when OP_PREFETCH # Prefetch operand (PRFM).
69
+ self[:value][:prefetch]
70
+ when OP_BARRIER # Memory barrier operand (ISB/DMB/DSB instructions).
71
+ self[:value][:barrier]
72
+ else
73
+ nil
74
+ end
75
+ end
76
+
77
+ def shift_type
78
+ self[:shift][:type]
79
+ end
80
+
81
+ def shift_value
82
+ self[:shift][:value]
83
+ end
84
+
85
+ def shift?
86
+ self[:shift][:type] != SFT_INVALID
87
+ end
88
+
89
+ def ext?
90
+ self[:ext] != EXT_INVALID
91
+ end
92
+
93
+ def reg?
94
+ self[:type] == OP_REG
95
+ end
96
+
97
+ def imm?
98
+ self[:type] == OP_IMM
99
+ end
100
+
101
+ def cimm?
102
+ self[:type] == OP_CIMM
103
+ end
104
+
105
+ def mem?
106
+ self[:type] == OP_MEM
107
+ end
108
+
109
+ def fp?
110
+ self[:type] == OP_FP
111
+ end
112
+
113
+ def pstate?
114
+ self[:type] == OP_PSTATE
115
+ end
116
+
117
+ def msr?
118
+ self[:type] == OP_REG_MSR
119
+ end
120
+
121
+ def mrs?
122
+ self[:type] == OP_REG_MRS
123
+ end
124
+
125
+ def barrier?
126
+ self[:type] == OP_BARRIER
127
+ end
128
+
129
+ def prefetch?
130
+ self[:type] == OP_PREFETCH
131
+ end
132
+
133
+ def valid?
134
+ [
135
+ OP_INVALID,
136
+ OP_REG,
137
+ OP_CIMM,
138
+ OP_IMM,
139
+ OP_FP,
140
+ OP_MEM,
141
+ OP_REG_MRS,
142
+ OP_REG_MSR,
143
+ OP_PSTATE,
144
+ OP_SYS,
145
+ OP_PREFETCH,
146
+ OP_BARRIER
147
+ ].include? self[:type]
148
+ end
149
+
150
+ end
151
+
152
+ class Instruction < FFI::Struct
153
+ layout(
154
+ :cc, :uint,
155
+ :update_flags, :bool,
156
+ :writeback, :bool,
157
+ :op_count, :uint8,
158
+ :operands, [Operand, 8]
159
+ )
160
+
161
+ def operands
162
+ self[:operands].take_while {|op| op[:type].nonzero?}
163
+ end
164
+
165
+ end
166
+ end
167
+ end