vllm-cpu 0.8.5.post2__cp310-cp310-manylinux_2_17_x86_64.whl

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  1. vllm/_C.abi3.so +0 -0
  2. vllm/__init__.py +170 -0
  3. vllm/_custom_ops.py +1536 -0
  4. vllm/_ipex_ops.py +241 -0
  5. vllm/_version.py +34 -0
  6. vllm/adapter_commons/__init__.py +0 -0
  7. vllm/adapter_commons/layers.py +16 -0
  8. vllm/adapter_commons/models.py +105 -0
  9. vllm/adapter_commons/request.py +25 -0
  10. vllm/adapter_commons/utils.py +92 -0
  11. vllm/adapter_commons/worker_manager.py +38 -0
  12. vllm/assets/__init__.py +0 -0
  13. vllm/assets/audio.py +38 -0
  14. vllm/assets/base.py +40 -0
  15. vllm/assets/image.py +31 -0
  16. vllm/assets/video.py +103 -0
  17. vllm/attention/__init__.py +19 -0
  18. vllm/attention/backends/__init__.py +0 -0
  19. vllm/attention/backends/abstract.py +306 -0
  20. vllm/attention/backends/blocksparse_attn.py +457 -0
  21. vllm/attention/backends/cpu_mla.py +303 -0
  22. vllm/attention/backends/flash_attn.py +999 -0
  23. vllm/attention/backends/flashinfer.py +1092 -0
  24. vllm/attention/backends/flashmla.py +242 -0
  25. vllm/attention/backends/hpu_attn.py +301 -0
  26. vllm/attention/backends/ipex_attn.py +396 -0
  27. vllm/attention/backends/mla/__init__.py +0 -0
  28. vllm/attention/backends/mla/common.py +1444 -0
  29. vllm/attention/backends/pallas.py +346 -0
  30. vllm/attention/backends/placeholder_attn.py +399 -0
  31. vllm/attention/backends/rocm_aiter_mla.py +412 -0
  32. vllm/attention/backends/rocm_flash_attn.py +969 -0
  33. vllm/attention/backends/torch_sdpa.py +691 -0
  34. vllm/attention/backends/triton_mla.py +113 -0
  35. vllm/attention/backends/utils.py +609 -0
  36. vllm/attention/backends/xformers.py +798 -0
  37. vllm/attention/layer.py +443 -0
  38. vllm/attention/ops/__init__.py +0 -0
  39. vllm/attention/ops/blocksparse_attention/__init__.py +0 -0
  40. vllm/attention/ops/blocksparse_attention/blocksparse_attention_kernel.py +432 -0
  41. vllm/attention/ops/blocksparse_attention/interface.py +238 -0
  42. vllm/attention/ops/blocksparse_attention/utils.py +244 -0
  43. vllm/attention/ops/chunked_prefill_paged_decode.py +366 -0
  44. vllm/attention/ops/flashmla.py +115 -0
  45. vllm/attention/ops/hpu_paged_attn.py +105 -0
  46. vllm/attention/ops/ipex_attn.py +193 -0
  47. vllm/attention/ops/merge_attn_states.py +42 -0
  48. vllm/attention/ops/nki_flash_attn.py +905 -0
  49. vllm/attention/ops/paged_attn.py +255 -0
  50. vllm/attention/ops/prefix_prefill.py +902 -0
  51. vllm/attention/ops/rocm_aiter_mla.py +42 -0
  52. vllm/attention/ops/rocm_aiter_paged_attn.py +101 -0
  53. vllm/attention/ops/triton_decode_attention.py +675 -0
  54. vllm/attention/ops/triton_flash_attention.py +1375 -0
  55. vllm/attention/ops/triton_merge_attn_states.py +96 -0
  56. vllm/attention/selector.py +186 -0
  57. vllm/attention/utils/fa_utils.py +54 -0
  58. vllm/beam_search.py +82 -0
  59. vllm/benchmarks/__init__.py +0 -0
  60. vllm/benchmarks/datasets.py +831 -0
  61. vllm/benchmarks/endpoint_request_func.py +160 -0
  62. vllm/benchmarks/latency.py +181 -0
  63. vllm/benchmarks/serve.py +925 -0
  64. vllm/benchmarks/throughput.py +608 -0
  65. vllm/benchmarks/utils.py +69 -0
  66. vllm/collect_env.py +795 -0
  67. vllm/compilation/__init__.py +0 -0
  68. vllm/compilation/backends.py +715 -0
  69. vllm/compilation/compiler_interface.py +437 -0
  70. vllm/compilation/counter.py +33 -0
  71. vllm/compilation/decorators.py +249 -0
  72. vllm/compilation/fix_functionalization.py +182 -0
  73. vllm/compilation/fusion.py +617 -0
  74. vllm/compilation/fx_utils.py +60 -0
  75. vllm/compilation/inductor_pass.py +114 -0
  76. vllm/compilation/monitor.py +38 -0
  77. vllm/compilation/multi_output_match.py +108 -0
  78. vllm/compilation/noop_elimination.py +135 -0
  79. vllm/compilation/pass_manager.py +74 -0
  80. vllm/compilation/sequence_parallelism.py +266 -0
  81. vllm/compilation/torch25_custom_graph_pass.py +41 -0
  82. vllm/compilation/vllm_inductor_pass.py +68 -0
  83. vllm/compilation/wrapper.py +129 -0
  84. vllm/config.py +4179 -0
  85. vllm/connections.py +170 -0
  86. vllm/core/__init__.py +0 -0
  87. vllm/core/block/__init__.py +0 -0
  88. vllm/core/block/block_table.py +398 -0
  89. vllm/core/block/common.py +370 -0
  90. vllm/core/block/cpu_gpu_block_allocator.py +440 -0
  91. vllm/core/block/interfaces.py +318 -0
  92. vllm/core/block/naive_block.py +465 -0
  93. vllm/core/block/prefix_caching_block.py +1134 -0
  94. vllm/core/block/utils.py +27 -0
  95. vllm/core/block_manager.py +520 -0
  96. vllm/core/evictor.py +156 -0
  97. vllm/core/interfaces.py +134 -0
  98. vllm/core/placeholder_block_space_manager.py +99 -0
  99. vllm/core/scheduler.py +2060 -0
  100. vllm/device_allocator/__init__.py +0 -0
  101. vllm/device_allocator/cumem.py +280 -0
  102. vllm/distributed/__init__.py +5 -0
  103. vllm/distributed/communication_op.py +40 -0
  104. vllm/distributed/device_communicators/__init__.py +0 -0
  105. vllm/distributed/device_communicators/base_device_communicator.py +151 -0
  106. vllm/distributed/device_communicators/cpu_communicator.py +139 -0
  107. vllm/distributed/device_communicators/cuda_communicator.py +131 -0
  108. vllm/distributed/device_communicators/cuda_wrapper.py +179 -0
  109. vllm/distributed/device_communicators/custom_all_reduce.py +301 -0
  110. vllm/distributed/device_communicators/custom_all_reduce_utils.py +257 -0
  111. vllm/distributed/device_communicators/hpu_communicator.py +45 -0
  112. vllm/distributed/device_communicators/neuron_communicator.py +19 -0
  113. vllm/distributed/device_communicators/pynccl.py +217 -0
  114. vllm/distributed/device_communicators/pynccl_wrapper.py +340 -0
  115. vllm/distributed/device_communicators/shm_broadcast.py +557 -0
  116. vllm/distributed/device_communicators/tpu_communicator.py +93 -0
  117. vllm/distributed/device_communicators/xpu_communicator.py +54 -0
  118. vllm/distributed/kv_transfer/README.md +29 -0
  119. vllm/distributed/kv_transfer/__init__.py +11 -0
  120. vllm/distributed/kv_transfer/disagg_prefill_workflow.jpg +0 -0
  121. vllm/distributed/kv_transfer/kv_connector/__init__.py +0 -0
  122. vllm/distributed/kv_transfer/kv_connector/base.py +127 -0
  123. vllm/distributed/kv_transfer/kv_connector/factory.py +107 -0
  124. vllm/distributed/kv_transfer/kv_connector/lmcache_connector.py +98 -0
  125. vllm/distributed/kv_transfer/kv_connector/mooncake_store_connector.py +201 -0
  126. vllm/distributed/kv_transfer/kv_connector/simple_connector.py +328 -0
  127. vllm/distributed/kv_transfer/kv_connector/utils.py +90 -0
  128. vllm/distributed/kv_transfer/kv_connector/v1/__init__.py +8 -0
  129. vllm/distributed/kv_transfer/kv_connector/v1/base.py +209 -0
  130. vllm/distributed/kv_transfer/kv_connector/v1/lmcache_connector.py +131 -0
  131. vllm/distributed/kv_transfer/kv_connector/v1/shared_storage_connector.py +383 -0
  132. vllm/distributed/kv_transfer/kv_connector_agent.py +76 -0
  133. vllm/distributed/kv_transfer/kv_lookup_buffer/__init__.py +0 -0
  134. vllm/distributed/kv_transfer/kv_lookup_buffer/base.py +174 -0
  135. vllm/distributed/kv_transfer/kv_lookup_buffer/mooncake_store.py +160 -0
  136. vllm/distributed/kv_transfer/kv_lookup_buffer/simple_buffer.py +236 -0
  137. vllm/distributed/kv_transfer/kv_pipe/__init__.py +0 -0
  138. vllm/distributed/kv_transfer/kv_pipe/base.py +66 -0
  139. vllm/distributed/kv_transfer/kv_pipe/mooncake_pipe.py +279 -0
  140. vllm/distributed/kv_transfer/kv_pipe/pynccl_pipe.py +279 -0
  141. vllm/distributed/kv_transfer/kv_transfer_state.py +70 -0
  142. vllm/distributed/parallel_state.py +1209 -0
  143. vllm/distributed/utils.py +366 -0
  144. vllm/engine/__init__.py +0 -0
  145. vllm/engine/arg_utils.py +1724 -0
  146. vllm/engine/async_llm_engine.py +1261 -0
  147. vllm/engine/async_timeout.py +191 -0
  148. vllm/engine/llm_engine.py +2150 -0
  149. vllm/engine/metrics.py +717 -0
  150. vllm/engine/metrics_types.py +96 -0
  151. vllm/engine/multiprocessing/__init__.py +183 -0
  152. vllm/engine/multiprocessing/client.py +745 -0
  153. vllm/engine/multiprocessing/engine.py +450 -0
  154. vllm/engine/output_processor/__init__.py +0 -0
  155. vllm/engine/output_processor/interfaces.py +74 -0
  156. vllm/engine/output_processor/multi_step.py +210 -0
  157. vllm/engine/output_processor/single_step.py +136 -0
  158. vllm/engine/output_processor/stop_checker.py +130 -0
  159. vllm/engine/output_processor/util.py +27 -0
  160. vllm/engine/protocol.py +302 -0
  161. vllm/entrypoints/__init__.py +0 -0
  162. vllm/entrypoints/api_server.py +177 -0
  163. vllm/entrypoints/chat_utils.py +1259 -0
  164. vllm/entrypoints/cli/__init__.py +0 -0
  165. vllm/entrypoints/cli/benchmark/__init__.py +0 -0
  166. vllm/entrypoints/cli/benchmark/base.py +38 -0
  167. vllm/entrypoints/cli/benchmark/latency.py +29 -0
  168. vllm/entrypoints/cli/benchmark/main.py +53 -0
  169. vllm/entrypoints/cli/benchmark/serve.py +29 -0
  170. vllm/entrypoints/cli/benchmark/throughput.py +29 -0
  171. vllm/entrypoints/cli/collect_env.py +35 -0
  172. vllm/entrypoints/cli/main.py +59 -0
  173. vllm/entrypoints/cli/openai.py +175 -0
  174. vllm/entrypoints/cli/serve.py +59 -0
  175. vllm/entrypoints/cli/types.py +24 -0
  176. vllm/entrypoints/launcher.py +146 -0
  177. vllm/entrypoints/llm.py +1450 -0
  178. vllm/entrypoints/logger.py +44 -0
  179. vllm/entrypoints/openai/__init__.py +0 -0
  180. vllm/entrypoints/openai/api_server.py +1130 -0
  181. vllm/entrypoints/openai/cli_args.py +296 -0
  182. vllm/entrypoints/openai/logits_processors.py +89 -0
  183. vllm/entrypoints/openai/protocol.py +1806 -0
  184. vllm/entrypoints/openai/run_batch.py +439 -0
  185. vllm/entrypoints/openai/serving_chat.py +1210 -0
  186. vllm/entrypoints/openai/serving_completion.py +557 -0
  187. vllm/entrypoints/openai/serving_embedding.py +245 -0
  188. vllm/entrypoints/openai/serving_engine.py +569 -0
  189. vllm/entrypoints/openai/serving_models.py +314 -0
  190. vllm/entrypoints/openai/serving_pooling.py +237 -0
  191. vllm/entrypoints/openai/serving_score.py +439 -0
  192. vllm/entrypoints/openai/serving_tokenization.py +147 -0
  193. vllm/entrypoints/openai/serving_transcription.py +421 -0
  194. vllm/entrypoints/openai/tool_parsers/__init__.py +19 -0
  195. vllm/entrypoints/openai/tool_parsers/abstract_tool_parser.py +163 -0
  196. vllm/entrypoints/openai/tool_parsers/granite_20b_fc_tool_parser.py +254 -0
  197. vllm/entrypoints/openai/tool_parsers/granite_tool_parser.py +232 -0
  198. vllm/entrypoints/openai/tool_parsers/hermes_tool_parser.py +370 -0
  199. vllm/entrypoints/openai/tool_parsers/internlm2_tool_parser.py +211 -0
  200. vllm/entrypoints/openai/tool_parsers/jamba_tool_parser.py +303 -0
  201. vllm/entrypoints/openai/tool_parsers/llama_tool_parser.py +262 -0
  202. vllm/entrypoints/openai/tool_parsers/mistral_tool_parser.py +342 -0
  203. vllm/entrypoints/openai/tool_parsers/phi4mini_tool_parser.py +110 -0
  204. vllm/entrypoints/openai/tool_parsers/pythonic_tool_parser.py +292 -0
  205. vllm/entrypoints/openai/tool_parsers/utils.py +123 -0
  206. vllm/entrypoints/score_utils.py +49 -0
  207. vllm/entrypoints/ssl.py +74 -0
  208. vllm/entrypoints/utils.py +136 -0
  209. vllm/env_override.py +34 -0
  210. vllm/envs.py +800 -0
  211. vllm/executor/__init__.py +0 -0
  212. vllm/executor/executor_base.py +400 -0
  213. vllm/executor/mp_distributed_executor.py +243 -0
  214. vllm/executor/msgspec_utils.py +29 -0
  215. vllm/executor/multiproc_worker_utils.py +312 -0
  216. vllm/executor/ray_distributed_executor.py +700 -0
  217. vllm/executor/ray_utils.py +400 -0
  218. vllm/executor/uniproc_executor.py +141 -0
  219. vllm/forward_context.py +159 -0
  220. vllm/inputs/__init__.py +37 -0
  221. vllm/inputs/data.py +248 -0
  222. vllm/inputs/parse.py +121 -0
  223. vllm/inputs/preprocess.py +745 -0
  224. vllm/inputs/registry.py +212 -0
  225. vllm/jsontree.py +79 -0
  226. vllm/logger.py +210 -0
  227. vllm/logging_utils/__init__.py +7 -0
  228. vllm/logging_utils/formatter.py +17 -0
  229. vllm/logits_process.py +121 -0
  230. vllm/lora/__init__.py +0 -0
  231. vllm/lora/fully_sharded_layers.py +335 -0
  232. vllm/lora/layers.py +1263 -0
  233. vllm/lora/lora.py +198 -0
  234. vllm/lora/models.py +802 -0
  235. vllm/lora/ops/__init__.py +0 -0
  236. vllm/lora/ops/torch_ops/__init__.py +15 -0
  237. vllm/lora/ops/torch_ops/lora_ops.py +115 -0
  238. vllm/lora/ops/triton_ops/__init__.py +11 -0
  239. vllm/lora/ops/triton_ops/kernel_utils.py +243 -0
  240. vllm/lora/ops/triton_ops/lora_expand.py +293 -0
  241. vllm/lora/ops/triton_ops/lora_kernel_metadata.py +147 -0
  242. vllm/lora/ops/triton_ops/lora_shrink.py +247 -0
  243. vllm/lora/ops/triton_ops/utils.py +121 -0
  244. vllm/lora/peft_helper.py +115 -0
  245. vllm/lora/punica_wrapper/__init__.py +9 -0
  246. vllm/lora/punica_wrapper/punica_base.py +483 -0
  247. vllm/lora/punica_wrapper/punica_cpu.py +348 -0
  248. vllm/lora/punica_wrapper/punica_gpu.py +289 -0
  249. vllm/lora/punica_wrapper/punica_hpu.py +144 -0
  250. vllm/lora/punica_wrapper/punica_selector.py +20 -0
  251. vllm/lora/punica_wrapper/utils.py +161 -0
  252. vllm/lora/request.py +97 -0
  253. vllm/lora/resolver.py +83 -0
  254. vllm/lora/utils.py +237 -0
  255. vllm/lora/worker_manager.py +251 -0
  256. vllm/model_executor/__init__.py +15 -0
  257. vllm/model_executor/custom_op.py +153 -0
  258. vllm/model_executor/guided_decoding/__init__.py +180 -0
  259. vllm/model_executor/guided_decoding/guidance_decoding.py +63 -0
  260. vllm/model_executor/guided_decoding/guidance_logits_processors.py +85 -0
  261. vllm/model_executor/guided_decoding/guided_fields.py +42 -0
  262. vllm/model_executor/guided_decoding/lm_format_enforcer_decoding.py +66 -0
  263. vllm/model_executor/guided_decoding/outlines_decoding.py +154 -0
  264. vllm/model_executor/guided_decoding/outlines_logits_processors.py +271 -0
  265. vllm/model_executor/guided_decoding/reasoner/__init__.py +35 -0
  266. vllm/model_executor/guided_decoding/utils.py +241 -0
  267. vllm/model_executor/guided_decoding/xgrammar_decoding.py +425 -0
  268. vllm/model_executor/layers/__init__.py +0 -0
  269. vllm/model_executor/layers/activation.py +368 -0
  270. vllm/model_executor/layers/fused_moe/__init__.py +51 -0
  271. vllm/model_executor/layers/fused_moe/configs/E=1,N=14336,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a16.json +146 -0
  272. vllm/model_executor/layers/fused_moe/configs/E=1,N=14336,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
  273. vllm/model_executor/layers/fused_moe/configs/E=1,N=1792,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a16.json +218 -0
  274. vllm/model_executor/layers/fused_moe/configs/E=1,N=1792,device_name=NVIDIA_A100-SXM4-80GB.json +218 -0
  275. vllm/model_executor/layers/fused_moe/configs/E=1,N=3072,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a16.json +218 -0
  276. vllm/model_executor/layers/fused_moe/configs/E=1,N=3072,device_name=NVIDIA_H100_80GB_HBM3,dtype=int8_w8a16.json +218 -0
  277. vllm/model_executor/layers/fused_moe/configs/E=1,N=3072,device_name=NVIDIA_H100_80GB_HBM3.json +218 -0
  278. vllm/model_executor/layers/fused_moe/configs/E=1,N=3584,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a16.json +218 -0
  279. vllm/model_executor/layers/fused_moe/configs/E=1,N=3584,device_name=NVIDIA_A100-SXM4-80GB.json +218 -0
  280. vllm/model_executor/layers/fused_moe/configs/E=1,N=7168,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a16.json +218 -0
  281. vllm/model_executor/layers/fused_moe/configs/E=1,N=7168,device_name=NVIDIA_A100-SXM4-80GB.json +218 -0
  282. vllm/model_executor/layers/fused_moe/configs/E=128,N=1024,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8.json +164 -0
  283. vllm/model_executor/layers/fused_moe/configs/E=128,N=192,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
  284. vllm/model_executor/layers/fused_moe/configs/E=128,N=192,device_name=NVIDIA_H20.json +146 -0
  285. vllm/model_executor/layers/fused_moe/configs/E=128,N=192,device_name=NVIDIA_H200.json +146 -0
  286. vllm/model_executor/layers/fused_moe/configs/E=128,N=384,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  287. vllm/model_executor/layers/fused_moe/configs/E=128,N=384,device_name=NVIDIA_H20.json +146 -0
  288. vllm/model_executor/layers/fused_moe/configs/E=128,N=384,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  289. vllm/model_executor/layers/fused_moe/configs/E=128,N=384,device_name=NVIDIA_H200.json +146 -0
  290. vllm/model_executor/layers/fused_moe/configs/E=128,N=512,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
  291. vllm/model_executor/layers/fused_moe/configs/E=128,N=768,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  292. vllm/model_executor/layers/fused_moe/configs/E=128,N=768,device_name=NVIDIA_H20.json +146 -0
  293. vllm/model_executor/layers/fused_moe/configs/E=128,N=768,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  294. vllm/model_executor/layers/fused_moe/configs/E=128,N=768,device_name=NVIDIA_H200.json +146 -0
  295. vllm/model_executor/layers/fused_moe/configs/E=128,N=96,device_name=NVIDIA_H20.json +146 -0
  296. vllm/model_executor/layers/fused_moe/configs/E=16,N=1024,device_name=AMD_Instinct_MI300X.json +200 -0
  297. vllm/model_executor/layers/fused_moe/configs/E=16,N=1024,device_name=NVIDIA_H100.json +146 -0
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  311. vllm/model_executor/layers/fused_moe/configs/E=16,N=3584,device_name=NVIDIA_A100-SXM4-80GB.json +218 -0
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  317. vllm/model_executor/layers/fused_moe/configs/E=160,N=192,device_name=NVIDIA_A800-SXM4-80GB.json +146 -0
  318. vllm/model_executor/layers/fused_moe/configs/E=256,N=1024,device_name=AMD_Instinct_MI325X,block_shape=[128,128].json +200 -0
  319. vllm/model_executor/layers/fused_moe/configs/E=256,N=1024,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +200 -0
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  321. vllm/model_executor/layers/fused_moe/configs/E=256,N=128,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8.json +146 -0
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  323. vllm/model_executor/layers/fused_moe/configs/E=256,N=128,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8.json +146 -0
  324. vllm/model_executor/layers/fused_moe/configs/E=256,N=128,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  325. vllm/model_executor/layers/fused_moe/configs/E=256,N=128,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
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  327. vllm/model_executor/layers/fused_moe/configs/E=256,N=256,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  328. vllm/model_executor/layers/fused_moe/configs/E=256,N=256,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +200 -0
  329. vllm/model_executor/layers/fused_moe/configs/E=256,N=256,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +200 -0
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  332. vllm/model_executor/layers/fused_moe/configs/E=256,N=256,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  333. vllm/model_executor/layers/fused_moe/configs/E=256,N=256,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  334. vllm/model_executor/layers/fused_moe/configs/E=256,N=512,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +200 -0
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  347. vllm/model_executor/layers/fused_moe/configs/E=64,N=2560,device_name=NVIDIA_H200,dtype=fp8_w8a8.json +146 -0
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  353. vllm/model_executor/layers/fused_moe/configs/E=64,N=640,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
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  357. vllm/model_executor/layers/fused_moe/configs/E=64,N=640,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
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  361. vllm/model_executor/layers/fused_moe/configs/E=8,N=14336,device_name=AMD_Instinct_MI300X.json +200 -0
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  363. vllm/model_executor/layers/fused_moe/configs/E=8,N=14336,device_name=AMD_Instinct_MI325X.json +200 -0
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  368. vllm/model_executor/layers/fused_moe/configs/E=8,N=16384,device_name=AMD_Instinct_MI300X.json +200 -0
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  370. vllm/model_executor/layers/fused_moe/configs/E=8,N=16384,device_name=AMD_Instinct_MI325X.json +200 -0
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  372. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=AMD_Instinct_MI300X.json +200 -0
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  374. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=AMD_Instinct_MI325X.json +200 -0
  375. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=NVIDIA_A100-SXM4-40GB.json +146 -0
  376. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
  377. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
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  379. vllm/model_executor/layers/fused_moe/configs/E=8,N=1792,device_name=NVIDIA_H200.json +146 -0
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  381. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=AMD_Instinct_MI300X.json +200 -0
  382. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8.json +164 -0
  383. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=AMD_Instinct_MI325X.json +200 -0
  384. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
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  386. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
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  388. vllm/model_executor/layers/fused_moe/configs/E=8,N=2048,device_name=NVIDIA_H200.json +146 -0
  389. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8.json +164 -0
  390. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=AMD_Instinct_MI300X.json +200 -0
  391. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8.json +164 -0
  392. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=AMD_Instinct_MI325X.json +200 -0
  393. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_A100-SXM4-40GB.json +146 -0
  394. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
  395. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_GeForce_RTX_4090,dtype=fp8_w8a8.json +146 -0
  396. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8.json +146 -0
  397. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
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  399. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_H200.json +146 -0
  400. vllm/model_executor/layers/fused_moe/configs/E=8,N=3584,device_name=NVIDIA_L40S.json +173 -0
  401. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8.json +164 -0
  402. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=AMD_Instinct_MI300X.json +200 -0
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  404. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=AMD_Instinct_MI325X.json +200 -0
  405. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
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  407. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=NVIDIA_H100_80GB_HBM3.json +146 -0
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  409. vllm/model_executor/layers/fused_moe/configs/E=8,N=4096,device_name=NVIDIA_H200.json +146 -0
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  411. vllm/model_executor/layers/fused_moe/configs/E=8,N=7168,device_name=AMD_Instinct_MI300X.json +200 -0
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  413. vllm/model_executor/layers/fused_moe/configs/E=8,N=7168,device_name=AMD_Instinct_MI325X.json +200 -0
  414. vllm/model_executor/layers/fused_moe/configs/E=8,N=7168,device_name=NVIDIA_A100-SXM4-80GB.json +146 -0
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  418. vllm/model_executor/layers/fused_moe/configs/E=8,N=7168,device_name=NVIDIA_H200.json +146 -0
  419. vllm/model_executor/layers/fused_moe/configs/E=8,N=8192,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8.json +164 -0
  420. vllm/model_executor/layers/fused_moe/configs/E=8,N=8192,device_name=AMD_Instinct_MI300X.json +200 -0
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  422. vllm/model_executor/layers/fused_moe/configs/E=8,N=8192,device_name=AMD_Instinct_MI325X.json +200 -0
  423. vllm/model_executor/layers/fused_moe/configs/E=8,N=8192,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8.json +146 -0
  424. vllm/model_executor/layers/fused_moe/configs/E=8,N=8192,device_name=NVIDIA_H200,dtype=fp8_w8a8.json +146 -0
  425. vllm/model_executor/layers/fused_moe/configs/README +12 -0
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  427. vllm/model_executor/layers/fused_moe/deep_gemm_moe.py +294 -0
  428. vllm/model_executor/layers/fused_moe/fused_marlin_moe.py +374 -0
  429. vllm/model_executor/layers/fused_moe/fused_moe.py +1539 -0
  430. vllm/model_executor/layers/fused_moe/layer.py +949 -0
  431. vllm/model_executor/layers/fused_moe/moe_align_block_size.py +243 -0
  432. vllm/model_executor/layers/fused_moe/moe_pallas.py +64 -0
  433. vllm/model_executor/layers/fused_moe/moe_torch_iterative.py +59 -0
  434. vllm/model_executor/layers/fused_moe/rocm_aiter_fused_moe.py +416 -0
  435. vllm/model_executor/layers/fused_moe/utils.py +48 -0
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  596. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  597. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  598. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  599. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  600. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  601. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  602. vllm/model_executor/layers/quantization/utils/configs/N=32768,K=512,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  603. vllm/model_executor/layers/quantization/utils/configs/N=36864,K=7168,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  604. vllm/model_executor/layers/quantization/utils/configs/N=36864,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  605. vllm/model_executor/layers/quantization/utils/configs/N=36864,K=7168,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  606. vllm/model_executor/layers/quantization/utils/configs/N=36864,K=7168,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  607. vllm/model_executor/layers/quantization/utils/configs/N=36864,K=7168,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  608. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  609. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  610. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  611. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  612. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  613. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  614. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  615. vllm/model_executor/layers/quantization/utils/configs/N=4096,K=512,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  616. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  617. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  618. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  619. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  620. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  621. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  622. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  623. vllm/model_executor/layers/quantization/utils/configs/N=4608,K=7168,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  624. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  625. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  626. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  627. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  628. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  629. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  630. vllm/model_executor/layers/quantization/utils/configs/N=512,K=7168,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  631. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  632. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  633. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  634. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  635. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  636. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  637. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  638. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  639. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  640. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  641. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +18 -0
  642. vllm/model_executor/layers/quantization/utils/configs/N=576,K=7168,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  643. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  644. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  645. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  646. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  647. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  648. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  649. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  650. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  651. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1024,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  652. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  653. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  654. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  655. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  656. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  657. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  658. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  659. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  660. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=1152,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  661. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  662. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  663. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  664. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  665. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  666. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  667. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  668. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=128,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  669. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  670. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  671. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  672. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  673. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  674. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  675. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  676. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  677. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  678. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  679. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  680. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=16384,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  681. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  682. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  683. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  684. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_A100-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  685. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_A800-SXM4-80GB,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  686. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  687. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  688. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  689. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  690. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  691. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  692. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=18432,device_name=NVIDIA_L20Y,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  693. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  694. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  695. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  696. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  697. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  698. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
  699. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=NVIDIA_H200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  700. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2048,device_name=NVIDIA_L20,dtype=fp8_w8a8,block_shape=[128,128].json +26 -0
  701. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  702. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  703. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=AMD_Instinct_MI325_OAM,dtype=fp8_w8a8,block_shape=[128,128].json +164 -0
  704. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=NVIDIA_B200,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  705. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8,block_shape=[128,128].json +146 -0
  706. vllm/model_executor/layers/quantization/utils/configs/N=7168,K=2304,device_name=NVIDIA_H20,dtype=int8_w8a8,block_shape=[128,128].json +146 -0
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  1006. vllm/v1/core/kv_cache_utils.py +744 -0
  1007. vllm/v1/core/sched/__init__.py +0 -0
  1008. vllm/v1/core/sched/interface.py +134 -0
  1009. vllm/v1/core/sched/output.py +126 -0
  1010. vllm/v1/core/sched/scheduler.py +838 -0
  1011. vllm/v1/core/sched/utils.py +22 -0
  1012. vllm/v1/core/specialized_manager.py +161 -0
  1013. vllm/v1/engine/__init__.py +166 -0
  1014. vllm/v1/engine/async_llm.py +532 -0
  1015. vllm/v1/engine/core.py +701 -0
  1016. vllm/v1/engine/core_client.py +942 -0
  1017. vllm/v1/engine/detokenizer.py +260 -0
  1018. vllm/v1/engine/exceptions.py +16 -0
  1019. vllm/v1/engine/llm_engine.py +285 -0
  1020. vllm/v1/engine/logprobs.py +198 -0
  1021. vllm/v1/engine/mm_input_cache.py +82 -0
  1022. vllm/v1/engine/output_processor.py +420 -0
  1023. vllm/v1/engine/parallel_sampling.py +132 -0
  1024. vllm/v1/engine/processor.py +387 -0
  1025. vllm/v1/executor/__init__.py +0 -0
  1026. vllm/v1/executor/abstract.py +112 -0
  1027. vllm/v1/executor/multiproc_executor.py +480 -0
  1028. vllm/v1/executor/ray_distributed_executor.py +61 -0
  1029. vllm/v1/kv_cache_interface.py +166 -0
  1030. vllm/v1/metrics/__init__.py +0 -0
  1031. vllm/v1/metrics/loggers.py +498 -0
  1032. vllm/v1/metrics/stats.py +238 -0
  1033. vllm/v1/outputs.py +111 -0
  1034. vllm/v1/request.py +178 -0
  1035. vllm/v1/sample/__init__.py +0 -0
  1036. vllm/v1/sample/metadata.py +43 -0
  1037. vllm/v1/sample/ops/__init__.py +0 -0
  1038. vllm/v1/sample/ops/bad_words.py +38 -0
  1039. vllm/v1/sample/ops/penalties.py +58 -0
  1040. vllm/v1/sample/ops/topk_topp_sampler.py +315 -0
  1041. vllm/v1/sample/rejection_sampler.py +631 -0
  1042. vllm/v1/sample/sampler.py +270 -0
  1043. vllm/v1/sample/tpu/__init__.py +0 -0
  1044. vllm/v1/sample/tpu/metadata.py +118 -0
  1045. vllm/v1/sample/tpu/sampler.py +154 -0
  1046. vllm/v1/serial_utils.py +274 -0
  1047. vllm/v1/spec_decode/__init__.py +0 -0
  1048. vllm/v1/spec_decode/eagle.py +318 -0
  1049. vllm/v1/spec_decode/metadata.py +61 -0
  1050. vllm/v1/spec_decode/metrics.py +164 -0
  1051. vllm/v1/spec_decode/ngram_proposer.py +131 -0
  1052. vllm/v1/spec_decode/utils.py +18 -0
  1053. vllm/v1/stats/__init__.py +0 -0
  1054. vllm/v1/stats/common.py +453 -0
  1055. vllm/v1/structured_output/__init__.py +113 -0
  1056. vllm/v1/structured_output/backend_guidance.py +215 -0
  1057. vllm/v1/structured_output/backend_types.py +96 -0
  1058. vllm/v1/structured_output/backend_xgrammar.py +299 -0
  1059. vllm/v1/structured_output/request.py +84 -0
  1060. vllm/v1/structured_output/utils.py +174 -0
  1061. vllm/v1/utils.py +249 -0
  1062. vllm/v1/worker/__init__.py +0 -0
  1063. vllm/v1/worker/block_table.py +87 -0
  1064. vllm/v1/worker/gpu_input_batch.py +677 -0
  1065. vllm/v1/worker/gpu_model_runner.py +1776 -0
  1066. vllm/v1/worker/gpu_worker.py +349 -0
  1067. vllm/v1/worker/lora_model_runner_mixin.py +145 -0
  1068. vllm/v1/worker/tpu_model_runner.py +1419 -0
  1069. vllm/v1/worker/tpu_worker.py +260 -0
  1070. vllm/v1/worker/utils.py +74 -0
  1071. vllm/v1/worker/worker_base.py +64 -0
  1072. vllm/version.py +40 -0
  1073. vllm/vllm_flash_attn/.gitkeep +0 -0
  1074. vllm/worker/__init__.py +0 -0
  1075. vllm/worker/cache_engine.py +144 -0
  1076. vllm/worker/cpu_enc_dec_model_runner.py +323 -0
  1077. vllm/worker/cpu_model_runner.py +668 -0
  1078. vllm/worker/cpu_pooling_model_runner.py +122 -0
  1079. vllm/worker/cpu_worker.py +400 -0
  1080. vllm/worker/enc_dec_model_runner.py +542 -0
  1081. vllm/worker/hpu_model_runner.py +2221 -0
  1082. vllm/worker/hpu_worker.py +483 -0
  1083. vllm/worker/model_runner.py +2056 -0
  1084. vllm/worker/model_runner_base.py +281 -0
  1085. vllm/worker/multi_step_hpu_worker.py +122 -0
  1086. vllm/worker/multi_step_model_runner.py +908 -0
  1087. vllm/worker/multi_step_tpu_worker.py +107 -0
  1088. vllm/worker/multi_step_worker.py +196 -0
  1089. vllm/worker/neuron_model_runner.py +336 -0
  1090. vllm/worker/neuron_worker.py +138 -0
  1091. vllm/worker/pooling_model_runner.py +200 -0
  1092. vllm/worker/tpu_model_runner.py +908 -0
  1093. vllm/worker/tpu_worker.py +332 -0
  1094. vllm/worker/utils.py +52 -0
  1095. vllm/worker/worker.py +570 -0
  1096. vllm/worker/worker_base.py +644 -0
  1097. vllm/worker/xpu_model_runner.py +603 -0
  1098. vllm/worker/xpu_worker.py +185 -0
  1099. vllm_cpu-0.8.5.post2.dist-info/METADATA +309 -0
  1100. vllm_cpu-0.8.5.post2.dist-info/RECORD +1103 -0
  1101. vllm_cpu-0.8.5.post2.dist-info/WHEEL +5 -0
  1102. vllm_cpu-0.8.5.post2.dist-info/entry_points.txt +2 -0
  1103. vllm_cpu-0.8.5.post2.dist-info/top_level.txt +1 -0
vllm/platforms/rocm.py ADDED
@@ -0,0 +1,346 @@
1
+ # SPDX-License-Identifier: Apache-2.0
2
+
3
+ import os
4
+ from functools import cache, lru_cache, wraps
5
+ from typing import TYPE_CHECKING, Dict, List, Optional
6
+
7
+ import torch
8
+
9
+ import vllm.envs as envs
10
+ from vllm.logger import init_logger
11
+
12
+ from .interface import DeviceCapability, Platform, PlatformEnum, _Backend
13
+
14
+ if TYPE_CHECKING:
15
+ from vllm.config import ModelConfig, VllmConfig
16
+
17
+ logger = init_logger(__name__)
18
+
19
+ try:
20
+ from amdsmi import (AmdSmiException, amdsmi_get_gpu_asic_info,
21
+ amdsmi_get_processor_handles, amdsmi_init,
22
+ amdsmi_shut_down, amdsmi_topo_get_link_type)
23
+ except ImportError as e:
24
+ logger.warning("Failed to import from amdsmi with %r", e)
25
+
26
+ try:
27
+ import vllm._C # noqa: F401
28
+ except ImportError as e:
29
+ logger.warning("Failed to import from vllm._C with %r", e)
30
+
31
+ # import custom ops, trigger op registration
32
+ try:
33
+ import vllm._rocm_C # noqa: F401
34
+ except ImportError as e:
35
+ logger.warning("Failed to import from vllm._rocm_C with %r", e)
36
+
37
+ # Models not supported by ROCm.
38
+ _ROCM_UNSUPPORTED_MODELS: List[str] = []
39
+
40
+ # Models partially supported by ROCm.
41
+ # Architecture -> Reason.
42
+ _ROCM_SWA_REASON = ("Sliding window attention (SWA) is not yet supported in "
43
+ "Triton flash attention. For half-precision SWA support, "
44
+ "please use CK flash attention by setting "
45
+ "`VLLM_USE_TRITON_FLASH_ATTN=0`")
46
+ _ROCM_PARTIALLY_SUPPORTED_MODELS: Dict[str, str] = {
47
+ "Qwen2ForCausalLM":
48
+ _ROCM_SWA_REASON,
49
+ "MistralForCausalLM":
50
+ _ROCM_SWA_REASON,
51
+ "MixtralForCausalLM":
52
+ _ROCM_SWA_REASON,
53
+ "PaliGemmaForConditionalGeneration":
54
+ ("ROCm flash attention does not yet "
55
+ "fully support 32-bit precision on PaliGemma"),
56
+ "Phi3VForCausalLM":
57
+ ("ROCm Triton flash attention may run into compilation errors due to "
58
+ "excessive use of shared memory. If this happens, disable Triton FA "
59
+ "by setting `VLLM_USE_TRITON_FLASH_ATTN=0`")
60
+ }
61
+
62
+ # Prevent use of clashing `{CUDA/HIP}_VISIBLE_DEVICES``
63
+ if "HIP_VISIBLE_DEVICES" in os.environ:
64
+ val = os.environ["HIP_VISIBLE_DEVICES"]
65
+ if cuda_val := os.environ.get("CUDA_VISIBLE_DEVICES", None):
66
+ assert val == cuda_val
67
+ else:
68
+ os.environ["CUDA_VISIBLE_DEVICES"] = val
69
+
70
+ # AMDSMI utils
71
+ # Note that NVML is not affected by `{CUDA/HIP}_VISIBLE_DEVICES`,
72
+ # all the related functions work on real physical device ids.
73
+ # the major benefit of using AMDSMI is that it will not initialize CUDA
74
+
75
+
76
+ def with_amdsmi_context(fn):
77
+
78
+ @wraps(fn)
79
+ def wrapper(*args, **kwargs):
80
+ amdsmi_init()
81
+ try:
82
+ return fn(*args, **kwargs)
83
+ finally:
84
+ amdsmi_shut_down()
85
+
86
+ return wrapper
87
+
88
+
89
+ def device_id_to_physical_device_id(device_id: int) -> int:
90
+ if "CUDA_VISIBLE_DEVICES" in os.environ:
91
+ device_ids = os.environ["CUDA_VISIBLE_DEVICES"].split(",")
92
+ physical_device_id = device_ids[device_id]
93
+ return int(physical_device_id)
94
+ else:
95
+ return device_id
96
+
97
+
98
+ def on_mi250_mi300() -> bool:
99
+ GPU_ARCH = torch.cuda.get_device_properties("cuda").gcnArchName
100
+ return any(arch in GPU_ARCH for arch in ["gfx90a", "gfx942"])
101
+
102
+
103
+ @cache
104
+ def use_rocm_custom_paged_attention(qtype: torch.dtype, head_size: int,
105
+ block_size: int, gqa_ratio: int,
106
+ max_seq_len: int,
107
+ sliding_window: int) -> bool:
108
+
109
+ # rocm custom page attention not support on gfx1*
110
+ # custom paged attn always supported on V0. On V1, requires sliding window
111
+ # disabled due to observed numerical discrepancy.
112
+ return (on_mi250_mi300() and (not envs.VLLM_USE_V1 or sliding_window == 0
113
+ or sliding_window == (-1, -1))
114
+ and (qtype == torch.half or qtype == torch.bfloat16)
115
+ and (head_size == 64 or head_size == 128)
116
+ and (block_size == 16 or block_size == 32)
117
+ and (gqa_ratio >= 1 and gqa_ratio <= 16) and max_seq_len <= 32768
118
+ and (envs.VLLM_ROCM_CUSTOM_PAGED_ATTN)
119
+ and not (envs.VLLM_ROCM_USE_AITER_PAGED_ATTN
120
+ and envs.VLLM_ROCM_USE_AITER))
121
+
122
+
123
+ class RocmPlatform(Platform):
124
+ _enum = PlatformEnum.ROCM
125
+ device_name: str = "rocm"
126
+ device_type: str = "cuda"
127
+ dispatch_key: str = "CUDA"
128
+ ray_device_key: str = "GPU"
129
+ # rocm shares the same device control env var as CUDA
130
+ device_control_env_var: str = "CUDA_VISIBLE_DEVICES"
131
+
132
+ supported_quantization: list[str] = [
133
+ "awq", "gptq", "fp8", "compressed-tensors", "fbgemm_fp8", "gguf",
134
+ "quark", "ptpc_fp8"
135
+ ]
136
+
137
+ @classmethod
138
+ def get_attn_backend_cls(cls, selected_backend, head_size, dtype,
139
+ kv_cache_dtype, block_size, use_v1,
140
+ use_mla) -> str:
141
+ if use_mla:
142
+ from vllm.attention.backends.rocm_aiter_mla import (
143
+ is_aiter_mla_enabled)
144
+
145
+ if selected_backend is None:
146
+ selected_backend = (_Backend.ROCM_AITER_MLA if
147
+ is_aiter_mla_enabled() or block_size == 1
148
+ else _Backend.TRITON_MLA)
149
+
150
+ if selected_backend == _Backend.TRITON_MLA:
151
+ if block_size != 1:
152
+ logger.info("Using Triton MLA backend.")
153
+ return "vllm.attention.backends.triton_mla.TritonMLABackend" # noqa: E501
154
+ else:
155
+ raise ValueError(
156
+ f" The selected backend, {selected_backend.name},"
157
+ f"does not support block size {block_size}.")
158
+ elif selected_backend == _Backend.ROCM_AITER_MLA:
159
+ if block_size == 1:
160
+ logger.info("Using AITER MLA backend.")
161
+ return "vllm.attention.backends.rocm_aiter_mla.AiterMLABackend" # noqa: E501
162
+ else:
163
+ raise ValueError(
164
+ f" The selected backend, {selected_backend.name},"
165
+ f"does not support block size {block_size}."
166
+ "(currently only supports block size 1)")
167
+ else:
168
+ raise ValueError(
169
+ f" The selected backend, {selected_backend.name},"
170
+ f"is not MLA type while requested for MLA backend.")
171
+
172
+ selected_backend = (_Backend.ROCM_FLASH if selected_backend
173
+ == _Backend.FLASH_ATTN else selected_backend)
174
+ if envs.VLLM_USE_V1:
175
+ logger.info("Using Triton Attention backend on V1 engine.")
176
+ return ("vllm.v1.attention.backends."
177
+ "triton_attn.TritonAttentionBackend")
178
+ if selected_backend == _Backend.ROCM_FLASH:
179
+ if not cls.has_device_capability(90):
180
+ # not Instinct series GPUs.
181
+ logger.info("flash_attn is not supported on NAVI GPUs.")
182
+ else:
183
+ logger.info("%s is not supported in AMD GPUs.", selected_backend)
184
+ logger.info("Using ROCmFlashAttention backend.")
185
+ return "vllm.attention.backends.rocm_flash_attn.ROCmFlashAttentionBackend" # noqa: E501
186
+
187
+ @classmethod
188
+ @lru_cache(maxsize=8)
189
+ def get_device_capability(cls,
190
+ device_id: int = 0
191
+ ) -> Optional[DeviceCapability]:
192
+ major, minor = torch.cuda.get_device_capability(device_id)
193
+ return DeviceCapability(major=major, minor=minor)
194
+
195
+ @staticmethod
196
+ @with_amdsmi_context
197
+ def is_fully_connected(physical_device_ids: List[int]) -> bool:
198
+ """
199
+ Query if the set of gpus are fully connected by xgmi (1 hop)
200
+ """
201
+ handles = [
202
+ amdsmi_get_processor_handles()[i] for i in physical_device_ids
203
+ ]
204
+ for i, handle in enumerate(handles):
205
+ for j, peer_handle in enumerate(handles):
206
+ if i < j:
207
+ try:
208
+ link_type = amdsmi_topo_get_link_type(
209
+ handle, peer_handle)
210
+ # type is 2 for XGMI
211
+ if link_type["hops"] != 1 or link_type["type"] != 2:
212
+ return False
213
+ except AmdSmiException as error:
214
+ logger.error("AMD 1 hop XGMI detection failed.",
215
+ exc_info=error)
216
+ return False
217
+ return True
218
+
219
+ @classmethod
220
+ @with_amdsmi_context
221
+ @lru_cache(maxsize=8)
222
+ def get_device_name(cls, device_id: int = 0) -> str:
223
+ physical_device_id = device_id_to_physical_device_id(device_id)
224
+ handle = amdsmi_get_processor_handles()[physical_device_id]
225
+ return amdsmi_get_gpu_asic_info(handle)["market_name"]
226
+
227
+ @classmethod
228
+ def get_device_total_memory(cls, device_id: int = 0) -> int:
229
+ device_props = torch.cuda.get_device_properties(device_id)
230
+ return device_props.total_memory
231
+
232
+ @classmethod
233
+ def is_async_output_supported(cls, enforce_eager: Optional[bool]) -> bool:
234
+ if enforce_eager:
235
+ logger.warning(
236
+ "To see benefits of async output processing, enable CUDA "
237
+ "graph. Since, enforce-eager is enabled, async output "
238
+ "processor cannot be used")
239
+ return False
240
+ return True
241
+
242
+ @classmethod
243
+ def check_and_update_config(cls, vllm_config: "VllmConfig") -> None:
244
+ cache_config = vllm_config.cache_config
245
+ if cache_config and cache_config.block_size is None:
246
+ cache_config.block_size = 16
247
+
248
+ parallel_config = vllm_config.parallel_config
249
+ scheduler_config = vllm_config.scheduler_config
250
+ if parallel_config.worker_cls == "auto":
251
+ if scheduler_config.is_multi_step:
252
+ if envs.VLLM_USE_V1:
253
+ raise NotImplementedError(
254
+ "Multi-step scheduling is not supported (and not "
255
+ "needed) on vLLM V1. Please launch without "
256
+ "--num-scheduler-steps.")
257
+ else:
258
+ parallel_config.worker_cls = \
259
+ "vllm.worker.multi_step_worker.MultiStepWorker"
260
+ elif vllm_config.speculative_config:
261
+ if envs.VLLM_USE_V1:
262
+ raise NotImplementedError(
263
+ "Speculative decoding is not yet supported on vLLM V1."
264
+ )
265
+ else:
266
+ parallel_config.worker_cls = \
267
+ "vllm.spec_decode.spec_decode_worker.create_spec_worker"
268
+ parallel_config.sd_worker_cls = \
269
+ "vllm.worker.worker.Worker"
270
+ else:
271
+ if envs.VLLM_USE_V1:
272
+ parallel_config.worker_cls = \
273
+ "vllm.v1.worker.gpu_worker.Worker"
274
+ else:
275
+ parallel_config.worker_cls = "vllm.worker.worker.Worker"
276
+
277
+ @classmethod
278
+ def verify_model_arch(cls, model_arch: str) -> None:
279
+ if model_arch in _ROCM_UNSUPPORTED_MODELS:
280
+ raise ValueError(f"Model architecture '{model_arch}' is not "
281
+ "supported by ROCm for now.")
282
+
283
+ if model_arch in _ROCM_PARTIALLY_SUPPORTED_MODELS:
284
+ msg = _ROCM_PARTIALLY_SUPPORTED_MODELS[model_arch]
285
+ logger.warning(
286
+ "Model architecture '%s' is partially "
287
+ "supported by ROCm: %s", model_arch, msg)
288
+
289
+ @classmethod
290
+ def verify_quantization(cls, quant: str) -> None:
291
+ super().verify_quantization(quant)
292
+ if quant == "awq" and not envs.VLLM_USE_TRITON_AWQ:
293
+ logger.warning(
294
+ "Using AWQ quantization with ROCm, but VLLM_USE_TRITON_AWQ"
295
+ " is not set, enabling VLLM_USE_TRITON_AWQ.")
296
+ envs.VLLM_USE_TRITON_AWQ = True
297
+
298
+ @classmethod
299
+ def get_punica_wrapper(cls) -> str:
300
+ return "vllm.lora.punica_wrapper.punica_gpu.PunicaWrapperGPU"
301
+
302
+ @classmethod
303
+ def get_current_memory_usage(cls,
304
+ device: Optional[torch.types.Device] = None
305
+ ) -> float:
306
+ torch.cuda.reset_peak_memory_stats(device)
307
+ return torch.cuda.mem_get_info(device)[1] - torch.cuda.mem_get_info(
308
+ device)[0]
309
+
310
+ @classmethod
311
+ def get_device_communicator_cls(cls) -> str:
312
+ return "vllm.distributed.device_communicators.cuda_communicator.CudaCommunicator" # noqa
313
+
314
+ @classmethod
315
+ def supports_fp8(cls) -> bool:
316
+ gcn_arch = torch.cuda.get_device_properties(0).gcnArchName
317
+ return any(gfx in gcn_arch for gfx in ['gfx94', 'gfx95', 'gfx12'])
318
+
319
+ @classmethod
320
+ def is_fp8_fnuz(cls) -> bool:
321
+ # only device 0 is checked, this assumes MI300 platforms are homogeneous
322
+ return 'gfx94' in torch.cuda.get_device_properties(0).gcnArchName
323
+
324
+ @classmethod
325
+ def fp8_dtype(cls) -> torch.dtype:
326
+ if cls.is_fp8_fnuz():
327
+ return torch.float8_e4m3fnuz
328
+ else:
329
+ return torch.float8_e4m3fn
330
+
331
+ @classmethod
332
+ def supports_v1(cls, model_config: "ModelConfig") -> bool:
333
+ # V1 support on AMD gpus is experimental
334
+ return True
335
+
336
+ @classmethod
337
+ def use_custom_allreduce(cls) -> bool:
338
+ # We only enable custom allreduce for MI300 series
339
+ gcn_arch = torch.cuda.get_device_properties(0).gcnArchName
340
+ supported_archs = ['gfx94']
341
+ return any(gfx in gcn_arch for gfx in supported_archs)
342
+
343
+ @classmethod
344
+ def get_cu_count(cls, device_id: int = 0) -> int:
345
+ return torch.cuda.get_device_properties(
346
+ device_id).multi_processor_count
vllm/platforms/tpu.py ADDED
@@ -0,0 +1,174 @@
1
+ # SPDX-License-Identifier: Apache-2.0
2
+
3
+ from typing import TYPE_CHECKING, Optional, Union
4
+
5
+ import torch
6
+
7
+ import vllm.envs as envs
8
+ from vllm.inputs import ProcessorInputs, PromptType
9
+ from vllm.logger import init_logger
10
+ from vllm.sampling_params import SamplingParams, SamplingType
11
+
12
+ from .interface import Platform, PlatformEnum, _Backend
13
+
14
+ if TYPE_CHECKING:
15
+ from vllm.config import ModelConfig, VllmConfig
16
+ from vllm.pooling_params import PoolingParams
17
+ else:
18
+ ModelConfig = None
19
+ VllmConfig = None
20
+ PoolingParams = None
21
+
22
+ logger = init_logger(__name__)
23
+
24
+
25
+ class TpuPlatform(Platform):
26
+ _enum = PlatformEnum.TPU
27
+ device_name: str = "tpu"
28
+ device_type: str = "tpu"
29
+ dispatch_key: str = "XLA"
30
+ ray_device_key: str = "TPU"
31
+ device_control_env_var: str = "TPU_VISIBLE_CHIPS"
32
+
33
+ supported_quantization: list[str] = ["tpu_int8", "compressed-tensors"]
34
+
35
+ additional_env_vars: list[str] = [
36
+ "TPU_CHIPS_PER_HOST_BOUNDS", "TPU_HOST_BOUNDS"
37
+ ]
38
+
39
+ @classmethod
40
+ def get_attn_backend_cls(cls, selected_backend: _Backend, head_size: int,
41
+ dtype: torch.dtype, kv_cache_dtype: Optional[str],
42
+ block_size: int, use_v1: bool,
43
+ use_mla: bool) -> str:
44
+ if (selected_backend != _Backend.PALLAS
45
+ and selected_backend != _Backend.PALLAS_VLLM_V1):
46
+ logger.info("Cannot use %s backend on TPU.", selected_backend)
47
+
48
+ if use_v1:
49
+ logger.info("Using Pallas V1 backend.")
50
+ return "vllm.v1.attention.backends.pallas.PallasAttentionBackend"
51
+ else:
52
+ logger.info("Using Pallas backend.")
53
+ return "vllm.attention.backends.pallas.PallasAttentionBackend"
54
+
55
+ @classmethod
56
+ def get_device_name(cls, device_id: int = 0) -> str:
57
+ return "tpu"
58
+
59
+ @classmethod
60
+ def get_device_total_memory(cls, device_id: int = 0) -> int:
61
+ raise NotImplementedError
62
+
63
+ @classmethod
64
+ def is_async_output_supported(cls, enforce_eager: Optional[bool]) -> bool:
65
+ return not envs.VLLM_USE_V1
66
+
67
+ @classmethod
68
+ def inference_mode(cls):
69
+ return torch.no_grad()
70
+
71
+ @classmethod
72
+ def check_and_update_config(cls, vllm_config: VllmConfig) -> None:
73
+ from vllm.config import CompilationLevel
74
+
75
+ cache_config = vllm_config.cache_config
76
+ if cache_config and cache_config.block_size is None:
77
+ cache_config.block_size = 16
78
+
79
+ compilation_config = vllm_config.compilation_config
80
+
81
+ # TPU only supports DYNAMO_ONCE compilation level
82
+ if compilation_config.level != CompilationLevel.DYNAMO_ONCE:
83
+ logger.info("[TPU] Forcing DYNAMO_ONCE compilation level")
84
+ compilation_config.level = CompilationLevel.DYNAMO_ONCE
85
+
86
+ if compilation_config.backend == "":
87
+ compilation_config.backend = "openxla"
88
+
89
+ assert vllm_config.speculative_config is None, \
90
+ "TPU does not support speculative decoding"
91
+
92
+ if vllm_config.model_config.dtype in (torch.float16, torch.float32):
93
+ logger.warning(
94
+ "The TPU backend currently does not support %s. "
95
+ "Using bfloat16 instead.", vllm_config.model_config.dtype)
96
+ vllm_config.model_config.dtype = torch.bfloat16
97
+
98
+ if envs.VLLM_USE_V1:
99
+ from vllm.v1.attention.backends.pallas import (
100
+ PallasAttentionBackend)
101
+ min_page_size = PallasAttentionBackend.get_min_page_size(
102
+ vllm_config)
103
+ if min_page_size > vllm_config.cache_config.block_size:
104
+ logger.warning(
105
+ "Increase the page size from %s to %s to make sure there's"
106
+ "no SMEM OOM",
107
+ vllm_config.cache_config.block_size,
108
+ min_page_size,
109
+ )
110
+ vllm_config.cache_config.block_size = min_page_size
111
+
112
+ parallel_config = vllm_config.parallel_config
113
+ scheduler_config = vllm_config.scheduler_config
114
+ if parallel_config.worker_cls == "auto":
115
+ if scheduler_config.is_multi_step:
116
+ if envs.VLLM_USE_V1:
117
+ raise NotImplementedError(
118
+ "Multi-step scheduling is not supported (and not "
119
+ "needed) on vLLM V1. Please launch without "
120
+ "--num-scheduler-steps.")
121
+ else:
122
+ parallel_config.worker_cls = \
123
+ "vllm.worker.multi_step_tpu_worker.MultiStepTPUWorker"
124
+ else:
125
+ if envs.VLLM_USE_V1:
126
+ parallel_config.worker_cls = \
127
+ "vllm.v1.worker.tpu_worker.TPUWorker"
128
+ else:
129
+ parallel_config.worker_cls = \
130
+ "vllm.worker.tpu_worker.TPUWorker"
131
+
132
+ assert not vllm_config.speculative_config, (
133
+ "Speculative decoding is not yet supported for TPU backend")
134
+
135
+ if scheduler_config.is_multimodal_model and not \
136
+ scheduler_config.disable_chunked_mm_input:
137
+ logger.warning("TPU does not support running Multimodal models"\
138
+ " without setting `--disable_chunked_mm_input`. " \
139
+ "Forcing --disable_chunked_mm_input.")
140
+ scheduler_config.disable_chunked_mm_input = True
141
+
142
+ @classmethod
143
+ def is_pin_memory_available(cls):
144
+ logger.warning("Pin memory is not supported on TPU.")
145
+ return False
146
+
147
+ @classmethod
148
+ def get_device_communicator_cls(cls) -> str:
149
+ return "vllm.distributed.device_communicators.tpu_communicator.TpuCommunicator" # noqa
150
+
151
+ @classmethod
152
+ def use_all_gather(cls) -> bool:
153
+ return True
154
+
155
+ @classmethod
156
+ def supports_v1(cls, model_config: ModelConfig) -> bool:
157
+ # V1 support on TPU is experimental
158
+ return True
159
+
160
+ @classmethod
161
+ def validate_request(
162
+ cls,
163
+ prompt: PromptType,
164
+ params: Union[SamplingParams, PoolingParams],
165
+ processed_inputs: ProcessorInputs,
166
+ ) -> None:
167
+ """Raises if this request is unsupported on this platform"""
168
+ if isinstance(params, SamplingParams):
169
+ if params.guided_decoding is not None and not envs.VLLM_USE_V1:
170
+ raise ValueError("Structured output is not supported on "
171
+ f"{cls.device_name} V0.")
172
+ if params.sampling_type == SamplingType.RANDOM_SEED:
173
+ raise ValueError(
174
+ "Torch XLA does not support per-request seed.")
vllm/platforms/xpu.py ADDED
@@ -0,0 +1,142 @@
1
+ # SPDX-License-Identifier: Apache-2.0
2
+
3
+ from typing import TYPE_CHECKING, Optional
4
+
5
+ import torch
6
+
7
+ from vllm.logger import init_logger
8
+
9
+ from .interface import DeviceCapability, Platform, PlatformEnum, _Backend
10
+
11
+ if TYPE_CHECKING:
12
+ from vllm.config import VllmConfig
13
+ else:
14
+ VllmConfig = None
15
+
16
+ logger = init_logger(__name__)
17
+
18
+
19
+ class XPUPlatform(Platform):
20
+ _enum = PlatformEnum.XPU
21
+ device_name: str = "xpu"
22
+ device_type: str = "xpu"
23
+ dispatch_key: str = "XPU"
24
+ # Intel XPU's device key is "GPU" for Ray.
25
+ # see https://github.com/ray-project/ray/blob/6a5eb5865eeb9ccf058a79b44f107e327e360673/python/ray/_private/accelerators/intel_gpu.py#L20 # noqa: E501
26
+ ray_device_key: str = "GPU"
27
+ device_control_env_var: str = "ONEAPI_DEVICE_SELECTOR"
28
+
29
+ @classmethod
30
+ def get_attn_backend_cls(cls, selected_backend: _Backend, head_size: int,
31
+ dtype: torch.dtype, kv_cache_dtype: Optional[str],
32
+ block_size: int, use_v1: bool,
33
+ use_mla: bool) -> str:
34
+ if selected_backend != _Backend.IPEX:
35
+ logger.info("Cannot use %s backend on XPU.", selected_backend)
36
+ logger.info("Using IPEX attention backend.")
37
+ return "vllm.attention.backends.ipex_attn.IpexAttnBackend"
38
+
39
+ @staticmethod
40
+ def get_device_capability(
41
+ device_id: int = 0) -> Optional[DeviceCapability]:
42
+ # capacity format differs from cuda's and will cause unexpected
43
+ # failure, so use None directly
44
+ return None
45
+
46
+ @staticmethod
47
+ def get_device_name(device_id: int = 0) -> str:
48
+ return torch.xpu.get_device_name(device_id)
49
+
50
+ @classmethod
51
+ def get_device_total_memory(cls, device_id: int = 0) -> int:
52
+ device_props = torch.xpu.get_device_properties(device_id)
53
+ return device_props.total_memory
54
+
55
+ @classmethod
56
+ def is_async_output_supported(cls, enforce_eager: Optional[bool]) -> bool:
57
+ return True
58
+
59
+ @staticmethod
60
+ def inference_mode():
61
+ return torch.no_grad()
62
+
63
+ @classmethod
64
+ def check_and_update_config(cls, vllm_config: VllmConfig) -> None:
65
+ cache_config = vllm_config.cache_config
66
+ if cache_config and cache_config.block_size is None:
67
+ cache_config.block_size = 16
68
+
69
+ # check and update model config
70
+ model_config = vllm_config.model_config
71
+ if model_config.dtype == torch.bfloat16:
72
+ bf16_supported = cls.device_support_bf16()
73
+ if not bf16_supported:
74
+ logger.warning(
75
+ "bfloat16 is only supported on Intel Data Center GPU, "
76
+ "Intel Arc GPU is not supported yet. Your device is %s,"
77
+ " which is not supported. will fallback to float16",
78
+ cls.get_device_name())
79
+ model_config.dtype = torch.float16
80
+ if not model_config.enforce_eager:
81
+ logger.warning(
82
+ "CUDA graph is not supported on XPU, fallback to the eager "
83
+ "mode.")
84
+ model_config.enforce_eager = True
85
+
86
+ if vllm_config.speculative_config is not None:
87
+ raise NotImplementedError(
88
+ "XPU does not support speculative decoding")
89
+
90
+ if vllm_config.device_config is not None:
91
+ assert vllm_config.device_config.device_type == "xpu"
92
+
93
+ # check and update parallel config
94
+ parallel_config = vllm_config.parallel_config
95
+ if parallel_config.worker_cls == "auto":
96
+ parallel_config.worker_cls = "vllm.worker.xpu_worker.XPUWorker"
97
+
98
+ if parallel_config.distributed_executor_backend is None:
99
+ parallel_config.distributed_executor_backend = "ray"
100
+ elif parallel_config.distributed_executor_backend == "mp":
101
+ # FIXME(kunshang):
102
+ # spawn needs calling `if __name__ == '__main__':``
103
+ # fork is not supported for xpu start new process.
104
+ logger.error(
105
+ "Both start methods (spawn and fork) have issue "
106
+ "on XPU if you use mp backend, setting it to ray instead.")
107
+ parallel_config.distributed_executor_backend = "ray"
108
+
109
+ elif parallel_config.distributed_executor_backend != "ray":
110
+ logger.warning(
111
+ "%s is not supported on XPU, fallback to ray distributed"
112
+ " executor backend.",
113
+ parallel_config.distributed_executor_backend)
114
+ parallel_config.distributed_executor_backend = "ray"
115
+
116
+ @classmethod
117
+ def is_pin_memory_available(cls):
118
+ logger.warning("Pin memory is not supported on XPU.")
119
+ return False
120
+
121
+ @classmethod
122
+ def get_current_memory_usage(cls,
123
+ device: Optional[torch.types.Device] = None
124
+ ) -> float:
125
+ torch.xpu.reset_peak_memory_stats(device)
126
+ return torch.xpu.max_memory_allocated(device)
127
+
128
+ @classmethod
129
+ def device_support_bf16(cls) -> bool:
130
+ device_name = cls.get_device_name().lower()
131
+ if device_name.count("arc") > 0:
132
+ return False
133
+ elif device_name.count("data center gpu") > 0:
134
+ return True
135
+ else:
136
+ logger.warning("Unknown device name %s, always use float16",
137
+ device_name)
138
+ return False
139
+
140
+ @classmethod
141
+ def get_device_communicator_cls(cls) -> str:
142
+ return "vllm.distributed.device_communicators.xpu_communicator.XpuCommunicator" # noqa