crabstone 3.0.3 → 4.0.0

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Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +45 -42
  3. data/README.md +16 -33
  4. data/lib/crabstone.rb +5 -557
  5. data/lib/crabstone/arch.rb +37 -0
  6. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  7. data/lib/crabstone/arch/3/arm64.rb +124 -0
  8. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  9. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  10. data/lib/crabstone/arch/3/mips.rb +57 -0
  11. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  12. data/lib/crabstone/arch/3/ppc.rb +73 -0
  13. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  14. data/lib/crabstone/arch/3/sparc.rb +60 -0
  15. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  16. data/lib/crabstone/arch/3/sysz.rb +67 -0
  17. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  18. data/lib/crabstone/arch/3/x86.rb +82 -0
  19. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  20. data/lib/crabstone/arch/3/xcore.rb +59 -0
  21. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  22. data/lib/crabstone/arch/4/arm.rb +110 -0
  23. data/lib/crabstone/arch/4/arm64.rb +125 -0
  24. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  25. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  26. data/lib/crabstone/arch/4/evm.rb +20 -0
  27. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  28. data/lib/crabstone/arch/4/m680x.rb +106 -0
  29. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  30. data/lib/crabstone/arch/4/m68k.rb +129 -0
  31. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  32. data/lib/crabstone/arch/4/mips.rb +57 -0
  33. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  34. data/lib/crabstone/arch/4/ppc.rb +73 -0
  35. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  36. data/lib/crabstone/arch/4/sparc.rb +60 -0
  37. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  38. data/lib/crabstone/arch/4/sysz.rb +67 -0
  39. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  40. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  41. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  42. data/lib/crabstone/arch/4/x86.rb +91 -0
  43. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  44. data/lib/crabstone/arch/4/xcore.rb +59 -0
  45. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  46. data/lib/crabstone/arch/extension.rb +27 -0
  47. data/lib/crabstone/arch/register.rb +36 -0
  48. data/lib/crabstone/binding.rb +60 -0
  49. data/lib/crabstone/binding/3/detail.rb +36 -0
  50. data/lib/crabstone/binding/3/instruction.rb +23 -0
  51. data/lib/crabstone/binding/4/detail.rb +40 -0
  52. data/lib/crabstone/binding/4/instruction.rb +23 -0
  53. data/lib/crabstone/binding/structs.rb +32 -0
  54. data/lib/crabstone/constants.rb +110 -0
  55. data/lib/crabstone/cs_version.rb +49 -0
  56. data/lib/crabstone/disassembler.rb +153 -0
  57. data/lib/crabstone/error.rb +60 -0
  58. data/lib/crabstone/instruction.rb +183 -0
  59. data/lib/crabstone/version.rb +5 -0
  60. metadata +128 -324
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
@@ -0,0 +1,129 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'm68k_const'
9
+
10
+ module Crabstone
11
+ module M68K
12
+ class OperandRegPair < FFI::Struct
13
+ layout(
14
+ :reg_0, :uint,
15
+ :reg_1, :uint
16
+ )
17
+ end
18
+
19
+ class OperandValue < FFI::Union
20
+ layout(
21
+ :imm, :long,
22
+ :dimm, :double,
23
+ :simm, :float,
24
+ :reg, :uint,
25
+ :reg_pair, OperandRegPair
26
+ )
27
+ end
28
+
29
+ class OperandMemory < FFI::Struct
30
+ layout(
31
+ :base_reg, :uint,
32
+ :index_reg, :uint,
33
+ :in_base_reg, :uint,
34
+ :in_disp, :uint,
35
+ :out_disp, :uint,
36
+ :disp, :short,
37
+ :scale, :uint8,
38
+ :bitfield, :uint8,
39
+ :width, :uint8,
40
+ :offset, :uint8,
41
+ :index_size, :uint8
42
+ )
43
+ end
44
+
45
+ class OperandBrDisp < FFI::Struct
46
+ layout(
47
+ :disp, :int,
48
+ :disp_size, :uint8
49
+ )
50
+ end
51
+
52
+ class Operand < FFI::Struct
53
+ layout(
54
+ :value, OperandValue,
55
+ :mem, OperandMemory,
56
+ :br_disp, OperandBrDisp,
57
+ :register_bits, :uint,
58
+ :type, :uint,
59
+ :address_mode, :uint
60
+ )
61
+
62
+ include Crabstone::Extension::Operand
63
+
64
+ # Use Extension::Operand#value first
65
+ alias super_value value
66
+
67
+ def value
68
+ super_value || if mem?
69
+ self[:mem]
70
+ elsif br_disp?
71
+ self[:br_disp]
72
+ elsif reg_bits?
73
+ self[:register_bits]
74
+ end
75
+ end
76
+
77
+ def reg?
78
+ self[:type] == OP_REG
79
+ end
80
+
81
+ def imm?
82
+ self[:type] == OP_IMM
83
+ end
84
+
85
+ def mem?
86
+ self[:type] == OP_MEM
87
+ end
88
+
89
+ def fp_single?
90
+ self[:type] == OP_FP_SINGLE
91
+ end
92
+ alias simm? fp_single?
93
+
94
+ def fp_double?
95
+ self[:type] == OP_FP_DOUBLE
96
+ end
97
+ alias dimm? fp_double?
98
+
99
+ def reg_bits?
100
+ self[:type] == OP_REG_BITS
101
+ end
102
+
103
+ def reg_pair?
104
+ self[:type] == OP_REG_PAIR
105
+ end
106
+
107
+ def br_disp?
108
+ self[:type] == OP_BR_DISP
109
+ end
110
+ end
111
+
112
+ class OperandSize < FFI::Struct
113
+ layout(
114
+ :type, :uint,
115
+ :size, :uint
116
+ )
117
+ end
118
+
119
+ class Instruction < FFI::Struct
120
+ layout(
121
+ :operands, [Operand, 4],
122
+ :op_size, OperandSize,
123
+ :op_count, :uint8
124
+ )
125
+
126
+ include Crabstone::Extension::Instruction
127
+ end
128
+ end
129
+ end
@@ -0,0 +1,496 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'crabstone/arch/register'
6
+
7
+ module Crabstone
8
+ module M68K
9
+ OPERAND_COUNT = 4
10
+
11
+ REG_INVALID = 0
12
+ REG_D0 = 1
13
+ REG_D1 = 2
14
+ REG_D2 = 3
15
+ REG_D3 = 4
16
+ REG_D4 = 5
17
+ REG_D5 = 6
18
+ REG_D6 = 7
19
+ REG_D7 = 8
20
+ REG_A0 = 9
21
+ REG_A1 = 10
22
+ REG_A2 = 11
23
+ REG_A3 = 12
24
+ REG_A4 = 13
25
+ REG_A5 = 14
26
+ REG_A6 = 15
27
+ REG_A7 = 16
28
+ REG_FP0 = 17
29
+ REG_FP1 = 18
30
+ REG_FP2 = 19
31
+ REG_FP3 = 20
32
+ REG_FP4 = 21
33
+ REG_FP5 = 22
34
+ REG_FP6 = 23
35
+ REG_FP7 = 24
36
+ REG_PC = 25
37
+ REG_SR = 26
38
+ REG_CCR = 27
39
+ REG_SFC = 28
40
+ REG_DFC = 29
41
+ REG_USP = 30
42
+ REG_VBR = 31
43
+ REG_CACR = 32
44
+ REG_CAAR = 33
45
+ REG_MSP = 34
46
+ REG_ISP = 35
47
+ REG_TC = 36
48
+ REG_ITT0 = 37
49
+ REG_ITT1 = 38
50
+ REG_DTT0 = 39
51
+ REG_DTT1 = 40
52
+ REG_MMUSR = 41
53
+ REG_URP = 42
54
+ REG_SRP = 43
55
+ REG_FPCR = 44
56
+ REG_FPSR = 45
57
+ REG_FPIAR = 46
58
+ REG_ENDING = 47
59
+
60
+ AM_NONE = 0
61
+ AM_REG_DIRECT_DATA = 1
62
+ AM_REG_DIRECT_ADDR = 2
63
+ AM_REGI_ADDR = 3
64
+ AM_REGI_ADDR_POST_INC = 4
65
+ AM_REGI_ADDR_PRE_DEC = 5
66
+ AM_REGI_ADDR_DISP = 6
67
+ AM_AREGI_INDEX_8_BIT_DISP = 7
68
+ AM_AREGI_INDEX_BASE_DISP = 8
69
+ AM_MEMI_POST_INDEX = 9
70
+ AM_MEMI_PRE_INDEX = 10
71
+ AM_PCI_DISP = 11
72
+ AM_PCI_INDEX_8_BIT_DISP = 12
73
+ AM_PCI_INDEX_BASE_DISP = 13
74
+ AM_PC_MEMI_POST_INDEX = 14
75
+ AM_PC_MEMI_PRE_INDEX = 15
76
+ AM_ABSOLUTE_DATA_SHORT = 16
77
+ AM_ABSOLUTE_DATA_LONG = 17
78
+ AM_IMMEDIATE = 18
79
+ AM_BRANCH_DISPLACEMENT = 19
80
+
81
+ OP_INVALID = 0
82
+ OP_REG = 1
83
+ OP_IMM = 2
84
+ OP_MEM = 3
85
+ OP_FP_SINGLE = 4
86
+ OP_FP_DOUBLE = 5
87
+ OP_REG_BITS = 6
88
+ OP_REG_PAIR = 7
89
+ OP_BR_DISP = 8
90
+
91
+ OP_BR_DISP_SIZE_INVALID = 0
92
+ OP_BR_DISP_SIZE_BYTE = 1
93
+ OP_BR_DISP_SIZE_WORD = 2
94
+ OP_BR_DISP_SIZE_LONG = 4
95
+
96
+ CPU_SIZE_NONE = 0
97
+ CPU_SIZE_BYTE = 1
98
+ CPU_SIZE_WORD = 2
99
+ CPU_SIZE_LONG = 4
100
+
101
+ FPU_SIZE_NONE = 0
102
+ FPU_SIZE_SINGLE = 4
103
+ FPU_SIZE_DOUBLE = 8
104
+ FPU_SIZE_EXTENDED = 12
105
+
106
+ SIZE_TYPE_INVALID = 0
107
+ SIZE_TYPE_CPU = 1
108
+ SIZE_TYPE_FPU = 2
109
+
110
+ INS_INVALID = 0
111
+ INS_ABCD = 1
112
+ INS_ADD = 2
113
+ INS_ADDA = 3
114
+ INS_ADDI = 4
115
+ INS_ADDQ = 5
116
+ INS_ADDX = 6
117
+ INS_AND = 7
118
+ INS_ANDI = 8
119
+ INS_ASL = 9
120
+ INS_ASR = 10
121
+ INS_BHS = 11
122
+ INS_BLO = 12
123
+ INS_BHI = 13
124
+ INS_BLS = 14
125
+ INS_BCC = 15
126
+ INS_BCS = 16
127
+ INS_BNE = 17
128
+ INS_BEQ = 18
129
+ INS_BVC = 19
130
+ INS_BVS = 20
131
+ INS_BPL = 21
132
+ INS_BMI = 22
133
+ INS_BGE = 23
134
+ INS_BLT = 24
135
+ INS_BGT = 25
136
+ INS_BLE = 26
137
+ INS_BRA = 27
138
+ INS_BSR = 28
139
+ INS_BCHG = 29
140
+ INS_BCLR = 30
141
+ INS_BSET = 31
142
+ INS_BTST = 32
143
+ INS_BFCHG = 33
144
+ INS_BFCLR = 34
145
+ INS_BFEXTS = 35
146
+ INS_BFEXTU = 36
147
+ INS_BFFFO = 37
148
+ INS_BFINS = 38
149
+ INS_BFSET = 39
150
+ INS_BFTST = 40
151
+ INS_BKPT = 41
152
+ INS_CALLM = 42
153
+ INS_CAS = 43
154
+ INS_CAS2 = 44
155
+ INS_CHK = 45
156
+ INS_CHK2 = 46
157
+ INS_CLR = 47
158
+ INS_CMP = 48
159
+ INS_CMPA = 49
160
+ INS_CMPI = 50
161
+ INS_CMPM = 51
162
+ INS_CMP2 = 52
163
+ INS_CINVL = 53
164
+ INS_CINVP = 54
165
+ INS_CINVA = 55
166
+ INS_CPUSHL = 56
167
+ INS_CPUSHP = 57
168
+ INS_CPUSHA = 58
169
+ INS_DBT = 59
170
+ INS_DBF = 60
171
+ INS_DBHI = 61
172
+ INS_DBLS = 62
173
+ INS_DBCC = 63
174
+ INS_DBCS = 64
175
+ INS_DBNE = 65
176
+ INS_DBEQ = 66
177
+ INS_DBVC = 67
178
+ INS_DBVS = 68
179
+ INS_DBPL = 69
180
+ INS_DBMI = 70
181
+ INS_DBGE = 71
182
+ INS_DBLT = 72
183
+ INS_DBGT = 73
184
+ INS_DBLE = 74
185
+ INS_DBRA = 75
186
+ INS_DIVS = 76
187
+ INS_DIVSL = 77
188
+ INS_DIVU = 78
189
+ INS_DIVUL = 79
190
+ INS_EOR = 80
191
+ INS_EORI = 81
192
+ INS_EXG = 82
193
+ INS_EXT = 83
194
+ INS_EXTB = 84
195
+ INS_FABS = 85
196
+ INS_FSABS = 86
197
+ INS_FDABS = 87
198
+ INS_FACOS = 88
199
+ INS_FADD = 89
200
+ INS_FSADD = 90
201
+ INS_FDADD = 91
202
+ INS_FASIN = 92
203
+ INS_FATAN = 93
204
+ INS_FATANH = 94
205
+ INS_FBF = 95
206
+ INS_FBEQ = 96
207
+ INS_FBOGT = 97
208
+ INS_FBOGE = 98
209
+ INS_FBOLT = 99
210
+ INS_FBOLE = 100
211
+ INS_FBOGL = 101
212
+ INS_FBOR = 102
213
+ INS_FBUN = 103
214
+ INS_FBUEQ = 104
215
+ INS_FBUGT = 105
216
+ INS_FBUGE = 106
217
+ INS_FBULT = 107
218
+ INS_FBULE = 108
219
+ INS_FBNE = 109
220
+ INS_FBT = 110
221
+ INS_FBSF = 111
222
+ INS_FBSEQ = 112
223
+ INS_FBGT = 113
224
+ INS_FBGE = 114
225
+ INS_FBLT = 115
226
+ INS_FBLE = 116
227
+ INS_FBGL = 117
228
+ INS_FBGLE = 118
229
+ INS_FBNGLE = 119
230
+ INS_FBNGL = 120
231
+ INS_FBNLE = 121
232
+ INS_FBNLT = 122
233
+ INS_FBNGE = 123
234
+ INS_FBNGT = 124
235
+ INS_FBSNE = 125
236
+ INS_FBST = 126
237
+ INS_FCMP = 127
238
+ INS_FCOS = 128
239
+ INS_FCOSH = 129
240
+ INS_FDBF = 130
241
+ INS_FDBEQ = 131
242
+ INS_FDBOGT = 132
243
+ INS_FDBOGE = 133
244
+ INS_FDBOLT = 134
245
+ INS_FDBOLE = 135
246
+ INS_FDBOGL = 136
247
+ INS_FDBOR = 137
248
+ INS_FDBUN = 138
249
+ INS_FDBUEQ = 139
250
+ INS_FDBUGT = 140
251
+ INS_FDBUGE = 141
252
+ INS_FDBULT = 142
253
+ INS_FDBULE = 143
254
+ INS_FDBNE = 144
255
+ INS_FDBT = 145
256
+ INS_FDBSF = 146
257
+ INS_FDBSEQ = 147
258
+ INS_FDBGT = 148
259
+ INS_FDBGE = 149
260
+ INS_FDBLT = 150
261
+ INS_FDBLE = 151
262
+ INS_FDBGL = 152
263
+ INS_FDBGLE = 153
264
+ INS_FDBNGLE = 154
265
+ INS_FDBNGL = 155
266
+ INS_FDBNLE = 156
267
+ INS_FDBNLT = 157
268
+ INS_FDBNGE = 158
269
+ INS_FDBNGT = 159
270
+ INS_FDBSNE = 160
271
+ INS_FDBST = 161
272
+ INS_FDIV = 162
273
+ INS_FSDIV = 163
274
+ INS_FDDIV = 164
275
+ INS_FETOX = 165
276
+ INS_FETOXM1 = 166
277
+ INS_FGETEXP = 167
278
+ INS_FGETMAN = 168
279
+ INS_FINT = 169
280
+ INS_FINTRZ = 170
281
+ INS_FLOG10 = 171
282
+ INS_FLOG2 = 172
283
+ INS_FLOGN = 173
284
+ INS_FLOGNP1 = 174
285
+ INS_FMOD = 175
286
+ INS_FMOVE = 176
287
+ INS_FSMOVE = 177
288
+ INS_FDMOVE = 178
289
+ INS_FMOVECR = 179
290
+ INS_FMOVEM = 180
291
+ INS_FMUL = 181
292
+ INS_FSMUL = 182
293
+ INS_FDMUL = 183
294
+ INS_FNEG = 184
295
+ INS_FSNEG = 185
296
+ INS_FDNEG = 186
297
+ INS_FNOP = 187
298
+ INS_FREM = 188
299
+ INS_FRESTORE = 189
300
+ INS_FSAVE = 190
301
+ INS_FSCALE = 191
302
+ INS_FSGLDIV = 192
303
+ INS_FSGLMUL = 193
304
+ INS_FSIN = 194
305
+ INS_FSINCOS = 195
306
+ INS_FSINH = 196
307
+ INS_FSQRT = 197
308
+ INS_FSSQRT = 198
309
+ INS_FDSQRT = 199
310
+ INS_FSF = 200
311
+ INS_FSBEQ = 201
312
+ INS_FSOGT = 202
313
+ INS_FSOGE = 203
314
+ INS_FSOLT = 204
315
+ INS_FSOLE = 205
316
+ INS_FSOGL = 206
317
+ INS_FSOR = 207
318
+ INS_FSUN = 208
319
+ INS_FSUEQ = 209
320
+ INS_FSUGT = 210
321
+ INS_FSUGE = 211
322
+ INS_FSULT = 212
323
+ INS_FSULE = 213
324
+ INS_FSNE = 214
325
+ INS_FST = 215
326
+ INS_FSSF = 216
327
+ INS_FSSEQ = 217
328
+ INS_FSGT = 218
329
+ INS_FSGE = 219
330
+ INS_FSLT = 220
331
+ INS_FSLE = 221
332
+ INS_FSGL = 222
333
+ INS_FSGLE = 223
334
+ INS_FSNGLE = 224
335
+ INS_FSNGL = 225
336
+ INS_FSNLE = 226
337
+ INS_FSNLT = 227
338
+ INS_FSNGE = 228
339
+ INS_FSNGT = 229
340
+ INS_FSSNE = 230
341
+ INS_FSST = 231
342
+ INS_FSUB = 232
343
+ INS_FSSUB = 233
344
+ INS_FDSUB = 234
345
+ INS_FTAN = 235
346
+ INS_FTANH = 236
347
+ INS_FTENTOX = 237
348
+ INS_FTRAPF = 238
349
+ INS_FTRAPEQ = 239
350
+ INS_FTRAPOGT = 240
351
+ INS_FTRAPOGE = 241
352
+ INS_FTRAPOLT = 242
353
+ INS_FTRAPOLE = 243
354
+ INS_FTRAPOGL = 244
355
+ INS_FTRAPOR = 245
356
+ INS_FTRAPUN = 246
357
+ INS_FTRAPUEQ = 247
358
+ INS_FTRAPUGT = 248
359
+ INS_FTRAPUGE = 249
360
+ INS_FTRAPULT = 250
361
+ INS_FTRAPULE = 251
362
+ INS_FTRAPNE = 252
363
+ INS_FTRAPT = 253
364
+ INS_FTRAPSF = 254
365
+ INS_FTRAPSEQ = 255
366
+ INS_FTRAPGT = 256
367
+ INS_FTRAPGE = 257
368
+ INS_FTRAPLT = 258
369
+ INS_FTRAPLE = 259
370
+ INS_FTRAPGL = 260
371
+ INS_FTRAPGLE = 261
372
+ INS_FTRAPNGLE = 262
373
+ INS_FTRAPNGL = 263
374
+ INS_FTRAPNLE = 264
375
+ INS_FTRAPNLT = 265
376
+ INS_FTRAPNGE = 266
377
+ INS_FTRAPNGT = 267
378
+ INS_FTRAPSNE = 268
379
+ INS_FTRAPST = 269
380
+ INS_FTST = 270
381
+ INS_FTWOTOX = 271
382
+ INS_HALT = 272
383
+ INS_ILLEGAL = 273
384
+ INS_JMP = 274
385
+ INS_JSR = 275
386
+ INS_LEA = 276
387
+ INS_LINK = 277
388
+ INS_LPSTOP = 278
389
+ INS_LSL = 279
390
+ INS_LSR = 280
391
+ INS_MOVE = 281
392
+ INS_MOVEA = 282
393
+ INS_MOVEC = 283
394
+ INS_MOVEM = 284
395
+ INS_MOVEP = 285
396
+ INS_MOVEQ = 286
397
+ INS_MOVES = 287
398
+ INS_MOVE16 = 288
399
+ INS_MULS = 289
400
+ INS_MULU = 290
401
+ INS_NBCD = 291
402
+ INS_NEG = 292
403
+ INS_NEGX = 293
404
+ INS_NOP = 294
405
+ INS_NOT = 295
406
+ INS_OR = 296
407
+ INS_ORI = 297
408
+ INS_PACK = 298
409
+ INS_PEA = 299
410
+ INS_PFLUSH = 300
411
+ INS_PFLUSHA = 301
412
+ INS_PFLUSHAN = 302
413
+ INS_PFLUSHN = 303
414
+ INS_PLOADR = 304
415
+ INS_PLOADW = 305
416
+ INS_PLPAR = 306
417
+ INS_PLPAW = 307
418
+ INS_PMOVE = 308
419
+ INS_PMOVEFD = 309
420
+ INS_PTESTR = 310
421
+ INS_PTESTW = 311
422
+ INS_PULSE = 312
423
+ INS_REMS = 313
424
+ INS_REMU = 314
425
+ INS_RESET = 315
426
+ INS_ROL = 316
427
+ INS_ROR = 317
428
+ INS_ROXL = 318
429
+ INS_ROXR = 319
430
+ INS_RTD = 320
431
+ INS_RTE = 321
432
+ INS_RTM = 322
433
+ INS_RTR = 323
434
+ INS_RTS = 324
435
+ INS_SBCD = 325
436
+ INS_ST = 326
437
+ INS_SF = 327
438
+ INS_SHI = 328
439
+ INS_SLS = 329
440
+ INS_SCC = 330
441
+ INS_SHS = 331
442
+ INS_SCS = 332
443
+ INS_SLO = 333
444
+ INS_SNE = 334
445
+ INS_SEQ = 335
446
+ INS_SVC = 336
447
+ INS_SVS = 337
448
+ INS_SPL = 338
449
+ INS_SMI = 339
450
+ INS_SGE = 340
451
+ INS_SLT = 341
452
+ INS_SGT = 342
453
+ INS_SLE = 343
454
+ INS_STOP = 344
455
+ INS_SUB = 345
456
+ INS_SUBA = 346
457
+ INS_SUBI = 347
458
+ INS_SUBQ = 348
459
+ INS_SUBX = 349
460
+ INS_SWAP = 350
461
+ INS_TAS = 351
462
+ INS_TRAP = 352
463
+ INS_TRAPV = 353
464
+ INS_TRAPT = 354
465
+ INS_TRAPF = 355
466
+ INS_TRAPHI = 356
467
+ INS_TRAPLS = 357
468
+ INS_TRAPCC = 358
469
+ INS_TRAPHS = 359
470
+ INS_TRAPCS = 360
471
+ INS_TRAPLO = 361
472
+ INS_TRAPNE = 362
473
+ INS_TRAPEQ = 363
474
+ INS_TRAPVC = 364
475
+ INS_TRAPVS = 365
476
+ INS_TRAPPL = 366
477
+ INS_TRAPMI = 367
478
+ INS_TRAPGE = 368
479
+ INS_TRAPLT = 369
480
+ INS_TRAPGT = 370
481
+ INS_TRAPLE = 371
482
+ INS_TST = 372
483
+ INS_UNLK = 373
484
+ INS_UNPK = 374
485
+ INS_ENDING = 375
486
+
487
+ GRP_INVALID = 0
488
+ GRP_JUMP = 1
489
+ GRP_RET = 3
490
+ GRP_IRET = 5
491
+ GRP_BRANCH_RELATIVE = 7
492
+ GRP_ENDING = 8
493
+
494
+ extend Register
495
+ end
496
+ end