crabstone 3.0.3 → 4.0.0

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Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +45 -42
  3. data/README.md +16 -33
  4. data/lib/crabstone.rb +5 -557
  5. data/lib/crabstone/arch.rb +37 -0
  6. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  7. data/lib/crabstone/arch/3/arm64.rb +124 -0
  8. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  9. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  10. data/lib/crabstone/arch/3/mips.rb +57 -0
  11. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  12. data/lib/crabstone/arch/3/ppc.rb +73 -0
  13. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  14. data/lib/crabstone/arch/3/sparc.rb +60 -0
  15. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  16. data/lib/crabstone/arch/3/sysz.rb +67 -0
  17. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  18. data/lib/crabstone/arch/3/x86.rb +82 -0
  19. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  20. data/lib/crabstone/arch/3/xcore.rb +59 -0
  21. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  22. data/lib/crabstone/arch/4/arm.rb +110 -0
  23. data/lib/crabstone/arch/4/arm64.rb +125 -0
  24. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  25. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  26. data/lib/crabstone/arch/4/evm.rb +20 -0
  27. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  28. data/lib/crabstone/arch/4/m680x.rb +106 -0
  29. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  30. data/lib/crabstone/arch/4/m68k.rb +129 -0
  31. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  32. data/lib/crabstone/arch/4/mips.rb +57 -0
  33. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  34. data/lib/crabstone/arch/4/ppc.rb +73 -0
  35. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  36. data/lib/crabstone/arch/4/sparc.rb +60 -0
  37. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  38. data/lib/crabstone/arch/4/sysz.rb +67 -0
  39. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  40. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  41. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  42. data/lib/crabstone/arch/4/x86.rb +91 -0
  43. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  44. data/lib/crabstone/arch/4/xcore.rb +59 -0
  45. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  46. data/lib/crabstone/arch/extension.rb +27 -0
  47. data/lib/crabstone/arch/register.rb +36 -0
  48. data/lib/crabstone/binding.rb +60 -0
  49. data/lib/crabstone/binding/3/detail.rb +36 -0
  50. data/lib/crabstone/binding/3/instruction.rb +23 -0
  51. data/lib/crabstone/binding/4/detail.rb +40 -0
  52. data/lib/crabstone/binding/4/instruction.rb +23 -0
  53. data/lib/crabstone/binding/structs.rb +32 -0
  54. data/lib/crabstone/constants.rb +110 -0
  55. data/lib/crabstone/cs_version.rb +49 -0
  56. data/lib/crabstone/disassembler.rb +153 -0
  57. data/lib/crabstone/error.rb +60 -0
  58. data/lib/crabstone/instruction.rb +183 -0
  59. data/lib/crabstone/version.rb +5 -0
  60. metadata +128 -324
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
@@ -0,0 +1,60 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'sparc_const'
9
+
10
+ module Crabstone
11
+ module Sparc
12
+ class OperandMemory < FFI::Struct
13
+ layout(
14
+ :base, :uint8,
15
+ :index, :uint8,
16
+ :disp, :int
17
+ )
18
+ end
19
+
20
+ class OperandValue < FFI::Union
21
+ layout(
22
+ :reg, :uint,
23
+ :imm, :int,
24
+ :mem, OperandMemory
25
+ )
26
+ end
27
+
28
+ class Operand < FFI::Struct
29
+ layout(
30
+ :type, :uint,
31
+ :value, OperandValue
32
+ )
33
+
34
+ include Crabstone::Extension::Operand
35
+
36
+ def reg?
37
+ self[:type] == OP_REG
38
+ end
39
+
40
+ def imm?
41
+ self[:type] == OP_IMM
42
+ end
43
+
44
+ def mem?
45
+ self[:type] == OP_MEM
46
+ end
47
+ end
48
+
49
+ class Instruction < FFI::Struct
50
+ layout(
51
+ :cc, :uint,
52
+ :hint, :uint,
53
+ :op_count, :uint8,
54
+ :operands, [Operand, 4]
55
+ )
56
+
57
+ include Crabstone::Extension::Instruction
58
+ end
59
+ end
60
+ end
@@ -1,71 +1,57 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
1
+ # frozen_string_literal: true
5
2
 
6
3
  # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:01+12:00
4
+
5
+ require 'crabstone/arch/register'
9
6
 
10
7
  module Crabstone
11
8
  module Sparc
12
-
13
- # Enums corresponding to Sparc condition codes, both icc's and fcc's.
14
-
15
9
  CC_INVALID = 0
16
-
17
- # Integer condition codes
18
- CC_ICC_A = 8+256
19
- CC_ICC_N = 0+256
20
- CC_ICC_NE = 9+256
21
- CC_ICC_E = 1+256
22
- CC_ICC_G = 10+256
23
- CC_ICC_LE = 2+256
24
- CC_ICC_GE = 11+256
25
- CC_ICC_L = 3+256
26
- CC_ICC_GU = 12+256
27
- CC_ICC_LEU = 4+256
28
- CC_ICC_CC = 13+256
29
- CC_ICC_CS = 5+256
30
- CC_ICC_POS = 14+256
31
- CC_ICC_NEG = 6+256
32
- CC_ICC_VC = 15+256
33
- CC_ICC_VS = 7+256
34
-
35
- # Floating condition codes
36
- CC_FCC_A = 8+16+256
37
- CC_FCC_N = 0+16+256
38
- CC_FCC_U = 7+16+256
39
- CC_FCC_G = 6+16+256
40
- CC_FCC_UG = 5+16+256
41
- CC_FCC_L = 4+16+256
42
- CC_FCC_UL = 3+16+256
43
- CC_FCC_LG = 2+16+256
44
- CC_FCC_NE = 1+16+256
45
- CC_FCC_E = 9+16+256
46
- CC_FCC_UE = 10+16+256
47
- CC_FCC_GE = 11+16+256
48
- CC_FCC_UGE = 12+16+256
49
- CC_FCC_LE = 13+16+256
50
- CC_FCC_ULE = 14+16+256
51
- CC_FCC_O = 15+16+256
52
-
53
- # Branch hint
54
-
10
+
11
+ CC_ICC_A = 8 + 256
12
+ CC_ICC_N = 0 + 256
13
+ CC_ICC_NE = 9 + 256
14
+ CC_ICC_E = 1 + 256
15
+ CC_ICC_G = 10 + 256
16
+ CC_ICC_LE = 2 + 256
17
+ CC_ICC_GE = 11 + 256
18
+ CC_ICC_L = 3 + 256
19
+ CC_ICC_GU = 12 + 256
20
+ CC_ICC_LEU = 4 + 256
21
+ CC_ICC_CC = 13 + 256
22
+ CC_ICC_CS = 5 + 256
23
+ CC_ICC_POS = 14 + 256
24
+ CC_ICC_NEG = 6 + 256
25
+ CC_ICC_VC = 15 + 256
26
+ CC_ICC_VS = 7 + 256
27
+
28
+ CC_FCC_A = 8 + 16 + 256
29
+ CC_FCC_N = 0 + 16 + 256
30
+ CC_FCC_U = 7 + 16 + 256
31
+ CC_FCC_G = 6 + 16 + 256
32
+ CC_FCC_UG = 5 + 16 + 256
33
+ CC_FCC_L = 4 + 16 + 256
34
+ CC_FCC_UL = 3 + 16 + 256
35
+ CC_FCC_LG = 2 + 16 + 256
36
+ CC_FCC_NE = 1 + 16 + 256
37
+ CC_FCC_E = 9 + 16 + 256
38
+ CC_FCC_UE = 10 + 16 + 256
39
+ CC_FCC_GE = 11 + 16 + 256
40
+ CC_FCC_UGE = 12 + 16 + 256
41
+ CC_FCC_LE = 13 + 16 + 256
42
+ CC_FCC_ULE = 14 + 16 + 256
43
+ CC_FCC_O = 15 + 16 + 256
44
+
55
45
  HINT_INVALID = 0
56
- HINT_A = 1<<0
57
- HINT_PT = 1<<1
58
- HINT_PN = 1<<2
59
-
60
- # Operand type for instruction's operands
61
-
46
+ HINT_A = 1 << 0
47
+ HINT_PT = 1 << 1
48
+ HINT_PN = 1 << 2
49
+
62
50
  OP_INVALID = 0
63
51
  OP_REG = 1
64
52
  OP_IMM = 2
65
53
  OP_MEM = 3
66
-
67
- # SPARC registers
68
-
54
+
69
55
  REG_INVALID = 0
70
56
  REG_F0 = 1
71
57
  REG_F1 = 2
@@ -157,9 +143,7 @@ module Crabstone
157
143
  REG_ENDING = 88
158
144
  REG_O6 = REG_SP
159
145
  REG_I6 = REG_FP
160
-
161
- # SPARC instruction
162
-
146
+
163
147
  INS_INVALID = 0
164
148
  INS_ADDCC = 1
165
149
  INS_ADDX = 2
@@ -440,15 +424,11 @@ module Crabstone
440
424
  INS_RET = 277
441
425
  INS_RETL = 278
442
426
  INS_ENDING = 279
443
-
444
- # Group of SPARC instructions
445
-
427
+
446
428
  GRP_INVALID = 0
447
-
448
- # Generic groups
429
+
449
430
  GRP_JUMP = 1
450
-
451
- # Architecture-specific groups
431
+
452
432
  GRP_HARDQUAD = 128
453
433
  GRP_V9 = 129
454
434
  GRP_VIS = 130
@@ -457,5 +437,7 @@ module Crabstone
457
437
  GRP_32BIT = 133
458
438
  GRP_64BIT = 134
459
439
  GRP_ENDING = 135
440
+
441
+ extend Register
460
442
  end
461
443
  end
@@ -0,0 +1,67 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'sysz_const'
9
+
10
+ module Crabstone
11
+ module SysZ
12
+ class OperandMemory < FFI::Struct
13
+ layout(
14
+ :base, :uint8,
15
+ :index, :uint8,
16
+ :length, :ulong,
17
+ :disp, :long
18
+ )
19
+ end
20
+
21
+ class OperandValue < FFI::Union
22
+ layout(
23
+ :reg, :uint,
24
+ :imm, :long,
25
+ :mem, OperandMemory
26
+ )
27
+ end
28
+
29
+ class Operand < FFI::Struct
30
+ layout(
31
+ :type, :uint,
32
+ :value, OperandValue
33
+ )
34
+
35
+ include Crabstone::Extension::Operand
36
+
37
+ def reg?
38
+ [
39
+ OP_REG,
40
+ OP_ACREG
41
+ ].include?(self[:type])
42
+ end
43
+
44
+ def imm?
45
+ self[:type] == OP_IMM
46
+ end
47
+
48
+ def mem?
49
+ self[:type] == OP_MEM
50
+ end
51
+
52
+ def acreg?
53
+ self[:type] == OP_ACREG
54
+ end
55
+ end
56
+
57
+ class Instruction < FFI::Struct
58
+ layout(
59
+ :cc, :uint,
60
+ :op_count, :uint8,
61
+ :operands, [Operand, 6]
62
+ )
63
+
64
+ include Crabstone::Extension::Instruction
65
+ end
66
+ end
67
+ end
@@ -1,17 +1,11 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
1
+ # frozen_string_literal: true
5
2
 
6
3
  # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:01+12:00
4
+
5
+ require 'crabstone/arch/register'
9
6
 
10
7
  module Crabstone
11
8
  module SysZ
12
-
13
- # Enums corresponding to SystemZ condition codes
14
-
15
9
  CC_INVALID = 0
16
10
  CC_O = 1
17
11
  CC_H = 2
@@ -27,17 +21,13 @@ module Crabstone
27
21
  CC_LE = 12
28
22
  CC_NH = 13
29
23
  CC_NO = 14
30
-
31
- # Operand type for instruction's operands
32
-
24
+
33
25
  OP_INVALID = 0
34
26
  OP_REG = 1
35
27
  OP_IMM = 2
36
28
  OP_MEM = 3
37
29
  OP_ACREG = 64
38
-
39
- # SystemZ registers
40
-
30
+
41
31
  REG_INVALID = 0
42
32
  REG_0 = 1
43
33
  REG_1 = 2
@@ -74,9 +64,7 @@ module Crabstone
74
64
  REG_F15 = 33
75
65
  REG_R0L = 34
76
66
  REG_ENDING = 35
77
-
78
- # SystemZ instruction
79
-
67
+
80
68
  INS_INVALID = 0
81
69
  INS_A = 1
82
70
  INS_ADB = 2
@@ -760,20 +748,18 @@ module Crabstone
760
748
  INS_XRK = 680
761
749
  INS_XY = 681
762
750
  INS_ENDING = 682
763
-
764
- # Group of SystemZ instructions
765
-
751
+
766
752
  GRP_INVALID = 0
767
-
768
- # Generic groups
753
+
769
754
  GRP_JUMP = 1
770
-
771
- # Architecture-specific groups
755
+
772
756
  GRP_DISTINCTOPS = 128
773
757
  GRP_FPEXTENSION = 129
774
758
  GRP_HIGHWORD = 130
775
759
  GRP_INTERLOCKEDACCESS1 = 131
776
760
  GRP_LOADSTOREONCOND = 132
777
761
  GRP_ENDING = 133
762
+
763
+ extend Register
778
764
  end
779
765
  end
@@ -0,0 +1,82 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'x86_const'
9
+
10
+ module Crabstone
11
+ module X86
12
+ class OperandMemory < FFI::Struct
13
+ layout(
14
+ :segment, :uint,
15
+ :base, :uint,
16
+ :index, :uint,
17
+ :scale, :int,
18
+ :disp, :long
19
+ )
20
+ end
21
+
22
+ class OperandValue < FFI::Union
23
+ layout(
24
+ :reg, :uint,
25
+ :imm, :long,
26
+ :fp, :double,
27
+ :mem, OperandMemory
28
+ )
29
+ end
30
+
31
+ class Operand < FFI::Struct
32
+ layout(
33
+ :type, :uint,
34
+ :value, OperandValue,
35
+ :size, :uint8,
36
+ :avx_bcast, :uint,
37
+ :avx_zero_opmask, :bool
38
+ )
39
+
40
+ include Crabstone::Extension::Operand
41
+
42
+ def reg?
43
+ self[:type] == OP_REG
44
+ end
45
+
46
+ def imm?
47
+ self[:type] == OP_IMM
48
+ end
49
+
50
+ def mem?
51
+ self[:type] == OP_MEM
52
+ end
53
+
54
+ def fp?
55
+ self[:type] == OP_FP
56
+ end
57
+ end
58
+
59
+ class Instruction < FFI::Struct
60
+ layout(
61
+ :prefix, [:uint8, 4],
62
+ :opcode, [:uint8, 4],
63
+ :rex, :uint8,
64
+ :addr_size, :uint8,
65
+ :modrm, :uint8,
66
+ :sib, :uint8,
67
+ :disp, :int,
68
+ :sib_index, :uint,
69
+ :sib_scale, :int8,
70
+ :sib_base, :uint,
71
+ :sse_cc, :uint,
72
+ :avx_cc, :uint,
73
+ :avx_sae, :bool,
74
+ :avx_rm, :uint,
75
+ :op_count, :uint8,
76
+ :operands, [Operand, 8]
77
+ )
78
+
79
+ include Crabstone::Extension::Instruction
80
+ end
81
+ end
82
+ end
@@ -1,17 +1,11 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
1
+ # frozen_string_literal: true
5
2
 
6
3
  # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:01+12:00
4
+
5
+ require 'crabstone/arch/register'
9
6
 
10
7
  module Crabstone
11
8
  module X86
12
-
13
- # X86 registers
14
-
15
9
  REG_INVALID = 0
16
10
  REG_AH = 1
17
11
  REG_AL = 2
@@ -247,25 +241,19 @@ module Crabstone
247
241
  REG_R14W = 232
248
242
  REG_R15W = 233
249
243
  REG_ENDING = 234
250
-
251
- # Operand type for instruction's operands
252
-
244
+
253
245
  OP_INVALID = 0
254
246
  OP_REG = 1
255
247
  OP_IMM = 2
256
248
  OP_MEM = 3
257
249
  OP_FP = 4
258
-
259
- # AVX broadcast type
260
-
250
+
261
251
  AVX_BCAST_INVALID = 0
262
252
  AVX_BCAST_2 = 1
263
253
  AVX_BCAST_4 = 2
264
254
  AVX_BCAST_8 = 3
265
255
  AVX_BCAST_16 = 4
266
-
267
- # SSE Code Condition type
268
-
256
+
269
257
  SSE_CC_INVALID = 0
270
258
  SSE_CC_EQ = 1
271
259
  SSE_CC_LT = 2
@@ -283,9 +271,7 @@ module Crabstone
283
271
  SSE_CC_GE = 14
284
272
  SSE_CC_GT = 15
285
273
  SSE_CC_TRUE = 16
286
-
287
- # AVX Code Condition type
288
-
274
+
289
275
  AVX_CC_INVALID = 0
290
276
  AVX_CC_EQ = 1
291
277
  AVX_CC_LT = 2
@@ -319,16 +305,13 @@ module Crabstone
319
305
  AVX_CC_GE_OQ = 30
320
306
  AVX_CC_GT_OQ = 31
321
307
  AVX_CC_TRUE_US = 32
322
-
323
- # AVX static rounding mode type
324
-
308
+
325
309
  AVX_RM_INVALID = 0
326
310
  AVX_RM_RN = 1
327
311
  AVX_RM_RD = 2
328
312
  AVX_RM_RU = 3
329
313
  AVX_RM_RZ = 4
330
-
331
- # Instruction prefixes - to be used in cs_x86.prefix[]
314
+
332
315
  PREFIX_LOCK = 0xf0
333
316
  PREFIX_REP = 0xf3
334
317
  PREFIX_REPNE = 0xf2
@@ -340,9 +323,7 @@ module Crabstone
340
323
  PREFIX_GS = 0x65
341
324
  PREFIX_OPSIZE = 0x66
342
325
  PREFIX_ADDRSIZE = 0x67
343
-
344
- # X86 instructions
345
-
326
+
346
327
  INS_INVALID = 0
347
328
  INS_AAA = 1
348
329
  INS_AAD = 2
@@ -1639,19 +1620,15 @@ module Crabstone
1639
1620
  INS_XSTORE = 1293
1640
1621
  INS_XTEST = 1294
1641
1622
  INS_ENDING = 1295
1642
-
1643
- # Group of X86 instructions
1644
-
1623
+
1645
1624
  GRP_INVALID = 0
1646
-
1647
- # Generic groups
1625
+
1648
1626
  GRP_JUMP = 1
1649
1627
  GRP_CALL = 2
1650
1628
  GRP_RET = 3
1651
1629
  GRP_INT = 4
1652
1630
  GRP_IRET = 5
1653
-
1654
- # Architecture-specific groups
1631
+
1655
1632
  GRP_VM = 128
1656
1633
  GRP_3DNOW = 129
1657
1634
  GRP_AES = 130
@@ -1694,5 +1671,7 @@ module Crabstone
1694
1671
  GRP_SMAP = 167
1695
1672
  GRP_NOVLX = 168
1696
1673
  GRP_ENDING = 169
1674
+
1675
+ extend Register
1697
1676
  end
1698
1677
  end