crabstone 3.0.3 → 4.0.0
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- checksums.yaml +5 -5
- data/CHANGES.md +45 -42
- data/README.md +16 -33
- data/lib/crabstone.rb +5 -557
- data/lib/crabstone/arch.rb +37 -0
- data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
- data/lib/crabstone/arch/3/arm64.rb +124 -0
- data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
- data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
- data/lib/crabstone/arch/3/mips.rb +57 -0
- data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
- data/lib/crabstone/arch/3/ppc.rb +73 -0
- data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
- data/lib/crabstone/arch/3/sparc.rb +60 -0
- data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
- data/lib/crabstone/arch/3/sysz.rb +67 -0
- data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
- data/lib/crabstone/arch/3/x86.rb +82 -0
- data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
- data/lib/crabstone/arch/3/xcore.rb +59 -0
- data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
- data/lib/crabstone/arch/4/arm.rb +110 -0
- data/lib/crabstone/arch/4/arm64.rb +125 -0
- data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
- data/lib/crabstone/arch/4/arm_const.rb +785 -0
- data/lib/crabstone/arch/4/evm.rb +20 -0
- data/lib/crabstone/arch/4/evm_const.rb +161 -0
- data/lib/crabstone/arch/4/m680x.rb +106 -0
- data/lib/crabstone/arch/4/m680x_const.rb +426 -0
- data/lib/crabstone/arch/4/m68k.rb +129 -0
- data/lib/crabstone/arch/4/m68k_const.rb +496 -0
- data/lib/crabstone/arch/4/mips.rb +57 -0
- data/lib/crabstone/arch/4/mips_const.rb +869 -0
- data/lib/crabstone/arch/4/ppc.rb +73 -0
- data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
- data/lib/crabstone/arch/4/sparc.rb +60 -0
- data/lib/crabstone/arch/4/sparc_const.rb +439 -0
- data/lib/crabstone/arch/4/sysz.rb +67 -0
- data/lib/crabstone/arch/4/sysz_const.rb +763 -0
- data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
- data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
- data/lib/crabstone/arch/4/x86.rb +91 -0
- data/lib/crabstone/arch/4/x86_const.rb +1972 -0
- data/lib/crabstone/arch/4/xcore.rb +59 -0
- data/lib/crabstone/arch/4/xcore_const.rb +171 -0
- data/lib/crabstone/arch/extension.rb +27 -0
- data/lib/crabstone/arch/register.rb +36 -0
- data/lib/crabstone/binding.rb +60 -0
- data/lib/crabstone/binding/3/detail.rb +36 -0
- data/lib/crabstone/binding/3/instruction.rb +23 -0
- data/lib/crabstone/binding/4/detail.rb +40 -0
- data/lib/crabstone/binding/4/instruction.rb +23 -0
- data/lib/crabstone/binding/structs.rb +32 -0
- data/lib/crabstone/constants.rb +110 -0
- data/lib/crabstone/cs_version.rb +49 -0
- data/lib/crabstone/disassembler.rb +153 -0
- data/lib/crabstone/error.rb +60 -0
- data/lib/crabstone/instruction.rb +183 -0
- data/lib/crabstone/version.rb +5 -0
- metadata +128 -324
- data/MANIFEST +0 -312
- data/Rakefile +0 -27
- data/bin/genconst +0 -66
- data/bin/genreg +0 -99
- data/crabstone.gemspec +0 -27
- data/examples/hello_world.rb +0 -43
- data/lib/arch/arm64.rb +0 -167
- data/lib/arch/arm64_registers.rb +0 -295
- data/lib/arch/arm_registers.rb +0 -149
- data/lib/arch/mips.rb +0 -78
- data/lib/arch/mips_registers.rb +0 -208
- data/lib/arch/ppc.rb +0 -90
- data/lib/arch/ppc_registers.rb +0 -209
- data/lib/arch/sparc.rb +0 -79
- data/lib/arch/sparc_registers.rb +0 -121
- data/lib/arch/systemz.rb +0 -79
- data/lib/arch/sysz_registers.rb +0 -66
- data/lib/arch/x86.rb +0 -107
- data/lib/arch/x86_registers.rb +0 -265
- data/lib/arch/xcore.rb +0 -78
- data/lib/arch/xcore_registers.rb +0 -57
- data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
- data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
- data/test/MC/AArch64/neon-2velem.s.cs +0 -113
- data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
- data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
- data/test/MC/AArch64/neon-across.s.cs +0 -40
- data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
- data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
- data/test/MC/AArch64/neon-crypto.s.cs +0 -15
- data/test/MC/AArch64/neon-extract.s.cs +0 -3
- data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
- data/test/MC/AArch64/neon-max-min.s.cs +0 -37
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
- data/test/MC/AArch64/neon-mov.s.cs +0 -74
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
- data/test/MC/AArch64/neon-perm.s.cs +0 -43
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
- data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
- data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
- data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
- data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
- data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
- data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
- data/test/MC/AArch64/neon-shift.s.cs +0 -22
- data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
- data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
- data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
- data/test/MC/AArch64/neon-tbl.s.cs +0 -21
- data/test/MC/AArch64/trace-regs.s.cs +0 -383
- data/test/MC/ARM/arm-aliases.s.cs +0 -7
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
- data/test/MC/ARM/arm-it-block.s.cs +0 -2
- data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
- data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
- data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
- data/test/MC/ARM/arm_instructions.s.cs +0 -25
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
- data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
- data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
- data/test/MC/ARM/crc32-thumb.s.cs +0 -7
- data/test/MC/ARM/crc32.s.cs +0 -7
- data/test/MC/ARM/dot-req.s.cs +0 -3
- data/test/MC/ARM/fp-armv8.s.cs +0 -52
- data/test/MC/ARM/idiv-thumb.s.cs +0 -3
- data/test/MC/ARM/idiv.s.cs +0 -3
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
- data/test/MC/ARM/mode-switch.s.cs +0 -7
- data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
- data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
- data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
- data/test/MC/ARM/neon-crypto.s.cs +0 -16
- data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
- data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
- data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
- data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neon-v8.s.cs +0 -38
- data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
- data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
- data/test/MC/ARM/neon-vswp.s.cs +0 -3
- data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
- data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
- data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
- data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
- data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
- data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
- data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
- data/test/MC/ARM/thumb-hints.s.cs +0 -12
- data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
- data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
- data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
- data/test/MC/ARM/thumb.s.cs +0 -19
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
- data/test/MC/ARM/thumb2-branches.s.cs +0 -85
- data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
- data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
- data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
- data/test/MC/ARM/vfp4.s.cs +0 -13
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
- data/test/MC/ARM/vpush-vpop.s.cs +0 -9
- data/test/MC/Mips/hilo-addressing.s.cs +0 -4
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
- data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
- data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
- data/test/MC/Mips/micromips-expansions.s.cs +0 -20
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
- data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
- data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
- data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
- data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
- data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
- data/test/MC/Mips/mips-expansions.s.cs +0 -20
- data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
- data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
- data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
- data/test/MC/Mips/mips-register-names.s.cs +0 -33
- data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
- data/test/MC/Mips/mips64-instructions.s.cs +0 -3
- data/test/MC/Mips/mips64-register-names.s.cs +0 -33
- data/test/MC/Mips/mips_directives.s.cs +0 -12
- data/test/MC/Mips/nabi-regs.s.cs +0 -12
- data/test/MC/Mips/set-at-directive.s.cs +0 -6
- data/test/MC/Mips/test_2r.s.cs +0 -16
- data/test/MC/Mips/test_2rf.s.cs +0 -33
- data/test/MC/Mips/test_3r.s.cs +0 -243
- data/test/MC/Mips/test_3rf.s.cs +0 -83
- data/test/MC/Mips/test_bit.s.cs +0 -49
- data/test/MC/Mips/test_cbranch.s.cs +0 -11
- data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
- data/test/MC/Mips/test_elm.s.cs +0 -16
- data/test/MC/Mips/test_elm_insert.s.cs +0 -4
- data/test/MC/Mips/test_elm_insve.s.cs +0 -5
- data/test/MC/Mips/test_i10.s.cs +0 -5
- data/test/MC/Mips/test_i5.s.cs +0 -45
- data/test/MC/Mips/test_i8.s.cs +0 -11
- data/test/MC/Mips/test_lsa.s.cs +0 -5
- data/test/MC/Mips/test_mi10.s.cs +0 -24
- data/test/MC/Mips/test_vec.s.cs +0 -8
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
- data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
- data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
- data/test/MC/README +0 -6
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
- data/test/MC/Sparc/sparc-vis.s.cs +0 -2
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
- data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
- data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
- data/test/MC/SystemZ/insn-good.s.cs +0 -2265
- data/test/MC/SystemZ/regs-good.s.cs +0 -45
- data/test/MC/X86/3DNow.s.cs +0 -29
- data/test/MC/X86/address-size.s.cs +0 -5
- data/test/MC/X86/avx512-encodings.s.cs +0 -12
- data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
- data/test/MC/X86/x86-32-avx.s.cs +0 -833
- data/test/MC/X86/x86-32-fma3.s.cs +0 -169
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
- data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
- data/test/MC/X86/x86_64-encoding.s.cs +0 -59
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
- data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
- data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
- data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
- data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
- data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
- data/test/README +0 -6
- data/test/test.rb +0 -205
- data/test/test.rb.SPEC +0 -235
- data/test/test_arm.rb +0 -202
- data/test/test_arm.rb.SPEC +0 -275
- data/test/test_arm64.rb +0 -150
- data/test/test_arm64.rb.SPEC +0 -116
- data/test/test_detail.rb +0 -228
- data/test/test_detail.rb.SPEC +0 -322
- data/test/test_exhaustive.rb +0 -80
- data/test/test_mips.rb +0 -118
- data/test/test_mips.rb.SPEC +0 -91
- data/test/test_ppc.rb +0 -137
- data/test/test_ppc.rb.SPEC +0 -84
- data/test/test_sanity.rb +0 -83
- data/test/test_skipdata.rb +0 -111
- data/test/test_skipdata.rb.SPEC +0 -58
- data/test/test_sparc.rb +0 -113
- data/test/test_sparc.rb.SPEC +0 -116
- data/test/test_sysz.rb +0 -111
- data/test/test_sysz.rb.SPEC +0 -61
- data/test/test_x86.rb +0 -189
- data/test/test_x86.rb.SPEC +0 -579
- data/test/test_xcore.rb +0 -100
- data/test/test_xcore.rb.SPEC +0 -75
@@ -0,0 +1,60 @@
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# frozen_string_literal: true
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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require 'ffi'
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require 'crabstone/arch/extension'
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require_relative 'sparc_const'
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module Crabstone
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module Sparc
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class OperandMemory < FFI::Struct
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layout(
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:base, :uint8,
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:index, :uint8,
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:disp, :int
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)
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end
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class OperandValue < FFI::Union
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layout(
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:reg, :uint,
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:imm, :int,
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:mem, OperandMemory
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)
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end
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class Operand < FFI::Struct
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layout(
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:type, :uint,
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:value, OperandValue
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)
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include Crabstone::Extension::Operand
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def reg?
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self[:type] == OP_REG
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end
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def imm?
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self[:type] == OP_IMM
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end
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def mem?
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self[:type] == OP_MEM
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end
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end
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class Instruction < FFI::Struct
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layout(
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:cc, :uint,
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:hint, :uint,
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:op_count, :uint8,
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:operands, [Operand, 4]
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)
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include Crabstone::Extension::Instruction
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end
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end
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end
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@@ -1,71 +1,57 @@
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1
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-
#
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# Original binding by Nguyen Anh Quynh and Tan Sheng Di
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3
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-
# Additional binding work by Ben Nagy
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-
# (c) 2013 COSEINC. All Rights Reserved.
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# frozen_string_literal: true
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2
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3
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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require 'crabstone/arch/register'
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module Crabstone
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module Sparc
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-
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# Enums corresponding to Sparc condition codes, both icc's and fcc's.
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-
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CC_INVALID = 0
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CC_FCC_O = 15+16+256
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-
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# Branch hint
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-
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CC_ICC_A = 8 + 256
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CC_ICC_N = 0 + 256
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CC_ICC_NE = 9 + 256
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CC_ICC_E = 1 + 256
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CC_ICC_G = 10 + 256
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CC_ICC_LE = 2 + 256
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CC_ICC_GE = 11 + 256
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CC_ICC_L = 3 + 256
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CC_ICC_GU = 12 + 256
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CC_ICC_LEU = 4 + 256
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CC_ICC_CC = 13 + 256
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CC_ICC_CS = 5 + 256
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CC_ICC_POS = 14 + 256
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CC_ICC_NEG = 6 + 256
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CC_ICC_VC = 15 + 256
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CC_ICC_VS = 7 + 256
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CC_FCC_A = 8 + 16 + 256
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CC_FCC_N = 0 + 16 + 256
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CC_FCC_U = 7 + 16 + 256
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CC_FCC_G = 6 + 16 + 256
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CC_FCC_UG = 5 + 16 + 256
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CC_FCC_L = 4 + 16 + 256
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CC_FCC_UL = 3 + 16 + 256
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CC_FCC_LG = 2 + 16 + 256
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CC_FCC_NE = 1 + 16 + 256
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CC_FCC_E = 9 + 16 + 256
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CC_FCC_UE = 10 + 16 + 256
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CC_FCC_GE = 11 + 16 + 256
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CC_FCC_UGE = 12 + 16 + 256
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CC_FCC_LE = 13 + 16 + 256
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CC_FCC_ULE = 14 + 16 + 256
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CC_FCC_O = 15 + 16 + 256
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HINT_INVALID = 0
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HINT_A = 1<<0
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-
HINT_PT = 1<<1
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HINT_PN = 1<<2
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-
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# Operand type for instruction's operands
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-
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HINT_A = 1 << 0
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HINT_PT = 1 << 1
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HINT_PN = 1 << 2
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50
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OP_INVALID = 0
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51
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OP_REG = 1
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52
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OP_IMM = 2
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53
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OP_MEM = 3
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66
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-
|
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-
# SPARC registers
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-
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+
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55
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REG_INVALID = 0
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56
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REG_F0 = 1
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57
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REG_F1 = 2
|
@@ -157,9 +143,7 @@ module Crabstone
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143
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REG_ENDING = 88
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144
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REG_O6 = REG_SP
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145
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REG_I6 = REG_FP
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160
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-
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-
# SPARC instruction
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-
|
146
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+
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163
147
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INS_INVALID = 0
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148
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INS_ADDCC = 1
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165
149
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INS_ADDX = 2
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@@ -440,15 +424,11 @@ module Crabstone
|
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424
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INS_RET = 277
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425
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INS_RETL = 278
|
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426
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INS_ENDING = 279
|
443
|
-
|
444
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-
# Group of SPARC instructions
|
445
|
-
|
427
|
+
|
446
428
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GRP_INVALID = 0
|
447
|
-
|
448
|
-
# Generic groups
|
429
|
+
|
449
430
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GRP_JUMP = 1
|
450
|
-
|
451
|
-
# Architecture-specific groups
|
431
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+
|
452
432
|
GRP_HARDQUAD = 128
|
453
433
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GRP_V9 = 129
|
454
434
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GRP_VIS = 130
|
@@ -457,5 +437,7 @@ module Crabstone
|
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457
437
|
GRP_32BIT = 133
|
458
438
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GRP_64BIT = 134
|
459
439
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GRP_ENDING = 135
|
440
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+
|
441
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extend Register
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460
442
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end
|
461
443
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end
|
@@ -0,0 +1,67 @@
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1
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# frozen_string_literal: true
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2
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+
|
3
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+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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4
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+
|
5
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+
require 'ffi'
|
6
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+
|
7
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+
require 'crabstone/arch/extension'
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8
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+
require_relative 'sysz_const'
|
9
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+
|
10
|
+
module Crabstone
|
11
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+
module SysZ
|
12
|
+
class OperandMemory < FFI::Struct
|
13
|
+
layout(
|
14
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+
:base, :uint8,
|
15
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+
:index, :uint8,
|
16
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:length, :ulong,
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17
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:disp, :long
|
18
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+
)
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19
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+
end
|
20
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+
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21
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class OperandValue < FFI::Union
|
22
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+
layout(
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23
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+
:reg, :uint,
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24
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+
:imm, :long,
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25
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:mem, OperandMemory
|
26
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+
)
|
27
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+
end
|
28
|
+
|
29
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+
class Operand < FFI::Struct
|
30
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+
layout(
|
31
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:type, :uint,
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32
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:value, OperandValue
|
33
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)
|
34
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+
|
35
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+
include Crabstone::Extension::Operand
|
36
|
+
|
37
|
+
def reg?
|
38
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+
[
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39
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OP_REG,
|
40
|
+
OP_ACREG
|
41
|
+
].include?(self[:type])
|
42
|
+
end
|
43
|
+
|
44
|
+
def imm?
|
45
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self[:type] == OP_IMM
|
46
|
+
end
|
47
|
+
|
48
|
+
def mem?
|
49
|
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self[:type] == OP_MEM
|
50
|
+
end
|
51
|
+
|
52
|
+
def acreg?
|
53
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+
self[:type] == OP_ACREG
|
54
|
+
end
|
55
|
+
end
|
56
|
+
|
57
|
+
class Instruction < FFI::Struct
|
58
|
+
layout(
|
59
|
+
:cc, :uint,
|
60
|
+
:op_count, :uint8,
|
61
|
+
:operands, [Operand, 6]
|
62
|
+
)
|
63
|
+
|
64
|
+
include Crabstone::Extension::Instruction
|
65
|
+
end
|
66
|
+
end
|
67
|
+
end
|
@@ -1,17 +1,11 @@
|
|
1
|
-
#
|
2
|
-
# Original binding by Nguyen Anh Quynh and Tan Sheng Di
|
3
|
-
# Additional binding work by Ben Nagy
|
4
|
-
# (c) 2013 COSEINC. All Rights Reserved.
|
1
|
+
# frozen_string_literal: true
|
5
2
|
|
6
3
|
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
7
|
-
|
8
|
-
|
4
|
+
|
5
|
+
require 'crabstone/arch/register'
|
9
6
|
|
10
7
|
module Crabstone
|
11
8
|
module SysZ
|
12
|
-
|
13
|
-
# Enums corresponding to SystemZ condition codes
|
14
|
-
|
15
9
|
CC_INVALID = 0
|
16
10
|
CC_O = 1
|
17
11
|
CC_H = 2
|
@@ -27,17 +21,13 @@ module Crabstone
|
|
27
21
|
CC_LE = 12
|
28
22
|
CC_NH = 13
|
29
23
|
CC_NO = 14
|
30
|
-
|
31
|
-
# Operand type for instruction's operands
|
32
|
-
|
24
|
+
|
33
25
|
OP_INVALID = 0
|
34
26
|
OP_REG = 1
|
35
27
|
OP_IMM = 2
|
36
28
|
OP_MEM = 3
|
37
29
|
OP_ACREG = 64
|
38
|
-
|
39
|
-
# SystemZ registers
|
40
|
-
|
30
|
+
|
41
31
|
REG_INVALID = 0
|
42
32
|
REG_0 = 1
|
43
33
|
REG_1 = 2
|
@@ -74,9 +64,7 @@ module Crabstone
|
|
74
64
|
REG_F15 = 33
|
75
65
|
REG_R0L = 34
|
76
66
|
REG_ENDING = 35
|
77
|
-
|
78
|
-
# SystemZ instruction
|
79
|
-
|
67
|
+
|
80
68
|
INS_INVALID = 0
|
81
69
|
INS_A = 1
|
82
70
|
INS_ADB = 2
|
@@ -760,20 +748,18 @@ module Crabstone
|
|
760
748
|
INS_XRK = 680
|
761
749
|
INS_XY = 681
|
762
750
|
INS_ENDING = 682
|
763
|
-
|
764
|
-
# Group of SystemZ instructions
|
765
|
-
|
751
|
+
|
766
752
|
GRP_INVALID = 0
|
767
|
-
|
768
|
-
# Generic groups
|
753
|
+
|
769
754
|
GRP_JUMP = 1
|
770
|
-
|
771
|
-
# Architecture-specific groups
|
755
|
+
|
772
756
|
GRP_DISTINCTOPS = 128
|
773
757
|
GRP_FPEXTENSION = 129
|
774
758
|
GRP_HIGHWORD = 130
|
775
759
|
GRP_INTERLOCKEDACCESS1 = 131
|
776
760
|
GRP_LOADSTOREONCOND = 132
|
777
761
|
GRP_ENDING = 133
|
762
|
+
|
763
|
+
extend Register
|
778
764
|
end
|
779
765
|
end
|
@@ -0,0 +1,82 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require 'crabstone/arch/extension'
|
8
|
+
require_relative 'x86_const'
|
9
|
+
|
10
|
+
module Crabstone
|
11
|
+
module X86
|
12
|
+
class OperandMemory < FFI::Struct
|
13
|
+
layout(
|
14
|
+
:segment, :uint,
|
15
|
+
:base, :uint,
|
16
|
+
:index, :uint,
|
17
|
+
:scale, :int,
|
18
|
+
:disp, :long
|
19
|
+
)
|
20
|
+
end
|
21
|
+
|
22
|
+
class OperandValue < FFI::Union
|
23
|
+
layout(
|
24
|
+
:reg, :uint,
|
25
|
+
:imm, :long,
|
26
|
+
:fp, :double,
|
27
|
+
:mem, OperandMemory
|
28
|
+
)
|
29
|
+
end
|
30
|
+
|
31
|
+
class Operand < FFI::Struct
|
32
|
+
layout(
|
33
|
+
:type, :uint,
|
34
|
+
:value, OperandValue,
|
35
|
+
:size, :uint8,
|
36
|
+
:avx_bcast, :uint,
|
37
|
+
:avx_zero_opmask, :bool
|
38
|
+
)
|
39
|
+
|
40
|
+
include Crabstone::Extension::Operand
|
41
|
+
|
42
|
+
def reg?
|
43
|
+
self[:type] == OP_REG
|
44
|
+
end
|
45
|
+
|
46
|
+
def imm?
|
47
|
+
self[:type] == OP_IMM
|
48
|
+
end
|
49
|
+
|
50
|
+
def mem?
|
51
|
+
self[:type] == OP_MEM
|
52
|
+
end
|
53
|
+
|
54
|
+
def fp?
|
55
|
+
self[:type] == OP_FP
|
56
|
+
end
|
57
|
+
end
|
58
|
+
|
59
|
+
class Instruction < FFI::Struct
|
60
|
+
layout(
|
61
|
+
:prefix, [:uint8, 4],
|
62
|
+
:opcode, [:uint8, 4],
|
63
|
+
:rex, :uint8,
|
64
|
+
:addr_size, :uint8,
|
65
|
+
:modrm, :uint8,
|
66
|
+
:sib, :uint8,
|
67
|
+
:disp, :int,
|
68
|
+
:sib_index, :uint,
|
69
|
+
:sib_scale, :int8,
|
70
|
+
:sib_base, :uint,
|
71
|
+
:sse_cc, :uint,
|
72
|
+
:avx_cc, :uint,
|
73
|
+
:avx_sae, :bool,
|
74
|
+
:avx_rm, :uint,
|
75
|
+
:op_count, :uint8,
|
76
|
+
:operands, [Operand, 8]
|
77
|
+
)
|
78
|
+
|
79
|
+
include Crabstone::Extension::Instruction
|
80
|
+
end
|
81
|
+
end
|
82
|
+
end
|
@@ -1,17 +1,11 @@
|
|
1
|
-
#
|
2
|
-
# Original binding by Nguyen Anh Quynh and Tan Sheng Di
|
3
|
-
# Additional binding work by Ben Nagy
|
4
|
-
# (c) 2013 COSEINC. All Rights Reserved.
|
1
|
+
# frozen_string_literal: true
|
5
2
|
|
6
3
|
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
7
|
-
|
8
|
-
|
4
|
+
|
5
|
+
require 'crabstone/arch/register'
|
9
6
|
|
10
7
|
module Crabstone
|
11
8
|
module X86
|
12
|
-
|
13
|
-
# X86 registers
|
14
|
-
|
15
9
|
REG_INVALID = 0
|
16
10
|
REG_AH = 1
|
17
11
|
REG_AL = 2
|
@@ -247,25 +241,19 @@ module Crabstone
|
|
247
241
|
REG_R14W = 232
|
248
242
|
REG_R15W = 233
|
249
243
|
REG_ENDING = 234
|
250
|
-
|
251
|
-
# Operand type for instruction's operands
|
252
|
-
|
244
|
+
|
253
245
|
OP_INVALID = 0
|
254
246
|
OP_REG = 1
|
255
247
|
OP_IMM = 2
|
256
248
|
OP_MEM = 3
|
257
249
|
OP_FP = 4
|
258
|
-
|
259
|
-
# AVX broadcast type
|
260
|
-
|
250
|
+
|
261
251
|
AVX_BCAST_INVALID = 0
|
262
252
|
AVX_BCAST_2 = 1
|
263
253
|
AVX_BCAST_4 = 2
|
264
254
|
AVX_BCAST_8 = 3
|
265
255
|
AVX_BCAST_16 = 4
|
266
|
-
|
267
|
-
# SSE Code Condition type
|
268
|
-
|
256
|
+
|
269
257
|
SSE_CC_INVALID = 0
|
270
258
|
SSE_CC_EQ = 1
|
271
259
|
SSE_CC_LT = 2
|
@@ -283,9 +271,7 @@ module Crabstone
|
|
283
271
|
SSE_CC_GE = 14
|
284
272
|
SSE_CC_GT = 15
|
285
273
|
SSE_CC_TRUE = 16
|
286
|
-
|
287
|
-
# AVX Code Condition type
|
288
|
-
|
274
|
+
|
289
275
|
AVX_CC_INVALID = 0
|
290
276
|
AVX_CC_EQ = 1
|
291
277
|
AVX_CC_LT = 2
|
@@ -319,16 +305,13 @@ module Crabstone
|
|
319
305
|
AVX_CC_GE_OQ = 30
|
320
306
|
AVX_CC_GT_OQ = 31
|
321
307
|
AVX_CC_TRUE_US = 32
|
322
|
-
|
323
|
-
# AVX static rounding mode type
|
324
|
-
|
308
|
+
|
325
309
|
AVX_RM_INVALID = 0
|
326
310
|
AVX_RM_RN = 1
|
327
311
|
AVX_RM_RD = 2
|
328
312
|
AVX_RM_RU = 3
|
329
313
|
AVX_RM_RZ = 4
|
330
|
-
|
331
|
-
# Instruction prefixes - to be used in cs_x86.prefix[]
|
314
|
+
|
332
315
|
PREFIX_LOCK = 0xf0
|
333
316
|
PREFIX_REP = 0xf3
|
334
317
|
PREFIX_REPNE = 0xf2
|
@@ -340,9 +323,7 @@ module Crabstone
|
|
340
323
|
PREFIX_GS = 0x65
|
341
324
|
PREFIX_OPSIZE = 0x66
|
342
325
|
PREFIX_ADDRSIZE = 0x67
|
343
|
-
|
344
|
-
# X86 instructions
|
345
|
-
|
326
|
+
|
346
327
|
INS_INVALID = 0
|
347
328
|
INS_AAA = 1
|
348
329
|
INS_AAD = 2
|
@@ -1639,19 +1620,15 @@ module Crabstone
|
|
1639
1620
|
INS_XSTORE = 1293
|
1640
1621
|
INS_XTEST = 1294
|
1641
1622
|
INS_ENDING = 1295
|
1642
|
-
|
1643
|
-
# Group of X86 instructions
|
1644
|
-
|
1623
|
+
|
1645
1624
|
GRP_INVALID = 0
|
1646
|
-
|
1647
|
-
# Generic groups
|
1625
|
+
|
1648
1626
|
GRP_JUMP = 1
|
1649
1627
|
GRP_CALL = 2
|
1650
1628
|
GRP_RET = 3
|
1651
1629
|
GRP_INT = 4
|
1652
1630
|
GRP_IRET = 5
|
1653
|
-
|
1654
|
-
# Architecture-specific groups
|
1631
|
+
|
1655
1632
|
GRP_VM = 128
|
1656
1633
|
GRP_3DNOW = 129
|
1657
1634
|
GRP_AES = 130
|
@@ -1694,5 +1671,7 @@ module Crabstone
|
|
1694
1671
|
GRP_SMAP = 167
|
1695
1672
|
GRP_NOVLX = 168
|
1696
1673
|
GRP_ENDING = 169
|
1674
|
+
|
1675
|
+
extend Register
|
1697
1676
|
end
|
1698
1677
|
end
|