crabstone 3.0.3 → 4.0.0

data/lib/{arch → crabstone/arch/3}/arm_const.rb

@@ -1,17 +1,11 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
 
 # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
-# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
-# 2015-05-02T13:24:01+12:00
+
+require 'crabstone/arch/register'
 
 module Crabstone
   module ARM
-
-    # ARM shift type
-    
     SFT_INVALID = 0
     SFT_ASR = 1
     SFT_LSL = 2
@@ -23,9 +17,7 @@ module Crabstone
     SFT_LSR_REG = 8
     SFT_ROR_REG = 9
     SFT_RRX_REG = 10
-    
-    # ARM condition code
-    
+
     CC_INVALID = 0
     CC_EQ = 1
     CC_NE = 2
@@ -42,9 +34,7 @@ module Crabstone
     CC_GT = 13
     CC_LE = 14
     CC_AL = 15
-    
-    # Special registers for MSR
-    
+
     SYSREG_INVALID = 0
     SYSREG_SPSR_C = 1
     SYSREG_SPSR_X = 2
@@ -77,10 +67,7 @@ module Crabstone
     SYSREG_BASEPRI_MAX = 276
     SYSREG_FAULTMASK = 277
     SYSREG_CONTROL = 278
-    
-    # The memory barrier constants map directly to the 4-bit encoding of
-    # the option field for Memory Barrier operations.
-    
+
     MB_INVALID = 0
     MB_RESERVED_0 = 1
     MB_OSHLD = 2
@@ -98,9 +85,7 @@ module Crabstone
     MB_LD = 14
     MB_ST = 15
     MB_SY = 16
-    
-    # Operand type for instruction's operands
-    
+
     OP_INVALID = 0
     OP_REG = 1
     OP_IMM = 2
@@ -110,27 +95,21 @@ module Crabstone
     OP_PIMM = 65
     OP_SETEND = 66
     OP_SYSREG = 67
-    
-    # Operand type for SETEND instruction
-    
+
     SETEND_INVALID = 0
     SETEND_BE = 1
     SETEND_LE = 2
-    
+
     CPSMODE_INVALID = 0
     CPSMODE_IE = 2
     CPSMODE_ID = 3
-    
-    # Operand type for SETEND instruction
-    
+
     CPSFLAG_INVALID = 0
     CPSFLAG_F = 1
     CPSFLAG_I = 2
     CPSFLAG_A = 4
     CPSFLAG_NONE = 16
-    
-    # Data type for elements of vector instructions.
-    
+
     VECTORDATA_INVALID = 0
     VECTORDATA_I8 = 1
     VECTORDATA_I16 = 2
@@ -169,9 +148,7 @@ module Crabstone
     VECTORDATA_F64U16 = 35
     VECTORDATA_F32U16 = 36
     VECTORDATA_F64U32 = 37
-    
-    # ARM registers
-    
+
     REG_INVALID = 0
     REG_APSR = 1
     REG_APSR_NZCV = 2
@@ -284,8 +261,7 @@ module Crabstone
     REG_S30 = 109
     REG_S31 = 110
     REG_ENDING = 111
-    
-    # alias registers
+
     REG_R13 = REG_SP
     REG_R14 = REG_LR
     REG_R15 = REG_PC
@@ -293,9 +269,7 @@ module Crabstone
     REG_SL = REG_R10
     REG_FP = REG_R11
     REG_IP = REG_R12
-    
-    # ARM instruction
-    
+
     INS_INVALID = 0
     INS_ADC = 1
     INS_ADD = 2
@@ -732,15 +706,11 @@ module Crabstone
     INS_VPUSH = 433
     INS_VPOP = 434
     INS_ENDING = 435
-    
-    # Group of ARM instructions
-    
+
     GRP_INVALID = 0
-    
-    # Generic groups
+
     GRP_JUMP = 1
-    
-    # Architecture-specific groups
+
     GRP_CRYPTO = 128
     GRP_DATABARRIER = 129
     GRP_DIVIDE = 130
@@ -773,5 +743,7 @@ module Crabstone
     GRP_DPVFP = 157
     GRP_V6M = 158
     GRP_ENDING = 159
+
+    extend Register
   end
 end

data/lib/crabstone/arch/3/mips.rb

@@ -0,0 +1,57 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'mips_const'
+
+module Crabstone
+  module MIPS
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint,
+        :disp, :long
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :long,
+        :mem, OperandMemory
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, OperandValue
+      )
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        self[:type] == OP_REG
+      end
+
+      def imm?
+        self[:type] == OP_IMM
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :op_count, :uint8,
+        :operands, [Operand, 8]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end

data/lib/{arch → crabstone/arch/3}/mips_const.rb

@@ -1,27 +1,18 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
 
 # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
-# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
-# 2015-05-02T13:24:01+12:00
+
+require 'crabstone/arch/register'
 
 module Crabstone
   module MIPS
-
-    # Operand type for instruction's operands
-    
     OP_INVALID = 0
     OP_REG = 1
     OP_IMM = 2
     OP_MEM = 3
-    
-    # MIPS registers
-    
+
     REG_INVALID = 0
-    
-    # General purpose registers
+
     REG_0 = 1
     REG_1 = 2
     REG_2 = 3
@@ -54,8 +45,7 @@ module Crabstone
     REG_29 = 30
     REG_30 = 31
     REG_31 = 32
-    
-    # DSP registers
+
     REG_DSPCCOND = 33
     REG_DSPCARRY = 34
     REG_DSPEFI = 35
@@ -67,14 +57,12 @@ module Crabstone
     REG_DSPOUTFLAG23 = 41
     REG_DSPPOS = 42
     REG_DSPSCOUNT = 43
-    
-    # ACC registers
+
     REG_AC0 = 44
     REG_AC1 = 45
     REG_AC2 = 46
     REG_AC3 = 47
-    
-    # COP registers
+
     REG_CC0 = 48
     REG_CC1 = 49
     REG_CC2 = 50
@@ -83,8 +71,7 @@ module Crabstone
     REG_CC5 = 53
     REG_CC6 = 54
     REG_CC7 = 55
-    
-    # FPU registers
+
     REG_F0 = 56
     REG_F1 = 57
     REG_F2 = 58
@@ -125,8 +112,7 @@ module Crabstone
     REG_FCC5 = 93
     REG_FCC6 = 94
     REG_FCC7 = 95
-    
-    # AFPR128
+
     REG_W0 = 96
     REG_W1 = 97
     REG_W2 = 98
@@ -209,9 +195,7 @@ module Crabstone
     REG_LO1 = REG_HI1
     REG_LO2 = REG_HI2
     REG_LO3 = REG_HI3
-    
-    # MIPS instruction
-    
+
     INS_INVALID = 0
     INS_ABSQ_S = 1
     INS_ADD = 2
@@ -794,24 +778,18 @@ module Crabstone
     INS_WSBH = 579
     INS_XOR = 580
     INS_XORI = 581
-    
-    # some alias instructions
+
     INS_NOP = 582
     INS_NEGU = 583
-    
-    # special instructions
+
     INS_JALR_HB = 584
     INS_JR_HB = 585
     INS_ENDING = 586
-    
-    # Group of MIPS instructions
-    
+
     GRP_INVALID = 0
-    
-    # Generic groups
+
     GRP_JUMP = 1
-    
-    # Architecture-specific groups
+
     GRP_BITCOUNT = 128
     GRP_DSP = 129
     GRP_DSPR2 = 130
@@ -846,5 +824,7 @@ module Crabstone
     GRP_GP32BIT = 159
     GRP_GP64BIT = 160
     GRP_ENDING = 161
+
+    extend Register
   end
 end

data/lib/crabstone/arch/3/ppc.rb

@@ -0,0 +1,73 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'ppc_const'
+
+module Crabstone
+  module PPC
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint,
+        :disp, :int
+      )
+    end
+
+    class OperandCrx < FFI::Struct
+      layout(
+        :scale, :uint,
+        :reg, :uint,
+        :cond, :uint
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :int,
+        :mem, OperandMemory,
+        :crx, OperandCrx
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, OperandValue
+      )
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        self[:type] == OP_REG
+      end
+
+      def imm?
+        self[:type] == OP_IMM
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+
+      def crx?
+        self[:type] == OP_CRX
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :bc, :uint,
+        :bh, :uint,
+        :update_cr0, :bool,
+        :op_count, :uint8,
+        :operands, [Operand, 8]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end

data/lib/{arch → crabstone/arch/3}/ppc_const.rb

@@ -1,45 +1,27 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
 
 # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
-# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
-# 2015-05-02T13:24:01+12:00
+
+require 'crabstone/arch/register'
 
 module Crabstone
   module PPC
-
-    # PPC branch codes for some branch instructions
-    
     BC_INVALID = 0
-    BC_LT = (0<<5)|12
-    BC_LE = (1<<5)|4
-    BC_EQ = (2<<5)|12
-    BC_GE = (0<<5)|4
-    BC_GT = (1<<5)|12
-    BC_NE = (2<<5)|4
-    BC_UN = (3<<5)|12
-    BC_NU = (3<<5)|4
-    BC_SO = (4<<5)|12
-    BC_NS = (4<<5)|4
-    
-    # PPC branch hint for some branch instructions
-    
+    BC_LT = (0 << 5) | 12
+    BC_LE = (1 << 5) | 4
+    BC_EQ = (2 << 5) | 12
+    BC_GE = (0 << 5) | 4
+    BC_GT = (1 << 5) | 12
+    BC_NE = (2 << 5) | 4
+    BC_UN = (3 << 5) | 12
+    BC_NU = (3 << 5) | 4
+    BC_SO = (4 << 5) | 12
+    BC_NS = (4 << 5) | 4
+
     BH_INVALID = 0
     BH_PLUS = 1
     BH_MINUS = 2
-    
-    # Operand type for instruction's operands
-    
-    OP_INVALID = 0
-    OP_REG = 1
-    OP_IMM = 2
-    OP_MEM = 3
-    OP_CRX = 64
-    
-    # PPC registers
-    
+
     REG_INVALID = 0
     REG_CARRY = 1
     REG_CC = 2
@@ -219,9 +201,13 @@ module Crabstone
     REG_LR8 = 176
     REG_CR1EQ = 177
     REG_ENDING = 178
-    
-    # PPC instruction
-    
+
+    OP_INVALID = 0
+    OP_REG = 1
+    OP_IMM = 2
+    OP_MEM = 3
+    OP_CRX = 64
+
     INS_INVALID = 0
     INS_ADD = 1
     INS_ADDC = 2
@@ -1157,15 +1143,11 @@ module Crabstone
     INS_BDZTLRL = 932
     INS_BDZFLRL = 933
     INS_ENDING = 934
-    
-    # Group of PPC instructions
-    
+
     GRP_INVALID = 0
-    
-    # Generic groups
+
     GRP_JUMP = 1
-    
-    # Architecture-specific groups
+
     GRP_ALTIVEC = 128
     GRP_MODE32 = 129
     GRP_MODE64 = 130
@@ -1177,5 +1159,7 @@ module Crabstone
     GRP_PPC4XX = 136
     GRP_PPC6XX = 137
     GRP_ENDING = 138
+
+    extend Register
   end
 end