crabstone 3.0.3 → 4.0.0

data/lib/crabstone/arch.rb

@@ -0,0 +1,37 @@
+# frozen_string_literal: true
+
+require 'crabstone/constants'
+require 'crabstone/cs_version'
+
+# require all files under 'crabstone/arch/<cs_major_version>'
+Dir.glob(File.join(__dir__, 'arch', Crabstone.cs_major_version.to_s, '*.rb')).each do |f|
+  require f
+end
+
+module Crabstone
+  module Arch
+    module_function
+
+    # @param [Integer] arch
+    # @return [Module]
+    # @example
+    #   Arch.module_of(Crabstone::ARCH_X86)
+    #   #=> Crabstone::X86
+    def module_of(arch)
+      case arch
+      when ARCH_ARM then ARM
+      when ARCH_ARM64 then ARM64
+      when ARCH_X86 then X86
+      when ARCH_MIPS then MIPS
+      when ARCH_PPC then PPC
+      when ARCH_SPARC then Sparc
+      when ARCH_SYSZ then SysZ
+      when ARCH_XCORE then XCore
+      when ARCH_M68K then M68K
+      when ARCH_TMS320C64X then TMS320C64X
+      when ARCH_M680X then M680X
+      when ARCH_EVM then EVM
+      end
+    end
+  end
+end

data/lib/{arch → crabstone/arch/3}/arm.rb

@@ -1,15 +1,14 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
 
 require 'ffi'
 
+require 'crabstone/arch/extension'
 require_relative 'arm_const'
 
 module Crabstone
   module ARM
-
     class OperandShift < FFI::Struct
       layout(
         :type, :uint,
@@ -17,7 +16,7 @@ module Crabstone
       )
     end
 
-    class MemoryOperand < FFI::Struct
+    class OperandMemory < FFI::Struct
       layout(
         :base, :uint,
         :index, :uint,
@@ -29,9 +28,9 @@ module Crabstone
     class OperandValue < FFI::Union
       layout(
         :reg, :uint,
-        :imm, :int32,
+        :imm, :int,
         :fp, :double,
-        :mem, MemoryOperand,
+        :mem, OperandMemory,
         :setend, :int
       )
     end
@@ -45,29 +44,29 @@ module Crabstone
         :subtracted, :bool
       )
 
-      def value
-        case self[:type]
-        when *[OP_REG, OP_SYSREG]
-          self[:value][:reg]
-        when *[OP_IMM, OP_CIMM, OP_PIMM]
-          self[:value][:imm]
-        when OP_MEM
-          self[:value][:mem]
-        when OP_FP
-          self[:value][:fp]
-        when OP_SETEND
-          self[:value][:setend]
-        else
-          nil
-        end
-      end
+      include Crabstone::Extension::Operand
 
       def reg?
-        [OP_REG, OP_SYSREG].include? self[:type]
+        [
+          OP_REG,
+          OP_SYSREG
+        ].include?(self[:type])
       end
 
       def imm?
-        [OP_IMM, OP_CIMM, OP_PIMM].include? self[:type]
+        [
+          OP_IMM,
+          OP_CIMM,
+          OP_PIMM
+        ].include?(self[:type])
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+
+      def fp?
+        self[:type] == OP_FP
       end
 
       def cimm?
@@ -78,30 +77,13 @@ module Crabstone
         self[:type] == OP_PIMM
       end
 
-      def mem?
-        self[:type] == OP_MEM
-      end
-
-      def fp?
-        self[:type] == OP_FP
+      def setend?
+        self[:type] == OP_SETEND
       end
 
       def sysreg?
         self[:type] == OP_SYSREG
       end
-
-      def valid?
-        [
-          OP_MEM,
-          OP_IMM,
-          OP_CIMM,
-          OP_PIMM,
-          OP_FP,
-          OP_REG,
-          OP_SYSREG,
-          OP_SETEND
-        ].include? self[:type]
-      end
     end
 
     class Instruction < FFI::Struct
@@ -119,10 +101,7 @@ module Crabstone
         :operands, [Operand, 36]
       )
 
-      def operands
-        self[:operands].take_while {|op| op[:type].nonzero?}
-      end
-
+      include Crabstone::Extension::Instruction
     end
   end
 end

data/lib/crabstone/arch/3/arm64.rb

@@ -0,0 +1,124 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'arm64_const'
+
+module Crabstone
+  module ARM64
+    class OperandShift < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, :uint
+      )
+    end
+
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint,
+        :index, :uint,
+        :disp, :int
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :long,
+        :fp, :double,
+        :mem, OperandMemory,
+        :pstate, :int,
+        :sys, :uint,
+        :prefetch, :int,
+        :barrier, :int
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :vector_index, :int,
+        :vas, :int,
+        :vess, :int,
+        :shift, OperandShift,
+        :ext, :uint,
+        :type, :uint,
+        :value, OperandValue
+      )
+      def shift?
+        self[:shift][:type] != SFT_INVALID
+      end
+
+      def ext?
+        self[:ext] != EXT_INVALID
+      end
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        [
+          OP_REG,
+          OP_REG_MRS,
+          OP_REG_MSR
+        ].include?(self[:type])
+      end
+
+      def imm?
+        [
+          OP_IMM,
+          OP_CIMM
+        ].include?(self[:type])
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+
+      def fp?
+        self[:type] == OP_FP
+      end
+
+      def cimm?
+        self[:type] == OP_CIMM
+      end
+
+      def reg_mrs?
+        self[:type] == OP_REG_MRS
+      end
+
+      def reg_msr?
+        self[:type] == OP_REG_MSR
+      end
+
+      def pstate?
+        self[:type] == OP_PSTATE
+      end
+
+      def sys?
+        self[:type] == OP_SYS
+      end
+
+      def prefetch?
+        self[:type] == OP_PREFETCH
+      end
+
+      def barrier?
+        self[:type] == OP_BARRIER
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :cc, :uint,
+        :update_flags, :bool,
+        :writeback, :bool,
+        :op_count, :uint8,
+        :operands, [Operand, 8]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end

data/lib/{arch → crabstone/arch/3}/arm64_const.rb

@@ -1,26 +1,18 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
 
 # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
-# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
-# 2015-05-02T13:24:01+12:00
+
+require 'crabstone/arch/register'
 
 module Crabstone
   module ARM64
-
-    # ARM64 shift type
-    
     SFT_INVALID = 0
     SFT_LSL = 1
     SFT_MSL = 2
     SFT_LSR = 3
     SFT_ASR = 4
     SFT_ROR = 5
-    
-    # ARM64 extender type
-    
+
     EXT_INVALID = 0
     EXT_UXTB = 1
     EXT_UXTH = 2
@@ -30,9 +22,7 @@ module Crabstone
     EXT_SXTH = 6
     EXT_SXTW = 7
     EXT_SXTX = 8
-    
-    # ARM64 condition code
-    
+
     CC_INVALID = 0
     CC_EQ = 1
     CC_NE = 2
@@ -50,11 +40,7 @@ module Crabstone
     CC_LE = 14
     CC_AL = 15
     CC_NV = 16
-    
-    # System registers
-    
-    # System registers for MRS
-    
+
     SYSREG_INVALID = 0
     SYSREG_MDCCSR_EL0 = 0x9808
     SYSREG_DBGDTRRX_EL0 = 0x9828
@@ -148,8 +134,7 @@ module Crabstone
     SYSREG_ICH_VTR_EL2 = 0xe659
     SYSREG_ICH_EISR_EL2 = 0xe65b
     SYSREG_ICH_ELSR_EL2 = 0xe65d
-    
-    # System registers for MSR
+
     SYSREG_DBGDTRTX_EL0 = 0x9828
     SYSREG_OSLAR_EL1 = 0x8084
     SYSREG_PMSWINC_EL0 = 0xdce4
@@ -161,16 +146,12 @@ module Crabstone
     SYSREG_ICC_SGI1R_EL1 = 0xc65d
     SYSREG_ICC_ASGI1R_EL1 = 0xc65e
     SYSREG_ICC_SGI0R_EL1 = 0xc65f
-    
-    # System PState Field (MSR instruction)
-    
+
     PSTATE_INVALID = 0
     PSTATE_SPSEL = 0x05
     PSTATE_DAIFSET = 0x1e
     PSTATE_DAIFCLR = 0x1f
-    
-    # Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn)
-    
+
     VAS_INVALID = 0
     VAS_8B = 1
     VAS_16B = 2
@@ -181,17 +162,13 @@ module Crabstone
     VAS_1D = 7
     VAS_2D = 8
     VAS_1Q = 9
-    
-    # Vector element size specifier
-    
+
     VESS_INVALID = 0
     VESS_B = 1
     VESS_H = 2
     VESS_S = 3
     VESS_D = 4
-    
-    # Memory barrier operands
-    
+
     BARRIER_INVALID = 0
     BARRIER_OSHLD = 0x1
     BARRIER_OSHST = 0x2
@@ -205,9 +182,7 @@ module Crabstone
     BARRIER_LD = 0xd
     BARRIER_ST = 0xe
     BARRIER_SY = 0xf
-    
-    # Operand type for instruction's operands
-    
+
     OP_INVALID = 0
     OP_REG = 1
     OP_IMM = 2
@@ -220,9 +195,7 @@ module Crabstone
     OP_SYS = 68
     OP_PREFETCH = 69
     OP_BARRIER = 70
-    
-    # TLBI operations
-    
+
     TLBI_INVALID = 0
     TLBI_VMALLE1IS = 1
     TLBI_VAE1IS = 2
@@ -256,8 +229,7 @@ module Crabstone
     TLBI_ALLE3 = 30
     TLBI_VAE3 = 31
     TLBI_VALE3 = 32
-    
-    # AT operations
+
     AT_S1E1R = 33
     AT_S1E1W = 34
     AT_S1E0R = 35
@@ -270,9 +242,7 @@ module Crabstone
     AT_S12E0W = 42
     AT_S1E3R = 43
     AT_S1E3W = 44
-    
-    # DC operations
-    
+
     DC_INVALID = 0
     DC_ZVA = 1
     DC_IVAC = 2
@@ -282,38 +252,32 @@ module Crabstone
     DC_CVAU = 6
     DC_CIVAC = 7
     DC_CISW = 8
-    
-    # IC operations
-    
+
     IC_INVALID = 0
     IC_IALLUIS = 1
     IC_IALLU = 2
     IC_IVAU = 3
-    
-    # Prefetch operations (PRFM)
-    
+
     PRFM_INVALID = 0
-    PRFM_PLDL1KEEP = 0x00+1
-    PRFM_PLDL1STRM = 0x01+1
-    PRFM_PLDL2KEEP = 0x02+1
-    PRFM_PLDL2STRM = 0x03+1
-    PRFM_PLDL3KEEP = 0x04+1
-    PRFM_PLDL3STRM = 0x05+1
-    PRFM_PLIL1KEEP = 0x08+1
-    PRFM_PLIL1STRM = 0x09+1
-    PRFM_PLIL2KEEP = 0x0a+1
-    PRFM_PLIL2STRM = 0x0b+1
-    PRFM_PLIL3KEEP = 0x0c+1
-    PRFM_PLIL3STRM = 0x0d+1
-    PRFM_PSTL1KEEP = 0x10+1
-    PRFM_PSTL1STRM = 0x11+1
-    PRFM_PSTL2KEEP = 0x12+1
-    PRFM_PSTL2STRM = 0x13+1
-    PRFM_PSTL3KEEP = 0x14+1
-    PRFM_PSTL3STRM = 0x15+1
-    
-    # ARM64 registers
-    
+    PRFM_PLDL1KEEP = 0x00 + 1
+    PRFM_PLDL1STRM = 0x01 + 1
+    PRFM_PLDL2KEEP = 0x02 + 1
+    PRFM_PLDL2STRM = 0x03 + 1
+    PRFM_PLDL3KEEP = 0x04 + 1
+    PRFM_PLDL3STRM = 0x05 + 1
+    PRFM_PLIL1KEEP = 0x08 + 1
+    PRFM_PLIL1STRM = 0x09 + 1
+    PRFM_PLIL2KEEP = 0x0a + 1
+    PRFM_PLIL2STRM = 0x0b + 1
+    PRFM_PLIL3KEEP = 0x0c + 1
+    PRFM_PLIL3STRM = 0x0d + 1
+    PRFM_PSTL1KEEP = 0x10 + 1
+    PRFM_PSTL1STRM = 0x11 + 1
+    PRFM_PSTL2KEEP = 0x12 + 1
+    PRFM_PSTL2STRM = 0x13 + 1
+    PRFM_PSTL3KEEP = 0x14 + 1
+    PRFM_PSTL3STRM = 0x15 + 1
+
     REG_INVALID = 0
     REG_X29 = 1
     REG_X30 = 2
@@ -575,15 +539,12 @@ module Crabstone
     REG_V30 = 258
     REG_V31 = 259
     REG_ENDING = 260
-    
-    # alias registers
-    REG_IP1 = REG_X16
-    REG_IP0 = REG_X17
+
+    REG_IP0 = REG_X16
+    REG_IP1 = REG_X17
     REG_FP = REG_X29
     REG_LR = REG_X30
-    
-    # ARM64 instruction
-    
+
     INS_INVALID = 0
     INS_ABS = 1
     INS_ADC = 2
@@ -1037,19 +998,17 @@ module Crabstone
     INS_AT = 450
     INS_TLBI = 451
     INS_ENDING = 452
-    
-    # Group of ARM64 instructions
-    
+
     GRP_INVALID = 0
-    
-    # Generic groups
+
     GRP_JUMP = 1
-    
-    # Architecture-specific groups
+
     GRP_CRYPTO = 128
     GRP_FPARMV8 = 129
     GRP_NEON = 130
     GRP_CRC = 131
     GRP_ENDING = 132
+
+    extend Register
   end
 end