crabstone 3.0.3 → 4.0.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +45 -42
  3. data/README.md +16 -33
  4. data/lib/crabstone.rb +5 -557
  5. data/lib/crabstone/arch.rb +37 -0
  6. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  7. data/lib/crabstone/arch/3/arm64.rb +124 -0
  8. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  9. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  10. data/lib/crabstone/arch/3/mips.rb +57 -0
  11. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  12. data/lib/crabstone/arch/3/ppc.rb +73 -0
  13. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  14. data/lib/crabstone/arch/3/sparc.rb +60 -0
  15. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  16. data/lib/crabstone/arch/3/sysz.rb +67 -0
  17. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  18. data/lib/crabstone/arch/3/x86.rb +82 -0
  19. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  20. data/lib/crabstone/arch/3/xcore.rb +59 -0
  21. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  22. data/lib/crabstone/arch/4/arm.rb +110 -0
  23. data/lib/crabstone/arch/4/arm64.rb +125 -0
  24. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  25. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  26. data/lib/crabstone/arch/4/evm.rb +20 -0
  27. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  28. data/lib/crabstone/arch/4/m680x.rb +106 -0
  29. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  30. data/lib/crabstone/arch/4/m68k.rb +129 -0
  31. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  32. data/lib/crabstone/arch/4/mips.rb +57 -0
  33. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  34. data/lib/crabstone/arch/4/ppc.rb +73 -0
  35. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  36. data/lib/crabstone/arch/4/sparc.rb +60 -0
  37. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  38. data/lib/crabstone/arch/4/sysz.rb +67 -0
  39. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  40. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  41. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  42. data/lib/crabstone/arch/4/x86.rb +91 -0
  43. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  44. data/lib/crabstone/arch/4/xcore.rb +59 -0
  45. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  46. data/lib/crabstone/arch/extension.rb +27 -0
  47. data/lib/crabstone/arch/register.rb +36 -0
  48. data/lib/crabstone/binding.rb +60 -0
  49. data/lib/crabstone/binding/3/detail.rb +36 -0
  50. data/lib/crabstone/binding/3/instruction.rb +23 -0
  51. data/lib/crabstone/binding/4/detail.rb +40 -0
  52. data/lib/crabstone/binding/4/instruction.rb +23 -0
  53. data/lib/crabstone/binding/structs.rb +32 -0
  54. data/lib/crabstone/constants.rb +110 -0
  55. data/lib/crabstone/cs_version.rb +49 -0
  56. data/lib/crabstone/disassembler.rb +153 -0
  57. data/lib/crabstone/error.rb +60 -0
  58. data/lib/crabstone/instruction.rb +183 -0
  59. data/lib/crabstone/version.rb +5 -0
  60. metadata +128 -324
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
@@ -0,0 +1,73 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'ppc_const'
9
+
10
+ module Crabstone
11
+ module PPC
12
+ class OperandMemory < FFI::Struct
13
+ layout(
14
+ :base, :uint,
15
+ :disp, :int
16
+ )
17
+ end
18
+
19
+ class OperandCrx < FFI::Struct
20
+ layout(
21
+ :scale, :uint,
22
+ :reg, :uint,
23
+ :cond, :uint
24
+ )
25
+ end
26
+
27
+ class OperandValue < FFI::Union
28
+ layout(
29
+ :reg, :uint,
30
+ :imm, :long,
31
+ :mem, OperandMemory,
32
+ :crx, OperandCrx
33
+ )
34
+ end
35
+
36
+ class Operand < FFI::Struct
37
+ layout(
38
+ :type, :uint,
39
+ :value, OperandValue
40
+ )
41
+
42
+ include Crabstone::Extension::Operand
43
+
44
+ def reg?
45
+ self[:type] == OP_REG
46
+ end
47
+
48
+ def imm?
49
+ self[:type] == OP_IMM
50
+ end
51
+
52
+ def mem?
53
+ self[:type] == OP_MEM
54
+ end
55
+
56
+ def crx?
57
+ self[:type] == OP_CRX
58
+ end
59
+ end
60
+
61
+ class Instruction < FFI::Struct
62
+ layout(
63
+ :bc, :uint,
64
+ :bh, :uint,
65
+ :update_cr0, :bool,
66
+ :op_count, :uint8,
67
+ :operands, [Operand, 8]
68
+ )
69
+
70
+ include Crabstone::Extension::Instruction
71
+ end
72
+ end
73
+ end
@@ -0,0 +1,1375 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'crabstone/arch/register'
6
+
7
+ module Crabstone
8
+ module PPC
9
+ BC_INVALID = 0
10
+ BC_LT = (0 << 5) | 12
11
+ BC_LE = (1 << 5) | 4
12
+ BC_EQ = (2 << 5) | 12
13
+ BC_GE = (0 << 5) | 4
14
+ BC_GT = (1 << 5) | 12
15
+ BC_NE = (2 << 5) | 4
16
+ BC_UN = (3 << 5) | 12
17
+ BC_NU = (3 << 5) | 4
18
+ BC_SO = (4 << 5) | 12
19
+ BC_NS = (4 << 5) | 4
20
+
21
+ BH_INVALID = 0
22
+ BH_PLUS = 1
23
+ BH_MINUS = 2
24
+
25
+ OP_INVALID = 0
26
+ OP_REG = 1
27
+ OP_IMM = 2
28
+ OP_MEM = 3
29
+ OP_CRX = 64
30
+
31
+ REG_INVALID = 0
32
+ REG_CARRY = 1
33
+ REG_CR0 = 2
34
+ REG_CR1 = 3
35
+ REG_CR2 = 4
36
+ REG_CR3 = 5
37
+ REG_CR4 = 6
38
+ REG_CR5 = 7
39
+ REG_CR6 = 8
40
+ REG_CR7 = 9
41
+ REG_CTR = 10
42
+ REG_F0 = 11
43
+ REG_F1 = 12
44
+ REG_F2 = 13
45
+ REG_F3 = 14
46
+ REG_F4 = 15
47
+ REG_F5 = 16
48
+ REG_F6 = 17
49
+ REG_F7 = 18
50
+ REG_F8 = 19
51
+ REG_F9 = 20
52
+ REG_F10 = 21
53
+ REG_F11 = 22
54
+ REG_F12 = 23
55
+ REG_F13 = 24
56
+ REG_F14 = 25
57
+ REG_F15 = 26
58
+ REG_F16 = 27
59
+ REG_F17 = 28
60
+ REG_F18 = 29
61
+ REG_F19 = 30
62
+ REG_F20 = 31
63
+ REG_F21 = 32
64
+ REG_F22 = 33
65
+ REG_F23 = 34
66
+ REG_F24 = 35
67
+ REG_F25 = 36
68
+ REG_F26 = 37
69
+ REG_F27 = 38
70
+ REG_F28 = 39
71
+ REG_F29 = 40
72
+ REG_F30 = 41
73
+ REG_F31 = 42
74
+ REG_LR = 43
75
+ REG_R0 = 44
76
+ REG_R1 = 45
77
+ REG_R2 = 46
78
+ REG_R3 = 47
79
+ REG_R4 = 48
80
+ REG_R5 = 49
81
+ REG_R6 = 50
82
+ REG_R7 = 51
83
+ REG_R8 = 52
84
+ REG_R9 = 53
85
+ REG_R10 = 54
86
+ REG_R11 = 55
87
+ REG_R12 = 56
88
+ REG_R13 = 57
89
+ REG_R14 = 58
90
+ REG_R15 = 59
91
+ REG_R16 = 60
92
+ REG_R17 = 61
93
+ REG_R18 = 62
94
+ REG_R19 = 63
95
+ REG_R20 = 64
96
+ REG_R21 = 65
97
+ REG_R22 = 66
98
+ REG_R23 = 67
99
+ REG_R24 = 68
100
+ REG_R25 = 69
101
+ REG_R26 = 70
102
+ REG_R27 = 71
103
+ REG_R28 = 72
104
+ REG_R29 = 73
105
+ REG_R30 = 74
106
+ REG_R31 = 75
107
+ REG_V0 = 76
108
+ REG_V1 = 77
109
+ REG_V2 = 78
110
+ REG_V3 = 79
111
+ REG_V4 = 80
112
+ REG_V5 = 81
113
+ REG_V6 = 82
114
+ REG_V7 = 83
115
+ REG_V8 = 84
116
+ REG_V9 = 85
117
+ REG_V10 = 86
118
+ REG_V11 = 87
119
+ REG_V12 = 88
120
+ REG_V13 = 89
121
+ REG_V14 = 90
122
+ REG_V15 = 91
123
+ REG_V16 = 92
124
+ REG_V17 = 93
125
+ REG_V18 = 94
126
+ REG_V19 = 95
127
+ REG_V20 = 96
128
+ REG_V21 = 97
129
+ REG_V22 = 98
130
+ REG_V23 = 99
131
+ REG_V24 = 100
132
+ REG_V25 = 101
133
+ REG_V26 = 102
134
+ REG_V27 = 103
135
+ REG_V28 = 104
136
+ REG_V29 = 105
137
+ REG_V30 = 106
138
+ REG_V31 = 107
139
+ REG_VRSAVE = 108
140
+ REG_VS0 = 109
141
+ REG_VS1 = 110
142
+ REG_VS2 = 111
143
+ REG_VS3 = 112
144
+ REG_VS4 = 113
145
+ REG_VS5 = 114
146
+ REG_VS6 = 115
147
+ REG_VS7 = 116
148
+ REG_VS8 = 117
149
+ REG_VS9 = 118
150
+ REG_VS10 = 119
151
+ REG_VS11 = 120
152
+ REG_VS12 = 121
153
+ REG_VS13 = 122
154
+ REG_VS14 = 123
155
+ REG_VS15 = 124
156
+ REG_VS16 = 125
157
+ REG_VS17 = 126
158
+ REG_VS18 = 127
159
+ REG_VS19 = 128
160
+ REG_VS20 = 129
161
+ REG_VS21 = 130
162
+ REG_VS22 = 131
163
+ REG_VS23 = 132
164
+ REG_VS24 = 133
165
+ REG_VS25 = 134
166
+ REG_VS26 = 135
167
+ REG_VS27 = 136
168
+ REG_VS28 = 137
169
+ REG_VS29 = 138
170
+ REG_VS30 = 139
171
+ REG_VS31 = 140
172
+ REG_VS32 = 141
173
+ REG_VS33 = 142
174
+ REG_VS34 = 143
175
+ REG_VS35 = 144
176
+ REG_VS36 = 145
177
+ REG_VS37 = 146
178
+ REG_VS38 = 147
179
+ REG_VS39 = 148
180
+ REG_VS40 = 149
181
+ REG_VS41 = 150
182
+ REG_VS42 = 151
183
+ REG_VS43 = 152
184
+ REG_VS44 = 153
185
+ REG_VS45 = 154
186
+ REG_VS46 = 155
187
+ REG_VS47 = 156
188
+ REG_VS48 = 157
189
+ REG_VS49 = 158
190
+ REG_VS50 = 159
191
+ REG_VS51 = 160
192
+ REG_VS52 = 161
193
+ REG_VS53 = 162
194
+ REG_VS54 = 163
195
+ REG_VS55 = 164
196
+ REG_VS56 = 165
197
+ REG_VS57 = 166
198
+ REG_VS58 = 167
199
+ REG_VS59 = 168
200
+ REG_VS60 = 169
201
+ REG_VS61 = 170
202
+ REG_VS62 = 171
203
+ REG_VS63 = 172
204
+ REG_Q0 = 173
205
+ REG_Q1 = 174
206
+ REG_Q2 = 175
207
+ REG_Q3 = 176
208
+ REG_Q4 = 177
209
+ REG_Q5 = 178
210
+ REG_Q6 = 179
211
+ REG_Q7 = 180
212
+ REG_Q8 = 181
213
+ REG_Q9 = 182
214
+ REG_Q10 = 183
215
+ REG_Q11 = 184
216
+ REG_Q12 = 185
217
+ REG_Q13 = 186
218
+ REG_Q14 = 187
219
+ REG_Q15 = 188
220
+ REG_Q16 = 189
221
+ REG_Q17 = 190
222
+ REG_Q18 = 191
223
+ REG_Q19 = 192
224
+ REG_Q20 = 193
225
+ REG_Q21 = 194
226
+ REG_Q22 = 195
227
+ REG_Q23 = 196
228
+ REG_Q24 = 197
229
+ REG_Q25 = 198
230
+ REG_Q26 = 199
231
+ REG_Q27 = 200
232
+ REG_Q28 = 201
233
+ REG_Q29 = 202
234
+ REG_Q30 = 203
235
+ REG_Q31 = 204
236
+ REG_RM = 205
237
+ REG_CTR8 = 206
238
+ REG_LR8 = 207
239
+ REG_CR1EQ = 208
240
+ REG_X2 = 209
241
+ REG_ENDING = 210
242
+
243
+ INS_INVALID = 0
244
+ INS_ADD = 1
245
+ INS_ADDC = 2
246
+ INS_ADDE = 3
247
+ INS_ADDI = 4
248
+ INS_ADDIC = 5
249
+ INS_ADDIS = 6
250
+ INS_ADDME = 7
251
+ INS_ADDZE = 8
252
+ INS_AND = 9
253
+ INS_ANDC = 10
254
+ INS_ANDIS = 11
255
+ INS_ANDI = 12
256
+ INS_ATTN = 13
257
+ INS_B = 14
258
+ INS_BA = 15
259
+ INS_BC = 16
260
+ INS_BCCTR = 17
261
+ INS_BCCTRL = 18
262
+ INS_BCL = 19
263
+ INS_BCLR = 20
264
+ INS_BCLRL = 21
265
+ INS_BCTR = 22
266
+ INS_BCTRL = 23
267
+ INS_BCT = 24
268
+ INS_BDNZ = 25
269
+ INS_BDNZA = 26
270
+ INS_BDNZL = 27
271
+ INS_BDNZLA = 28
272
+ INS_BDNZLR = 29
273
+ INS_BDNZLRL = 30
274
+ INS_BDZ = 31
275
+ INS_BDZA = 32
276
+ INS_BDZL = 33
277
+ INS_BDZLA = 34
278
+ INS_BDZLR = 35
279
+ INS_BDZLRL = 36
280
+ INS_BL = 37
281
+ INS_BLA = 38
282
+ INS_BLR = 39
283
+ INS_BLRL = 40
284
+ INS_BRINC = 41
285
+ INS_CMPB = 42
286
+ INS_CMPD = 43
287
+ INS_CMPDI = 44
288
+ INS_CMPLD = 45
289
+ INS_CMPLDI = 46
290
+ INS_CMPLW = 47
291
+ INS_CMPLWI = 48
292
+ INS_CMPW = 49
293
+ INS_CMPWI = 50
294
+ INS_CNTLZD = 51
295
+ INS_CNTLZW = 52
296
+ INS_CREQV = 53
297
+ INS_CRXOR = 54
298
+ INS_CRAND = 55
299
+ INS_CRANDC = 56
300
+ INS_CRNAND = 57
301
+ INS_CRNOR = 58
302
+ INS_CROR = 59
303
+ INS_CRORC = 60
304
+ INS_DCBA = 61
305
+ INS_DCBF = 62
306
+ INS_DCBI = 63
307
+ INS_DCBST = 64
308
+ INS_DCBT = 65
309
+ INS_DCBTST = 66
310
+ INS_DCBZ = 67
311
+ INS_DCBZL = 68
312
+ INS_DCCCI = 69
313
+ INS_DIVD = 70
314
+ INS_DIVDU = 71
315
+ INS_DIVW = 72
316
+ INS_DIVWU = 73
317
+ INS_DSS = 74
318
+ INS_DSSALL = 75
319
+ INS_DST = 76
320
+ INS_DSTST = 77
321
+ INS_DSTSTT = 78
322
+ INS_DSTT = 79
323
+ INS_EQV = 80
324
+ INS_EVABS = 81
325
+ INS_EVADDIW = 82
326
+ INS_EVADDSMIAAW = 83
327
+ INS_EVADDSSIAAW = 84
328
+ INS_EVADDUMIAAW = 85
329
+ INS_EVADDUSIAAW = 86
330
+ INS_EVADDW = 87
331
+ INS_EVAND = 88
332
+ INS_EVANDC = 89
333
+ INS_EVCMPEQ = 90
334
+ INS_EVCMPGTS = 91
335
+ INS_EVCMPGTU = 92
336
+ INS_EVCMPLTS = 93
337
+ INS_EVCMPLTU = 94
338
+ INS_EVCNTLSW = 95
339
+ INS_EVCNTLZW = 96
340
+ INS_EVDIVWS = 97
341
+ INS_EVDIVWU = 98
342
+ INS_EVEQV = 99
343
+ INS_EVEXTSB = 100
344
+ INS_EVEXTSH = 101
345
+ INS_EVLDD = 102
346
+ INS_EVLDDX = 103
347
+ INS_EVLDH = 104
348
+ INS_EVLDHX = 105
349
+ INS_EVLDW = 106
350
+ INS_EVLDWX = 107
351
+ INS_EVLHHESPLAT = 108
352
+ INS_EVLHHESPLATX = 109
353
+ INS_EVLHHOSSPLAT = 110
354
+ INS_EVLHHOSSPLATX = 111
355
+ INS_EVLHHOUSPLAT = 112
356
+ INS_EVLHHOUSPLATX = 113
357
+ INS_EVLWHE = 114
358
+ INS_EVLWHEX = 115
359
+ INS_EVLWHOS = 116
360
+ INS_EVLWHOSX = 117
361
+ INS_EVLWHOU = 118
362
+ INS_EVLWHOUX = 119
363
+ INS_EVLWHSPLAT = 120
364
+ INS_EVLWHSPLATX = 121
365
+ INS_EVLWWSPLAT = 122
366
+ INS_EVLWWSPLATX = 123
367
+ INS_EVMERGEHI = 124
368
+ INS_EVMERGEHILO = 125
369
+ INS_EVMERGELO = 126
370
+ INS_EVMERGELOHI = 127
371
+ INS_EVMHEGSMFAA = 128
372
+ INS_EVMHEGSMFAN = 129
373
+ INS_EVMHEGSMIAA = 130
374
+ INS_EVMHEGSMIAN = 131
375
+ INS_EVMHEGUMIAA = 132
376
+ INS_EVMHEGUMIAN = 133
377
+ INS_EVMHESMF = 134
378
+ INS_EVMHESMFA = 135
379
+ INS_EVMHESMFAAW = 136
380
+ INS_EVMHESMFANW = 137
381
+ INS_EVMHESMI = 138
382
+ INS_EVMHESMIA = 139
383
+ INS_EVMHESMIAAW = 140
384
+ INS_EVMHESMIANW = 141
385
+ INS_EVMHESSF = 142
386
+ INS_EVMHESSFA = 143
387
+ INS_EVMHESSFAAW = 144
388
+ INS_EVMHESSFANW = 145
389
+ INS_EVMHESSIAAW = 146
390
+ INS_EVMHESSIANW = 147
391
+ INS_EVMHEUMI = 148
392
+ INS_EVMHEUMIA = 149
393
+ INS_EVMHEUMIAAW = 150
394
+ INS_EVMHEUMIANW = 151
395
+ INS_EVMHEUSIAAW = 152
396
+ INS_EVMHEUSIANW = 153
397
+ INS_EVMHOGSMFAA = 154
398
+ INS_EVMHOGSMFAN = 155
399
+ INS_EVMHOGSMIAA = 156
400
+ INS_EVMHOGSMIAN = 157
401
+ INS_EVMHOGUMIAA = 158
402
+ INS_EVMHOGUMIAN = 159
403
+ INS_EVMHOSMF = 160
404
+ INS_EVMHOSMFA = 161
405
+ INS_EVMHOSMFAAW = 162
406
+ INS_EVMHOSMFANW = 163
407
+ INS_EVMHOSMI = 164
408
+ INS_EVMHOSMIA = 165
409
+ INS_EVMHOSMIAAW = 166
410
+ INS_EVMHOSMIANW = 167
411
+ INS_EVMHOSSF = 168
412
+ INS_EVMHOSSFA = 169
413
+ INS_EVMHOSSFAAW = 170
414
+ INS_EVMHOSSFANW = 171
415
+ INS_EVMHOSSIAAW = 172
416
+ INS_EVMHOSSIANW = 173
417
+ INS_EVMHOUMI = 174
418
+ INS_EVMHOUMIA = 175
419
+ INS_EVMHOUMIAAW = 176
420
+ INS_EVMHOUMIANW = 177
421
+ INS_EVMHOUSIAAW = 178
422
+ INS_EVMHOUSIANW = 179
423
+ INS_EVMRA = 180
424
+ INS_EVMWHSMF = 181
425
+ INS_EVMWHSMFA = 182
426
+ INS_EVMWHSMI = 183
427
+ INS_EVMWHSMIA = 184
428
+ INS_EVMWHSSF = 185
429
+ INS_EVMWHSSFA = 186
430
+ INS_EVMWHUMI = 187
431
+ INS_EVMWHUMIA = 188
432
+ INS_EVMWLSMIAAW = 189
433
+ INS_EVMWLSMIANW = 190
434
+ INS_EVMWLSSIAAW = 191
435
+ INS_EVMWLSSIANW = 192
436
+ INS_EVMWLUMI = 193
437
+ INS_EVMWLUMIA = 194
438
+ INS_EVMWLUMIAAW = 195
439
+ INS_EVMWLUMIANW = 196
440
+ INS_EVMWLUSIAAW = 197
441
+ INS_EVMWLUSIANW = 198
442
+ INS_EVMWSMF = 199
443
+ INS_EVMWSMFA = 200
444
+ INS_EVMWSMFAA = 201
445
+ INS_EVMWSMFAN = 202
446
+ INS_EVMWSMI = 203
447
+ INS_EVMWSMIA = 204
448
+ INS_EVMWSMIAA = 205
449
+ INS_EVMWSMIAN = 206
450
+ INS_EVMWSSF = 207
451
+ INS_EVMWSSFA = 208
452
+ INS_EVMWSSFAA = 209
453
+ INS_EVMWSSFAN = 210
454
+ INS_EVMWUMI = 211
455
+ INS_EVMWUMIA = 212
456
+ INS_EVMWUMIAA = 213
457
+ INS_EVMWUMIAN = 214
458
+ INS_EVNAND = 215
459
+ INS_EVNEG = 216
460
+ INS_EVNOR = 217
461
+ INS_EVOR = 218
462
+ INS_EVORC = 219
463
+ INS_EVRLW = 220
464
+ INS_EVRLWI = 221
465
+ INS_EVRNDW = 222
466
+ INS_EVSLW = 223
467
+ INS_EVSLWI = 224
468
+ INS_EVSPLATFI = 225
469
+ INS_EVSPLATI = 226
470
+ INS_EVSRWIS = 227
471
+ INS_EVSRWIU = 228
472
+ INS_EVSRWS = 229
473
+ INS_EVSRWU = 230
474
+ INS_EVSTDD = 231
475
+ INS_EVSTDDX = 232
476
+ INS_EVSTDH = 233
477
+ INS_EVSTDHX = 234
478
+ INS_EVSTDW = 235
479
+ INS_EVSTDWX = 236
480
+ INS_EVSTWHE = 237
481
+ INS_EVSTWHEX = 238
482
+ INS_EVSTWHO = 239
483
+ INS_EVSTWHOX = 240
484
+ INS_EVSTWWE = 241
485
+ INS_EVSTWWEX = 242
486
+ INS_EVSTWWO = 243
487
+ INS_EVSTWWOX = 244
488
+ INS_EVSUBFSMIAAW = 245
489
+ INS_EVSUBFSSIAAW = 246
490
+ INS_EVSUBFUMIAAW = 247
491
+ INS_EVSUBFUSIAAW = 248
492
+ INS_EVSUBFW = 249
493
+ INS_EVSUBIFW = 250
494
+ INS_EVXOR = 251
495
+ INS_EXTSB = 252
496
+ INS_EXTSH = 253
497
+ INS_EXTSW = 254
498
+ INS_EIEIO = 255
499
+ INS_FABS = 256
500
+ INS_FADD = 257
501
+ INS_FADDS = 258
502
+ INS_FCFID = 259
503
+ INS_FCFIDS = 260
504
+ INS_FCFIDU = 261
505
+ INS_FCFIDUS = 262
506
+ INS_FCMPU = 263
507
+ INS_FCPSGN = 264
508
+ INS_FCTID = 265
509
+ INS_FCTIDUZ = 266
510
+ INS_FCTIDZ = 267
511
+ INS_FCTIW = 268
512
+ INS_FCTIWUZ = 269
513
+ INS_FCTIWZ = 270
514
+ INS_FDIV = 271
515
+ INS_FDIVS = 272
516
+ INS_FMADD = 273
517
+ INS_FMADDS = 274
518
+ INS_FMR = 275
519
+ INS_FMSUB = 276
520
+ INS_FMSUBS = 277
521
+ INS_FMUL = 278
522
+ INS_FMULS = 279
523
+ INS_FNABS = 280
524
+ INS_FNEG = 281
525
+ INS_FNMADD = 282
526
+ INS_FNMADDS = 283
527
+ INS_FNMSUB = 284
528
+ INS_FNMSUBS = 285
529
+ INS_FRE = 286
530
+ INS_FRES = 287
531
+ INS_FRIM = 288
532
+ INS_FRIN = 289
533
+ INS_FRIP = 290
534
+ INS_FRIZ = 291
535
+ INS_FRSP = 292
536
+ INS_FRSQRTE = 293
537
+ INS_FRSQRTES = 294
538
+ INS_FSEL = 295
539
+ INS_FSQRT = 296
540
+ INS_FSQRTS = 297
541
+ INS_FSUB = 298
542
+ INS_FSUBS = 299
543
+ INS_ICBI = 300
544
+ INS_ICBT = 301
545
+ INS_ICCCI = 302
546
+ INS_ISEL = 303
547
+ INS_ISYNC = 304
548
+ INS_LA = 305
549
+ INS_LBZ = 306
550
+ INS_LBZCIX = 307
551
+ INS_LBZU = 308
552
+ INS_LBZUX = 309
553
+ INS_LBZX = 310
554
+ INS_LD = 311
555
+ INS_LDARX = 312
556
+ INS_LDBRX = 313
557
+ INS_LDCIX = 314
558
+ INS_LDU = 315
559
+ INS_LDUX = 316
560
+ INS_LDX = 317
561
+ INS_LFD = 318
562
+ INS_LFDU = 319
563
+ INS_LFDUX = 320
564
+ INS_LFDX = 321
565
+ INS_LFIWAX = 322
566
+ INS_LFIWZX = 323
567
+ INS_LFS = 324
568
+ INS_LFSU = 325
569
+ INS_LFSUX = 326
570
+ INS_LFSX = 327
571
+ INS_LHA = 328
572
+ INS_LHAU = 329
573
+ INS_LHAUX = 330
574
+ INS_LHAX = 331
575
+ INS_LHBRX = 332
576
+ INS_LHZ = 333
577
+ INS_LHZCIX = 334
578
+ INS_LHZU = 335
579
+ INS_LHZUX = 336
580
+ INS_LHZX = 337
581
+ INS_LI = 338
582
+ INS_LIS = 339
583
+ INS_LMW = 340
584
+ INS_LSWI = 341
585
+ INS_LVEBX = 342
586
+ INS_LVEHX = 343
587
+ INS_LVEWX = 344
588
+ INS_LVSL = 345
589
+ INS_LVSR = 346
590
+ INS_LVX = 347
591
+ INS_LVXL = 348
592
+ INS_LWA = 349
593
+ INS_LWARX = 350
594
+ INS_LWAUX = 351
595
+ INS_LWAX = 352
596
+ INS_LWBRX = 353
597
+ INS_LWZ = 354
598
+ INS_LWZCIX = 355
599
+ INS_LWZU = 356
600
+ INS_LWZUX = 357
601
+ INS_LWZX = 358
602
+ INS_LXSDX = 359
603
+ INS_LXVD2X = 360
604
+ INS_LXVDSX = 361
605
+ INS_LXVW4X = 362
606
+ INS_MBAR = 363
607
+ INS_MCRF = 364
608
+ INS_MCRFS = 365
609
+ INS_MFCR = 366
610
+ INS_MFCTR = 367
611
+ INS_MFDCR = 368
612
+ INS_MFFS = 369
613
+ INS_MFLR = 370
614
+ INS_MFMSR = 371
615
+ INS_MFOCRF = 372
616
+ INS_MFSPR = 373
617
+ INS_MFSR = 374
618
+ INS_MFSRIN = 375
619
+ INS_MFTB = 376
620
+ INS_MFVSCR = 377
621
+ INS_MSYNC = 378
622
+ INS_MTCRF = 379
623
+ INS_MTCTR = 380
624
+ INS_MTDCR = 381
625
+ INS_MTFSB0 = 382
626
+ INS_MTFSB1 = 383
627
+ INS_MTFSF = 384
628
+ INS_MTFSFI = 385
629
+ INS_MTLR = 386
630
+ INS_MTMSR = 387
631
+ INS_MTMSRD = 388
632
+ INS_MTOCRF = 389
633
+ INS_MTSPR = 390
634
+ INS_MTSR = 391
635
+ INS_MTSRIN = 392
636
+ INS_MTVSCR = 393
637
+ INS_MULHD = 394
638
+ INS_MULHDU = 395
639
+ INS_MULHW = 396
640
+ INS_MULHWU = 397
641
+ INS_MULLD = 398
642
+ INS_MULLI = 399
643
+ INS_MULLW = 400
644
+ INS_NAND = 401
645
+ INS_NEG = 402
646
+ INS_NOP = 403
647
+ INS_ORI = 404
648
+ INS_NOR = 405
649
+ INS_OR = 406
650
+ INS_ORC = 407
651
+ INS_ORIS = 408
652
+ INS_POPCNTD = 409
653
+ INS_POPCNTW = 410
654
+ INS_QVALIGNI = 411
655
+ INS_QVESPLATI = 412
656
+ INS_QVFABS = 413
657
+ INS_QVFADD = 414
658
+ INS_QVFADDS = 415
659
+ INS_QVFCFID = 416
660
+ INS_QVFCFIDS = 417
661
+ INS_QVFCFIDU = 418
662
+ INS_QVFCFIDUS = 419
663
+ INS_QVFCMPEQ = 420
664
+ INS_QVFCMPGT = 421
665
+ INS_QVFCMPLT = 422
666
+ INS_QVFCPSGN = 423
667
+ INS_QVFCTID = 424
668
+ INS_QVFCTIDU = 425
669
+ INS_QVFCTIDUZ = 426
670
+ INS_QVFCTIDZ = 427
671
+ INS_QVFCTIW = 428
672
+ INS_QVFCTIWU = 429
673
+ INS_QVFCTIWUZ = 430
674
+ INS_QVFCTIWZ = 431
675
+ INS_QVFLOGICAL = 432
676
+ INS_QVFMADD = 433
677
+ INS_QVFMADDS = 434
678
+ INS_QVFMR = 435
679
+ INS_QVFMSUB = 436
680
+ INS_QVFMSUBS = 437
681
+ INS_QVFMUL = 438
682
+ INS_QVFMULS = 439
683
+ INS_QVFNABS = 440
684
+ INS_QVFNEG = 441
685
+ INS_QVFNMADD = 442
686
+ INS_QVFNMADDS = 443
687
+ INS_QVFNMSUB = 444
688
+ INS_QVFNMSUBS = 445
689
+ INS_QVFPERM = 446
690
+ INS_QVFRE = 447
691
+ INS_QVFRES = 448
692
+ INS_QVFRIM = 449
693
+ INS_QVFRIN = 450
694
+ INS_QVFRIP = 451
695
+ INS_QVFRIZ = 452
696
+ INS_QVFRSP = 453
697
+ INS_QVFRSQRTE = 454
698
+ INS_QVFRSQRTES = 455
699
+ INS_QVFSEL = 456
700
+ INS_QVFSUB = 457
701
+ INS_QVFSUBS = 458
702
+ INS_QVFTSTNAN = 459
703
+ INS_QVFXMADD = 460
704
+ INS_QVFXMADDS = 461
705
+ INS_QVFXMUL = 462
706
+ INS_QVFXMULS = 463
707
+ INS_QVFXXCPNMADD = 464
708
+ INS_QVFXXCPNMADDS = 465
709
+ INS_QVFXXMADD = 466
710
+ INS_QVFXXMADDS = 467
711
+ INS_QVFXXNPMADD = 468
712
+ INS_QVFXXNPMADDS = 469
713
+ INS_QVGPCI = 470
714
+ INS_QVLFCDUX = 471
715
+ INS_QVLFCDUXA = 472
716
+ INS_QVLFCDX = 473
717
+ INS_QVLFCDXA = 474
718
+ INS_QVLFCSUX = 475
719
+ INS_QVLFCSUXA = 476
720
+ INS_QVLFCSX = 477
721
+ INS_QVLFCSXA = 478
722
+ INS_QVLFDUX = 479
723
+ INS_QVLFDUXA = 480
724
+ INS_QVLFDX = 481
725
+ INS_QVLFDXA = 482
726
+ INS_QVLFIWAX = 483
727
+ INS_QVLFIWAXA = 484
728
+ INS_QVLFIWZX = 485
729
+ INS_QVLFIWZXA = 486
730
+ INS_QVLFSUX = 487
731
+ INS_QVLFSUXA = 488
732
+ INS_QVLFSX = 489
733
+ INS_QVLFSXA = 490
734
+ INS_QVLPCLDX = 491
735
+ INS_QVLPCLSX = 492
736
+ INS_QVLPCRDX = 493
737
+ INS_QVLPCRSX = 494
738
+ INS_QVSTFCDUX = 495
739
+ INS_QVSTFCDUXA = 496
740
+ INS_QVSTFCDUXI = 497
741
+ INS_QVSTFCDUXIA = 498
742
+ INS_QVSTFCDX = 499
743
+ INS_QVSTFCDXA = 500
744
+ INS_QVSTFCDXI = 501
745
+ INS_QVSTFCDXIA = 502
746
+ INS_QVSTFCSUX = 503
747
+ INS_QVSTFCSUXA = 504
748
+ INS_QVSTFCSUXI = 505
749
+ INS_QVSTFCSUXIA = 506
750
+ INS_QVSTFCSX = 507
751
+ INS_QVSTFCSXA = 508
752
+ INS_QVSTFCSXI = 509
753
+ INS_QVSTFCSXIA = 510
754
+ INS_QVSTFDUX = 511
755
+ INS_QVSTFDUXA = 512
756
+ INS_QVSTFDUXI = 513
757
+ INS_QVSTFDUXIA = 514
758
+ INS_QVSTFDX = 515
759
+ INS_QVSTFDXA = 516
760
+ INS_QVSTFDXI = 517
761
+ INS_QVSTFDXIA = 518
762
+ INS_QVSTFIWX = 519
763
+ INS_QVSTFIWXA = 520
764
+ INS_QVSTFSUX = 521
765
+ INS_QVSTFSUXA = 522
766
+ INS_QVSTFSUXI = 523
767
+ INS_QVSTFSUXIA = 524
768
+ INS_QVSTFSX = 525
769
+ INS_QVSTFSXA = 526
770
+ INS_QVSTFSXI = 527
771
+ INS_QVSTFSXIA = 528
772
+ INS_RFCI = 529
773
+ INS_RFDI = 530
774
+ INS_RFI = 531
775
+ INS_RFID = 532
776
+ INS_RFMCI = 533
777
+ INS_RLDCL = 534
778
+ INS_RLDCR = 535
779
+ INS_RLDIC = 536
780
+ INS_RLDICL = 537
781
+ INS_RLDICR = 538
782
+ INS_RLDIMI = 539
783
+ INS_RLWIMI = 540
784
+ INS_RLWINM = 541
785
+ INS_RLWNM = 542
786
+ INS_SC = 543
787
+ INS_SLBIA = 544
788
+ INS_SLBIE = 545
789
+ INS_SLBMFEE = 546
790
+ INS_SLBMTE = 547
791
+ INS_SLD = 548
792
+ INS_SLW = 549
793
+ INS_SRAD = 550
794
+ INS_SRADI = 551
795
+ INS_SRAW = 552
796
+ INS_SRAWI = 553
797
+ INS_SRD = 554
798
+ INS_SRW = 555
799
+ INS_STB = 556
800
+ INS_STBCIX = 557
801
+ INS_STBU = 558
802
+ INS_STBUX = 559
803
+ INS_STBX = 560
804
+ INS_STD = 561
805
+ INS_STDBRX = 562
806
+ INS_STDCIX = 563
807
+ INS_STDCX = 564
808
+ INS_STDU = 565
809
+ INS_STDUX = 566
810
+ INS_STDX = 567
811
+ INS_STFD = 568
812
+ INS_STFDU = 569
813
+ INS_STFDUX = 570
814
+ INS_STFDX = 571
815
+ INS_STFIWX = 572
816
+ INS_STFS = 573
817
+ INS_STFSU = 574
818
+ INS_STFSUX = 575
819
+ INS_STFSX = 576
820
+ INS_STH = 577
821
+ INS_STHBRX = 578
822
+ INS_STHCIX = 579
823
+ INS_STHU = 580
824
+ INS_STHUX = 581
825
+ INS_STHX = 582
826
+ INS_STMW = 583
827
+ INS_STSWI = 584
828
+ INS_STVEBX = 585
829
+ INS_STVEHX = 586
830
+ INS_STVEWX = 587
831
+ INS_STVX = 588
832
+ INS_STVXL = 589
833
+ INS_STW = 590
834
+ INS_STWBRX = 591
835
+ INS_STWCIX = 592
836
+ INS_STWCX = 593
837
+ INS_STWU = 594
838
+ INS_STWUX = 595
839
+ INS_STWX = 596
840
+ INS_STXSDX = 597
841
+ INS_STXVD2X = 598
842
+ INS_STXVW4X = 599
843
+ INS_SUBF = 600
844
+ INS_SUBFC = 601
845
+ INS_SUBFE = 602
846
+ INS_SUBFIC = 603
847
+ INS_SUBFME = 604
848
+ INS_SUBFZE = 605
849
+ INS_SYNC = 606
850
+ INS_TD = 607
851
+ INS_TDI = 608
852
+ INS_TLBIA = 609
853
+ INS_TLBIE = 610
854
+ INS_TLBIEL = 611
855
+ INS_TLBIVAX = 612
856
+ INS_TLBLD = 613
857
+ INS_TLBLI = 614
858
+ INS_TLBRE = 615
859
+ INS_TLBSX = 616
860
+ INS_TLBSYNC = 617
861
+ INS_TLBWE = 618
862
+ INS_TRAP = 619
863
+ INS_TW = 620
864
+ INS_TWI = 621
865
+ INS_VADDCUW = 622
866
+ INS_VADDFP = 623
867
+ INS_VADDSBS = 624
868
+ INS_VADDSHS = 625
869
+ INS_VADDSWS = 626
870
+ INS_VADDUBM = 627
871
+ INS_VADDUBS = 628
872
+ INS_VADDUDM = 629
873
+ INS_VADDUHM = 630
874
+ INS_VADDUHS = 631
875
+ INS_VADDUWM = 632
876
+ INS_VADDUWS = 633
877
+ INS_VAND = 634
878
+ INS_VANDC = 635
879
+ INS_VAVGSB = 636
880
+ INS_VAVGSH = 637
881
+ INS_VAVGSW = 638
882
+ INS_VAVGUB = 639
883
+ INS_VAVGUH = 640
884
+ INS_VAVGUW = 641
885
+ INS_VCFSX = 642
886
+ INS_VCFUX = 643
887
+ INS_VCLZB = 644
888
+ INS_VCLZD = 645
889
+ INS_VCLZH = 646
890
+ INS_VCLZW = 647
891
+ INS_VCMPBFP = 648
892
+ INS_VCMPEQFP = 649
893
+ INS_VCMPEQUB = 650
894
+ INS_VCMPEQUD = 651
895
+ INS_VCMPEQUH = 652
896
+ INS_VCMPEQUW = 653
897
+ INS_VCMPGEFP = 654
898
+ INS_VCMPGTFP = 655
899
+ INS_VCMPGTSB = 656
900
+ INS_VCMPGTSD = 657
901
+ INS_VCMPGTSH = 658
902
+ INS_VCMPGTSW = 659
903
+ INS_VCMPGTUB = 660
904
+ INS_VCMPGTUD = 661
905
+ INS_VCMPGTUH = 662
906
+ INS_VCMPGTUW = 663
907
+ INS_VCTSXS = 664
908
+ INS_VCTUXS = 665
909
+ INS_VEQV = 666
910
+ INS_VEXPTEFP = 667
911
+ INS_VLOGEFP = 668
912
+ INS_VMADDFP = 669
913
+ INS_VMAXFP = 670
914
+ INS_VMAXSB = 671
915
+ INS_VMAXSD = 672
916
+ INS_VMAXSH = 673
917
+ INS_VMAXSW = 674
918
+ INS_VMAXUB = 675
919
+ INS_VMAXUD = 676
920
+ INS_VMAXUH = 677
921
+ INS_VMAXUW = 678
922
+ INS_VMHADDSHS = 679
923
+ INS_VMHRADDSHS = 680
924
+ INS_VMINUD = 681
925
+ INS_VMINFP = 682
926
+ INS_VMINSB = 683
927
+ INS_VMINSD = 684
928
+ INS_VMINSH = 685
929
+ INS_VMINSW = 686
930
+ INS_VMINUB = 687
931
+ INS_VMINUH = 688
932
+ INS_VMINUW = 689
933
+ INS_VMLADDUHM = 690
934
+ INS_VMRGHB = 691
935
+ INS_VMRGHH = 692
936
+ INS_VMRGHW = 693
937
+ INS_VMRGLB = 694
938
+ INS_VMRGLH = 695
939
+ INS_VMRGLW = 696
940
+ INS_VMSUMMBM = 697
941
+ INS_VMSUMSHM = 698
942
+ INS_VMSUMSHS = 699
943
+ INS_VMSUMUBM = 700
944
+ INS_VMSUMUHM = 701
945
+ INS_VMSUMUHS = 702
946
+ INS_VMULESB = 703
947
+ INS_VMULESH = 704
948
+ INS_VMULESW = 705
949
+ INS_VMULEUB = 706
950
+ INS_VMULEUH = 707
951
+ INS_VMULEUW = 708
952
+ INS_VMULOSB = 709
953
+ INS_VMULOSH = 710
954
+ INS_VMULOSW = 711
955
+ INS_VMULOUB = 712
956
+ INS_VMULOUH = 713
957
+ INS_VMULOUW = 714
958
+ INS_VMULUWM = 715
959
+ INS_VNAND = 716
960
+ INS_VNMSUBFP = 717
961
+ INS_VNOR = 718
962
+ INS_VOR = 719
963
+ INS_VORC = 720
964
+ INS_VPERM = 721
965
+ INS_VPKPX = 722
966
+ INS_VPKSHSS = 723
967
+ INS_VPKSHUS = 724
968
+ INS_VPKSWSS = 725
969
+ INS_VPKSWUS = 726
970
+ INS_VPKUHUM = 727
971
+ INS_VPKUHUS = 728
972
+ INS_VPKUWUM = 729
973
+ INS_VPKUWUS = 730
974
+ INS_VPOPCNTB = 731
975
+ INS_VPOPCNTD = 732
976
+ INS_VPOPCNTH = 733
977
+ INS_VPOPCNTW = 734
978
+ INS_VREFP = 735
979
+ INS_VRFIM = 736
980
+ INS_VRFIN = 737
981
+ INS_VRFIP = 738
982
+ INS_VRFIZ = 739
983
+ INS_VRLB = 740
984
+ INS_VRLD = 741
985
+ INS_VRLH = 742
986
+ INS_VRLW = 743
987
+ INS_VRSQRTEFP = 744
988
+ INS_VSEL = 745
989
+ INS_VSL = 746
990
+ INS_VSLB = 747
991
+ INS_VSLD = 748
992
+ INS_VSLDOI = 749
993
+ INS_VSLH = 750
994
+ INS_VSLO = 751
995
+ INS_VSLW = 752
996
+ INS_VSPLTB = 753
997
+ INS_VSPLTH = 754
998
+ INS_VSPLTISB = 755
999
+ INS_VSPLTISH = 756
1000
+ INS_VSPLTISW = 757
1001
+ INS_VSPLTW = 758
1002
+ INS_VSR = 759
1003
+ INS_VSRAB = 760
1004
+ INS_VSRAD = 761
1005
+ INS_VSRAH = 762
1006
+ INS_VSRAW = 763
1007
+ INS_VSRB = 764
1008
+ INS_VSRD = 765
1009
+ INS_VSRH = 766
1010
+ INS_VSRO = 767
1011
+ INS_VSRW = 768
1012
+ INS_VSUBCUW = 769
1013
+ INS_VSUBFP = 770
1014
+ INS_VSUBSBS = 771
1015
+ INS_VSUBSHS = 772
1016
+ INS_VSUBSWS = 773
1017
+ INS_VSUBUBM = 774
1018
+ INS_VSUBUBS = 775
1019
+ INS_VSUBUDM = 776
1020
+ INS_VSUBUHM = 777
1021
+ INS_VSUBUHS = 778
1022
+ INS_VSUBUWM = 779
1023
+ INS_VSUBUWS = 780
1024
+ INS_VSUM2SWS = 781
1025
+ INS_VSUM4SBS = 782
1026
+ INS_VSUM4SHS = 783
1027
+ INS_VSUM4UBS = 784
1028
+ INS_VSUMSWS = 785
1029
+ INS_VUPKHPX = 786
1030
+ INS_VUPKHSB = 787
1031
+ INS_VUPKHSH = 788
1032
+ INS_VUPKLPX = 789
1033
+ INS_VUPKLSB = 790
1034
+ INS_VUPKLSH = 791
1035
+ INS_VXOR = 792
1036
+ INS_WAIT = 793
1037
+ INS_WRTEE = 794
1038
+ INS_WRTEEI = 795
1039
+ INS_XOR = 796
1040
+ INS_XORI = 797
1041
+ INS_XORIS = 798
1042
+ INS_XSABSDP = 799
1043
+ INS_XSADDDP = 800
1044
+ INS_XSCMPODP = 801
1045
+ INS_XSCMPUDP = 802
1046
+ INS_XSCPSGNDP = 803
1047
+ INS_XSCVDPSP = 804
1048
+ INS_XSCVDPSXDS = 805
1049
+ INS_XSCVDPSXWS = 806
1050
+ INS_XSCVDPUXDS = 807
1051
+ INS_XSCVDPUXWS = 808
1052
+ INS_XSCVSPDP = 809
1053
+ INS_XSCVSXDDP = 810
1054
+ INS_XSCVUXDDP = 811
1055
+ INS_XSDIVDP = 812
1056
+ INS_XSMADDADP = 813
1057
+ INS_XSMADDMDP = 814
1058
+ INS_XSMAXDP = 815
1059
+ INS_XSMINDP = 816
1060
+ INS_XSMSUBADP = 817
1061
+ INS_XSMSUBMDP = 818
1062
+ INS_XSMULDP = 819
1063
+ INS_XSNABSDP = 820
1064
+ INS_XSNEGDP = 821
1065
+ INS_XSNMADDADP = 822
1066
+ INS_XSNMADDMDP = 823
1067
+ INS_XSNMSUBADP = 824
1068
+ INS_XSNMSUBMDP = 825
1069
+ INS_XSRDPI = 826
1070
+ INS_XSRDPIC = 827
1071
+ INS_XSRDPIM = 828
1072
+ INS_XSRDPIP = 829
1073
+ INS_XSRDPIZ = 830
1074
+ INS_XSREDP = 831
1075
+ INS_XSRSQRTEDP = 832
1076
+ INS_XSSQRTDP = 833
1077
+ INS_XSSUBDP = 834
1078
+ INS_XSTDIVDP = 835
1079
+ INS_XSTSQRTDP = 836
1080
+ INS_XVABSDP = 837
1081
+ INS_XVABSSP = 838
1082
+ INS_XVADDDP = 839
1083
+ INS_XVADDSP = 840
1084
+ INS_XVCMPEQDP = 841
1085
+ INS_XVCMPEQSP = 842
1086
+ INS_XVCMPGEDP = 843
1087
+ INS_XVCMPGESP = 844
1088
+ INS_XVCMPGTDP = 845
1089
+ INS_XVCMPGTSP = 846
1090
+ INS_XVCPSGNDP = 847
1091
+ INS_XVCPSGNSP = 848
1092
+ INS_XVCVDPSP = 849
1093
+ INS_XVCVDPSXDS = 850
1094
+ INS_XVCVDPSXWS = 851
1095
+ INS_XVCVDPUXDS = 852
1096
+ INS_XVCVDPUXWS = 853
1097
+ INS_XVCVSPDP = 854
1098
+ INS_XVCVSPSXDS = 855
1099
+ INS_XVCVSPSXWS = 856
1100
+ INS_XVCVSPUXDS = 857
1101
+ INS_XVCVSPUXWS = 858
1102
+ INS_XVCVSXDDP = 859
1103
+ INS_XVCVSXDSP = 860
1104
+ INS_XVCVSXWDP = 861
1105
+ INS_XVCVSXWSP = 862
1106
+ INS_XVCVUXDDP = 863
1107
+ INS_XVCVUXDSP = 864
1108
+ INS_XVCVUXWDP = 865
1109
+ INS_XVCVUXWSP = 866
1110
+ INS_XVDIVDP = 867
1111
+ INS_XVDIVSP = 868
1112
+ INS_XVMADDADP = 869
1113
+ INS_XVMADDASP = 870
1114
+ INS_XVMADDMDP = 871
1115
+ INS_XVMADDMSP = 872
1116
+ INS_XVMAXDP = 873
1117
+ INS_XVMAXSP = 874
1118
+ INS_XVMINDP = 875
1119
+ INS_XVMINSP = 876
1120
+ INS_XVMSUBADP = 877
1121
+ INS_XVMSUBASP = 878
1122
+ INS_XVMSUBMDP = 879
1123
+ INS_XVMSUBMSP = 880
1124
+ INS_XVMULDP = 881
1125
+ INS_XVMULSP = 882
1126
+ INS_XVNABSDP = 883
1127
+ INS_XVNABSSP = 884
1128
+ INS_XVNEGDP = 885
1129
+ INS_XVNEGSP = 886
1130
+ INS_XVNMADDADP = 887
1131
+ INS_XVNMADDASP = 888
1132
+ INS_XVNMADDMDP = 889
1133
+ INS_XVNMADDMSP = 890
1134
+ INS_XVNMSUBADP = 891
1135
+ INS_XVNMSUBASP = 892
1136
+ INS_XVNMSUBMDP = 893
1137
+ INS_XVNMSUBMSP = 894
1138
+ INS_XVRDPI = 895
1139
+ INS_XVRDPIC = 896
1140
+ INS_XVRDPIM = 897
1141
+ INS_XVRDPIP = 898
1142
+ INS_XVRDPIZ = 899
1143
+ INS_XVREDP = 900
1144
+ INS_XVRESP = 901
1145
+ INS_XVRSPI = 902
1146
+ INS_XVRSPIC = 903
1147
+ INS_XVRSPIM = 904
1148
+ INS_XVRSPIP = 905
1149
+ INS_XVRSPIZ = 906
1150
+ INS_XVRSQRTEDP = 907
1151
+ INS_XVRSQRTESP = 908
1152
+ INS_XVSQRTDP = 909
1153
+ INS_XVSQRTSP = 910
1154
+ INS_XVSUBDP = 911
1155
+ INS_XVSUBSP = 912
1156
+ INS_XVTDIVDP = 913
1157
+ INS_XVTDIVSP = 914
1158
+ INS_XVTSQRTDP = 915
1159
+ INS_XVTSQRTSP = 916
1160
+ INS_XXLAND = 917
1161
+ INS_XXLANDC = 918
1162
+ INS_XXLEQV = 919
1163
+ INS_XXLNAND = 920
1164
+ INS_XXLNOR = 921
1165
+ INS_XXLOR = 922
1166
+ INS_XXLORC = 923
1167
+ INS_XXLXOR = 924
1168
+ INS_XXMRGHW = 925
1169
+ INS_XXMRGLW = 926
1170
+ INS_XXPERMDI = 927
1171
+ INS_XXSEL = 928
1172
+ INS_XXSLDWI = 929
1173
+ INS_XXSPLTW = 930
1174
+ INS_BCA = 931
1175
+ INS_BCLA = 932
1176
+ INS_SLWI = 933
1177
+ INS_SRWI = 934
1178
+ INS_SLDI = 935
1179
+ INS_BTA = 936
1180
+ INS_CRSET = 937
1181
+ INS_CRNOT = 938
1182
+ INS_CRMOVE = 939
1183
+ INS_CRCLR = 940
1184
+ INS_MFBR0 = 941
1185
+ INS_MFBR1 = 942
1186
+ INS_MFBR2 = 943
1187
+ INS_MFBR3 = 944
1188
+ INS_MFBR4 = 945
1189
+ INS_MFBR5 = 946
1190
+ INS_MFBR6 = 947
1191
+ INS_MFBR7 = 948
1192
+ INS_MFXER = 949
1193
+ INS_MFRTCU = 950
1194
+ INS_MFRTCL = 951
1195
+ INS_MFDSCR = 952
1196
+ INS_MFDSISR = 953
1197
+ INS_MFDAR = 954
1198
+ INS_MFSRR2 = 955
1199
+ INS_MFSRR3 = 956
1200
+ INS_MFCFAR = 957
1201
+ INS_MFAMR = 958
1202
+ INS_MFPID = 959
1203
+ INS_MFTBLO = 960
1204
+ INS_MFTBHI = 961
1205
+ INS_MFDBATU = 962
1206
+ INS_MFDBATL = 963
1207
+ INS_MFIBATU = 964
1208
+ INS_MFIBATL = 965
1209
+ INS_MFDCCR = 966
1210
+ INS_MFICCR = 967
1211
+ INS_MFDEAR = 968
1212
+ INS_MFESR = 969
1213
+ INS_MFSPEFSCR = 970
1214
+ INS_MFTCR = 971
1215
+ INS_MFASR = 972
1216
+ INS_MFPVR = 973
1217
+ INS_MFTBU = 974
1218
+ INS_MTCR = 975
1219
+ INS_MTBR0 = 976
1220
+ INS_MTBR1 = 977
1221
+ INS_MTBR2 = 978
1222
+ INS_MTBR3 = 979
1223
+ INS_MTBR4 = 980
1224
+ INS_MTBR5 = 981
1225
+ INS_MTBR6 = 982
1226
+ INS_MTBR7 = 983
1227
+ INS_MTXER = 984
1228
+ INS_MTDSCR = 985
1229
+ INS_MTDSISR = 986
1230
+ INS_MTDAR = 987
1231
+ INS_MTSRR2 = 988
1232
+ INS_MTSRR3 = 989
1233
+ INS_MTCFAR = 990
1234
+ INS_MTAMR = 991
1235
+ INS_MTPID = 992
1236
+ INS_MTTBL = 993
1237
+ INS_MTTBU = 994
1238
+ INS_MTTBLO = 995
1239
+ INS_MTTBHI = 996
1240
+ INS_MTDBATU = 997
1241
+ INS_MTDBATL = 998
1242
+ INS_MTIBATU = 999
1243
+ INS_MTIBATL = 1000
1244
+ INS_MTDCCR = 1001
1245
+ INS_MTICCR = 1002
1246
+ INS_MTDEAR = 1003
1247
+ INS_MTESR = 1004
1248
+ INS_MTSPEFSCR = 1005
1249
+ INS_MTTCR = 1006
1250
+ INS_NOT = 1007
1251
+ INS_MR = 1008
1252
+ INS_ROTLD = 1009
1253
+ INS_ROTLDI = 1010
1254
+ INS_CLRLDI = 1011
1255
+ INS_ROTLWI = 1012
1256
+ INS_CLRLWI = 1013
1257
+ INS_ROTLW = 1014
1258
+ INS_SUB = 1015
1259
+ INS_SUBC = 1016
1260
+ INS_LWSYNC = 1017
1261
+ INS_PTESYNC = 1018
1262
+ INS_TDLT = 1019
1263
+ INS_TDEQ = 1020
1264
+ INS_TDGT = 1021
1265
+ INS_TDNE = 1022
1266
+ INS_TDLLT = 1023
1267
+ INS_TDLGT = 1024
1268
+ INS_TDU = 1025
1269
+ INS_TDLTI = 1026
1270
+ INS_TDEQI = 1027
1271
+ INS_TDGTI = 1028
1272
+ INS_TDNEI = 1029
1273
+ INS_TDLLTI = 1030
1274
+ INS_TDLGTI = 1031
1275
+ INS_TDUI = 1032
1276
+ INS_TLBREHI = 1033
1277
+ INS_TLBRELO = 1034
1278
+ INS_TLBWEHI = 1035
1279
+ INS_TLBWELO = 1036
1280
+ INS_TWLT = 1037
1281
+ INS_TWEQ = 1038
1282
+ INS_TWGT = 1039
1283
+ INS_TWNE = 1040
1284
+ INS_TWLLT = 1041
1285
+ INS_TWLGT = 1042
1286
+ INS_TWU = 1043
1287
+ INS_TWLTI = 1044
1288
+ INS_TWEQI = 1045
1289
+ INS_TWGTI = 1046
1290
+ INS_TWNEI = 1047
1291
+ INS_TWLLTI = 1048
1292
+ INS_TWLGTI = 1049
1293
+ INS_TWUI = 1050
1294
+ INS_WAITRSV = 1051
1295
+ INS_WAITIMPL = 1052
1296
+ INS_XNOP = 1053
1297
+ INS_XVMOVDP = 1054
1298
+ INS_XVMOVSP = 1055
1299
+ INS_XXSPLTD = 1056
1300
+ INS_XXMRGHD = 1057
1301
+ INS_XXMRGLD = 1058
1302
+ INS_XXSWAPD = 1059
1303
+ INS_BT = 1060
1304
+ INS_BF = 1061
1305
+ INS_BDNZT = 1062
1306
+ INS_BDNZF = 1063
1307
+ INS_BDZF = 1064
1308
+ INS_BDZT = 1065
1309
+ INS_BFA = 1066
1310
+ INS_BDNZTA = 1067
1311
+ INS_BDNZFA = 1068
1312
+ INS_BDZTA = 1069
1313
+ INS_BDZFA = 1070
1314
+ INS_BTCTR = 1071
1315
+ INS_BFCTR = 1072
1316
+ INS_BTCTRL = 1073
1317
+ INS_BFCTRL = 1074
1318
+ INS_BTL = 1075
1319
+ INS_BFL = 1076
1320
+ INS_BDNZTL = 1077
1321
+ INS_BDNZFL = 1078
1322
+ INS_BDZTL = 1079
1323
+ INS_BDZFL = 1080
1324
+ INS_BTLA = 1081
1325
+ INS_BFLA = 1082
1326
+ INS_BDNZTLA = 1083
1327
+ INS_BDNZFLA = 1084
1328
+ INS_BDZTLA = 1085
1329
+ INS_BDZFLA = 1086
1330
+ INS_BTLR = 1087
1331
+ INS_BFLR = 1088
1332
+ INS_BDNZTLR = 1089
1333
+ INS_BDZTLR = 1090
1334
+ INS_BDZFLR = 1091
1335
+ INS_BTLRL = 1092
1336
+ INS_BFLRL = 1093
1337
+ INS_BDNZTLRL = 1094
1338
+ INS_BDNZFLRL = 1095
1339
+ INS_BDZTLRL = 1096
1340
+ INS_BDZFLRL = 1097
1341
+ INS_QVFAND = 1098
1342
+ INS_QVFCLR = 1099
1343
+ INS_QVFANDC = 1100
1344
+ INS_QVFCTFB = 1101
1345
+ INS_QVFXOR = 1102
1346
+ INS_QVFOR = 1103
1347
+ INS_QVFNOR = 1104
1348
+ INS_QVFEQU = 1105
1349
+ INS_QVFNOT = 1106
1350
+ INS_QVFORC = 1107
1351
+ INS_QVFNAND = 1108
1352
+ INS_QVFSET = 1109
1353
+ INS_ENDING = 1110
1354
+
1355
+ GRP_INVALID = 0
1356
+ GRP_JUMP = 1
1357
+ GRP_ALTIVEC = 128
1358
+ GRP_MODE32 = 129
1359
+ GRP_MODE64 = 130
1360
+ GRP_BOOKE = 131
1361
+ GRP_NOTBOOKE = 132
1362
+ GRP_SPE = 133
1363
+ GRP_VSX = 134
1364
+ GRP_E500 = 135
1365
+ GRP_PPC4XX = 136
1366
+ GRP_PPC6XX = 137
1367
+ GRP_ICBT = 138
1368
+ GRP_P8ALTIVEC = 139
1369
+ GRP_P8VECTOR = 140
1370
+ GRP_QPX = 141
1371
+ GRP_ENDING = 142
1372
+
1373
+ extend Register
1374
+ end
1375
+ end