crabstone 3.0.3 → 4.0.0

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Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +45 -42
  3. data/README.md +16 -33
  4. data/lib/crabstone.rb +5 -557
  5. data/lib/crabstone/arch.rb +37 -0
  6. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  7. data/lib/crabstone/arch/3/arm64.rb +124 -0
  8. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  9. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  10. data/lib/crabstone/arch/3/mips.rb +57 -0
  11. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  12. data/lib/crabstone/arch/3/ppc.rb +73 -0
  13. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  14. data/lib/crabstone/arch/3/sparc.rb +60 -0
  15. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  16. data/lib/crabstone/arch/3/sysz.rb +67 -0
  17. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  18. data/lib/crabstone/arch/3/x86.rb +82 -0
  19. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  20. data/lib/crabstone/arch/3/xcore.rb +59 -0
  21. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  22. data/lib/crabstone/arch/4/arm.rb +110 -0
  23. data/lib/crabstone/arch/4/arm64.rb +125 -0
  24. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  25. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  26. data/lib/crabstone/arch/4/evm.rb +20 -0
  27. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  28. data/lib/crabstone/arch/4/m680x.rb +106 -0
  29. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  30. data/lib/crabstone/arch/4/m68k.rb +129 -0
  31. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  32. data/lib/crabstone/arch/4/mips.rb +57 -0
  33. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  34. data/lib/crabstone/arch/4/ppc.rb +73 -0
  35. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  36. data/lib/crabstone/arch/4/sparc.rb +60 -0
  37. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  38. data/lib/crabstone/arch/4/sysz.rb +67 -0
  39. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  40. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  41. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  42. data/lib/crabstone/arch/4/x86.rb +91 -0
  43. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  44. data/lib/crabstone/arch/4/xcore.rb +59 -0
  45. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  46. data/lib/crabstone/arch/extension.rb +27 -0
  47. data/lib/crabstone/arch/register.rb +36 -0
  48. data/lib/crabstone/binding.rb +60 -0
  49. data/lib/crabstone/binding/3/detail.rb +36 -0
  50. data/lib/crabstone/binding/3/instruction.rb +23 -0
  51. data/lib/crabstone/binding/4/detail.rb +40 -0
  52. data/lib/crabstone/binding/4/instruction.rb +23 -0
  53. data/lib/crabstone/binding/structs.rb +32 -0
  54. data/lib/crabstone/constants.rb +110 -0
  55. data/lib/crabstone/cs_version.rb +49 -0
  56. data/lib/crabstone/disassembler.rb +153 -0
  57. data/lib/crabstone/error.rb +60 -0
  58. data/lib/crabstone/instruction.rb +183 -0
  59. data/lib/crabstone/version.rb +5 -0
  60. metadata +128 -324
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
@@ -1,149 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:07+12:00
9
-
10
- module Crabstone
11
- module ARM
12
- REG_LOOKUP = {
13
- 'INVALID' => 0,
14
- 'APSR' => 1,
15
- 'APSR_NZCV' => 2,
16
- 'CPSR' => 3,
17
- 'FPEXC' => 4,
18
- 'FPINST' => 5,
19
- 'FPSCR' => 6,
20
- 'FPSCR_NZCV' => 7,
21
- 'FPSID' => 8,
22
- 'ITSTATE' => 9,
23
- 'LR' => 10,
24
- 'PC' => 11,
25
- 'SP' => 12,
26
- 'SPSR' => 13,
27
- 'D0' => 14,
28
- 'D1' => 15,
29
- 'D2' => 16,
30
- 'D3' => 17,
31
- 'D4' => 18,
32
- 'D5' => 19,
33
- 'D6' => 20,
34
- 'D7' => 21,
35
- 'D8' => 22,
36
- 'D9' => 23,
37
- 'D10' => 24,
38
- 'D11' => 25,
39
- 'D12' => 26,
40
- 'D13' => 27,
41
- 'D14' => 28,
42
- 'D15' => 29,
43
- 'D16' => 30,
44
- 'D17' => 31,
45
- 'D18' => 32,
46
- 'D19' => 33,
47
- 'D20' => 34,
48
- 'D21' => 35,
49
- 'D22' => 36,
50
- 'D23' => 37,
51
- 'D24' => 38,
52
- 'D25' => 39,
53
- 'D26' => 40,
54
- 'D27' => 41,
55
- 'D28' => 42,
56
- 'D29' => 43,
57
- 'D30' => 44,
58
- 'D31' => 45,
59
- 'FPINST2' => 46,
60
- 'MVFR0' => 47,
61
- 'MVFR1' => 48,
62
- 'MVFR2' => 49,
63
- 'Q0' => 50,
64
- 'Q1' => 51,
65
- 'Q2' => 52,
66
- 'Q3' => 53,
67
- 'Q4' => 54,
68
- 'Q5' => 55,
69
- 'Q6' => 56,
70
- 'Q7' => 57,
71
- 'Q8' => 58,
72
- 'Q9' => 59,
73
- 'Q10' => 60,
74
- 'Q11' => 61,
75
- 'Q12' => 62,
76
- 'Q13' => 63,
77
- 'Q14' => 64,
78
- 'Q15' => 65,
79
- 'R0' => 66,
80
- 'R1' => 67,
81
- 'R2' => 68,
82
- 'R3' => 69,
83
- 'R4' => 70,
84
- 'R5' => 71,
85
- 'R6' => 72,
86
- 'R7' => 73,
87
- 'R8' => 74,
88
- 'R9' => 75,
89
- 'R10' => 76,
90
- 'R11' => 77,
91
- 'R12' => 78,
92
- 'S0' => 79,
93
- 'S1' => 80,
94
- 'S2' => 81,
95
- 'S3' => 82,
96
- 'S4' => 83,
97
- 'S5' => 84,
98
- 'S6' => 85,
99
- 'S7' => 86,
100
- 'S8' => 87,
101
- 'S9' => 88,
102
- 'S10' => 89,
103
- 'S11' => 90,
104
- 'S12' => 91,
105
- 'S13' => 92,
106
- 'S14' => 93,
107
- 'S15' => 94,
108
- 'S16' => 95,
109
- 'S17' => 96,
110
- 'S18' => 97,
111
- 'S19' => 98,
112
- 'S20' => 99,
113
- 'S21' => 100,
114
- 'S22' => 101,
115
- 'S23' => 102,
116
- 'S24' => 103,
117
- 'S25' => 104,
118
- 'S26' => 105,
119
- 'S27' => 106,
120
- 'S28' => 107,
121
- 'S29' => 108,
122
- 'S30' => 109,
123
- 'S31' => 110
124
- }
125
-
126
- ID_LOOKUP = REG_LOOKUP.invert
127
-
128
- # alias registers
129
- REG_LOOKUP['R13'] = REG_LOOKUP['SP']
130
- REG_LOOKUP['R14'] = REG_LOOKUP['LR']
131
- REG_LOOKUP['R15'] = REG_LOOKUP['PC']
132
- REG_LOOKUP['SB'] = REG_LOOKUP['R9']
133
- REG_LOOKUP['SL'] = REG_LOOKUP['R10']
134
- REG_LOOKUP['FP'] = REG_LOOKUP['R11']
135
- REG_LOOKUP['IP'] = REG_LOOKUP['R12']
136
-
137
- SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
138
-
139
- def self.register reg
140
- return reg if ID_LOOKUP[reg]
141
- return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
142
- if reg.respond_to? :upcase
143
- return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
144
- end
145
- REG_LOOKUP['INVALID']
146
- end
147
-
148
- end
149
- end
@@ -1,78 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- require 'ffi'
7
-
8
- require_relative 'mips_const'
9
-
10
- module Crabstone
11
- module MIPS
12
-
13
- class MemoryOperand < FFI::Struct
14
- layout(
15
- :base, :uint,
16
- :disp, :int64
17
- )
18
- end
19
-
20
- class OperandValue < FFI::Union
21
- layout(
22
- :reg, :uint,
23
- :imm, :long_long,
24
- :mem, MemoryOperand
25
- )
26
- end
27
-
28
- class Operand < FFI::Struct
29
- layout(
30
- :type, :uint,
31
- :value, OperandValue
32
- )
33
-
34
- def value
35
- case self[:type]
36
- when OP_REG
37
- self[:value][:reg]
38
- when OP_IMM
39
- self[:value][:imm]
40
- when OP_MEM
41
- self[:value][:mem]
42
- when OP_FP
43
- self[:value][:fp]
44
- else
45
- nil
46
- end
47
- end
48
-
49
- def reg?
50
- self[:type] == OP_REG
51
- end
52
-
53
- def imm?
54
- self[:type] == OP_IMM
55
- end
56
-
57
- def mem?
58
- self[:type] == OP_MEM
59
- end
60
-
61
- def valid?
62
- [OP_MEM, OP_IMM, OP_REG].include? self[:type]
63
- end
64
- end
65
-
66
- class Instruction < FFI::Struct
67
- layout(
68
- :op_count, :uint8,
69
- :operands, [Operand, 8]
70
- )
71
-
72
- def operands
73
- self[:operands].take_while {|op| op[:type].nonzero?}
74
- end
75
-
76
- end
77
- end
78
- end
@@ -1,208 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:07+12:00
9
-
10
- module Crabstone
11
- module MIPS
12
- REG_LOOKUP = {
13
- 'INVALID' => 0,
14
- '0' => 1,
15
- '1' => 2,
16
- '2' => 3,
17
- '3' => 4,
18
- '4' => 5,
19
- '5' => 6,
20
- '6' => 7,
21
- '7' => 8,
22
- '8' => 9,
23
- '9' => 10,
24
- '10' => 11,
25
- '11' => 12,
26
- '12' => 13,
27
- '13' => 14,
28
- '14' => 15,
29
- '15' => 16,
30
- '16' => 17,
31
- '17' => 18,
32
- '18' => 19,
33
- '19' => 20,
34
- '20' => 21,
35
- '21' => 22,
36
- '22' => 23,
37
- '23' => 24,
38
- '24' => 25,
39
- '25' => 26,
40
- '26' => 27,
41
- '27' => 28,
42
- '28' => 29,
43
- '29' => 30,
44
- '30' => 31,
45
- '31' => 32,
46
- 'DSPCCOND' => 33,
47
- 'DSPCARRY' => 34,
48
- 'DSPEFI' => 35,
49
- 'DSPOUTFLAG' => 36,
50
- 'DSPOUTFLAG16_19' => 37,
51
- 'DSPOUTFLAG20' => 38,
52
- 'DSPOUTFLAG21' => 39,
53
- 'DSPOUTFLAG22' => 40,
54
- 'DSPOUTFLAG23' => 41,
55
- 'DSPPOS' => 42,
56
- 'DSPSCOUNT' => 43,
57
- 'AC0' => 44,
58
- 'AC1' => 45,
59
- 'AC2' => 46,
60
- 'AC3' => 47,
61
- 'CC0' => 48,
62
- 'CC1' => 49,
63
- 'CC2' => 50,
64
- 'CC3' => 51,
65
- 'CC4' => 52,
66
- 'CC5' => 53,
67
- 'CC6' => 54,
68
- 'CC7' => 55,
69
- 'F0' => 56,
70
- 'F1' => 57,
71
- 'F2' => 58,
72
- 'F3' => 59,
73
- 'F4' => 60,
74
- 'F5' => 61,
75
- 'F6' => 62,
76
- 'F7' => 63,
77
- 'F8' => 64,
78
- 'F9' => 65,
79
- 'F10' => 66,
80
- 'F11' => 67,
81
- 'F12' => 68,
82
- 'F13' => 69,
83
- 'F14' => 70,
84
- 'F15' => 71,
85
- 'F16' => 72,
86
- 'F17' => 73,
87
- 'F18' => 74,
88
- 'F19' => 75,
89
- 'F20' => 76,
90
- 'F21' => 77,
91
- 'F22' => 78,
92
- 'F23' => 79,
93
- 'F24' => 80,
94
- 'F25' => 81,
95
- 'F26' => 82,
96
- 'F27' => 83,
97
- 'F28' => 84,
98
- 'F29' => 85,
99
- 'F30' => 86,
100
- 'F31' => 87,
101
- 'FCC0' => 88,
102
- 'FCC1' => 89,
103
- 'FCC2' => 90,
104
- 'FCC3' => 91,
105
- 'FCC4' => 92,
106
- 'FCC5' => 93,
107
- 'FCC6' => 94,
108
- 'FCC7' => 95,
109
- 'W0' => 96,
110
- 'W1' => 97,
111
- 'W2' => 98,
112
- 'W3' => 99,
113
- 'W4' => 100,
114
- 'W5' => 101,
115
- 'W6' => 102,
116
- 'W7' => 103,
117
- 'W8' => 104,
118
- 'W9' => 105,
119
- 'W10' => 106,
120
- 'W11' => 107,
121
- 'W12' => 108,
122
- 'W13' => 109,
123
- 'W14' => 110,
124
- 'W15' => 111,
125
- 'W16' => 112,
126
- 'W17' => 113,
127
- 'W18' => 114,
128
- 'W19' => 115,
129
- 'W20' => 116,
130
- 'W21' => 117,
131
- 'W22' => 118,
132
- 'W23' => 119,
133
- 'W24' => 120,
134
- 'W25' => 121,
135
- 'W26' => 122,
136
- 'W27' => 123,
137
- 'W28' => 124,
138
- 'W29' => 125,
139
- 'W30' => 126,
140
- 'W31' => 127,
141
- 'HI' => 128,
142
- 'LO' => 129,
143
- 'P0' => 130,
144
- 'P1' => 131,
145
- 'P2' => 132,
146
- 'MPL0' => 133,
147
- 'MPL1' => 134,
148
- 'MPL2' => 135
149
- }
150
-
151
- ID_LOOKUP = REG_LOOKUP.invert
152
-
153
- # alias registers
154
- REG_LOOKUP['ZERO'] = REG_LOOKUP['0']
155
- REG_LOOKUP['AT'] = REG_LOOKUP['1']
156
- REG_LOOKUP['V0'] = REG_LOOKUP['2']
157
- REG_LOOKUP['V1'] = REG_LOOKUP['3']
158
- REG_LOOKUP['A0'] = REG_LOOKUP['4']
159
- REG_LOOKUP['A1'] = REG_LOOKUP['5']
160
- REG_LOOKUP['A2'] = REG_LOOKUP['6']
161
- REG_LOOKUP['A3'] = REG_LOOKUP['7']
162
- REG_LOOKUP['T0'] = REG_LOOKUP['8']
163
- REG_LOOKUP['T1'] = REG_LOOKUP['9']
164
- REG_LOOKUP['T2'] = REG_LOOKUP['10']
165
- REG_LOOKUP['T3'] = REG_LOOKUP['11']
166
- REG_LOOKUP['T4'] = REG_LOOKUP['12']
167
- REG_LOOKUP['T5'] = REG_LOOKUP['13']
168
- REG_LOOKUP['T6'] = REG_LOOKUP['14']
169
- REG_LOOKUP['T7'] = REG_LOOKUP['15']
170
- REG_LOOKUP['S0'] = REG_LOOKUP['16']
171
- REG_LOOKUP['S1'] = REG_LOOKUP['17']
172
- REG_LOOKUP['S2'] = REG_LOOKUP['18']
173
- REG_LOOKUP['S3'] = REG_LOOKUP['19']
174
- REG_LOOKUP['S4'] = REG_LOOKUP['20']
175
- REG_LOOKUP['S5'] = REG_LOOKUP['21']
176
- REG_LOOKUP['S6'] = REG_LOOKUP['22']
177
- REG_LOOKUP['S7'] = REG_LOOKUP['23']
178
- REG_LOOKUP['T8'] = REG_LOOKUP['24']
179
- REG_LOOKUP['T9'] = REG_LOOKUP['25']
180
- REG_LOOKUP['K0'] = REG_LOOKUP['26']
181
- REG_LOOKUP['K1'] = REG_LOOKUP['27']
182
- REG_LOOKUP['GP'] = REG_LOOKUP['28']
183
- REG_LOOKUP['SP'] = REG_LOOKUP['29']
184
- REG_LOOKUP['FP'] = REG_LOOKUP['30']
185
- REG_LOOKUP['S8'] = REG_LOOKUP['30']
186
- REG_LOOKUP['RA'] = REG_LOOKUP['31']
187
- REG_LOOKUP['HI0'] = REG_LOOKUP['AC0']
188
- REG_LOOKUP['HI1'] = REG_LOOKUP['AC1']
189
- REG_LOOKUP['HI2'] = REG_LOOKUP['AC2']
190
- REG_LOOKUP['HI3'] = REG_LOOKUP['AC3']
191
- REG_LOOKUP['LO0'] = REG_LOOKUP['HI0']
192
- REG_LOOKUP['LO1'] = REG_LOOKUP['HI1']
193
- REG_LOOKUP['LO2'] = REG_LOOKUP['HI2']
194
- REG_LOOKUP['LO3'] = REG_LOOKUP['HI3']
195
-
196
- SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
197
-
198
- def self.register reg
199
- return reg if ID_LOOKUP[reg]
200
- return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
201
- if reg.respond_to? :upcase
202
- return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
203
- end
204
- REG_LOOKUP['INVALID']
205
- end
206
-
207
- end
208
- end
@@ -1,90 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- require 'ffi'
7
-
8
- require_relative 'ppc_const'
9
-
10
- module Crabstone
11
- module PPC
12
-
13
- class MemoryOperand < FFI::Struct
14
- layout(
15
- :base, :uint,
16
- :disp, :int32
17
- )
18
- end
19
-
20
- class CrxOperand < FFI::Struct
21
- layout(
22
- :scale, :uint,
23
- :reg, :uint,
24
- :cond, :uint
25
- )
26
- end
27
-
28
- class OperandValue < FFI::Union
29
- layout(
30
- :reg, :uint,
31
- :imm, :int32,
32
- :mem, MemoryOperand,
33
- :crx, CrxOperand
34
- )
35
- end
36
-
37
- class Operand < FFI::Struct
38
- layout(
39
- :type, :uint,
40
- :value, OperandValue
41
- )
42
-
43
- def value
44
- case self[:type]
45
- when OP_REG
46
- self[:value][:reg]
47
- when OP_IMM
48
- self[:value][:imm]
49
- when OP_MEM
50
- self[:value][:mem]
51
- when OP_CRX
52
- self[:value][:crx]
53
- else
54
- nil
55
- end
56
- end
57
-
58
- def reg?
59
- self[:type] == OP_REG
60
- end
61
-
62
- def imm?
63
- self[:type] == OP_IMM
64
- end
65
-
66
- def mem?
67
- self[:type] == OP_MEM
68
- end
69
-
70
- def valid?
71
- [OP_MEM, OP_IMM, OP_REG].include? self[:type]
72
- end
73
- end
74
-
75
- class Instruction < FFI::Struct
76
- layout(
77
- :bc, :uint,
78
- :bh, :uint,
79
- :update_cr0, :bool,
80
- :op_count, :uint8,
81
- :operands, [Operand, 8],
82
- )
83
-
84
- def operands
85
- self[:operands].take_while {|op| op[:type].nonzero?}
86
- end
87
-
88
- end
89
- end
90
- end