crabstone 3.0.3 → 4.0.0
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- checksums.yaml +5 -5
- data/CHANGES.md +45 -42
- data/README.md +16 -33
- data/lib/crabstone.rb +5 -557
- data/lib/crabstone/arch.rb +37 -0
- data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
- data/lib/crabstone/arch/3/arm64.rb +124 -0
- data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
- data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
- data/lib/crabstone/arch/3/mips.rb +57 -0
- data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
- data/lib/crabstone/arch/3/ppc.rb +73 -0
- data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
- data/lib/crabstone/arch/3/sparc.rb +60 -0
- data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
- data/lib/crabstone/arch/3/sysz.rb +67 -0
- data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
- data/lib/crabstone/arch/3/x86.rb +82 -0
- data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
- data/lib/crabstone/arch/3/xcore.rb +59 -0
- data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
- data/lib/crabstone/arch/4/arm.rb +110 -0
- data/lib/crabstone/arch/4/arm64.rb +125 -0
- data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
- data/lib/crabstone/arch/4/arm_const.rb +785 -0
- data/lib/crabstone/arch/4/evm.rb +20 -0
- data/lib/crabstone/arch/4/evm_const.rb +161 -0
- data/lib/crabstone/arch/4/m680x.rb +106 -0
- data/lib/crabstone/arch/4/m680x_const.rb +426 -0
- data/lib/crabstone/arch/4/m68k.rb +129 -0
- data/lib/crabstone/arch/4/m68k_const.rb +496 -0
- data/lib/crabstone/arch/4/mips.rb +57 -0
- data/lib/crabstone/arch/4/mips_const.rb +869 -0
- data/lib/crabstone/arch/4/ppc.rb +73 -0
- data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
- data/lib/crabstone/arch/4/sparc.rb +60 -0
- data/lib/crabstone/arch/4/sparc_const.rb +439 -0
- data/lib/crabstone/arch/4/sysz.rb +67 -0
- data/lib/crabstone/arch/4/sysz_const.rb +763 -0
- data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
- data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
- data/lib/crabstone/arch/4/x86.rb +91 -0
- data/lib/crabstone/arch/4/x86_const.rb +1972 -0
- data/lib/crabstone/arch/4/xcore.rb +59 -0
- data/lib/crabstone/arch/4/xcore_const.rb +171 -0
- data/lib/crabstone/arch/extension.rb +27 -0
- data/lib/crabstone/arch/register.rb +36 -0
- data/lib/crabstone/binding.rb +60 -0
- data/lib/crabstone/binding/3/detail.rb +36 -0
- data/lib/crabstone/binding/3/instruction.rb +23 -0
- data/lib/crabstone/binding/4/detail.rb +40 -0
- data/lib/crabstone/binding/4/instruction.rb +23 -0
- data/lib/crabstone/binding/structs.rb +32 -0
- data/lib/crabstone/constants.rb +110 -0
- data/lib/crabstone/cs_version.rb +49 -0
- data/lib/crabstone/disassembler.rb +153 -0
- data/lib/crabstone/error.rb +60 -0
- data/lib/crabstone/instruction.rb +183 -0
- data/lib/crabstone/version.rb +5 -0
- metadata +128 -324
- data/MANIFEST +0 -312
- data/Rakefile +0 -27
- data/bin/genconst +0 -66
- data/bin/genreg +0 -99
- data/crabstone.gemspec +0 -27
- data/examples/hello_world.rb +0 -43
- data/lib/arch/arm64.rb +0 -167
- data/lib/arch/arm64_registers.rb +0 -295
- data/lib/arch/arm_registers.rb +0 -149
- data/lib/arch/mips.rb +0 -78
- data/lib/arch/mips_registers.rb +0 -208
- data/lib/arch/ppc.rb +0 -90
- data/lib/arch/ppc_registers.rb +0 -209
- data/lib/arch/sparc.rb +0 -79
- data/lib/arch/sparc_registers.rb +0 -121
- data/lib/arch/systemz.rb +0 -79
- data/lib/arch/sysz_registers.rb +0 -66
- data/lib/arch/x86.rb +0 -107
- data/lib/arch/x86_registers.rb +0 -265
- data/lib/arch/xcore.rb +0 -78
- data/lib/arch/xcore_registers.rb +0 -57
- data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
- data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
- data/test/MC/AArch64/neon-2velem.s.cs +0 -113
- data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
- data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
- data/test/MC/AArch64/neon-across.s.cs +0 -40
- data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
- data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
- data/test/MC/AArch64/neon-crypto.s.cs +0 -15
- data/test/MC/AArch64/neon-extract.s.cs +0 -3
- data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
- data/test/MC/AArch64/neon-max-min.s.cs +0 -37
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
- data/test/MC/AArch64/neon-mov.s.cs +0 -74
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
- data/test/MC/AArch64/neon-perm.s.cs +0 -43
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
- data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
- data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
- data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
- data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
- data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
- data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
- data/test/MC/AArch64/neon-shift.s.cs +0 -22
- data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
- data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
- data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
- data/test/MC/AArch64/neon-tbl.s.cs +0 -21
- data/test/MC/AArch64/trace-regs.s.cs +0 -383
- data/test/MC/ARM/arm-aliases.s.cs +0 -7
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
- data/test/MC/ARM/arm-it-block.s.cs +0 -2
- data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
- data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
- data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
- data/test/MC/ARM/arm_instructions.s.cs +0 -25
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
- data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
- data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
- data/test/MC/ARM/crc32-thumb.s.cs +0 -7
- data/test/MC/ARM/crc32.s.cs +0 -7
- data/test/MC/ARM/dot-req.s.cs +0 -3
- data/test/MC/ARM/fp-armv8.s.cs +0 -52
- data/test/MC/ARM/idiv-thumb.s.cs +0 -3
- data/test/MC/ARM/idiv.s.cs +0 -3
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
- data/test/MC/ARM/mode-switch.s.cs +0 -7
- data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
- data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
- data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
- data/test/MC/ARM/neon-crypto.s.cs +0 -16
- data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
- data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
- data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
- data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neon-v8.s.cs +0 -38
- data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
- data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
- data/test/MC/ARM/neon-vswp.s.cs +0 -3
- data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
- data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
- data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
- data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
- data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
- data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
- data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
- data/test/MC/ARM/thumb-hints.s.cs +0 -12
- data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
- data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
- data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
- data/test/MC/ARM/thumb.s.cs +0 -19
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
- data/test/MC/ARM/thumb2-branches.s.cs +0 -85
- data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
- data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
- data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
- data/test/MC/ARM/vfp4.s.cs +0 -13
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
- data/test/MC/ARM/vpush-vpop.s.cs +0 -9
- data/test/MC/Mips/hilo-addressing.s.cs +0 -4
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
- data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
- data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
- data/test/MC/Mips/micromips-expansions.s.cs +0 -20
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
- data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
- data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
- data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
- data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
- data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
- data/test/MC/Mips/mips-expansions.s.cs +0 -20
- data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
- data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
- data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
- data/test/MC/Mips/mips-register-names.s.cs +0 -33
- data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
- data/test/MC/Mips/mips64-instructions.s.cs +0 -3
- data/test/MC/Mips/mips64-register-names.s.cs +0 -33
- data/test/MC/Mips/mips_directives.s.cs +0 -12
- data/test/MC/Mips/nabi-regs.s.cs +0 -12
- data/test/MC/Mips/set-at-directive.s.cs +0 -6
- data/test/MC/Mips/test_2r.s.cs +0 -16
- data/test/MC/Mips/test_2rf.s.cs +0 -33
- data/test/MC/Mips/test_3r.s.cs +0 -243
- data/test/MC/Mips/test_3rf.s.cs +0 -83
- data/test/MC/Mips/test_bit.s.cs +0 -49
- data/test/MC/Mips/test_cbranch.s.cs +0 -11
- data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
- data/test/MC/Mips/test_elm.s.cs +0 -16
- data/test/MC/Mips/test_elm_insert.s.cs +0 -4
- data/test/MC/Mips/test_elm_insve.s.cs +0 -5
- data/test/MC/Mips/test_i10.s.cs +0 -5
- data/test/MC/Mips/test_i5.s.cs +0 -45
- data/test/MC/Mips/test_i8.s.cs +0 -11
- data/test/MC/Mips/test_lsa.s.cs +0 -5
- data/test/MC/Mips/test_mi10.s.cs +0 -24
- data/test/MC/Mips/test_vec.s.cs +0 -8
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
- data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
- data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
- data/test/MC/README +0 -6
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
- data/test/MC/Sparc/sparc-vis.s.cs +0 -2
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
- data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
- data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
- data/test/MC/SystemZ/insn-good.s.cs +0 -2265
- data/test/MC/SystemZ/regs-good.s.cs +0 -45
- data/test/MC/X86/3DNow.s.cs +0 -29
- data/test/MC/X86/address-size.s.cs +0 -5
- data/test/MC/X86/avx512-encodings.s.cs +0 -12
- data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
- data/test/MC/X86/x86-32-avx.s.cs +0 -833
- data/test/MC/X86/x86-32-fma3.s.cs +0 -169
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
- data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
- data/test/MC/X86/x86_64-encoding.s.cs +0 -59
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
- data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
- data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
- data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
- data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
- data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
- data/test/README +0 -6
- data/test/test.rb +0 -205
- data/test/test.rb.SPEC +0 -235
- data/test/test_arm.rb +0 -202
- data/test/test_arm.rb.SPEC +0 -275
- data/test/test_arm64.rb +0 -150
- data/test/test_arm64.rb.SPEC +0 -116
- data/test/test_detail.rb +0 -228
- data/test/test_detail.rb.SPEC +0 -322
- data/test/test_exhaustive.rb +0 -80
- data/test/test_mips.rb +0 -118
- data/test/test_mips.rb.SPEC +0 -91
- data/test/test_ppc.rb +0 -137
- data/test/test_ppc.rb.SPEC +0 -84
- data/test/test_sanity.rb +0 -83
- data/test/test_skipdata.rb +0 -111
- data/test/test_skipdata.rb.SPEC +0 -58
- data/test/test_sparc.rb +0 -113
- data/test/test_sparc.rb.SPEC +0 -116
- data/test/test_sysz.rb +0 -111
- data/test/test_sysz.rb.SPEC +0 -61
- data/test/test_x86.rb +0 -189
- data/test/test_x86.rb.SPEC +0 -579
- data/test/test_xcore.rb +0 -100
- data/test/test_xcore.rb.SPEC +0 -75
data/lib/arch/arm_registers.rb
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# Library by Nguyen Anh Quynh
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# Original binding by Nguyen Anh Quynh and Tan Sheng Di
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# Additional binding work by Ben Nagy
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# (c) 2013 COSEINC. All Rights Reserved.
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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# Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
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# 2015-05-02T13:24:07+12:00
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module Crabstone
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module ARM
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REG_LOOKUP = {
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'INVALID' => 0,
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'APSR' => 1,
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'APSR_NZCV' => 2,
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'CPSR' => 3,
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'FPEXC' => 4,
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'FPINST' => 5,
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'FPSCR' => 6,
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'FPSCR_NZCV' => 7,
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'FPSID' => 8,
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'ITSTATE' => 9,
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'LR' => 10,
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'PC' => 11,
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'SP' => 12,
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'SPSR' => 13,
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'D0' => 14,
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'D1' => 15,
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'D2' => 16,
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'D3' => 17,
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'D4' => 18,
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'D5' => 19,
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'D6' => 20,
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'D7' => 21,
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'D8' => 22,
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'D9' => 23,
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'D10' => 24,
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'D11' => 25,
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'D12' => 26,
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'D13' => 27,
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'D14' => 28,
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'D15' => 29,
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'D16' => 30,
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'D17' => 31,
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'D18' => 32,
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'D19' => 33,
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'D20' => 34,
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'D21' => 35,
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'D22' => 36,
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'D23' => 37,
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'D24' => 38,
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'D25' => 39,
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'D26' => 40,
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'D27' => 41,
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'D28' => 42,
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'D29' => 43,
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'D30' => 44,
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'D31' => 45,
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'FPINST2' => 46,
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'MVFR0' => 47,
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'MVFR1' => 48,
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'MVFR2' => 49,
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'Q0' => 50,
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'Q1' => 51,
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'Q2' => 52,
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'Q3' => 53,
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'Q4' => 54,
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'Q5' => 55,
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'Q6' => 56,
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'Q7' => 57,
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'Q8' => 58,
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'Q9' => 59,
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'Q10' => 60,
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'Q11' => 61,
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'Q12' => 62,
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'Q13' => 63,
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'Q14' => 64,
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'Q15' => 65,
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'R0' => 66,
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'R1' => 67,
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'R2' => 68,
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'R3' => 69,
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'R4' => 70,
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'R5' => 71,
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'R6' => 72,
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'R7' => 73,
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'R8' => 74,
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'R9' => 75,
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'R10' => 76,
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'R11' => 77,
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'R12' => 78,
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'S0' => 79,
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'S1' => 80,
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'S2' => 81,
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'S3' => 82,
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'S4' => 83,
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'S5' => 84,
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'S6' => 85,
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'S7' => 86,
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'S8' => 87,
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'S9' => 88,
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'S10' => 89,
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'S11' => 90,
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'S12' => 91,
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'S13' => 92,
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'S14' => 93,
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'S15' => 94,
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'S16' => 95,
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'S17' => 96,
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'S18' => 97,
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'S19' => 98,
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'S20' => 99,
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'S21' => 100,
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'S22' => 101,
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'S23' => 102,
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'S24' => 103,
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'S25' => 104,
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'S26' => 105,
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'S27' => 106,
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'S28' => 107,
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'S29' => 108,
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'S30' => 109,
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'S31' => 110
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}
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ID_LOOKUP = REG_LOOKUP.invert
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# alias registers
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REG_LOOKUP['R13'] = REG_LOOKUP['SP']
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REG_LOOKUP['R14'] = REG_LOOKUP['LR']
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REG_LOOKUP['R15'] = REG_LOOKUP['PC']
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REG_LOOKUP['SB'] = REG_LOOKUP['R9']
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REG_LOOKUP['SL'] = REG_LOOKUP['R10']
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REG_LOOKUP['FP'] = REG_LOOKUP['R11']
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REG_LOOKUP['IP'] = REG_LOOKUP['R12']
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SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
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def self.register reg
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return reg if ID_LOOKUP[reg]
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return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
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if reg.respond_to? :upcase
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return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
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end
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REG_LOOKUP['INVALID']
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end
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end
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end
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data/lib/arch/mips.rb
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# Library by Nguyen Anh Quynh
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# Original binding by Nguyen Anh Quynh and Tan Sheng Di
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# Additional binding work by Ben Nagy
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# (c) 2013 COSEINC. All Rights Reserved.
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require 'ffi'
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require_relative 'mips_const'
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module Crabstone
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module MIPS
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class MemoryOperand < FFI::Struct
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layout(
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:base, :uint,
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:disp, :int64
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)
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end
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class OperandValue < FFI::Union
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layout(
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:reg, :uint,
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:imm, :long_long,
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:mem, MemoryOperand
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)
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end
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class Operand < FFI::Struct
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layout(
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:type, :uint,
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:value, OperandValue
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)
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def value
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case self[:type]
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when OP_REG
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self[:value][:reg]
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when OP_IMM
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self[:value][:imm]
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when OP_MEM
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self[:value][:mem]
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when OP_FP
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self[:value][:fp]
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else
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nil
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end
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end
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def reg?
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self[:type] == OP_REG
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end
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def imm?
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self[:type] == OP_IMM
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end
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def mem?
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self[:type] == OP_MEM
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end
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def valid?
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[OP_MEM, OP_IMM, OP_REG].include? self[:type]
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end
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end
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class Instruction < FFI::Struct
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layout(
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:op_count, :uint8,
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:operands, [Operand, 8]
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)
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def operands
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self[:operands].take_while {|op| op[:type].nonzero?}
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end
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end
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end
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end
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data/lib/arch/mips_registers.rb
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# Library by Nguyen Anh Quynh
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# Original binding by Nguyen Anh Quynh and Tan Sheng Di
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# Additional binding work by Ben Nagy
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# (c) 2013 COSEINC. All Rights Reserved.
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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# Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
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# 2015-05-02T13:24:07+12:00
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module Crabstone
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module MIPS
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REG_LOOKUP = {
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'INVALID' => 0,
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'0' => 1,
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'1' => 2,
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'2' => 3,
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'3' => 4,
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'4' => 5,
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'5' => 6,
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'6' => 7,
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'7' => 8,
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'8' => 9,
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'9' => 10,
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'10' => 11,
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'11' => 12,
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'12' => 13,
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'13' => 14,
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'14' => 15,
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'15' => 16,
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'16' => 17,
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'17' => 18,
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'18' => 19,
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'19' => 20,
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'20' => 21,
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'21' => 22,
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'22' => 23,
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'23' => 24,
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'24' => 25,
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'25' => 26,
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'26' => 27,
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'27' => 28,
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'28' => 29,
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'29' => 30,
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'30' => 31,
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'31' => 32,
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'DSPCCOND' => 33,
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'DSPCARRY' => 34,
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'DSPEFI' => 35,
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'DSPOUTFLAG' => 36,
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'DSPOUTFLAG16_19' => 37,
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'DSPOUTFLAG20' => 38,
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'DSPOUTFLAG21' => 39,
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'DSPOUTFLAG22' => 40,
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'DSPOUTFLAG23' => 41,
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'DSPPOS' => 42,
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'DSPSCOUNT' => 43,
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'AC0' => 44,
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'AC1' => 45,
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'AC2' => 46,
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'AC3' => 47,
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'CC0' => 48,
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'CC1' => 49,
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'CC2' => 50,
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'CC3' => 51,
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'CC4' => 52,
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'CC5' => 53,
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'CC6' => 54,
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'CC7' => 55,
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'F0' => 56,
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'F1' => 57,
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'F2' => 58,
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'F3' => 59,
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'F4' => 60,
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'F5' => 61,
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'F6' => 62,
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'F7' => 63,
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'F8' => 64,
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'F9' => 65,
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'F10' => 66,
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'F11' => 67,
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'F12' => 68,
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'F13' => 69,
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'F14' => 70,
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'F15' => 71,
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'F16' => 72,
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'F17' => 73,
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'F18' => 74,
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'F19' => 75,
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89
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'F20' => 76,
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90
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'F21' => 77,
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91
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'F22' => 78,
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92
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'F23' => 79,
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93
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'F24' => 80,
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94
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'F25' => 81,
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95
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'F26' => 82,
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96
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'F27' => 83,
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97
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'F28' => 84,
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98
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'F29' => 85,
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99
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'F30' => 86,
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100
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'F31' => 87,
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101
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'FCC0' => 88,
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102
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'FCC1' => 89,
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103
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'FCC2' => 90,
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104
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'FCC3' => 91,
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105
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'FCC4' => 92,
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106
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'FCC5' => 93,
|
107
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'FCC6' => 94,
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108
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-
'FCC7' => 95,
|
109
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'W0' => 96,
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'W1' => 97,
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'W2' => 98,
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'W3' => 99,
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'W4' => 100,
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'W5' => 101,
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'W6' => 102,
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'W7' => 103,
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'W8' => 104,
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'W9' => 105,
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'W10' => 106,
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'W11' => 107,
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'W12' => 108,
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'W13' => 109,
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'W14' => 110,
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'W15' => 111,
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'W16' => 112,
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126
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'W17' => 113,
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127
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'W18' => 114,
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128
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'W19' => 115,
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'W20' => 116,
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130
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'W21' => 117,
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'W22' => 118,
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'W23' => 119,
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'W24' => 120,
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'W25' => 121,
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'W26' => 122,
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'W27' => 123,
|
137
|
-
'W28' => 124,
|
138
|
-
'W29' => 125,
|
139
|
-
'W30' => 126,
|
140
|
-
'W31' => 127,
|
141
|
-
'HI' => 128,
|
142
|
-
'LO' => 129,
|
143
|
-
'P0' => 130,
|
144
|
-
'P1' => 131,
|
145
|
-
'P2' => 132,
|
146
|
-
'MPL0' => 133,
|
147
|
-
'MPL1' => 134,
|
148
|
-
'MPL2' => 135
|
149
|
-
}
|
150
|
-
|
151
|
-
ID_LOOKUP = REG_LOOKUP.invert
|
152
|
-
|
153
|
-
# alias registers
|
154
|
-
REG_LOOKUP['ZERO'] = REG_LOOKUP['0']
|
155
|
-
REG_LOOKUP['AT'] = REG_LOOKUP['1']
|
156
|
-
REG_LOOKUP['V0'] = REG_LOOKUP['2']
|
157
|
-
REG_LOOKUP['V1'] = REG_LOOKUP['3']
|
158
|
-
REG_LOOKUP['A0'] = REG_LOOKUP['4']
|
159
|
-
REG_LOOKUP['A1'] = REG_LOOKUP['5']
|
160
|
-
REG_LOOKUP['A2'] = REG_LOOKUP['6']
|
161
|
-
REG_LOOKUP['A3'] = REG_LOOKUP['7']
|
162
|
-
REG_LOOKUP['T0'] = REG_LOOKUP['8']
|
163
|
-
REG_LOOKUP['T1'] = REG_LOOKUP['9']
|
164
|
-
REG_LOOKUP['T2'] = REG_LOOKUP['10']
|
165
|
-
REG_LOOKUP['T3'] = REG_LOOKUP['11']
|
166
|
-
REG_LOOKUP['T4'] = REG_LOOKUP['12']
|
167
|
-
REG_LOOKUP['T5'] = REG_LOOKUP['13']
|
168
|
-
REG_LOOKUP['T6'] = REG_LOOKUP['14']
|
169
|
-
REG_LOOKUP['T7'] = REG_LOOKUP['15']
|
170
|
-
REG_LOOKUP['S0'] = REG_LOOKUP['16']
|
171
|
-
REG_LOOKUP['S1'] = REG_LOOKUP['17']
|
172
|
-
REG_LOOKUP['S2'] = REG_LOOKUP['18']
|
173
|
-
REG_LOOKUP['S3'] = REG_LOOKUP['19']
|
174
|
-
REG_LOOKUP['S4'] = REG_LOOKUP['20']
|
175
|
-
REG_LOOKUP['S5'] = REG_LOOKUP['21']
|
176
|
-
REG_LOOKUP['S6'] = REG_LOOKUP['22']
|
177
|
-
REG_LOOKUP['S7'] = REG_LOOKUP['23']
|
178
|
-
REG_LOOKUP['T8'] = REG_LOOKUP['24']
|
179
|
-
REG_LOOKUP['T9'] = REG_LOOKUP['25']
|
180
|
-
REG_LOOKUP['K0'] = REG_LOOKUP['26']
|
181
|
-
REG_LOOKUP['K1'] = REG_LOOKUP['27']
|
182
|
-
REG_LOOKUP['GP'] = REG_LOOKUP['28']
|
183
|
-
REG_LOOKUP['SP'] = REG_LOOKUP['29']
|
184
|
-
REG_LOOKUP['FP'] = REG_LOOKUP['30']
|
185
|
-
REG_LOOKUP['S8'] = REG_LOOKUP['30']
|
186
|
-
REG_LOOKUP['RA'] = REG_LOOKUP['31']
|
187
|
-
REG_LOOKUP['HI0'] = REG_LOOKUP['AC0']
|
188
|
-
REG_LOOKUP['HI1'] = REG_LOOKUP['AC1']
|
189
|
-
REG_LOOKUP['HI2'] = REG_LOOKUP['AC2']
|
190
|
-
REG_LOOKUP['HI3'] = REG_LOOKUP['AC3']
|
191
|
-
REG_LOOKUP['LO0'] = REG_LOOKUP['HI0']
|
192
|
-
REG_LOOKUP['LO1'] = REG_LOOKUP['HI1']
|
193
|
-
REG_LOOKUP['LO2'] = REG_LOOKUP['HI2']
|
194
|
-
REG_LOOKUP['LO3'] = REG_LOOKUP['HI3']
|
195
|
-
|
196
|
-
SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
|
197
|
-
|
198
|
-
def self.register reg
|
199
|
-
return reg if ID_LOOKUP[reg]
|
200
|
-
return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
|
201
|
-
if reg.respond_to? :upcase
|
202
|
-
return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
|
203
|
-
end
|
204
|
-
REG_LOOKUP['INVALID']
|
205
|
-
end
|
206
|
-
|
207
|
-
end
|
208
|
-
end
|
data/lib/arch/ppc.rb
DELETED
@@ -1,90 +0,0 @@
|
|
1
|
-
# Library by Nguyen Anh Quynh
|
2
|
-
# Original binding by Nguyen Anh Quynh and Tan Sheng Di
|
3
|
-
# Additional binding work by Ben Nagy
|
4
|
-
# (c) 2013 COSEINC. All Rights Reserved.
|
5
|
-
|
6
|
-
require 'ffi'
|
7
|
-
|
8
|
-
require_relative 'ppc_const'
|
9
|
-
|
10
|
-
module Crabstone
|
11
|
-
module PPC
|
12
|
-
|
13
|
-
class MemoryOperand < FFI::Struct
|
14
|
-
layout(
|
15
|
-
:base, :uint,
|
16
|
-
:disp, :int32
|
17
|
-
)
|
18
|
-
end
|
19
|
-
|
20
|
-
class CrxOperand < FFI::Struct
|
21
|
-
layout(
|
22
|
-
:scale, :uint,
|
23
|
-
:reg, :uint,
|
24
|
-
:cond, :uint
|
25
|
-
)
|
26
|
-
end
|
27
|
-
|
28
|
-
class OperandValue < FFI::Union
|
29
|
-
layout(
|
30
|
-
:reg, :uint,
|
31
|
-
:imm, :int32,
|
32
|
-
:mem, MemoryOperand,
|
33
|
-
:crx, CrxOperand
|
34
|
-
)
|
35
|
-
end
|
36
|
-
|
37
|
-
class Operand < FFI::Struct
|
38
|
-
layout(
|
39
|
-
:type, :uint,
|
40
|
-
:value, OperandValue
|
41
|
-
)
|
42
|
-
|
43
|
-
def value
|
44
|
-
case self[:type]
|
45
|
-
when OP_REG
|
46
|
-
self[:value][:reg]
|
47
|
-
when OP_IMM
|
48
|
-
self[:value][:imm]
|
49
|
-
when OP_MEM
|
50
|
-
self[:value][:mem]
|
51
|
-
when OP_CRX
|
52
|
-
self[:value][:crx]
|
53
|
-
else
|
54
|
-
nil
|
55
|
-
end
|
56
|
-
end
|
57
|
-
|
58
|
-
def reg?
|
59
|
-
self[:type] == OP_REG
|
60
|
-
end
|
61
|
-
|
62
|
-
def imm?
|
63
|
-
self[:type] == OP_IMM
|
64
|
-
end
|
65
|
-
|
66
|
-
def mem?
|
67
|
-
self[:type] == OP_MEM
|
68
|
-
end
|
69
|
-
|
70
|
-
def valid?
|
71
|
-
[OP_MEM, OP_IMM, OP_REG].include? self[:type]
|
72
|
-
end
|
73
|
-
end
|
74
|
-
|
75
|
-
class Instruction < FFI::Struct
|
76
|
-
layout(
|
77
|
-
:bc, :uint,
|
78
|
-
:bh, :uint,
|
79
|
-
:update_cr0, :bool,
|
80
|
-
:op_count, :uint8,
|
81
|
-
:operands, [Operand, 8],
|
82
|
-
)
|
83
|
-
|
84
|
-
def operands
|
85
|
-
self[:operands].take_while {|op| op[:type].nonzero?}
|
86
|
-
end
|
87
|
-
|
88
|
-
end
|
89
|
-
end
|
90
|
-
end
|