badline 0.12.1 → 0.14.0

data/lib/badline/sid.rb

@@ -1,303 +0,0 @@
-# frozen_string_literal: true
-
-require "badline/sid/waveform"
-require "badline/sid/envelope"
-require "badline/sid/voice"
-require "badline/sid/filter"
-require "badline/sid/decimator"
-require "badline/sid/catch_up"
-
-module Badline
-  # SID (Sound Interface Device) chip, in either the 6581 or the 8580
-  # revision.
-  #
-  # $D400-$D418 - Voices, filter and volume   - write only
-  # $D419-$D41A - POTX/POTY paddle inputs     - read only
-  # $D41B-$D41C - Voice 3 oscillator/envelope - read only
-  # $D41D-$D41F - Unconnected
-  #
-  # The register file mirrors every 32 bytes up to $D7FF. A second or
-  # third SID, which only the SID player fits, is built `at` another
-  # address and decodes just the 32 bytes there.
-  #
-  # Reading a write-only or unconnected register returns the last byte the
-  # SID saw on the data bus. That value fades to $00 as the capacitance
-  # holding it drains. Paddles and the 1351 mouse attach as a pots source
-  # responding to #pot_x and #pot_y; with none attached the lines read $FF.
-  #
-  # Three voices feed the filter and the master volume; #output and #sample
-  # read out the mixed result, and #record collects it at an audio rate for
-  # #drain_samples. The DSP is clocked lazily and catches up when something
-  # asks for its state.
-  #
-  # The 6581 drives its voices well above ground, so the mix carries a large
-  # DC offset that the RC network on the C64 board filters out.
-  class SID
-    include Addressable
-    include CatchUp
-
-    VOICES = 3
-
-    # Cycles the data bus holds a value, measured through SID/bitfade.
-    BUS_TTL = { mos6581: 0x1d00, mos8580: 0xa2000 }.freeze
-
-    # Scales the filter's 20-bit mix down to a signed 16-bit sample, as
-    # reSID 0.16 does: three voices at full swing and volume 15 span the
-    # whole range, on either chip.
-    SAMPLE_DIVISOR = ((0xfff * 0xff) >> 7) * 3 * 15 * 2 / (2**16)
-
-    # Writes the DSP queues between catch-ups. A full queue catches up
-    # there and then, so no write loses its timing.
-    DEFERRED_WRITES = 0x400
-
-    # Cycles the filter integrates in one step while synthesizing, after
-    # reSID's delta_t_flt. 1 makes the audio exact, at a per-cycle cost.
-    FILTER_CHUNK = 4
-
-    attr_accessor :pots
-    attr_reader :model
-
-    def initialize(model: :mos6581, pots: nil, filter_chunk: FILTER_CHUNK, at: 0xd400)
-      addressable_at(at, length: at == 0xd400 ? 2**10 : 2**5)
-      @model = model
-      @pots = pots
-      @bus_ttl_reset = BUS_TTL.fetch(model)
-      @filter = Filter.new(model:)
-      @synthesizing = false
-      @stepped = @synced = false
-      @pending_cycles = 0
-      @deferred_writes = []
-      @decimator = nil
-      @samples = []
-      @voice_samples = nil
-      @filter_chunk = filter_chunk
-      @voices = Voice.linked(VOICES, model:)
-      @voice1, @voice2, @voice3 = @voices
-      @waveform1, @waveform2, @waveform3 = @voices.map(&:waveform)
-      reset!
-    end
-
-    # Switches the chip, its filter and its voices to the other model's
-    # values. The cycles already passed run on the old model first, and the
-    # running state carries over.
-    def model=(model)
-      catch_up
-      @model = model
-      @bus_ttl_reset = BUS_TTL.fetch(model)
-      @filter.model = model
-      @voices.each { |voice| voice.model = model }
-      update_span_rules
-    end
-
-    # The RES line clears the registers, the data bus, the filter and the
-    # voices, all but their accumulators. Recording carries on across it.
-    def reset!
-      catch_up
-      @registers = Memory.new(length: 2**5)
-      @bus_value = 0x00
-      @bus_ttl = 0
-      @voices.each(&:reset!)
-      @filter.reset
-      update_span_rules
-    end
-
-    # The DSP only counts cycles as they pass. Whatever asks for its state
-    # catches it up, a span at a time: each span fast-forwards the voices
-    # and ends on one whole cycle, so everything the CPU can read stays
-    # exact. The filter only runs once something wants audio.
-    def synthesizing? = @synthesizing
-
-    def synthesize!
-      return if @synthesizing
-
-      @synthesizing = true
-      update_span_rules
-      catch_up
-    end
-
-    # Starts collecting the output, averaged down to `rate` samples a
-    # second, for #drain_samples. `filter_chunk` overrides the one the SID
-    # was built with, for a machine that built its own. `clock_hz` is the
-    # rate the SID's cycles are taken to run at.
-    def record(rate:, filter_chunk: @filter_chunk, clock_hz: Region::PAL.clock_hz)
-      synthesize!
-      catch_up
-      @filter_chunk = filter_chunk
-      @decimator = Decimator.new(clock_hz:, rate:)
-      @samples = []
-    end
-
-    # How far the recording has got into the sample it is averaging, for
-    # a host that carries on recording from a saved state: it calls
-    # #record, then #load_recording.
-    def save_recording(out)
-      decimator = @decimator
-      raise ArgumentError, "the SID isn't recording" if decimator.nil?
-
-      out.marker("RECORDING")
-      decimator.save_state(out)
-    end
-
-    def load_recording(input)
-      decimator = @decimator
-      raise ArgumentError, "the SID isn't recording" if decimator.nil?
-
-      input.marker("RECORDING")
-      decimator.load_state(input)
-    end
-
-    # Also keeps each voice's own output, before the filter and the volume,
-    # as each recorded sample closes, for #drain_voice_samples.
-    def record_voices!
-      @voice_samples = [] if @voice_samples.nil?
-    end
-
-    # The voices' outputs since the last drain, three to a sample, in voice
-    # order, or nothing unless #record_voices! asked for them.
-    def drain_voice_samples
-      return [] if @voice_samples.nil?
-
-      catch_up
-      samples = @voice_samples
-      @voice_samples = []
-      samples
-    end
-
-    # The samples recorded since the last drain.
-    def drain_samples
-      catch_up
-      samples = @samples
-      @samples = []
-      samples
-    end
-
-    def voices
-      catch_up
-      @voices
-    end
-
-    # Runs the DSP up to the current cycle.
-    def catch_up! = catch_up
-
-    # The byte the data bus holds and the cycles until it fades.
-    def bus_state = [@bus_value, @bus_ttl]
-
-    def restore_bus(value, ttl)
-      @bus_value = value
-      @bus_ttl = ttl
-    end
-
-    def filter
-      catch_up
-      @filter
-    end
-
-    # Voice 3's oscillator and envelope, the only synthesis state the CPU
-    # can see. Programs poll OSC3 with the noise waveform selected for
-    # random numbers, and ENV3 to time hard restarts.
-    def osc3
-      catch_up
-      @waveform3.osc3 >> 4
-    end
-
-    def env3
-      catch_up
-      @voice3.envelope.env3
-    end
-
-    def output
-      synthesize!
-      catch_up
-      @filter.output
-    end
-
-    def sample
-      output
-      current_sample
-    end
-
-    def cycle!
-      age_bus if @bus_ttl != 0
-      @pending_cycles += 1
-    end
-
-    def peek(addr)
-      case offset_of(addr) % (2**5)
-      when 0x19 then latch(pots ? pots.pot_x : 0xff)
-      when 0x1a then latch(pots ? pots.pot_y : 0xff)
-      when 0x1b then latch(osc3)
-      when 0x1c then latch(env3)
-      else @bus_value
-      end
-    end
-
-    def poke(addr, value)
-      reg = offset_of(addr) % (2**5)
-      write_register(reg, value) if reg <= 0x18
-      latch(value)
-    end
-
-    # Register contents as written, for save states and debugging.
-    def register(reg) = @registers.peek(reg)
-
-    # The registers, the data bus, the voices and the filter, and the span
-    # the DSP has yet to catch up on, as it stands: saving leaves the SID
-    # as it was. Whether it synthesizes or records is the host's.
-    def save_state(out)
-      out.marker("SID")
-      @registers.save_state(out)
-      out.int(@bus_value).int(@bus_ttl).int(@pending_cycles).ints(@deferred_writes)
-      @voices.each { |voice| voice.save_state(out) }
-      @filter.save_state(out)
-    end
-
-    def load_state(input)
-      input.marker("SID")
-      @registers.load_state(input)
-      @bus_value = input.int
-      @bus_ttl = input.int
-      @pending_cycles = input.int
-      input.ints_into(@deferred_writes)
-      @voices.each { |voice| voice.load_state(input) }
-      @filter.load_state(input)
-      update_span_rules
-    end
-
-    private
-
-    def latch(value)
-      @bus_ttl = @bus_ttl_reset
-      @bus_value = value
-    end
-
-    def age_bus
-      @bus_ttl -= 1
-      @bus_value = 0x00 if @bus_ttl.zero?
-    end
-
-    def write_register(reg, value)
-      @registers.poke(reg, value)
-      catch_up if @deferred_writes.length == DEFERRED_WRITES * 3
-      @deferred_writes.push(@pending_cycles, reg, value)
-    end
-
-    def apply_write(reg, value)
-      reg < 0x15 ? write_voice(reg, value) : @filter.write(reg, value)
-    end
-
-    def write_voice(reg, value)
-      voice = @voices[reg / 7]
-      case reg % 7
-      when 0 then voice.waveform.frequency_low = value
-      when 1 then voice.waveform.frequency_high = value
-      when 2 then voice.waveform.pulse_width_low = value
-      when 3 then voice.waveform.pulse_width_high = value
-      when 4
-        voice.control = value
-        update_span_rules
-      when 5 then voice.envelope.attack_decay = value
-      when 6 then voice.envelope.sustain_release = value
-      end
-    end
-  end
-end

data/lib/badline/snapshot/setup.rb

@@ -1,75 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  module Snapshot
-    # How a machine was built: its VIC, CIA and SID models, its region, its
-    # RAM expansion, the size of its REU, its KERNAL, whether it has a
-    # datasette and its board, the arguments Computer.new takes. A State
-    # starts with them, so a machine to restore it into can be built first.
-    Setup = Data.define(:vic_model, :cia_model, :sid_model, :region, :ram_expansion, :reu, :kernal, :datasette,
-                        :board)
-
-    class Setup
-      SID_MODELS = %i[mos6581 mos8580].freeze
-      REGIONS = [Region::PAL, Region::NTSC, Region::NTSC_OLD, Region::DREAN].freeze
-      RAM_EXPANSIONS = [:none, *RAMExpansion::TYPES.keys].freeze
-      KERNALS = AddressBus::ROMs::KERNALS.keys.freeze
-      BOARDS = AddressBus::Fittings::BOARDS
-
-      def self.of(address_bus)
-        new(vic_model: address_bus.vic.model, cia_model: address_bus.cia1.model, sid_model: address_bus.sid.model,
-            region: address_bus.region, ram_expansion: address_bus.ram_expansion.type, reu: address_bus.reu&.size_kb,
-            kernal: address_bus.kernal, datasette: address_bus.datasette.connected?, board: address_bus.board)
-      end
-
-      # Layout 3 has no KERNAL or datasette, and stands for the C64's, and
-      # layouts before 6 have no board, and stand for the C64's.
-      def self.read(input)
-        new(vic_model: VIC::MODELS.fetch(input.int), cia_model: CIA::MODELS.fetch(input.int),
-            sid_model: SID_MODELS.fetch(input.int), region: REGIONS.fetch(input.int),
-            ram_expansion: ram_expansion(RAM_EXPANSIONS.fetch(input.int)), reu: reu(input.int),
-            kernal: input.schema > 3 ? KERNALS.fetch(input.int) : :c64,
-            datasette: input.schema > 3 ? input.boolean? : true,
-            board: input.schema > 5 ? BOARDS.fetch(input.int) : :c64)
-      rescue IndexError
-        raise FormatError, "the state names a chip model, region, RAM expansion, KERNAL or board badline doesn't know"
-      end
-
-      def self.ram_expansion(name) = name == :none ? nil : name
-
-      # An REU's size in K, written as 0 for none.
-      def self.reu(size_kb)
-        return nil if size_kb.zero?
-        return size_kb if REU::SIZES_KB.include?(size_kb)
-
-        raise FormatError, "the state names a #{size_kb}K REU, which badline doesn't build"
-      end
-
-      def write(out)
-        out.int(VIC::MODELS.index(vic_model)).int(CIA::MODELS.index(cia_model))
-        out.int(SID_MODELS.index(sid_model)).int(REGIONS.index(region))
-        out.int(RAM_EXPANSIONS.index(ram_expansion || :none)).int(reu || 0)
-        out.int(KERNALS.index(kernal)).boolean(datasette).int(BOARDS.index(board))
-      end
-
-      # A machine built this way, at power-on.
-      def build
-        Computer.new(vic_model:, cia_model:, sid_model:, region:, ram_expansion:, reu:, kernal:, datasette:, board:)
-      end
-
-      # The chips, led by the model's name when they make one of
-      # Badline::Model's.
-      def to_s
-        model = Model.of(self)
-        parts = [vic_model, cia_model, sid_model, region.name]
-        parts.unshift(model.name) if model
-        parts << ram_expansion if ram_expansion
-        parts << "a #{reu}K REU" if reu
-        parts << "the #{kernal} KERNAL" unless kernal == :c64
-        parts << "no datasette" unless datasette
-        parts << "the #{board} board" unless board == :c64
-        parts.join(", ")
-      end
-    end
-  end
-end

data/lib/badline/snapshot/state.rb

@@ -1,189 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  module Snapshot
-    # A file that isn't a snapshot badline reads, is cut short, or holds a
-    # state that doesn't line up with the machine reading it.
-    class FormatError < StandardError; end
-
-    # A machine's state, held in memory: the Integers each chip writes in
-    # turn, and the byte strings for memories, names and paths. Booleans
-    # are written as 0 and 1. Computer#snapshot takes one and
-    # Computer#restore puts it back.
-    class State
-      # The layout the chips write their fields in. It goes up whenever a
-      # save_state writes something else, so a State in another layout
-      # fails before anything is read into a machine. Layout 3, without the
-      # KERNAL and datasette in the setup, layout 4, without the VIA shift
-      # register's clock delay, layout 5, without the board in the setup,
-      # layout 6, without the C128's Z80, layout 7, without a 1581 on the
-      # serial bus, and layout 8, with the VIC's unused cycle count and
-      # pending-write flag, still read.
-      SCHEMA = 9
-      READABLE = [3, 4, 5, 6, 7, 8, SCHEMA].freeze
-
-      attr_reader :values, :strings
-
-      def initialize(values, strings)
-        @values = values
-        @strings = strings
-      end
-
-      def ==(other)
-        other.is_a?(State) && values == other.values && strings == other.strings
-      end
-    end
-
-    # Writes a State. Each chip's save_state writes its fields through one
-    # of these, and its load_state reads them back from a StateReader in
-    # the same order.
-    class StateWriter
-      attr_reader :state
-
-      def initialize
-        @values = []
-        @strings = []
-        @state = State.new(@values, @strings)
-      end
-
-      def int(value)
-        raise TypeError, "not an Integer: #{value.inspect}" unless value.is_a?(Integer)
-
-        @values << value.to_i
-        self
-      end
-
-      def boolean(value)
-        @values << (value ? 1 : 0)
-        self
-      end
-
-      def optional_int(value)
-        return boolean(false) if value.nil?
-
-        boolean(true).int(value)
-      end
-
-      def ints(values)
-        int(values.length)
-        values.each { |value| int(value) }
-        self
-      end
-
-      def booleans(values)
-        int(values.length)
-        values.each { |value| boolean(value) }
-        self
-      end
-
-      # Bytes, 0 to 255 each, kept as one string.
-      def blob(values)
-        @strings << values.pack("C*")
-        self
-      end
-
-      def string(value)
-        @strings << value.to_s.b
-        self
-      end
-
-      def optional_string(value)
-        return boolean(false) if value.nil?
-
-        boolean(true).string(value)
-      end
-
-      # A name a reader checks for, so a state that has gone out of step
-      # fails there instead of loading the wrong fields.
-      def marker(name) = string(name)
-
-      # The State's layout and the badline version writing it, which a
-      # reader checks first (StateReader#check_stamp).
-      def stamp = int(State::SCHEMA).string(VERSION)
-    end
-
-    # Reads a State back in the order a StateWriter wrote it.
-    #
-    # A detached reader restores a machine that opens no host file and
-    # writes none, for a copy the machine runs on its own: a disk image
-    # comes from the bytes the state holds, write-protected, a directory
-    # device 8 serves is left out, and a true drive's disk keeps the
-    # state's tracks without its image file.
-    class StateReader
-      # The layout check_stamp found.
-      attr_reader :schema
-
-      def initialize(state, detached: false)
-        @values = state.values
-        @strings = state.strings
-        @value = 0
-        @string = 0
-        @detached = detached
-        @schema = State::SCHEMA
-      end
-
-      def detached? = @detached
-
-      def int
-        raise FormatError, "the state ends early, at value #{@value}" if @value >= @values.length
-
-        value = @values[@value]
-        @value += 1
-        value
-      end
-
-      def boolean?
-        value = int
-        raise FormatError, "expected a boolean in the state, found #{value}" unless value.between?(0, 1)
-
-        value == 1
-      end
-
-      def optional_int = boolean? ? int : nil
-
-      def ints = Array.new(int) { int }
-
-      def booleans = Array.new(int) { boolean? }
-
-      # Reads into an existing array, in place, so whatever else holds it
-      # sees the values.
-      def ints_into(array) = array.replace(ints)
-
-      def booleans_into(array) = array.replace(booleans)
-
-      def blob = string.bytes
-
-      def blob_into(array) = array.replace(blob)
-
-      def string
-        raise FormatError, "the state ends early, at string #{@string}" if @string >= @strings.length
-
-        value = @strings[@string]
-        @string += 1
-        value
-      end
-
-      def optional_string = boolean? ? string : nil
-
-      def marker(name)
-        found = string
-        raise FormatError, "expected #{name} in the state, found #{found[0, 20].inspect}" unless found == name
-      end
-
-      # Fails unless the State was written in a layout this badline reads
-      # (State::READABLE) by this badline version.
-      def check_stamp
-        schema = int
-        version = string
-        @schema = schema
-        return if State::READABLE.include?(schema) && version == VERSION
-
-        raise FormatError, "the state was written by badline #{version.inspect} in layout #{schema}, " \
-                           "and this is badline #{VERSION}, layout #{State::SCHEMA}"
-      end
-
-      # Whether every value and string has been read.
-      def finished? = @value == @values.length && @string == @strings.length
-    end
-  end
-end