badline 0.12.1 → 0.14.0

data/lib/badline/c64/cartridge/pagefox.rb

@@ -0,0 +1,60 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # Pagefox: two 32K EPROMs and 32K of RAM, seen 16K at a time. A write to
+      # $DE80-$DEFF selects the half with bit 1 and the chip with bits 2-3
+      # (EPROM, EPROM, RAM, nothing), and switches the cartridge out with
+      # bit 4. Writes to the RAM land in the C64's RAM as well.
+      class Pagefox < Cartridge
+        RAM_CHIP = 2
+        EMPTY_CHIP = 3
+
+        def connect(ram:, open_bus:)
+          super
+          @ram_banks.each { |b| b.backing = ram }
+        end
+
+        def poke(addr, value)
+          return if addr < 0xde80 || addr > 0xdeff
+
+          select(value)
+          changed!
+        end
+
+        def reset
+          select(0)
+          changed!
+        end
+
+        private
+
+        def windows = [*@roml_banks, *@romh_banks, *@ram_banks, @open_bus || EMPTY_BANK, EMPTY_BANK]
+
+        def select(value)
+          half = (value >> 1) & 0x01
+          chip = (value >> 2) & 0x03
+          @roml, @romh = window(chip, half)
+          self.mode = value.anybits?(0x10) ? :off : :rom16k
+        end
+
+        def window(chip, half)
+          case chip
+          when RAM_CHIP then @ram_banks[half * 2, 2]
+          when EMPTY_CHIP then [@open_bus || EMPTY_BANK] * 2
+          else
+            number = (chip << 1) | half
+            [bank(@roml_banks, number), bank(@romh_banks, number)]
+          end
+        end
+
+        def install_chips(chips)
+          @roml_banks, @romh_banks = banks_from(chips)
+          @ram_banks = Array.new(4) { RAMBank.new }
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/retro_replay.rb

@@ -0,0 +1,278 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # Retro Replay: an Am29F010 flash chip of two 64K halves, each eight 8K
+      # ROM banks, and four 8K RAM banks, with the Action Replay's register at
+      # $DE00 and an extended one at $DE01. The Nordic Replay (subtype 1) adds
+      # the Nordic Power configuration. The clock port isn't there.
+      #
+      # CRT banks 0-7 are the chip's upper half and banks 8-15 its lower half.
+      # The cartridge runs from the upper half, or from the lower one with the
+      # bank jumper set.
+      #
+      # $DE00 writes:
+      #   bit 0      pulls GAME low
+      #   bit 1      releases EXROM
+      #   bit 2      switches the registers off until the next freeze or reset
+      #   bits 3-4,7 bank
+      #   bit 5      RAM instead of ROM
+      #   bit 6      acknowledges a freeze: until then the cartridge stays in
+      #              Ultimax mode with nothing at ROML
+      #
+      # $DE01 writes the bank again, and once only AllowBank (bit 1), which
+      # banks the RAM in I/O as well, NoFreeze (bit 2) and the REU-compatible
+      # map (bit 6), which moves the I/O RAM from I/O 2 to I/O 1 above $DE01.
+      # $DE00 and $DE01 read back the bank, the write-once bits and the freeze
+      # button.
+      #
+      # The VIC sees Ultimax mode only from a freeze to the next $DE00 write.
+      #
+      # The RAM at ROML takes writes only in Ultimax mode, except on the Nordic
+      # Replay. With RAM and only EXROM released ($22) the Retro Replay maps
+      # nothing at ROML and keeps the RAM in I/O, and the Nordic Replay maps
+      # the ROM at ROML and the RAM at ROMH, as the Nordic Power does. Frozen
+      # in that configuration, the Nordic Replay maps the RAM at $A000.
+      #
+      # The flash jumper puts the cartridge in flash mode, which starts with
+      # the cartridge switched off ($02) and has no freeze. $DE00 selects 8K
+      # mode unless it switches the cartridge off, and writes to ROML reach
+      # the flash, and the C64's RAM underneath, or the RAM when selected.
+      # $DE01 isn't write-once and has no REU-compatible map, and with the
+      # bank jumper set its bit 5 clear selects the other half of the flash,
+      # until the next $DE00 write. $DE00 reads the flash jumper in bit 0 and
+      # the half in bit 5.
+      class RetroReplay < Cartridge
+        include Freezer
+
+        CONTROL_MODES = %i[rom8k rom16k off ultimax].freeze
+        IO1_PAGE = 0x1e00
+        IO2_PAGE = 0x1f00
+
+        attr_reader :flash
+
+        def initialize(crt, flash_jumper: false, bank_jumper: false)
+          @nordic = crt.subtype == 1
+          @flash_jumper = flash_jumper
+          @bank_jumper = bank_jumper
+          super(crt)
+        end
+
+        def clock=(clock)
+          super
+          @flash.clock = clock
+        end
+
+        def connect(ram:, open_bus:)
+          super
+          @through.each { |b| b.backing = ram }
+          configure
+        end
+
+        def readable_io_pages
+          [0xde, 0xdf]
+        end
+
+        def peek(addr)
+          return open_bus(addr) unless @active
+
+          addr < 0xdf00 ? io1_peek(addr) : io2_peek(addr)
+        end
+
+        def poke(addr, value)
+          return unless @active
+
+          low = addr & 0xff
+          if addr >= 0xdf00
+            io_ram[IO2_PAGE | low] = value if io_ram_writable?(!@reu_mapping)
+          elsif low > 1
+            io_ram[IO1_PAGE | low] = value if io_ram_writable?(@reu_mapping)
+          else
+            low.zero? ? control(value) : extended_control(value)
+          end
+        end
+
+        def phi1_ultimax? = @phi1_ultimax
+
+        def ultimax_a000
+          @isolated[ram_view_bank] if @nordic && @ram_at_a000 && @frozen
+        end
+
+        # Reset leaves the write-once bits of $DE01 as they are.
+        def reset
+          @active = true
+          @frozen = false
+          self.nmi = false
+          control(@flash_jumper ? 0x02 : 0x00)
+        end
+
+        def freeze!
+          @active = @frozen = @phi1_ultimax = true
+          @ram_enabled = false
+          @bank = 0
+          @config = :ultimax
+          configure
+        end
+
+        private
+
+        def freeze_allowed? = !@no_freeze && !@flash_jumper
+
+        def status
+          ((@bank & 0x03) << 3) | ((@bank & 0x04) << 5) | ((@bank & 0x08) << 2) | (@flash_jumper ? 0x01 : 0) |
+            (@allow_bank ? 0x02 : 0) | (button_pressed? ? 0x04 : 0) | (@reu_mapping ? 0x40 : 0)
+        end
+
+        def io1_peek(addr)
+          return status if (addr & 0xff) < 2
+          return open_bus(addr) unless @reu_mapping && !@frozen
+
+          io_window(addr, IO1_PAGE)
+        end
+
+        def io2_peek(addr)
+          return open_bus(addr) if @reu_mapping || @frozen
+
+          io_window(addr, IO2_PAGE)
+        end
+
+        # The I/O RAM when selected, otherwise the ROM, which 16K and Ultimax
+        # mode leave out.
+        def io_window(addr, page)
+          if @ram_enabled || @ram_at_a000
+            io_ram[page | (addr & 0xff)]
+          elsif @config == :rom8k || @config == :off
+            @rom.peek(addr)
+          else
+            open_bus(addr)
+          end
+        end
+
+        def io_ram
+          @ram_data[ram_view_bank]
+        end
+
+        def io_ram_writable?(window)
+          window && !@frozen && (@ram_enabled || (@nordic && @ram_at_a000))
+        end
+
+        def ram_view_bank
+          @allow_bank ? @bank & 0x03 : 0
+        end
+
+        def control(value)
+          value = flash_mode_control(value)
+          @bank = bank_bits(value)
+          @phi1_ultimax = false
+          @config = CONTROL_MODES[value & 0x03]
+          @ram_at_a000 = (value & 0x67) == 0x22
+          if @nordic && @ram_at_a000
+            @config = :rom16k
+            @ram_enabled = false
+          else
+            acknowledge_freeze if value.anybits?(0x40)
+            @ram_enabled = value.anybits?(0x20)
+            @config = :off if @ram_at_a000
+          end
+          @config = :ultimax if @frozen
+          configure
+          @active = false if value.anybits?(0x04)
+        end
+
+        # Flash mode leaves 8K mode only to switch the cartridge off.
+        def flash_mode_control(value)
+          return value unless @flash_jumper && (value & 0x03) != 0x02
+
+          value & ~0x03
+        end
+
+        def acknowledge_freeze
+          @frozen = false
+          self.nmi = false
+        end
+
+        def extended_control(value)
+          unless @write_once
+            @allow_bank = value.anybits?(0x02)
+            @no_freeze = value.anybits?(0x04)
+            @reu_mapping = value.anybits?(0x40) && !@flash_jumper
+            @write_once = !@flash_jumper
+          end
+          @bank = bank_bits(value)
+          @bank |= 0x08 if @flash_jumper && @bank_jumper && value.nobits?(0x20)
+          configure
+        end
+
+        def bank_bits(value)
+          ((value >> 3) & 0x03) | ((value >> 5) & 0x04)
+        end
+
+        def configure
+          map_windows
+          changed!
+        end
+
+        def map_windows
+          self.mode = @config
+          @rom = flash_window(@bank)
+          @roml = roml_window
+          @romh = romh_window
+        end
+
+        def roml_window
+          nothing = @open_bus || EMPTY_BANK
+          return @ram_enabled ? WriteOnlyRAM.new(@ram_data[@bank & 0x03], nothing) : nothing if @frozen
+          return ram_window(@bank & 0x03) if @ram_enabled
+          return flash_writes if (@nordic && @ram_at_a000) || @config != :rom16k
+
+          nothing
+        end
+
+        # A RAM bank over the flash window takes writes for the chip and the
+        # C64's RAM alike.
+        def flash_writes
+          return @rom unless @flash_jumper
+
+          RAMBank.new(@rom).tap { |window| window.backing = @ram }
+        end
+
+        def ram_window(number)
+          if @config == :ultimax || @flash_jumper
+            @isolated[number]
+          else
+            (@nordic ? @through : @readers)[number]
+          end
+        end
+
+        def romh_window
+          nordic_ram = @nordic && @ram_at_a000
+          return @isolated[ram_view_bank] if nordic_ram && !@frozen
+          return @rom if @allow_bank || !(@ram_enabled || nordic_ram)
+
+          flash_window(@bank & ~0x03)
+        end
+
+        def flash_window(number)
+          @flash.window((@bank_jumper ? 0 : 0x10000) + (number * BANK_SIZE))
+        end
+
+        def install_chips(chips)
+          data = Array.new(0x20000, 0xff)
+          chips.each do |chip|
+            bytes = chip.data.first(BANK_SIZE)
+            data[((chip.bank & 0x0f) ^ 0x08) * BANK_SIZE, bytes.length] = bytes
+          end
+          @flash = Flash.new(data, model: Flash::AM29F010)
+          @flash.on_change { configure }
+          @ram_data = Array.new(4) { Array.new(BANK_SIZE, 0) }
+          @through = @ram_data.map { |data| RAMBank.new(data) }
+          @isolated = @ram_data.map { |data| RAMBank.new(data) }
+          @readers = @ram_data.map { |data| RAMReader.new(data) }
+          @allow_bank = @no_freeze = @reu_mapping = @write_once = false
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/rex_utility.rb

@@ -0,0 +1,31 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # 8K. Reading $DF00-$DFBF switches the ROM out, reading $DFC0-$DFFF
+      # switches it back in.
+      class RexUtility < Cartridge
+        def readable_io_pages
+          [0xdf]
+        end
+
+        def peek(addr)
+          select_mode((addr & 0xff) < 0xc0 ? :off : :rom8k) if addr >= 0xdf00
+          open_bus(addr)
+        end
+
+        def reset
+          select_mode(:rom8k)
+        end
+
+        private
+
+        def install_chips(chips)
+          @roml = banks_from(chips).first.compact.first || EMPTY_BANK
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/rgcd.rb

@@ -0,0 +1,50 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # RGCD: up to eight 8K banks. A write to I/O 1 selects the bank from the
+      # low bits, and bit 3 switches the ROM out until reset. The Hucky board
+      # (subtype 1) inverts the bank bits and decodes only as many as it has
+      # banks.
+      class RGCD < Cartridge
+        def initialize(crt)
+          @hucky = crt.subtype == 1
+          super
+        end
+
+        def poke(addr, value)
+          return if addr > 0xdeff || @disabled
+
+          select(value)
+          changed!
+        end
+
+        def reset
+          @disabled = false
+          self.mode = :rom8k
+          select(0)
+          changed!
+        end
+
+        private
+
+        def select(value)
+          value ^= 0x07 if @hucky
+          if value.anybits?(0x08)
+            @disabled = true
+            self.mode = :off
+          else
+            @roml = bank(@banks, value & @bank_mask)
+          end
+        end
+
+        def install_chips(chips)
+          @banks = banks_from(chips).first
+          @bank_mask = @hucky ? bank_mask(@banks) : 0x07
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/simons_basic.rb

@@ -0,0 +1,37 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # 16K. Reading I/O 1 switches ROMH out (8K mode), writing it switches
+      # ROMH back in.
+      class SimonsBasic < Cartridge
+        def readable_io_pages
+          [0xde]
+        end
+
+        def peek(addr)
+          select_mode(:rom8k) if addr < 0xdf00
+          open_bus(addr)
+        end
+
+        def poke(addr, _value)
+          select_mode(:rom16k) if addr < 0xdf00
+        end
+
+        def reset
+          select_mode(:rom16k)
+        end
+
+        private
+
+        def install_chips(chips)
+          roml, romh = banks_from(chips)
+          @roml = bank(roml, 0)
+          @romh = bank(romh, 0)
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/standard.rb

@@ -0,0 +1,17 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      class Standard < Cartridge
+        private
+
+        def install_chips(chips)
+          roml, romh = banks_from(chips)
+          @roml = roml.compact.first
+          @romh = romh.compact.first
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/super_games.rb

@@ -0,0 +1,40 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # Super Games: four 16K banks. A write to I/O 2 selects the bank from bits
+      # 0-1, switches the ROM out with bit 2, and with bit 3 locks the register
+      # until reset.
+      class SuperGames < Cartridge
+        def poke(addr, value)
+          return if addr < 0xdf00 || @locked
+
+          select(value)
+          changed!
+        end
+
+        def reset
+          select(0)
+          changed!
+        end
+
+        private
+
+        def windows = [*@roml_banks, *@romh_banks, EMPTY_BANK]
+
+        def select(value)
+          @roml = bank(@roml_banks, value & 0x03)
+          @romh = bank(@romh_banks, value & 0x03)
+          self.mode = value.anybits?(0x04) ? :off : :rom16k
+          @locked = value.anybits?(0x08)
+        end
+
+        def install_chips(chips)
+          @roml_banks, @romh_banks = banks_from(chips)
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/westermann.rb

@@ -0,0 +1,32 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # 16K. Reading I/O 2 switches ROMH out (8K mode) until reset.
+      class Westermann < Cartridge
+        def readable_io_pages
+          [0xdf]
+        end
+
+        def peek(addr)
+          select_mode(:rom8k) if addr >= 0xdf00
+          open_bus(addr)
+        end
+
+        def reset
+          select_mode(:rom16k)
+        end
+
+        private
+
+        def install_chips(chips)
+          roml, romh = banks_from(chips)
+          @roml = bank(roml, 0)
+          @romh = bank(romh, 0)
+          reset
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/cartridge/zaxxon.rb

@@ -0,0 +1,52 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Cartridge
+      # Zaxxon / Super Zaxxon: 16K mode with a 4K ROML mirrored across
+      # $8000-$9FFF and two 8K ROMH banks. A read through ROML selects the
+      # ROMH bank: $8000-$8FFF the first, $9000-$9FFF the second.
+      class Zaxxon < Cartridge
+        class Low
+          def initialize(rom, high)
+            @rom = rom
+            @high = high
+          end
+
+          def peek(addr)
+            @high.select(addr[12])
+            @rom.peek(addr)
+          end
+        end
+
+        class High
+          def initialize(banks)
+            @banks = banks
+            select(0)
+          end
+
+          def select(number)
+            @bank = @banks[number] || EMPTY_BANK
+          end
+
+          def peek(addr)
+            @bank.peek(addr)
+          end
+        end
+
+        def reset
+          @romh.select(0)
+        end
+
+        private
+
+        def install_chips(chips)
+          roml, romh = banks_from(chips)
+          @romh = High.new(romh)
+          @roml = Low.new(roml.first || EMPTY_BANK, @romh)
+          self.mode = :rom16k
+        end
+      end
+    end
+  end
+end