wasmtime 24.0.0 → 25.0.0
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- checksums.yaml +4 -4
- data/Cargo.lock +112 -111
- data/ext/Cargo.toml +5 -5
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/Cargo.toml +59 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/node.rs +806 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/path.rs +830 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/pool.rs +219 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/Cargo.toml +74 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/src/scalar.rs +626 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/Cargo.toml +222 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/build.rs +267 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/binemit/mod.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/cfg_printer.rs +83 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/data_value.rs +402 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/dbg.rs +28 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/egraph.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/incremental_cache.rs +256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/inst_predicates.rs +207 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/constant.rs +485 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/dfg.rs +1802 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/entities.rs +564 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/extfunc.rs +408 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/extname.rs +333 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/function.rs +500 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/globalvalue.rs +147 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/immediates.rs +1941 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/instructions.rs +1021 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/memtype.rs +190 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/progpoint.rs +75 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/trapcode.rs +148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/types.rs +624 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/user_stack_maps.rs +199 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/abi.rs +1520 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/args.rs +711 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/emit.rs +3567 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/emit_tests.rs +7972 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/imms.rs +1244 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/mod.rs +3051 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/regs.rs +269 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst.isle +4267 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/lower/isle.rs +811 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/lower.isle +2968 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/pcc.rs +570 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/settings.rs +9 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/mod.rs +471 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley32.rs +13 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley64.rs +13 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/abi.rs +798 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/args.rs +192 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/emit.rs +482 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/mod.rs +905 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/regs.rs +164 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst.isle +543 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower/isle/generated_code.rs +17 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower/isle.rs +195 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower.isle +178 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower.rs +36 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/mod.rs +281 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/abi.rs +993 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/args.rs +1957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/emit.rs +2685 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/emit_tests.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/encode.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/mod.rs +1865 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/unwind/systemv.rs +170 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/vector.rs +1150 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst.isle +3128 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst_vector.isle +1907 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/lower/isle.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/lower.isle +2940 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/abi.rs +1348 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/emit.rs +3470 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/emit_tests.rs +13370 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/mod.rs +3461 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/regs.rs +169 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/unwind/systemv.rs +212 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst.isle +5071 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/lower/isle.rs +1109 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/unwind/systemv.rs +276 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/abi.rs +1390 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/encoding/evex.rs +747 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/args.rs +2318 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit.rs +4400 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit_state.rs +55 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit_tests.rs +5146 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/mod.rs +2811 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/regs.rs +275 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/stack_switch.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/unwind/systemv.rs +198 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst.isle +5382 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower/isle.rs +1047 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower.isle +4919 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower.rs +338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/mod.rs +239 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/pcc.rs +1022 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isle_prelude.rs +1144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/abi.rs +2417 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/buffer.rs +2492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/isle.rs +890 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/lower.rs +1590 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/mod.rs +560 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/reg.rs +484 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/vcode.rs +1762 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/extends.isle +95 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/icmp.isle +258 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/selects.isle +88 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/prelude.isle +751 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/prelude_lower.isle +1081 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/print_errors.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/remove_constant_phis.rs +419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/result.rs +111 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/settings.rs +591 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/timing.rs +296 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/verifier/mod.rs +1941 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/write.rs +694 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/Cargo.toml +54 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/settings.rs +429 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/types.rs +420 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/typevar.rs +946 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/error.rs +48 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_inst.rs +1274 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_isle.rs +519 -0
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- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_types.rs +70 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/arm64.rs +59 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/mod.rs +81 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/pulley.rs +14 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/riscv64.rs +181 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/x86.rs +414 -0
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- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/srcgen.rs +464 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.112.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-control-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.112.0/Cargo.toml +43 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/Cargo.toml +75 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/lib.rs +381 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/packed_option.rs +173 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/sparse.rs +367 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/frontend.rs +1963 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/ssa.rs +1325 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/switch.rs +676 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/Cargo.toml +69 -0
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- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/compile.rs +65 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/error.rs +318 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/files.rs +133 -0
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/*
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* Released under the terms of the Apache 2.0 license with LLVM
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* exception. See `LICENSE` for details.
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*/
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use crate::{
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domtree, postorder, Allocation, Block, Function, Inst, InstRange, MachineEnv, Operand,
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OperandConstraint, OperandKind, OperandPos, PReg, PRegSet, RegClass, VReg,
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};
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Op,
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Ret,
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Branch,
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}
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InstData {
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InstData {
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set
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self.num_vregs
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fn spillslot_size(&self, regclass: RegClass) -> usize {
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struct FuncBuilder {
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FuncBuilder {
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},
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}
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pub fn add_block(&mut self) -> Block {
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self.f
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.blocks
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.push(InstRange::forward(Inst::new(0), Inst::new(0)));
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self.f.block_succs.push(vec![]);
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self.f.block_params_in.push(vec![]);
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self.f.block_params_out.push(vec![]);
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b
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pub fn add_inst(&mut self, block: Block, data: InstData) {
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self.insts_per_block[block.index()].push(data);
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pub fn add_edge(&mut self, from: Block, to: Block) {
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self.f.block_succs[from.index()].push(to);
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self.f.block_preds[to.index()].push(from);
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}
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pub fn set_block_params_in(&mut self, block: Block, params: &[VReg]) {
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self.f.block_params_in[block.index()] = params.iter().cloned().collect();
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}
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pub fn set_block_params_out(&mut self, block: Block, params: Vec<Vec<VReg>>) {
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}
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fn compute_doms(&mut self) {
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self.postorder = postorder::calculate(self.f.blocks.len(), Block::new(0), |block| {
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&self.f.block_succs[block.index()][..]
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});
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self.idom = domtree::calculate(
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self.f.blocks.len(),
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|block| &self.f.block_preds[block.index()][..],
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&self.postorder[..],
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Block::new(0),
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);
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}
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fn finalize(mut self) -> Func {
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for (blocknum, blockrange) in self.f.blocks.iter_mut().enumerate() {
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for inst in &self.insts_per_block[blocknum] {
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}
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let end_inst = self.f.insts.len();
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*blockrange = InstRange::forward(Inst::new(begin_inst), Inst::new(end_inst));
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self.f
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}
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}
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impl Arbitrary<'_> for RegClass {
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fn arbitrary(u: &mut Unstructured) -> ArbitraryResult<Self> {
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Ok(*u.choose(&[RegClass::Int, RegClass::Float, RegClass::Vector])?)
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}
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}
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impl Arbitrary<'_> for OperandConstraint {
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fn arbitrary(u: &mut Unstructured) -> ArbitraryResult<Self> {
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Ok(*u.choose(&[OperandConstraint::Any, OperandConstraint::Reg])?)
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}
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}
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238
|
-
|
239
|
-
fn choose_dominating_block(
|
240
|
-
idom: &[Block],
|
241
|
-
mut block: Block,
|
242
|
-
allow_self: bool,
|
243
|
-
u: &mut Unstructured,
|
244
|
-
) -> ArbitraryResult<Block> {
|
245
|
-
debug_assert!(block.is_valid());
|
246
|
-
let orig_block = block;
|
247
|
-
loop {
|
248
|
-
if (allow_self || block != orig_block) && bool::arbitrary(u)? {
|
249
|
-
break;
|
250
|
-
}
|
251
|
-
if idom[block.index()].is_invalid() {
|
252
|
-
break;
|
253
|
-
}
|
254
|
-
block = idom[block.index()];
|
255
|
-
}
|
256
|
-
let block = if block != orig_block || allow_self {
|
257
|
-
block
|
258
|
-
} else {
|
259
|
-
Block::invalid()
|
260
|
-
};
|
261
|
-
Ok(block)
|
262
|
-
}
|
263
|
-
|
264
|
-
#[derive(Clone, Copy, Debug)]
|
265
|
-
pub struct Options {
|
266
|
-
pub reused_inputs: bool,
|
267
|
-
pub fixed_regs: bool,
|
268
|
-
pub fixed_nonallocatable: bool,
|
269
|
-
pub clobbers: bool,
|
270
|
-
pub reftypes: bool,
|
271
|
-
}
|
272
|
-
|
273
|
-
impl core::default::Default for Options {
|
274
|
-
fn default() -> Self {
|
275
|
-
Options {
|
276
|
-
reused_inputs: false,
|
277
|
-
fixed_regs: false,
|
278
|
-
fixed_nonallocatable: false,
|
279
|
-
clobbers: false,
|
280
|
-
reftypes: false,
|
281
|
-
}
|
282
|
-
}
|
283
|
-
}
|
284
|
-
|
285
|
-
impl Arbitrary<'_> for Func {
|
286
|
-
fn arbitrary(u: &mut Unstructured) -> ArbitraryResult<Func> {
|
287
|
-
Func::arbitrary_with_options(u, &Options::default())
|
288
|
-
}
|
289
|
-
}
|
290
|
-
|
291
|
-
impl Func {
|
292
|
-
pub fn arbitrary_with_options(u: &mut Unstructured, opts: &Options) -> ArbitraryResult<Func> {
|
293
|
-
// General strategy:
|
294
|
-
// 1. Create an arbitrary CFG.
|
295
|
-
// 2. Create a list of vregs to define in each block.
|
296
|
-
// 3. Define some of those vregs in each block as blockparams.f.
|
297
|
-
// 4. Populate blocks with ops that define the rest of the vregs.
|
298
|
-
// - For each use, choose an available vreg: either one
|
299
|
-
// already defined (via blockparam or inst) in this block,
|
300
|
-
// or one defined in a dominating block.
|
301
|
-
|
302
|
-
let mut builder = FuncBuilder::new();
|
303
|
-
for _ in 0..u.int_in_range(1..=100)? {
|
304
|
-
builder.add_block();
|
305
|
-
}
|
306
|
-
let num_blocks = builder.f.blocks.len();
|
307
|
-
|
308
|
-
// Generate a CFG. Create a "spine" of either single blocks,
|
309
|
-
// with links to the next; or fork patterns, with the left
|
310
|
-
// fork linking to the next and the right fork in `out_blocks`
|
311
|
-
// to be connected below. This creates an arbitrary CFG with
|
312
|
-
// split critical edges, which is a property that we require
|
313
|
-
// for the regalloc.
|
314
|
-
let mut from = 0;
|
315
|
-
let mut out_blocks = vec![];
|
316
|
-
let mut in_blocks = vec![];
|
317
|
-
while from < num_blocks {
|
318
|
-
in_blocks.push(from);
|
319
|
-
if num_blocks > 3 && from < num_blocks - 3 && bool::arbitrary(u)? {
|
320
|
-
// To avoid critical edges, we use from+1 as an edge
|
321
|
-
// block, and advance `from` an extra block; `from+2`
|
322
|
-
// will be the next normal iteration.
|
323
|
-
builder.add_edge(Block::new(from), Block::new(from + 1));
|
324
|
-
builder.add_edge(Block::new(from), Block::new(from + 2));
|
325
|
-
builder.add_edge(Block::new(from + 2), Block::new(from + 3));
|
326
|
-
out_blocks.push(from + 1);
|
327
|
-
from += 2;
|
328
|
-
} else if from < num_blocks - 1 {
|
329
|
-
builder.add_edge(Block::new(from), Block::new(from + 1));
|
330
|
-
}
|
331
|
-
from += 1;
|
332
|
-
}
|
333
|
-
for pred in out_blocks {
|
334
|
-
let succ = *u.choose(&in_blocks[..])?;
|
335
|
-
builder.add_edge(Block::new(pred), Block::new(succ));
|
336
|
-
}
|
337
|
-
|
338
|
-
builder.compute_doms();
|
339
|
-
|
340
|
-
for block in 0..num_blocks {
|
341
|
-
builder.f.block_preds[block].clear();
|
342
|
-
}
|
343
|
-
for block in 0..num_blocks {
|
344
|
-
for &succ in &builder.f.block_succs[block] {
|
345
|
-
builder.f.block_preds[succ.index()].push(Block::new(block));
|
346
|
-
}
|
347
|
-
}
|
348
|
-
|
349
|
-
builder.compute_doms();
|
350
|
-
|
351
|
-
let mut vregs_by_block = vec![];
|
352
|
-
let mut vregs_by_block_to_be_defined = vec![];
|
353
|
-
let mut block_params = vec![vec![]; num_blocks];
|
354
|
-
for block in 0..num_blocks {
|
355
|
-
let mut vregs = vec![];
|
356
|
-
for _ in 0..u.int_in_range(5..=15)? {
|
357
|
-
let vreg = VReg::new(builder.f.num_vregs, RegClass::arbitrary(u)?);
|
358
|
-
builder.f.num_vregs += 1;
|
359
|
-
vregs.push(vreg);
|
360
|
-
if opts.reftypes && bool::arbitrary(u)? {
|
361
|
-
builder.f.reftype_vregs.push(vreg);
|
362
|
-
}
|
363
|
-
if bool::arbitrary(u)? {
|
364
|
-
let assumed_end_inst = 10 * num_blocks;
|
365
|
-
let mut start = u.int_in_range::<usize>(0..=assumed_end_inst)?;
|
366
|
-
for _ in 0..10 {
|
367
|
-
if start >= assumed_end_inst {
|
368
|
-
break;
|
369
|
-
}
|
370
|
-
let end = u.int_in_range::<usize>(start..=assumed_end_inst)?;
|
371
|
-
let label = u.int_in_range::<u32>(0..=100)?;
|
372
|
-
builder.f.debug_value_labels.push((
|
373
|
-
vreg,
|
374
|
-
Inst::new(start),
|
375
|
-
Inst::new(end),
|
376
|
-
label,
|
377
|
-
));
|
378
|
-
start = end;
|
379
|
-
}
|
380
|
-
}
|
381
|
-
}
|
382
|
-
vregs_by_block.push(vregs.clone());
|
383
|
-
let mut vregs_to_be_defined = vec![];
|
384
|
-
let mut max_block_params = u.int_in_range(0..=core::cmp::min(3, vregs.len() / 3))?;
|
385
|
-
for &vreg in &vregs {
|
386
|
-
if block > 0 && bool::arbitrary(u)? && max_block_params > 0 {
|
387
|
-
block_params[block].push(vreg);
|
388
|
-
max_block_params -= 1;
|
389
|
-
} else {
|
390
|
-
vregs_to_be_defined.push(vreg);
|
391
|
-
}
|
392
|
-
}
|
393
|
-
vregs_to_be_defined.reverse();
|
394
|
-
vregs_by_block_to_be_defined.push(vregs_to_be_defined);
|
395
|
-
builder.set_block_params_in(Block::new(block), &block_params[block][..]);
|
396
|
-
}
|
397
|
-
|
398
|
-
for block in 0..num_blocks {
|
399
|
-
let mut avail = block_params[block].clone();
|
400
|
-
let mut remaining_nonlocal_uses = u.int_in_range(0..=3)?;
|
401
|
-
while let Some(vreg) = vregs_by_block_to_be_defined[block].pop() {
|
402
|
-
let def_constraint = OperandConstraint::arbitrary(u)?;
|
403
|
-
let def_pos = if bool::arbitrary(u)? {
|
404
|
-
OperandPos::Early
|
405
|
-
} else {
|
406
|
-
OperandPos::Late
|
407
|
-
};
|
408
|
-
let mut operands = vec![Operand::new(
|
409
|
-
vreg,
|
410
|
-
def_constraint,
|
411
|
-
OperandKind::Def,
|
412
|
-
def_pos,
|
413
|
-
)];
|
414
|
-
let mut allocations = vec![Allocation::none()];
|
415
|
-
for _ in 0..u.int_in_range(0..=3)? {
|
416
|
-
let vreg = if avail.len() > 0
|
417
|
-
&& (remaining_nonlocal_uses == 0 || bool::arbitrary(u)?)
|
418
|
-
{
|
419
|
-
*u.choose(&avail[..])?
|
420
|
-
} else {
|
421
|
-
let def_block = choose_dominating_block(
|
422
|
-
&builder.idom[..],
|
423
|
-
Block::new(block),
|
424
|
-
/* allow_self = */ false,
|
425
|
-
u,
|
426
|
-
)?;
|
427
|
-
if !def_block.is_valid() {
|
428
|
-
// No vregs already defined, and no pred blocks that dominate us
|
429
|
-
// (perhaps we are the entry block): just stop generating inputs.
|
430
|
-
break;
|
431
|
-
}
|
432
|
-
remaining_nonlocal_uses -= 1;
|
433
|
-
*u.choose(&vregs_by_block[def_block.index()])?
|
434
|
-
};
|
435
|
-
let use_constraint = OperandConstraint::arbitrary(u)?;
|
436
|
-
operands.push(Operand::new(
|
437
|
-
vreg,
|
438
|
-
use_constraint,
|
439
|
-
OperandKind::Use,
|
440
|
-
OperandPos::Early,
|
441
|
-
));
|
442
|
-
allocations.push(Allocation::none());
|
443
|
-
}
|
444
|
-
let mut clobbers: Vec<PReg> = vec![];
|
445
|
-
if operands.len() > 1 && opts.reused_inputs && bool::arbitrary(u)? {
|
446
|
-
// Make the def a reused input.
|
447
|
-
let op = operands[0];
|
448
|
-
debug_assert_eq!(op.kind(), OperandKind::Def);
|
449
|
-
let reused = u.int_in_range(1..=(operands.len() - 1))?;
|
450
|
-
if op.class() == operands[reused].class() {
|
451
|
-
operands[0] = Operand::new(
|
452
|
-
op.vreg(),
|
453
|
-
OperandConstraint::Reuse(reused),
|
454
|
-
op.kind(),
|
455
|
-
OperandPos::Late,
|
456
|
-
);
|
457
|
-
// Make sure reused input is a Reg.
|
458
|
-
let op = operands[reused];
|
459
|
-
operands[reused] = Operand::new(
|
460
|
-
op.vreg(),
|
461
|
-
OperandConstraint::Reg,
|
462
|
-
op.kind(),
|
463
|
-
OperandPos::Early,
|
464
|
-
);
|
465
|
-
}
|
466
|
-
} else if opts.fixed_regs && bool::arbitrary(u)? {
|
467
|
-
let mut fixed_early = vec![];
|
468
|
-
let mut fixed_late = vec![];
|
469
|
-
for _ in 0..u.int_in_range(0..=operands.len() - 1)? {
|
470
|
-
// Pick an operand and make it a fixed reg.
|
471
|
-
let i = u.int_in_range(0..=(operands.len() - 1))?;
|
472
|
-
let op = operands[i];
|
473
|
-
let fixed_reg = PReg::new(u.int_in_range(0..=62)?, op.class());
|
474
|
-
let fixed_list = match op.pos() {
|
475
|
-
OperandPos::Early => &mut fixed_early,
|
476
|
-
OperandPos::Late => &mut fixed_late,
|
477
|
-
};
|
478
|
-
if fixed_list.contains(&fixed_reg) {
|
479
|
-
break;
|
480
|
-
}
|
481
|
-
if op.kind() != OperandKind::Def && op.pos() == OperandPos::Late {
|
482
|
-
// Late-uses/mods with fixed constraints
|
483
|
-
// can't be allowed if we're allowing
|
484
|
-
// different constraints at Early and
|
485
|
-
// Late, because we can't move something
|
486
|
-
// into a location between Early and
|
487
|
-
// Late. Differing constraints only make
|
488
|
-
// sense if the instruction itself
|
489
|
-
// produces the newly-constrained values.
|
490
|
-
break;
|
491
|
-
}
|
492
|
-
if op.kind() != OperandKind::Use && op.pos() == OperandPos::Early {
|
493
|
-
// Likewise, we can *only* allow uses for
|
494
|
-
// fixed constraints at Early.
|
495
|
-
break;
|
496
|
-
}
|
497
|
-
fixed_list.push(fixed_reg);
|
498
|
-
operands[i] = Operand::new(
|
499
|
-
op.vreg(),
|
500
|
-
OperandConstraint::FixedReg(fixed_reg),
|
501
|
-
op.kind(),
|
502
|
-
op.pos(),
|
503
|
-
);
|
504
|
-
}
|
505
|
-
} else if opts.clobbers && bool::arbitrary(u)? {
|
506
|
-
for _ in 0..u.int_in_range(0..=5)? {
|
507
|
-
let reg = u.int_in_range(0..=30)?;
|
508
|
-
if clobbers.iter().any(|r| r.hw_enc() == reg) {
|
509
|
-
break;
|
510
|
-
}
|
511
|
-
clobbers.push(PReg::new(reg, RegClass::arbitrary(u)?));
|
512
|
-
}
|
513
|
-
} else if opts.fixed_nonallocatable && bool::arbitrary(u)? {
|
514
|
-
operands.push(Operand::fixed_nonallocatable(PReg::new(
|
515
|
-
63,
|
516
|
-
RegClass::arbitrary(u)?,
|
517
|
-
)));
|
518
|
-
}
|
519
|
-
|
520
|
-
let is_safepoint = opts.reftypes
|
521
|
-
&& operands
|
522
|
-
.iter()
|
523
|
-
.all(|op| !builder.f.reftype_vregs.contains(&op.vreg()))
|
524
|
-
&& bool::arbitrary(u)?;
|
525
|
-
|
526
|
-
builder.add_inst(
|
527
|
-
Block::new(block),
|
528
|
-
InstData {
|
529
|
-
op: InstOpcode::Op,
|
530
|
-
operands,
|
531
|
-
clobbers,
|
532
|
-
is_safepoint,
|
533
|
-
},
|
534
|
-
);
|
535
|
-
avail.push(vreg);
|
536
|
-
}
|
537
|
-
|
538
|
-
// Define the branch with blockparam args that must end
|
539
|
-
// the block.
|
540
|
-
if builder.f.block_succs[block].len() > 0 {
|
541
|
-
let mut params = vec![];
|
542
|
-
for &succ in &builder.f.block_succs[block] {
|
543
|
-
let mut args = vec![];
|
544
|
-
for i in 0..builder.f.block_params_in[succ.index()].len() {
|
545
|
-
let dom_block = choose_dominating_block(
|
546
|
-
&builder.idom[..],
|
547
|
-
Block::new(block),
|
548
|
-
false,
|
549
|
-
u,
|
550
|
-
)?;
|
551
|
-
|
552
|
-
// Look for a vreg with a suitable class. If no
|
553
|
-
// suitable vreg is available then we error out, which
|
554
|
-
// causes the fuzzer to skip this function.
|
555
|
-
let vregs = if dom_block.is_valid() && bool::arbitrary(u)? {
|
556
|
-
&vregs_by_block[dom_block.index()][..]
|
557
|
-
} else {
|
558
|
-
&avail[..]
|
559
|
-
};
|
560
|
-
let suitable_vregs: Vec<_> = vregs
|
561
|
-
.iter()
|
562
|
-
.filter(|vreg| {
|
563
|
-
vreg.class() == builder.f.block_params_in[succ.index()][i].class()
|
564
|
-
})
|
565
|
-
.copied()
|
566
|
-
.collect();
|
567
|
-
let vreg = u.choose(&suitable_vregs)?;
|
568
|
-
args.push(*vreg);
|
569
|
-
}
|
570
|
-
params.push(args);
|
571
|
-
}
|
572
|
-
builder.set_block_params_out(Block::new(block), params);
|
573
|
-
builder.add_inst(Block::new(block), InstData::branch());
|
574
|
-
} else {
|
575
|
-
builder.add_inst(Block::new(block), InstData::ret());
|
576
|
-
}
|
577
|
-
}
|
578
|
-
|
579
|
-
builder.f.debug_value_labels.sort_unstable();
|
580
|
-
|
581
|
-
Ok(builder.finalize())
|
582
|
-
}
|
583
|
-
}
|
584
|
-
|
585
|
-
impl core::fmt::Debug for Func {
|
586
|
-
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
587
|
-
write!(f, "{{\n")?;
|
588
|
-
for vreg in self.reftype_vregs() {
|
589
|
-
write!(f, " REF: {}\n", vreg)?;
|
590
|
-
}
|
591
|
-
for (i, blockrange) in self.blocks.iter().enumerate() {
|
592
|
-
let succs = self.block_succs[i]
|
593
|
-
.iter()
|
594
|
-
.map(|b| b.index())
|
595
|
-
.collect::<Vec<_>>();
|
596
|
-
let preds = self.block_preds[i]
|
597
|
-
.iter()
|
598
|
-
.map(|b| b.index())
|
599
|
-
.collect::<Vec<_>>();
|
600
|
-
let params_in = self.block_params_in[i]
|
601
|
-
.iter()
|
602
|
-
.map(|v| format!("v{}", v.vreg()))
|
603
|
-
.collect::<Vec<_>>()
|
604
|
-
.join(", ");
|
605
|
-
let params_out = self.block_params_out[i]
|
606
|
-
.iter()
|
607
|
-
.enumerate()
|
608
|
-
.map(|(succ_idx, vec)| {
|
609
|
-
let succ = self.block_succs[i][succ_idx];
|
610
|
-
let params = vec
|
611
|
-
.iter()
|
612
|
-
.map(|v| format!("v{}", v.vreg()))
|
613
|
-
.collect::<Vec<_>>()
|
614
|
-
.join(", ");
|
615
|
-
format!("block{}({})", succ.index(), params)
|
616
|
-
})
|
617
|
-
.collect::<Vec<_>>()
|
618
|
-
.join(", ");
|
619
|
-
write!(
|
620
|
-
f,
|
621
|
-
" block{}({}): # succs:{:?} preds:{:?}\n",
|
622
|
-
i, params_in, succs, preds
|
623
|
-
)?;
|
624
|
-
for inst in blockrange.iter() {
|
625
|
-
if self.requires_refs_on_stack(inst) {
|
626
|
-
write!(f, " -- SAFEPOINT --\n")?;
|
627
|
-
}
|
628
|
-
write!(
|
629
|
-
f,
|
630
|
-
" inst{}: {:?} ops:{:?} clobber:{:?}\n",
|
631
|
-
inst.index(),
|
632
|
-
self.insts[inst.index()].op,
|
633
|
-
self.insts[inst.index()].operands,
|
634
|
-
self.insts[inst.index()].clobbers
|
635
|
-
)?;
|
636
|
-
if let InstOpcode::Branch = self.insts[inst.index()].op {
|
637
|
-
write!(f, " params: {}\n", params_out)?;
|
638
|
-
}
|
639
|
-
}
|
640
|
-
}
|
641
|
-
write!(f, "}}\n")?;
|
642
|
-
Ok(())
|
643
|
-
}
|
644
|
-
}
|
645
|
-
|
646
|
-
pub fn machine_env() -> MachineEnv {
|
647
|
-
fn regs(r: core::ops::Range<usize>, c: RegClass) -> Vec<PReg> {
|
648
|
-
r.map(|i| PReg::new(i, c)).collect()
|
649
|
-
}
|
650
|
-
let preferred_regs_by_class: [Vec<PReg>; 3] = [
|
651
|
-
regs(0..24, RegClass::Int),
|
652
|
-
regs(0..24, RegClass::Float),
|
653
|
-
regs(0..24, RegClass::Vector),
|
654
|
-
];
|
655
|
-
let non_preferred_regs_by_class: [Vec<PReg>; 3] = [
|
656
|
-
regs(24..32, RegClass::Int),
|
657
|
-
regs(24..32, RegClass::Float),
|
658
|
-
regs(24..32, RegClass::Vector),
|
659
|
-
];
|
660
|
-
let scratch_by_class: [Option<PReg>; 3] = [None, None, None];
|
661
|
-
let fixed_stack_slots = (32..63)
|
662
|
-
.flat_map(|i| {
|
663
|
-
[
|
664
|
-
PReg::new(i, RegClass::Int),
|
665
|
-
PReg::new(i, RegClass::Float),
|
666
|
-
PReg::new(i, RegClass::Vector),
|
667
|
-
]
|
668
|
-
})
|
669
|
-
.collect();
|
670
|
-
// Register 63 is reserved for use as a fixed non-allocatable register.
|
671
|
-
MachineEnv {
|
672
|
-
preferred_regs_by_class,
|
673
|
-
non_preferred_regs_by_class,
|
674
|
-
scratch_by_class,
|
675
|
-
fixed_stack_slots,
|
676
|
-
}
|
677
|
-
}
|
@@ -1,28 +0,0 @@
|
|
1
|
-
/*
|
2
|
-
* Released under the terms of the Apache 2.0 license with LLVM
|
3
|
-
* exception. See `LICENSE` for details.
|
4
|
-
*/
|
5
|
-
|
6
|
-
//! Utilities for fuzzing.
|
7
|
-
|
8
|
-
pub mod func;
|
9
|
-
|
10
|
-
// Re-exports for fuzz targets.
|
11
|
-
|
12
|
-
pub mod domtree {
|
13
|
-
pub use crate::domtree::*;
|
14
|
-
}
|
15
|
-
pub mod postorder {
|
16
|
-
pub use crate::postorder::*;
|
17
|
-
}
|
18
|
-
pub mod cfg {
|
19
|
-
pub use crate::cfg::*;
|
20
|
-
}
|
21
|
-
pub mod ion {
|
22
|
-
pub use crate::ion::*;
|
23
|
-
}
|
24
|
-
pub mod checker {
|
25
|
-
pub use crate::checker::*;
|
26
|
-
}
|
27
|
-
|
28
|
-
pub use libfuzzer_sys::{arbitrary, fuzz_target};
|