wasmtime 24.0.0 → 25.0.0
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- checksums.yaml +4 -4
- data/Cargo.lock +112 -111
- data/ext/Cargo.toml +5 -5
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/Cargo.toml +59 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/node.rs +806 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/path.rs +830 -0
- data/ext/cargo-vendor/cranelift-bforest-0.112.0/src/pool.rs +219 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/Cargo.toml +74 -0
- data/ext/cargo-vendor/cranelift-bitset-0.112.0/src/scalar.rs +626 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/Cargo.toml +222 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/build.rs +267 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/binemit/mod.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/cfg_printer.rs +83 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/data_value.rs +402 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/dbg.rs +28 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/egraph.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/incremental_cache.rs +256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/inst_predicates.rs +207 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/constant.rs +485 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/dfg.rs +1802 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/entities.rs +564 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/extfunc.rs +408 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/extname.rs +333 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/function.rs +500 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/globalvalue.rs +147 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/immediates.rs +1941 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/instructions.rs +1021 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/memtype.rs +190 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/progpoint.rs +75 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/trapcode.rs +148 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/types.rs +624 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/ir/user_stack_maps.rs +199 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/abi.rs +1520 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/args.rs +711 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/emit.rs +3567 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/emit_tests.rs +7972 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/imms.rs +1244 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/mod.rs +3051 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/regs.rs +269 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/inst.isle +4267 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/lower/isle.rs +811 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/lower.isle +2968 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/pcc.rs +570 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/aarch64/settings.rs +9 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/mod.rs +471 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley32.rs +13 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley64.rs +13 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/abi.rs +798 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/args.rs +192 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/emit.rs +482 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/mod.rs +905 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst/regs.rs +164 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/inst.isle +543 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower/isle/generated_code.rs +17 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower/isle.rs +195 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower.isle +178 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/lower.rs +36 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/pulley_shared/mod.rs +281 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/abi.rs +993 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/args.rs +1957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/emit.rs +2685 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/emit_tests.rs +2277 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/encode.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/mod.rs +1865 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/unwind/systemv.rs +170 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst/vector.rs +1150 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst.isle +3128 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/inst_vector.isle +1907 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/lower/isle.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/riscv64/lower.isle +2940 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/abi.rs +1348 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/emit.rs +3470 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/emit_tests.rs +13370 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/mod.rs +3461 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/regs.rs +169 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst/unwind/systemv.rs +212 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/inst.isle +5071 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/s390x/lower/isle.rs +1109 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/unwind/systemv.rs +276 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/abi.rs +1390 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/encoding/evex.rs +747 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/args.rs +2318 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit.rs +4400 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit_state.rs +55 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/emit_tests.rs +5146 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/mod.rs +2811 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/regs.rs +275 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/stack_switch.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst/unwind/systemv.rs +198 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/inst.isle +5382 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower/isle.rs +1047 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower.isle +4919 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/lower.rs +338 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/mod.rs +239 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isa/x64/pcc.rs +1022 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/isle_prelude.rs +1144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/abi.rs +2417 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/buffer.rs +2492 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/isle.rs +890 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/lower.rs +1590 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/mod.rs +560 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/reg.rs +484 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/machinst/vcode.rs +1762 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/extends.isle +95 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/icmp.isle +258 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/opts/selects.isle +88 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/prelude.isle +751 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/prelude_lower.isle +1081 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/print_errors.rs +223 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/remove_constant_phis.rs +419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/result.rs +111 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/settings.rs +591 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/timing.rs +296 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/verifier/mod.rs +1941 -0
- data/ext/cargo-vendor/cranelift-codegen-0.112.0/src/write.rs +694 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/Cargo.toml +54 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/settings.rs +429 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/types.rs +420 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/cdsl/typevar.rs +946 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/error.rs +48 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_inst.rs +1274 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_isle.rs +519 -0
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- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/gen_types.rs +70 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/arm64.rs +59 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/mod.rs +81 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/pulley.rs +14 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/riscv64.rs +181 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/isa/x86.rs +414 -0
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- data/ext/cargo-vendor/cranelift-codegen-meta-0.112.0/src/srcgen.rs +464 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.112.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-control-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.112.0/Cargo.toml +43 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/Cargo.toml +75 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/lib.rs +381 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/packed_option.rs +173 -0
- data/ext/cargo-vendor/cranelift-entity-0.112.0/src/sparse.rs +367 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/.cargo-checksum.json +1 -0
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- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/frontend.rs +1963 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/ssa.rs +1325 -0
- data/ext/cargo-vendor/cranelift-frontend-0.112.0/src/switch.rs +676 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/Cargo.toml +69 -0
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- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/compile.rs +65 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/error.rs +318 -0
- data/ext/cargo-vendor/cranelift-isle-0.112.0/src/files.rs +133 -0
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@@ -1,643 +0,0 @@
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//! Common types for the Cranelift code generator.
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use core::fmt::{self, Debug, Display, Formatter};
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use cranelift_codegen_shared::constants;
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#[cfg(feature = "enable-serde")]
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use serde_derive::{Deserialize, Serialize};
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use target_lexicon::{PointerWidth, Triple};
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/// The type of an SSA value.
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///
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/// The `INVALID` type isn't a real type, and is used as a placeholder in the IR where a type
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/// field is present put no type is needed, such as the controlling type variable for a
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/// non-polymorphic instruction.
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///
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/// Basic integer types: `I8`, `I16`, `I32`, `I64`, and `I128`. These types are sign-agnostic.
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///
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/// Basic floating point types: `F16`, `F32`, `F64`, and `F128`. IEEE half, single, double, and quadruple precision.
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///
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/// SIMD vector types have power-of-two lanes, up to 256. Lanes can be any int/float type.
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///
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/// Note that this is encoded in a `u16` currently for extensibility,
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/// but allows only 14 bits to be used due to some bitpacking tricks
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/// in the CLIF data structures.
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#[derive(Copy, Clone, PartialEq, Eq, Hash)]
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#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
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pub struct Type(u16);
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/// Not a valid type. Can't be loaded or stored. Can't be part of a SIMD vector.
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pub const INVALID: Type = Type(0);
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// Include code generated by `cranelift-codegen/meta/gen_types.rs`. This file contains constant
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// definitions for all the scalar types as well as common vector types for 64, 128, 256, and
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// 512-bit SIMD vectors.
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include!(concat!(env!("OUT_DIR"), "/types.rs"));
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impl Type {
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/// Get the lane type of this SIMD vector type.
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///
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/// A lane type is the same as a SIMD vector type with one lane, so it returns itself.
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pub fn lane_type(self) -> Self {
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if self.0 < constants::VECTOR_BASE {
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self
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} else {
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Self(constants::LANE_BASE | (self.0 & 0x0f))
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}
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}
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/// The type transformation that returns the lane type of a type variable; it is just a
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/// renaming of lane_type() to be used in context where we think in terms of type variable
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/// transformations.
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pub fn lane_of(self) -> Self {
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self.lane_type()
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}
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/// Get log_2 of the number of bits in a lane.
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pub fn log2_lane_bits(self) -> u32 {
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match self.lane_type() {
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I8 => 3,
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I16 | F16 => 4,
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I32 | F32 | R32 => 5,
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I64 | F64 | R64 => 6,
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I128 | F128 => 7,
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_ => 0,
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}
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}
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/// Get the number of bits in a lane.
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pub fn lane_bits(self) -> u32 {
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match self.lane_type() {
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I8 => 8,
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I16 | F16 => 16,
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I32 | F32 | R32 => 32,
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I64 | F64 | R64 => 64,
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I128 | F128 => 128,
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_ => 0,
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}
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}
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/// Get the (minimum, maximum) values represented by each lane in the type.
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/// Note that these are returned as unsigned 'bit patterns'.
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pub fn bounds(self, signed: bool) -> (u128, u128) {
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if signed {
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match self.lane_type() {
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I8 => (i8::MIN as u128, i8::MAX as u128),
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I16 => (i16::MIN as u128, i16::MAX as u128),
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I32 => (i32::MIN as u128, i32::MAX as u128),
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I64 => (i64::MIN as u128, i64::MAX as u128),
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I128 => (i128::MIN as u128, i128::MAX as u128),
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_ => unimplemented!(),
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}
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} else {
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match self.lane_type() {
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I8 => (u8::MIN as u128, u8::MAX as u128),
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I16 => (u16::MIN as u128, u16::MAX as u128),
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I32 => (u32::MIN as u128, u32::MAX as u128),
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I64 => (u64::MIN as u128, u64::MAX as u128),
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I128 => (u128::MIN, u128::MAX),
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_ => unimplemented!(),
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}
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}
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}
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/// Get an integer type with the requested number of bits.
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///
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/// For the same thing but in *bytes*, use [`Self::int_with_byte_size`].
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pub fn int(bits: u16) -> Option<Self> {
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match bits {
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8 => Some(I8),
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16 => Some(I16),
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32 => Some(I32),
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64 => Some(I64),
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128 => Some(I128),
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_ => None,
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}
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}
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/// Get an integer type with the requested number of bytes.
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///
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/// For the same thing but in *bits*, use [`Self::int`].
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pub fn int_with_byte_size(bytes: u16) -> Option<Self> {
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Self::int(bytes.checked_mul(8)?)
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}
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/// Get a type with the same number of lanes as `self`, but using `lane` as the lane type.
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fn replace_lanes(self, lane: Self) -> Self {
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debug_assert!(lane.is_lane() && !self.is_special());
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Self((lane.0 & 0x0f) | (self.0 & 0xf0))
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}
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/// Get a type with the same number of lanes as this type, but with the lanes replaced by
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/// booleans of the same size.
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///
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/// Lane types are treated as vectors with one lane, so they are converted to the multi-bit
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/// boolean types.
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pub fn as_truthy_pedantic(self) -> Self {
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// Replace the low 4 bits with the boolean version, preserve the high 4 bits.
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self.replace_lanes(match self.lane_type() {
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I8 => I8,
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I16 | F16 => I16,
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I32 | F32 => I32,
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I64 | F64 => I64,
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R32 | R64 => panic!("Reference types are not truthy"),
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I128 | F128 => I128,
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_ => I8,
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})
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}
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/// Get the type of a comparison result for the given type. For vectors this will be a vector
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/// with the same number of lanes and integer elements, and for scalar types this will be `i8`,
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/// which is the result type of comparisons.
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pub fn as_truthy(self) -> Self {
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if !self.is_vector() {
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I8
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} else {
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self.as_truthy_pedantic()
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}
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}
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/// Get a type with the same number of lanes as this type, but with the lanes replaced by
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/// integers of the same size.
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pub fn as_int(self) -> Self {
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self.replace_lanes(match self.lane_type() {
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I8 => I8,
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I16 | F16 => I16,
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I32 | F32 | R32 => I32,
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I64 | F64 | R64 => I64,
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I128 | F128 => I128,
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_ => unimplemented!(),
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})
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}
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/// Get a type with the same number of lanes as this type, but with lanes that are half the
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/// number of bits.
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pub fn half_width(self) -> Option<Self> {
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Some(self.replace_lanes(match self.lane_type() {
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I16 => I8,
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I32 => I16,
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I64 => I32,
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I128 => I64,
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F32 => F16,
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F64 => F32,
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F128 => F64,
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_ => return None,
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}))
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}
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/// Get a type with the same number of lanes as this type, but with lanes that are twice the
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/// number of bits.
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pub fn double_width(self) -> Option<Self> {
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Some(self.replace_lanes(match self.lane_type() {
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I8 => I16,
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I16 => I32,
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I32 => I64,
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I64 => I128,
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F16 => F32,
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F32 => F64,
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F64 => F128,
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_ => return None,
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}))
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}
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/// Is this the INVALID type?
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pub fn is_invalid(self) -> bool {
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self == INVALID
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}
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/// Is this a special type?
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pub fn is_special(self) -> bool {
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self.0 < constants::LANE_BASE
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}
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/// Is this a lane type?
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///
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/// This is a scalar type that can also appear as the lane type of a SIMD vector.
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pub fn is_lane(self) -> bool {
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constants::LANE_BASE <= self.0 && self.0 < constants::VECTOR_BASE
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}
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/// Is this a SIMD vector type?
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///
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/// A vector type has 2 or more lanes.
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pub fn is_vector(self) -> bool {
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self.0 >= constants::VECTOR_BASE && !self.is_dynamic_vector()
|
224
|
-
}
|
225
|
-
|
226
|
-
/// Is this a SIMD vector type with a runtime number of lanes?
|
227
|
-
pub fn is_dynamic_vector(self) -> bool {
|
228
|
-
self.0 >= constants::DYNAMIC_VECTOR_BASE
|
229
|
-
}
|
230
|
-
|
231
|
-
/// Is this a scalar integer type?
|
232
|
-
pub fn is_int(self) -> bool {
|
233
|
-
match self {
|
234
|
-
I8 | I16 | I32 | I64 | I128 => true,
|
235
|
-
_ => false,
|
236
|
-
}
|
237
|
-
}
|
238
|
-
|
239
|
-
/// Is this a scalar floating point type?
|
240
|
-
pub fn is_float(self) -> bool {
|
241
|
-
match self {
|
242
|
-
F16 | F32 | F64 | F128 => true,
|
243
|
-
_ => false,
|
244
|
-
}
|
245
|
-
}
|
246
|
-
|
247
|
-
/// Is this a ref type?
|
248
|
-
pub fn is_ref(self) -> bool {
|
249
|
-
match self {
|
250
|
-
R32 | R64 => true,
|
251
|
-
_ => false,
|
252
|
-
}
|
253
|
-
}
|
254
|
-
|
255
|
-
/// Get log_2 of the number of lanes in this SIMD vector type.
|
256
|
-
///
|
257
|
-
/// All SIMD types have a lane count that is a power of two and no larger than 256, so this
|
258
|
-
/// will be a number in the range 0-8.
|
259
|
-
///
|
260
|
-
/// A scalar type is the same as a SIMD vector type with one lane, so it returns 0.
|
261
|
-
pub fn log2_lane_count(self) -> u32 {
|
262
|
-
if self.is_dynamic_vector() {
|
263
|
-
0
|
264
|
-
} else {
|
265
|
-
(self.0.saturating_sub(constants::LANE_BASE) >> 4) as u32
|
266
|
-
}
|
267
|
-
}
|
268
|
-
|
269
|
-
/// Get log_2 of the number of lanes in this vector/dynamic type.
|
270
|
-
pub fn log2_min_lane_count(self) -> u32 {
|
271
|
-
if self.is_dynamic_vector() {
|
272
|
-
(self
|
273
|
-
.0
|
274
|
-
.saturating_sub(constants::VECTOR_BASE + constants::LANE_BASE)
|
275
|
-
>> 4) as u32
|
276
|
-
} else {
|
277
|
-
self.log2_lane_count()
|
278
|
-
}
|
279
|
-
}
|
280
|
-
|
281
|
-
/// Get the number of lanes in this SIMD vector type.
|
282
|
-
///
|
283
|
-
/// A scalar type is the same as a SIMD vector type with one lane, so it returns 1.
|
284
|
-
pub fn lane_count(self) -> u32 {
|
285
|
-
if self.is_dynamic_vector() {
|
286
|
-
0
|
287
|
-
} else {
|
288
|
-
1 << self.log2_lane_count()
|
289
|
-
}
|
290
|
-
}
|
291
|
-
|
292
|
-
/// Get the total number of bits used to represent this type.
|
293
|
-
pub fn bits(self) -> u32 {
|
294
|
-
if self.is_dynamic_vector() {
|
295
|
-
0
|
296
|
-
} else {
|
297
|
-
self.lane_bits() * self.lane_count()
|
298
|
-
}
|
299
|
-
}
|
300
|
-
|
301
|
-
/// Get the minimum of lanes in this SIMD vector type, this supports both fixed and
|
302
|
-
/// dynamic types.
|
303
|
-
pub fn min_lane_count(self) -> u32 {
|
304
|
-
if self.is_dynamic_vector() {
|
305
|
-
1 << self.log2_min_lane_count()
|
306
|
-
} else {
|
307
|
-
1 << self.log2_lane_count()
|
308
|
-
}
|
309
|
-
}
|
310
|
-
|
311
|
-
/// Get the minimum number of bits used to represent this type.
|
312
|
-
pub fn min_bits(self) -> u32 {
|
313
|
-
if self.is_dynamic_vector() {
|
314
|
-
self.lane_bits() * self.min_lane_count()
|
315
|
-
} else {
|
316
|
-
self.bits()
|
317
|
-
}
|
318
|
-
}
|
319
|
-
|
320
|
-
/// Get the number of bytes used to store this type in memory.
|
321
|
-
pub fn bytes(self) -> u32 {
|
322
|
-
(self.bits() + 7) / 8
|
323
|
-
}
|
324
|
-
|
325
|
-
/// Get a SIMD vector type with `n` times more lanes than this one.
|
326
|
-
///
|
327
|
-
/// If this is a scalar type, this produces a SIMD type with this as a lane type and `n` lanes.
|
328
|
-
///
|
329
|
-
/// If this is already a SIMD vector type, this produces a SIMD vector type with `n *
|
330
|
-
/// self.lane_count()` lanes.
|
331
|
-
pub fn by(self, n: u32) -> Option<Self> {
|
332
|
-
if self.is_dynamic_vector() {
|
333
|
-
return None;
|
334
|
-
}
|
335
|
-
if self.lane_bits() == 0 || !n.is_power_of_two() {
|
336
|
-
return None;
|
337
|
-
}
|
338
|
-
let log2_lanes: u32 = n.trailing_zeros();
|
339
|
-
let new_type = u32::from(self.0) + (log2_lanes << 4);
|
340
|
-
if new_type < constants::DYNAMIC_VECTOR_BASE as u32
|
341
|
-
&& (new_type as u16) < constants::DYNAMIC_VECTOR_BASE
|
342
|
-
{
|
343
|
-
Some(Self(new_type as u16))
|
344
|
-
} else {
|
345
|
-
None
|
346
|
-
}
|
347
|
-
}
|
348
|
-
|
349
|
-
/// Convert a fixed vector type to a dynamic one.
|
350
|
-
pub fn vector_to_dynamic(self) -> Option<Self> {
|
351
|
-
assert!(self.is_vector());
|
352
|
-
if self.bits() > 256 {
|
353
|
-
return None;
|
354
|
-
}
|
355
|
-
let new_ty = self.0 + constants::VECTOR_BASE;
|
356
|
-
let ty = Some(Self(new_ty));
|
357
|
-
assert!(ty.unwrap().is_dynamic_vector());
|
358
|
-
return ty;
|
359
|
-
}
|
360
|
-
|
361
|
-
/// Convert a dynamic vector type to a fixed one.
|
362
|
-
pub fn dynamic_to_vector(self) -> Option<Self> {
|
363
|
-
assert!(self.is_dynamic_vector());
|
364
|
-
Some(Self(self.0 - constants::VECTOR_BASE))
|
365
|
-
}
|
366
|
-
|
367
|
-
/// Split the lane width in half and double the number of lanes to maintain the same bit-width.
|
368
|
-
///
|
369
|
-
/// If this is a scalar type of `n` bits, it produces a SIMD vector type of `(n/2)x2`.
|
370
|
-
pub fn split_lanes(self) -> Option<Self> {
|
371
|
-
match self.half_width() {
|
372
|
-
Some(half_width) => half_width.by(2),
|
373
|
-
None => None,
|
374
|
-
}
|
375
|
-
}
|
376
|
-
|
377
|
-
/// Merge lanes to half the number of lanes and double the lane width to maintain the same
|
378
|
-
/// bit-width.
|
379
|
-
///
|
380
|
-
/// If this is a scalar type, it will return `None`.
|
381
|
-
pub fn merge_lanes(self) -> Option<Self> {
|
382
|
-
match self.double_width() {
|
383
|
-
Some(double_width) => {
|
384
|
-
if double_width.is_vector() && !double_width.is_dynamic_vector() {
|
385
|
-
Some(Self(double_width.0 - 0x10))
|
386
|
-
} else {
|
387
|
-
None
|
388
|
-
}
|
389
|
-
}
|
390
|
-
None => None,
|
391
|
-
}
|
392
|
-
}
|
393
|
-
|
394
|
-
/// Index of this type, for use with hash tables etc.
|
395
|
-
pub fn index(self) -> usize {
|
396
|
-
usize::from(self.0)
|
397
|
-
}
|
398
|
-
|
399
|
-
/// True iff:
|
400
|
-
///
|
401
|
-
/// 1. `self.lane_count() == other.lane_count()` and
|
402
|
-
/// 2. `self.lane_bits() >= other.lane_bits()`
|
403
|
-
pub fn wider_or_equal(self, other: Self) -> bool {
|
404
|
-
self.lane_count() == other.lane_count() && self.lane_bits() >= other.lane_bits()
|
405
|
-
}
|
406
|
-
|
407
|
-
/// Return the pointer type for the given target triple.
|
408
|
-
pub fn triple_pointer_type(triple: &Triple) -> Self {
|
409
|
-
match triple.pointer_width() {
|
410
|
-
Ok(PointerWidth::U16) => I16,
|
411
|
-
Ok(PointerWidth::U32) => I32,
|
412
|
-
Ok(PointerWidth::U64) => I64,
|
413
|
-
Err(()) => panic!("unable to determine architecture pointer width"),
|
414
|
-
}
|
415
|
-
}
|
416
|
-
|
417
|
-
/// Gets a bit-level representation of the type. Used only
|
418
|
-
/// internally for efficiently storing types.
|
419
|
-
pub(crate) fn repr(self) -> u16 {
|
420
|
-
self.0
|
421
|
-
}
|
422
|
-
|
423
|
-
/// Converts from a bit-level representation of the type back to a
|
424
|
-
/// `Type`.
|
425
|
-
pub(crate) fn from_repr(bits: u16) -> Type {
|
426
|
-
Type(bits)
|
427
|
-
}
|
428
|
-
}
|
429
|
-
|
430
|
-
impl Display for Type {
|
431
|
-
fn fmt(&self, f: &mut Formatter) -> fmt::Result {
|
432
|
-
if self.is_int() {
|
433
|
-
write!(f, "i{}", self.lane_bits())
|
434
|
-
} else if self.is_float() {
|
435
|
-
write!(f, "f{}", self.lane_bits())
|
436
|
-
} else if self.is_vector() {
|
437
|
-
write!(f, "{}x{}", self.lane_type(), self.lane_count())
|
438
|
-
} else if self.is_dynamic_vector() {
|
439
|
-
write!(f, "{:?}x{}xN", self.lane_type(), self.min_lane_count())
|
440
|
-
} else if self.is_ref() {
|
441
|
-
write!(f, "r{}", self.lane_bits())
|
442
|
-
} else {
|
443
|
-
match *self {
|
444
|
-
INVALID => panic!("INVALID encountered"),
|
445
|
-
_ => panic!("Unknown Type(0x{:x})", self.0),
|
446
|
-
}
|
447
|
-
}
|
448
|
-
}
|
449
|
-
}
|
450
|
-
|
451
|
-
impl Debug for Type {
|
452
|
-
fn fmt(&self, f: &mut Formatter) -> fmt::Result {
|
453
|
-
if self.is_int() {
|
454
|
-
write!(f, "types::I{}", self.lane_bits())
|
455
|
-
} else if self.is_float() {
|
456
|
-
write!(f, "types::F{}", self.lane_bits())
|
457
|
-
} else if self.is_vector() {
|
458
|
-
write!(f, "{:?}X{}", self.lane_type(), self.lane_count())
|
459
|
-
} else if self.is_dynamic_vector() {
|
460
|
-
write!(f, "{:?}X{}XN", self.lane_type(), self.min_lane_count())
|
461
|
-
} else if self.is_ref() {
|
462
|
-
write!(f, "types::R{}", self.lane_bits())
|
463
|
-
} else {
|
464
|
-
match *self {
|
465
|
-
INVALID => write!(f, "types::INVALID"),
|
466
|
-
_ => write!(f, "Type(0x{:x})", self.0),
|
467
|
-
}
|
468
|
-
}
|
469
|
-
}
|
470
|
-
}
|
471
|
-
|
472
|
-
impl Default for Type {
|
473
|
-
fn default() -> Self {
|
474
|
-
INVALID
|
475
|
-
}
|
476
|
-
}
|
477
|
-
|
478
|
-
#[cfg(test)]
|
479
|
-
mod tests {
|
480
|
-
use super::*;
|
481
|
-
use alloc::string::ToString;
|
482
|
-
|
483
|
-
#[test]
|
484
|
-
fn basic_scalars() {
|
485
|
-
assert_eq!(INVALID, INVALID.lane_type());
|
486
|
-
assert_eq!(0, INVALID.bits());
|
487
|
-
assert_eq!(I8, I8.lane_type());
|
488
|
-
assert_eq!(I16, I16.lane_type());
|
489
|
-
assert_eq!(I32, I32.lane_type());
|
490
|
-
assert_eq!(I64, I64.lane_type());
|
491
|
-
assert_eq!(I128, I128.lane_type());
|
492
|
-
assert_eq!(F32, F32.lane_type());
|
493
|
-
assert_eq!(F16, F16.lane_type());
|
494
|
-
assert_eq!(F64, F64.lane_type());
|
495
|
-
assert_eq!(F128, F128.lane_type());
|
496
|
-
assert_eq!(I32, I32X4.lane_type());
|
497
|
-
assert_eq!(F64, F64X2.lane_type());
|
498
|
-
assert_eq!(R32, R32.lane_type());
|
499
|
-
assert_eq!(R64, R64.lane_type());
|
500
|
-
|
501
|
-
assert_eq!(INVALID.lane_bits(), 0);
|
502
|
-
assert_eq!(I8.lane_bits(), 8);
|
503
|
-
assert_eq!(I16.lane_bits(), 16);
|
504
|
-
assert_eq!(I32.lane_bits(), 32);
|
505
|
-
assert_eq!(I64.lane_bits(), 64);
|
506
|
-
assert_eq!(I128.lane_bits(), 128);
|
507
|
-
assert_eq!(F16.lane_bits(), 16);
|
508
|
-
assert_eq!(F32.lane_bits(), 32);
|
509
|
-
assert_eq!(F64.lane_bits(), 64);
|
510
|
-
assert_eq!(F128.lane_bits(), 128);
|
511
|
-
assert_eq!(R32.lane_bits(), 32);
|
512
|
-
assert_eq!(R64.lane_bits(), 64);
|
513
|
-
}
|
514
|
-
|
515
|
-
#[test]
|
516
|
-
fn typevar_functions() {
|
517
|
-
assert_eq!(INVALID.half_width(), None);
|
518
|
-
assert_eq!(INVALID.half_width(), None);
|
519
|
-
assert_eq!(I8.half_width(), None);
|
520
|
-
assert_eq!(I16.half_width(), Some(I8));
|
521
|
-
assert_eq!(I32.half_width(), Some(I16));
|
522
|
-
assert_eq!(I32X4.half_width(), Some(I16X4));
|
523
|
-
assert_eq!(I64.half_width(), Some(I32));
|
524
|
-
assert_eq!(I128.half_width(), Some(I64));
|
525
|
-
assert_eq!(F16.half_width(), None);
|
526
|
-
assert_eq!(F32.half_width(), Some(F16));
|
527
|
-
assert_eq!(F64.half_width(), Some(F32));
|
528
|
-
assert_eq!(F128.half_width(), Some(F64));
|
529
|
-
|
530
|
-
assert_eq!(INVALID.double_width(), None);
|
531
|
-
assert_eq!(I8.double_width(), Some(I16));
|
532
|
-
assert_eq!(I16.double_width(), Some(I32));
|
533
|
-
assert_eq!(I32.double_width(), Some(I64));
|
534
|
-
assert_eq!(I32X4.double_width(), Some(I64X4));
|
535
|
-
assert_eq!(I64.double_width(), Some(I128));
|
536
|
-
assert_eq!(I128.double_width(), None);
|
537
|
-
assert_eq!(F16.double_width(), Some(F32));
|
538
|
-
assert_eq!(F32.double_width(), Some(F64));
|
539
|
-
assert_eq!(F64.double_width(), Some(F128));
|
540
|
-
assert_eq!(F128.double_width(), None);
|
541
|
-
}
|
542
|
-
|
543
|
-
#[test]
|
544
|
-
fn vectors() {
|
545
|
-
let big = F64.by(256).unwrap();
|
546
|
-
assert_eq!(big.lane_bits(), 64);
|
547
|
-
assert_eq!(big.lane_count(), 256);
|
548
|
-
assert_eq!(big.bits(), 64 * 256);
|
549
|
-
|
550
|
-
// Check that the generated constants match the computed vector types.
|
551
|
-
assert_eq!(I32.by(4), Some(I32X4));
|
552
|
-
assert_eq!(F64.by(8), Some(F64X8));
|
553
|
-
}
|
554
|
-
|
555
|
-
#[test]
|
556
|
-
fn dynamic_vectors() {
|
557
|
-
// Identification.
|
558
|
-
assert_eq!(I8X16XN.is_dynamic_vector(), true);
|
559
|
-
assert_eq!(F32X8XN.is_dynamic_vector(), true);
|
560
|
-
assert_eq!(F64X4XN.is_dynamic_vector(), true);
|
561
|
-
assert_eq!(I128X2XN.is_dynamic_vector(), true);
|
562
|
-
|
563
|
-
// Lane counts.
|
564
|
-
assert_eq!(I16X8XN.lane_count(), 0);
|
565
|
-
assert_eq!(I16X8XN.min_lane_count(), 8);
|
566
|
-
|
567
|
-
// Change lane counts
|
568
|
-
assert_eq!(I8X8XN.by(2), None);
|
569
|
-
|
570
|
-
// Conversions to and from vectors.
|
571
|
-
assert_eq!(I8.by(16).unwrap().vector_to_dynamic(), Some(I8X16XN));
|
572
|
-
assert_eq!(I16.by(8).unwrap().vector_to_dynamic(), Some(I16X8XN));
|
573
|
-
assert_eq!(F16.by(8).unwrap().vector_to_dynamic(), Some(F16X8XN));
|
574
|
-
assert_eq!(I32.by(4).unwrap().vector_to_dynamic(), Some(I32X4XN));
|
575
|
-
assert_eq!(F32.by(4).unwrap().vector_to_dynamic(), Some(F32X4XN));
|
576
|
-
assert_eq!(F64.by(2).unwrap().vector_to_dynamic(), Some(F64X2XN));
|
577
|
-
assert_eq!(I128.by(2).unwrap().vector_to_dynamic(), Some(I128X2XN));
|
578
|
-
assert_eq!(F128.by(2).unwrap().vector_to_dynamic(), Some(F128X2XN));
|
579
|
-
|
580
|
-
assert_eq!(I128X2XN.dynamic_to_vector(), Some(I128X2));
|
581
|
-
assert_eq!(F16X4XN.dynamic_to_vector(), Some(F16X4));
|
582
|
-
assert_eq!(F32X4XN.dynamic_to_vector(), Some(F32X4));
|
583
|
-
assert_eq!(F64X4XN.dynamic_to_vector(), Some(F64X4));
|
584
|
-
assert_eq!(F128X4XN.dynamic_to_vector(), Some(F128X4));
|
585
|
-
assert_eq!(I32X2XN.dynamic_to_vector(), Some(I32X2));
|
586
|
-
assert_eq!(I32X8XN.dynamic_to_vector(), Some(I32X8));
|
587
|
-
assert_eq!(I16X16XN.dynamic_to_vector(), Some(I16X16));
|
588
|
-
assert_eq!(I8X32XN.dynamic_to_vector(), Some(I8X32));
|
589
|
-
|
590
|
-
assert_eq!(I8X64.vector_to_dynamic(), None);
|
591
|
-
assert_eq!(F32X16.vector_to_dynamic(), None);
|
592
|
-
assert_eq!(I64X8.vector_to_dynamic(), None);
|
593
|
-
assert_eq!(I128X4.vector_to_dynamic(), None);
|
594
|
-
}
|
595
|
-
|
596
|
-
#[test]
|
597
|
-
fn format_scalars() {
|
598
|
-
assert_eq!(I8.to_string(), "i8");
|
599
|
-
assert_eq!(I16.to_string(), "i16");
|
600
|
-
assert_eq!(I32.to_string(), "i32");
|
601
|
-
assert_eq!(I64.to_string(), "i64");
|
602
|
-
assert_eq!(I128.to_string(), "i128");
|
603
|
-
assert_eq!(F32.to_string(), "f32");
|
604
|
-
assert_eq!(F64.to_string(), "f64");
|
605
|
-
assert_eq!(R32.to_string(), "r32");
|
606
|
-
assert_eq!(R64.to_string(), "r64");
|
607
|
-
}
|
608
|
-
|
609
|
-
#[test]
|
610
|
-
fn format_vectors() {
|
611
|
-
assert_eq!(I8.by(64).unwrap().to_string(), "i8x64");
|
612
|
-
assert_eq!(F64.by(2).unwrap().to_string(), "f64x2");
|
613
|
-
assert_eq!(I8.by(3), None);
|
614
|
-
assert_eq!(I8.by(512), None);
|
615
|
-
assert_eq!(INVALID.by(4), None);
|
616
|
-
}
|
617
|
-
|
618
|
-
#[test]
|
619
|
-
fn as_truthy() {
|
620
|
-
assert_eq!(I32X4.as_truthy(), I32X4);
|
621
|
-
assert_eq!(I32.as_truthy(), I8);
|
622
|
-
assert_eq!(I32X4.as_truthy_pedantic(), I32X4);
|
623
|
-
assert_eq!(I32.as_truthy_pedantic(), I32);
|
624
|
-
}
|
625
|
-
|
626
|
-
#[test]
|
627
|
-
fn int_from_size() {
|
628
|
-
assert_eq!(Type::int(0), None);
|
629
|
-
assert_eq!(Type::int(8), Some(I8));
|
630
|
-
assert_eq!(Type::int(33), None);
|
631
|
-
assert_eq!(Type::int(64), Some(I64));
|
632
|
-
|
633
|
-
assert_eq!(Type::int_with_byte_size(0), None);
|
634
|
-
assert_eq!(Type::int_with_byte_size(2), Some(I16));
|
635
|
-
assert_eq!(Type::int_with_byte_size(6), None);
|
636
|
-
assert_eq!(Type::int_with_byte_size(16), Some(I128));
|
637
|
-
|
638
|
-
// Ensure `int_with_byte_size` handles overflow properly
|
639
|
-
let evil = 0xE001_u16;
|
640
|
-
assert_eq!(evil.wrapping_mul(8), 8, "check the constant is correct");
|
641
|
-
assert_eq!(Type::int_with_byte_size(evil), None);
|
642
|
-
}
|
643
|
-
}
|