wasmtime 24.0.0 → 25.0.0

data/ext/cargo-vendor/cranelift-codegen-0.111.0/src/isa/x64/inst/regs.rs

@@ -1,275 +0,0 @@
-//! Register definitions for regalloc2.
-//!
-//! We define 16 GPRs, with indices equal to the hardware encoding,
-//! and 16 XMM registers.
-//!
-//! Note also that we make use of pinned VRegs to refer to PRegs.
-
-use crate::machinst::{RealReg, Reg};
-use alloc::string::ToString;
-use regalloc2::{PReg, RegClass, VReg};
-use std::string::String;
-
-// Hardware encodings (note the special rax, rcx, rdx, rbx order).
-
-pub const ENC_RAX: u8 = 0;
-pub const ENC_RCX: u8 = 1;
-pub const ENC_RDX: u8 = 2;
-pub const ENC_RBX: u8 = 3;
-pub const ENC_RSP: u8 = 4;
-pub const ENC_RBP: u8 = 5;
-pub const ENC_RSI: u8 = 6;
-pub const ENC_RDI: u8 = 7;
-pub const ENC_R8: u8 = 8;
-pub const ENC_R9: u8 = 9;
-pub const ENC_R10: u8 = 10;
-pub const ENC_R11: u8 = 11;
-pub const ENC_R12: u8 = 12;
-pub const ENC_R13: u8 = 13;
-pub const ENC_R14: u8 = 14;
-pub const ENC_R15: u8 = 15;
-
-// Constructors for Regs.
-
-fn gpr(enc: u8) -> Reg {
-    let preg = gpr_preg(enc);
-    Reg::from(VReg::new(preg.index(), RegClass::Int))
-}
-pub(crate) const fn gpr_preg(enc: u8) -> PReg {
-    PReg::new(enc as usize, RegClass::Int)
-}
-
-pub(crate) fn rsi() -> Reg {
-    gpr(ENC_RSI)
-}
-pub(crate) fn rdi() -> Reg {
-    gpr(ENC_RDI)
-}
-pub(crate) fn rax() -> Reg {
-    gpr(ENC_RAX)
-}
-pub(crate) fn rcx() -> Reg {
-    gpr(ENC_RCX)
-}
-pub(crate) fn rdx() -> Reg {
-    gpr(ENC_RDX)
-}
-pub(crate) fn r8() -> Reg {
-    gpr(ENC_R8)
-}
-pub(crate) fn r9() -> Reg {
-    gpr(ENC_R9)
-}
-pub(crate) fn r10() -> Reg {
-    gpr(ENC_R10)
-}
-pub(crate) fn r11() -> Reg {
-    gpr(ENC_R11)
-}
-pub(crate) fn r12() -> Reg {
-    gpr(ENC_R12)
-}
-pub(crate) fn r13() -> Reg {
-    gpr(ENC_R13)
-}
-pub(crate) fn r14() -> Reg {
-    gpr(ENC_R14)
-}
-pub(crate) fn rbx() -> Reg {
-    gpr(ENC_RBX)
-}
-
-pub(crate) fn r15() -> Reg {
-    gpr(ENC_R15)
-}
-
-pub(crate) fn rsp() -> Reg {
-    gpr(ENC_RSP)
-}
-pub(crate) fn rbp() -> Reg {
-    gpr(ENC_RBP)
-}
-
-/// The pinned register on this architecture.
-/// It must be the same as Spidermonkey's HeapReg, as found in this file.
-/// https://searchfox.org/mozilla-central/source/js/src/jit/x64/Assembler-x64.h#99
-pub(crate) fn pinned_reg() -> Reg {
-    r15()
-}
-
-fn fpr(enc: u8) -> Reg {
-    let preg = fpr_preg(enc);
-    Reg::from(VReg::new(preg.index(), RegClass::Float))
-}
-
-pub(crate) const fn fpr_preg(enc: u8) -> PReg {
-    PReg::new(enc as usize, RegClass::Float)
-}
-
-pub(crate) fn xmm0() -> Reg {
-    fpr(0)
-}
-pub(crate) fn xmm1() -> Reg {
-    fpr(1)
-}
-pub(crate) fn xmm2() -> Reg {
-    fpr(2)
-}
-pub(crate) fn xmm3() -> Reg {
-    fpr(3)
-}
-pub(crate) fn xmm4() -> Reg {
-    fpr(4)
-}
-pub(crate) fn xmm5() -> Reg {
-    fpr(5)
-}
-pub(crate) fn xmm6() -> Reg {
-    fpr(6)
-}
-pub(crate) fn xmm7() -> Reg {
-    fpr(7)
-}
-pub(crate) fn xmm8() -> Reg {
-    fpr(8)
-}
-pub(crate) fn xmm9() -> Reg {
-    fpr(9)
-}
-pub(crate) fn xmm10() -> Reg {
-    fpr(10)
-}
-pub(crate) fn xmm11() -> Reg {
-    fpr(11)
-}
-pub(crate) fn xmm12() -> Reg {
-    fpr(12)
-}
-pub(crate) fn xmm13() -> Reg {
-    fpr(13)
-}
-pub(crate) fn xmm14() -> Reg {
-    fpr(14)
-}
-pub(crate) fn xmm15() -> Reg {
-    fpr(15)
-}
-
-/// Give the name of a RealReg.
-pub fn realreg_name(reg: RealReg) -> &'static str {
-    let preg = PReg::from(reg);
-    match preg.class() {
-        RegClass::Int => match preg.hw_enc() as u8 {
-            ENC_RAX => "%rax",
-            ENC_RBX => "%rbx",
-            ENC_RCX => "%rcx",
-            ENC_RDX => "%rdx",
-            ENC_RSI => "%rsi",
-            ENC_RDI => "%rdi",
-            ENC_RBP => "%rbp",
-            ENC_RSP => "%rsp",
-            ENC_R8 => "%r8",
-            ENC_R9 => "%r9",
-            ENC_R10 => "%r10",
-            ENC_R11 => "%r11",
-            ENC_R12 => "%r12",
-            ENC_R13 => "%r13",
-            ENC_R14 => "%r14",
-            ENC_R15 => "%r15",
-            _ => panic!("Invalid PReg: {:?}", preg),
-        },
-        RegClass::Float => match preg.hw_enc() {
-            0 => "%xmm0",
-            1 => "%xmm1",
-            2 => "%xmm2",
-            3 => "%xmm3",
-            4 => "%xmm4",
-            5 => "%xmm5",
-            6 => "%xmm6",
-            7 => "%xmm7",
-            8 => "%xmm8",
-            9 => "%xmm9",
-            10 => "%xmm10",
-            11 => "%xmm11",
-            12 => "%xmm12",
-            13 => "%xmm13",
-            14 => "%xmm14",
-            15 => "%xmm15",
-            _ => panic!("Invalid PReg: {:?}", preg),
-        },
-        RegClass::Vector => unreachable!(),
-    }
-}
-
-pub fn show_reg(reg: Reg) -> String {
-    if let Some(rreg) = reg.to_real_reg() {
-        realreg_name(rreg).to_string()
-    } else {
-        format!("%{:?}", reg)
-    }
-}
-
-/// If `ireg` denotes an I64-classed reg, make a best-effort attempt to show its name at some
-/// smaller size (4, 2 or 1 bytes).
-pub fn show_ireg_sized(reg: Reg, size: u8) -> String {
-    let mut s = show_reg(reg);
-
-    if reg.class() != RegClass::Int || size == 8 {
-        // We can't do any better.
-        return s;
-    }
-
-    if reg.is_real() {
-        // Change (eg) "rax" into "eax", "ax" or "al" as appropriate.  This is something one could
-        // describe diplomatically as "a kludge", but it's only debug code.
-        let remapper = match s.as_str() {
-            "%rax" => Some(["%eax", "%ax", "%al"]),
-            "%rbx" => Some(["%ebx", "%bx", "%bl"]),
-            "%rcx" => Some(["%ecx", "%cx", "%cl"]),
-            "%rdx" => Some(["%edx", "%dx", "%dl"]),
-            "%rsi" => Some(["%esi", "%si", "%sil"]),
-            "%rdi" => Some(["%edi", "%di", "%dil"]),
-            "%rbp" => Some(["%ebp", "%bp", "%bpl"]),
-            "%rsp" => Some(["%esp", "%sp", "%spl"]),
-            "%r8" => Some(["%r8d", "%r8w", "%r8b"]),
-            "%r9" => Some(["%r9d", "%r9w", "%r9b"]),
-            "%r10" => Some(["%r10d", "%r10w", "%r10b"]),
-            "%r11" => Some(["%r11d", "%r11w", "%r11b"]),
-            "%r12" => Some(["%r12d", "%r12w", "%r12b"]),
-            "%r13" => Some(["%r13d", "%r13w", "%r13b"]),
-            "%r14" => Some(["%r14d", "%r14w", "%r14b"]),
-            "%r15" => Some(["%r15d", "%r15w", "%r15b"]),
-            _ => None,
-        };
-        if let Some(smaller_names) = remapper {
-            match size {
-                4 => s = smaller_names[0].into(),
-                2 => s = smaller_names[1].into(),
-                1 => s = smaller_names[2].into(),
-                _ => panic!("show_ireg_sized: real"),
-            }
-        }
-    } else {
-        // Add a "l", "w" or "b" suffix to RegClass::I64 vregs used at narrower widths.
-        let suffix = match size {
-            4 => "l",
-            2 => "w",
-            1 => "b",
-            _ => panic!("show_ireg_sized: virtual"),
-        };
-        s = s + suffix;
-    }
-
-    s
-}
-
-// N.B.: this is not an `impl PrettyPrint for Reg` because it is
-// specific to x64; other backends have analogous functions. The
-// disambiguation happens statically by virtue of higher-level,
-// x64-specific, types calling the right `pretty_print_reg`. (In other
-// words, we can't pretty-print a `Reg` all by itself in a build that
-// may have multiple backends; but we can pretty-print one as part of
-// an x64 Inst or x64 RegMemImm.)
-pub fn pretty_print_reg(reg: Reg, size: u8) -> String {
-    show_ireg_sized(reg, size)
-}

data/ext/cargo-vendor/cranelift-codegen-0.111.0/src/isa/x64/inst/unwind/systemv.rs

@@ -1,198 +0,0 @@
-//! Unwind information for System V ABI (x86-64).
-
-use crate::isa::unwind::systemv::RegisterMappingError;
-use crate::machinst::{Reg, RegClass};
-use gimli::{write::CommonInformationEntry, Encoding, Format, Register, X86_64};
-
-/// Creates a new x86-64 common information entry (CIE).
-pub fn create_cie() -> CommonInformationEntry {
-    use gimli::write::CallFrameInstruction;
-
-    let mut entry = CommonInformationEntry::new(
-        Encoding {
-            address_size: 8,
-            format: Format::Dwarf32,
-            version: 1,
-        },
-        1,  // Code alignment factor
-        -8, // Data alignment factor
-        X86_64::RA,
-    );
-
-    // Every frame will start with the call frame address (CFA) at RSP+8
-    // It is +8 to account for the push of the return address by the call instruction
-    entry.add_instruction(CallFrameInstruction::Cfa(X86_64::RSP, 8));
-
-    // Every frame will start with the return address at RSP (CFA-8 = RSP+8-8 = RSP)
-    entry.add_instruction(CallFrameInstruction::Offset(X86_64::RA, -8));
-
-    entry
-}
-
-/// Map Cranelift registers to their corresponding Gimli registers.
-pub fn map_reg(reg: Reg) -> Result<Register, RegisterMappingError> {
-    // Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
-    const X86_GP_REG_MAP: [gimli::Register; 16] = [
-        X86_64::RAX,
-        X86_64::RCX,
-        X86_64::RDX,
-        X86_64::RBX,
-        X86_64::RSP,
-        X86_64::RBP,
-        X86_64::RSI,
-        X86_64::RDI,
-        X86_64::R8,
-        X86_64::R9,
-        X86_64::R10,
-        X86_64::R11,
-        X86_64::R12,
-        X86_64::R13,
-        X86_64::R14,
-        X86_64::R15,
-    ];
-    const X86_XMM_REG_MAP: [gimli::Register; 16] = [
-        X86_64::XMM0,
-        X86_64::XMM1,
-        X86_64::XMM2,
-        X86_64::XMM3,
-        X86_64::XMM4,
-        X86_64::XMM5,
-        X86_64::XMM6,
-        X86_64::XMM7,
-        X86_64::XMM8,
-        X86_64::XMM9,
-        X86_64::XMM10,
-        X86_64::XMM11,
-        X86_64::XMM12,
-        X86_64::XMM13,
-        X86_64::XMM14,
-        X86_64::XMM15,
-    ];
-
-    match reg.class() {
-        RegClass::Int => {
-            // x86 GP registers have a weird mapping to DWARF registers, so we use a
-            // lookup table.
-            Ok(X86_GP_REG_MAP[reg.to_real_reg().unwrap().hw_enc() as usize])
-        }
-        RegClass::Float => Ok(X86_XMM_REG_MAP[reg.to_real_reg().unwrap().hw_enc() as usize]),
-        RegClass::Vector => unreachable!(),
-    }
-}
-
-pub(crate) struct RegisterMapper;
-
-impl crate::isa::unwind::systemv::RegisterMapper<Reg> for RegisterMapper {
-    fn map(&self, reg: Reg) -> Result<u16, RegisterMappingError> {
-        Ok(map_reg(reg)?.0)
-    }
-    fn fp(&self) -> Option<u16> {
-        Some(X86_64::RBP.0)
-    }
-}
-
-#[cfg(test)]
-mod tests {
-    use crate::cursor::{Cursor, FuncCursor};
-    use crate::ir::{
-        types, AbiParam, Function, InstBuilder, Signature, StackSlotData, StackSlotKind,
-    };
-    use crate::isa::{lookup, CallConv};
-    use crate::settings::{builder, Flags};
-    use crate::Context;
-    use gimli::write::Address;
-    use target_lexicon::triple;
-
-    #[test]
-    fn test_simple_func() {
-        let isa = lookup(triple!("x86_64"))
-            .expect("expect x86 ISA")
-            .finish(Flags::new(builder()))
-            .expect("expect backend creation to succeed");
-
-        let mut context = Context::for_function(create_function(
-            CallConv::SystemV,
-            Some(StackSlotData::new(StackSlotKind::ExplicitSlot, 64, 0)),
-        ));
-
-        let code = context
-            .compile(&*isa, &mut Default::default())
-            .expect("expected compilation");
-
-        let fde = match code
-            .create_unwind_info(isa.as_ref())
-            .expect("can create unwind info")
-        {
-            Some(crate::isa::unwind::UnwindInfo::SystemV(info)) => {
-                info.to_fde(Address::Constant(1234))
-            }
-            _ => panic!("expected unwind information"),
-        };
-
-        assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 17, lsda: None, instructions: [(1, CfaOffset(16)), (1, Offset(Register(6), -16)), (4, CfaRegister(Register(6)))] }");
-    }
-
-    fn create_function(call_conv: CallConv, stack_slot: Option<StackSlotData>) -> Function {
-        let mut func = Function::with_name_signature(Default::default(), Signature::new(call_conv));
-
-        let block0 = func.dfg.make_block();
-        let mut pos = FuncCursor::new(&mut func);
-        pos.insert_block(block0);
-        pos.ins().return_(&[]);
-
-        if let Some(stack_slot) = stack_slot {
-            func.sized_stack_slots.push(stack_slot);
-        }
-
-        func
-    }
-
-    #[test]
-    fn test_multi_return_func() {
-        let isa = lookup(triple!("x86_64"))
-            .expect("expect x86 ISA")
-            .finish(Flags::new(builder()))
-            .expect("expect backend creation to succeed");
-
-        let mut context = Context::for_function(create_multi_return_function(CallConv::SystemV));
-
-        let code = context
-            .compile(&*isa, &mut Default::default())
-            .expect("expected compilation");
-
-        let fde = match code
-            .create_unwind_info(isa.as_ref())
-            .expect("can create unwind info")
-        {
-            Some(crate::isa::unwind::UnwindInfo::SystemV(info)) => {
-                info.to_fde(Address::Constant(4321))
-            }
-            _ => panic!("expected unwind information"),
-        };
-
-        assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 22, lsda: None, instructions: [(1, CfaOffset(16)), (1, Offset(Register(6), -16)), (4, CfaRegister(Register(6)))] }");
-    }
-
-    fn create_multi_return_function(call_conv: CallConv) -> Function {
-        let mut sig = Signature::new(call_conv);
-        sig.params.push(AbiParam::new(types::I32));
-        let mut func = Function::with_name_signature(Default::default(), sig);
-
-        let block0 = func.dfg.make_block();
-        let v0 = func.dfg.append_block_param(block0, types::I32);
-        let block1 = func.dfg.make_block();
-        let block2 = func.dfg.make_block();
-
-        let mut pos = FuncCursor::new(&mut func);
-        pos.insert_block(block0);
-        pos.ins().brif(v0, block2, &[], block1, &[]);
-
-        pos.insert_block(block1);
-        pos.ins().return_(&[]);
-
-        pos.insert_block(block2);
-        pos.ins().return_(&[]);
-
-        func
-    }
-}