axi_tdl 0.0.2
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- checksums.yaml +7 -0
- data/.gitignore +8 -0
- data/CODE_OF_CONDUCT.md +74 -0
- data/Gemfile +6 -0
- data/Gemfile.lock +43 -0
- data/LICENSE +504 -0
- data/README.md +311 -0
- data/Rakefile +18 -0
- data/axi_tdl.gemspec +43 -0
- data/bin/console +14 -0
- data/bin/setup +8 -0
- data/lib/.rspec +1 -0
- data/lib/axi/AXI4/axi4_combin_wr_rd_batch.sv +59 -0
- data/lib/axi/AXI4/axi4_direct.sv +137 -0
- data/lib/axi/AXI4/axi4_direct_A1.sv +229 -0
- data/lib/axi/AXI4/axi4_direct_B1.sv +74 -0
- data/lib/axi/AXI4/axi4_direct_verb.sv +79 -0
- data/lib/axi/AXI4/axi4_direct_verc.sv +146 -0
- data/lib/axi/AXI4/axi4_dpram_cache.rb +106 -0
- data/lib/axi/AXI4/axi4_dpram_cache.sv +112 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide.sv +85 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_A1.sv +96 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_track.sv +118 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_verb.sv +131 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_pipe.sv +44 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_pipe_verb.sv +45 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe.sv +111 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe_verb.sv +113 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe.sv +142 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe_verb.sv +146 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_batch_gen.sv +134 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_gen.sv +89 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_gen_A1.sv +109 -0
- data/lib/axi/AXI4/axi4_rd_burst_track.sv +164 -0
- data/lib/axi/AXI4/axi4_wr_aux_bind_data.sv +121 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_batch_gen.sv +140 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_gen.sv +102 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_gen_without_resp.sv +91 -0
- data/lib/axi/AXI4/axi4_wr_burst_track.sv +146 -0
- data/lib/axi/AXI4/axi_stream_add_addr_len.sv +50 -0
- data/lib/axi/AXI4/axi_stream_to_axi4_wr.sv +61 -0
- data/lib/axi/AXI4/axi_stream_to_axi4_wr_verb.sv.bak +123 -0
- data/lib/axi/AXI4/axis_to_axi4_wr.rb +149 -0
- data/lib/axi/AXI4/axis_to_axi4_wr.sv +141 -0
- data/lib/axi/AXI4/full_axi4_to_axis.sv +188 -0
- data/lib/axi/AXI4/full_axi4_to_axis_partition_wr_rd.sv +208 -0
- data/lib/axi/AXI4/id_record.sv +55 -0
- data/lib/axi/AXI4/idata_pool_axi4.sv +110 -0
- data/lib/axi/AXI4/interconnect/AXI4_interconnect_M2S.sv +291 -0
- data/lib/axi/AXI4/interconnect/axi4_mix_interconnect_M2S.sv +72 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_interconnect_M2S.sv +148 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S.sv +255 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S.sv.bak +255 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S_A1.sv +286 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S_A2.sv +281 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S.sv +235 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S_A1.sv +283 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_mix_interconnect_M2S.sv +32 -0
- data/lib/axi/AXI4/long_axi4_to_wide_axi4.sv.bak +251 -0
- data/lib/axi/AXI4/odata_pool_axi4.sv +134 -0
- data/lib/axi/AXI4/odata_pool_axi4_A1.sv +165 -0
- data/lib/axi/AXI4/odata_pool_axi4_A2.sv +159 -0
- data/lib/axi/AXI4/odata_pool_axi4_A3.sv +183 -0
- data/lib/axi/AXI4/packet_fifo/axi4_packet_fifo.sv +61 -0
- data/lib/axi/AXI4/packet_fifo/axi4_rd_packet_fifo.sv +282 -0
- data/lib/axi/AXI4/packet_fifo/axi4_wr_packet_fifo.sv +181 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge.sv +60 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge_rd.sv +279 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge_wr.sv +267 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition.sv +36 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_OD.sv +66 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd.sv +211 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd_OD.sv +322 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd_verb.rb +80 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd_verb.sv +93 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_wr.sv +239 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_wr_OD.sv +302 -0
- data/lib/axi/AXI4/packet_partition/data_inf_partition.rb +293 -0
- data/lib/axi/AXI4/packet_partition/data_inf_partition.sv +307 -0
- data/lib/axi/AXI4/vcs_axi4_array_comptable.sv +35 -0
- data/lib/axi/AXI4/vcs_axi4_comptable.sv +330 -0
- data/lib/axi/AXI4/wide_axis_to_axi4_wr.rb +149 -0
- data/lib/axi/AXI4/wide_axis_to_axi4_wr.sv +140 -0
- data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe.sv +239 -0
- data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe_A1.sv +204 -0
- data/lib/axi/AXI4/width_convert/axi4_data_convert.sv +312 -0
- data/lib/axi/AXI4/width_convert/axi4_data_convert_A1.sv +217 -0
- data/lib/axi/AXI4/width_convert/data_combin.sv +366 -0
- data/lib/axi/AXI4/width_convert/data_combin.sv.bak +290 -0
- data/lib/axi/AXI4/width_convert/data_destruct.sv +304 -0
- data/lib/axi/AXI4/width_convert/feed_check.sv +94 -0
- data/lib/axi/AXI4/width_convert/len_convert.sv.bak +61 -0
- data/lib/axi/AXI4/width_convert/odd_width_convert.sv +229 -0
- data/lib/axi/AXI4/width_convert/odd_width_convert_verb.sv +105 -0
- data/lib/axi/AXI4/width_convert/simple_data_pipe.sv +40 -0
- data/lib/axi/AXI4/width_convert/simple_data_pipe_slaver.sv +33 -0
- data/lib/axi/AXI4/width_convert/width_combin.sv +113 -0
- data/lib/axi/AXI4/width_convert/width_convert.sv +87 -0
- data/lib/axi/AXI4/width_convert/width_convert_verb.sv +249 -0
- data/lib/axi/AXI4/width_convert/width_destruct.sv +206 -0
- data/lib/axi/AXI4/width_convert/width_destruct_A1.sv +251 -0
- data/lib/axi/AXI_BFM/AXI_BFM_PKG.sv +1039 -0
- data/lib/axi/AXI_BFM/Data_C_BFM_PKG.sv +97 -0
- data/lib/axi/AXI_BFM/axi4_error_chk.sv +298 -0
- data/lib/axi/AXI_BFM/axi4_illegal_bfm_pkg.sv +607 -0
- data/lib/axi/AXI_BFM/axi_lite_master.sv +102 -0
- data/lib/axi/AXI_BFM/axi_lite_tb.sv +23 -0
- data/lib/axi/AXI_BFM/axi_master.sv +185 -0
- data/lib/axi/AXI_BFM/axi_mirror.sv +266 -0
- data/lib/axi/AXI_BFM/axi_mm_tb.sv +134 -0
- data/lib/axi/AXI_BFM/axi_slaver.sv.bak +340 -0
- data/lib/axi/AXI_BFM/axistreambfm.sv +117 -0
- data/lib/axi/AXI_Lite/axi4_to_lite.sv +36 -0
- data/lib/axi/AXI_Lite/axi_lite_configure.sv +356 -0
- data/lib/axi/AXI_Lite/axi_lite_configure_inf2.sv +365 -0
- data/lib/axi/AXI_Lite/axi_lite_configure_verb.sv.bck +370 -0
- data/lib/axi/AXI_Lite/axi_lite_interconnect_M2S.sv +437 -0
- data/lib/axi/AXI_Lite/axi_lite_interconnect_S2M.sv +359 -0
- data/lib/axi/AXI_Lite/axi_lite_interconnect_S2M.sv.bak +359 -0
- data/lib/axi/AXI_Lite/axi_lite_master_empty.sv +30 -0
- data/lib/axi/AXI_Lite/axi_lite_slaver_empty.sv +27 -0
- data/lib/axi/AXI_Lite/axil_direct.sv +52 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv +230 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv.bak +109 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/jtag_to_axilite_wrapper.sv +56 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl.sv +515 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_C1.sv +369 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verb.sv +365 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verc.sv +401 -0
- data/lib/axi/AXI_Lite/wr_lite_to_axis.sv +141 -0
- data/lib/axi/AXI_Lite/wr_lite_to_axis.sv.bak +141 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S.sv +76 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A1.sv +77 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A2.sv +71 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_bind_tuser.sv +72 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_noaddr.sv +151 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_with_addr.sv +87 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M.sv +65 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_auto.sv +50 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_info.sv +64 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_keep.sv.bak +64 -0
- data/lib/axi/AXI_stream/axi_stream_packet_fifo_with_info.sv.bak +49 -0
- data/lib/axi/AXI_stream/axi_stream_partition.sv +147 -0
- data/lib/axi/AXI_stream/axi_stream_partition_A1.sv +63 -0
- data/lib/axi/AXI_stream/axi_stream_planer.sv +51 -0
- data/lib/axi/AXI_stream/axi_stream_split_channel.rb +56 -0
- data/lib/axi/AXI_stream/axi_stream_split_channel.sv +149 -0
- data/lib/axi/AXI_stream/axi_streams_combin.sv +151 -0
- data/lib/axi/AXI_stream/axi_streams_combin_A1.sv +179 -0
- data/lib/axi/AXI_stream/axi_streams_scaler.sv +171 -0
- data/lib/axi/AXI_stream/axi_streams_scaler_A1.sv +179 -0
- data/lib/axi/AXI_stream/axis_append.sv +79 -0
- data/lib/axi/AXI_stream/axis_append_A1.sv +82 -0
- data/lib/axi/AXI_stream/axis_base_pipe.sv +184 -0
- data/lib/axi/AXI_stream/axis_combin_with_fifo.sv +69 -0
- data/lib/axi/AXI_stream/axis_connect_pipe.sv +86 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_A1.sv.bak +170 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_left_shift.sv +64 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_right_shift.sv +64 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_right_shift_verb.sv +70 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_with_info.sv +93 -0
- data/lib/axi/AXI_stream/axis_direct.sv +55 -0
- data/lib/axi/AXI_stream/axis_direct_A1.sv +81 -0
- data/lib/axi/AXI_stream/axis_filter.sv +38 -0
- data/lib/axi/AXI_stream/axis_full_to_data_c.sv +26 -0
- data/lib/axi/AXI_stream/axis_head_cut.sv +67 -0
- data/lib/axi/AXI_stream/axis_head_cut_verb.sv +60 -0
- data/lib/axi/AXI_stream/axis_head_cut_verc.rb +175 -0
- data/lib/axi/AXI_stream/axis_head_cut_verc.sv +245 -0
- data/lib/axi/AXI_stream/axis_inct_s2m_with_flag.sv +84 -0
- data/lib/axi/AXI_stream/axis_insert_copy.rb +59 -0
- data/lib/axi/AXI_stream/axis_insert_copy.sv +66 -0
- data/lib/axi/AXI_stream/axis_intc_M2S_with_addr_inf.sv +114 -0
- data/lib/axi/AXI_stream/axis_intc_S2M_with_addr_inf.sv +85 -0
- data/lib/axi/AXI_stream/axis_interconnect_S2M_pipe.sv +75 -0
- data/lib/axi/AXI_stream/axis_length_cut.sv +64 -0
- data/lib/axi/AXI_stream/axis_length_fill.sv +194 -0
- data/lib/axi/AXI_stream/axis_length_split.sv +86 -0
- data/lib/axi/AXI_stream/axis_length_split_with_addr.sv +127 -0
- data/lib/axi/AXI_stream/axis_length_split_writh_user.sv +87 -0
- data/lib/axi/AXI_stream/axis_link_trigger.sv +81 -0
- data/lib/axi/AXI_stream/axis_master_empty.sv +26 -0
- data/lib/axi/AXI_stream/axis_mirror_to_master.sv +126 -0
- data/lib/axi/AXI_stream/axis_mirrors.sv +60 -0
- data/lib/axi/AXI_stream/axis_orthogonal.sv +66 -0
- data/lib/axi/AXI_stream/axis_ram_buffer.sv +118 -0
- data/lib/axi/AXI_stream/axis_rom_contect.rb +97 -0
- data/lib/axi/AXI_stream/axis_rom_contect.sv +110 -0
- data/lib/axi/AXI_stream/axis_rom_contect_sim.rb +102 -0
- data/lib/axi/AXI_stream/axis_rom_contect_sim.sv +113 -0
- data/lib/axi/AXI_stream/axis_slaver_empty.sv +22 -0
- data/lib/axi/AXI_stream/axis_slaver_pipe.sv +84 -0
- data/lib/axi/AXI_stream/axis_slaver_pipe_A1.sv +54 -0
- data/lib/axi/AXI_stream/axis_slaver_vector_empty.sv +27 -0
- data/lib/axi/AXI_stream/axis_split_channel_verb.rb +42 -0
- data/lib/axi/AXI_stream/axis_split_channel_verb.sv +62 -0
- data/lib/axi/AXI_stream/axis_to_axi4_or_lite.rb +127 -0
- data/lib/axi/AXI_stream/axis_to_axi4_or_lite.sv +153 -0
- data/lib/axi/AXI_stream/axis_to_data_inf.sv +34 -0
- data/lib/axi/AXI_stream/axis_to_lite_rd.sv +81 -0
- data/lib/axi/AXI_stream/axis_to_lite_wr.sv +71 -0
- data/lib/axi/AXI_stream/axis_uncompress.sv +147 -0
- data/lib/axi/AXI_stream/axis_uncompress_A1.sv +150 -0
- data/lib/axi/AXI_stream/axis_uncompress_verb.rb +32 -0
- data/lib/axi/AXI_stream/axis_uncompress_verb.sv +54 -0
- data/lib/axi/AXI_stream/axis_valve.sv +29 -0
- data/lib/axi/AXI_stream/axis_valve_with_pipe.sv +76 -0
- data/lib/axi/AXI_stream/axis_vector_master_empty.rb +11 -0
- data/lib/axi/AXI_stream/axis_vector_master_empty.sv +35 -0
- data/lib/axi/AXI_stream/axis_vector_slaver_empty.rb +11 -0
- data/lib/axi/AXI_stream/axis_vector_slaver_empty.sv +35 -0
- data/lib/axi/AXI_stream/check_stream_crc.sv +28 -0
- data/lib/axi/AXI_stream/data_c_to_axis_full.sv +23 -0
- data/lib/axi/AXI_stream/data_to_axis_inf.sv +103 -0
- data/lib/axi/AXI_stream/data_to_axis_inf_A1.sv +28 -0
- data/lib/axi/AXI_stream/data_width/axis_width_combin.sv +204 -0
- data/lib/axi/AXI_stream/data_width/axis_width_combin_A1.sv +220 -0
- data/lib/axi/AXI_stream/data_width/axis_width_convert.sv +49 -0
- data/lib/axi/AXI_stream/data_width/axis_width_destruct.sv +82 -0
- data/lib/axi/AXI_stream/data_width/axis_width_destruct_A1.sv +86 -0
- data/lib/axi/AXI_stream/ex_status/axis_ex_status.sv +97 -0
- data/lib/axi/AXI_stream/gen_big_field_table.sv +170 -0
- data/lib/axi/AXI_stream/gen_common_frame_table.sv +382 -0
- data/lib/axi/AXI_stream/gen_common_frame_table_bind_tuser.sv +428 -0
- data/lib/axi/AXI_stream/gen_origin_axis.sv +116 -0
- data/lib/axi/AXI_stream/gen_origin_axis_A1.sv +129 -0
- data/lib/axi/AXI_stream/gen_origin_axis_A2.sv +162 -0
- data/lib/axi/AXI_stream/gen_simple_axis.sv +164 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_long_fifo.sv +132 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_long_fifo_verb.sv +140 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo.sv +125 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1.sv +142 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1E.sv +198 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_verb.sv +120 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_with_info.sv +49 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_long_fifo.sv +197 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_wide_fifo.sv +141 -0
- data/lib/axi/AXI_stream/packet_fifo/axis_pkt_fifo_filter_keep.sv +164 -0
- data/lib/axi/AXI_stream/packet_fifo/axis_pkt_fifo_filter_keep_A1.sv +166 -0
- data/lib/axi/AXI_stream/parse_big_field_table.sv +164 -0
- data/lib/axi/AXI_stream/parse_big_field_table_A1.sv +162 -0
- data/lib/axi/AXI_stream/parse_big_field_table_A2.sv +165 -0
- data/lib/axi/AXI_stream/parse_big_field_table_verb.sv +118 -0
- data/lib/axi/AXI_stream/parse_common_frame_table.sv +202 -0
- data/lib/axi/AXI_stream/parse_common_frame_table_A1.sv +521 -0
- data/lib/axi/AXI_stream/parse_common_frame_table_A2.sv +561 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache.sv +46 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_35bit.sv +122 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_36_71bit.sv +71 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_72_95bit.sv +96 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_72_95bit_with_keep.sv +99 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_96_143bit.sv +119 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_A1.sv +49 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_B1.sv +82 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_mirror.sv +44 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_verb.sv +58 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_long_cache.sv +55 -0
- data/lib/axi/AXI_stream/stream_crc.sv +67 -0
- data/lib/axi/AXI_stream/vcs_axis_comptable.sv +73 -0
- data/lib/axi/LICENSE +504 -0
- data/lib/axi/ReadME.md +6 -0
- data/lib/axi/SIM/tb_axi4_partition_20201105.sv +115 -0
- data/lib/axi/SIM/tb_axis_bfm_0504.sv +61 -0
- data/lib/axi/SIM/tb_axis_partitiom_0929.sv +102 -0
- data/lib/axi/SIM/tb_axis_s2m_pipe_1023.sv +163 -0
- data/lib/axi/SIM/tb_axis_to_axi4_0925.sv +107 -0
- data/lib/axi/SIM/tb_data_c_m2s_inf_20200114.sv +222 -0
- data/lib/axi/SIM/tb_data_c_m2s_inf_20201103.sv +245 -0
- data/lib/axi/SIM/tb_data_c_pipe_inf_20180417.sv +114 -0
- data/lib/axi/SIM/tb_wide_axis_to_axi4_wr.sv +81 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip.sv +589 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_C1.sv +69 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verb.sv +388 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verc.sv +70 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr3_ip_native_to_axi4.sv +194 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr3_ip_wrapper_sim.sv +99 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr_axi4_to_axis.sv +188 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo.sv +156 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_A1.sv +180 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_verb.sv +269 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/model_ddr_ip_app.sv +303 -0
- data/lib/axi/axi4_to_xilinx_ddr_native/tb_ddr3_ip_wrapper_sim.sv +154 -0
- data/lib/axi/cfg.yml +15 -0
- data/lib/axi/common/ClockSameDomain.sv +128 -0
- data/lib/axi/common/common_ram_sim_wrapper.rb +66 -0
- data/lib/axi/common/common_ram_sim_wrapper.sv +75 -0
- data/lib/axi/common/common_ram_wrapper.rb +71 -0
- data/lib/axi/common/common_ram_wrapper.sv +82 -0
- data/lib/axi/common/data_c_interface_dram.rb +90 -0
- data/lib/axi/common/data_c_interface_dram.sv +106 -0
- data/lib/axi/common/mem_format.coe +60 -0
- data/lib/axi/common/pipe_vld.sv +45 -0
- data/lib/axi/common/test_write_mem.sv +22 -0
- data/lib/axi/common/xilinx_hdl_dpram.sv +142 -0
- data/lib/axi/common/xilinx_hdl_dpram_sim.sv +176 -0
- data/lib/axi/common_fifo/common_fifo.sv +165 -0
- data/lib/axi/common_fifo/common_stack.sv +56 -0
- data/lib/axi/common_fifo/independent_clock_fifo.sv +200 -0
- data/lib/axi/common_fifo/independent_clock_fifo_a1.sv +202 -0
- data/lib/axi/common_fifo/independent_stack.sv +85 -0
- data/lib/axi/data_interface/data_connect_pipe.sv +228 -0
- data/lib/axi/data_interface/data_inf_A2B.sv +21 -0
- data/lib/axi/data_interface/data_inf_B2A.sv +21 -0
- data/lib/axi/data_interface/data_inf_c/data_bind.sv +74 -0
- data/lib/axi/data_interface/data_inf_c/data_c_cache.sv +49 -0
- data/lib/axi/data_interface/data_inf_c/data_c_direct.sv +51 -0
- data/lib/axi/data_interface/data_inf_c/data_c_direct_mirror.sv +28 -0
- data/lib/axi/data_interface/data_inf_c/data_c_intc_M2S_force_robin.rb.bak +268 -0
- data/lib/axi/data_interface/data_inf_c/data_c_intc_M2S_force_robin.sv +301 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_force_vld.sv +57 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_force_vld_bind_data.sv +81 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf.sv +130 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_A1.sv +135 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_left_shift.sv +158 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_right_shift.sv +155 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_right_shift_verb.sv +174 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_C1.sv +296 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_C1_with_id.sv +58 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_best_last.sv +319 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_best_robin.sv +293 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_robin.sv +296 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_robin_with_id.sv +46 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc.sv +405 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr.sv +226 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_id.sv +54 -0
- data/lib/axi/data_interface/data_inf_c/data_c_pipe_latency.sv +68 -0
- data/lib/axi/data_interface/data_inf_c/data_c_scaler.sv +326 -0
- data/lib/axi/data_interface/data_inf_c/data_c_scaler_A1.sv +333 -0
- data/lib/axi/data_interface/data_inf_c/data_c_tmp_cache.sv +44 -0
- data/lib/axi/data_interface/data_inf_c/data_condition_mirror.sv +64 -0
- data/lib/axi/data_interface/data_inf_c/data_condition_valve.sv +53 -0
- data/lib/axi/data_interface/data_inf_c/data_connect_pipe_inf.sv +73 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_M2S_with_addr_and_id.sv +66 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_M2S_with_id.sv +67 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M.sv +70 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M_A1.sv +72 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M_with_lazy.sv +49 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_interconnect_M2S.sv +50 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_pipe_condition.sv +33 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_planer.sv +50 -0
- data/lib/axi/data_interface/data_inf_c/data_inf_c_planer_A1.sv +53 -0
- data/lib/axi/data_interface/data_inf_c/data_intc_M2S_force_robin.sv +31 -0
- data/lib/axi/data_interface/data_inf_c/data_mirrors.sv +108 -0
- data/lib/axi/data_interface/data_inf_c/data_mirrors_verb.sv.bak +101 -0
- data/lib/axi/data_interface/data_inf_c/data_uncompress.sv +150 -0
- data/lib/axi/data_interface/data_inf_c/data_valve.sv +26 -0
- data/lib/axi/data_interface/data_inf_c/next_prio.sv +42 -0
- data/lib/axi/data_interface/data_inf_c/trigger_data_inf_c.sv +51 -0
- data/lib/axi/data_interface/data_inf_c/trigger_data_inf_c_A1.sv +54 -0
- data/lib/axi/data_interface/data_inf_c/trigger_ready_ctrl.sv +33 -0
- data/lib/axi/data_interface/data_inf_c/vcs_data_c_comptable.sv +40 -0
- data/lib/axi/data_interface/data_inf_cross_clk.sv +40 -0
- data/lib/axi/data_interface/data_inf_intc_M2S_force_addr_with_id.sv +62 -0
- data/lib/axi/data_interface/data_inf_intc_M2S_prio.sv +152 -0
- data/lib/axi/data_interface/data_inf_intc_M2S_prio_with_id.sv +55 -0
- data/lib/axi/data_interface/data_inf_interconnect_M2S_noaddr.sv +136 -0
- data/lib/axi/data_interface/data_inf_interconnect_M2S_with_id_noaddr.sv +55 -0
- data/lib/axi/data_interface/data_inf_planer.sv +59 -0
- data/lib/axi/data_interface/data_inf_planer_A1.sv +66 -0
- data/lib/axi/data_interface/data_inf_ticktock.sv +154 -0
- data/lib/axi/data_interface/data_interface.sv +91 -0
- data/lib/axi/data_interface/data_interface_pkg.sv +79 -0
- data/lib/axi/data_interface/data_pair_map.sv +152 -0
- data/lib/axi/data_interface/data_pair_map_A1.sv +159 -0
- data/lib/axi/data_interface/data_pair_map_A2.sv +212 -0
- data/lib/axi/data_interface/data_pipe_intc_M2S_addr.sv.bak +231 -0
- data/lib/axi/data_interface/data_pipe_interconnect.sv +290 -0
- data/lib/axi/data_interface/data_pipe_interconnect_M2S.sv +236 -0
- data/lib/axi/data_interface/data_pipe_interconnect_M2S.sv.bak1012 +237 -0
- data/lib/axi/data_interface/data_pipe_interconnect_M2S_A1.sv +241 -0
- data/lib/axi/data_interface/data_pipe_interconnect_M2S_verb.sv +302 -0
- data/lib/axi/data_interface/data_pipe_interconnect_M2S_verb.sv.bad_work +280 -0
- data/lib/axi/data_interface/data_pipe_interconnect_S2M.sv +332 -0
- data/lib/axi/data_interface/data_pipe_interconnect_S2M_A1.sv +376 -0
- data/lib/axi/data_interface/data_pipe_interconnect_S2M_verb.sv +265 -0
- data/lib/axi/data_interface/data_streams_combin.sv +592 -0
- data/lib/axi/data_interface/data_streams_combin_A1.sv +621 -0
- data/lib/axi/data_interface/data_streams_scaler.sv +593 -0
- data/lib/axi/data_interface/datainf_c_master_empty.sv +22 -0
- data/lib/axi/data_interface/datainf_c_slaver_empty.sv +22 -0
- data/lib/axi/data_interface/datainf_master_empty.sv +22 -0
- data/lib/axi/data_interface/datainf_slaver_empty.sv +22 -0
- data/lib/axi/data_interface/part_data_pair_map.sv +111 -0
- data/lib/axi/interface_define/axi_aux_inf.sv +206 -0
- data/lib/axi/interface_define/axi_inf.sv +1256 -0
- data/lib/axi/interface_define/axi_inf_verb.sv +42 -0
- data/lib/axi/interface_define/axi_interface_instance.svo +13 -0
- data/lib/axi/interface_define/axi_lite_inf.sv +345 -0
- data/lib/axi/interface_define/axi_stream_inf.sv +108 -0
- data/lib/axi/interface_define/bak/axi_aux_inf.sv +206 -0
- data/lib/axi/interface_define/bak/axi_inf_verb.sv +42 -0
- data/lib/axi/interface_define/bak/axi_interface_instance.svo +13 -0
- data/lib/axi/interface_define/bak/microblaze_inf.sv +136 -0
- data/lib/axi/interface_define/bak/xilinx_axi4_to_axi4.sv +87 -0
- data/lib/axi/interface_define/bak/xilinx_lite_to_lite.sv +128 -0
- data/lib/axi/interface_define/lite_inf2_to_inf.sv +38 -0
- data/lib/axi/interface_define/xilinx_axi4_to_axi4.sv +87 -0
- data/lib/axi/interface_define/xilinx_lite_to_lite.sv +128 -0
- data/lib/axi/macro/axil_macro.sv +132 -0
- data/lib/axi/macro/bak/axi4_base_files_add_to_vivado.tcl +28 -0
- data/lib/axi/macro/bak/axi_macro.sv +15 -0
- data/lib/axi/macro/bak/axis_base_files_add_to_vivado.tcl +26 -0
- data/lib/axi/macro/bak/base_files_add_to_vivado.tcl +24 -0
- data/lib/axi/macro/bak/data_inf_base_files_add_to_vivado.tcl +22 -0
- data/lib/axi/macro/bak/lite_inf_base_files_add_to_vivado.tcl +4 -0
- data/lib/axi/macro/bak/standard_tcl.rb +28 -0
- data/lib/axi/macro/bak/system_macro.sv +19 -0
- data/lib/axi/macro/bak/tcl_axi4_base_files_add_to_vivado.tcl +28 -0
- data/lib/axi/macro/bak/tcl_axis_base_files_add_to_vivado.tcl +26 -0
- data/lib/axi/macro/bak/tcl_base_files_add_to_vivado.tcl +24 -0
- data/lib/axi/macro/bak/tcl_data_inf_base_files_add_to_vivado.tcl +22 -0
- data/lib/axi/macro/bak/tcl_lite_inf_base_files_add_to_vivado.tcl +4 -0
- data/lib/axi/macro/bak/tcl_tmp.tcl +12 -0
- data/lib/axi/macro/bak/tmp.tcl +13 -0
- data/lib/axi/platform_ip/fifo_10_18bit_long.sv +125 -0
- data/lib/axi/platform_ip/fifo_145_216bit_A1.sv +167 -0
- data/lib/axi/platform_ip/fifo_217_288bit_A1.sv +191 -0
- data/lib/axi/platform_ip/fifo_36bit.sv +77 -0
- data/lib/axi/platform_ip/fifo_36bit_A1.sv +113 -0
- data/lib/axi/platform_ip/fifo_36kb_long.sv +145 -0
- data/lib/axi/platform_ip/fifo_37_72bit.sv +77 -0
- data/lib/axi/platform_ip/fifo_505_576bit_A1.sv +141 -0
- data/lib/axi/platform_ip/fifo_73_96bit.sv +102 -0
- data/lib/axi/platform_ip/fifo_97_144bit.sv +102 -0
- data/lib/axi/platform_ip/fifo_97_144bit_A1.sv +133 -0
- data/lib/axi/platform_ip/fifo_ku.sv +212 -0
- data/lib/axi/platform_ip/fifo_ku.sv.bak +488 -0
- data/lib/axi/platform_ip/fifo_ku_18bit.sv +138 -0
- data/lib/axi/platform_ip/fifo_ku_36bit.sv +148 -0
- data/lib/axi/platform_ip/fifo_ku_36kb_long.sv +135 -0
- data/lib/axi/platform_ip/fifo_ku_xbit_8192.sv.bak +107 -0
- data/lib/axi/platform_ip/fifo_wr_rd_mark.sv +94 -0
- data/lib/axi/platform_ip/ku_long_fifo_4bit.sv +189 -0
- data/lib/axi/platform_ip/long_fifo.sv +72 -0
- data/lib/axi/platform_ip/long_fifo_4bit.sv +156 -0
- data/lib/axi/platform_ip/long_fifo_4bit_8192.sv +133 -0
- data/lib/axi/platform_ip/long_fifo_4bit_SL8192.sv +133 -0
- data/lib/axi/platform_ip/long_fifo_verb.sv +110 -0
- data/lib/axi/platform_ip/wide_fifo.sv +66 -0
- data/lib/axi/platform_ip/wide_fifo_7series.sv +136 -0
- data/lib/axi/platform_ip/xilinx_fifo.sv +174 -0
- data/lib/axi/platform_ip/xilinx_fifo_A1.sv +223 -0
- data/lib/axi/platform_ip/xilinx_fifo_verb.sv +87 -0
- data/lib/axi/platform_ip/xilinx_fifo_verc.sv +87 -0
- data/lib/axi/platform_ip/xilinx_stream_packet_fifo_ip.sv +40 -0
- data/lib/axi/top/axi4_data_convert_2_20_tb.sv +126 -0
- data/lib/axi/top/axi4_data_convert_5_24_tb.sv +156 -0
- data/lib/axi/top/axi4_interconnnect_2_24_tb.sv +143 -0
- data/lib/axi/top/axi4_interconnnect_5_23_tb.sv +155 -0
- data/lib/axi/top/axi4_merge_tb_0331.sv +120 -0
- data/lib/axi/top/axi4_packet_fifo_2_28_tb.sv +107 -0
- data/lib/axi/top/axi4_partition_2_23_tb.sv +93 -0
- data/lib/axi/top/axi_stream_packet_fifo_2_28_tb.sv +78 -0
- data/lib/axi/top/axis_length_cut_2_28_tb.sv +79 -0
- data/lib/axi/top/axis_length_fill_8_18_tb.sv +81 -0
- data/lib/axi/top/common_fifo_2_27_tb.sv +77 -0
- data/lib/axi/top/data_convert_2_16_tb.sv +162 -0
- data/lib/axi/top/independent_fifo_2_27_tb.sv +90 -0
- data/lib/axi/top/long_to_wide_3_1_tb.sv +142 -0
- data/lib/axi/top/odd_width_convert_tb_420.sv +83 -0
- data/lib/axi/top/tb_axis_m2s_A1_0115.sv +158 -0
- data/lib/axi/top/tb_axis_width_combin_0913.sv +57 -0
- data/lib/axi/top/tb_axis_width_test_0914.sv +115 -0
- data/lib/axi/top/tb_data_c_inf_M2S_0823.sv +154 -0
- data/lib/axi/top/tb_data_c_inf_M2S_addr_0824.sv +252 -0
- data/lib/axi/top/tb_data_c_pipe_force_vld_1228.sv +96 -0
- data/lib/axi/top/tb_data_c_scaler_20180413.sv +187 -0
- data/lib/axi/top/tb_data_intc_S2M_0807.sv +168 -0
- data/lib/axi/top/tb_test_ku_fifo_0919.sv +98 -0
- data/lib/axi/top/width_convert_verb_tb_523.sv +68 -0
- data/lib/axi/video/video_stream_2_axi_stream.sv +90 -0
- data/lib/axi/video_interface/video_interface.sv +173 -0
- data/lib/axi_tdl.rb +6 -0
- data/lib/axi_tdl/version.rb +3 -0
- data/lib/spec/spec_helper.rb +100 -0
- data/lib/tdl/LICENSE +504 -0
- data/lib/tdl/Logic/Logic.tar.gz +0 -0
- data/lib/tdl/Logic/clock_rst_verb_auto.rb +99 -0
- data/lib/tdl/Logic/logic_edge.rb +194 -0
- data/lib/tdl/Logic/logic_latency.rb +197 -0
- data/lib/tdl/Logic/logic_main.rb +188 -0
- data/lib/tdl/Logic/logic_operator.rb.bak +128 -0
- data/lib/tdl/Logic/mdio_model_auto.rb +77 -0
- data/lib/tdl/Logic/path_lib.rb +7 -0
- data/lib/tdl/Logic/redefine_operator.rb +28 -0
- data/lib/tdl/ReadMe.md +295 -0
- data/lib/tdl/SDL/axi4/AXI4_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_combin_wr_rd_batch_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_data_combin_aflag_pipe_A1_sdl.rb +38 -0
- data/lib/tdl/SDL/axi4/axi4_data_combin_aflag_pipe_sdl.rb +37 -0
- data/lib/tdl/SDL/axi4/axi4_data_convert_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_data_convert_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_direct_A1_sdl.rb +14 -0
- data/lib/tdl/SDL/axi4/axi4_direct_B1_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_direct_sdl.rb +14 -0
- data/lib/tdl/SDL/axi4/axi4_direct_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_direct_verc_sdl.rb +16 -0
- data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_track_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_verb_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_merge_rd_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_merge_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_merge_wr_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_mix_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_packet_fifo_sdl.rb +12 -0
- data/lib/tdl/SDL/axi4/axi4_partition_OD_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_partition_rd_OD_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_partition_rd_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_partition_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_partition_wr_OD_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_partition_wr_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_pipe_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_batch_gen_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_gen_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_gen_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_rd_burst_track_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_rd_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_A2_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_rd_packet_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_rd_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_rd_pipe_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_wr_aux_bind_data_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_batch_gen_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_without_resp_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_burst_track_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_mix_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_packet_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_wr_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_wr_pipe_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi_stream_add_addr_len_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi_stream_to_axi4_wr_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/data_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/data_destruct_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/feed_check_sdl.rb +18 -0
- data/lib/tdl/SDL/axi4/full_axi4_to_axis_partition_wr_rd_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/full_axi4_to_axis_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/id_record_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/idata_pool_axi4_sdl.rb +18 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_A2_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/odd_width_convert_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/odd_width_convert_verb_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/simple_data_pipe_sdl.rb +16 -0
- data/lib/tdl/SDL/axi4/simple_data_pipe_slaver_sdl.rb +16 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable.rb +9 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_comptable.rb +8 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/width_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_convert_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_convert_verb_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_destruct_A1_sdl.rb +22 -0
- data/lib/tdl/SDL/axi4/width_destruct_sdl.rb +19 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_35bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_36_71bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_with_keep_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_96_143bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_B1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_mirror_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A2_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_bind_tuser_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_noaddr_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_with_addr_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_auto_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_cache_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_fifo_verb_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1E_sdl.rb +16 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_verb_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_with_info_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_long_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_partition_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_partition_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_wide_fifo_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_streams_combin_A1_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axi_streams_combin_sdl.rb +16 -0
- data/lib/tdl/SDL/axistream/axi_streams_scaler_A1_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axi_streams_scaler_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axis_append_A1_sdl.rb +18 -0
- data/lib/tdl/SDL/axistream/axis_append_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/axis_base_pipe_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_combin_with_fifo_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_right_shift_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_with_info_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_direct_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_direct_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_ex_status_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_filter_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_full_to_data_c_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_head_cut_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_inct_s2m_with_flag_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_intc_M2S_with_addr_inf_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_intc_S2M_with_addr_inf_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_interconnect_S2M_pipe_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axis_length_cut_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_fill_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_split_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_split_with_addr_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axis_length_split_writh_user_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_link_trigger_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/axis_mirror_to_master_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_mirrors_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axis_orthogonal_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_ram_buffer_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axis_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/axis_slaver_pipe_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_slaver_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_slaver_vector_empty_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_to_data_inf_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_to_lite_rd_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_to_lite_wr_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_uncompress_A1_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_uncompress_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_valve_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_valve_with_pipe_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_width_combin_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_combin_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_convert_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_destruct_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_destruct_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/check_stream_crc_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/data_c_to_axis_full_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/data_to_axis_inf_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/data_to_axis_inf_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/gen_big_field_table_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/gen_common_frame_table_sdl.rb +60 -0
- data/lib/tdl/SDL/axistream/gen_origin_axis_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/gen_origin_axis_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/gen_simple_axis_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_A1_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_A2_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/stream_crc_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/vcs_axis_comptable.rb +16 -0
- data/lib/tdl/SDL/axistream/vcs_axis_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_bind_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_direct_mirror_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_direct_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_intc_M2S_force_robin_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_bind_data_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_right_shift_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_with_id_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_id_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_latency_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_scaler_A1_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_c_scaler_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_c_tmp_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_condition_mirror_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_condition_valve_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_connect_pipe_inf_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_connect_pipe_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_A2B_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_B2A_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_M2S_with_addr_and_id_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_M2S_with_id_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_with_lazy_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_interconnect_M2S_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_pipe_condition_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_cross_clk_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_force_addr_with_id_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_with_id_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_noaddr_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_with_id_noaddr_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_planer_A1_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_planer_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_ticktock_sdl.rb +18 -0
- data/lib/tdl/SDL/data_inf_c/data_intc_M2S_force_robin_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_mirrors_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_A1_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_A2_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_A1_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_verb_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_A1_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_verb_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_sdl.rb +23 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_combin_A1_sdl.rb +20 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_scaler_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_uncompress_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/data_valve_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/datainf_c_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_c_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/latency_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/next_prio_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/part_data_pair_map_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/trigger_ready_ctrl_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/fifo/common_fifo_sdl.rb +20 -0
- data/lib/tdl/SDL/fifo/common_stack_sdl.rb +14 -0
- data/lib/tdl/SDL/fifo/independent_clock_fifo_a1_sdl.rb +21 -0
- data/lib/tdl/SDL/fifo/independent_clock_fifo_sdl.rb +20 -0
- data/lib/tdl/SDL/fifo/independent_stack_sdl.rb +18 -0
- data/lib/tdl/SDL/path_lib.rb +6 -0
- data/lib/tdl/VideoInf/simple_video_gen.rb +46 -0
- data/lib/tdl/VideoInf/video_from_axi4.rb +108 -0
- data/lib/tdl/VideoInf/video_lib.rb +8 -0
- data/lib/tdl/VideoInf/video_stream_2_axi_stream.rb +67 -0
- data/lib/tdl/VideoInf/video_to_axi4.rb +75 -0
- data/lib/tdl/auto_script/auto_gen_tdl.rb +49 -0
- data/lib/tdl/auto_script/autogensdl.rb +289 -0
- data/lib/tdl/auto_script/autogentdl_a2.rb +452 -0
- data/lib/tdl/auto_script/import_hdl.rb +35 -0
- data/lib/tdl/auto_script/import_sdl.rb +26 -0
- data/lib/tdl/auto_script/test_autogensdl.rb +73 -0
- data/lib/tdl/auto_script/tmp.rb +6 -0
- data/lib/tdl/auto_script/tmp/hdl_test_sdl.rb +12 -0
- data/lib/tdl/axi4/axi4_combin_wr_rd_batch_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_direct.rb +36 -0
- data/lib/tdl/axi4/axi4_direct_A1_auto.rb +137 -0
- data/lib/tdl/axi4/axi4_direct_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_direct_verb_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_interconnect_verb.rb +323 -0
- data/lib/tdl/axi4/axi4_lib.rb +9 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_A1_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_verb_auto.rb +86 -0
- data/lib/tdl/axi4/axi4_packet_fifo_auto.rb +155 -0
- data/lib/tdl/axi4/axi4_pipe_auto.rb +127 -0
- data/lib/tdl/axi4/axi4_pipe_verb_auto.rb +127 -0
- data/lib/tdl/axi4/axi4_rd_auxiliary_gen_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_wr_auxiliary_gen_without_resp_auto.rb +78 -0
- data/lib/tdl/axi4/axis_to_axi4_wr_auto.rb +85 -0
- data/lib/tdl/axi4/bak/__axi4_wr_auxiliary_gen_without_resp.rb +175 -0
- data/lib/tdl/axi4/bak/axi4_combin_wr_rd_batch_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_data_convert.rb +74 -0
- data/lib/tdl/axi4/bak/axi4_direct_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_direct_verb_auto.rb +126 -0
- data/lib/tdl/axi4/bak/axi4_interconnect.rb.bak +91 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_A1_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_auto.rb +126 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_verb_auto.rb +179 -0
- data/lib/tdl/axi4/bak/axi4_packet_fifo.rb.bak +75 -0
- data/lib/tdl/axi4/bak/axi4_packet_fifo_auto.rb +259 -0
- data/lib/tdl/axi4/bak/axi4_partition_od.rb +84 -0
- data/lib/tdl/axi4/bak/axi4_pipe_auto.rb +174 -0
- data/lib/tdl/axi4/bak/axi4_wr_auxiliary_gen_without_resp_auto.rb +152 -0
- data/lib/tdl/axi4/bak/axis_to_axi4_wr_auto.rb +178 -0
- data/lib/tdl/axi4/bak/ddr3.rb +40 -0
- data/lib/tdl/axi4/bak/idata_pool_axi4_auto.rb +396 -0
- data/lib/tdl/axi4/bak/odata_pool_axi4_A1_auto.rb +230 -0
- data/lib/tdl/axi4/bak/odata_pool_axi4_auto.rb +386 -0
- data/lib/tdl/axi4/idata_pool_axi4_auto.rb +176 -0
- data/lib/tdl/axi4/odata_pool_axi4_A1_auto.rb +99 -0
- data/lib/tdl/axi4/odata_pool_axi4_auto.rb +141 -0
- data/lib/tdl/axi4/wide_axis_to_axi4_wr.rb +84 -0
- data/lib/tdl/axi4/wide_axis_to_axi4_wr_auto.rb +84 -0
- data/lib/tdl/axi_lite/axi_lite_master_empty_auto.rb +85 -0
- data/lib/tdl/axi_lite/axi_lite_slaver_empty_auto.rb +68 -0
- data/lib/tdl/axi_lite/bak/axi_lite_master_empty_auto.rb +95 -0
- data/lib/tdl/axi_lite/bak/axi_lite_slaver_empty_auto.rb +88 -0
- data/lib/tdl/axi_lite/bak/jtag_to_axilite_wrapper_auto.rb +112 -0
- data/lib/tdl/axi_lite/jtag_to_axilite_wrapper_auto.rb +63 -0
- data/lib/tdl/axi_lite/lite_cmd.rb +154 -0
- data/lib/tdl/axi_lite/prj_lib.rb +6 -0
- data/lib/tdl/axi_stream/axi_stream_cache_35bit_auto.rb +127 -0
- data/lib/tdl/axi_stream/axi_stream_cache_72_95bit_with_keep_auto.rb +127 -0
- data/lib/tdl/axi_stream/axi_stream_cache_B1_auto.rb +127 -0
- data/lib/tdl/axi_stream/axi_stream_cache_auto.rb +134 -0
- data/lib/tdl/axi_stream/axi_stream_cache_mirror_auto.rb +127 -0
- data/lib/tdl/axi_stream/axi_stream_cache_verb_auto.rb +127 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect.rb +214 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_M2S.rb +85 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_A1.rb +129 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_A1_auto.rb +137 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_auto.rb +93 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_bind_tuser_auto.rb +137 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_S2M.rb +86 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_auto.rb +86 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_auto_auto.rb +91 -0
- data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_with_keep.sv_auto.rb +93 -0
- data/lib/tdl/axi_stream/axi_stream_lib.rb +18 -0
- data/lib/tdl/axi_stream/axi_stream_long_cache_auto.rb +137 -0
- data/lib/tdl/axi_stream/axi_stream_long_fifo_auto.rb +146 -0
- data/lib/tdl/axi_stream/axi_stream_long_fifo_verb_auto.rb +146 -0
- data/lib/tdl/axi_stream/axi_stream_packet_fifo_auto.rb +137 -0
- data/lib/tdl/axi_stream/axi_stream_packet_fifo_with_info_auto.rb +164 -0
- data/lib/tdl/axi_stream/axi_stream_partition_A1_auto.rb +145 -0
- data/lib/tdl/axi_stream/axi_stream_partition_auto.rb +154 -0
- data/lib/tdl/axi_stream/axi_stream_wide_fifo_auto.rb +137 -0
- data/lib/tdl/axi_stream/axi_streams_combin_A1_auto.rb +184 -0
- data/lib/tdl/axi_stream/axi_streams_combin_auto.rb +193 -0
- data/lib/tdl/axi_stream/axi_streams_scaler_A1_auto.rb +175 -0
- data/lib/tdl/axi_stream/axi_streams_scaler_auto.rb +184 -0
- data/lib/tdl/axi_stream/axis_append_A1_auto.rb +209 -0
- data/lib/tdl/axi_stream/axis_append_auto.rb +200 -0
- data/lib/tdl/axi_stream/axis_combin_with_fifo_auto.rb +175 -0
- data/lib/tdl/axi_stream/axis_connect_pipe_A1.sv_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_connect_pipe_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_connect_pipe_with_info_auto.rb +155 -0
- data/lib/tdl/axi_stream/axis_direct_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_filter_auto.rb +136 -0
- data/lib/tdl/axi_stream/axis_full_to_data_c_auto.rb +71 -0
- data/lib/tdl/axi_stream/axis_head_cut_auto.rb +137 -0
- data/lib/tdl/axi_stream/axis_length_fill_auto.rb +136 -0
- data/lib/tdl/axi_stream/axis_length_split_auto.rb +136 -0
- data/lib/tdl/axi_stream/axis_length_split_with_addr_auto.rb +164 -0
- data/lib/tdl/axi_stream/axis_length_split_writh_user_auto.rb +136 -0
- data/lib/tdl/axi_stream/axis_link_trigger_auto.rb +93 -0
- data/lib/tdl/axi_stream/axis_master_empty_auto.rb +85 -0
- data/lib/tdl/axi_stream/axis_mirror_to_master_auto.rb +137 -0
- data/lib/tdl/axi_stream/axis_mirrors_auto.rb +173 -0
- data/lib/tdl/axi_stream/axis_pkt_fifo_filter_keep_A1_auto.rb +137 -0
- data/lib/tdl/axi_stream/axis_pkt_fifo_filter_keep_auto.rb +137 -0
- data/lib/tdl/axi_stream/axis_ram_buffer_auto.rb +164 -0
- data/lib/tdl/axi_stream/axis_slaver_empty_auto.rb +68 -0
- data/lib/tdl/axi_stream/axis_slaver_pipe_A1_auto.rb +137 -0
- data/lib/tdl/axi_stream/axis_slaver_pipe_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_to_axi4_or_lite_auto.rb +87 -0
- data/lib/tdl/axi_stream/axis_to_data_inf_auto.rb +79 -0
- data/lib/tdl/axi_stream/axis_to_lite_rd_auto.rb +87 -0
- data/lib/tdl/axi_stream/axis_to_lite_wr_auto.rb +79 -0
- data/lib/tdl/axi_stream/axis_uncompress_auto.rb +86 -0
- data/lib/tdl/axi_stream/axis_valve_auto.rb +136 -0
- data/lib/tdl/axi_stream/axis_valve_with_pipe_auto.rb +153 -0
- data/lib/tdl/axi_stream/axis_width_combin_A1_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_width_combin_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_width_convert_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_width_destruct_A1.sv_auto.rb +127 -0
- data/lib/tdl/axi_stream/axis_width_destruct_auto.rb +127 -0
- data/lib/tdl/axi_stream/bak/__axi_stream_interconnect_S2M.rb +186 -0
- data/lib/tdl/axi_stream/bak/_axis_mirrors.rb +270 -0
- data/lib/tdl/axi_stream/bak/axi4_to_native_for_ddr_ip_verb_auto.rb +343 -0
- data/lib/tdl/axi_stream/bak/axi_stream_S2M.rb +63 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_35bit_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_72_95bit_with_keep_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_B1_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_mirror_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_cache_verb_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axi_stream_interconnect_S2M_auto.rb +147 -0
- data/lib/tdl/axi_stream/bak/axi_stream_interconnect_S2M_with_keep.sv_auto.rb +166 -0
- data/lib/tdl/axi_stream/bak/axi_stream_long_fifo_auto.rb +177 -0
- data/lib/tdl/axi_stream/bak/axi_stream_packet_fifo_auto.rb +158 -0
- data/lib/tdl/axi_stream/bak/axi_stream_packet_fifo_with_info_auto.rb +215 -0
- data/lib/tdl/axi_stream/bak/axi_stream_partition_A1_auto.rb +176 -0
- data/lib/tdl/axi_stream/bak/axi_stream_partition_auto.rb +195 -0
- data/lib/tdl/axi_stream/bak/axi_streams_combin_auto.rb +274 -0
- data/lib/tdl/axi_stream/bak/axi_streams_scaler.rb +300 -0
- data/lib/tdl/axi_stream/bak/axi_streams_scaler_auto.rb +255 -0
- data/lib/tdl/axi_stream/bak/axis_append_A1.rb +265 -0
- data/lib/tdl/axi_stream/bak/axis_append_A1_auto.rb +310 -0
- data/lib/tdl/axi_stream/bak/axis_append_auto.rb +291 -0
- data/lib/tdl/axi_stream/bak/axis_combin_with_fifo_auto.rb +236 -0
- data/lib/tdl/axi_stream/bak/axis_connect_pipe.rb.bak +207 -0
- data/lib/tdl/axi_stream/bak/axis_connect_pipe_A1.sv_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_connect_pipe_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_connect_pipe_with_info_auto.rb +196 -0
- data/lib/tdl/axi_stream/bak/axis_direct_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_filter_auto.rb +157 -0
- data/lib/tdl/axi_stream/bak/axis_length_fill_auto.rb +157 -0
- data/lib/tdl/axi_stream/bak/axis_length_split_auto.rb +157 -0
- data/lib/tdl/axi_stream/bak/axis_length_split_with_addr_auto.rb +215 -0
- data/lib/tdl/axi_stream/bak/axis_master_empty_auto.rb +95 -0
- data/lib/tdl/axi_stream/bak/axis_mirrors_auto.rb +234 -0
- data/lib/tdl/axi_stream/bak/axis_pkt_fifo_filter_keep_auto.rb +158 -0
- data/lib/tdl/axi_stream/bak/axis_ram_buffer_auto.rb +215 -0
- data/lib/tdl/axi_stream/bak/axis_slaver_empty_auto.rb +88 -0
- data/lib/tdl/axi_stream/bak/axis_slaver_pipe_A1_auto.rb +158 -0
- data/lib/tdl/axi_stream/bak/axis_slaver_pipe_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_to_axi4_wr_auto.rb +205 -0
- data/lib/tdl/axi_stream/bak/axis_to_data_inf_auto.rb +108 -0
- data/lib/tdl/axi_stream/bak/axis_uncompress_auto.rb +147 -0
- data/lib/tdl/axi_stream/bak/axis_valve_auto.rb +157 -0
- data/lib/tdl/axi_stream/bak/axis_valve_with_pipe_auto.rb +157 -0
- data/lib/tdl/axi_stream/bak/axis_width_combin_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_width_convert_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_width_destruct_auto.rb +138 -0
- data/lib/tdl/axi_stream/bak/axis_wrapper_oled_auto.rb +230 -0
- data/lib/tdl/axi_stream/bak/check_stream_crc_auto.rb +88 -0
- data/lib/tdl/axi_stream/bak/data_to_axis_inf_A1.rb +129 -0
- data/lib/tdl/axi_stream/bak/data_to_axis_inf_A1_auto.rb +127 -0
- data/lib/tdl/axi_stream/bak/data_to_axis_inf_auto.rb +146 -0
- data/lib/tdl/axi_stream/bak/datainf_c_master_empty_auto.rb +115 -0
- data/lib/tdl/axi_stream/bak/datainf_c_slaver_empty_auto.rb +108 -0
- data/lib/tdl/axi_stream/bak/datainf_master_empty_auto.rb +115 -0
- data/lib/tdl/axi_stream/bak/datainf_slaver_empty_auto.rb +108 -0
- data/lib/tdl/axi_stream/bak/dynamic_port_cfg_auto.rb +246 -0
- data/lib/tdl/axi_stream/bak/dynnamic_addr_cfg_auto.rb +200 -0
- data/lib/tdl/axi_stream/bak/gen_big_field_table_auto.rb +210 -0
- data/lib/tdl/axi_stream/bak/gen_origin_axis_auto.rb +172 -0
- data/lib/tdl/axi_stream/bak/gen_simple_axis_auto.rb +191 -0
- data/lib/tdl/axi_stream/bak/idata_pool_axi4_auto.rb +346 -0
- data/lib/tdl/axi_stream/bak/parse_big_field_table_A1_auto.rb +292 -0
- data/lib/tdl/axi_stream/bak/parse_big_field_table_A2_auto.rb +292 -0
- data/lib/tdl/axi_stream/bak/parse_big_field_table_auto.rb +292 -0
- data/lib/tdl/axi_stream/bak/part_data_pair_map_auto.rb +362 -0
- data/lib/tdl/axi_stream/bak/simple_video_gen_A2.rb +146 -0
- data/lib/tdl/axi_stream/bak/simple_video_gen_A2_auto.rb +151 -0
- data/lib/tdl/axi_stream/bak/stream_crc_auto.rb +107 -0
- data/lib/tdl/axi_stream/bak/udp_server_bfm_auto.rb +131 -0
- data/lib/tdl/axi_stream/bak/udp_server_ctrl_bfm_auto.rb +131 -0
- data/lib/tdl/axi_stream/bak/video_to_VDMA.rb +153 -0
- data/lib/tdl/axi_stream/bak/video_to_VDMA_auto.rb +158 -0
- data/lib/tdl/axi_stream/check_stream_crc_auto.rb +63 -0
- data/lib/tdl/axi_stream/data_c_to_axis_full_auto.rb +71 -0
- data/lib/tdl/axi_stream/data_to_axis_inf_A1_auto.rb +78 -0
- data/lib/tdl/axi_stream/data_to_axis_inf_auto.rb +85 -0
- data/lib/tdl/axi_stream/gen_big_field_table_auto.rb +140 -0
- data/lib/tdl/axi_stream/gen_origin_axis_A1_auto.rb +131 -0
- data/lib/tdl/axi_stream/gen_origin_axis_auto.rb +122 -0
- data/lib/tdl/axi_stream/gen_simple_axis_auto.rb +131 -0
- data/lib/tdl/axi_stream/parse_big_field_table_A1_auto.rb +201 -0
- data/lib/tdl/axi_stream/parse_big_field_table_A2_auto.rb +201 -0
- data/lib/tdl/axi_stream/parse_big_field_table_auto.rb +201 -0
- data/lib/tdl/axi_stream/stream_crc_auto.rb +70 -0
- data/lib/tdl/basefunc.rb +338 -0
- data/lib/tdl/bfm/axi4_illegal_bfm.rb +203 -0
- data/lib/tdl/bfm/axi_stream/axi_stream_bfm.rb +351 -0
- data/lib/tdl/bfm/axi_stream/axis_bfm_exp.yml +38 -0
- data/lib/tdl/bfm/axi_stream/axis_bfm_module_build.rb +120 -0
- data/lib/tdl/bfm/axi_stream/axis_bfm_parse.rb +10 -0
- data/lib/tdl/bfm/axi_stream/axis_slice_to_logic.rb +71 -0
- data/lib/tdl/bfm/bfm_lib.rb +7 -0
- data/lib/tdl/bfm/logic_initial_block.rb +52 -0
- data/lib/tdl/cfg.yml +4 -0
- data/lib/tdl/class_hdl/hdl_always_comb.rb +54 -0
- data/lib/tdl/class_hdl/hdl_always_ff.rb +175 -0
- data/lib/tdl/class_hdl/hdl_assign.rb +49 -0
- data/lib/tdl/class_hdl/hdl_block_ifelse.rb +349 -0
- data/lib/tdl/class_hdl/hdl_data.rb +24 -0
- data/lib/tdl/class_hdl/hdl_ex_defarraychain.rb +231 -0
- data/lib/tdl/class_hdl/hdl_foreach.rb +114 -0
- data/lib/tdl/class_hdl/hdl_function.rb +277 -0
- data/lib/tdl/class_hdl/hdl_generate.rb +218 -0
- data/lib/tdl/class_hdl/hdl_initial.rb +147 -0
- data/lib/tdl/class_hdl/hdl_module_def.rb +447 -0
- data/lib/tdl/class_hdl/hdl_package.rb +150 -0
- data/lib/tdl/class_hdl/hdl_parameter.rb +73 -0
- data/lib/tdl/class_hdl/hdl_random.rb +31 -0
- data/lib/tdl/class_hdl/hdl_redefine_opertor.rb +653 -0
- data/lib/tdl/class_hdl/hdl_struct.rb +209 -0
- data/lib/tdl/class_hdl/hdl_verify.rb +136 -0
- data/lib/tdl/data_inf/_data_mirrors.rb +92 -0
- data/lib/tdl/data_inf/bak/_data_mirrors.rb +273 -0
- data/lib/tdl/data_inf/bak/common_fifo_auto.rb +279 -0
- data/lib/tdl/data_inf/bak/data_bind_auto.rb +128 -0
- data/lib/tdl/data_inf/bak/data_c_direct_auto.rb +138 -0
- data/lib/tdl/data_inf/bak/data_c_direct_mirror_auto.rb +138 -0
- data/lib/tdl/data_inf/bak/data_c_tmp_cache_auto.rb +138 -0
- data/lib/tdl/data_inf/bak/data_condition_mirror_auto.rb +216 -0
- data/lib/tdl/data_inf/bak/data_condition_valve_auto.rb +215 -0
- data/lib/tdl/data_inf/bak/data_connect_pipe.rb +80 -0
- data/lib/tdl/data_inf/bak/data_connect_pipe_inf_auto.rb +138 -0
- data/lib/tdl/data_inf/bak/data_inf_c_interconnect.rb +86 -0
- data/lib/tdl/data_inf/bak/data_inf_c_pipe_condition_auto.rb +157 -0
- data/lib/tdl/data_inf/bak/data_inf_cross_clk.rb +60 -0
- data/lib/tdl/data_inf/bak/data_inf_interconnect.rb +144 -0
- data/lib/tdl/data_inf/bak/data_inf_planer.rb +78 -0
- data/lib/tdl/data_inf/bak/data_inf_ticktack.rb +80 -0
- data/lib/tdl/data_inf/bak/data_inf_ticktock_auto.rb +0 -0
- data/lib/tdl/data_inf/bak/data_mirrors_auto.rb +234 -0
- data/lib/tdl/data_inf/bak/data_mirrors_verb.sv_auto.rb +234 -0
- data/lib/tdl/data_inf/bak/data_uncompress_auto.rb +177 -0
- data/lib/tdl/data_inf/bak/data_valve_auto.rb +127 -0
- data/lib/tdl/data_inf/bak/datainf_c_master_empty_auto.rb +95 -0
- data/lib/tdl/data_inf/bak/datainf_c_slaver_empty_auto.rb +88 -0
- data/lib/tdl/data_inf/bak/datainf_master_empty_auto.rb +95 -0
- data/lib/tdl/data_inf/bak/datainf_slaver_empty_auto.rb +88 -0
- data/lib/tdl/data_inf/bak/independent_clock_fifo_auto.rb +298 -0
- data/lib/tdl/data_inf/bak/part_data_pair_map_auto.rb +306 -0
- data/lib/tdl/data_inf/common_fifo_auto.rb +141 -0
- data/lib/tdl/data_inf/data_bind_auto.rb +79 -0
- data/lib/tdl/data_inf/data_c_cache_auto.rb +135 -0
- data/lib/tdl/data_inf/data_c_direct_auto.rb +127 -0
- data/lib/tdl/data_inf/data_c_direct_mirror_auto.rb +127 -0
- data/lib/tdl/data_inf/data_c_interconnect.rb +97 -0
- data/lib/tdl/data_inf/data_c_pipe_force_vld_auto.rb +127 -0
- data/lib/tdl/data_inf/data_c_pipe_inf_auto.rb +127 -0
- data/lib/tdl/data_inf/data_c_pipe_intc_M2S_verc_auto.rb +123 -0
- data/lib/tdl/data_inf/data_c_tmp_cache_auto.rb +127 -0
- data/lib/tdl/data_inf/data_condition_mirror_auto.rb +165 -0
- data/lib/tdl/data_inf/data_condition_valve_auto.rb +164 -0
- data/lib/tdl/data_inf/data_connect_pipe_inf_auto.rb +127 -0
- data/lib/tdl/data_inf/data_inf_c_pipe_condition_auto.rb +136 -0
- data/lib/tdl/data_inf/data_mirrors_auto.rb +173 -0
- data/lib/tdl/data_inf/data_mirrors_verb.sv_auto.rb +173 -0
- data/lib/tdl/data_inf/data_uncompress_auto.rb +146 -0
- data/lib/tdl/data_inf/data_valve_auto.rb +104 -0
- data/lib/tdl/data_inf/datainf_c_master_empty_auto.rb +85 -0
- data/lib/tdl/data_inf/datainf_c_slaver_empty_auto.rb +68 -0
- data/lib/tdl/data_inf/datainf_master_empty_auto.rb +85 -0
- data/lib/tdl/data_inf/datainf_slaver_empty_auto.rb +68 -0
- data/lib/tdl/data_inf/independent_clock_fifo_auto.rb +141 -0
- data/lib/tdl/data_inf/part_data_pair_map_auto.rb +149 -0
- data/lib/tdl/data_inf/path_lib.rb +18 -0
- data/lib/tdl/elements/Reset.rb +153 -0
- data/lib/tdl/elements/axi4.rb +642 -0
- data/lib/tdl/elements/axi_lite.rb +246 -0
- data/lib/tdl/elements/axi_stream.rb +674 -0
- data/lib/tdl/elements/clock.rb +193 -0
- data/lib/tdl/elements/common_configure_reg.rb +135 -0
- data/lib/tdl/elements/data_inf.rb +660 -0
- data/lib/tdl/elements/logic.rb +356 -0
- data/lib/tdl/elements/mail_box.rb +64 -0
- data/lib/tdl/elements/originclass.rb +689 -0
- data/lib/tdl/elements/parameter.rb +318 -0
- data/lib/tdl/elements/track_inf.rb +163 -0
- data/lib/tdl/elements/videoinf.rb +224 -0
- data/lib/tdl/examples/10_random/exp_random.rb +13 -0
- data/lib/tdl/examples/10_random/exp_random.sv +36 -0
- data/lib/tdl/examples/11_test_unit/dve.tcl +64 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit.rb +58 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit.sv +35 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit_constraints.xdc +25 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md0.rb +23 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md0.sv +41 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md1.rb +25 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md1.sv +41 -0
- data/lib/tdl/examples/11_test_unit/tb_exp_test_unit.sv +28 -0
- data/lib/tdl/examples/11_test_unit/tu0.sv +38 -0
- data/lib/tdl/examples/11_test_unit/tu1.sv +28 -0
- data/lib/tdl/examples/1_define_module/example1.rb +39 -0
- data/lib/tdl/examples/1_define_module/exmple_md.sv +50 -0
- data/lib/tdl/examples/2_hdl_class/always_comb.rb +99 -0
- data/lib/tdl/examples/2_hdl_class/always_ff.rb +143 -0
- data/lib/tdl/examples/2_hdl_class/case.rb +93 -0
- data/lib/tdl/examples/2_hdl_class/foreach.rb +21 -0
- data/lib/tdl/examples/2_hdl_class/function.rb +34 -0
- data/lib/tdl/examples/2_hdl_class/generate.rb +62 -0
- data/lib/tdl/examples/2_hdl_class/module_def.rb +33 -0
- data/lib/tdl/examples/2_hdl_class/module_head_import_package.rb +36 -0
- data/lib/tdl/examples/2_hdl_class/module_instance_test.rb +13 -0
- data/lib/tdl/examples/2_hdl_class/package.rb +29 -0
- data/lib/tdl/examples/2_hdl_class/package2.rb +21 -0
- data/lib/tdl/examples/2_hdl_class/simple_assign.rb +39 -0
- data/lib/tdl/examples/2_hdl_class/state_case.rb +65 -0
- data/lib/tdl/examples/2_hdl_class/struct.rb +25 -0
- data/lib/tdl/examples/2_hdl_class/struct_function.rb +28 -0
- data/lib/tdl/examples/2_hdl_class/test_axi4_M2S.rb +16 -0
- data/lib/tdl/examples/2_hdl_class/test_initial_assert.rb +11 -0
- data/lib/tdl/examples/2_hdl_class/test_inst_sugar.rb +28 -0
- data/lib/tdl/examples/2_hdl_class/test_module_port.rb +47 -0
- data/lib/tdl/examples/2_hdl_class/test_module_var.rb +18 -0
- data/lib/tdl/examples/2_hdl_class/tmp/always_comb_test.sv +108 -0
- data/lib/tdl/examples/2_hdl_class/tmp/always_ff_test.sv +35 -0
- data/lib/tdl/examples/2_hdl_class/tmp/case_test.sv +105 -0
- data/lib/tdl/examples/2_hdl_class/tmp/head_pkg_module.sv +42 -0
- data/lib/tdl/examples/2_hdl_class/tmp/init_module.sv +110 -0
- data/lib/tdl/examples/2_hdl_class/tmp/module_instance_test.sv +31 -0
- data/lib/tdl/examples/2_hdl_class/tmp/port_module.sv +99 -0
- data/lib/tdl/examples/2_hdl_class/tmp/simple_assign_test.sv +27 -0
- data/lib/tdl/examples/2_hdl_class/tmp/state_case_test.sv +78 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_axi4_M2S.sv +30 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_foreach.sv +34 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_function.sv +52 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_initial_assert.sv +31 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_inst_sugar.sv +42 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module.sv +36 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module_port.sv +33 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module_var.sv +35 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_package.sv +38 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_package2.sv +36 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_struct.sv +38 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_struct_function.sv +44 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_vcs_string.sv +27 -0
- data/lib/tdl/examples/2_hdl_class/tmp/text_generate.sv +54 -0
- data/lib/tdl/examples/2_hdl_class/vcs_string.rb +5 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/hdl_test.sv +13 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/main.rb +26 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/main_md.sv +42 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/sdl_md.sv +30 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/sdl_test.rb +9 -0
- data/lib/tdl/examples/4_generate/example.rb +38 -0
- data/lib/tdl/examples/4_generate/test_generate.sv +59 -0
- data/lib/tdl/examples/5_logic_combin/login_combin.rb +22 -0
- data/lib/tdl/examples/5_logic_combin/test_logic_combin.sv +36 -0
- data/lib/tdl/examples/6_module_with_interface/example.rb +48 -0
- data/lib/tdl/examples/6_module_with_interface/example_interface.sv +40 -0
- data/lib/tdl/examples/6_module_with_interface/inf_collect.rb +54 -0
- data/lib/tdl/examples/6_module_with_interface/inf_collect.sv +63 -0
- data/lib/tdl/examples/7_module_with_package/body_package.rb +3 -0
- data/lib/tdl/examples/7_module_with_package/body_package.sv +25 -0
- data/lib/tdl/examples/7_module_with_package/example_pkg.rb +20 -0
- data/lib/tdl/examples/7_module_with_package/example_pkg.sv +35 -0
- data/lib/tdl/examples/7_module_with_package/head_package.rb +8 -0
- data/lib/tdl/examples/7_module_with_package/head_package.sv +29 -0
- data/lib/tdl/examples/8_top_module/dve.tcl +64 -0
- data/lib/tdl/examples/8_top_module/example.rb +8 -0
- data/lib/tdl/examples/8_top_module/pins.yml +7 -0
- data/lib/tdl/examples/8_top_module/tb_test_top.sv +29 -0
- data/lib/tdl/examples/8_top_module/test_top.sv +28 -0
- data/lib/tdl/examples/8_top_module/test_top_constraints.xdc +37 -0
- data/lib/tdl/examples/9_itegration/A_itgt/a_test_md.sv +29 -0
- data/lib/tdl/examples/9_itegration/A_itgt/a_test_module.rb +6 -0
- data/lib/tdl/examples/9_itegration/A_itgt/itgt_module_a_block.rb +34 -0
- data/lib/tdl/examples/9_itegration/clock_manage/itgt_module_clock_manage.rb +33 -0
- data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.rb +7 -0
- data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.sv +29 -0
- data/lib/tdl/examples/9_itegration/dve.tcl +64 -0
- data/lib/tdl/examples/9_itegration/pins.yml +4 -0
- data/lib/tdl/examples/9_itegration/tb_test_top.sv +29 -0
- data/lib/tdl/examples/9_itegration/tb_test_tttop.sv +29 -0
- data/lib/tdl/examples/9_itegration/test_top.sv +40 -0
- data/lib/tdl/examples/9_itegration/test_top_constraints.xdc +29 -0
- data/lib/tdl/examples/9_itegration/test_tttop.sv +40 -0
- data/lib/tdl/examples/9_itegration/test_tttop_constraints.xdc +29 -0
- data/lib/tdl/examples/9_itegration/top.rb +11 -0
- data/lib/tdl/examples/readme.md +31 -0
- data/lib/tdl/exlib/common_cfg_reg_inf.rb +139 -0
- data/lib/tdl/exlib/constraints.rb +286 -0
- data/lib/tdl/exlib/constraints_verb.rb +304 -0
- data/lib/tdl/exlib/dve_tcl.rb +162 -0
- data/lib/tdl/exlib/element_class_vars.rb +106 -0
- data/lib/tdl/exlib/global_param.rb +108 -0
- data/lib/tdl/exlib/integral_test/bak/integral_test.rb +206 -0
- data/lib/tdl/exlib/integral_test/clock_itest.rb +28 -0
- data/lib/tdl/exlib/integral_test/diff_clock_itest.rb +30 -0
- data/lib/tdl/exlib/integral_test/io_itest.rb +41 -0
- data/lib/tdl/exlib/integral_test/reset_itest.rb +31 -0
- data/lib/tdl/exlib/integral_test/simple_logic_itest.rb +19 -0
- data/lib/tdl/exlib/itegration.rb +307 -0
- data/lib/tdl/exlib/itegration_verb.rb +913 -0
- data/lib/tdl/exlib/parse_argv.rb +43 -0
- data/lib/tdl/exlib/sdlmodule_sim.bak.rb +375 -0
- data/lib/tdl/exlib/test_point.rb +287 -0
- data/lib/tdl/global_scan.rb +134 -0
- data/lib/tdl/rebuild_ele/axi4.rb +141 -0
- data/lib/tdl/rebuild_ele/axi_lite.rb +56 -0
- data/lib/tdl/rebuild_ele/axi_stream.rb +121 -0
- data/lib/tdl/rebuild_ele/cm_ram_inf.sv +105 -0
- data/lib/tdl/rebuild_ele/cm_ram_inf_define.rb +44 -0
- data/lib/tdl/rebuild_ele/data_inf.rb +27 -0
- data/lib/tdl/rebuild_ele/data_inf_c.rb +83 -0
- data/lib/tdl/rebuild_ele/ele_base.rb +822 -0
- data/lib/tdl/rebuild_ele/readme.md +1 -0
- data/lib/tdl/sdlimplement/resource.yml +154 -0
- data/lib/tdl/sdlimplement/sdl_impl_module.rb +391 -0
- data/lib/tdl/sdlimplement/sdl_impl_param.rb +26 -0
- data/lib/tdl/sdlimplement/test.rb +64 -0
- data/lib/tdl/sdlmodule/bak/sdlmodule_varible_ex.rb +120 -0
- data/lib/tdl/sdlmodule/generator_block_module.rb +84 -0
- data/lib/tdl/sdlmodule/sdlmodule.rb +407 -0
- data/lib/tdl/sdlmodule/sdlmodule_arraychain.rb +333 -0
- data/lib/tdl/sdlmodule/sdlmodule_draw.rb +272 -0
- data/lib/tdl/sdlmodule/sdlmodule_head_logo.txt +10 -0
- data/lib/tdl/sdlmodule/sdlmodule_instance.rb +623 -0
- data/lib/tdl/sdlmodule/sdlmodule_port_define.rb +374 -0
- data/lib/tdl/sdlmodule/sdlmodule_varible.rb +160 -0
- data/lib/tdl/sdlmodule/sdlmodule_vcs_comptable.rb +140 -0
- data/lib/tdl/sdlmodule/techbench_module.rb +14 -0
- data/lib/tdl/sdlmodule/test_unit_module.rb +138 -0
- data/lib/tdl/sdlmodule/top_module.rb +543 -0
- data/lib/tdl/tdl.rb +265 -0
- data/lib/tdl/tdlerror/tdlerror.rb +8 -0
- data/lib/tdl/testunit/test_all.rb +4 -0
- data/lib/tdl/testunit/test_array_chain.rb +89 -0
- data/lib/tdl/testunit/test_tmp.rb +47 -0
- metadata +1301 -0
@@ -0,0 +1,913 @@
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module ItegrationAttr
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def get_itgt_var(name,default=[])
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unless instance_variable_get("@_#{name}_")
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instance_variable_set("@_#{name}_",default)
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container = instance_variable_get("@_#{name}_")
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else
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container = instance_variable_get("@_#{name}_")
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end
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return container
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end
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def set_itgt_var(name,value)
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# rel = get_itgt_var(name)
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instance_variable_set("@_#{name}_",value)
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container = instance_variable_get("@_#{name}_")
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end
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def itegration_hash
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instance_variable_get("@_itegration_link_hash_")
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end
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def itegration_link
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instance_variable_get("@_itegration_link_collect_")
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end
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def itegration_explort
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instance_variable_get("@_itegration_explort_collect_")
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end
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def link_explort(*names)
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## explort_active_hash
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explort_active_hash = get_itgt_var('explort_active_hash',{})
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## explort_silence_hash
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explort_silence_hash = get_itgt_var('explort_silence_hash',{})
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## 存入 list
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# unless instance_variable_get("@_itegration_explort_collect_")
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# instance_variable_set("@_itegration_explort_collect_",[])
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# container = instance_variable_get("@_itegration_explort_collect_")
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# else
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# container = instance_variable_get("@_itegration_explort_collect_")
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# end
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container = get_itgt_var('itegration_explort_collect',[])
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container = container | names.map{ |e| e.to_s }
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instance_variable_set("@_itegration_explort_collect_",container)
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## 定义引用输出是发生的情况
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names.each do |name|
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define_singleton_method("active_#{name}") do |names_pool_signal=nil,&block|
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unless names_pool_signal
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explort_active_hash[name.to_s] = block
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else
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explort_active_hash[name.to_s] = names_pool_signal.to_s
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end
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end
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define_singleton_method("silence_#{name}") do |&block|
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explort_silence_hash[name.to_s] = block
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end
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end
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## 生成实例方法
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self.class_exec do
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names.each do |name|
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define_method("active_#{name}_proc_run") do
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itgt_inst = self
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inst_explort_active_hash = get_itgt_var('explort_active_hash'){ explort_active_hash.clone }
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inst_explort_run_hash = get_itgt_var('explort_active_run_record',{})
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inst_explort_silence_hash = get_itgt_var('explort_silence_hash'){ explort_silence_hash.clone }
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inst_explort_silence_hash.delete(name.to_s)
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## 如果运行过则,从记录中加载
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if inst_explort_run_hash[name.to_s]
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return inst_explort_run_hash[name.to_s]
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end
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## 没有要激活的proc 则直接调用
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unless inst_explort_active_hash[name.to_s]
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return itgt_inst.send(name.to_s)
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end
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itgt_inst.set_itgt_var('explort_silence_hash',inst_explort_silence_hash)
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if inst_explort_active_hash[name.to_s].is_a? String
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brel = inst_explort_active_hash[name.to_s].snoop(itgt_inst,itgt_inst.top_module)
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elsif inst_explort_active_hash[name.to_s]
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# $_implicit_curr_itgt_ = itgt_inst
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ItegrationVerb.curr_itgt_push itgt_inst
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brel = itgt_inst.top_module.instance_exec(itgt_inst,&inst_explort_active_hash[name.to_s])
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ItegrationVerb.curr_itgt_pop
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end
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## 运行一次后删掉
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inst_explort_active_hash.delete(name.to_s)
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# 记录
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inst_explort_run_hash[name.to_s] = brel
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itgt_inst.set_itgt_var('explort_active_run_record',inst_explort_run_hash)
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itgt_inst.set_itgt_var('explort_active_hash',inst_explort_active_hash)
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brel
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end
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end
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define_method('silence_procs_run') do
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inst_explort_silence_hash = get_itgt_var('explort_silence_hash',explort_silence_hash.clone)
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# $_implicit_curr_itgt_ = self
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ItegrationVerb.curr_itgt_push self
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inst_explort_silence_hash.each_value do |v|
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self.top_module.instance_exec(self,&v) if v
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end
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ItegrationVerb.curr_itgt_pop
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end
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end
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end
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def has_attr(*names)
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link_explort(*names)
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end
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def has_flag(*names)
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## 标识控制
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container = get_itgt_var('itegration_flag_collect',[])
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container = container | names.map{ |e| e.to_s }
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set_itgt_var("itegration_flag_collect",container)
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end
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def link_itgt(*names)
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container_hash = get_itgt_var('itegration_link_hash',{})
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## 为每个link生成一个保存attr的list
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names.each do |name|
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unless container_hash[name.to_s]
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container_hash[name.to_s] = []
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end
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141
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end
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set_itgt_var('itegration_link_hash',container_hash)
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## 存入 list
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container = get_itgt_var('itegration_link_collect',[])
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container = container | names.map { |e| e.to_s }
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set_itgt_var('itegration_link_collect',container)
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## 生成实例方法
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# self.class_exec do
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# names.each do |name|
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# define_method(name) do
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# ItegrationVerb[name]
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# end
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# end
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# end
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## 生成2级类方法
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names.each do |name|
|
158
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define_singleton_method("#{name}_has_attr") do |*argvs|
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# puts argvs
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# return 90
|
162
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# ItegrationVerb[name]
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## 把 attr 保存到 list
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164
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container_hash = get_itgt_var('itegration_link_hash',{})
|
165
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container_hash[name.to_s] = container_hash[name.to_s] | argvs.map { |e| e.to_s }
|
166
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set_itgt_var('itegration_link_hash',container_hash)
|
167
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+
end
|
168
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|
169
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define_singleton_method("#{name}_has_flag") do |*argvs|
|
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"itgt 标识"
|
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container_hash = get_itgt_var('itegration_flag_hash',{})
|
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container_hash[name.to_s] ||= []
|
173
|
+
container_hash[name.to_s] = container_hash[name.to_s] | argvs.map { |e| e.to_s }
|
174
|
+
set_itgt_var('itegration_flag_hash',container_hash)
|
175
|
+
end
|
176
|
+
|
177
|
+
end
|
178
|
+
end
|
179
|
+
|
180
|
+
def compact_link_itgt(*names)
|
181
|
+
link_itgt(*names)
|
182
|
+
# container_hash = get_itgt_var('itegration_compact_link_hash',{})
|
183
|
+
# ## 为每个link生成一个保存attr的list
|
184
|
+
# names.each do |name|
|
185
|
+
# unless container_hash[name.to_s]
|
186
|
+
# container_hash[name.to_s] = []
|
187
|
+
# end
|
188
|
+
# end
|
189
|
+
# set_itgt_var('itegration_compact_link_hash',container_hash)
|
190
|
+
## 存入 list
|
191
|
+
container = get_itgt_var('itegration_compact_link_collect',[])
|
192
|
+
container = container | names.map { |e| e.to_s }
|
193
|
+
set_itgt_var('itegration_compact_link_collect',container)
|
194
|
+
#
|
195
|
+
# ## 生成2级类方法
|
196
|
+
# names.each do |name|
|
197
|
+
#
|
198
|
+
# define_singleton_method("#{name}_has_attr") do |*argvs|
|
199
|
+
# # puts argvs
|
200
|
+
# # return 90
|
201
|
+
# # ItegrationVerb[name]
|
202
|
+
# ## 把 attr 保存到 list
|
203
|
+
# container_hash = get_itgt_var('itegration_compact_link_hash',{})
|
204
|
+
# container_hash[name.to_s] = container_hash[name.to_s] | argvs.map { |e| e.to_s }
|
205
|
+
# set_itgt_var('itegration_compact_link_hash',container_hash)
|
206
|
+
# end
|
207
|
+
#
|
208
|
+
# define_singleton_method("#{name}_has_flag") do |*argvs|
|
209
|
+
# "itgt 标识"
|
210
|
+
# container_hash = get_itgt_var('itegration_compact_flag_hash',{})
|
211
|
+
# container_hash[name.to_s] ||= []
|
212
|
+
# container_hash[name.to_s] = container_hash[name.to_s] | argvs.map { |e| e.to_s }
|
213
|
+
# set_itgt_var('itegration_compact_flag_hash',container_hash)
|
214
|
+
# end
|
215
|
+
#
|
216
|
+
# end
|
217
|
+
end
|
218
|
+
|
219
|
+
def param(name,default)
|
220
|
+
## param_hash
|
221
|
+
# itgt_param_hash = get_itgt_var('itgt_param_hash',{})
|
222
|
+
# itgt_param_hash[name.to_s] = default
|
223
|
+
# set_itgt_var('itgt_param_hash',itgt_param_hash)
|
224
|
+
## 生成实例方法
|
225
|
+
self.class_exec do
|
226
|
+
define_method(name) do
|
227
|
+
# ItegrationVerb[name]
|
228
|
+
itgt_param_hash = get_itgt_var('itgt_param_hash',{})
|
229
|
+
if itgt_param_hash[name.to_s]
|
230
|
+
return itgt_param_hash[name.to_s]
|
231
|
+
else
|
232
|
+
itgt_param_hash[name.to_s] = default
|
233
|
+
set_itgt_var('itgt_param_hash',itgt_param_hash)
|
234
|
+
return default
|
235
|
+
end
|
236
|
+
end
|
237
|
+
|
238
|
+
define_method("#{name}=") do |value|
|
239
|
+
# ItegrationVerb[name]
|
240
|
+
itgt_param_hash = get_itgt_var('itgt_param_hash',{})
|
241
|
+
itgt_param_hash[name.to_s] = value
|
242
|
+
set_itgt_var('itgt_param_hash',itgt_param_hash)
|
243
|
+
value
|
244
|
+
end
|
245
|
+
end
|
246
|
+
end
|
247
|
+
|
248
|
+
|
249
|
+
end
|
250
|
+
|
251
|
+
## ItegrationVerb 代理
|
252
|
+
class ItegrationVerbAgent
|
253
|
+
attr_reader :itgt
|
254
|
+
def initialize(itgt)
|
255
|
+
@itgt = itgt
|
256
|
+
end
|
257
|
+
|
258
|
+
def method_missing(method_id,*arguments,&block)
|
259
|
+
# 是否也相应 active_#{name}_proc_run
|
260
|
+
if @itgt.respond_to? "active_#{method_id}_proc_run"
|
261
|
+
@itgt.send("active_#{method_id}_proc_run",*arguments,&block)
|
262
|
+
else
|
263
|
+
@itgt.send(method_id,*arguments,&block)
|
264
|
+
end
|
265
|
+
end
|
266
|
+
end
|
267
|
+
|
268
|
+
# $_implicit_curr_itgt_ = []
|
269
|
+
|
270
|
+
class ItegrationVerb
|
271
|
+
extend ItegrationAttr
|
272
|
+
attr_accessor :top_module
|
273
|
+
attr_accessor :names_pool,:nickname,:pins_map
|
274
|
+
attr_accessor :init_inst
|
275
|
+
attr_accessor :inst_index
|
276
|
+
|
277
|
+
|
278
|
+
def child_inst_itgt
|
279
|
+
@child_inst_itgt ||=[]
|
280
|
+
end
|
281
|
+
|
282
|
+
|
283
|
+
def cal_inst_index(base=0)
|
284
|
+
if @inst_index
|
285
|
+
if base > @inst_index
|
286
|
+
@inst_index = base
|
287
|
+
end
|
288
|
+
else
|
289
|
+
@inst_index = base
|
290
|
+
end
|
291
|
+
|
292
|
+
child_inst_itgt.each do |e|
|
293
|
+
e.cal_inst_index(@inst_index + 1)
|
294
|
+
end
|
295
|
+
|
296
|
+
end
|
297
|
+
|
298
|
+
## 关于 当前 itgt stack 操作
|
299
|
+
def self.with_new_itgt(itgt,&block)
|
300
|
+
$_implicit_curr_itgt_ << itgt
|
301
|
+
rel = block.call
|
302
|
+
$_implicit_curr_itgt_.pop
|
303
|
+
return rel
|
304
|
+
end
|
305
|
+
|
306
|
+
def self.curr_itgt_push(itgt)
|
307
|
+
$_implicit_curr_itgt_ << itgt
|
308
|
+
end
|
309
|
+
|
310
|
+
def self.curr_itgt_pop
|
311
|
+
$_implicit_curr_itgt_.pop
|
312
|
+
end
|
313
|
+
|
314
|
+
## 判断当前itgt class export flag 是否匹配参数
|
315
|
+
|
316
|
+
def flag_match(attr)
|
317
|
+
self.class.flag_match(attr)
|
318
|
+
end
|
319
|
+
|
320
|
+
def self.flag_match(attr)
|
321
|
+
explort_flags = get_itgt_var('itegration_flag_collect')
|
322
|
+
unless attr
|
323
|
+
return true
|
324
|
+
end
|
325
|
+
|
326
|
+
if attr.empty?
|
327
|
+
return true
|
328
|
+
end
|
329
|
+
|
330
|
+
unless explort_flags
|
331
|
+
explort_flags = []
|
332
|
+
end
|
333
|
+
|
334
|
+
explort_flags = explort_flags.map{ |e| e.to_s }.sort
|
335
|
+
attr = attr.map { |e| e.to_s }.sort
|
336
|
+
|
337
|
+
if(explort_flags & attr) == attr
|
338
|
+
return true
|
339
|
+
else
|
340
|
+
return false
|
341
|
+
end
|
342
|
+
end
|
343
|
+
|
344
|
+
@@child = []
|
345
|
+
|
346
|
+
def initialize(name_str=nil,pins_map={},top_module=nil)
|
347
|
+
@top_module = top_module
|
348
|
+
if name_str.to_s.strip.empty?
|
349
|
+
@nickname = ""
|
350
|
+
else
|
351
|
+
@nickname = "#{name_str.to_s.strip}_"
|
352
|
+
end
|
353
|
+
@pins_map = pins_map
|
354
|
+
_names_pool_inst()
|
355
|
+
# @itgt_links = ItgtLinks.new(self)
|
356
|
+
## 为child module 生成方法
|
357
|
+
init_children_modules()
|
358
|
+
# init_children_modules_post()
|
359
|
+
end
|
360
|
+
|
361
|
+
def init_children_modules
|
362
|
+
blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
|
363
|
+
blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
|
364
|
+
dir_hash = self.class.instance_variable_get("@_sdl_eval_dir_hash_")
|
365
|
+
|
366
|
+
blocks_hash = blocks_hash.merge blocks_hash_post
|
367
|
+
|
368
|
+
blocks_hash.keys.each do |key|
|
369
|
+
|
370
|
+
sdlm = SdlModule.new(name:self.class.to_s + "_#{@nickname}#{key}",out_sv_path:dir_hash[key])
|
371
|
+
define_singleton_method(key) do
|
372
|
+
sdlm
|
373
|
+
end
|
374
|
+
end
|
375
|
+
end
|
376
|
+
|
377
|
+
# def init_children_modules_post
|
378
|
+
# blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_")
|
379
|
+
# dir_hash = self.class.instance_variable_get("@_sdl_eval_dir_hash_")
|
380
|
+
# return unless blocks_hash
|
381
|
+
# blocks_hash.keys.each do |key|
|
382
|
+
#
|
383
|
+
# sdlm = SdlModule.new(name:self.class.to_s + "_#{@nickname}#{key}",out_sv_path:dir_hash[key])
|
384
|
+
# define_singleton_method(key) do
|
385
|
+
# sdlm
|
386
|
+
# end
|
387
|
+
# end
|
388
|
+
# end
|
389
|
+
|
390
|
+
def gen_children_modules
|
391
|
+
blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
|
392
|
+
blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
|
393
|
+
blocks_hash = blocks_hash.merge blocks_hash_post
|
394
|
+
blocks_hash.keys.each do |key|
|
395
|
+
self.send(key).gen_sv_module()
|
396
|
+
end
|
397
|
+
end
|
398
|
+
|
399
|
+
# define_singleton_method(:inst) do
|
400
|
+
def inst
|
401
|
+
# 先生成子模块
|
402
|
+
## 执行 生成 sdl module
|
403
|
+
inst_child_module()
|
404
|
+
|
405
|
+
blocks = self.class.instance_variable_get("@_inst_blocks_")
|
406
|
+
ItegrationVerb.curr_itgt_push(self)
|
407
|
+
|
408
|
+
if blocks.length == 1
|
409
|
+
block = blocks[0]
|
410
|
+
@top_module.instance_exec(self,&block.clone)
|
411
|
+
ItegrationVerb.curr_itgt_pop
|
412
|
+
elsif blocks.length > 1
|
413
|
+
# block = Proc.new do
|
414
|
+
blocks.each do |b|
|
415
|
+
@top_module.instance_exec(self,&b.clone)
|
416
|
+
end
|
417
|
+
# end
|
418
|
+
ItegrationVerb.curr_itgt_pop
|
419
|
+
else
|
420
|
+
ItegrationVerb.curr_itgt_pop
|
421
|
+
return
|
422
|
+
end
|
423
|
+
|
424
|
+
## 执行 生成 sdl module
|
425
|
+
inst_child_module_post()
|
426
|
+
|
427
|
+
## 执行top module techbench eval
|
428
|
+
tb_inst()
|
429
|
+
## 执行测试向量
|
430
|
+
techbench_vector()
|
431
|
+
## 执行 约束
|
432
|
+
inst_constraints()
|
433
|
+
## 执行单元测试
|
434
|
+
test_unit_inst()
|
435
|
+
end
|
436
|
+
|
437
|
+
def tb_inst
|
438
|
+
# define_singleton_method(:tb_inst) do
|
439
|
+
blocks = self.class.instance_variable_get("@_inst_tb_blocks_")
|
440
|
+
return unless blocks
|
441
|
+
ItegrationVerb.curr_itgt_push self
|
442
|
+
|
443
|
+
if blocks.length == 1
|
444
|
+
block = blocks[0]
|
445
|
+
@top_module.techbench.instance_exec(self,&block.clone)
|
446
|
+
elsif blocks.length > 1
|
447
|
+
# block = Proc.new do
|
448
|
+
blocks.each do |b|
|
449
|
+
# b.call
|
450
|
+
@top_module.techbench.instance_exec(self,&b.clone)
|
451
|
+
end
|
452
|
+
# end
|
453
|
+
else
|
454
|
+
;
|
455
|
+
end
|
456
|
+
ItegrationVerb.curr_itgt_pop
|
457
|
+
end
|
458
|
+
|
459
|
+
## 测试用例 实例化
|
460
|
+
def test_unit_inst
|
461
|
+
|
462
|
+
blocks = self.class.instance_variable_get("@_inst_test_unit_blocks_")
|
463
|
+
return unless blocks
|
464
|
+
return if blocks.empty?
|
465
|
+
ItegrationVerb.curr_itgt_push self
|
466
|
+
|
467
|
+
return unless TopModule.sim
|
468
|
+
|
469
|
+
blocks.each do |b|
|
470
|
+
# @top_module.techbench.instance_exec(self,&b.clone)
|
471
|
+
sdlm = TestUnitModule.new(name: b[0],out_sv_path: b[1])
|
472
|
+
$_implicit_curr_itgt_.with_none_itgt do
|
473
|
+
sdlm.input - "from_up_pass"
|
474
|
+
sdlm.output.logic - "to_down_pass"
|
475
|
+
end
|
476
|
+
sdlm.instance_exec(self,&b[2])
|
477
|
+
|
478
|
+
if b[1] && File.exist?(b[1])
|
479
|
+
sdlm.gen_sv_module
|
480
|
+
else
|
481
|
+
sdlm.origin_sv = true
|
482
|
+
end
|
483
|
+
end
|
484
|
+
|
485
|
+
ItegrationVerb.curr_itgt_pop
|
486
|
+
|
487
|
+
end
|
488
|
+
|
489
|
+
def inst_child_module
|
490
|
+
blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_")
|
491
|
+
return unless blocks_hash
|
492
|
+
ItegrationVerb.curr_itgt_push self
|
493
|
+
$_implicit_curr_itgt_.with_none_itgt do
|
494
|
+
blocks_hash.keys.each do |key|
|
495
|
+
sdlm = self.send(key)
|
496
|
+
|
497
|
+
|
498
|
+
blocks = blocks_hash[key]
|
499
|
+
if blocks.length == 1
|
500
|
+
block = blocks[0]
|
501
|
+
sdlm.instance_exec(self,&block)
|
502
|
+
elsif blocks.length > 1
|
503
|
+
# block = Proc.new do
|
504
|
+
blocks.each do |b|
|
505
|
+
# b.call
|
506
|
+
sdlm.instance_exec(self,&b)
|
507
|
+
end
|
508
|
+
# end
|
509
|
+
else
|
510
|
+
;
|
511
|
+
end
|
512
|
+
end
|
513
|
+
end
|
514
|
+
ItegrationVerb.curr_itgt_pop
|
515
|
+
end
|
516
|
+
|
517
|
+
def inst_child_module_post
|
518
|
+
blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_")
|
519
|
+
return unless blocks_hash
|
520
|
+
ItegrationVerb.curr_itgt_push self
|
521
|
+
$_implicit_curr_itgt_.with_none_itgt do
|
522
|
+
blocks_hash.keys.each do |key|
|
523
|
+
sdlm = self.send(key)
|
524
|
+
# $_implicit_curr_itgt_ = self
|
525
|
+
|
526
|
+
blocks = blocks_hash[key]
|
527
|
+
if blocks.length == 1
|
528
|
+
block = blocks[0]
|
529
|
+
sdlm.instance_exec(self,&block)
|
530
|
+
elsif blocks.length > 1
|
531
|
+
# block = Proc.new do
|
532
|
+
blocks.each do |b|
|
533
|
+
# b.call
|
534
|
+
sdlm.instance_exec(self,&b)
|
535
|
+
end
|
536
|
+
# end
|
537
|
+
else
|
538
|
+
next
|
539
|
+
end
|
540
|
+
end
|
541
|
+
end
|
542
|
+
ItegrationVerb.curr_itgt_pop
|
543
|
+
end
|
544
|
+
|
545
|
+
def self.inherited(subclass)
|
546
|
+
unless @@child.include? subclass
|
547
|
+
@@child << subclass
|
548
|
+
end
|
549
|
+
end
|
550
|
+
|
551
|
+
# def self.[](key)
|
552
|
+
# @@_curr_all_itegration_ ||= {}
|
553
|
+
# @@_curr_all_itegration_[key.to_s]
|
554
|
+
# end
|
555
|
+
#
|
556
|
+
# def self.[]=(key,value)
|
557
|
+
# @@_curr_all_itegration_ ||= {}
|
558
|
+
# @@_curr_all_itegration_[key.to_s] = value
|
559
|
+
# end
|
560
|
+
private
|
561
|
+
def _names_pool_inst
|
562
|
+
@names_pool = NameSPoolHash.new
|
563
|
+
@names_pool.nickname = @nickname
|
564
|
+
@names_pool.itgt = self
|
565
|
+
end
|
566
|
+
public
|
567
|
+
def get_itgt_var(name,default=[],&block)
|
568
|
+
unless instance_variable_get("@_#{name}_")
|
569
|
+
if block_given?
|
570
|
+
rel = block.call(default)
|
571
|
+
else
|
572
|
+
rel = default
|
573
|
+
end
|
574
|
+
instance_variable_set("@_#{name}_",rel)
|
575
|
+
container = instance_variable_get("@_#{name}_")
|
576
|
+
else
|
577
|
+
container = instance_variable_get("@_#{name}_")
|
578
|
+
end
|
579
|
+
|
580
|
+
return container
|
581
|
+
end
|
582
|
+
|
583
|
+
def set_itgt_var(name,value)
|
584
|
+
# rel = get_itgt_var(name)
|
585
|
+
instance_variable_set("@_#{name}_",value)
|
586
|
+
container = instance_variable_get("@_#{name}_")
|
587
|
+
end
|
588
|
+
|
589
|
+
public
|
590
|
+
def check_same_method(name)
|
591
|
+
if respond_to? name.to_s
|
592
|
+
raise TdlError.new("Itegration can't Redefine method #{name}")
|
593
|
+
end
|
594
|
+
end
|
595
|
+
|
596
|
+
public
|
597
|
+
def link_eval
|
598
|
+
@top_module.implicit_itgt_collect ||= []
|
599
|
+
#生成link 数组便是 当前 itgt引用
|
600
|
+
container = self.class.get_itgt_var('itegration_link_collect')
|
601
|
+
container.each do |e|
|
602
|
+
container_attrs = self.class.get_itgt_var('itegration_link_hash')[e]
|
603
|
+
flag_attrs = self.class.get_itgt_var('itegration_flag_hash',{})[e]
|
604
|
+
mark = false
|
605
|
+
## 先从 top_module 显式加入的itgt搜索
|
606
|
+
@top_module.itgt_collect.each do |i|
|
607
|
+
explort_attrs = i.class.get_itgt_var('itegration_explort_collect')
|
608
|
+
# explort_flags = i.class.get_itgt_var('itegration_flag_collect')
|
609
|
+
if ((explort_attrs & container_attrs).sort == container_attrs.sort && i.flag_match(flag_attrs))
|
610
|
+
mark = true
|
611
|
+
unless self.respond_to? e
|
612
|
+
define_singleton_method(e) do
|
613
|
+
## 如果从其他模块调用则出发 dynac_active
|
614
|
+
ItegrationVerbAgent.new(i)
|
615
|
+
end
|
616
|
+
i.link_eval
|
617
|
+
i.child_inst_itgt << self
|
618
|
+
end
|
619
|
+
# cal_inst_index(i)
|
620
|
+
break
|
621
|
+
end
|
622
|
+
end
|
623
|
+
if mark ## 找到了 就处理下一个Link
|
624
|
+
next
|
625
|
+
else
|
626
|
+
## 处理 compact link
|
627
|
+
compact_container = self.class.get_itgt_var('itegration_compact_link_collect',[])
|
628
|
+
if compact_container.include? e
|
629
|
+
unless self.respond_to? e
|
630
|
+
define_singleton_method(e) do
|
631
|
+
nil
|
632
|
+
end
|
633
|
+
end
|
634
|
+
next
|
635
|
+
end
|
636
|
+
end
|
637
|
+
## 先从 已经加入的隐性itgt搜索
|
638
|
+
@top_module.implicit_itgt_collect.each do |i|
|
639
|
+
explort_attrs = i.class.get_itgt_var('itegration_explort_collect')
|
640
|
+
if ((explort_attrs & container_attrs).sort == container_attrs.sort && i.flag_match(flag_attrs))
|
641
|
+
# puts "Itgt Good"
|
642
|
+
mark = true
|
643
|
+
unless self.respond_to? e
|
644
|
+
define_singleton_method(e) do
|
645
|
+
## 如果从其他模块调用则出发 dynac_active
|
646
|
+
ItegrationVerbAgent.new(i)
|
647
|
+
end
|
648
|
+
i.link_eval
|
649
|
+
i.child_inst_itgt << self
|
650
|
+
end
|
651
|
+
break
|
652
|
+
end
|
653
|
+
end
|
654
|
+
next if mark ## 找到了 就处理下一个Link
|
655
|
+
## 如果没有找到 再从 ItegrationVerb children里面找到比加入
|
656
|
+
@@child.each do |c|
|
657
|
+
explort_attrs = c.get_itgt_var('itegration_explort_collect')
|
658
|
+
# puts explort_attrs
|
659
|
+
if ((explort_attrs & container_attrs).sort == container_attrs.sort && c.flag_match(flag_attrs))
|
660
|
+
# puts "Child Good"
|
661
|
+
isp = @top_module.add_itegration(c.to_s,nickname:'implicit',implicit:true)
|
662
|
+
@top_module.implicit_itgt_collect << isp
|
663
|
+
## 如果是隐性添加,先不要加入pin_map
|
664
|
+
define_singleton_method(e) do
|
665
|
+
ItegrationVerbAgent.new(isp)
|
666
|
+
end
|
667
|
+
isp.link_eval
|
668
|
+
isp.child_inst_itgt << self
|
669
|
+
mark = true
|
670
|
+
break
|
671
|
+
end
|
672
|
+
end
|
673
|
+
|
674
|
+
unless mark
|
675
|
+
raise TdlError.new("<#{self}>没有找到符合Link 的上级 Itgt:\n ATTR: #{container_attrs.inspect}\n FLAG: #{flag_attrs.inspect}\n")
|
676
|
+
end
|
677
|
+
end
|
678
|
+
end
|
679
|
+
|
680
|
+
def implicit_link_eval
|
681
|
+
@top_module.implicit_itgt_collect ||= []
|
682
|
+
#生成link 数组便是 当前 itgt引用
|
683
|
+
container = self.class.get_itgt_var('itegration_link_collect')
|
684
|
+
container.each do |e|
|
685
|
+
container_attrs = self.class.get_itgt_var('itegration_link_hash')[e]
|
686
|
+
mark = false
|
687
|
+
## 先从 已经加入的隐性itgt搜索
|
688
|
+
@top_module.implicit_itgt_collect.each do |i|
|
689
|
+
explort_attrs = i.class.get_itgt_var('itegration_explort_collect')
|
690
|
+
if (explort_attrs & container_attrs).sort == container_attrs.sort
|
691
|
+
mark = true
|
692
|
+
|
693
|
+
define_singleton_method(e) do
|
694
|
+
ItegrationVerbAgent.new(i)
|
695
|
+
end
|
696
|
+
i.implicit_link_eval
|
697
|
+
break
|
698
|
+
end
|
699
|
+
end
|
700
|
+
next if mark ## 找到了 就处理下一个Link
|
701
|
+
##
|
702
|
+
## 如果没有找到 再从 ItegrationVerb children里面找到比加入
|
703
|
+
@@child.each do |c|
|
704
|
+
explort_attrs = c.get_itgt_var('itegration_explort_collect')
|
705
|
+
if (explort_attrs & container_attrs).sort == container_attrs.sort
|
706
|
+
isp = @top_module.add_itegration(c.to_s,nickname:'implicit',implicit:true)
|
707
|
+
@top_module.implicit_itgt_collect << isp
|
708
|
+
## 如果是隐性添加,先不要加入pin_map
|
709
|
+
|
710
|
+
define_singleton_method(e) do
|
711
|
+
ItegrationVerbAgent.new(isp)
|
712
|
+
end
|
713
|
+
mark = true
|
714
|
+
break
|
715
|
+
end
|
716
|
+
end
|
717
|
+
|
718
|
+
end
|
719
|
+
end
|
720
|
+
|
721
|
+
##
|
722
|
+
def self.top_module_eval(&block)
|
723
|
+
_inst_blocks_ = instance_variable_get("@_inst_blocks_")
|
724
|
+
_inst_blocks_ ||= []
|
725
|
+
_inst_blocks_ << block
|
726
|
+
instance_variable_set("@_inst_blocks_",_inst_blocks_)
|
727
|
+
end
|
728
|
+
|
729
|
+
def self.top_module_techbench_eval(&block)
|
730
|
+
_inst_tb_blocks_ = instance_variable_get("@_inst_tb_blocks_")
|
731
|
+
_inst_tb_blocks_ ||= []
|
732
|
+
_inst_tb_blocks_ << block
|
733
|
+
instance_variable_set("@_inst_tb_blocks_",_inst_tb_blocks_)
|
734
|
+
end
|
735
|
+
|
736
|
+
## 添加测试用例
|
737
|
+
|
738
|
+
def self.def_test_unit(name,path,&block)
|
739
|
+
_inst_test_unit_blocks_ = instance_variable_get("@_inst_test_unit_blocks_")
|
740
|
+
_inst_test_unit_blocks_ ||= []
|
741
|
+
_inst_test_unit_blocks_ << [name.to_s, path, block]
|
742
|
+
instance_variable_set("@_inst_test_unit_blocks_",_inst_test_unit_blocks_)
|
743
|
+
end
|
744
|
+
|
745
|
+
## 生成 itgt内的模块,
|
746
|
+
def self.has_module(dir,*names)
|
747
|
+
unless File.exist? dir
|
748
|
+
Dir.mkdir dir
|
749
|
+
end
|
750
|
+
## itgt 生成 sdl 模块
|
751
|
+
names.each do |name|
|
752
|
+
# unless container_hash[name.to_s]
|
753
|
+
# container_hash[name.to_s] = []
|
754
|
+
# end
|
755
|
+
self.define_singleton_method("#{name}_sdl_eval") do |&block|
|
756
|
+
_sdl_eval_blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_hash_")
|
757
|
+
_sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
|
758
|
+
_sdl_eval_blocks_hash_ ||= {}
|
759
|
+
_sdl_eval_dir_hash_ ||= {}
|
760
|
+
|
761
|
+
if _sdl_eval_blocks_hash_[name]
|
762
|
+
_sdl_eval_blocks_hash_[name] << block
|
763
|
+
# _sdl_eval_blocks_hash_[name] << $_implicit_curr_itgt_.wrap_nont_itgt(&block)
|
764
|
+
# _sdl_eval_blocks_hash_[name] << lambda {|itgt| block.call }
|
765
|
+
else
|
766
|
+
_sdl_eval_blocks_hash_[name] = [block]
|
767
|
+
# _sdl_eval_blocks_hash_[name] = [$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
|
768
|
+
# _sdl_eval_blocks_hash_[name] == [ lambda {|itgt| block.call }]
|
769
|
+
end
|
770
|
+
|
771
|
+
_sdl_eval_dir_hash_[name] = dir if dir
|
772
|
+
instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
|
773
|
+
instance_variable_set("@_sdl_eval_blocks_hash_",_sdl_eval_blocks_hash_)
|
774
|
+
end
|
775
|
+
## 在 top_module 后再执行
|
776
|
+
self.define_singleton_method("#{name}_sdl_post_eval") do |&block|
|
777
|
+
$_implicit_curr_itgt_.with_none_itgt do
|
778
|
+
_blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_post_hash_")
|
779
|
+
_sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
|
780
|
+
_blocks_hash_ ||= {}
|
781
|
+
_sdl_eval_dir_hash_ ||= {}
|
782
|
+
|
783
|
+
if _blocks_hash_[name]
|
784
|
+
_blocks_hash_[name] << block #$_implicit_curr_itgt_.wrap_nont_itgt(&block)
|
785
|
+
else
|
786
|
+
_blocks_hash_[name] = [block] #[$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
|
787
|
+
end
|
788
|
+
|
789
|
+
_sdl_eval_dir_hash_[name] = dir if dir
|
790
|
+
instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
|
791
|
+
instance_variable_set("@_sdl_eval_blocks_post_hash_",_blocks_hash_)
|
792
|
+
end
|
793
|
+
end
|
794
|
+
end
|
795
|
+
end
|
796
|
+
|
797
|
+
def self.record_instance_var_block(name,default=[],&block)
|
798
|
+
_inst_ccc_ = instance_variable_get("@_#{name}_")
|
799
|
+
_inst_ccc_ ||= default
|
800
|
+
if _inst_ccc_.is_a? Array
|
801
|
+
_inst_ccc_ << block if block_given?
|
802
|
+
elsif _inst_ccc_.is_a? Hash
|
803
|
+
_inst_ccc_[name.to_s] = block if block_given?
|
804
|
+
else
|
805
|
+
_inst_ccc_ = block
|
806
|
+
end
|
807
|
+
instance_variable_set("@_#{name}_",_inst_ccc_)
|
808
|
+
end
|
809
|
+
|
810
|
+
def self.set_instance_var(name,value)
|
811
|
+
_inst_ccc_ = instance_variable_get("@_#{name}_")
|
812
|
+
# _inst_ccc_ ||= default
|
813
|
+
_inst_ccc_ = value
|
814
|
+
instance_variable_set("@_#{name}_",_inst_ccc_)
|
815
|
+
end
|
816
|
+
|
817
|
+
def self.get_instance_var(name)
|
818
|
+
_inst_ccc_ = instance_variable_get("@_#{name}_")
|
819
|
+
end
|
820
|
+
|
821
|
+
## 测试向量实现 作用于是 top_module
|
822
|
+
def self.techbench_block(name,default_tb_argvs_hash={})
|
823
|
+
hash = self.record_instance_var_block("techbench_name_hash",{})
|
824
|
+
## args hash
|
825
|
+
argvs_hash = self.get_instance_var("techbench_argvs_hash") || {}
|
826
|
+
# self.set_instance_var("techbench_argvs_hash",{}) unless argvs_hash
|
827
|
+
argvs_hash[name.to_s] = default_tb_argvs_hash
|
828
|
+
set_instance_var("techbench_argvs_hash",argvs_hash)
|
829
|
+
##需要激活的block
|
830
|
+
self.define_singleton_method("#{name}_tb_eval") do |&block|
|
831
|
+
## 把 block 塞到数组中
|
832
|
+
hash[name.to_s] = self.record_instance_var_block("techbench_#{name}_blocks",[],&block)
|
833
|
+
self.set_instance_var("techbench_name_hash",hash)
|
834
|
+
hash[name.to_s]
|
835
|
+
end
|
836
|
+
|
837
|
+
## 生成实例方法
|
838
|
+
self.class_exec do
|
839
|
+
|
840
|
+
define_method(:active_techbench_vector) do |name,tb_argvs_hash={}|
|
841
|
+
hash = get_itgt_var("active_techbench_vector",{})
|
842
|
+
_default_tb_argvs_hash = self.class.get_instance_var("techbench_argvs_hash")[name.to_s] || {}
|
843
|
+
hash[name.to_s] = _default_tb_argvs_hash.merge(tb_argvs_hash)
|
844
|
+
set_itgt_var('active_techbench_vector',hash)
|
845
|
+
end
|
846
|
+
end
|
847
|
+
|
848
|
+
end
|
849
|
+
|
850
|
+
def techbench_vector
|
851
|
+
## 先获取需要激活的tb
|
852
|
+
hash = get_itgt_var("active_techbench_vector",{})
|
853
|
+
## 从 class 获取 techbench_name_hash
|
854
|
+
class_block_hash = self.class.get_instance_var('techbench_name_hash')
|
855
|
+
## 根据 需要激活的 tb name 激活 block
|
856
|
+
ItegrationVerb.curr_itgt_push self
|
857
|
+
hash.each do |key,value|
|
858
|
+
blocks = class_block_hash[key.to_s]
|
859
|
+
unless blocks
|
860
|
+
raise TdlError.new("Itgt Class <#{self.class.to_s}> 没有定义 techbench <#{key}>")
|
861
|
+
end
|
862
|
+
|
863
|
+
tb_argvs_hash = value
|
864
|
+
# $_implicit_curr_itgt_ = self
|
865
|
+
|
866
|
+
if blocks.length == 1
|
867
|
+
block = blocks[0]
|
868
|
+
## 在top module 的上下文下激活blocks
|
869
|
+
@top_module.instance_exec(self,tb_argvs_hash,&block.clone)
|
870
|
+
elsif blocks.length > 1
|
871
|
+
# block = Proc.new do
|
872
|
+
blocks.each do |b|
|
873
|
+
# b.call
|
874
|
+
## 在top module 的上下文下激活blocks
|
875
|
+
@top_module.instance_exec(self,tb_argvs_hash,&b.clone)
|
876
|
+
end
|
877
|
+
# end
|
878
|
+
else
|
879
|
+
next
|
880
|
+
end
|
881
|
+
|
882
|
+
end
|
883
|
+
ItegrationVerb.curr_itgt_pop
|
884
|
+
end
|
885
|
+
|
886
|
+
## 约束 block
|
887
|
+
def self.constraints_block(&block)
|
888
|
+
carray = self.record_instance_var_block("constraints_array",[])
|
889
|
+
carray << block if block_given?
|
890
|
+
self.set_instance_var("constraints_array",carray)
|
891
|
+
end
|
892
|
+
|
893
|
+
def inst_constraints()
|
894
|
+
carray = self.class.get_instance_var("constraints_array")
|
895
|
+
return unless carray
|
896
|
+
# $_implicit_curr_itgt_ = self
|
897
|
+
ItegrationVerb.curr_itgt_push self
|
898
|
+
carray.each do |b|
|
899
|
+
@top_module.constraint.instance_exec(self,&b.clone)
|
900
|
+
end
|
901
|
+
ItegrationVerb.curr_itgt_pop
|
902
|
+
end
|
903
|
+
|
904
|
+
end
|
905
|
+
|
906
|
+
|
907
|
+
## 动态删除 silence_ block
|
908
|
+
class ItegrationVerb
|
909
|
+
|
910
|
+
def delete_silence(name)
|
911
|
+
get_itgt_var('explort_silence_hash').delete(name.to_s)
|
912
|
+
end
|
913
|
+
end
|