axi_tdl 0.0.2
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- checksums.yaml +7 -0
- data/.gitignore +8 -0
- data/CODE_OF_CONDUCT.md +74 -0
- data/Gemfile +6 -0
- data/Gemfile.lock +43 -0
- data/LICENSE +504 -0
- data/README.md +311 -0
- data/Rakefile +18 -0
- data/axi_tdl.gemspec +43 -0
- data/bin/console +14 -0
- data/bin/setup +8 -0
- data/lib/.rspec +1 -0
- data/lib/axi/AXI4/axi4_combin_wr_rd_batch.sv +59 -0
- data/lib/axi/AXI4/axi4_direct.sv +137 -0
- data/lib/axi/AXI4/axi4_direct_A1.sv +229 -0
- data/lib/axi/AXI4/axi4_direct_B1.sv +74 -0
- data/lib/axi/AXI4/axi4_direct_verb.sv +79 -0
- data/lib/axi/AXI4/axi4_direct_verc.sv +146 -0
- data/lib/axi/AXI4/axi4_dpram_cache.rb +106 -0
- data/lib/axi/AXI4/axi4_dpram_cache.sv +112 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide.sv +85 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_A1.sv +96 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_track.sv +118 -0
- data/lib/axi/AXI4/axi4_long_to_axi4_wide_verb.sv +131 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_pipe.sv +44 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_pipe_verb.sv +45 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe.sv +111 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe_verb.sv +113 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe.sv +142 -0
- data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe_verb.sv +146 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_batch_gen.sv +134 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_gen.sv +89 -0
- data/lib/axi/AXI4/axi4_rd_auxiliary_gen_A1.sv +109 -0
- data/lib/axi/AXI4/axi4_rd_burst_track.sv +164 -0
- data/lib/axi/AXI4/axi4_wr_aux_bind_data.sv +121 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_batch_gen.sv +140 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_gen.sv +102 -0
- data/lib/axi/AXI4/axi4_wr_auxiliary_gen_without_resp.sv +91 -0
- data/lib/axi/AXI4/axi4_wr_burst_track.sv +146 -0
- data/lib/axi/AXI4/axi_stream_add_addr_len.sv +50 -0
- data/lib/axi/AXI4/axi_stream_to_axi4_wr.sv +61 -0
- data/lib/axi/AXI4/axi_stream_to_axi4_wr_verb.sv.bak +123 -0
- data/lib/axi/AXI4/axis_to_axi4_wr.rb +149 -0
- data/lib/axi/AXI4/axis_to_axi4_wr.sv +141 -0
- data/lib/axi/AXI4/full_axi4_to_axis.sv +188 -0
- data/lib/axi/AXI4/full_axi4_to_axis_partition_wr_rd.sv +208 -0
- data/lib/axi/AXI4/id_record.sv +55 -0
- data/lib/axi/AXI4/idata_pool_axi4.sv +110 -0
- data/lib/axi/AXI4/interconnect/AXI4_interconnect_M2S.sv +291 -0
- data/lib/axi/AXI4/interconnect/axi4_mix_interconnect_M2S.sv +72 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_interconnect_M2S.sv +148 -0
- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S.sv +255 -0
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- data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S_A2.sv +281 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S.sv +235 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S_A1.sv +283 -0
- data/lib/axi/AXI4/interconnect/axi4_wr_mix_interconnect_M2S.sv +32 -0
- data/lib/axi/AXI4/long_axi4_to_wide_axi4.sv.bak +251 -0
- data/lib/axi/AXI4/odata_pool_axi4.sv +134 -0
- data/lib/axi/AXI4/odata_pool_axi4_A1.sv +165 -0
- data/lib/axi/AXI4/odata_pool_axi4_A2.sv +159 -0
- data/lib/axi/AXI4/odata_pool_axi4_A3.sv +183 -0
- data/lib/axi/AXI4/packet_fifo/axi4_packet_fifo.sv +61 -0
- data/lib/axi/AXI4/packet_fifo/axi4_rd_packet_fifo.sv +282 -0
- data/lib/axi/AXI4/packet_fifo/axi4_wr_packet_fifo.sv +181 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge.sv +60 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge_rd.sv +279 -0
- data/lib/axi/AXI4/packet_merge/axi4_merge_wr.sv +267 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition.sv +36 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_OD.sv +66 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd.sv +211 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd_OD.sv +322 -0
- data/lib/axi/AXI4/packet_partition/axi4_partition_rd_verb.rb +80 -0
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- data/lib/axi/AXI4/packet_partition/data_inf_partition.rb +293 -0
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- data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe.sv +239 -0
- data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe_A1.sv +204 -0
- data/lib/axi/AXI4/width_convert/axi4_data_convert.sv +312 -0
- data/lib/axi/AXI4/width_convert/axi4_data_convert_A1.sv +217 -0
- data/lib/axi/AXI4/width_convert/data_combin.sv +366 -0
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- data/lib/axi/AXI4/width_convert/data_destruct.sv +304 -0
- data/lib/axi/AXI4/width_convert/feed_check.sv +94 -0
- data/lib/axi/AXI4/width_convert/len_convert.sv.bak +61 -0
- data/lib/axi/AXI4/width_convert/odd_width_convert.sv +229 -0
- data/lib/axi/AXI4/width_convert/odd_width_convert_verb.sv +105 -0
- data/lib/axi/AXI4/width_convert/simple_data_pipe.sv +40 -0
- data/lib/axi/AXI4/width_convert/simple_data_pipe_slaver.sv +33 -0
- data/lib/axi/AXI4/width_convert/width_combin.sv +113 -0
- data/lib/axi/AXI4/width_convert/width_convert.sv +87 -0
- data/lib/axi/AXI4/width_convert/width_convert_verb.sv +249 -0
- data/lib/axi/AXI4/width_convert/width_destruct.sv +206 -0
- data/lib/axi/AXI4/width_convert/width_destruct_A1.sv +251 -0
- data/lib/axi/AXI_BFM/AXI_BFM_PKG.sv +1039 -0
- data/lib/axi/AXI_BFM/Data_C_BFM_PKG.sv +97 -0
- data/lib/axi/AXI_BFM/axi4_error_chk.sv +298 -0
- data/lib/axi/AXI_BFM/axi4_illegal_bfm_pkg.sv +607 -0
- data/lib/axi/AXI_BFM/axi_lite_master.sv +102 -0
- data/lib/axi/AXI_BFM/axi_lite_tb.sv +23 -0
- data/lib/axi/AXI_BFM/axi_master.sv +185 -0
- data/lib/axi/AXI_BFM/axi_mirror.sv +266 -0
- data/lib/axi/AXI_BFM/axi_mm_tb.sv +134 -0
- data/lib/axi/AXI_BFM/axi_slaver.sv.bak +340 -0
- data/lib/axi/AXI_BFM/axistreambfm.sv +117 -0
- data/lib/axi/AXI_Lite/axi4_to_lite.sv +36 -0
- data/lib/axi/AXI_Lite/axi_lite_configure.sv +356 -0
- data/lib/axi/AXI_Lite/axi_lite_configure_inf2.sv +365 -0
- data/lib/axi/AXI_Lite/axi_lite_configure_verb.sv.bck +370 -0
- data/lib/axi/AXI_Lite/axi_lite_interconnect_M2S.sv +437 -0
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- data/lib/axi/AXI_Lite/axi_lite_slaver_empty.sv +27 -0
- data/lib/axi/AXI_Lite/axil_direct.sv +52 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv +230 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv.bak +109 -0
- data/lib/axi/AXI_Lite/common_configure_reg_interface/jtag_to_axilite_wrapper.sv +56 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl.sv +515 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_C1.sv +369 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verb.sv +365 -0
- data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verc.sv +401 -0
- data/lib/axi/AXI_Lite/wr_lite_to_axis.sv +141 -0
- data/lib/axi/AXI_Lite/wr_lite_to_axis.sv.bak +141 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S.sv +76 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A1.sv +77 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A2.sv +71 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_bind_tuser.sv +72 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_noaddr.sv +151 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_with_addr.sv +87 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M.sv +65 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_auto.sv +50 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_info.sv +64 -0
- data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_keep.sv.bak +64 -0
- data/lib/axi/AXI_stream/axi_stream_packet_fifo_with_info.sv.bak +49 -0
- data/lib/axi/AXI_stream/axi_stream_partition.sv +147 -0
- data/lib/axi/AXI_stream/axi_stream_partition_A1.sv +63 -0
- data/lib/axi/AXI_stream/axi_stream_planer.sv +51 -0
- data/lib/axi/AXI_stream/axi_stream_split_channel.rb +56 -0
- data/lib/axi/AXI_stream/axi_stream_split_channel.sv +149 -0
- data/lib/axi/AXI_stream/axi_streams_combin.sv +151 -0
- data/lib/axi/AXI_stream/axi_streams_combin_A1.sv +179 -0
- data/lib/axi/AXI_stream/axi_streams_scaler.sv +171 -0
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- data/lib/axi/AXI_stream/axis_append.sv +79 -0
- data/lib/axi/AXI_stream/axis_append_A1.sv +82 -0
- data/lib/axi/AXI_stream/axis_base_pipe.sv +184 -0
- data/lib/axi/AXI_stream/axis_combin_with_fifo.sv +69 -0
- data/lib/axi/AXI_stream/axis_connect_pipe.sv +86 -0
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- data/lib/axi/AXI_stream/axis_connect_pipe_left_shift.sv +64 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_right_shift.sv +64 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_right_shift_verb.sv +70 -0
- data/lib/axi/AXI_stream/axis_connect_pipe_with_info.sv +93 -0
- data/lib/axi/AXI_stream/axis_direct.sv +55 -0
- data/lib/axi/AXI_stream/axis_direct_A1.sv +81 -0
- data/lib/axi/AXI_stream/axis_filter.sv +38 -0
- data/lib/axi/AXI_stream/axis_full_to_data_c.sv +26 -0
- data/lib/axi/AXI_stream/axis_head_cut.sv +67 -0
- data/lib/axi/AXI_stream/axis_head_cut_verb.sv +60 -0
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- data/lib/axi/AXI_stream/axis_head_cut_verc.sv +245 -0
- data/lib/axi/AXI_stream/axis_inct_s2m_with_flag.sv +84 -0
- data/lib/axi/AXI_stream/axis_insert_copy.rb +59 -0
- data/lib/axi/AXI_stream/axis_insert_copy.sv +66 -0
- data/lib/axi/AXI_stream/axis_intc_M2S_with_addr_inf.sv +114 -0
- data/lib/axi/AXI_stream/axis_intc_S2M_with_addr_inf.sv +85 -0
- data/lib/axi/AXI_stream/axis_interconnect_S2M_pipe.sv +75 -0
- data/lib/axi/AXI_stream/axis_length_cut.sv +64 -0
- data/lib/axi/AXI_stream/axis_length_fill.sv +194 -0
- data/lib/axi/AXI_stream/axis_length_split.sv +86 -0
- data/lib/axi/AXI_stream/axis_length_split_with_addr.sv +127 -0
- data/lib/axi/AXI_stream/axis_length_split_writh_user.sv +87 -0
- data/lib/axi/AXI_stream/axis_link_trigger.sv +81 -0
- data/lib/axi/AXI_stream/axis_master_empty.sv +26 -0
- data/lib/axi/AXI_stream/axis_mirror_to_master.sv +126 -0
- data/lib/axi/AXI_stream/axis_mirrors.sv +60 -0
- data/lib/axi/AXI_stream/axis_orthogonal.sv +66 -0
- data/lib/axi/AXI_stream/axis_ram_buffer.sv +118 -0
- data/lib/axi/AXI_stream/axis_rom_contect.rb +97 -0
- data/lib/axi/AXI_stream/axis_rom_contect.sv +110 -0
- data/lib/axi/AXI_stream/axis_rom_contect_sim.rb +102 -0
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- data/lib/axi/AXI_stream/axis_slaver_empty.sv +22 -0
- data/lib/axi/AXI_stream/axis_slaver_pipe.sv +84 -0
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- data/lib/axi/AXI_stream/axis_split_channel_verb.rb +42 -0
- data/lib/axi/AXI_stream/axis_split_channel_verb.sv +62 -0
- data/lib/axi/AXI_stream/axis_to_axi4_or_lite.rb +127 -0
- data/lib/axi/AXI_stream/axis_to_axi4_or_lite.sv +153 -0
- data/lib/axi/AXI_stream/axis_to_data_inf.sv +34 -0
- data/lib/axi/AXI_stream/axis_to_lite_rd.sv +81 -0
- data/lib/axi/AXI_stream/axis_to_lite_wr.sv +71 -0
- data/lib/axi/AXI_stream/axis_uncompress.sv +147 -0
- data/lib/axi/AXI_stream/axis_uncompress_A1.sv +150 -0
- data/lib/axi/AXI_stream/axis_uncompress_verb.rb +32 -0
- data/lib/axi/AXI_stream/axis_uncompress_verb.sv +54 -0
- data/lib/axi/AXI_stream/axis_valve.sv +29 -0
- data/lib/axi/AXI_stream/axis_valve_with_pipe.sv +76 -0
- data/lib/axi/AXI_stream/axis_vector_master_empty.rb +11 -0
- data/lib/axi/AXI_stream/axis_vector_master_empty.sv +35 -0
- data/lib/axi/AXI_stream/axis_vector_slaver_empty.rb +11 -0
- data/lib/axi/AXI_stream/axis_vector_slaver_empty.sv +35 -0
- data/lib/axi/AXI_stream/check_stream_crc.sv +28 -0
- data/lib/axi/AXI_stream/data_c_to_axis_full.sv +23 -0
- data/lib/axi/AXI_stream/data_to_axis_inf.sv +103 -0
- data/lib/axi/AXI_stream/data_to_axis_inf_A1.sv +28 -0
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- data/lib/axi/AXI_stream/data_width/axis_width_combin_A1.sv +220 -0
- data/lib/axi/AXI_stream/data_width/axis_width_convert.sv +49 -0
- data/lib/axi/AXI_stream/data_width/axis_width_destruct.sv +82 -0
- data/lib/axi/AXI_stream/data_width/axis_width_destruct_A1.sv +86 -0
- data/lib/axi/AXI_stream/ex_status/axis_ex_status.sv +97 -0
- data/lib/axi/AXI_stream/gen_big_field_table.sv +170 -0
- data/lib/axi/AXI_stream/gen_common_frame_table.sv +382 -0
- data/lib/axi/AXI_stream/gen_common_frame_table_bind_tuser.sv +428 -0
- data/lib/axi/AXI_stream/gen_origin_axis.sv +116 -0
- data/lib/axi/AXI_stream/gen_origin_axis_A1.sv +129 -0
- data/lib/axi/AXI_stream/gen_origin_axis_A2.sv +162 -0
- data/lib/axi/AXI_stream/gen_simple_axis.sv +164 -0
- data/lib/axi/AXI_stream/packet_fifo/axi_stream_long_fifo.sv +132 -0
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- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo.sv +125 -0
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- data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1E.sv +198 -0
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- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_B1.sv +82 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_mirror.sv +44 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_verb.sv +58 -0
- data/lib/axi/AXI_stream/stream_cache/axi_stream_long_cache.sv +55 -0
- data/lib/axi/AXI_stream/stream_crc.sv +67 -0
- data/lib/axi/AXI_stream/vcs_axis_comptable.sv +73 -0
- data/lib/axi/LICENSE +504 -0
- data/lib/axi/ReadME.md +6 -0
- data/lib/axi/SIM/tb_axi4_partition_20201105.sv +115 -0
- data/lib/axi/SIM/tb_axis_bfm_0504.sv +61 -0
- data/lib/axi/SIM/tb_axis_partitiom_0929.sv +102 -0
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- data/lib/axi/SIM/tb_axis_to_axi4_0925.sv +107 -0
- data/lib/axi/SIM/tb_data_c_m2s_inf_20200114.sv +222 -0
- data/lib/axi/SIM/tb_data_c_m2s_inf_20201103.sv +245 -0
- data/lib/axi/SIM/tb_data_c_pipe_inf_20180417.sv +114 -0
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- data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_without_resp_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_burst_track_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_mix_interconnect_M2S_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/axi4_wr_packet_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi4_wr_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi4_wr_pipe_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/axi_stream_add_addr_len_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/axi_stream_to_axi4_wr_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/data_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/data_destruct_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/feed_check_sdl.rb +18 -0
- data/lib/tdl/SDL/axi4/full_axi4_to_axis_partition_wr_rd_sdl.rb +11 -0
- data/lib/tdl/SDL/axi4/full_axi4_to_axis_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/id_record_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/idata_pool_axi4_sdl.rb +18 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_A2_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/odata_pool_axi4_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/odd_width_convert_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/odd_width_convert_verb_sdl.rb +19 -0
- data/lib/tdl/SDL/axi4/simple_data_pipe_sdl.rb +16 -0
- data/lib/tdl/SDL/axi4/simple_data_pipe_slaver_sdl.rb +16 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable.rb +9 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable_sdl.rb +10 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_comptable.rb +8 -0
- data/lib/tdl/SDL/axi4/vcs_axi4_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/axi4/width_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_convert_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_convert_verb_sdl.rb +20 -0
- data/lib/tdl/SDL/axi4/width_destruct_A1_sdl.rb +22 -0
- data/lib/tdl/SDL/axi4/width_destruct_sdl.rb +19 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_35bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_36_71bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_with_keep_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_96_143bit_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_B1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_mirror_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_cache_verb_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A2_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_bind_tuser_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_noaddr_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_with_addr_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_auto_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_cache_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_long_fifo_verb_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1E_sdl.rb +16 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_verb_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_with_info_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axi_stream_packet_long_fifo_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_partition_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axi_stream_partition_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axi_stream_wide_fifo_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axi_streams_combin_A1_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axi_streams_combin_sdl.rb +16 -0
- data/lib/tdl/SDL/axistream/axi_streams_scaler_A1_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axi_streams_scaler_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axis_append_A1_sdl.rb +18 -0
- data/lib/tdl/SDL/axistream/axis_append_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/axis_base_pipe_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_combin_with_fifo_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_right_shift_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_connect_pipe_with_info_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_direct_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_direct_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_ex_status_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_filter_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_full_to_data_c_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_head_cut_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_inct_s2m_with_flag_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_intc_M2S_with_addr_inf_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_intc_S2M_with_addr_inf_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_interconnect_S2M_pipe_sdl.rb +15 -0
- data/lib/tdl/SDL/axistream/axis_length_cut_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_fill_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_split_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_length_split_with_addr_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axis_length_split_writh_user_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_link_trigger_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/axis_mirror_to_master_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_mirrors_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/axis_orthogonal_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_ram_buffer_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/axis_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/axis_slaver_pipe_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_slaver_pipe_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_slaver_vector_empty_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_to_data_inf_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_to_lite_rd_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_to_lite_wr_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_uncompress_A1_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/axis_uncompress_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_valve_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/axis_valve_with_pipe_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/axis_width_combin_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_combin_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_convert_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_destruct_A1_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/axis_width_destruct_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/check_stream_crc_sdl.rb +8 -0
- data/lib/tdl/SDL/axistream/data_c_to_axis_full_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/data_to_axis_inf_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/axistream/data_to_axis_inf_sdl.rb +11 -0
- data/lib/tdl/SDL/axistream/gen_big_field_table_sdl.rb +14 -0
- data/lib/tdl/SDL/axistream/gen_common_frame_table_sdl.rb +60 -0
- data/lib/tdl/SDL/axistream/gen_origin_axis_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/gen_origin_axis_sdl.rb +12 -0
- data/lib/tdl/SDL/axistream/gen_simple_axis_sdl.rb +13 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_A1_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_A2_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/parse_big_field_table_sdl.rb +17 -0
- data/lib/tdl/SDL/axistream/stream_crc_sdl.rb +9 -0
- data/lib/tdl/SDL/axistream/vcs_axis_comptable.rb +16 -0
- data/lib/tdl/SDL/axistream/vcs_axis_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_bind_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_direct_mirror_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_direct_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_intc_M2S_force_robin_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_bind_data_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_A1_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_right_shift_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_with_id_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_id_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_c_pipe_latency_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_c_scaler_A1_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_c_scaler_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_c_tmp_cache_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_condition_mirror_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_condition_valve_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_connect_pipe_inf_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_connect_pipe_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_A2B_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_B2A_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_M2S_with_addr_and_id_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_M2S_with_id_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_A1_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_with_lazy_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_interconnect_M2S_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_pipe_condition_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_sdl.rb +13 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_cross_clk_sdl.rb +9 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_force_addr_with_id_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_with_id_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_noaddr_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_with_id_noaddr_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_planer_A1_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_planer_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_inf_ticktock_sdl.rb +18 -0
- data/lib/tdl/SDL/data_inf_c/data_intc_M2S_force_robin_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/data_mirrors_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_A1_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_A2_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pair_map_sdl.rb +14 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_A1_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_sdl.rb +17 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_verb_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_A1_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_sdl.rb +16 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_verb_sdl.rb +15 -0
- data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_sdl.rb +23 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_combin_A1_sdl.rb +20 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_combin_sdl.rb +20 -0
- data/lib/tdl/SDL/data_inf_c/data_streams_scaler_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/data_uncompress_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/data_valve_sdl.rb +10 -0
- data/lib/tdl/SDL/data_inf_c/datainf_c_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_c_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_master_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/datainf_slaver_empty_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/latency_sdl.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/next_prio_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/part_data_pair_map_sdl.rb +19 -0
- data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_A1_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_sdl.rb +11 -0
- data/lib/tdl/SDL/data_inf_c/trigger_ready_ctrl_sdl.rb +12 -0
- data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable.rb +8 -0
- data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable_sdl.rb +9 -0
- data/lib/tdl/SDL/fifo/common_fifo_sdl.rb +20 -0
- data/lib/tdl/SDL/fifo/common_stack_sdl.rb +14 -0
- data/lib/tdl/SDL/fifo/independent_clock_fifo_a1_sdl.rb +21 -0
- data/lib/tdl/SDL/fifo/independent_clock_fifo_sdl.rb +20 -0
- data/lib/tdl/SDL/fifo/independent_stack_sdl.rb +18 -0
- data/lib/tdl/SDL/path_lib.rb +6 -0
- data/lib/tdl/VideoInf/simple_video_gen.rb +46 -0
- data/lib/tdl/VideoInf/video_from_axi4.rb +108 -0
- data/lib/tdl/VideoInf/video_lib.rb +8 -0
- data/lib/tdl/VideoInf/video_stream_2_axi_stream.rb +67 -0
- data/lib/tdl/VideoInf/video_to_axi4.rb +75 -0
- data/lib/tdl/auto_script/auto_gen_tdl.rb +49 -0
- data/lib/tdl/auto_script/autogensdl.rb +289 -0
- data/lib/tdl/auto_script/autogentdl_a2.rb +452 -0
- data/lib/tdl/auto_script/import_hdl.rb +35 -0
- data/lib/tdl/auto_script/import_sdl.rb +26 -0
- data/lib/tdl/auto_script/test_autogensdl.rb +73 -0
- data/lib/tdl/auto_script/tmp.rb +6 -0
- data/lib/tdl/auto_script/tmp/hdl_test_sdl.rb +12 -0
- data/lib/tdl/axi4/axi4_combin_wr_rd_batch_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_direct.rb +36 -0
- data/lib/tdl/axi4/axi4_direct_A1_auto.rb +137 -0
- data/lib/tdl/axi4/axi4_direct_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_direct_verb_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_interconnect_verb.rb +323 -0
- data/lib/tdl/axi4/axi4_lib.rb +9 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_A1_auto.rb +79 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_long_to_axi4_wide_verb_auto.rb +86 -0
- data/lib/tdl/axi4/axi4_packet_fifo_auto.rb +155 -0
- data/lib/tdl/axi4/axi4_pipe_auto.rb +127 -0
- data/lib/tdl/axi4/axi4_pipe_verb_auto.rb +127 -0
- data/lib/tdl/axi4/axi4_rd_auxiliary_gen_auto.rb +71 -0
- data/lib/tdl/axi4/axi4_wr_auxiliary_gen_without_resp_auto.rb +78 -0
- data/lib/tdl/axi4/axis_to_axi4_wr_auto.rb +85 -0
- data/lib/tdl/axi4/bak/__axi4_wr_auxiliary_gen_without_resp.rb +175 -0
- data/lib/tdl/axi4/bak/axi4_combin_wr_rd_batch_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_data_convert.rb +74 -0
- data/lib/tdl/axi4/bak/axi4_direct_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_direct_verb_auto.rb +126 -0
- data/lib/tdl/axi4/bak/axi4_interconnect.rb.bak +91 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_A1_auto.rb +153 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_auto.rb +126 -0
- data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_verb_auto.rb +179 -0
- data/lib/tdl/axi4/bak/axi4_packet_fifo.rb.bak +75 -0
- data/lib/tdl/axi4/bak/axi4_packet_fifo_auto.rb +259 -0
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- data/lib/tdl/examples/11_test_unit/dve.tcl +64 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit.rb +58 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit.sv +35 -0
- data/lib/tdl/examples/11_test_unit/exp_test_unit_constraints.xdc +25 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md0.rb +23 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md0.sv +41 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md1.rb +25 -0
- data/lib/tdl/examples/11_test_unit/modules/sub_md1.sv +41 -0
- data/lib/tdl/examples/11_test_unit/tb_exp_test_unit.sv +28 -0
- data/lib/tdl/examples/11_test_unit/tu0.sv +38 -0
- data/lib/tdl/examples/11_test_unit/tu1.sv +28 -0
- data/lib/tdl/examples/1_define_module/example1.rb +39 -0
- data/lib/tdl/examples/1_define_module/exmple_md.sv +50 -0
- data/lib/tdl/examples/2_hdl_class/always_comb.rb +99 -0
- data/lib/tdl/examples/2_hdl_class/always_ff.rb +143 -0
- data/lib/tdl/examples/2_hdl_class/case.rb +93 -0
- data/lib/tdl/examples/2_hdl_class/foreach.rb +21 -0
- data/lib/tdl/examples/2_hdl_class/function.rb +34 -0
- data/lib/tdl/examples/2_hdl_class/generate.rb +62 -0
- data/lib/tdl/examples/2_hdl_class/module_def.rb +33 -0
- data/lib/tdl/examples/2_hdl_class/module_head_import_package.rb +36 -0
- data/lib/tdl/examples/2_hdl_class/module_instance_test.rb +13 -0
- data/lib/tdl/examples/2_hdl_class/package.rb +29 -0
- data/lib/tdl/examples/2_hdl_class/package2.rb +21 -0
- data/lib/tdl/examples/2_hdl_class/simple_assign.rb +39 -0
- data/lib/tdl/examples/2_hdl_class/state_case.rb +65 -0
- data/lib/tdl/examples/2_hdl_class/struct.rb +25 -0
- data/lib/tdl/examples/2_hdl_class/struct_function.rb +28 -0
- data/lib/tdl/examples/2_hdl_class/test_axi4_M2S.rb +16 -0
- data/lib/tdl/examples/2_hdl_class/test_initial_assert.rb +11 -0
- data/lib/tdl/examples/2_hdl_class/test_inst_sugar.rb +28 -0
- data/lib/tdl/examples/2_hdl_class/test_module_port.rb +47 -0
- data/lib/tdl/examples/2_hdl_class/test_module_var.rb +18 -0
- data/lib/tdl/examples/2_hdl_class/tmp/always_comb_test.sv +108 -0
- data/lib/tdl/examples/2_hdl_class/tmp/always_ff_test.sv +35 -0
- data/lib/tdl/examples/2_hdl_class/tmp/case_test.sv +105 -0
- data/lib/tdl/examples/2_hdl_class/tmp/head_pkg_module.sv +42 -0
- data/lib/tdl/examples/2_hdl_class/tmp/init_module.sv +110 -0
- data/lib/tdl/examples/2_hdl_class/tmp/module_instance_test.sv +31 -0
- data/lib/tdl/examples/2_hdl_class/tmp/port_module.sv +99 -0
- data/lib/tdl/examples/2_hdl_class/tmp/simple_assign_test.sv +27 -0
- data/lib/tdl/examples/2_hdl_class/tmp/state_case_test.sv +78 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_axi4_M2S.sv +30 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_foreach.sv +34 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_function.sv +52 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_initial_assert.sv +31 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_inst_sugar.sv +42 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module.sv +36 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module_port.sv +33 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_module_var.sv +35 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_package.sv +38 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_package2.sv +36 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_struct.sv +38 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_struct_function.sv +44 -0
- data/lib/tdl/examples/2_hdl_class/tmp/test_vcs_string.sv +27 -0
- data/lib/tdl/examples/2_hdl_class/tmp/text_generate.sv +54 -0
- data/lib/tdl/examples/2_hdl_class/vcs_string.rb +5 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/hdl_test.sv +13 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/main.rb +26 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/main_md.sv +42 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/sdl_md.sv +30 -0
- data/lib/tdl/examples/3_hdl_sdl_instance/sdl_test.rb +9 -0
- data/lib/tdl/examples/4_generate/example.rb +38 -0
- data/lib/tdl/examples/4_generate/test_generate.sv +59 -0
- data/lib/tdl/examples/5_logic_combin/login_combin.rb +22 -0
- data/lib/tdl/examples/5_logic_combin/test_logic_combin.sv +36 -0
- data/lib/tdl/examples/6_module_with_interface/example.rb +48 -0
- data/lib/tdl/examples/6_module_with_interface/example_interface.sv +40 -0
- data/lib/tdl/examples/6_module_with_interface/inf_collect.rb +54 -0
- data/lib/tdl/examples/6_module_with_interface/inf_collect.sv +63 -0
- data/lib/tdl/examples/7_module_with_package/body_package.rb +3 -0
- data/lib/tdl/examples/7_module_with_package/body_package.sv +25 -0
- data/lib/tdl/examples/7_module_with_package/example_pkg.rb +20 -0
- data/lib/tdl/examples/7_module_with_package/example_pkg.sv +35 -0
- data/lib/tdl/examples/7_module_with_package/head_package.rb +8 -0
- data/lib/tdl/examples/7_module_with_package/head_package.sv +29 -0
- data/lib/tdl/examples/8_top_module/dve.tcl +64 -0
- data/lib/tdl/examples/8_top_module/example.rb +8 -0
- data/lib/tdl/examples/8_top_module/pins.yml +7 -0
- data/lib/tdl/examples/8_top_module/tb_test_top.sv +29 -0
- data/lib/tdl/examples/8_top_module/test_top.sv +28 -0
- data/lib/tdl/examples/8_top_module/test_top_constraints.xdc +37 -0
- data/lib/tdl/examples/9_itegration/A_itgt/a_test_md.sv +29 -0
- data/lib/tdl/examples/9_itegration/A_itgt/a_test_module.rb +6 -0
- data/lib/tdl/examples/9_itegration/A_itgt/itgt_module_a_block.rb +34 -0
- data/lib/tdl/examples/9_itegration/clock_manage/itgt_module_clock_manage.rb +33 -0
- data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.rb +7 -0
- data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.sv +29 -0
- data/lib/tdl/examples/9_itegration/dve.tcl +64 -0
- data/lib/tdl/examples/9_itegration/pins.yml +4 -0
- data/lib/tdl/examples/9_itegration/tb_test_top.sv +29 -0
- data/lib/tdl/examples/9_itegration/tb_test_tttop.sv +29 -0
- data/lib/tdl/examples/9_itegration/test_top.sv +40 -0
- data/lib/tdl/examples/9_itegration/test_top_constraints.xdc +29 -0
- data/lib/tdl/examples/9_itegration/test_tttop.sv +40 -0
- data/lib/tdl/examples/9_itegration/test_tttop_constraints.xdc +29 -0
- data/lib/tdl/examples/9_itegration/top.rb +11 -0
- data/lib/tdl/examples/readme.md +31 -0
- data/lib/tdl/exlib/common_cfg_reg_inf.rb +139 -0
- data/lib/tdl/exlib/constraints.rb +286 -0
- data/lib/tdl/exlib/constraints_verb.rb +304 -0
- data/lib/tdl/exlib/dve_tcl.rb +162 -0
- data/lib/tdl/exlib/element_class_vars.rb +106 -0
- data/lib/tdl/exlib/global_param.rb +108 -0
- data/lib/tdl/exlib/integral_test/bak/integral_test.rb +206 -0
- data/lib/tdl/exlib/integral_test/clock_itest.rb +28 -0
- data/lib/tdl/exlib/integral_test/diff_clock_itest.rb +30 -0
- data/lib/tdl/exlib/integral_test/io_itest.rb +41 -0
- data/lib/tdl/exlib/integral_test/reset_itest.rb +31 -0
- data/lib/tdl/exlib/integral_test/simple_logic_itest.rb +19 -0
- data/lib/tdl/exlib/itegration.rb +307 -0
- data/lib/tdl/exlib/itegration_verb.rb +913 -0
- data/lib/tdl/exlib/parse_argv.rb +43 -0
- data/lib/tdl/exlib/sdlmodule_sim.bak.rb +375 -0
- data/lib/tdl/exlib/test_point.rb +287 -0
- data/lib/tdl/global_scan.rb +134 -0
- data/lib/tdl/rebuild_ele/axi4.rb +141 -0
- data/lib/tdl/rebuild_ele/axi_lite.rb +56 -0
- data/lib/tdl/rebuild_ele/axi_stream.rb +121 -0
- data/lib/tdl/rebuild_ele/cm_ram_inf.sv +105 -0
- data/lib/tdl/rebuild_ele/cm_ram_inf_define.rb +44 -0
- data/lib/tdl/rebuild_ele/data_inf.rb +27 -0
- data/lib/tdl/rebuild_ele/data_inf_c.rb +83 -0
- data/lib/tdl/rebuild_ele/ele_base.rb +822 -0
- data/lib/tdl/rebuild_ele/readme.md +1 -0
- data/lib/tdl/sdlimplement/resource.yml +154 -0
- data/lib/tdl/sdlimplement/sdl_impl_module.rb +391 -0
- data/lib/tdl/sdlimplement/sdl_impl_param.rb +26 -0
- data/lib/tdl/sdlimplement/test.rb +64 -0
- data/lib/tdl/sdlmodule/bak/sdlmodule_varible_ex.rb +120 -0
- data/lib/tdl/sdlmodule/generator_block_module.rb +84 -0
- data/lib/tdl/sdlmodule/sdlmodule.rb +407 -0
- data/lib/tdl/sdlmodule/sdlmodule_arraychain.rb +333 -0
- data/lib/tdl/sdlmodule/sdlmodule_draw.rb +272 -0
- data/lib/tdl/sdlmodule/sdlmodule_head_logo.txt +10 -0
- data/lib/tdl/sdlmodule/sdlmodule_instance.rb +623 -0
- data/lib/tdl/sdlmodule/sdlmodule_port_define.rb +374 -0
- data/lib/tdl/sdlmodule/sdlmodule_varible.rb +160 -0
- data/lib/tdl/sdlmodule/sdlmodule_vcs_comptable.rb +140 -0
- data/lib/tdl/sdlmodule/techbench_module.rb +14 -0
- data/lib/tdl/sdlmodule/test_unit_module.rb +138 -0
- data/lib/tdl/sdlmodule/top_module.rb +543 -0
- data/lib/tdl/tdl.rb +265 -0
- data/lib/tdl/tdlerror/tdlerror.rb +8 -0
- data/lib/tdl/testunit/test_all.rb +4 -0
- data/lib/tdl/testunit/test_array_chain.rb +89 -0
- data/lib/tdl/testunit/test_tmp.rb +47 -0
- metadata +1301 -0
@@ -0,0 +1,136 @@
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#2018-05-04 14:40:11 +0800
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#require_relative ".././tdl"
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#require_relative '..\..\tdl\tdl'
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class DataInf_C
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def data_inf_c_pipe_condition(
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and_condition:"and_condition",
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indata:"indata",
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outdata:"outdata",
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up_stream:nil,
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down_stream:nil
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)
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Tdl.add_to_all_file_paths('data_inf_c_pipe_condition','../../axi/data_interface/data_inf_c/data_inf_c_pipe_condition.sv')
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# GlobalParam.CurrTdlModule.add_to_all_file_paths(['data_inf_c_pipe_condition','../../axi/data_interface/data_inf_c/data_inf_c_pipe_condition.sv'])
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return_stream = self
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indata = DataInf_C.same_name_socket(:from_up,mix=true,indata,nil,belong_to_module) unless indata.is_a? String
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outdata = DataInf_C.same_name_socket(:to_down,mix=true,outdata,nil,belong_to_module) unless outdata.is_a? String
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if up_stream.nil? && indata.eql?("indata") && (!(outdata.eql?("outdata")) || !down_stream.nil?)
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# up_stream = self.copy(name:"indata")
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# return_stream = up_stream
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outdata = down_stream if down_stream
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return down_stream.data_inf_c_pipe_condition(indata:self)
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end
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indata = up_stream if up_stream
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unless self.eql? belong_to_module.DataInf_C_NC
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outdata = self
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else
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if down_stream
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outdata = down_stream
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end
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end
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belong_to_module.DataInf_C_draw << data_inf_c_pipe_condition_draw(
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and_condition:and_condition,
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indata:indata,
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outdata:outdata,
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up_stream:up_stream,
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down_stream:down_stream)
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return return_stream
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end
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private
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def data_inf_c_pipe_condition_draw(
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and_condition:"and_condition",
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indata:"indata",
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outdata:"outdata",
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up_stream:nil,
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down_stream:nil
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)
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large_name_len(
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and_condition,
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indata,
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outdata
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)
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instance_name = "data_inf_c_pipe_condition_#{signal}_inst"
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"
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// FilePath:::../../axi/data_interface/data_inf_c/data_inf_c_pipe_condition.sv
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data_inf_c_pipe_condition #{instance_name}(
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/* input */ .and_condition (#{align_signal(and_condition,q_mark=false)}),
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/* data_inf_c.slaver*/ .indata (#{align_signal(indata,q_mark=false)}),
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/* data_inf_c.master*/ .outdata (#{align_signal(outdata,q_mark=false)})
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);
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"
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end
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public
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def self.data_inf_c_pipe_condition(
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and_condition:"and_condition",
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indata:"indata",
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outdata:"outdata",
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up_stream:nil,
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down_stream:nil,
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belong_to_module:nil
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)
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return_stream = nil
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belong_to_module = [indata,outdata].first.belong_to_module unless belong_to_module
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if down_stream.nil? && outdata.eql?("outdata")
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if up_stream.is_a? DataInf_C
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down_stream = up_stream.copy
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else
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down_stream = indata.copy
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end
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return_stream = down_stream
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end
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if up_stream.nil? && indata.eql?("indata")
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if down_stream.is_a? DataInf_C
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up_stream = down_stream.copy
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else
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up_stream = outdata.copy
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end
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return_stream = up_stream
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end
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if down_stream.is_a? DataInf_C
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down_stream.data_inf_c_pipe_condition(
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and_condition:and_condition,
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indata:indata,
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outdata:outdata,
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up_stream:up_stream,
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down_stream:down_stream)
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elsif outdata.is_a? DataInf_C
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outdata.data_inf_c_pipe_condition(
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and_condition:and_condition,
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indata:indata,
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outdata:outdata,
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up_stream:up_stream,
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down_stream:down_stream)
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else
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belong_to_module.DataInf_C_NC.data_inf_c_pipe_condition(
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and_condition:and_condition,
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indata:indata,
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outdata:outdata,
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up_stream:up_stream,
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down_stream:down_stream)
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end
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return return_stream
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end
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end
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#2018-05-04 14:40:11 +0800
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#require_relative ".././tdl"
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#require_relative '..\..\tdl\tdl'
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class DataInf_C
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def data_mirrors(
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h:0,
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l:0,
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num:8,
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mode:"CDS_MODE",
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condition_data:"condition_data",
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data_in:"data_in",
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data_mirror:"data_mirror",
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up_stream:nil,
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down_stream:nil
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)
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Tdl.add_to_all_file_paths('data_mirrors','../../axi/data_interface/data_inf_c/data_mirrors.sv')
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# GlobalParam.CurrTdlModule.add_to_all_file_paths(['data_mirrors','../../axi/data_interface/data_inf_c/data_mirrors.sv'])
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return_stream = self
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data_in = DataInf_C.same_name_socket(:from_up,mix=true,data_in,nil,belong_to_module) unless data_in.is_a? String
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data_mirror = DataInf_C.same_name_socket(:to_down,mix=false,data_mirror,nil,belong_to_module) unless data_mirror.is_a? String
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if up_stream.nil? && data_in.eql?("data_in") && (!(data_mirror.eql?("data_mirror")) || !down_stream.nil?)
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# up_stream = self.copy(name:"data_in")
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# return_stream = up_stream
|
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data_mirror = down_stream if down_stream
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return down_stream.data_mirrors(data_in:self)
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end
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data_in = up_stream if up_stream
|
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unless self.eql? belong_to_module.DataInf_C_NC
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data_mirror = self
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else
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if down_stream
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data_mirror = down_stream
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end
|
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end
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belong_to_module.DataInf_C_draw << data_mirrors_draw(
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h:h,
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l:l,
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num:num,
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+
mode:mode,
|
50
|
+
condition_data:condition_data,
|
51
|
+
data_in:data_in,
|
52
|
+
data_mirror:data_mirror,
|
53
|
+
up_stream:up_stream,
|
54
|
+
down_stream:down_stream)
|
55
|
+
return return_stream
|
56
|
+
end
|
57
|
+
|
58
|
+
private
|
59
|
+
|
60
|
+
def data_mirrors_draw(
|
61
|
+
h:0,
|
62
|
+
l:0,
|
63
|
+
num:8,
|
64
|
+
mode:"CDS_MODE",
|
65
|
+
condition_data:"condition_data",
|
66
|
+
data_in:"data_in",
|
67
|
+
data_mirror:"data_mirror",
|
68
|
+
up_stream:nil,
|
69
|
+
down_stream:nil
|
70
|
+
)
|
71
|
+
|
72
|
+
large_name_len(
|
73
|
+
h,
|
74
|
+
l,
|
75
|
+
num,
|
76
|
+
mode,
|
77
|
+
condition_data,
|
78
|
+
data_in,
|
79
|
+
data_mirror
|
80
|
+
)
|
81
|
+
instance_name = "data_mirrors_#{signal}_inst"
|
82
|
+
"
|
83
|
+
// FilePath:::../../axi/data_interface/data_inf_c/data_mirrors.sv
|
84
|
+
data_mirrors#(
|
85
|
+
.H (#{align_signal(h)}),
|
86
|
+
.L (#{align_signal(l)}),
|
87
|
+
.NUM (#{align_signal(num)}),
|
88
|
+
.MODE (#{align_signal(mode)})
|
89
|
+
) #{instance_name}(
|
90
|
+
/* input [H:L] */ .condition_data (#{align_signal(condition_data,q_mark=false)}),
|
91
|
+
/* data_inf_c.slaver*/ .data_in (#{align_signal(data_in,q_mark=false)}),
|
92
|
+
/* data_inf_c.master*/ .data_mirror (#{align_signal(data_mirror,q_mark=false)})
|
93
|
+
);
|
94
|
+
"
|
95
|
+
end
|
96
|
+
|
97
|
+
public
|
98
|
+
|
99
|
+
def self.data_mirrors(
|
100
|
+
h:0,
|
101
|
+
l:0,
|
102
|
+
num:8,
|
103
|
+
mode:"CDS_MODE",
|
104
|
+
condition_data:"condition_data",
|
105
|
+
data_in:"data_in",
|
106
|
+
data_mirror:"data_mirror",
|
107
|
+
up_stream:nil,
|
108
|
+
down_stream:nil,
|
109
|
+
belong_to_module:nil
|
110
|
+
)
|
111
|
+
return_stream = nil
|
112
|
+
belong_to_module = [data_in,data_mirror].first.belong_to_module unless belong_to_module
|
113
|
+
|
114
|
+
if down_stream.nil? && data_mirror.eql?("data_mirror")
|
115
|
+
if up_stream.is_a? DataInf_C
|
116
|
+
down_stream = up_stream.copy
|
117
|
+
else
|
118
|
+
down_stream = data_in.copy
|
119
|
+
end
|
120
|
+
return_stream = down_stream
|
121
|
+
end
|
122
|
+
|
123
|
+
|
124
|
+
if up_stream.nil? && data_in.eql?("data_in")
|
125
|
+
if down_stream.is_a? DataInf_C
|
126
|
+
up_stream = down_stream.copy
|
127
|
+
else
|
128
|
+
up_stream = data_mirror.copy
|
129
|
+
end
|
130
|
+
return_stream = up_stream
|
131
|
+
end
|
132
|
+
|
133
|
+
|
134
|
+
if down_stream.is_a? DataInf_C
|
135
|
+
down_stream.data_mirrors(
|
136
|
+
h:h,
|
137
|
+
l:l,
|
138
|
+
num:num,
|
139
|
+
mode:mode,
|
140
|
+
condition_data:condition_data,
|
141
|
+
data_in:data_in,
|
142
|
+
data_mirror:data_mirror,
|
143
|
+
up_stream:up_stream,
|
144
|
+
down_stream:down_stream)
|
145
|
+
elsif data_mirror.is_a? DataInf_C
|
146
|
+
data_mirror.data_mirrors(
|
147
|
+
h:h,
|
148
|
+
l:l,
|
149
|
+
num:num,
|
150
|
+
mode:mode,
|
151
|
+
condition_data:condition_data,
|
152
|
+
data_in:data_in,
|
153
|
+
data_mirror:data_mirror,
|
154
|
+
up_stream:up_stream,
|
155
|
+
down_stream:down_stream)
|
156
|
+
else
|
157
|
+
belong_to_module.DataInf_C_NC.data_mirrors(
|
158
|
+
h:h,
|
159
|
+
l:l,
|
160
|
+
num:num,
|
161
|
+
mode:mode,
|
162
|
+
condition_data:condition_data,
|
163
|
+
data_in:data_in,
|
164
|
+
data_mirror:data_mirror,
|
165
|
+
up_stream:up_stream,
|
166
|
+
down_stream:down_stream)
|
167
|
+
end
|
168
|
+
return return_stream
|
169
|
+
end
|
170
|
+
|
171
|
+
|
172
|
+
end
|
173
|
+
|
@@ -0,0 +1,173 @@
|
|
1
|
+
|
2
|
+
#2018-05-04 14:40:11 +0800
|
3
|
+
#require_relative ".././tdl"
|
4
|
+
#require_relative '..\..\tdl\tdl'
|
5
|
+
|
6
|
+
class DataInf_C
|
7
|
+
|
8
|
+
|
9
|
+
def data_mirrors_verb(
|
10
|
+
h:0,
|
11
|
+
l:0,
|
12
|
+
num:8,
|
13
|
+
mode:"CDS_MODE",
|
14
|
+
condition_data:"condition_data",
|
15
|
+
data_in:"data_in",
|
16
|
+
data_mirror:"data_mirror",
|
17
|
+
up_stream:nil,
|
18
|
+
down_stream:nil
|
19
|
+
)
|
20
|
+
|
21
|
+
Tdl.add_to_all_file_paths('data_mirrors_verb','../../axi/data_interface/data_inf_c/data_mirrors_verb.sv.bak')
|
22
|
+
# GlobalParam.CurrTdlModule.add_to_all_file_paths(['data_mirrors_verb','../../axi/data_interface/data_inf_c/data_mirrors_verb.sv.bak'])
|
23
|
+
return_stream = self
|
24
|
+
|
25
|
+
data_in = DataInf_C.same_name_socket(:from_up,mix=true,data_in,nil,belong_to_module) unless data_in.is_a? String
|
26
|
+
data_mirror = DataInf_C.same_name_socket(:to_down,mix=false,data_mirror,nil,belong_to_module) unless data_mirror.is_a? String
|
27
|
+
|
28
|
+
if up_stream.nil? && data_in.eql?("data_in") && (!(data_mirror.eql?("data_mirror")) || !down_stream.nil?)
|
29
|
+
# up_stream = self.copy(name:"data_in")
|
30
|
+
# return_stream = up_stream
|
31
|
+
data_mirror = down_stream if down_stream
|
32
|
+
return down_stream.data_mirrors_verb(data_in:self)
|
33
|
+
end
|
34
|
+
|
35
|
+
data_in = up_stream if up_stream
|
36
|
+
unless self.eql? belong_to_module.DataInf_C_NC
|
37
|
+
data_mirror = self
|
38
|
+
else
|
39
|
+
if down_stream
|
40
|
+
data_mirror = down_stream
|
41
|
+
end
|
42
|
+
end
|
43
|
+
|
44
|
+
|
45
|
+
belong_to_module.DataInf_C_draw << data_mirrors_verb_draw(
|
46
|
+
h:h,
|
47
|
+
l:l,
|
48
|
+
num:num,
|
49
|
+
mode:mode,
|
50
|
+
condition_data:condition_data,
|
51
|
+
data_in:data_in,
|
52
|
+
data_mirror:data_mirror,
|
53
|
+
up_stream:up_stream,
|
54
|
+
down_stream:down_stream)
|
55
|
+
return return_stream
|
56
|
+
end
|
57
|
+
|
58
|
+
private
|
59
|
+
|
60
|
+
def data_mirrors_verb_draw(
|
61
|
+
h:0,
|
62
|
+
l:0,
|
63
|
+
num:8,
|
64
|
+
mode:"CDS_MODE",
|
65
|
+
condition_data:"condition_data",
|
66
|
+
data_in:"data_in",
|
67
|
+
data_mirror:"data_mirror",
|
68
|
+
up_stream:nil,
|
69
|
+
down_stream:nil
|
70
|
+
)
|
71
|
+
|
72
|
+
large_name_len(
|
73
|
+
h,
|
74
|
+
l,
|
75
|
+
num,
|
76
|
+
mode,
|
77
|
+
condition_data,
|
78
|
+
data_in,
|
79
|
+
data_mirror
|
80
|
+
)
|
81
|
+
instance_name = "data_mirrors_verb_#{signal}_inst"
|
82
|
+
"
|
83
|
+
// FilePath:::../../axi/data_interface/data_inf_c/data_mirrors_verb.sv.bak
|
84
|
+
data_mirrors_verb#(
|
85
|
+
.H (#{align_signal(h)}),
|
86
|
+
.L (#{align_signal(l)}),
|
87
|
+
.NUM (#{align_signal(num)}),
|
88
|
+
.MODE (#{align_signal(mode)})
|
89
|
+
) #{instance_name}(
|
90
|
+
/* input [H:L] */ .condition_data (#{align_signal(condition_data,q_mark=false)}),
|
91
|
+
/* data_inf_c.slaver*/ .data_in (#{align_signal(data_in,q_mark=false)}),
|
92
|
+
/* data_inf_c.master*/ .data_mirror (#{align_signal(data_mirror,q_mark=false)})
|
93
|
+
);
|
94
|
+
"
|
95
|
+
end
|
96
|
+
|
97
|
+
public
|
98
|
+
|
99
|
+
def self.data_mirrors_verb(
|
100
|
+
h:0,
|
101
|
+
l:0,
|
102
|
+
num:8,
|
103
|
+
mode:"CDS_MODE",
|
104
|
+
condition_data:"condition_data",
|
105
|
+
data_in:"data_in",
|
106
|
+
data_mirror:"data_mirror",
|
107
|
+
up_stream:nil,
|
108
|
+
down_stream:nil,
|
109
|
+
belong_to_module:nil
|
110
|
+
)
|
111
|
+
return_stream = nil
|
112
|
+
belong_to_module = [data_in,data_mirror].first.belong_to_module unless belong_to_module
|
113
|
+
|
114
|
+
if down_stream.nil? && data_mirror.eql?("data_mirror")
|
115
|
+
if up_stream.is_a? DataInf_C
|
116
|
+
down_stream = up_stream.copy
|
117
|
+
else
|
118
|
+
down_stream = data_in.copy
|
119
|
+
end
|
120
|
+
return_stream = down_stream
|
121
|
+
end
|
122
|
+
|
123
|
+
|
124
|
+
if up_stream.nil? && data_in.eql?("data_in")
|
125
|
+
if down_stream.is_a? DataInf_C
|
126
|
+
up_stream = down_stream.copy
|
127
|
+
else
|
128
|
+
up_stream = data_mirror.copy
|
129
|
+
end
|
130
|
+
return_stream = up_stream
|
131
|
+
end
|
132
|
+
|
133
|
+
|
134
|
+
if down_stream.is_a? DataInf_C
|
135
|
+
down_stream.data_mirrors_verb(
|
136
|
+
h:h,
|
137
|
+
l:l,
|
138
|
+
num:num,
|
139
|
+
mode:mode,
|
140
|
+
condition_data:condition_data,
|
141
|
+
data_in:data_in,
|
142
|
+
data_mirror:data_mirror,
|
143
|
+
up_stream:up_stream,
|
144
|
+
down_stream:down_stream)
|
145
|
+
elsif data_mirror.is_a? DataInf_C
|
146
|
+
data_mirror.data_mirrors_verb(
|
147
|
+
h:h,
|
148
|
+
l:l,
|
149
|
+
num:num,
|
150
|
+
mode:mode,
|
151
|
+
condition_data:condition_data,
|
152
|
+
data_in:data_in,
|
153
|
+
data_mirror:data_mirror,
|
154
|
+
up_stream:up_stream,
|
155
|
+
down_stream:down_stream)
|
156
|
+
else
|
157
|
+
belong_to_module.DataInf_C_NC.data_mirrors_verb(
|
158
|
+
h:h,
|
159
|
+
l:l,
|
160
|
+
num:num,
|
161
|
+
mode:mode,
|
162
|
+
condition_data:condition_data,
|
163
|
+
data_in:data_in,
|
164
|
+
data_mirror:data_mirror,
|
165
|
+
up_stream:up_stream,
|
166
|
+
down_stream:down_stream)
|
167
|
+
end
|
168
|
+
return return_stream
|
169
|
+
end
|
170
|
+
|
171
|
+
|
172
|
+
end
|
173
|
+
|