axi_tdl 0.0.2

Sign up to get free protection for your applications and to get access to all the features.
Files changed (1189) hide show
  1. checksums.yaml +7 -0
  2. data/.gitignore +8 -0
  3. data/CODE_OF_CONDUCT.md +74 -0
  4. data/Gemfile +6 -0
  5. data/Gemfile.lock +43 -0
  6. data/LICENSE +504 -0
  7. data/README.md +311 -0
  8. data/Rakefile +18 -0
  9. data/axi_tdl.gemspec +43 -0
  10. data/bin/console +14 -0
  11. data/bin/setup +8 -0
  12. data/lib/.rspec +1 -0
  13. data/lib/axi/AXI4/axi4_combin_wr_rd_batch.sv +59 -0
  14. data/lib/axi/AXI4/axi4_direct.sv +137 -0
  15. data/lib/axi/AXI4/axi4_direct_A1.sv +229 -0
  16. data/lib/axi/AXI4/axi4_direct_B1.sv +74 -0
  17. data/lib/axi/AXI4/axi4_direct_verb.sv +79 -0
  18. data/lib/axi/AXI4/axi4_direct_verc.sv +146 -0
  19. data/lib/axi/AXI4/axi4_dpram_cache.rb +106 -0
  20. data/lib/axi/AXI4/axi4_dpram_cache.sv +112 -0
  21. data/lib/axi/AXI4/axi4_long_to_axi4_wide.sv +85 -0
  22. data/lib/axi/AXI4/axi4_long_to_axi4_wide_A1.sv +96 -0
  23. data/lib/axi/AXI4/axi4_long_to_axi4_wide_track.sv +118 -0
  24. data/lib/axi/AXI4/axi4_long_to_axi4_wide_verb.sv +131 -0
  25. data/lib/axi/AXI4/axi4_pipe/axi4_pipe.sv +44 -0
  26. data/lib/axi/AXI4/axi4_pipe/axi4_pipe_verb.sv +45 -0
  27. data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe.sv +111 -0
  28. data/lib/axi/AXI4/axi4_pipe/axi4_rd_pipe_verb.sv +113 -0
  29. data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe.sv +142 -0
  30. data/lib/axi/AXI4/axi4_pipe/axi4_wr_pipe_verb.sv +146 -0
  31. data/lib/axi/AXI4/axi4_rd_auxiliary_batch_gen.sv +134 -0
  32. data/lib/axi/AXI4/axi4_rd_auxiliary_gen.sv +89 -0
  33. data/lib/axi/AXI4/axi4_rd_auxiliary_gen_A1.sv +109 -0
  34. data/lib/axi/AXI4/axi4_rd_burst_track.sv +164 -0
  35. data/lib/axi/AXI4/axi4_wr_aux_bind_data.sv +121 -0
  36. data/lib/axi/AXI4/axi4_wr_auxiliary_batch_gen.sv +140 -0
  37. data/lib/axi/AXI4/axi4_wr_auxiliary_gen.sv +102 -0
  38. data/lib/axi/AXI4/axi4_wr_auxiliary_gen_without_resp.sv +91 -0
  39. data/lib/axi/AXI4/axi4_wr_burst_track.sv +146 -0
  40. data/lib/axi/AXI4/axi_stream_add_addr_len.sv +50 -0
  41. data/lib/axi/AXI4/axi_stream_to_axi4_wr.sv +61 -0
  42. data/lib/axi/AXI4/axi_stream_to_axi4_wr_verb.sv.bak +123 -0
  43. data/lib/axi/AXI4/axis_to_axi4_wr.rb +149 -0
  44. data/lib/axi/AXI4/axis_to_axi4_wr.sv +141 -0
  45. data/lib/axi/AXI4/full_axi4_to_axis.sv +188 -0
  46. data/lib/axi/AXI4/full_axi4_to_axis_partition_wr_rd.sv +208 -0
  47. data/lib/axi/AXI4/id_record.sv +55 -0
  48. data/lib/axi/AXI4/idata_pool_axi4.sv +110 -0
  49. data/lib/axi/AXI4/interconnect/AXI4_interconnect_M2S.sv +291 -0
  50. data/lib/axi/AXI4/interconnect/axi4_mix_interconnect_M2S.sv +72 -0
  51. data/lib/axi/AXI4/interconnect/axi4_rd_interconnect_M2S.sv +148 -0
  52. data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S.sv +255 -0
  53. data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S.sv.bak +255 -0
  54. data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S_A1.sv +286 -0
  55. data/lib/axi/AXI4/interconnect/axi4_rd_mix_interconnect_M2S_A2.sv +281 -0
  56. data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S.sv +235 -0
  57. data/lib/axi/AXI4/interconnect/axi4_wr_interconnect_M2S_A1.sv +283 -0
  58. data/lib/axi/AXI4/interconnect/axi4_wr_mix_interconnect_M2S.sv +32 -0
  59. data/lib/axi/AXI4/long_axi4_to_wide_axi4.sv.bak +251 -0
  60. data/lib/axi/AXI4/odata_pool_axi4.sv +134 -0
  61. data/lib/axi/AXI4/odata_pool_axi4_A1.sv +165 -0
  62. data/lib/axi/AXI4/odata_pool_axi4_A2.sv +159 -0
  63. data/lib/axi/AXI4/odata_pool_axi4_A3.sv +183 -0
  64. data/lib/axi/AXI4/packet_fifo/axi4_packet_fifo.sv +61 -0
  65. data/lib/axi/AXI4/packet_fifo/axi4_rd_packet_fifo.sv +282 -0
  66. data/lib/axi/AXI4/packet_fifo/axi4_wr_packet_fifo.sv +181 -0
  67. data/lib/axi/AXI4/packet_merge/axi4_merge.sv +60 -0
  68. data/lib/axi/AXI4/packet_merge/axi4_merge_rd.sv +279 -0
  69. data/lib/axi/AXI4/packet_merge/axi4_merge_wr.sv +267 -0
  70. data/lib/axi/AXI4/packet_partition/axi4_partition.sv +36 -0
  71. data/lib/axi/AXI4/packet_partition/axi4_partition_OD.sv +66 -0
  72. data/lib/axi/AXI4/packet_partition/axi4_partition_rd.sv +211 -0
  73. data/lib/axi/AXI4/packet_partition/axi4_partition_rd_OD.sv +322 -0
  74. data/lib/axi/AXI4/packet_partition/axi4_partition_rd_verb.rb +80 -0
  75. data/lib/axi/AXI4/packet_partition/axi4_partition_rd_verb.sv +93 -0
  76. data/lib/axi/AXI4/packet_partition/axi4_partition_wr.sv +239 -0
  77. data/lib/axi/AXI4/packet_partition/axi4_partition_wr_OD.sv +302 -0
  78. data/lib/axi/AXI4/packet_partition/data_inf_partition.rb +293 -0
  79. data/lib/axi/AXI4/packet_partition/data_inf_partition.sv +307 -0
  80. data/lib/axi/AXI4/vcs_axi4_array_comptable.sv +35 -0
  81. data/lib/axi/AXI4/vcs_axi4_comptable.sv +330 -0
  82. data/lib/axi/AXI4/wide_axis_to_axi4_wr.rb +149 -0
  83. data/lib/axi/AXI4/wide_axis_to_axi4_wr.sv +140 -0
  84. data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe.sv +239 -0
  85. data/lib/axi/AXI4/width_convert/axi4_data_combin_aflag_pipe_A1.sv +204 -0
  86. data/lib/axi/AXI4/width_convert/axi4_data_convert.sv +312 -0
  87. data/lib/axi/AXI4/width_convert/axi4_data_convert_A1.sv +217 -0
  88. data/lib/axi/AXI4/width_convert/data_combin.sv +366 -0
  89. data/lib/axi/AXI4/width_convert/data_combin.sv.bak +290 -0
  90. data/lib/axi/AXI4/width_convert/data_destruct.sv +304 -0
  91. data/lib/axi/AXI4/width_convert/feed_check.sv +94 -0
  92. data/lib/axi/AXI4/width_convert/len_convert.sv.bak +61 -0
  93. data/lib/axi/AXI4/width_convert/odd_width_convert.sv +229 -0
  94. data/lib/axi/AXI4/width_convert/odd_width_convert_verb.sv +105 -0
  95. data/lib/axi/AXI4/width_convert/simple_data_pipe.sv +40 -0
  96. data/lib/axi/AXI4/width_convert/simple_data_pipe_slaver.sv +33 -0
  97. data/lib/axi/AXI4/width_convert/width_combin.sv +113 -0
  98. data/lib/axi/AXI4/width_convert/width_convert.sv +87 -0
  99. data/lib/axi/AXI4/width_convert/width_convert_verb.sv +249 -0
  100. data/lib/axi/AXI4/width_convert/width_destruct.sv +206 -0
  101. data/lib/axi/AXI4/width_convert/width_destruct_A1.sv +251 -0
  102. data/lib/axi/AXI_BFM/AXI_BFM_PKG.sv +1039 -0
  103. data/lib/axi/AXI_BFM/Data_C_BFM_PKG.sv +97 -0
  104. data/lib/axi/AXI_BFM/axi4_error_chk.sv +298 -0
  105. data/lib/axi/AXI_BFM/axi4_illegal_bfm_pkg.sv +607 -0
  106. data/lib/axi/AXI_BFM/axi_lite_master.sv +102 -0
  107. data/lib/axi/AXI_BFM/axi_lite_tb.sv +23 -0
  108. data/lib/axi/AXI_BFM/axi_master.sv +185 -0
  109. data/lib/axi/AXI_BFM/axi_mirror.sv +266 -0
  110. data/lib/axi/AXI_BFM/axi_mm_tb.sv +134 -0
  111. data/lib/axi/AXI_BFM/axi_slaver.sv.bak +340 -0
  112. data/lib/axi/AXI_BFM/axistreambfm.sv +117 -0
  113. data/lib/axi/AXI_Lite/axi4_to_lite.sv +36 -0
  114. data/lib/axi/AXI_Lite/axi_lite_configure.sv +356 -0
  115. data/lib/axi/AXI_Lite/axi_lite_configure_inf2.sv +365 -0
  116. data/lib/axi/AXI_Lite/axi_lite_configure_verb.sv.bck +370 -0
  117. data/lib/axi/AXI_Lite/axi_lite_interconnect_M2S.sv +437 -0
  118. data/lib/axi/AXI_Lite/axi_lite_interconnect_S2M.sv +359 -0
  119. data/lib/axi/AXI_Lite/axi_lite_interconnect_S2M.sv.bak +359 -0
  120. data/lib/axi/AXI_Lite/axi_lite_master_empty.sv +30 -0
  121. data/lib/axi/AXI_Lite/axi_lite_slaver_empty.sv +27 -0
  122. data/lib/axi/AXI_Lite/axil_direct.sv +52 -0
  123. data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv +230 -0
  124. data/lib/axi/AXI_Lite/common_configure_reg_interface/common_configure_reg_interface.sv.bak +109 -0
  125. data/lib/axi/AXI_Lite/common_configure_reg_interface/jtag_to_axilite_wrapper.sv +56 -0
  126. data/lib/axi/AXI_Lite/gen_axi_lite_ctrl.sv +515 -0
  127. data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_C1.sv +369 -0
  128. data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verb.sv +365 -0
  129. data/lib/axi/AXI_Lite/gen_axi_lite_ctrl_verc.sv +401 -0
  130. data/lib/axi/AXI_Lite/wr_lite_to_axis.sv +141 -0
  131. data/lib/axi/AXI_Lite/wr_lite_to_axis.sv.bak +141 -0
  132. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S.sv +76 -0
  133. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A1.sv +77 -0
  134. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_A2.sv +71 -0
  135. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_bind_tuser.sv +72 -0
  136. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_noaddr.sv +151 -0
  137. data/lib/axi/AXI_stream/axi_stream_interconnect_M2S_with_addr.sv +87 -0
  138. data/lib/axi/AXI_stream/axi_stream_interconnect_S2M.sv +65 -0
  139. data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_auto.sv +50 -0
  140. data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_info.sv +64 -0
  141. data/lib/axi/AXI_stream/axi_stream_interconnect_S2M_with_keep.sv.bak +64 -0
  142. data/lib/axi/AXI_stream/axi_stream_packet_fifo_with_info.sv.bak +49 -0
  143. data/lib/axi/AXI_stream/axi_stream_partition.sv +147 -0
  144. data/lib/axi/AXI_stream/axi_stream_partition_A1.sv +63 -0
  145. data/lib/axi/AXI_stream/axi_stream_planer.sv +51 -0
  146. data/lib/axi/AXI_stream/axi_stream_split_channel.rb +56 -0
  147. data/lib/axi/AXI_stream/axi_stream_split_channel.sv +149 -0
  148. data/lib/axi/AXI_stream/axi_streams_combin.sv +151 -0
  149. data/lib/axi/AXI_stream/axi_streams_combin_A1.sv +179 -0
  150. data/lib/axi/AXI_stream/axi_streams_scaler.sv +171 -0
  151. data/lib/axi/AXI_stream/axi_streams_scaler_A1.sv +179 -0
  152. data/lib/axi/AXI_stream/axis_append.sv +79 -0
  153. data/lib/axi/AXI_stream/axis_append_A1.sv +82 -0
  154. data/lib/axi/AXI_stream/axis_base_pipe.sv +184 -0
  155. data/lib/axi/AXI_stream/axis_combin_with_fifo.sv +69 -0
  156. data/lib/axi/AXI_stream/axis_connect_pipe.sv +86 -0
  157. data/lib/axi/AXI_stream/axis_connect_pipe_A1.sv.bak +170 -0
  158. data/lib/axi/AXI_stream/axis_connect_pipe_left_shift.sv +64 -0
  159. data/lib/axi/AXI_stream/axis_connect_pipe_right_shift.sv +64 -0
  160. data/lib/axi/AXI_stream/axis_connect_pipe_right_shift_verb.sv +70 -0
  161. data/lib/axi/AXI_stream/axis_connect_pipe_with_info.sv +93 -0
  162. data/lib/axi/AXI_stream/axis_direct.sv +55 -0
  163. data/lib/axi/AXI_stream/axis_direct_A1.sv +81 -0
  164. data/lib/axi/AXI_stream/axis_filter.sv +38 -0
  165. data/lib/axi/AXI_stream/axis_full_to_data_c.sv +26 -0
  166. data/lib/axi/AXI_stream/axis_head_cut.sv +67 -0
  167. data/lib/axi/AXI_stream/axis_head_cut_verb.sv +60 -0
  168. data/lib/axi/AXI_stream/axis_head_cut_verc.rb +175 -0
  169. data/lib/axi/AXI_stream/axis_head_cut_verc.sv +245 -0
  170. data/lib/axi/AXI_stream/axis_inct_s2m_with_flag.sv +84 -0
  171. data/lib/axi/AXI_stream/axis_insert_copy.rb +59 -0
  172. data/lib/axi/AXI_stream/axis_insert_copy.sv +66 -0
  173. data/lib/axi/AXI_stream/axis_intc_M2S_with_addr_inf.sv +114 -0
  174. data/lib/axi/AXI_stream/axis_intc_S2M_with_addr_inf.sv +85 -0
  175. data/lib/axi/AXI_stream/axis_interconnect_S2M_pipe.sv +75 -0
  176. data/lib/axi/AXI_stream/axis_length_cut.sv +64 -0
  177. data/lib/axi/AXI_stream/axis_length_fill.sv +194 -0
  178. data/lib/axi/AXI_stream/axis_length_split.sv +86 -0
  179. data/lib/axi/AXI_stream/axis_length_split_with_addr.sv +127 -0
  180. data/lib/axi/AXI_stream/axis_length_split_writh_user.sv +87 -0
  181. data/lib/axi/AXI_stream/axis_link_trigger.sv +81 -0
  182. data/lib/axi/AXI_stream/axis_master_empty.sv +26 -0
  183. data/lib/axi/AXI_stream/axis_mirror_to_master.sv +126 -0
  184. data/lib/axi/AXI_stream/axis_mirrors.sv +60 -0
  185. data/lib/axi/AXI_stream/axis_orthogonal.sv +66 -0
  186. data/lib/axi/AXI_stream/axis_ram_buffer.sv +118 -0
  187. data/lib/axi/AXI_stream/axis_rom_contect.rb +97 -0
  188. data/lib/axi/AXI_stream/axis_rom_contect.sv +110 -0
  189. data/lib/axi/AXI_stream/axis_rom_contect_sim.rb +102 -0
  190. data/lib/axi/AXI_stream/axis_rom_contect_sim.sv +113 -0
  191. data/lib/axi/AXI_stream/axis_slaver_empty.sv +22 -0
  192. data/lib/axi/AXI_stream/axis_slaver_pipe.sv +84 -0
  193. data/lib/axi/AXI_stream/axis_slaver_pipe_A1.sv +54 -0
  194. data/lib/axi/AXI_stream/axis_slaver_vector_empty.sv +27 -0
  195. data/lib/axi/AXI_stream/axis_split_channel_verb.rb +42 -0
  196. data/lib/axi/AXI_stream/axis_split_channel_verb.sv +62 -0
  197. data/lib/axi/AXI_stream/axis_to_axi4_or_lite.rb +127 -0
  198. data/lib/axi/AXI_stream/axis_to_axi4_or_lite.sv +153 -0
  199. data/lib/axi/AXI_stream/axis_to_data_inf.sv +34 -0
  200. data/lib/axi/AXI_stream/axis_to_lite_rd.sv +81 -0
  201. data/lib/axi/AXI_stream/axis_to_lite_wr.sv +71 -0
  202. data/lib/axi/AXI_stream/axis_uncompress.sv +147 -0
  203. data/lib/axi/AXI_stream/axis_uncompress_A1.sv +150 -0
  204. data/lib/axi/AXI_stream/axis_uncompress_verb.rb +32 -0
  205. data/lib/axi/AXI_stream/axis_uncompress_verb.sv +54 -0
  206. data/lib/axi/AXI_stream/axis_valve.sv +29 -0
  207. data/lib/axi/AXI_stream/axis_valve_with_pipe.sv +76 -0
  208. data/lib/axi/AXI_stream/axis_vector_master_empty.rb +11 -0
  209. data/lib/axi/AXI_stream/axis_vector_master_empty.sv +35 -0
  210. data/lib/axi/AXI_stream/axis_vector_slaver_empty.rb +11 -0
  211. data/lib/axi/AXI_stream/axis_vector_slaver_empty.sv +35 -0
  212. data/lib/axi/AXI_stream/check_stream_crc.sv +28 -0
  213. data/lib/axi/AXI_stream/data_c_to_axis_full.sv +23 -0
  214. data/lib/axi/AXI_stream/data_to_axis_inf.sv +103 -0
  215. data/lib/axi/AXI_stream/data_to_axis_inf_A1.sv +28 -0
  216. data/lib/axi/AXI_stream/data_width/axis_width_combin.sv +204 -0
  217. data/lib/axi/AXI_stream/data_width/axis_width_combin_A1.sv +220 -0
  218. data/lib/axi/AXI_stream/data_width/axis_width_convert.sv +49 -0
  219. data/lib/axi/AXI_stream/data_width/axis_width_destruct.sv +82 -0
  220. data/lib/axi/AXI_stream/data_width/axis_width_destruct_A1.sv +86 -0
  221. data/lib/axi/AXI_stream/ex_status/axis_ex_status.sv +97 -0
  222. data/lib/axi/AXI_stream/gen_big_field_table.sv +170 -0
  223. data/lib/axi/AXI_stream/gen_common_frame_table.sv +382 -0
  224. data/lib/axi/AXI_stream/gen_common_frame_table_bind_tuser.sv +428 -0
  225. data/lib/axi/AXI_stream/gen_origin_axis.sv +116 -0
  226. data/lib/axi/AXI_stream/gen_origin_axis_A1.sv +129 -0
  227. data/lib/axi/AXI_stream/gen_origin_axis_A2.sv +162 -0
  228. data/lib/axi/AXI_stream/gen_simple_axis.sv +164 -0
  229. data/lib/axi/AXI_stream/packet_fifo/axi_stream_long_fifo.sv +132 -0
  230. data/lib/axi/AXI_stream/packet_fifo/axi_stream_long_fifo_verb.sv +140 -0
  231. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo.sv +125 -0
  232. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1.sv +142 -0
  233. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1E.sv +198 -0
  234. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_verb.sv +120 -0
  235. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_with_info.sv +49 -0
  236. data/lib/axi/AXI_stream/packet_fifo/axi_stream_packet_long_fifo.sv +197 -0
  237. data/lib/axi/AXI_stream/packet_fifo/axi_stream_wide_fifo.sv +141 -0
  238. data/lib/axi/AXI_stream/packet_fifo/axis_pkt_fifo_filter_keep.sv +164 -0
  239. data/lib/axi/AXI_stream/packet_fifo/axis_pkt_fifo_filter_keep_A1.sv +166 -0
  240. data/lib/axi/AXI_stream/parse_big_field_table.sv +164 -0
  241. data/lib/axi/AXI_stream/parse_big_field_table_A1.sv +162 -0
  242. data/lib/axi/AXI_stream/parse_big_field_table_A2.sv +165 -0
  243. data/lib/axi/AXI_stream/parse_big_field_table_verb.sv +118 -0
  244. data/lib/axi/AXI_stream/parse_common_frame_table.sv +202 -0
  245. data/lib/axi/AXI_stream/parse_common_frame_table_A1.sv +521 -0
  246. data/lib/axi/AXI_stream/parse_common_frame_table_A2.sv +561 -0
  247. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache.sv +46 -0
  248. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_35bit.sv +122 -0
  249. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_36_71bit.sv +71 -0
  250. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_72_95bit.sv +96 -0
  251. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_72_95bit_with_keep.sv +99 -0
  252. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_96_143bit.sv +119 -0
  253. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_A1.sv +49 -0
  254. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_B1.sv +82 -0
  255. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_mirror.sv +44 -0
  256. data/lib/axi/AXI_stream/stream_cache/axi_stream_cache_verb.sv +58 -0
  257. data/lib/axi/AXI_stream/stream_cache/axi_stream_long_cache.sv +55 -0
  258. data/lib/axi/AXI_stream/stream_crc.sv +67 -0
  259. data/lib/axi/AXI_stream/vcs_axis_comptable.sv +73 -0
  260. data/lib/axi/LICENSE +504 -0
  261. data/lib/axi/ReadME.md +6 -0
  262. data/lib/axi/SIM/tb_axi4_partition_20201105.sv +115 -0
  263. data/lib/axi/SIM/tb_axis_bfm_0504.sv +61 -0
  264. data/lib/axi/SIM/tb_axis_partitiom_0929.sv +102 -0
  265. data/lib/axi/SIM/tb_axis_s2m_pipe_1023.sv +163 -0
  266. data/lib/axi/SIM/tb_axis_to_axi4_0925.sv +107 -0
  267. data/lib/axi/SIM/tb_data_c_m2s_inf_20200114.sv +222 -0
  268. data/lib/axi/SIM/tb_data_c_m2s_inf_20201103.sv +245 -0
  269. data/lib/axi/SIM/tb_data_c_pipe_inf_20180417.sv +114 -0
  270. data/lib/axi/SIM/tb_wide_axis_to_axi4_wr.sv +81 -0
  271. data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip.sv +589 -0
  272. data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_C1.sv +69 -0
  273. data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verb.sv +388 -0
  274. data/lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verc.sv +70 -0
  275. data/lib/axi/axi4_to_xilinx_ddr_native/ddr3_ip_native_to_axi4.sv +194 -0
  276. data/lib/axi/axi4_to_xilinx_ddr_native/ddr3_ip_wrapper_sim.sv +99 -0
  277. data/lib/axi/axi4_to_xilinx_ddr_native/ddr_axi4_to_axis.sv +188 -0
  278. data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo.sv +156 -0
  279. data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_A1.sv +180 -0
  280. data/lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_verb.sv +269 -0
  281. data/lib/axi/axi4_to_xilinx_ddr_native/model_ddr_ip_app.sv +303 -0
  282. data/lib/axi/axi4_to_xilinx_ddr_native/tb_ddr3_ip_wrapper_sim.sv +154 -0
  283. data/lib/axi/cfg.yml +15 -0
  284. data/lib/axi/common/ClockSameDomain.sv +128 -0
  285. data/lib/axi/common/common_ram_sim_wrapper.rb +66 -0
  286. data/lib/axi/common/common_ram_sim_wrapper.sv +75 -0
  287. data/lib/axi/common/common_ram_wrapper.rb +71 -0
  288. data/lib/axi/common/common_ram_wrapper.sv +82 -0
  289. data/lib/axi/common/data_c_interface_dram.rb +90 -0
  290. data/lib/axi/common/data_c_interface_dram.sv +106 -0
  291. data/lib/axi/common/mem_format.coe +60 -0
  292. data/lib/axi/common/pipe_vld.sv +45 -0
  293. data/lib/axi/common/test_write_mem.sv +22 -0
  294. data/lib/axi/common/xilinx_hdl_dpram.sv +142 -0
  295. data/lib/axi/common/xilinx_hdl_dpram_sim.sv +176 -0
  296. data/lib/axi/common_fifo/common_fifo.sv +165 -0
  297. data/lib/axi/common_fifo/common_stack.sv +56 -0
  298. data/lib/axi/common_fifo/independent_clock_fifo.sv +200 -0
  299. data/lib/axi/common_fifo/independent_clock_fifo_a1.sv +202 -0
  300. data/lib/axi/common_fifo/independent_stack.sv +85 -0
  301. data/lib/axi/data_interface/data_connect_pipe.sv +228 -0
  302. data/lib/axi/data_interface/data_inf_A2B.sv +21 -0
  303. data/lib/axi/data_interface/data_inf_B2A.sv +21 -0
  304. data/lib/axi/data_interface/data_inf_c/data_bind.sv +74 -0
  305. data/lib/axi/data_interface/data_inf_c/data_c_cache.sv +49 -0
  306. data/lib/axi/data_interface/data_inf_c/data_c_direct.sv +51 -0
  307. data/lib/axi/data_interface/data_inf_c/data_c_direct_mirror.sv +28 -0
  308. data/lib/axi/data_interface/data_inf_c/data_c_intc_M2S_force_robin.rb.bak +268 -0
  309. data/lib/axi/data_interface/data_inf_c/data_c_intc_M2S_force_robin.sv +301 -0
  310. data/lib/axi/data_interface/data_inf_c/data_c_pipe_force_vld.sv +57 -0
  311. data/lib/axi/data_interface/data_inf_c/data_c_pipe_force_vld_bind_data.sv +81 -0
  312. data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf.sv +130 -0
  313. data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_A1.sv +135 -0
  314. data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_left_shift.sv +158 -0
  315. data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_right_shift.sv +155 -0
  316. data/lib/axi/data_interface/data_inf_c/data_c_pipe_inf_right_shift_verb.sv +174 -0
  317. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_C1.sv +296 -0
  318. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_C1_with_id.sv +58 -0
  319. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_best_last.sv +319 -0
  320. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_best_robin.sv +293 -0
  321. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_robin.sv +296 -0
  322. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_robin_with_id.sv +46 -0
  323. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc.sv +405 -0
  324. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr.sv +226 -0
  325. data/lib/axi/data_interface/data_inf_c/data_c_pipe_intc_M2S_verc_with_id.sv +54 -0
  326. data/lib/axi/data_interface/data_inf_c/data_c_pipe_latency.sv +68 -0
  327. data/lib/axi/data_interface/data_inf_c/data_c_scaler.sv +326 -0
  328. data/lib/axi/data_interface/data_inf_c/data_c_scaler_A1.sv +333 -0
  329. data/lib/axi/data_interface/data_inf_c/data_c_tmp_cache.sv +44 -0
  330. data/lib/axi/data_interface/data_inf_c/data_condition_mirror.sv +64 -0
  331. data/lib/axi/data_interface/data_inf_c/data_condition_valve.sv +53 -0
  332. data/lib/axi/data_interface/data_inf_c/data_connect_pipe_inf.sv +73 -0
  333. data/lib/axi/data_interface/data_inf_c/data_inf_c_M2S_with_addr_and_id.sv +66 -0
  334. data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_M2S_with_id.sv +67 -0
  335. data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M.sv +70 -0
  336. data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M_A1.sv +72 -0
  337. data/lib/axi/data_interface/data_inf_c/data_inf_c_intc_S2M_with_lazy.sv +49 -0
  338. data/lib/axi/data_interface/data_inf_c/data_inf_c_interconnect_M2S.sv +50 -0
  339. data/lib/axi/data_interface/data_inf_c/data_inf_c_pipe_condition.sv +33 -0
  340. data/lib/axi/data_interface/data_inf_c/data_inf_c_planer.sv +50 -0
  341. data/lib/axi/data_interface/data_inf_c/data_inf_c_planer_A1.sv +53 -0
  342. data/lib/axi/data_interface/data_inf_c/data_intc_M2S_force_robin.sv +31 -0
  343. data/lib/axi/data_interface/data_inf_c/data_mirrors.sv +108 -0
  344. data/lib/axi/data_interface/data_inf_c/data_mirrors_verb.sv.bak +101 -0
  345. data/lib/axi/data_interface/data_inf_c/data_uncompress.sv +150 -0
  346. data/lib/axi/data_interface/data_inf_c/data_valve.sv +26 -0
  347. data/lib/axi/data_interface/data_inf_c/next_prio.sv +42 -0
  348. data/lib/axi/data_interface/data_inf_c/trigger_data_inf_c.sv +51 -0
  349. data/lib/axi/data_interface/data_inf_c/trigger_data_inf_c_A1.sv +54 -0
  350. data/lib/axi/data_interface/data_inf_c/trigger_ready_ctrl.sv +33 -0
  351. data/lib/axi/data_interface/data_inf_c/vcs_data_c_comptable.sv +40 -0
  352. data/lib/axi/data_interface/data_inf_cross_clk.sv +40 -0
  353. data/lib/axi/data_interface/data_inf_intc_M2S_force_addr_with_id.sv +62 -0
  354. data/lib/axi/data_interface/data_inf_intc_M2S_prio.sv +152 -0
  355. data/lib/axi/data_interface/data_inf_intc_M2S_prio_with_id.sv +55 -0
  356. data/lib/axi/data_interface/data_inf_interconnect_M2S_noaddr.sv +136 -0
  357. data/lib/axi/data_interface/data_inf_interconnect_M2S_with_id_noaddr.sv +55 -0
  358. data/lib/axi/data_interface/data_inf_planer.sv +59 -0
  359. data/lib/axi/data_interface/data_inf_planer_A1.sv +66 -0
  360. data/lib/axi/data_interface/data_inf_ticktock.sv +154 -0
  361. data/lib/axi/data_interface/data_interface.sv +91 -0
  362. data/lib/axi/data_interface/data_interface_pkg.sv +79 -0
  363. data/lib/axi/data_interface/data_pair_map.sv +152 -0
  364. data/lib/axi/data_interface/data_pair_map_A1.sv +159 -0
  365. data/lib/axi/data_interface/data_pair_map_A2.sv +212 -0
  366. data/lib/axi/data_interface/data_pipe_intc_M2S_addr.sv.bak +231 -0
  367. data/lib/axi/data_interface/data_pipe_interconnect.sv +290 -0
  368. data/lib/axi/data_interface/data_pipe_interconnect_M2S.sv +236 -0
  369. data/lib/axi/data_interface/data_pipe_interconnect_M2S.sv.bak1012 +237 -0
  370. data/lib/axi/data_interface/data_pipe_interconnect_M2S_A1.sv +241 -0
  371. data/lib/axi/data_interface/data_pipe_interconnect_M2S_verb.sv +302 -0
  372. data/lib/axi/data_interface/data_pipe_interconnect_M2S_verb.sv.bad_work +280 -0
  373. data/lib/axi/data_interface/data_pipe_interconnect_S2M.sv +332 -0
  374. data/lib/axi/data_interface/data_pipe_interconnect_S2M_A1.sv +376 -0
  375. data/lib/axi/data_interface/data_pipe_interconnect_S2M_verb.sv +265 -0
  376. data/lib/axi/data_interface/data_streams_combin.sv +592 -0
  377. data/lib/axi/data_interface/data_streams_combin_A1.sv +621 -0
  378. data/lib/axi/data_interface/data_streams_scaler.sv +593 -0
  379. data/lib/axi/data_interface/datainf_c_master_empty.sv +22 -0
  380. data/lib/axi/data_interface/datainf_c_slaver_empty.sv +22 -0
  381. data/lib/axi/data_interface/datainf_master_empty.sv +22 -0
  382. data/lib/axi/data_interface/datainf_slaver_empty.sv +22 -0
  383. data/lib/axi/data_interface/part_data_pair_map.sv +111 -0
  384. data/lib/axi/interface_define/axi_aux_inf.sv +206 -0
  385. data/lib/axi/interface_define/axi_inf.sv +1256 -0
  386. data/lib/axi/interface_define/axi_inf_verb.sv +42 -0
  387. data/lib/axi/interface_define/axi_interface_instance.svo +13 -0
  388. data/lib/axi/interface_define/axi_lite_inf.sv +345 -0
  389. data/lib/axi/interface_define/axi_stream_inf.sv +108 -0
  390. data/lib/axi/interface_define/bak/axi_aux_inf.sv +206 -0
  391. data/lib/axi/interface_define/bak/axi_inf_verb.sv +42 -0
  392. data/lib/axi/interface_define/bak/axi_interface_instance.svo +13 -0
  393. data/lib/axi/interface_define/bak/microblaze_inf.sv +136 -0
  394. data/lib/axi/interface_define/bak/xilinx_axi4_to_axi4.sv +87 -0
  395. data/lib/axi/interface_define/bak/xilinx_lite_to_lite.sv +128 -0
  396. data/lib/axi/interface_define/lite_inf2_to_inf.sv +38 -0
  397. data/lib/axi/interface_define/xilinx_axi4_to_axi4.sv +87 -0
  398. data/lib/axi/interface_define/xilinx_lite_to_lite.sv +128 -0
  399. data/lib/axi/macro/axil_macro.sv +132 -0
  400. data/lib/axi/macro/bak/axi4_base_files_add_to_vivado.tcl +28 -0
  401. data/lib/axi/macro/bak/axi_macro.sv +15 -0
  402. data/lib/axi/macro/bak/axis_base_files_add_to_vivado.tcl +26 -0
  403. data/lib/axi/macro/bak/base_files_add_to_vivado.tcl +24 -0
  404. data/lib/axi/macro/bak/data_inf_base_files_add_to_vivado.tcl +22 -0
  405. data/lib/axi/macro/bak/lite_inf_base_files_add_to_vivado.tcl +4 -0
  406. data/lib/axi/macro/bak/standard_tcl.rb +28 -0
  407. data/lib/axi/macro/bak/system_macro.sv +19 -0
  408. data/lib/axi/macro/bak/tcl_axi4_base_files_add_to_vivado.tcl +28 -0
  409. data/lib/axi/macro/bak/tcl_axis_base_files_add_to_vivado.tcl +26 -0
  410. data/lib/axi/macro/bak/tcl_base_files_add_to_vivado.tcl +24 -0
  411. data/lib/axi/macro/bak/tcl_data_inf_base_files_add_to_vivado.tcl +22 -0
  412. data/lib/axi/macro/bak/tcl_lite_inf_base_files_add_to_vivado.tcl +4 -0
  413. data/lib/axi/macro/bak/tcl_tmp.tcl +12 -0
  414. data/lib/axi/macro/bak/tmp.tcl +13 -0
  415. data/lib/axi/platform_ip/fifo_10_18bit_long.sv +125 -0
  416. data/lib/axi/platform_ip/fifo_145_216bit_A1.sv +167 -0
  417. data/lib/axi/platform_ip/fifo_217_288bit_A1.sv +191 -0
  418. data/lib/axi/platform_ip/fifo_36bit.sv +77 -0
  419. data/lib/axi/platform_ip/fifo_36bit_A1.sv +113 -0
  420. data/lib/axi/platform_ip/fifo_36kb_long.sv +145 -0
  421. data/lib/axi/platform_ip/fifo_37_72bit.sv +77 -0
  422. data/lib/axi/platform_ip/fifo_505_576bit_A1.sv +141 -0
  423. data/lib/axi/platform_ip/fifo_73_96bit.sv +102 -0
  424. data/lib/axi/platform_ip/fifo_97_144bit.sv +102 -0
  425. data/lib/axi/platform_ip/fifo_97_144bit_A1.sv +133 -0
  426. data/lib/axi/platform_ip/fifo_ku.sv +212 -0
  427. data/lib/axi/platform_ip/fifo_ku.sv.bak +488 -0
  428. data/lib/axi/platform_ip/fifo_ku_18bit.sv +138 -0
  429. data/lib/axi/platform_ip/fifo_ku_36bit.sv +148 -0
  430. data/lib/axi/platform_ip/fifo_ku_36kb_long.sv +135 -0
  431. data/lib/axi/platform_ip/fifo_ku_xbit_8192.sv.bak +107 -0
  432. data/lib/axi/platform_ip/fifo_wr_rd_mark.sv +94 -0
  433. data/lib/axi/platform_ip/ku_long_fifo_4bit.sv +189 -0
  434. data/lib/axi/platform_ip/long_fifo.sv +72 -0
  435. data/lib/axi/platform_ip/long_fifo_4bit.sv +156 -0
  436. data/lib/axi/platform_ip/long_fifo_4bit_8192.sv +133 -0
  437. data/lib/axi/platform_ip/long_fifo_4bit_SL8192.sv +133 -0
  438. data/lib/axi/platform_ip/long_fifo_verb.sv +110 -0
  439. data/lib/axi/platform_ip/wide_fifo.sv +66 -0
  440. data/lib/axi/platform_ip/wide_fifo_7series.sv +136 -0
  441. data/lib/axi/platform_ip/xilinx_fifo.sv +174 -0
  442. data/lib/axi/platform_ip/xilinx_fifo_A1.sv +223 -0
  443. data/lib/axi/platform_ip/xilinx_fifo_verb.sv +87 -0
  444. data/lib/axi/platform_ip/xilinx_fifo_verc.sv +87 -0
  445. data/lib/axi/platform_ip/xilinx_stream_packet_fifo_ip.sv +40 -0
  446. data/lib/axi/top/axi4_data_convert_2_20_tb.sv +126 -0
  447. data/lib/axi/top/axi4_data_convert_5_24_tb.sv +156 -0
  448. data/lib/axi/top/axi4_interconnnect_2_24_tb.sv +143 -0
  449. data/lib/axi/top/axi4_interconnnect_5_23_tb.sv +155 -0
  450. data/lib/axi/top/axi4_merge_tb_0331.sv +120 -0
  451. data/lib/axi/top/axi4_packet_fifo_2_28_tb.sv +107 -0
  452. data/lib/axi/top/axi4_partition_2_23_tb.sv +93 -0
  453. data/lib/axi/top/axi_stream_packet_fifo_2_28_tb.sv +78 -0
  454. data/lib/axi/top/axis_length_cut_2_28_tb.sv +79 -0
  455. data/lib/axi/top/axis_length_fill_8_18_tb.sv +81 -0
  456. data/lib/axi/top/common_fifo_2_27_tb.sv +77 -0
  457. data/lib/axi/top/data_convert_2_16_tb.sv +162 -0
  458. data/lib/axi/top/independent_fifo_2_27_tb.sv +90 -0
  459. data/lib/axi/top/long_to_wide_3_1_tb.sv +142 -0
  460. data/lib/axi/top/odd_width_convert_tb_420.sv +83 -0
  461. data/lib/axi/top/tb_axis_m2s_A1_0115.sv +158 -0
  462. data/lib/axi/top/tb_axis_width_combin_0913.sv +57 -0
  463. data/lib/axi/top/tb_axis_width_test_0914.sv +115 -0
  464. data/lib/axi/top/tb_data_c_inf_M2S_0823.sv +154 -0
  465. data/lib/axi/top/tb_data_c_inf_M2S_addr_0824.sv +252 -0
  466. data/lib/axi/top/tb_data_c_pipe_force_vld_1228.sv +96 -0
  467. data/lib/axi/top/tb_data_c_scaler_20180413.sv +187 -0
  468. data/lib/axi/top/tb_data_intc_S2M_0807.sv +168 -0
  469. data/lib/axi/top/tb_test_ku_fifo_0919.sv +98 -0
  470. data/lib/axi/top/width_convert_verb_tb_523.sv +68 -0
  471. data/lib/axi/video/video_stream_2_axi_stream.sv +90 -0
  472. data/lib/axi/video_interface/video_interface.sv +173 -0
  473. data/lib/axi_tdl.rb +6 -0
  474. data/lib/axi_tdl/version.rb +3 -0
  475. data/lib/spec/spec_helper.rb +100 -0
  476. data/lib/tdl/LICENSE +504 -0
  477. data/lib/tdl/Logic/Logic.tar.gz +0 -0
  478. data/lib/tdl/Logic/clock_rst_verb_auto.rb +99 -0
  479. data/lib/tdl/Logic/logic_edge.rb +194 -0
  480. data/lib/tdl/Logic/logic_latency.rb +197 -0
  481. data/lib/tdl/Logic/logic_main.rb +188 -0
  482. data/lib/tdl/Logic/logic_operator.rb.bak +128 -0
  483. data/lib/tdl/Logic/mdio_model_auto.rb +77 -0
  484. data/lib/tdl/Logic/path_lib.rb +7 -0
  485. data/lib/tdl/Logic/redefine_operator.rb +28 -0
  486. data/lib/tdl/ReadMe.md +295 -0
  487. data/lib/tdl/SDL/axi4/AXI4_interconnect_M2S_sdl.rb +10 -0
  488. data/lib/tdl/SDL/axi4/axi4_combin_wr_rd_batch_sdl.rb +10 -0
  489. data/lib/tdl/SDL/axi4/axi4_data_combin_aflag_pipe_A1_sdl.rb +38 -0
  490. data/lib/tdl/SDL/axi4/axi4_data_combin_aflag_pipe_sdl.rb +37 -0
  491. data/lib/tdl/SDL/axi4/axi4_data_convert_A1_sdl.rb +9 -0
  492. data/lib/tdl/SDL/axi4/axi4_data_convert_sdl.rb +9 -0
  493. data/lib/tdl/SDL/axi4/axi4_direct_A1_sdl.rb +14 -0
  494. data/lib/tdl/SDL/axi4/axi4_direct_B1_sdl.rb +9 -0
  495. data/lib/tdl/SDL/axi4/axi4_direct_sdl.rb +14 -0
  496. data/lib/tdl/SDL/axi4/axi4_direct_verb_sdl.rb +9 -0
  497. data/lib/tdl/SDL/axi4/axi4_direct_verc_sdl.rb +16 -0
  498. data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_A1_sdl.rb +10 -0
  499. data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_sdl.rb +9 -0
  500. data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_track_sdl.rb +9 -0
  501. data/lib/tdl/SDL/axi4/axi4_long_to_axi4_wide_verb_sdl.rb +11 -0
  502. data/lib/tdl/SDL/axi4/axi4_merge_rd_sdl.rb +10 -0
  503. data/lib/tdl/SDL/axi4/axi4_merge_sdl.rb +10 -0
  504. data/lib/tdl/SDL/axi4/axi4_merge_wr_sdl.rb +10 -0
  505. data/lib/tdl/SDL/axi4/axi4_mix_interconnect_M2S_sdl.rb +10 -0
  506. data/lib/tdl/SDL/axi4/axi4_packet_fifo_sdl.rb +12 -0
  507. data/lib/tdl/SDL/axi4/axi4_partition_OD_sdl.rb +11 -0
  508. data/lib/tdl/SDL/axi4/axi4_partition_rd_OD_sdl.rb +10 -0
  509. data/lib/tdl/SDL/axi4/axi4_partition_rd_sdl.rb +11 -0
  510. data/lib/tdl/SDL/axi4/axi4_partition_sdl.rb +11 -0
  511. data/lib/tdl/SDL/axi4/axi4_partition_wr_OD_sdl.rb +10 -0
  512. data/lib/tdl/SDL/axi4/axi4_partition_wr_sdl.rb +11 -0
  513. data/lib/tdl/SDL/axi4/axi4_pipe_sdl.rb +9 -0
  514. data/lib/tdl/SDL/axi4/axi4_pipe_verb_sdl.rb +9 -0
  515. data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_batch_gen_sdl.rb +11 -0
  516. data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_gen_A1_sdl.rb +9 -0
  517. data/lib/tdl/SDL/axi4/axi4_rd_auxiliary_gen_sdl.rb +9 -0
  518. data/lib/tdl/SDL/axi4/axi4_rd_burst_track_sdl.rb +10 -0
  519. data/lib/tdl/SDL/axi4/axi4_rd_interconnect_M2S_sdl.rb +10 -0
  520. data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_A1_sdl.rb +10 -0
  521. data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_A2_sdl.rb +10 -0
  522. data/lib/tdl/SDL/axi4/axi4_rd_mix_interconnect_M2S_sdl.rb +10 -0
  523. data/lib/tdl/SDL/axi4/axi4_rd_packet_fifo_sdl.rb +11 -0
  524. data/lib/tdl/SDL/axi4/axi4_rd_pipe_sdl.rb +9 -0
  525. data/lib/tdl/SDL/axi4/axi4_rd_pipe_verb_sdl.rb +9 -0
  526. data/lib/tdl/SDL/axi4/axi4_wr_aux_bind_data_sdl.rb +9 -0
  527. data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_batch_gen_sdl.rb +11 -0
  528. data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_sdl.rb +10 -0
  529. data/lib/tdl/SDL/axi4/axi4_wr_auxiliary_gen_without_resp_sdl.rb +10 -0
  530. data/lib/tdl/SDL/axi4/axi4_wr_burst_track_sdl.rb +10 -0
  531. data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_A1_sdl.rb +10 -0
  532. data/lib/tdl/SDL/axi4/axi4_wr_interconnect_M2S_sdl.rb +10 -0
  533. data/lib/tdl/SDL/axi4/axi4_wr_mix_interconnect_M2S_sdl.rb +10 -0
  534. data/lib/tdl/SDL/axi4/axi4_wr_packet_fifo_sdl.rb +11 -0
  535. data/lib/tdl/SDL/axi4/axi4_wr_pipe_sdl.rb +9 -0
  536. data/lib/tdl/SDL/axi4/axi4_wr_pipe_verb_sdl.rb +9 -0
  537. data/lib/tdl/SDL/axi4/axi_stream_add_addr_len_sdl.rb +11 -0
  538. data/lib/tdl/SDL/axi4/axi_stream_to_axi4_wr_sdl.rb +9 -0
  539. data/lib/tdl/SDL/axi4/data_combin_sdl.rb +20 -0
  540. data/lib/tdl/SDL/axi4/data_destruct_sdl.rb +19 -0
  541. data/lib/tdl/SDL/axi4/feed_check_sdl.rb +18 -0
  542. data/lib/tdl/SDL/axi4/full_axi4_to_axis_partition_wr_rd_sdl.rb +11 -0
  543. data/lib/tdl/SDL/axi4/full_axi4_to_axis_sdl.rb +10 -0
  544. data/lib/tdl/SDL/axi4/id_record_sdl.rb +19 -0
  545. data/lib/tdl/SDL/axi4/idata_pool_axi4_sdl.rb +18 -0
  546. data/lib/tdl/SDL/axi4/odata_pool_axi4_A1_sdl.rb +13 -0
  547. data/lib/tdl/SDL/axi4/odata_pool_axi4_A2_sdl.rb +10 -0
  548. data/lib/tdl/SDL/axi4/odata_pool_axi4_sdl.rb +19 -0
  549. data/lib/tdl/SDL/axi4/odd_width_convert_sdl.rb +19 -0
  550. data/lib/tdl/SDL/axi4/odd_width_convert_verb_sdl.rb +19 -0
  551. data/lib/tdl/SDL/axi4/simple_data_pipe_sdl.rb +16 -0
  552. data/lib/tdl/SDL/axi4/simple_data_pipe_slaver_sdl.rb +16 -0
  553. data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable.rb +9 -0
  554. data/lib/tdl/SDL/axi4/vcs_axi4_array_comptable_sdl.rb +10 -0
  555. data/lib/tdl/SDL/axi4/vcs_axi4_comptable.rb +8 -0
  556. data/lib/tdl/SDL/axi4/vcs_axi4_comptable_sdl.rb +9 -0
  557. data/lib/tdl/SDL/axi4/width_combin_sdl.rb +20 -0
  558. data/lib/tdl/SDL/axi4/width_convert_sdl.rb +20 -0
  559. data/lib/tdl/SDL/axi4/width_convert_verb_sdl.rb +20 -0
  560. data/lib/tdl/SDL/axi4/width_destruct_A1_sdl.rb +22 -0
  561. data/lib/tdl/SDL/axi4/width_destruct_sdl.rb +19 -0
  562. data/lib/tdl/SDL/axistream/axi_stream_cache_35bit_sdl.rb +9 -0
  563. data/lib/tdl/SDL/axistream/axi_stream_cache_36_71bit_sdl.rb +9 -0
  564. data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_sdl.rb +9 -0
  565. data/lib/tdl/SDL/axistream/axi_stream_cache_72_95bit_with_keep_sdl.rb +9 -0
  566. data/lib/tdl/SDL/axistream/axi_stream_cache_96_143bit_sdl.rb +9 -0
  567. data/lib/tdl/SDL/axistream/axi_stream_cache_B1_sdl.rb +9 -0
  568. data/lib/tdl/SDL/axistream/axi_stream_cache_mirror_sdl.rb +9 -0
  569. data/lib/tdl/SDL/axistream/axi_stream_cache_sdl.rb +9 -0
  570. data/lib/tdl/SDL/axistream/axi_stream_cache_verb_sdl.rb +9 -0
  571. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A1_sdl.rb +11 -0
  572. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_A2_sdl.rb +13 -0
  573. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_bind_tuser_sdl.rb +11 -0
  574. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_noaddr_sdl.rb +11 -0
  575. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_sdl.rb +12 -0
  576. data/lib/tdl/SDL/axistream/axi_stream_interconnect_M2S_with_addr_sdl.rb +12 -0
  577. data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_auto_sdl.rb +11 -0
  578. data/lib/tdl/SDL/axistream/axi_stream_interconnect_S2M_sdl.rb +12 -0
  579. data/lib/tdl/SDL/axistream/axi_stream_long_cache_sdl.rb +10 -0
  580. data/lib/tdl/SDL/axistream/axi_stream_long_fifo_sdl.rb +11 -0
  581. data/lib/tdl/SDL/axistream/axi_stream_long_fifo_verb_sdl.rb +11 -0
  582. data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1E_sdl.rb +16 -0
  583. data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_B1_sdl.rb +14 -0
  584. data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_sdl.rb +10 -0
  585. data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_verb_sdl.rb +13 -0
  586. data/lib/tdl/SDL/axistream/axi_stream_packet_fifo_with_info_sdl.rb +13 -0
  587. data/lib/tdl/SDL/axistream/axi_stream_packet_long_fifo_sdl.rb +11 -0
  588. data/lib/tdl/SDL/axistream/axi_stream_partition_A1_sdl.rb +11 -0
  589. data/lib/tdl/SDL/axistream/axi_stream_partition_sdl.rb +12 -0
  590. data/lib/tdl/SDL/axistream/axi_stream_wide_fifo_sdl.rb +10 -0
  591. data/lib/tdl/SDL/axistream/axi_streams_combin_A1_sdl.rb +15 -0
  592. data/lib/tdl/SDL/axistream/axi_streams_combin_sdl.rb +16 -0
  593. data/lib/tdl/SDL/axistream/axi_streams_scaler_A1_sdl.rb +14 -0
  594. data/lib/tdl/SDL/axistream/axi_streams_scaler_sdl.rb +15 -0
  595. data/lib/tdl/SDL/axistream/axis_append_A1_sdl.rb +18 -0
  596. data/lib/tdl/SDL/axistream/axis_append_sdl.rb +17 -0
  597. data/lib/tdl/SDL/axistream/axis_base_pipe_sdl.rb +10 -0
  598. data/lib/tdl/SDL/axistream/axis_combin_with_fifo_sdl.rb +14 -0
  599. data/lib/tdl/SDL/axistream/axis_connect_pipe_right_shift_sdl.rb +10 -0
  600. data/lib/tdl/SDL/axistream/axis_connect_pipe_sdl.rb +9 -0
  601. data/lib/tdl/SDL/axistream/axis_connect_pipe_with_info_sdl.rb +12 -0
  602. data/lib/tdl/SDL/axistream/axis_direct_A1_sdl.rb +11 -0
  603. data/lib/tdl/SDL/axistream/axis_direct_sdl.rb +9 -0
  604. data/lib/tdl/SDL/axistream/axis_ex_status_sdl.rb +12 -0
  605. data/lib/tdl/SDL/axistream/axis_filter_sdl.rb +10 -0
  606. data/lib/tdl/SDL/axistream/axis_full_to_data_c_sdl.rb +9 -0
  607. data/lib/tdl/SDL/axistream/axis_head_cut_sdl.rb +10 -0
  608. data/lib/tdl/SDL/axistream/axis_inct_s2m_with_flag_sdl.rb +11 -0
  609. data/lib/tdl/SDL/axistream/axis_intc_M2S_with_addr_inf_sdl.rb +11 -0
  610. data/lib/tdl/SDL/axistream/axis_intc_S2M_with_addr_inf_sdl.rb +12 -0
  611. data/lib/tdl/SDL/axistream/axis_interconnect_S2M_pipe_sdl.rb +15 -0
  612. data/lib/tdl/SDL/axistream/axis_length_cut_sdl.rb +10 -0
  613. data/lib/tdl/SDL/axistream/axis_length_fill_sdl.rb +10 -0
  614. data/lib/tdl/SDL/axistream/axis_length_split_sdl.rb +10 -0
  615. data/lib/tdl/SDL/axistream/axis_length_split_with_addr_sdl.rb +13 -0
  616. data/lib/tdl/SDL/axistream/axis_length_split_writh_user_sdl.rb +10 -0
  617. data/lib/tdl/SDL/axistream/axis_link_trigger_sdl.rb +12 -0
  618. data/lib/tdl/SDL/axistream/axis_master_empty_sdl.rb +8 -0
  619. data/lib/tdl/SDL/axistream/axis_mirror_to_master_sdl.rb +10 -0
  620. data/lib/tdl/SDL/axistream/axis_mirrors_sdl.rb +14 -0
  621. data/lib/tdl/SDL/axistream/axis_orthogonal_sdl.rb +10 -0
  622. data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_A1_sdl.rb +10 -0
  623. data/lib/tdl/SDL/axistream/axis_pkt_fifo_filter_keep_sdl.rb +10 -0
  624. data/lib/tdl/SDL/axistream/axis_ram_buffer_sdl.rb +13 -0
  625. data/lib/tdl/SDL/axistream/axis_slaver_empty_sdl.rb +8 -0
  626. data/lib/tdl/SDL/axistream/axis_slaver_pipe_A1_sdl.rb +10 -0
  627. data/lib/tdl/SDL/axistream/axis_slaver_pipe_sdl.rb +9 -0
  628. data/lib/tdl/SDL/axistream/axis_slaver_vector_empty_sdl.rb +9 -0
  629. data/lib/tdl/SDL/axistream/axis_to_data_inf_sdl.rb +10 -0
  630. data/lib/tdl/SDL/axistream/axis_to_lite_rd_sdl.rb +11 -0
  631. data/lib/tdl/SDL/axistream/axis_to_lite_wr_sdl.rb +10 -0
  632. data/lib/tdl/SDL/axistream/axis_uncompress_A1_sdl.rb +12 -0
  633. data/lib/tdl/SDL/axistream/axis_uncompress_sdl.rb +11 -0
  634. data/lib/tdl/SDL/axistream/axis_valve_sdl.rb +10 -0
  635. data/lib/tdl/SDL/axistream/axis_valve_with_pipe_sdl.rb +11 -0
  636. data/lib/tdl/SDL/axistream/axis_width_combin_A1_sdl.rb +9 -0
  637. data/lib/tdl/SDL/axistream/axis_width_combin_sdl.rb +9 -0
  638. data/lib/tdl/SDL/axistream/axis_width_convert_sdl.rb +9 -0
  639. data/lib/tdl/SDL/axistream/axis_width_destruct_A1_sdl.rb +9 -0
  640. data/lib/tdl/SDL/axistream/axis_width_destruct_sdl.rb +9 -0
  641. data/lib/tdl/SDL/axistream/check_stream_crc_sdl.rb +8 -0
  642. data/lib/tdl/SDL/axistream/data_c_to_axis_full_sdl.rb +9 -0
  643. data/lib/tdl/SDL/axistream/data_to_axis_inf_A1_sdl.rb +10 -0
  644. data/lib/tdl/SDL/axistream/data_to_axis_inf_sdl.rb +11 -0
  645. data/lib/tdl/SDL/axistream/gen_big_field_table_sdl.rb +14 -0
  646. data/lib/tdl/SDL/axistream/gen_common_frame_table_sdl.rb +60 -0
  647. data/lib/tdl/SDL/axistream/gen_origin_axis_A1_sdl.rb +13 -0
  648. data/lib/tdl/SDL/axistream/gen_origin_axis_sdl.rb +12 -0
  649. data/lib/tdl/SDL/axistream/gen_simple_axis_sdl.rb +13 -0
  650. data/lib/tdl/SDL/axistream/parse_big_field_table_A1_sdl.rb +17 -0
  651. data/lib/tdl/SDL/axistream/parse_big_field_table_A2_sdl.rb +17 -0
  652. data/lib/tdl/SDL/axistream/parse_big_field_table_sdl.rb +17 -0
  653. data/lib/tdl/SDL/axistream/stream_crc_sdl.rb +9 -0
  654. data/lib/tdl/SDL/axistream/vcs_axis_comptable.rb +16 -0
  655. data/lib/tdl/SDL/axistream/vcs_axis_comptable_sdl.rb +9 -0
  656. data/lib/tdl/SDL/data_inf_c/data_bind_sdl.rb +10 -0
  657. data/lib/tdl/SDL/data_inf_c/data_c_cache_sdl.rb +9 -0
  658. data/lib/tdl/SDL/data_inf_c/data_c_direct_mirror_sdl.rb +9 -0
  659. data/lib/tdl/SDL/data_inf_c/data_c_direct_sdl.rb +9 -0
  660. data/lib/tdl/SDL/data_inf_c/data_c_intc_M2S_force_robin_sdl.rb +10 -0
  661. data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_bind_data_sdl.rb +13 -0
  662. data/lib/tdl/SDL/data_inf_c/data_c_pipe_force_vld_sdl.rb +9 -0
  663. data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_A1_sdl.rb +10 -0
  664. data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_right_shift_sdl.rb +13 -0
  665. data/lib/tdl/SDL/data_inf_c/data_c_pipe_inf_sdl.rb +9 -0
  666. data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_sdl.rb +14 -0
  667. data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_C1_with_id_sdl.rb +16 -0
  668. data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_sdl.rb +13 -0
  669. data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_addr_sdl.rb +13 -0
  670. data/lib/tdl/SDL/data_inf_c/data_c_pipe_intc_M2S_verc_with_id_sdl.rb +15 -0
  671. data/lib/tdl/SDL/data_inf_c/data_c_pipe_latency_sdl.rb +10 -0
  672. data/lib/tdl/SDL/data_inf_c/data_c_scaler_A1_sdl.rb +16 -0
  673. data/lib/tdl/SDL/data_inf_c/data_c_scaler_sdl.rb +15 -0
  674. data/lib/tdl/SDL/data_inf_c/data_c_tmp_cache_sdl.rb +9 -0
  675. data/lib/tdl/SDL/data_inf_c/data_condition_mirror_sdl.rb +13 -0
  676. data/lib/tdl/SDL/data_inf_c/data_condition_valve_sdl.rb +13 -0
  677. data/lib/tdl/SDL/data_inf_c/data_connect_pipe_inf_sdl.rb +9 -0
  678. data/lib/tdl/SDL/data_inf_c/data_connect_pipe_sdl.rb +17 -0
  679. data/lib/tdl/SDL/data_inf_c/data_inf_A2B_sdl.rb +9 -0
  680. data/lib/tdl/SDL/data_inf_c/data_inf_B2A_sdl.rb +9 -0
  681. data/lib/tdl/SDL/data_inf_c/data_inf_c_M2S_with_addr_and_id_sdl.rb +17 -0
  682. data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_M2S_with_id_sdl.rb +15 -0
  683. data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_A1_sdl.rb +13 -0
  684. data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_sdl.rb +12 -0
  685. data/lib/tdl/SDL/data_inf_c/data_inf_c_intc_S2M_with_lazy_sdl.rb +15 -0
  686. data/lib/tdl/SDL/data_inf_c/data_inf_c_interconnect_M2S_sdl.rb +12 -0
  687. data/lib/tdl/SDL/data_inf_c/data_inf_c_pipe_condition_sdl.rb +10 -0
  688. data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1.rb +12 -0
  689. data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_A1_sdl.rb +14 -0
  690. data/lib/tdl/SDL/data_inf_c/data_inf_c_planer_sdl.rb +13 -0
  691. data/lib/tdl/SDL/data_inf_c/data_inf_cross_clk_sdl.rb +9 -0
  692. data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_force_addr_with_id_sdl.rb +19 -0
  693. data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_sdl.rb +14 -0
  694. data/lib/tdl/SDL/data_inf_c/data_inf_intc_M2S_prio_with_id_sdl.rb +17 -0
  695. data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_noaddr_sdl.rb +14 -0
  696. data/lib/tdl/SDL/data_inf_c/data_inf_interconnect_M2S_with_id_noaddr_sdl.rb +17 -0
  697. data/lib/tdl/SDL/data_inf_c/data_inf_planer_A1_sdl.rb +15 -0
  698. data/lib/tdl/SDL/data_inf_c/data_inf_planer_sdl.rb +14 -0
  699. data/lib/tdl/SDL/data_inf_c/data_inf_ticktock_sdl.rb +18 -0
  700. data/lib/tdl/SDL/data_inf_c/data_intc_M2S_force_robin_sdl.rb +10 -0
  701. data/lib/tdl/SDL/data_inf_c/data_mirrors_sdl.rb +14 -0
  702. data/lib/tdl/SDL/data_inf_c/data_pair_map_A1_sdl.rb +16 -0
  703. data/lib/tdl/SDL/data_inf_c/data_pair_map_A2_sdl.rb +19 -0
  704. data/lib/tdl/SDL/data_inf_c/data_pair_map_sdl.rb +14 -0
  705. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_A1_sdl.rb +19 -0
  706. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_sdl.rb +17 -0
  707. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_M2S_verb_sdl.rb +16 -0
  708. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_A1_sdl.rb +19 -0
  709. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_sdl.rb +16 -0
  710. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_S2M_verb_sdl.rb +15 -0
  711. data/lib/tdl/SDL/data_inf_c/data_pipe_interconnect_sdl.rb +23 -0
  712. data/lib/tdl/SDL/data_inf_c/data_streams_combin_A1_sdl.rb +20 -0
  713. data/lib/tdl/SDL/data_inf_c/data_streams_combin_sdl.rb +20 -0
  714. data/lib/tdl/SDL/data_inf_c/data_streams_scaler_sdl.rb +19 -0
  715. data/lib/tdl/SDL/data_inf_c/data_uncompress_sdl.rb +11 -0
  716. data/lib/tdl/SDL/data_inf_c/data_valve_sdl.rb +10 -0
  717. data/lib/tdl/SDL/data_inf_c/datainf_c_master_empty_sdl.rb +8 -0
  718. data/lib/tdl/SDL/data_inf_c/datainf_c_slaver_empty_sdl.rb +8 -0
  719. data/lib/tdl/SDL/data_inf_c/datainf_master_empty_sdl.rb +8 -0
  720. data/lib/tdl/SDL/data_inf_c/datainf_slaver_empty_sdl.rb +8 -0
  721. data/lib/tdl/SDL/data_inf_c/latency_sdl.rb +8 -0
  722. data/lib/tdl/SDL/data_inf_c/next_prio_sdl.rb +12 -0
  723. data/lib/tdl/SDL/data_inf_c/part_data_pair_map_sdl.rb +19 -0
  724. data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_A1_sdl.rb +11 -0
  725. data/lib/tdl/SDL/data_inf_c/trigger_data_inf_c_sdl.rb +11 -0
  726. data/lib/tdl/SDL/data_inf_c/trigger_ready_ctrl_sdl.rb +12 -0
  727. data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable.rb +8 -0
  728. data/lib/tdl/SDL/data_inf_c/vcs_data_c_comptable_sdl.rb +9 -0
  729. data/lib/tdl/SDL/fifo/common_fifo_sdl.rb +20 -0
  730. data/lib/tdl/SDL/fifo/common_stack_sdl.rb +14 -0
  731. data/lib/tdl/SDL/fifo/independent_clock_fifo_a1_sdl.rb +21 -0
  732. data/lib/tdl/SDL/fifo/independent_clock_fifo_sdl.rb +20 -0
  733. data/lib/tdl/SDL/fifo/independent_stack_sdl.rb +18 -0
  734. data/lib/tdl/SDL/path_lib.rb +6 -0
  735. data/lib/tdl/VideoInf/simple_video_gen.rb +46 -0
  736. data/lib/tdl/VideoInf/video_from_axi4.rb +108 -0
  737. data/lib/tdl/VideoInf/video_lib.rb +8 -0
  738. data/lib/tdl/VideoInf/video_stream_2_axi_stream.rb +67 -0
  739. data/lib/tdl/VideoInf/video_to_axi4.rb +75 -0
  740. data/lib/tdl/auto_script/auto_gen_tdl.rb +49 -0
  741. data/lib/tdl/auto_script/autogensdl.rb +289 -0
  742. data/lib/tdl/auto_script/autogentdl_a2.rb +452 -0
  743. data/lib/tdl/auto_script/import_hdl.rb +35 -0
  744. data/lib/tdl/auto_script/import_sdl.rb +26 -0
  745. data/lib/tdl/auto_script/test_autogensdl.rb +73 -0
  746. data/lib/tdl/auto_script/tmp.rb +6 -0
  747. data/lib/tdl/auto_script/tmp/hdl_test_sdl.rb +12 -0
  748. data/lib/tdl/axi4/axi4_combin_wr_rd_batch_auto.rb +79 -0
  749. data/lib/tdl/axi4/axi4_direct.rb +36 -0
  750. data/lib/tdl/axi4/axi4_direct_A1_auto.rb +137 -0
  751. data/lib/tdl/axi4/axi4_direct_auto.rb +79 -0
  752. data/lib/tdl/axi4/axi4_direct_verb_auto.rb +71 -0
  753. data/lib/tdl/axi4/axi4_interconnect_verb.rb +323 -0
  754. data/lib/tdl/axi4/axi4_lib.rb +9 -0
  755. data/lib/tdl/axi4/axi4_long_to_axi4_wide_A1_auto.rb +79 -0
  756. data/lib/tdl/axi4/axi4_long_to_axi4_wide_auto.rb +71 -0
  757. data/lib/tdl/axi4/axi4_long_to_axi4_wide_verb_auto.rb +86 -0
  758. data/lib/tdl/axi4/axi4_packet_fifo_auto.rb +155 -0
  759. data/lib/tdl/axi4/axi4_pipe_auto.rb +127 -0
  760. data/lib/tdl/axi4/axi4_pipe_verb_auto.rb +127 -0
  761. data/lib/tdl/axi4/axi4_rd_auxiliary_gen_auto.rb +71 -0
  762. data/lib/tdl/axi4/axi4_wr_auxiliary_gen_without_resp_auto.rb +78 -0
  763. data/lib/tdl/axi4/axis_to_axi4_wr_auto.rb +85 -0
  764. data/lib/tdl/axi4/bak/__axi4_wr_auxiliary_gen_without_resp.rb +175 -0
  765. data/lib/tdl/axi4/bak/axi4_combin_wr_rd_batch_auto.rb +153 -0
  766. data/lib/tdl/axi4/bak/axi4_data_convert.rb +74 -0
  767. data/lib/tdl/axi4/bak/axi4_direct_auto.rb +153 -0
  768. data/lib/tdl/axi4/bak/axi4_direct_verb_auto.rb +126 -0
  769. data/lib/tdl/axi4/bak/axi4_interconnect.rb.bak +91 -0
  770. data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_A1_auto.rb +153 -0
  771. data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_auto.rb +126 -0
  772. data/lib/tdl/axi4/bak/axi4_long_to_axi4_wide_verb_auto.rb +179 -0
  773. data/lib/tdl/axi4/bak/axi4_packet_fifo.rb.bak +75 -0
  774. data/lib/tdl/axi4/bak/axi4_packet_fifo_auto.rb +259 -0
  775. data/lib/tdl/axi4/bak/axi4_partition_od.rb +84 -0
  776. data/lib/tdl/axi4/bak/axi4_pipe_auto.rb +174 -0
  777. data/lib/tdl/axi4/bak/axi4_wr_auxiliary_gen_without_resp_auto.rb +152 -0
  778. data/lib/tdl/axi4/bak/axis_to_axi4_wr_auto.rb +178 -0
  779. data/lib/tdl/axi4/bak/ddr3.rb +40 -0
  780. data/lib/tdl/axi4/bak/idata_pool_axi4_auto.rb +396 -0
  781. data/lib/tdl/axi4/bak/odata_pool_axi4_A1_auto.rb +230 -0
  782. data/lib/tdl/axi4/bak/odata_pool_axi4_auto.rb +386 -0
  783. data/lib/tdl/axi4/idata_pool_axi4_auto.rb +176 -0
  784. data/lib/tdl/axi4/odata_pool_axi4_A1_auto.rb +99 -0
  785. data/lib/tdl/axi4/odata_pool_axi4_auto.rb +141 -0
  786. data/lib/tdl/axi4/wide_axis_to_axi4_wr.rb +84 -0
  787. data/lib/tdl/axi4/wide_axis_to_axi4_wr_auto.rb +84 -0
  788. data/lib/tdl/axi_lite/axi_lite_master_empty_auto.rb +85 -0
  789. data/lib/tdl/axi_lite/axi_lite_slaver_empty_auto.rb +68 -0
  790. data/lib/tdl/axi_lite/bak/axi_lite_master_empty_auto.rb +95 -0
  791. data/lib/tdl/axi_lite/bak/axi_lite_slaver_empty_auto.rb +88 -0
  792. data/lib/tdl/axi_lite/bak/jtag_to_axilite_wrapper_auto.rb +112 -0
  793. data/lib/tdl/axi_lite/jtag_to_axilite_wrapper_auto.rb +63 -0
  794. data/lib/tdl/axi_lite/lite_cmd.rb +154 -0
  795. data/lib/tdl/axi_lite/prj_lib.rb +6 -0
  796. data/lib/tdl/axi_stream/axi_stream_cache_35bit_auto.rb +127 -0
  797. data/lib/tdl/axi_stream/axi_stream_cache_72_95bit_with_keep_auto.rb +127 -0
  798. data/lib/tdl/axi_stream/axi_stream_cache_B1_auto.rb +127 -0
  799. data/lib/tdl/axi_stream/axi_stream_cache_auto.rb +134 -0
  800. data/lib/tdl/axi_stream/axi_stream_cache_mirror_auto.rb +127 -0
  801. data/lib/tdl/axi_stream/axi_stream_cache_verb_auto.rb +127 -0
  802. data/lib/tdl/axi_stream/axi_stream_interconnect.rb +214 -0
  803. data/lib/tdl/axi_stream/axi_stream_interconnect_M2S.rb +85 -0
  804. data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_A1.rb +129 -0
  805. data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_A1_auto.rb +137 -0
  806. data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_auto.rb +93 -0
  807. data/lib/tdl/axi_stream/axi_stream_interconnect_M2S_bind_tuser_auto.rb +137 -0
  808. data/lib/tdl/axi_stream/axi_stream_interconnect_S2M.rb +86 -0
  809. data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_auto.rb +86 -0
  810. data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_auto_auto.rb +91 -0
  811. data/lib/tdl/axi_stream/axi_stream_interconnect_S2M_with_keep.sv_auto.rb +93 -0
  812. data/lib/tdl/axi_stream/axi_stream_lib.rb +18 -0
  813. data/lib/tdl/axi_stream/axi_stream_long_cache_auto.rb +137 -0
  814. data/lib/tdl/axi_stream/axi_stream_long_fifo_auto.rb +146 -0
  815. data/lib/tdl/axi_stream/axi_stream_long_fifo_verb_auto.rb +146 -0
  816. data/lib/tdl/axi_stream/axi_stream_packet_fifo_auto.rb +137 -0
  817. data/lib/tdl/axi_stream/axi_stream_packet_fifo_with_info_auto.rb +164 -0
  818. data/lib/tdl/axi_stream/axi_stream_partition_A1_auto.rb +145 -0
  819. data/lib/tdl/axi_stream/axi_stream_partition_auto.rb +154 -0
  820. data/lib/tdl/axi_stream/axi_stream_wide_fifo_auto.rb +137 -0
  821. data/lib/tdl/axi_stream/axi_streams_combin_A1_auto.rb +184 -0
  822. data/lib/tdl/axi_stream/axi_streams_combin_auto.rb +193 -0
  823. data/lib/tdl/axi_stream/axi_streams_scaler_A1_auto.rb +175 -0
  824. data/lib/tdl/axi_stream/axi_streams_scaler_auto.rb +184 -0
  825. data/lib/tdl/axi_stream/axis_append_A1_auto.rb +209 -0
  826. data/lib/tdl/axi_stream/axis_append_auto.rb +200 -0
  827. data/lib/tdl/axi_stream/axis_combin_with_fifo_auto.rb +175 -0
  828. data/lib/tdl/axi_stream/axis_connect_pipe_A1.sv_auto.rb +127 -0
  829. data/lib/tdl/axi_stream/axis_connect_pipe_auto.rb +127 -0
  830. data/lib/tdl/axi_stream/axis_connect_pipe_with_info_auto.rb +155 -0
  831. data/lib/tdl/axi_stream/axis_direct_auto.rb +127 -0
  832. data/lib/tdl/axi_stream/axis_filter_auto.rb +136 -0
  833. data/lib/tdl/axi_stream/axis_full_to_data_c_auto.rb +71 -0
  834. data/lib/tdl/axi_stream/axis_head_cut_auto.rb +137 -0
  835. data/lib/tdl/axi_stream/axis_length_fill_auto.rb +136 -0
  836. data/lib/tdl/axi_stream/axis_length_split_auto.rb +136 -0
  837. data/lib/tdl/axi_stream/axis_length_split_with_addr_auto.rb +164 -0
  838. data/lib/tdl/axi_stream/axis_length_split_writh_user_auto.rb +136 -0
  839. data/lib/tdl/axi_stream/axis_link_trigger_auto.rb +93 -0
  840. data/lib/tdl/axi_stream/axis_master_empty_auto.rb +85 -0
  841. data/lib/tdl/axi_stream/axis_mirror_to_master_auto.rb +137 -0
  842. data/lib/tdl/axi_stream/axis_mirrors_auto.rb +173 -0
  843. data/lib/tdl/axi_stream/axis_pkt_fifo_filter_keep_A1_auto.rb +137 -0
  844. data/lib/tdl/axi_stream/axis_pkt_fifo_filter_keep_auto.rb +137 -0
  845. data/lib/tdl/axi_stream/axis_ram_buffer_auto.rb +164 -0
  846. data/lib/tdl/axi_stream/axis_slaver_empty_auto.rb +68 -0
  847. data/lib/tdl/axi_stream/axis_slaver_pipe_A1_auto.rb +137 -0
  848. data/lib/tdl/axi_stream/axis_slaver_pipe_auto.rb +127 -0
  849. data/lib/tdl/axi_stream/axis_to_axi4_or_lite_auto.rb +87 -0
  850. data/lib/tdl/axi_stream/axis_to_data_inf_auto.rb +79 -0
  851. data/lib/tdl/axi_stream/axis_to_lite_rd_auto.rb +87 -0
  852. data/lib/tdl/axi_stream/axis_to_lite_wr_auto.rb +79 -0
  853. data/lib/tdl/axi_stream/axis_uncompress_auto.rb +86 -0
  854. data/lib/tdl/axi_stream/axis_valve_auto.rb +136 -0
  855. data/lib/tdl/axi_stream/axis_valve_with_pipe_auto.rb +153 -0
  856. data/lib/tdl/axi_stream/axis_width_combin_A1_auto.rb +127 -0
  857. data/lib/tdl/axi_stream/axis_width_combin_auto.rb +127 -0
  858. data/lib/tdl/axi_stream/axis_width_convert_auto.rb +127 -0
  859. data/lib/tdl/axi_stream/axis_width_destruct_A1.sv_auto.rb +127 -0
  860. data/lib/tdl/axi_stream/axis_width_destruct_auto.rb +127 -0
  861. data/lib/tdl/axi_stream/bak/__axi_stream_interconnect_S2M.rb +186 -0
  862. data/lib/tdl/axi_stream/bak/_axis_mirrors.rb +270 -0
  863. data/lib/tdl/axi_stream/bak/axi4_to_native_for_ddr_ip_verb_auto.rb +343 -0
  864. data/lib/tdl/axi_stream/bak/axi_stream_S2M.rb +63 -0
  865. data/lib/tdl/axi_stream/bak/axi_stream_cache_35bit_auto.rb +138 -0
  866. data/lib/tdl/axi_stream/bak/axi_stream_cache_72_95bit_with_keep_auto.rb +138 -0
  867. data/lib/tdl/axi_stream/bak/axi_stream_cache_B1_auto.rb +138 -0
  868. data/lib/tdl/axi_stream/bak/axi_stream_cache_auto.rb +138 -0
  869. data/lib/tdl/axi_stream/bak/axi_stream_cache_mirror_auto.rb +138 -0
  870. data/lib/tdl/axi_stream/bak/axi_stream_cache_verb_auto.rb +138 -0
  871. data/lib/tdl/axi_stream/bak/axi_stream_interconnect_S2M_auto.rb +147 -0
  872. data/lib/tdl/axi_stream/bak/axi_stream_interconnect_S2M_with_keep.sv_auto.rb +166 -0
  873. data/lib/tdl/axi_stream/bak/axi_stream_long_fifo_auto.rb +177 -0
  874. data/lib/tdl/axi_stream/bak/axi_stream_packet_fifo_auto.rb +158 -0
  875. data/lib/tdl/axi_stream/bak/axi_stream_packet_fifo_with_info_auto.rb +215 -0
  876. data/lib/tdl/axi_stream/bak/axi_stream_partition_A1_auto.rb +176 -0
  877. data/lib/tdl/axi_stream/bak/axi_stream_partition_auto.rb +195 -0
  878. data/lib/tdl/axi_stream/bak/axi_streams_combin_auto.rb +274 -0
  879. data/lib/tdl/axi_stream/bak/axi_streams_scaler.rb +300 -0
  880. data/lib/tdl/axi_stream/bak/axi_streams_scaler_auto.rb +255 -0
  881. data/lib/tdl/axi_stream/bak/axis_append_A1.rb +265 -0
  882. data/lib/tdl/axi_stream/bak/axis_append_A1_auto.rb +310 -0
  883. data/lib/tdl/axi_stream/bak/axis_append_auto.rb +291 -0
  884. data/lib/tdl/axi_stream/bak/axis_combin_with_fifo_auto.rb +236 -0
  885. data/lib/tdl/axi_stream/bak/axis_connect_pipe.rb.bak +207 -0
  886. data/lib/tdl/axi_stream/bak/axis_connect_pipe_A1.sv_auto.rb +138 -0
  887. data/lib/tdl/axi_stream/bak/axis_connect_pipe_auto.rb +138 -0
  888. data/lib/tdl/axi_stream/bak/axis_connect_pipe_with_info_auto.rb +196 -0
  889. data/lib/tdl/axi_stream/bak/axis_direct_auto.rb +138 -0
  890. data/lib/tdl/axi_stream/bak/axis_filter_auto.rb +157 -0
  891. data/lib/tdl/axi_stream/bak/axis_length_fill_auto.rb +157 -0
  892. data/lib/tdl/axi_stream/bak/axis_length_split_auto.rb +157 -0
  893. data/lib/tdl/axi_stream/bak/axis_length_split_with_addr_auto.rb +215 -0
  894. data/lib/tdl/axi_stream/bak/axis_master_empty_auto.rb +95 -0
  895. data/lib/tdl/axi_stream/bak/axis_mirrors_auto.rb +234 -0
  896. data/lib/tdl/axi_stream/bak/axis_pkt_fifo_filter_keep_auto.rb +158 -0
  897. data/lib/tdl/axi_stream/bak/axis_ram_buffer_auto.rb +215 -0
  898. data/lib/tdl/axi_stream/bak/axis_slaver_empty_auto.rb +88 -0
  899. data/lib/tdl/axi_stream/bak/axis_slaver_pipe_A1_auto.rb +158 -0
  900. data/lib/tdl/axi_stream/bak/axis_slaver_pipe_auto.rb +138 -0
  901. data/lib/tdl/axi_stream/bak/axis_to_axi4_wr_auto.rb +205 -0
  902. data/lib/tdl/axi_stream/bak/axis_to_data_inf_auto.rb +108 -0
  903. data/lib/tdl/axi_stream/bak/axis_uncompress_auto.rb +147 -0
  904. data/lib/tdl/axi_stream/bak/axis_valve_auto.rb +157 -0
  905. data/lib/tdl/axi_stream/bak/axis_valve_with_pipe_auto.rb +157 -0
  906. data/lib/tdl/axi_stream/bak/axis_width_combin_auto.rb +138 -0
  907. data/lib/tdl/axi_stream/bak/axis_width_convert_auto.rb +138 -0
  908. data/lib/tdl/axi_stream/bak/axis_width_destruct_auto.rb +138 -0
  909. data/lib/tdl/axi_stream/bak/axis_wrapper_oled_auto.rb +230 -0
  910. data/lib/tdl/axi_stream/bak/check_stream_crc_auto.rb +88 -0
  911. data/lib/tdl/axi_stream/bak/data_to_axis_inf_A1.rb +129 -0
  912. data/lib/tdl/axi_stream/bak/data_to_axis_inf_A1_auto.rb +127 -0
  913. data/lib/tdl/axi_stream/bak/data_to_axis_inf_auto.rb +146 -0
  914. data/lib/tdl/axi_stream/bak/datainf_c_master_empty_auto.rb +115 -0
  915. data/lib/tdl/axi_stream/bak/datainf_c_slaver_empty_auto.rb +108 -0
  916. data/lib/tdl/axi_stream/bak/datainf_master_empty_auto.rb +115 -0
  917. data/lib/tdl/axi_stream/bak/datainf_slaver_empty_auto.rb +108 -0
  918. data/lib/tdl/axi_stream/bak/dynamic_port_cfg_auto.rb +246 -0
  919. data/lib/tdl/axi_stream/bak/dynnamic_addr_cfg_auto.rb +200 -0
  920. data/lib/tdl/axi_stream/bak/gen_big_field_table_auto.rb +210 -0
  921. data/lib/tdl/axi_stream/bak/gen_origin_axis_auto.rb +172 -0
  922. data/lib/tdl/axi_stream/bak/gen_simple_axis_auto.rb +191 -0
  923. data/lib/tdl/axi_stream/bak/idata_pool_axi4_auto.rb +346 -0
  924. data/lib/tdl/axi_stream/bak/parse_big_field_table_A1_auto.rb +292 -0
  925. data/lib/tdl/axi_stream/bak/parse_big_field_table_A2_auto.rb +292 -0
  926. data/lib/tdl/axi_stream/bak/parse_big_field_table_auto.rb +292 -0
  927. data/lib/tdl/axi_stream/bak/part_data_pair_map_auto.rb +362 -0
  928. data/lib/tdl/axi_stream/bak/simple_video_gen_A2.rb +146 -0
  929. data/lib/tdl/axi_stream/bak/simple_video_gen_A2_auto.rb +151 -0
  930. data/lib/tdl/axi_stream/bak/stream_crc_auto.rb +107 -0
  931. data/lib/tdl/axi_stream/bak/udp_server_bfm_auto.rb +131 -0
  932. data/lib/tdl/axi_stream/bak/udp_server_ctrl_bfm_auto.rb +131 -0
  933. data/lib/tdl/axi_stream/bak/video_to_VDMA.rb +153 -0
  934. data/lib/tdl/axi_stream/bak/video_to_VDMA_auto.rb +158 -0
  935. data/lib/tdl/axi_stream/check_stream_crc_auto.rb +63 -0
  936. data/lib/tdl/axi_stream/data_c_to_axis_full_auto.rb +71 -0
  937. data/lib/tdl/axi_stream/data_to_axis_inf_A1_auto.rb +78 -0
  938. data/lib/tdl/axi_stream/data_to_axis_inf_auto.rb +85 -0
  939. data/lib/tdl/axi_stream/gen_big_field_table_auto.rb +140 -0
  940. data/lib/tdl/axi_stream/gen_origin_axis_A1_auto.rb +131 -0
  941. data/lib/tdl/axi_stream/gen_origin_axis_auto.rb +122 -0
  942. data/lib/tdl/axi_stream/gen_simple_axis_auto.rb +131 -0
  943. data/lib/tdl/axi_stream/parse_big_field_table_A1_auto.rb +201 -0
  944. data/lib/tdl/axi_stream/parse_big_field_table_A2_auto.rb +201 -0
  945. data/lib/tdl/axi_stream/parse_big_field_table_auto.rb +201 -0
  946. data/lib/tdl/axi_stream/stream_crc_auto.rb +70 -0
  947. data/lib/tdl/basefunc.rb +338 -0
  948. data/lib/tdl/bfm/axi4_illegal_bfm.rb +203 -0
  949. data/lib/tdl/bfm/axi_stream/axi_stream_bfm.rb +351 -0
  950. data/lib/tdl/bfm/axi_stream/axis_bfm_exp.yml +38 -0
  951. data/lib/tdl/bfm/axi_stream/axis_bfm_module_build.rb +120 -0
  952. data/lib/tdl/bfm/axi_stream/axis_bfm_parse.rb +10 -0
  953. data/lib/tdl/bfm/axi_stream/axis_slice_to_logic.rb +71 -0
  954. data/lib/tdl/bfm/bfm_lib.rb +7 -0
  955. data/lib/tdl/bfm/logic_initial_block.rb +52 -0
  956. data/lib/tdl/cfg.yml +4 -0
  957. data/lib/tdl/class_hdl/hdl_always_comb.rb +54 -0
  958. data/lib/tdl/class_hdl/hdl_always_ff.rb +175 -0
  959. data/lib/tdl/class_hdl/hdl_assign.rb +49 -0
  960. data/lib/tdl/class_hdl/hdl_block_ifelse.rb +349 -0
  961. data/lib/tdl/class_hdl/hdl_data.rb +24 -0
  962. data/lib/tdl/class_hdl/hdl_ex_defarraychain.rb +231 -0
  963. data/lib/tdl/class_hdl/hdl_foreach.rb +114 -0
  964. data/lib/tdl/class_hdl/hdl_function.rb +277 -0
  965. data/lib/tdl/class_hdl/hdl_generate.rb +218 -0
  966. data/lib/tdl/class_hdl/hdl_initial.rb +147 -0
  967. data/lib/tdl/class_hdl/hdl_module_def.rb +447 -0
  968. data/lib/tdl/class_hdl/hdl_package.rb +150 -0
  969. data/lib/tdl/class_hdl/hdl_parameter.rb +73 -0
  970. data/lib/tdl/class_hdl/hdl_random.rb +31 -0
  971. data/lib/tdl/class_hdl/hdl_redefine_opertor.rb +653 -0
  972. data/lib/tdl/class_hdl/hdl_struct.rb +209 -0
  973. data/lib/tdl/class_hdl/hdl_verify.rb +136 -0
  974. data/lib/tdl/data_inf/_data_mirrors.rb +92 -0
  975. data/lib/tdl/data_inf/bak/_data_mirrors.rb +273 -0
  976. data/lib/tdl/data_inf/bak/common_fifo_auto.rb +279 -0
  977. data/lib/tdl/data_inf/bak/data_bind_auto.rb +128 -0
  978. data/lib/tdl/data_inf/bak/data_c_direct_auto.rb +138 -0
  979. data/lib/tdl/data_inf/bak/data_c_direct_mirror_auto.rb +138 -0
  980. data/lib/tdl/data_inf/bak/data_c_tmp_cache_auto.rb +138 -0
  981. data/lib/tdl/data_inf/bak/data_condition_mirror_auto.rb +216 -0
  982. data/lib/tdl/data_inf/bak/data_condition_valve_auto.rb +215 -0
  983. data/lib/tdl/data_inf/bak/data_connect_pipe.rb +80 -0
  984. data/lib/tdl/data_inf/bak/data_connect_pipe_inf_auto.rb +138 -0
  985. data/lib/tdl/data_inf/bak/data_inf_c_interconnect.rb +86 -0
  986. data/lib/tdl/data_inf/bak/data_inf_c_pipe_condition_auto.rb +157 -0
  987. data/lib/tdl/data_inf/bak/data_inf_cross_clk.rb +60 -0
  988. data/lib/tdl/data_inf/bak/data_inf_interconnect.rb +144 -0
  989. data/lib/tdl/data_inf/bak/data_inf_planer.rb +78 -0
  990. data/lib/tdl/data_inf/bak/data_inf_ticktack.rb +80 -0
  991. data/lib/tdl/data_inf/bak/data_inf_ticktock_auto.rb +0 -0
  992. data/lib/tdl/data_inf/bak/data_mirrors_auto.rb +234 -0
  993. data/lib/tdl/data_inf/bak/data_mirrors_verb.sv_auto.rb +234 -0
  994. data/lib/tdl/data_inf/bak/data_uncompress_auto.rb +177 -0
  995. data/lib/tdl/data_inf/bak/data_valve_auto.rb +127 -0
  996. data/lib/tdl/data_inf/bak/datainf_c_master_empty_auto.rb +95 -0
  997. data/lib/tdl/data_inf/bak/datainf_c_slaver_empty_auto.rb +88 -0
  998. data/lib/tdl/data_inf/bak/datainf_master_empty_auto.rb +95 -0
  999. data/lib/tdl/data_inf/bak/datainf_slaver_empty_auto.rb +88 -0
  1000. data/lib/tdl/data_inf/bak/independent_clock_fifo_auto.rb +298 -0
  1001. data/lib/tdl/data_inf/bak/part_data_pair_map_auto.rb +306 -0
  1002. data/lib/tdl/data_inf/common_fifo_auto.rb +141 -0
  1003. data/lib/tdl/data_inf/data_bind_auto.rb +79 -0
  1004. data/lib/tdl/data_inf/data_c_cache_auto.rb +135 -0
  1005. data/lib/tdl/data_inf/data_c_direct_auto.rb +127 -0
  1006. data/lib/tdl/data_inf/data_c_direct_mirror_auto.rb +127 -0
  1007. data/lib/tdl/data_inf/data_c_interconnect.rb +97 -0
  1008. data/lib/tdl/data_inf/data_c_pipe_force_vld_auto.rb +127 -0
  1009. data/lib/tdl/data_inf/data_c_pipe_inf_auto.rb +127 -0
  1010. data/lib/tdl/data_inf/data_c_pipe_intc_M2S_verc_auto.rb +123 -0
  1011. data/lib/tdl/data_inf/data_c_tmp_cache_auto.rb +127 -0
  1012. data/lib/tdl/data_inf/data_condition_mirror_auto.rb +165 -0
  1013. data/lib/tdl/data_inf/data_condition_valve_auto.rb +164 -0
  1014. data/lib/tdl/data_inf/data_connect_pipe_inf_auto.rb +127 -0
  1015. data/lib/tdl/data_inf/data_inf_c_pipe_condition_auto.rb +136 -0
  1016. data/lib/tdl/data_inf/data_mirrors_auto.rb +173 -0
  1017. data/lib/tdl/data_inf/data_mirrors_verb.sv_auto.rb +173 -0
  1018. data/lib/tdl/data_inf/data_uncompress_auto.rb +146 -0
  1019. data/lib/tdl/data_inf/data_valve_auto.rb +104 -0
  1020. data/lib/tdl/data_inf/datainf_c_master_empty_auto.rb +85 -0
  1021. data/lib/tdl/data_inf/datainf_c_slaver_empty_auto.rb +68 -0
  1022. data/lib/tdl/data_inf/datainf_master_empty_auto.rb +85 -0
  1023. data/lib/tdl/data_inf/datainf_slaver_empty_auto.rb +68 -0
  1024. data/lib/tdl/data_inf/independent_clock_fifo_auto.rb +141 -0
  1025. data/lib/tdl/data_inf/part_data_pair_map_auto.rb +149 -0
  1026. data/lib/tdl/data_inf/path_lib.rb +18 -0
  1027. data/lib/tdl/elements/Reset.rb +153 -0
  1028. data/lib/tdl/elements/axi4.rb +642 -0
  1029. data/lib/tdl/elements/axi_lite.rb +246 -0
  1030. data/lib/tdl/elements/axi_stream.rb +674 -0
  1031. data/lib/tdl/elements/clock.rb +193 -0
  1032. data/lib/tdl/elements/common_configure_reg.rb +135 -0
  1033. data/lib/tdl/elements/data_inf.rb +660 -0
  1034. data/lib/tdl/elements/logic.rb +356 -0
  1035. data/lib/tdl/elements/mail_box.rb +64 -0
  1036. data/lib/tdl/elements/originclass.rb +689 -0
  1037. data/lib/tdl/elements/parameter.rb +318 -0
  1038. data/lib/tdl/elements/track_inf.rb +163 -0
  1039. data/lib/tdl/elements/videoinf.rb +224 -0
  1040. data/lib/tdl/examples/10_random/exp_random.rb +13 -0
  1041. data/lib/tdl/examples/10_random/exp_random.sv +36 -0
  1042. data/lib/tdl/examples/11_test_unit/dve.tcl +64 -0
  1043. data/lib/tdl/examples/11_test_unit/exp_test_unit.rb +58 -0
  1044. data/lib/tdl/examples/11_test_unit/exp_test_unit.sv +35 -0
  1045. data/lib/tdl/examples/11_test_unit/exp_test_unit_constraints.xdc +25 -0
  1046. data/lib/tdl/examples/11_test_unit/modules/sub_md0.rb +23 -0
  1047. data/lib/tdl/examples/11_test_unit/modules/sub_md0.sv +41 -0
  1048. data/lib/tdl/examples/11_test_unit/modules/sub_md1.rb +25 -0
  1049. data/lib/tdl/examples/11_test_unit/modules/sub_md1.sv +41 -0
  1050. data/lib/tdl/examples/11_test_unit/tb_exp_test_unit.sv +28 -0
  1051. data/lib/tdl/examples/11_test_unit/tu0.sv +38 -0
  1052. data/lib/tdl/examples/11_test_unit/tu1.sv +28 -0
  1053. data/lib/tdl/examples/1_define_module/example1.rb +39 -0
  1054. data/lib/tdl/examples/1_define_module/exmple_md.sv +50 -0
  1055. data/lib/tdl/examples/2_hdl_class/always_comb.rb +99 -0
  1056. data/lib/tdl/examples/2_hdl_class/always_ff.rb +143 -0
  1057. data/lib/tdl/examples/2_hdl_class/case.rb +93 -0
  1058. data/lib/tdl/examples/2_hdl_class/foreach.rb +21 -0
  1059. data/lib/tdl/examples/2_hdl_class/function.rb +34 -0
  1060. data/lib/tdl/examples/2_hdl_class/generate.rb +62 -0
  1061. data/lib/tdl/examples/2_hdl_class/module_def.rb +33 -0
  1062. data/lib/tdl/examples/2_hdl_class/module_head_import_package.rb +36 -0
  1063. data/lib/tdl/examples/2_hdl_class/module_instance_test.rb +13 -0
  1064. data/lib/tdl/examples/2_hdl_class/package.rb +29 -0
  1065. data/lib/tdl/examples/2_hdl_class/package2.rb +21 -0
  1066. data/lib/tdl/examples/2_hdl_class/simple_assign.rb +39 -0
  1067. data/lib/tdl/examples/2_hdl_class/state_case.rb +65 -0
  1068. data/lib/tdl/examples/2_hdl_class/struct.rb +25 -0
  1069. data/lib/tdl/examples/2_hdl_class/struct_function.rb +28 -0
  1070. data/lib/tdl/examples/2_hdl_class/test_axi4_M2S.rb +16 -0
  1071. data/lib/tdl/examples/2_hdl_class/test_initial_assert.rb +11 -0
  1072. data/lib/tdl/examples/2_hdl_class/test_inst_sugar.rb +28 -0
  1073. data/lib/tdl/examples/2_hdl_class/test_module_port.rb +47 -0
  1074. data/lib/tdl/examples/2_hdl_class/test_module_var.rb +18 -0
  1075. data/lib/tdl/examples/2_hdl_class/tmp/always_comb_test.sv +108 -0
  1076. data/lib/tdl/examples/2_hdl_class/tmp/always_ff_test.sv +35 -0
  1077. data/lib/tdl/examples/2_hdl_class/tmp/case_test.sv +105 -0
  1078. data/lib/tdl/examples/2_hdl_class/tmp/head_pkg_module.sv +42 -0
  1079. data/lib/tdl/examples/2_hdl_class/tmp/init_module.sv +110 -0
  1080. data/lib/tdl/examples/2_hdl_class/tmp/module_instance_test.sv +31 -0
  1081. data/lib/tdl/examples/2_hdl_class/tmp/port_module.sv +99 -0
  1082. data/lib/tdl/examples/2_hdl_class/tmp/simple_assign_test.sv +27 -0
  1083. data/lib/tdl/examples/2_hdl_class/tmp/state_case_test.sv +78 -0
  1084. data/lib/tdl/examples/2_hdl_class/tmp/test_axi4_M2S.sv +30 -0
  1085. data/lib/tdl/examples/2_hdl_class/tmp/test_foreach.sv +34 -0
  1086. data/lib/tdl/examples/2_hdl_class/tmp/test_function.sv +52 -0
  1087. data/lib/tdl/examples/2_hdl_class/tmp/test_initial_assert.sv +31 -0
  1088. data/lib/tdl/examples/2_hdl_class/tmp/test_inst_sugar.sv +42 -0
  1089. data/lib/tdl/examples/2_hdl_class/tmp/test_module.sv +36 -0
  1090. data/lib/tdl/examples/2_hdl_class/tmp/test_module_port.sv +33 -0
  1091. data/lib/tdl/examples/2_hdl_class/tmp/test_module_var.sv +35 -0
  1092. data/lib/tdl/examples/2_hdl_class/tmp/test_package.sv +38 -0
  1093. data/lib/tdl/examples/2_hdl_class/tmp/test_package2.sv +36 -0
  1094. data/lib/tdl/examples/2_hdl_class/tmp/test_struct.sv +38 -0
  1095. data/lib/tdl/examples/2_hdl_class/tmp/test_struct_function.sv +44 -0
  1096. data/lib/tdl/examples/2_hdl_class/tmp/test_vcs_string.sv +27 -0
  1097. data/lib/tdl/examples/2_hdl_class/tmp/text_generate.sv +54 -0
  1098. data/lib/tdl/examples/2_hdl_class/vcs_string.rb +5 -0
  1099. data/lib/tdl/examples/3_hdl_sdl_instance/hdl_test.sv +13 -0
  1100. data/lib/tdl/examples/3_hdl_sdl_instance/main.rb +26 -0
  1101. data/lib/tdl/examples/3_hdl_sdl_instance/main_md.sv +42 -0
  1102. data/lib/tdl/examples/3_hdl_sdl_instance/sdl_md.sv +30 -0
  1103. data/lib/tdl/examples/3_hdl_sdl_instance/sdl_test.rb +9 -0
  1104. data/lib/tdl/examples/4_generate/example.rb +38 -0
  1105. data/lib/tdl/examples/4_generate/test_generate.sv +59 -0
  1106. data/lib/tdl/examples/5_logic_combin/login_combin.rb +22 -0
  1107. data/lib/tdl/examples/5_logic_combin/test_logic_combin.sv +36 -0
  1108. data/lib/tdl/examples/6_module_with_interface/example.rb +48 -0
  1109. data/lib/tdl/examples/6_module_with_interface/example_interface.sv +40 -0
  1110. data/lib/tdl/examples/6_module_with_interface/inf_collect.rb +54 -0
  1111. data/lib/tdl/examples/6_module_with_interface/inf_collect.sv +63 -0
  1112. data/lib/tdl/examples/7_module_with_package/body_package.rb +3 -0
  1113. data/lib/tdl/examples/7_module_with_package/body_package.sv +25 -0
  1114. data/lib/tdl/examples/7_module_with_package/example_pkg.rb +20 -0
  1115. data/lib/tdl/examples/7_module_with_package/example_pkg.sv +35 -0
  1116. data/lib/tdl/examples/7_module_with_package/head_package.rb +8 -0
  1117. data/lib/tdl/examples/7_module_with_package/head_package.sv +29 -0
  1118. data/lib/tdl/examples/8_top_module/dve.tcl +64 -0
  1119. data/lib/tdl/examples/8_top_module/example.rb +8 -0
  1120. data/lib/tdl/examples/8_top_module/pins.yml +7 -0
  1121. data/lib/tdl/examples/8_top_module/tb_test_top.sv +29 -0
  1122. data/lib/tdl/examples/8_top_module/test_top.sv +28 -0
  1123. data/lib/tdl/examples/8_top_module/test_top_constraints.xdc +37 -0
  1124. data/lib/tdl/examples/9_itegration/A_itgt/a_test_md.sv +29 -0
  1125. data/lib/tdl/examples/9_itegration/A_itgt/a_test_module.rb +6 -0
  1126. data/lib/tdl/examples/9_itegration/A_itgt/itgt_module_a_block.rb +34 -0
  1127. data/lib/tdl/examples/9_itegration/clock_manage/itgt_module_clock_manage.rb +33 -0
  1128. data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.rb +7 -0
  1129. data/lib/tdl/examples/9_itegration/clock_manage/simple_clock.sv +29 -0
  1130. data/lib/tdl/examples/9_itegration/dve.tcl +64 -0
  1131. data/lib/tdl/examples/9_itegration/pins.yml +4 -0
  1132. data/lib/tdl/examples/9_itegration/tb_test_top.sv +29 -0
  1133. data/lib/tdl/examples/9_itegration/tb_test_tttop.sv +29 -0
  1134. data/lib/tdl/examples/9_itegration/test_top.sv +40 -0
  1135. data/lib/tdl/examples/9_itegration/test_top_constraints.xdc +29 -0
  1136. data/lib/tdl/examples/9_itegration/test_tttop.sv +40 -0
  1137. data/lib/tdl/examples/9_itegration/test_tttop_constraints.xdc +29 -0
  1138. data/lib/tdl/examples/9_itegration/top.rb +11 -0
  1139. data/lib/tdl/examples/readme.md +31 -0
  1140. data/lib/tdl/exlib/common_cfg_reg_inf.rb +139 -0
  1141. data/lib/tdl/exlib/constraints.rb +286 -0
  1142. data/lib/tdl/exlib/constraints_verb.rb +304 -0
  1143. data/lib/tdl/exlib/dve_tcl.rb +162 -0
  1144. data/lib/tdl/exlib/element_class_vars.rb +106 -0
  1145. data/lib/tdl/exlib/global_param.rb +108 -0
  1146. data/lib/tdl/exlib/integral_test/bak/integral_test.rb +206 -0
  1147. data/lib/tdl/exlib/integral_test/clock_itest.rb +28 -0
  1148. data/lib/tdl/exlib/integral_test/diff_clock_itest.rb +30 -0
  1149. data/lib/tdl/exlib/integral_test/io_itest.rb +41 -0
  1150. data/lib/tdl/exlib/integral_test/reset_itest.rb +31 -0
  1151. data/lib/tdl/exlib/integral_test/simple_logic_itest.rb +19 -0
  1152. data/lib/tdl/exlib/itegration.rb +307 -0
  1153. data/lib/tdl/exlib/itegration_verb.rb +913 -0
  1154. data/lib/tdl/exlib/parse_argv.rb +43 -0
  1155. data/lib/tdl/exlib/sdlmodule_sim.bak.rb +375 -0
  1156. data/lib/tdl/exlib/test_point.rb +287 -0
  1157. data/lib/tdl/global_scan.rb +134 -0
  1158. data/lib/tdl/rebuild_ele/axi4.rb +141 -0
  1159. data/lib/tdl/rebuild_ele/axi_lite.rb +56 -0
  1160. data/lib/tdl/rebuild_ele/axi_stream.rb +121 -0
  1161. data/lib/tdl/rebuild_ele/cm_ram_inf.sv +105 -0
  1162. data/lib/tdl/rebuild_ele/cm_ram_inf_define.rb +44 -0
  1163. data/lib/tdl/rebuild_ele/data_inf.rb +27 -0
  1164. data/lib/tdl/rebuild_ele/data_inf_c.rb +83 -0
  1165. data/lib/tdl/rebuild_ele/ele_base.rb +822 -0
  1166. data/lib/tdl/rebuild_ele/readme.md +1 -0
  1167. data/lib/tdl/sdlimplement/resource.yml +154 -0
  1168. data/lib/tdl/sdlimplement/sdl_impl_module.rb +391 -0
  1169. data/lib/tdl/sdlimplement/sdl_impl_param.rb +26 -0
  1170. data/lib/tdl/sdlimplement/test.rb +64 -0
  1171. data/lib/tdl/sdlmodule/bak/sdlmodule_varible_ex.rb +120 -0
  1172. data/lib/tdl/sdlmodule/generator_block_module.rb +84 -0
  1173. data/lib/tdl/sdlmodule/sdlmodule.rb +407 -0
  1174. data/lib/tdl/sdlmodule/sdlmodule_arraychain.rb +333 -0
  1175. data/lib/tdl/sdlmodule/sdlmodule_draw.rb +272 -0
  1176. data/lib/tdl/sdlmodule/sdlmodule_head_logo.txt +10 -0
  1177. data/lib/tdl/sdlmodule/sdlmodule_instance.rb +623 -0
  1178. data/lib/tdl/sdlmodule/sdlmodule_port_define.rb +374 -0
  1179. data/lib/tdl/sdlmodule/sdlmodule_varible.rb +160 -0
  1180. data/lib/tdl/sdlmodule/sdlmodule_vcs_comptable.rb +140 -0
  1181. data/lib/tdl/sdlmodule/techbench_module.rb +14 -0
  1182. data/lib/tdl/sdlmodule/test_unit_module.rb +138 -0
  1183. data/lib/tdl/sdlmodule/top_module.rb +543 -0
  1184. data/lib/tdl/tdl.rb +265 -0
  1185. data/lib/tdl/tdlerror/tdlerror.rb +8 -0
  1186. data/lib/tdl/testunit/test_all.rb +4 -0
  1187. data/lib/tdl/testunit/test_array_chain.rb +89 -0
  1188. data/lib/tdl/testunit/test_tmp.rb +47 -0
  1189. metadata +1301 -0
data/lib/tdl/SDL/path_lib.rb ADDED
@@ -0,0 +1,6 @@
1
+
2
+ require_relative "./../global_scan"
3
+ curr = File.expand_path(__FILE__)
4
+ curr_path = File.dirname(curr)
5
+ require_path(curr_path)
6
+ # require_path_and_ignore(curr_path,"logic_condition.rb")
data/lib/tdl/VideoInf/simple_video_gen.rb ADDED
@@ -0,0 +1,46 @@
1
+ # require_relative "./video_lib"
2
+ # require_relative ".././videoinf"
3
+ # require_relative ".././tdl"
4
+
5
+ class VideoInf
6
+
7
+ def simple_video_gen(mode:"1080P@60",enable:nil)
8
+ video_master = self
9
+ # $_draw = lambda { simple_video_gen_draw(video_master:video_master,mode:mode,enable:enable) }
10
+ # @correlation_proc += $_draw.call
11
+ belong_to_module.VideoInf_draw << simple_video_gen_draw(video_master:video_master,mode:mode,enable:enable)
12
+ return video_master
13
+ end
14
+
15
+ def simple_video_gen_draw(video_master:self,mode:nil,enable:nil)
16
+ large_name_len(video_master,mode)
17
+ "simple_video_gen_A2 #(
18
+ .MODE (#{align_signal(mode)}),
19
+ .DSIZE (#{align_signal(signal,false)}.DSIZE)
20
+ )simple_video_gen_A2_#{(signal)}_inst(
21
+ /* input */ .enable (#{align_signal(enable)}),
22
+ /* video_native_inf.compact_out */ .inf (#{align_signal(video_master)})
23
+ );"
24
+ end
25
+
26
+ def self.simple_video_gen(video_master:nil,mode:nil,enable:nil,copy_inf:nil,belong_to_module:nil)
27
+ unless video_master
28
+ video_master = belong_to_module.Def.videoinf(name:copy_inf.name+"_cp",clock:copy_inf.clock,reset:copy_inf.reset,dsize:copy_inf.dsize,dimension:copy_inf.dimension)
29
+ end
30
+
31
+ video_master.simple_video_gen(mode:mode,enable:enable)
32
+ end
33
+ end
34
+
35
+ # class TdlTest
36
+ #
37
+ # def self.test_simple_video_gen
38
+ # c0 = Clock.new(name:"时钟",freqM:148.5)
39
+ # r0 = Reset.new(name:"复位",active:"low")
40
+ # p0 = Parameter.new(name:"P0",value:24)
41
+ # data = VideoInf.new(name:"in",clock:c0,reset:r0,dsize:p0)
42
+ # VideoInf.simple_video_gen(mode:"1080P@50",enable:"1'b1",copy_inf:data)
43
+ # puts_sv Tdl.inst,Tdl.draw
44
+ # Tdl.clear
45
+ # end
46
+ # end
data/lib/tdl/VideoInf/video_from_axi4.rb ADDED
@@ -0,0 +1,108 @@
1
+ # require_relative "./video_lib"
2
+ # require_relative ".././videoinf"
3
+ # require_relative ".././tdl"
4
+
5
+ class VideoInf
6
+
7
+ def from_axi4(axi4_master:nil,video_slaver:nil,mode:"LINE",base_addr:nil)
8
+ unless axi4_master
9
+ axi4_master = Axi4.new(name:@name+"_f_v",clock:@clock,reset:@reset,dsize:@dsize,max_len:2**32,mode:Axi4::ONLY_READ)
10
+ end
11
+ unless video_slaver
12
+ video_slaver = self.copy()
13
+ end
14
+ video_master = self
15
+ $_draw = lambda { video_from_axi4_draw(axi4_master:axi4_master,video_slaver:video_slaver,video_master:video_master,mode:"LINE",base_addr:base_addr) }
16
+ @correlation_proc += $_draw.call
17
+ return axi4_master
18
+ end
19
+
20
+ def video_from_axi4_draw(axi4_master:nil,video_slaver:nil,video_master:self,mode:"LINE",base_addr:nil)
21
+ large_name_len(axi4_master,video_slaver,video_master,mode,base_addr)
22
+ "\nvideo_from_axi4 #(
23
+ .MODE (#{align_signal(mode)}) //LINE ONCE
24
+ )video_from_axi4_#{signal}_inst(
25
+ /* input [31:0] */ .base_addr (#{align_signal(base_addr)}),
26
+ /* video_native_inf.compact_in */ .in_video_inf (#{align_signal(video_slaver)}),
27
+ /* video_native_inf.compact_out */ .out_video_inf (#{align_signal(video_master)}),
28
+ /* axi_inf.master_rd */ .axi_master (#{align_signal(axi4_master)})
29
+ );\n"
30
+ end
31
+
32
+ def self.video_from_axi4(axi4_master:nil,video_slaver:nil,video_master:nil,mode:"LINE",base_addr:nil)
33
+ if video_slaver
34
+ video_name = video_slaver.name
35
+ video_clock = video_slaver.clock
36
+ video_reset = video_slaver.reset
37
+ video_dsize = video_slaver.dsize
38
+ elsif video_master
39
+ video_name = video_master.name
40
+ video_clock = video_master.clock
41
+ video_reset = video_master.reset
42
+ video_dsize = video_master.dsize
43
+ else axi4_master
44
+ video_name = axi4_master.name
45
+ video_clock = axi4_master.clock
46
+ video_reset = axi4_master.reset
47
+ video_dsize = axi4_master.dsize
48
+ end
49
+
50
+ unless axi4_master
51
+ new_axi4_master = Axi4.new(name:video_name+"_to_v",clock:video_clock,reset:video_reset,dsize:video_dsize,max_len:2**32,mode:Axi4::ONLY_READ)
52
+ else
53
+ new_axi4_master = axi4_master
54
+ end
55
+
56
+ unless video_slaver
57
+ new_video_slaver = VideoInf.new(name:video_name+"_slaver",clock:video_clock,reset:video_reset,dsize:video_dsize)
58
+ else
59
+ new_video_slaver = video_slaver
60
+ end
61
+
62
+ unless video_master
63
+ new_video_master = VideoInf.new(name:video_name+"_master",clock:video_clock,reset:video_reset,dsize:video_dsize)
64
+ else
65
+ new_video_master = video_master
66
+ end
67
+
68
+ new_video_master.from_axi4(axi4_master:new_axi4_master,video_slaver:new_video_slaver,mode:mode,base_addr:base_addr)
69
+
70
+ unless axi4_master
71
+ return new_axi4_master
72
+ end
73
+
74
+ unless video_slaver
75
+ return new_video_master
76
+ end
77
+
78
+ unless video_master
79
+ return new_video_master
80
+ end
81
+ end
82
+ end
83
+
84
+ class Axi4
85
+
86
+ def to_video(video_slaver:nil,video_master:nil,mode:"LINE",base_addr:nil)
87
+ VideoInf.video_from_axi4(axi4_master:self,video_slaver:video_slaver,video_master:video_master,mode:mode,base_addr:base_addr)
88
+ end
89
+
90
+ def self.video_from_axi4(axi4_master:nil,video_slaver:nil,video_master:nil,mode:"LINE",base_addr:nil)
91
+ VideoInf.video_from_axi4(axi4_master:axi4_master,video_slaver:video_slaver,video_master:video_master,mode:mode,base_addr:base_addr)
92
+ end
93
+ end
94
+
95
+ class TdlTest
96
+
97
+ def self.test_video_from_axi4
98
+ c0 = Clock.new(name:"时钟",freqM:148.5)
99
+ r0 = Reset.new(name:"复位",active:"low")
100
+ p0 = Parameter.new(name:"P0",value:24)
101
+ axi4_master = Axi4.new(name:"out",clock:c0,reset:r0,dsize:p0)
102
+ data_slaver = VideoInf.new(name:"in",clock:c0,reset:r0,dsize:p0)
103
+ Axi4.video_from_axi4(axi4_master:axi4_master,video_slaver:data_slaver,base_addr:"12'd0")
104
+ puts_sv Tdl.inst,Tdl.draw
105
+ Tdl.clear
106
+ end
107
+
108
+ end
data/lib/tdl/VideoInf/video_lib.rb ADDED
@@ -0,0 +1,8 @@
1
+ require_relative "./../global_scan"
2
+ curr = File.expand_path(__FILE__)
3
+ curr_path = File.dirname(curr)
4
+ file_list = path_scan(curr_path,/\.rb$/) - [curr]
5
+
6
+ file_list.each do |e|
7
+ require_relative (''+e.sub(/\.rb/,'')+'')
8
+ end
data/lib/tdl/VideoInf/video_stream_2_axi_stream.rb ADDED
@@ -0,0 +1,67 @@
1
+ # require_relative "./video_lib"
2
+ # require_relative ".././videoinf"
3
+ # require_relative ".././tdl"
4
+
5
+ class VideoInf
6
+
7
+ def to_axi_stream(axis_master:nil,mode:"LINE")
8
+ videos = self
9
+ $_draw = lambda { video_stream_2_axi_stream_draw(videos:videos,axis:axi_master,mode:mode) }
10
+ @correlation_proc += $_draw.call
11
+ return axi_master
12
+ end
13
+
14
+ def video_stream_2_axi_stream_draw(videos:self,axis:nil,mode:nil)
15
+ large_name_len(videos,axis,mode)
16
+ "\nvideo_stream_2_axi_stream #(
17
+ .MODE (#{align_signal(mode)}) //LINE FRAME
18
+ )video_stream_2_axi_stream_#{signal}_inst(
19
+ /* video_native_inf.compact_in */ .video_inf (#{align_signal(videos)}),
20
+ /* axi_stream_inf.master */ .axis_out (#{align_signal(axis)})
21
+ );\n"
22
+ end
23
+
24
+ def self.video_stream_2_axi_stream(video_slaver:nil,axis_master:nil,mode:"LINE")
25
+ if video_slaver
26
+ if axis_master
27
+ video_slaver.to_axi_stream(axis_master:axis_master,mode:mode)
28
+ else
29
+ new_obj = AxiStream.new(name:video_slaver.name+"_f_v",clock:video_slaver.clock,reset:video_slaver.reset,dsize:video_slaver.dsize)
30
+ video_slaver.to_axi_stream(axis_master:new_obj,mode:mode)
31
+ return new_obj
32
+ end
33
+ elsif axis_master
34
+ if video_slaver
35
+ video_slaver.to_axi_stream(axis_master:axis_master,mode:mode)
36
+ else
37
+ new_obj = VideoInf.new(name:axis_master.name+"_to_as",clock:axis_master.clock,reset:axis_master.reset,dsize:axis_master.dsize)
38
+ new_obj.to_axi_stream(axis_master:axis_master,mode:mode)
39
+ end
40
+ end
41
+ end
42
+ end
43
+
44
+ class AxiStream
45
+
46
+ def from_video_stream(video_slaver:nil,mode:"LINE")
47
+ video_inf.to_axi_stream(axi_master:self,mode:mode)
48
+ return video_slaver
49
+ end
50
+
51
+ def self.video_stream_2_axi_stream(video_slaver:nil,axis_master:nil,mode:"LINE")
52
+ VideoInf.video_stream_2_axi_stream(video_slaver:video_slaver,axis_master:axis_master,mode:"LINE")
53
+ end
54
+ end
55
+
56
+ class TdlTest
57
+
58
+ def self.video_stream_2_axi_stream
59
+ c0 = Clock.new(name:"时钟",freqM:148.5)
60
+ r0 = Reset.new(name:"复位",active:"low")
61
+ axis_master = AxiStream.new(name:"out",clock:c0,reset:r0)
62
+ data_in = VideoInf.new(name:"in",clock:c0,reset:r0)
63
+ AxiStream.video_stream_2_axi_stream(axis_master:axis_master,video_slaver:data_in)
64
+ puts_sv Tdl.inst,Tdl.draw
65
+ end
66
+
67
+ end
data/lib/tdl/VideoInf/video_to_axi4.rb ADDED
@@ -0,0 +1,75 @@
1
+ # require_relative "./video_lib"
2
+ # require_relative ".././videoinf"
3
+ # require_relative ".././tdl"
4
+
5
+ class VideoInf
6
+
7
+ def to_axi4(axi4_master:nil,mode:"LINE",base_addr:nil)
8
+ unless axi4_master
9
+ axi4_master = Axi4.new(name:@name+"_f_v",clock:@clock,reset:@reset,dsize:@dsize,max_len:2**32,mode:Axi4::ONLY_WRITE)
10
+ end
11
+ video_slaver = self
12
+ # $_draw = lambda { video_to_axi4_draw(video_slaver:video_slaver,axi4_master:axi4_master,mode:mode,base_addr:base_addr) }
13
+ # @correlation_proc += $_draw.call
14
+ belong_to_module.VideoInf_draw << video_to_axi4_draw(video_slaver:video_slaver,axi4_master:axi4_master,mode:mode,base_addr:base_addr)
15
+
16
+ return axi4_master
17
+ end
18
+
19
+ def video_to_axi4_draw(video_slaver:self,axi4_master:nil,mode:nil,base_addr:nil)
20
+ large_name_len(video_slaver,axi4_master,mode,base_addr)
21
+ "\nvideo_to_axi4 #(
22
+ .MODE (#{align_signal(mode)}) //LINE ONCE
23
+ )video_to_axi4_#{signal}_inst(
24
+ /* input [31:0] */ .base_addr (#{align_signal(base_addr)}),
25
+ /* video_native_inf.compact_in*/ .video_inf (#{align_signal(video_slaver)}),
26
+ /* axi_inf.master_wr */ .axi_master (#{align_signal(axi4_master)})
27
+ );\n"
28
+ end
29
+
30
+ def self.video_to_axi4(axi4_master:nil,video_slaver:nil,mode:"LINE",base_addr:nil)
31
+ if video_slaver
32
+ if axi4_master
33
+ video_slaver.to_axi4(axi4_master:axi4_master,mode:mode,base_addr:base_addr)
34
+ else
35
+ new_obj = video_slaver.belong_to_module.Def.axi4(name:video_slaver.name+"_f_v",clock:video_slaver.clock,reset:video_slaver.reset,dsize:video_slaver.dsize,max_len:2**32,mode:Axi4::ONLY_WRITE)
36
+ video_slaver.to_axi4(axi4_master:new_obj,mode:mode)
37
+ return new_obj
38
+ end
39
+ elsif axi4_master
40
+ if video_slaver
41
+ video_slaver.to_axi4(axi4_master:axi4_master,mode:mode,base_addr:base_addr)
42
+ else
43
+ new_obj = axi4_master.belong_to_module.Def.videoinf(name:axi4_master.name+"_to_as",clock:axi4_master.clock,reset:axi4_master.reset,dsize:axi4_master.dsize)
44
+ new_obj.to_axi4(axi4_master:axi4_master,mode:mode,base_addr:base_addr)
45
+ end
46
+ end
47
+ end
48
+
49
+ end
50
+
51
+ class Axi4
52
+
53
+ def from_video(video_slaver:nil,mode:"LINE",base_addr:nil)
54
+ video_slaver.to_axi4(axi4_master:self,mode:mode,base_addr:base_addr)
55
+ end
56
+
57
+ def self.video_to_axi4(axi4_master:nil,video_slaver:nil,mode:"LINE",base_addr:nil)
58
+ VideoInf.video_to_axi4(axi4_master:axi4_master,video_slaver:video_slaver,mode:mode,base_addr:base_addr)
59
+ end
60
+
61
+ end
62
+
63
+ # class TdlTest
64
+ #
65
+ # def self.test_video_to_axi4
66
+ # c0 = Clock.new(name:"时钟",freqM:148.5)
67
+ # r0 = Reset.new(name:"复位",active:"low")
68
+ # axi4_master = Axi4.new(name:"out",clock:c0,reset:r0)
69
+ # data_in = VideoInf.new(name:"in",clock:c0,reset:r0)
70
+ # # VideoInf.video_to_axi4(axi4_master:axi4_master,video_slaver:data_in,base_addr:"12'd0")
71
+ # data_in.to_axi4(axi4_master:axi4_master,base_addr:"12'd0")
72
+ # puts_sv Tdl.inst,Tdl.draw
73
+ # Tdl.clear
74
+ # end
75
+ # end
data/lib/tdl/auto_script/auto_gen_tdl.rb ADDED
@@ -0,0 +1,49 @@
1
+ require_relative "./../Tdl"
2
+
3
+ # axi stream
4
+ out_path = '..\..\tdl\axi_stream'
5
+ file_list = path_scan('..\..\axi\AXI_stream',/.sv/i)
6
+
7
+ file_list.each do |e|
8
+ a = AutoGenTdl.new(e,out_path)
9
+ a.auto_rb if a
10
+ end
11
+ #
12
+ # axi4
13
+ out_path = '..\..\tdl\axi4'
14
+ file_list = path_scan('..\..\axi\AXI4',/.sv/i)
15
+
16
+ file_list.each do |e|
17
+ a = AutoGenTdl.new(e,out_path)
18
+ a.auto_rb if a
19
+ end
20
+ #
21
+ # # data inf
22
+ out_path = '..\..\tdl\data_inf'
23
+ AutoGenTdl.new('..\..\axi\common_fifo\common_fifo.sv',out_path).auto_rb
24
+ AutoGenTdl.new('..\..\axi\common_fifo\independent_clock_fifo.sv',out_path).auto_rb
25
+ file_list = path_scan('..\..\axi\data_interface',/.sv/i)
26
+
27
+ file_list.each do |e|
28
+ a = AutoGenTdl.new(e,out_path)
29
+ a.auto_rb if a
30
+ end
31
+ # #
32
+ # out_path = '..\..\tdl\axi_stream'
33
+ # AutoGenTdl.new('..\..\axi\AXI_stream\axis_length_fill.sv',out_path).auto_rb
34
+ # AutoGenTdl.new('..\..\axi\AXI_stream\parse_big_field_table_A2.sv',out_path).auto_rb
35
+ #
36
+ # AutoGenTdl.new('..\..\axi\AXI4\axi4_combin_wr_rd_batch.sv','..\..\tdl\axi4').auto_rb
37
+ # AutoGenTdl.new('..\..\axi\AXI4\axi4_direct_A1.sv','..\..\tdl\axi4').auto_rb
38
+ #
39
+ AutoGenTdl.new('..\..\axi\AXI_Lite\axi_lite_master_empty.sv','..\..\tdl\axi_lite').auto_rb
40
+ AutoGenTdl.new('..\..\axi\AXI_Lite\axi_lite_slaver_empty.sv','..\..\tdl\axi_lite').auto_rb
41
+ #
42
+ # AutoGenTdl.new('..\..\axi\AXI_stream\stream_cache\axi_stream_cache_B1.sv','..\..\tdl\axi_stream').auto_rb
43
+ AutoGenTdl.new('..\..\axi\AXI_stream\axis_connect_pipe.sv','..\..\tdl\axi_stream').auto_rb
44
+ #
45
+ AutoGenTdl.new('..\..\axi\AXI_Lite\common_configure_reg_interface\jtag_to_axilite_wrapper.sv','..\..\tdl\axi_lite').auto_rb
46
+ # AutoGenTdl.new('..\..\axi\AXI4\axi4_direct_verb.sv','..\..\tdl\axi4').auto_rb
47
+ # AutoGenTdl.new('..\..\axi\AXI4\axi4_long_to_axi4_wide_verb.sv','..\..\tdl\axi4').auto_rb
48
+ # AutoGenTdl.new('..\..\axi\data_interface\data_inf_c\data_c_direct_mirror.sv','..\..\tdl\data_inf').auto_rb
49
+
data/lib/tdl/auto_script/autogensdl.rb ADDED
@@ -0,0 +1,289 @@
1
+ # require_relative "./../global_scan"
2
+
3
+ class AutoGenSdl
4
+ attr_accessor :bad
5
+ def initialize(filename="",out_file_path=@@auto_path,info=true)
6
+ @expand_path = File.expand_path(filename)
7
+ sf = File.open(filename,"r")
8
+ fstr = sf.read.force_encoding("utf-8")
9
+ sf.close
10
+ @bad = true
11
+
12
+ # return if exist_origin_sdl(filename,@expand_path)
13
+ # fstr.gsub!(/\/\/\s*\(\*\s*show\s*=\s*"false"\s*\*\)/,"(* show = \"false\" *)")
14
+ # SDL ignore `show`
15
+ fstr.gsub!(/\/\/\s*\(\*\s*show\s*=\s*"false"\s*\*\)/,"")
16
+ fstr.gsub!(/\/\*.*?\*\//m,"")
17
+ fstr.gsub!(/\/\/.*/,"")
18
+ #
19
+ # if fstr =~ AxiStream::Synth_REP # axi_stream class
20
+ # @targer_class = "AxiStream"
21
+ # elsif fstr =~ Axi4::Synth_REP # axi4 class
22
+ # @targer_class = "Axi4"
23
+ # elsif fstr =~ VideoInf::Synth_REP # videoinf class
24
+ # @targer_class = "VideoInf"
25
+ # elsif fstr =~ DataInf::Synth_REP # datainf class
26
+ # @targer_class = "DataInf"
27
+ # elsif fstr =~ DataInf_C::Synth_REP# datainf_c class
28
+ # @targer_class = "DataInf_C"
29
+ # elsif fstr =~ AxiLite::Synth_REP# datainf_c class
30
+ # @targer_class = "AxiLite"
31
+ # elsif fstr =~ Logic::Synth_REP # only logic
32
+ # @targer_class = "Logic"
33
+ # else
34
+ # puts ">>>#{filename} <<< File's head must mark (* ??? = \"true\" *)\n" if info
35
+ # return nil
36
+ # end
37
+
38
+ @autof_name = File.join(File.expand_path(out_file_path),File::basename(filename,".*")+"_sdl.rb")
39
+ # @autof = File.open(@autof_name,"w")
40
+
41
+ regexp_module = /module\s+(?<name>\w+)\s*(#\((?<parameter>.*?)\))?\s*\((?<port>.*?)\)\s*;/m
42
+
43
+ mth = regexp_module.match(fstr)
44
+
45
+ return nil unless mth
46
+ if mth["parameter"].nil? && mth["port"].nil?
47
+ return
48
+ end
49
+
50
+ @module_name = mth["name"]
51
+ @origin_module_name = mth["name"]
52
+ @parameter_str = mth["parameter"]
53
+ @port_str = mth["port"]
54
+ if @port_str
55
+ @port_str = @port_str.split(",")
56
+ else
57
+ @port_str = []
58
+ end
59
+
60
+ @up_stream = nil
61
+ @down_stream = nil
62
+
63
+ @inf_array = []
64
+ @collect_array = []
65
+ @format_args_twins = []
66
+ @actial_args_twins = []
67
+ @alone_args = []
68
+ @ex_params = []
69
+ @ex_ports = []
70
+ @test_obj = []
71
+ @tdl_param_design_hash = []
72
+ @tdl_inst_design_hash = []
73
+
74
+ @inf_port_left_len = 0
75
+ @inf_port_right_len = 0
76
+ @para_port_len = 0
77
+
78
+ @param_port_inst = []
79
+ @signals_ports_inst = []
80
+ @inf_ports_inst = []
81
+
82
+ Parameter.parse_params(@parameter_str) do |h|
83
+ # @format_args_twins << "#{h[:name]}:#{h[:value]}"
84
+ # @actial_args_twins << "#{h[:name]}:#{h[:name]}"
85
+ # @alone_args << h[:name]
86
+ # @ex_params << h[:inst_ex_port]
87
+ # @para_port_len = h[:port_len] if h[:port_len] > @para_port_len
88
+ # @test_obj << "#{h[:name]} = Parameter.new(name:\"#{h[:name]}\",value:#{h[:value]})"
89
+ # @tdl_param_design_hash << h
90
+ if h
91
+ @param_port_inst << "parameter.#{h[:origin_name]} #{h[:value]}"
92
+ end
93
+ end
94
+
95
+ @port_str = SignalElm.parse_ports(@port_str) do |h|
96
+ # @format_args_twins << "#{h[:name]}:\"#{h[:name]}\""
97
+ # @actial_args_twins << "#{h[:name]}:#{h[:name]}"
98
+ # @alone_args << h[:name]
99
+ #
100
+ # @ex_ports << h[:inst_ex_port]
101
+ # @inf_port_left_len = h[:port_left_len] if h[:port_left_len] > @inf_port_left_len
102
+ # @inf_port_right_len = h[:port_right_len] if h[:port_right_len] > @inf_port_right_len
103
+ # @test_obj << "#{h[:name]} = Logic.new(name:\"#{h[:name]}\")"
104
+ # @tdl_inst_design_hash << h
105
+
106
+ head = h[:in_out]
107
+ # head[0] = head[0].upcase
108
+
109
+ if h[:vector]
110
+ v_str = ",dsize:#{vector_to_size(h[:vector])}"
111
+ else
112
+ v_str = ""
113
+ end
114
+
115
+ if h[:array]
116
+ a_str = ",dimension:[#{vector_to_size(h[:array])}]"
117
+ else
118
+ a_str = ""
119
+ end
120
+
121
+ # @signals_ports_inst << "sm.#{head}(\"#{h[:origin_name]}\"#{v_str}#{a_str})"
122
+ if h[:vector]
123
+ if h[:array]
124
+ @signals_ports_inst << "#{head}[#{vector_to_size(h[:array])}][#{vector_to_size(h[:vector])}] - '#{h[:origin_name]}' "
125
+ else
126
+ @signals_ports_inst << "#{head}[#{vector_to_size(h[:vector])}] - '#{h[:origin_name]}' "
127
+ end
128
+ else
129
+ @signals_ports_inst << "#{head} - '#{h[:origin_name]}' "
130
+ end
131
+ end
132
+
133
+ inf_proc = Proc.new { |h|
134
+ # @format_args_twins << "#{h[:name]}:\"#{h[:name]}\""
135
+ # @actial_args_twins << "#{h[:name]}:#{h[:name]}"
136
+ # @inf_array << h[:name] if h[:vector]
137
+ # @collect_array << {name:h[:name],type:h[:type],way:h[:way]}
138
+ # @alone_args << h[:name]
139
+ # if h[:up_down] == "up_stream"
140
+ # @up_stream = h[:name]
141
+ # elsif h[:up_down] == "down_stream"
142
+ # @down_stream = h[:name]
143
+ # end
144
+ # @ex_ports << h[:inst_ex_port]
145
+ # @inf_port_left_len = h[:port_left_len] if h[:port_left_len] > @inf_port_left_len
146
+ # @inf_port_right_len = h[:port_right_len] if h[:port_right_len] > @inf_port_right_len
147
+ #
148
+ # @test_obj << "#{h[:name]} = #{h[:type].to_s}.new(name:\"#{h[:origin_name]}\",clock:c0,reset:r0)"
149
+ # @tdl_inst_design_hash << h
150
+ # if h[:vector]
151
+ # a_str = ",dimension:[#{vector_to_size(h[:vector])}]"
152
+ # else
153
+ # a_str = ""
154
+ # end
155
+
156
+ if h[:vector]
157
+ @inf_ports_inst << "port.#{h[:type]}.#{h[:modport]}[#{vector_to_size(h[:vector])}] - '#{h[:origin_name]}' "
158
+ else
159
+ @inf_ports_inst << "port.#{h[:type]}.#{h[:modport]} - '#{h[:origin_name]}' "
160
+ end
161
+ }
162
+
163
+ TdlSpace::TdlBaseInterface.subclass.each do |sc|
164
+ # super(port_array,rep,"axi_stream_inf",up_stream_rep)
165
+ if sc.const_defined?(:PORT_REP) && sc.const_defined?(:UP_STREAM_REP)
166
+ # puts sc.get_class_var('hdl_name'),sc::UP_STREAM_REP,sc
167
+
168
+ @port_str = TdlSpace::TdlBaseInterface.parse_ports(@port_str,sc::PORT_REP,sc.get_class_var('hdl_name'),sc::UP_STREAM_REP,sc.get_class_var('hdl_name'),&inf_proc)
169
+ end
170
+ end
171
+
172
+ # @port_str = DataInf.parse_ports(@port_str,&inf_proc)
173
+ # @port_str = DataInf_C.parse_ports(@port_str,&inf_proc)
174
+ # # @port_str = VideoInf.parse_ports(@port_str,&inf_proc)
175
+ # # @port_str = AxiLite.parse_ports(@port_str,&inf_proc)
176
+ # @port_str = AxiStream.parse_ports(@port_str,&inf_proc)
177
+ # @port_str = Axi4.parse_ports(@port_str,&inf_proc)
178
+
179
+ # @@inf_parse_methods ||= []
180
+ # @@inf_parse_methods.each do |m|
181
+ # @port_str = m.call(@port_str,&inf_proc)
182
+ # end
183
+
184
+ @bad = false
185
+
186
+ end
187
+
188
+ def self.add_inf_parse(parse_method)
189
+ @@inf_parse_methods ||= []
190
+ @@inf_parse_methods << parse_method
191
+ end
192
+
193
+ # private
194
+
195
+ def exist_origin_sdl(filename,path)
196
+ basename = File.basename(filename,".sv")
197
+ File.exist?(File.join(path,"#{basename}.rb"))
198
+ end
199
+
200
+ def vector_to_size(v)
201
+ rep = /\[\s*(?<h>.+)\s*:\s*(?<l>.+)\s*\]/
202
+ mv = v.match(rep)
203
+ if mv
204
+ if (mv["h"] =~ /^\d+$/) && (mv["l"] =~ /^\d+$/)
205
+ mv["h"].to_i + 1 - mv["l"].to_i
206
+ else
207
+ if (mv["l"].to_i.eql? 0) && (mv["h"] =~ /^(?<name>\S+)\s*-\s*1\s*$/)
208
+ str = $~["name"]
209
+ else
210
+ str = "(#{mv["h"]}+1-#{mv["l"]})"
211
+ end
212
+
213
+ if mv["h"] =~ /(?<name>\$clog2\(\S+\))/ ## 匹配$clog2
214
+ str = "'" + v[1,v.size-2] + "'"
215
+ else
216
+ str = str.gsub(/\w+/) do |pt|
217
+ if pt =~ /^\d+$/
218
+ pt
219
+ else
220
+ " param.#{pt}"
221
+ end
222
+ end
223
+ end
224
+ end
225
+ else
226
+ if v =~ /:/
227
+ v.gsub(":",",")
228
+ else
229
+ v
230
+ end
231
+ end
232
+ end
233
+
234
+ def gen_file
235
+ @autof = File.open(@autof_name,"w") do |f|
236
+ f.puts gen_head
237
+ f.puts gen_content
238
+ # f.puts "sm.origin_sv = true"
239
+ end
240
+ end
241
+
242
+ def auto_rb
243
+ return if @bad
244
+ gen_file
245
+ end
246
+
247
+ def gen_head
248
+ "
249
+ # add_to_all_file_paths('#{@module_name}','#{@expand_path}')
250
+ # real_sv_path = '#{@expand_path}'
251
+ TdlBuild.#{@module_name} do
252
+ self.real_sv_path = '#{@expand_path}'
253
+ self.path = File.expand_path(__FILE__)
254
+ "
255
+ end
256
+
257
+ def gen_content
258
+ (@param_port_inst+@signals_ports_inst+@inf_ports_inst + ["end"]).join("\n")
259
+ end
260
+
261
+
262
+ end
263
+
264
+ class AutoGenSdl # add auto_path
265
+ @@auto_path="./"
266
+
267
+ def self.auto_path
268
+ @@auto_path
269
+ end
270
+
271
+ def self.auto_path=(path)
272
+ @@auto_path=path
273
+ end
274
+
275
+ end
276
+
277
+ # puts a.parse_params
278
+ # puts a.parse_normal_ports
279
+ # puts a.axi4_ports
280
+ # puts a.inf_ports
281
+
282
+ # puts a.draw_normal_ports.join(",\n")
283
+ # puts a.draw_axis_port.join(",\n")
284
+ # puts a.draw_videoinf.join(",\n")
285
+ # puts a.draw_axi4_port.join(",\n")
286
+ # puts a.draw_datainf_port.join(",\n")
287
+ # puts a.data_ports
288
+ # puts a.draw_datainf_c_port.join(",\n")
289
+ # a.auto_rb if a