wasmtime 20.0.2 → 21.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +129 -124
- data/ext/Cargo.toml +8 -6
- data/ext/cargo-vendor/cobs-0.2.3/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cobs-0.2.3/Cargo.toml +39 -0
- data/ext/cargo-vendor/cobs-0.2.3/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/cobs-0.2.3/LICENSE-MIT +19 -0
- data/ext/cargo-vendor/cobs-0.2.3/README.md +23 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/dec.rs +360 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/enc.rs +216 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/lib.rs +14 -0
- data/ext/cargo-vendor/cobs-0.2.3/tests/test.rs +265 -0
- data/ext/cargo-vendor/cranelift-bforest-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.108.1/Cargo.toml +40 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/Cargo.toml +189 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/build.rs +266 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/alias_analysis.rs +403 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/context.rs +395 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ctxhash.rs +167 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/egraph/elaborate.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/egraph.rs +839 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/incremental_cache.rs +256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ir/instructions.rs +1020 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/abi.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/args.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/emit.rs +3846 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/emit_tests.rs +7902 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/imms.rs +1213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/mod.rs +3094 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/regs.rs +288 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst.isle +4225 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/lower/isle.rs +810 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/pcc.rs +568 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/mod.rs +449 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/abi.rs +1051 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/args.rs +1938 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/emit.rs +2681 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/emit_tests.rs +2197 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/mod.rs +1975 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/regs.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/vector.rs +1144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst.isle +2969 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/lower/isle.rs +625 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/abi.rs +1037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/args.rs +314 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/emit.rs +3646 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/imms.rs +202 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/mod.rs +3421 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/regs.rs +180 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/abi.rs +1410 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/args.rs +2256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/emit.rs +4311 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/emit_tests.rs +5171 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/mod.rs +2838 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/regs.rs +276 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst.isle +5294 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/lower.rs +337 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/pcc.rs +1014 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/abi.rs +2506 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/blockorder.rs +465 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/isle.rs +903 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/lower.rs +1432 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/mod.rs +555 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/reg.rs +522 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/valueregs.rs +138 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/vcode.rs +1741 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/nan_canonicalization.rs +130 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/opts/arithmetic.isle +240 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/opts/icmp.isle +215 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ranges.rs +131 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/remove_constant_phis.rs +419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/scoped_hash_map.rs +310 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/settings.rs +590 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_inst.rs +1278 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_isle.rs +519 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_settings.rs +508 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_types.rs +75 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isa/riscv64.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isa/x86.rs +414 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isle.rs +126 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/lib.rs +98 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/srcgen.rs +464 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.108.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.108.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/Cargo.toml +52 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/src/lib.rs +381 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/Cargo.toml +67 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/src/switch.rs +696 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/Cargo.toml +46 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/codegen.rs +886 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/disjointsets.rs +169 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/lib.rs +33 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/sema.rs +2492 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/serialize.rs +846 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/stablemapset.rs +79 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/trie_again.rs +684 -0
- data/ext/cargo-vendor/cranelift-native-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.108.1/Cargo.toml +43 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/Cargo.toml +109 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/code_translator.rs +3687 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/environ/dummy.rs +906 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/environ/spec.rs +945 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/sections_translator.rs +389 -0
- data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.22/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.22/Cargo.toml +48 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/CHANGELOG.md +28 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/Cargo.toml +73 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/LICENSE-APACHE +201 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/README.md +33 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/ci.sh +21 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/rust-toolchain.toml +3 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/futures_io.rs +65 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/mod.rs +40 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/std_io.rs +107 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/tokio.rs +108 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/asynch.rs +230 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/blocking.rs +309 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/fmt.rs +228 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/lib.rs +125 -0
- data/ext/cargo-vendor/libm-0.2.8/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/libm-0.2.8/CHANGELOG.md +123 -0
- data/ext/cargo-vendor/libm-0.2.8/CONTRIBUTING.md +95 -0
- data/ext/cargo-vendor/libm-0.2.8/Cargo.toml +45 -0
- data/ext/cargo-vendor/libm-0.2.8/LICENSE-APACHE +201 -0
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- data/ext/cargo-vendor/libm-0.2.8/README.md +51 -0
- data/ext/cargo-vendor/libm-0.2.8/build.rs +463 -0
- data/ext/cargo-vendor/libm-0.2.8/src/lib.rs +59 -0
- data/ext/cargo-vendor/libm-0.2.8/src/libm_helper.rs +171 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acos.rs +112 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acosf.rs +79 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acosh.rs +27 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acoshf.rs +26 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asin.rs +119 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinf.rs +72 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinh.rs +40 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinhf.rs +39 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan.rs +184 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan2.rs +126 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan2f.rs +91 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atanf.rs +112 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/atanhf.rs +37 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cbrt.rs +113 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cbrtf.rs +75 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/ceil.rs +82 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/ceilf.rs +65 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/copysign.rs +12 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/copysignf.rs +12 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cos.rs +73 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cosf.rs +83 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cosh.rs +38 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/coshf.rs +38 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/erf.rs +318 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/erff.rs +230 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/exp.rs +154 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/exp2.rs +394 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/expo2.rs +14 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/fabs.rs +41 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/fdim.rs +22 -0
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- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-diamond.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-diamond.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-iface-no-collide.wit +0 -0
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//! Implementation of a vanilla ABI, shared between several machines. The
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//! implementation here assumes that arguments will be passed in registers
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//! first, then additional args on the stack; that the stack grows downward,
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//! contains a standard frame (return address and frame pointer), and the
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//! compiler is otherwise free to allocate space below that with its choice of
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//! layout; and that the machine has some notion of caller- and callee-save
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//! registers. Most modern machines, e.g. x86-64 and AArch64, should fit this
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//! mold and thus both of these backends use this shared implementation.
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//!
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//! See the documentation in specific machine backends for the "instantiation"
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//! of this generic ABI, i.e., which registers are caller/callee-save, arguments
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//! and return values, and any other special requirements.
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//!
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//! For now the implementation here assumes a 64-bit machine, but we intend to
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//! make this 32/64-bit-generic shortly.
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//!
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//! # Vanilla ABI
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//!
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//! First, arguments and return values are passed in registers up to a certain
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//! fixed count, after which they overflow onto the stack. Multiple return
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//! values either fit in registers, or are returned in a separate return-value
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//! area on the stack, given by a hidden extra parameter.
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//!
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//! Note that the exact stack layout is up to us. We settled on the
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//! below design based on several requirements. In particular, we need
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//! to be able to generate instructions (or instruction sequences) to
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//! access arguments, stack slots, and spill slots before we know how
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//! many spill slots or clobber-saves there will be, because of our
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//! pass structure. We also prefer positive offsets to negative
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//! offsets because of an asymmetry in some machines' addressing modes
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//! (e.g., on AArch64, positive offsets have a larger possible range
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//! without a long-form sequence to synthesize an arbitrary
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//! offset). We also need clobber-save registers to be "near" the
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//! frame pointer: Windows unwind information requires it to be within
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//! 240 bytes of RBP. Finally, it is not allowed to access memory
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//! below the current SP value.
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//!
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//! We assume that a prologue first pushes the frame pointer (and
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//! return address above that, if the machine does not do that in
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//! hardware). We set FP to point to this two-word frame record. We
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//! store all other frame slots below this two-word frame record, with
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//! the stack pointer remaining at or below this fixed frame storage
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//! for the rest of the function. We can then access frame storage
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//! slots using positive offsets from SP. In order to allow codegen
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//! for the latter before knowing how SP might be adjusted around
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//! callsites, we implement a "nominal SP" tracking feature by which a
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//! fixup (distance between actual SP and a "nominal" SP) is known at
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//! each instruction.
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//!
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//! Note that if we ever support dynamic stack-space allocation (for
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//! `alloca`), we will need a way to reference spill slots and stack
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//! slots without "nominal SP", because we will no longer be able to
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//! know a static offset from SP to the slots at any particular
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//! program point. Probably the best solution at that point will be to
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//! revert to using the frame pointer as the reference for all slots,
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//! and creating a "nominal FP" synthetic addressing mode (analogous
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//! to "nominal SP" today) to allow generating spill/reload and
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//! stackslot accesses before we know how large the clobber-saves will
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//! be.
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//!
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//! # Stack Layout
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//!
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//! The stack looks like:
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//!
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//! ```plain
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//! (high address)
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//!
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//! +---------------------------+
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//! | ... |
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//! | stack args |
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//! | (accessed via FP) |
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//! +---------------------------+
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//! SP at function entry -----> | return address |
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//! +---------------------------+
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//! FP after prologue --------> | FP (pushed by prologue) |
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//! +---------------------------+
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//! | ... |
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//! | clobbered callee-saves |
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//! unwind-frame base ----> | (pushed by prologue) |
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//! +---------------------------+
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//! | ... |
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//! | spill slots |
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//! | (accessed via nominal SP) |
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//! | ... |
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//! | stack slots |
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//! | (accessed via nominal SP) |
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//! nominal SP ---------------> | (alloc'd by prologue) |
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//! (SP at end of prologue) +---------------------------+
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//! | [alignment as needed] |
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//! | ... |
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//! | args for call |
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//! SP before making a call --> | (pushed at callsite) |
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//! +---------------------------+
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//!
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//! (low address)
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//! ```
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//!
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//! # Multi-value Returns
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//!
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//! We support multi-value returns by using multiple return-value
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//! registers. In some cases this is an extension of the base system
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//! ABI. See each platform's `abi.rs` implementation for details.
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use crate::entity::SecondaryMap;
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use crate::fx::FxHashMap;
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use crate::ir::types::*;
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use crate::ir::{ArgumentExtension, ArgumentPurpose, Signature};
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use crate::isa::TargetIsa;
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use crate::settings::ProbestackStrategy;
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use crate::CodegenError;
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use crate::{ir, isa};
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use crate::{machinst::*, trace};
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use regalloc2::{MachineEnv, PReg, PRegSet};
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use smallvec::smallvec;
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use std::collections::HashMap;
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use std::marker::PhantomData;
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use std::mem;
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/// A small vector of instructions (with some reasonable size); appropriate for
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/// a small fixed sequence implementing one operation.
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pub type SmallInstVec<I> = SmallVec<[I; 4]>;
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/// A type used by backends to track argument-binding info in the "args"
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/// pseudoinst. The pseudoinst holds a vec of `ArgPair` structs.
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#[derive(Clone, Debug)]
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pub struct ArgPair {
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/// The vreg that is defined by this args pseudoinst.
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pub vreg: Writable<Reg>,
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/// The preg that the arg arrives in; this constrains the vreg's
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/// placement at the pseudoinst.
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pub preg: Reg,
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}
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/// A type used by backends to track return register binding info in the "ret"
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/// pseudoinst. The pseudoinst holds a vec of `RetPair` structs.
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#[derive(Clone, Debug)]
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pub struct RetPair {
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/// The vreg that is returned by this pseudionst.
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pub vreg: Reg,
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/// The preg that the arg is returned through; this constrains the vreg's
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/// placement at the pseudoinst.
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pub preg: Reg,
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}
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/// A location for (part of) an argument or return value. These "storage slots"
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/// are specified for each register-sized part of an argument.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ABIArgSlot {
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/// In a real register.
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Reg {
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/// Register that holds this arg.
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reg: RealReg,
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/// Value type of this arg.
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ty: ir::Type,
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/// Should this arg be zero- or sign-extended?
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extension: ir::ArgumentExtension,
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},
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/// Arguments only: on stack, at given offset from SP at entry.
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Stack {
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/// Offset of this arg relative to the base of stack args.
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offset: i64,
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/// Value type of this arg.
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ty: ir::Type,
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/// Should this arg be zero- or sign-extended?
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extension: ir::ArgumentExtension,
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},
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}
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impl ABIArgSlot {
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/// The type of the value that will be stored in this slot.
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pub fn get_type(&self) -> ir::Type {
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match self {
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ABIArgSlot::Reg { ty, .. } => *ty,
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ABIArgSlot::Stack { ty, .. } => *ty,
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}
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}
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}
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/// A vector of `ABIArgSlot`s. Inline capacity for one element because basically
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/// 100% of values use one slot. Only `i128`s need multiple slots, and they are
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/// super rare (and never happen with Wasm).
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pub type ABIArgSlotVec = SmallVec<[ABIArgSlot; 1]>;
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/// An ABIArg is composed of one or more parts. This allows for a CLIF-level
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/// Value to be passed with its parts in more than one location at the ABI
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/// level. For example, a 128-bit integer may be passed in two 64-bit registers,
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/// or even a 64-bit register and a 64-bit stack slot, on a 64-bit machine. The
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/// number of "parts" should correspond to the number of registers used to store
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/// this type according to the machine backend.
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///
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/// As an invariant, the `purpose` for every part must match. As a further
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/// invariant, a `StructArg` part cannot appear with any other part.
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#[derive(Clone, Debug)]
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pub enum ABIArg {
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/// Storage slots (registers or stack locations) for each part of the
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/// argument value. The number of slots must equal the number of register
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/// parts used to store a value of this type.
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Slots {
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/// Slots, one per register part.
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slots: ABIArgSlotVec,
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/// Purpose of this arg.
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purpose: ir::ArgumentPurpose,
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},
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/// Structure argument. We reserve stack space for it, but the CLIF-level
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/// semantics are a little weird: the value passed to the call instruction,
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/// and received in the corresponding block param, is a *pointer*. On the
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/// caller side, we memcpy the data from the passed-in pointer to the stack
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/// area; on the callee side, we compute a pointer to this stack area and
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/// provide that as the argument's value.
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StructArg {
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/// Register or stack slot holding a pointer to the buffer as passed
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/// by the caller to the callee. If None, the ABI defines the buffer
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/// to reside at a well-known location (i.e. at `offset` below).
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pointer: Option<ABIArgSlot>,
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/// Offset of this arg relative to base of stack args.
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offset: i64,
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/// Size of this arg on the stack.
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size: u64,
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/// Purpose of this arg.
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purpose: ir::ArgumentPurpose,
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},
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/// Implicit argument. Similar to a StructArg, except that we have the
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/// target type, not a pointer type, at the CLIF-level. This argument is
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/// still being passed via reference implicitly.
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ImplicitPtrArg {
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/// Register or stack slot holding a pointer to the buffer.
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pointer: ABIArgSlot,
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/// Offset of the argument buffer.
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offset: i64,
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/// Type of the implicit argument.
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ty: Type,
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/// Purpose of this arg.
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purpose: ir::ArgumentPurpose,
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},
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}
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impl ABIArg {
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/// Create an ABIArg from one register.
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pub fn reg(
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reg: RealReg,
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ty: ir::Type,
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extension: ir::ArgumentExtension,
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purpose: ir::ArgumentPurpose,
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) -> ABIArg {
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ABIArg::Slots {
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slots: smallvec![ABIArgSlot::Reg { reg, ty, extension }],
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purpose,
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}
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}
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/// Create an ABIArg from one stack slot.
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pub fn stack(
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offset: i64,
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ty: ir::Type,
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extension: ir::ArgumentExtension,
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purpose: ir::ArgumentPurpose,
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) -> ABIArg {
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ABIArg::Slots {
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slots: smallvec![ABIArgSlot::Stack {
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offset,
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ty,
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extension,
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}],
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purpose,
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}
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}
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}
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/// Are we computing information about arguments or return values? Much of the
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/// handling is factored out into common routines; this enum allows us to
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/// distinguish which case we're handling.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ArgsOrRets {
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/// Arguments.
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Args,
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/// Return values.
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Rets,
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}
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/// Abstract location for a machine-specific ABI impl to translate into the
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/// appropriate addressing mode.
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#[derive(Clone, Copy, Debug)]
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pub enum StackAMode {
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/// Offset into the current frame's argument area, possibly making use of a
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/// specific type for a scaled indexing operation.
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ArgOffset(i64, ir::Type),
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/// Offset from the nominal stack pointer, possibly making use of a specific
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/// type for a scaled indexing operation.
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NominalSPOffset(i64, ir::Type),
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/// Offset from the real stack pointer, possibly making use of a specific
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/// type for a scaled indexing operation.
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SPOffset(i64, ir::Type),
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}
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/// Trait implemented by machine-specific backend to represent ISA flags.
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pub trait IsaFlags: Clone {
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/// Get a flag indicating whether forward-edge CFI is enabled.
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fn is_forward_edge_cfi_enabled(&self) -> bool {
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false
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}
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}
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/// Used as an out-parameter to accumulate a sequence of `ABIArg`s in
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/// `ABIMachineSpec::compute_arg_locs`. Wraps the shared allocation for all
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/// `ABIArg`s in `SigSet` and exposes just the args for the current
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/// `compute_arg_locs` call.
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pub struct ArgsAccumulator<'a> {
|
308
|
-
sig_set_abi_args: &'a mut Vec<ABIArg>,
|
309
|
-
start: usize,
|
310
|
-
non_formal_flag: bool,
|
311
|
-
}
|
312
|
-
|
313
|
-
impl<'a> ArgsAccumulator<'a> {
|
314
|
-
fn new(sig_set_abi_args: &'a mut Vec<ABIArg>) -> Self {
|
315
|
-
let start = sig_set_abi_args.len();
|
316
|
-
ArgsAccumulator {
|
317
|
-
sig_set_abi_args,
|
318
|
-
start,
|
319
|
-
non_formal_flag: false,
|
320
|
-
}
|
321
|
-
}
|
322
|
-
|
323
|
-
#[inline]
|
324
|
-
pub fn push(&mut self, arg: ABIArg) {
|
325
|
-
debug_assert!(!self.non_formal_flag);
|
326
|
-
self.sig_set_abi_args.push(arg)
|
327
|
-
}
|
328
|
-
|
329
|
-
#[inline]
|
330
|
-
pub fn push_non_formal(&mut self, arg: ABIArg) {
|
331
|
-
self.non_formal_flag = true;
|
332
|
-
self.sig_set_abi_args.push(arg)
|
333
|
-
}
|
334
|
-
|
335
|
-
#[inline]
|
336
|
-
pub fn args(&self) -> &[ABIArg] {
|
337
|
-
&self.sig_set_abi_args[self.start..]
|
338
|
-
}
|
339
|
-
|
340
|
-
#[inline]
|
341
|
-
pub fn args_mut(&mut self) -> &mut [ABIArg] {
|
342
|
-
&mut self.sig_set_abi_args[self.start..]
|
343
|
-
}
|
344
|
-
}
|
345
|
-
|
346
|
-
/// Trait implemented by machine-specific backend to provide information about
|
347
|
-
/// register assignments and to allow generating the specific instructions for
|
348
|
-
/// stack loads/saves, prologues/epilogues, etc.
|
349
|
-
pub trait ABIMachineSpec {
|
350
|
-
/// The instruction type.
|
351
|
-
type I: VCodeInst;
|
352
|
-
|
353
|
-
/// The ISA flags type.
|
354
|
-
type F: IsaFlags;
|
355
|
-
|
356
|
-
/// Returns the number of bits in a word, that is 32/64 for 32/64-bit architecture.
|
357
|
-
fn word_bits() -> u32;
|
358
|
-
|
359
|
-
/// Returns the number of bytes in a word.
|
360
|
-
fn word_bytes() -> u32 {
|
361
|
-
return Self::word_bits() / 8;
|
362
|
-
}
|
363
|
-
|
364
|
-
/// Returns word-size integer type.
|
365
|
-
fn word_type() -> Type {
|
366
|
-
match Self::word_bits() {
|
367
|
-
32 => I32,
|
368
|
-
64 => I64,
|
369
|
-
_ => unreachable!(),
|
370
|
-
}
|
371
|
-
}
|
372
|
-
|
373
|
-
/// Returns word register class.
|
374
|
-
fn word_reg_class() -> RegClass {
|
375
|
-
RegClass::Int
|
376
|
-
}
|
377
|
-
|
378
|
-
/// Returns required stack alignment in bytes.
|
379
|
-
fn stack_align(call_conv: isa::CallConv) -> u32;
|
380
|
-
|
381
|
-
/// Process a list of parameters or return values and allocate them to registers
|
382
|
-
/// and stack slots.
|
383
|
-
///
|
384
|
-
/// The argument locations should be pushed onto the given `ArgsAccumulator`
|
385
|
-
/// in order. Any extra arguments added (such as return area pointers)
|
386
|
-
/// should come at the end of the list so that the first N lowered
|
387
|
-
/// parameters align with the N clif parameters.
|
388
|
-
///
|
389
|
-
/// Returns the stack-space used (rounded up to as alignment requires), and
|
390
|
-
/// if `add_ret_area_ptr` was passed, the index of the extra synthetic arg
|
391
|
-
/// that was added.
|
392
|
-
fn compute_arg_locs(
|
393
|
-
call_conv: isa::CallConv,
|
394
|
-
flags: &settings::Flags,
|
395
|
-
params: &[ir::AbiParam],
|
396
|
-
args_or_rets: ArgsOrRets,
|
397
|
-
add_ret_area_ptr: bool,
|
398
|
-
args: ArgsAccumulator,
|
399
|
-
) -> CodegenResult<(u32, Option<usize>)>;
|
400
|
-
|
401
|
-
/// Generate a load from the stack.
|
402
|
-
fn gen_load_stack(mem: StackAMode, into_reg: Writable<Reg>, ty: Type) -> Self::I;
|
403
|
-
|
404
|
-
/// Generate a store to the stack.
|
405
|
-
fn gen_store_stack(mem: StackAMode, from_reg: Reg, ty: Type) -> Self::I;
|
406
|
-
|
407
|
-
/// Generate a move.
|
408
|
-
fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self::I;
|
409
|
-
|
410
|
-
/// Generate an integer-extend operation.
|
411
|
-
fn gen_extend(
|
412
|
-
to_reg: Writable<Reg>,
|
413
|
-
from_reg: Reg,
|
414
|
-
is_signed: bool,
|
415
|
-
from_bits: u8,
|
416
|
-
to_bits: u8,
|
417
|
-
) -> Self::I;
|
418
|
-
|
419
|
-
/// Generate an "args" pseudo-instruction to capture input args in
|
420
|
-
/// registers.
|
421
|
-
fn gen_args(args: Vec<ArgPair>) -> Self::I;
|
422
|
-
|
423
|
-
/// Generate a "rets" pseudo-instruction that moves vregs to return
|
424
|
-
/// registers.
|
425
|
-
fn gen_rets(rets: Vec<RetPair>) -> Self::I;
|
426
|
-
|
427
|
-
/// Generate an add-with-immediate. Note that even if this uses a scratch
|
428
|
-
/// register, it must satisfy two requirements:
|
429
|
-
///
|
430
|
-
/// - The add-imm sequence must only clobber caller-save registers that are
|
431
|
-
/// not used for arguments, because it will be placed in the prologue
|
432
|
-
/// before the clobbered callee-save registers are saved.
|
433
|
-
///
|
434
|
-
/// - The add-imm sequence must work correctly when `from_reg` and/or
|
435
|
-
/// `into_reg` are the register returned by `get_stacklimit_reg()`.
|
436
|
-
fn gen_add_imm(
|
437
|
-
call_conv: isa::CallConv,
|
438
|
-
into_reg: Writable<Reg>,
|
439
|
-
from_reg: Reg,
|
440
|
-
imm: u32,
|
441
|
-
) -> SmallInstVec<Self::I>;
|
442
|
-
|
443
|
-
/// Generate a sequence that traps with a `TrapCode::StackOverflow` code if
|
444
|
-
/// the stack pointer is less than the given limit register (assuming the
|
445
|
-
/// stack grows downward).
|
446
|
-
fn gen_stack_lower_bound_trap(limit_reg: Reg) -> SmallInstVec<Self::I>;
|
447
|
-
|
448
|
-
/// Generate an instruction to compute an address of a stack slot (FP- or
|
449
|
-
/// SP-based offset).
|
450
|
-
fn gen_get_stack_addr(mem: StackAMode, into_reg: Writable<Reg>, ty: Type) -> Self::I;
|
451
|
-
|
452
|
-
/// Get a fixed register to use to compute a stack limit. This is needed for
|
453
|
-
/// certain sequences generated after the register allocator has already
|
454
|
-
/// run. This must satisfy two requirements:
|
455
|
-
///
|
456
|
-
/// - It must be a caller-save register that is not used for arguments,
|
457
|
-
/// because it will be clobbered in the prologue before the clobbered
|
458
|
-
/// callee-save registers are saved.
|
459
|
-
///
|
460
|
-
/// - It must be safe to pass as an argument and/or destination to
|
461
|
-
/// `gen_add_imm()`. This is relevant when an addition with a large
|
462
|
-
/// immediate needs its own temporary; it cannot use the same fixed
|
463
|
-
/// temporary as this one.
|
464
|
-
fn get_stacklimit_reg(call_conv: isa::CallConv) -> Reg;
|
465
|
-
|
466
|
-
/// Generate a load to the given [base+offset] address.
|
467
|
-
fn gen_load_base_offset(into_reg: Writable<Reg>, base: Reg, offset: i32, ty: Type) -> Self::I;
|
468
|
-
|
469
|
-
/// Generate a store from the given [base+offset] address.
|
470
|
-
fn gen_store_base_offset(base: Reg, offset: i32, from_reg: Reg, ty: Type) -> Self::I;
|
471
|
-
|
472
|
-
/// Adjust the stack pointer up or down.
|
473
|
-
fn gen_sp_reg_adjust(amount: i32) -> SmallInstVec<Self::I>;
|
474
|
-
|
475
|
-
/// Generate a meta-instruction that adjusts the nominal SP offset.
|
476
|
-
fn gen_nominal_sp_adj(amount: i32) -> Self::I;
|
477
|
-
|
478
|
-
/// Compute a FrameLayout structure containing a sorted list of all clobbered
|
479
|
-
/// registers that are callee-saved according to the ABI, as well as the sizes
|
480
|
-
/// of all parts of the stack frame. The result is used to emit the prologue
|
481
|
-
/// and epilogue routines.
|
482
|
-
fn compute_frame_layout(
|
483
|
-
call_conv: isa::CallConv,
|
484
|
-
flags: &settings::Flags,
|
485
|
-
sig: &Signature,
|
486
|
-
regs: &[Writable<RealReg>],
|
487
|
-
is_leaf: bool,
|
488
|
-
stack_args_size: u32,
|
489
|
-
fixed_frame_storage_size: u32,
|
490
|
-
outgoing_args_size: u32,
|
491
|
-
) -> FrameLayout;
|
492
|
-
|
493
|
-
/// Generate the usual frame-setup sequence for this architecture: e.g.,
|
494
|
-
/// `push rbp / mov rbp, rsp` on x86-64, or `stp fp, lr, [sp, #-16]!` on
|
495
|
-
/// AArch64.
|
496
|
-
fn gen_prologue_frame_setup(
|
497
|
-
call_conv: isa::CallConv,
|
498
|
-
flags: &settings::Flags,
|
499
|
-
isa_flags: &Self::F,
|
500
|
-
frame_layout: &FrameLayout,
|
501
|
-
) -> SmallInstVec<Self::I>;
|
502
|
-
|
503
|
-
/// Generate the usual frame-restore sequence for this architecture.
|
504
|
-
fn gen_epilogue_frame_restore(
|
505
|
-
call_conv: isa::CallConv,
|
506
|
-
flags: &settings::Flags,
|
507
|
-
isa_flags: &Self::F,
|
508
|
-
frame_layout: &FrameLayout,
|
509
|
-
) -> SmallInstVec<Self::I>;
|
510
|
-
|
511
|
-
/// Generate a return instruction.
|
512
|
-
fn gen_return(
|
513
|
-
call_conv: isa::CallConv,
|
514
|
-
isa_flags: &Self::F,
|
515
|
-
frame_layout: &FrameLayout,
|
516
|
-
) -> SmallInstVec<Self::I>;
|
517
|
-
|
518
|
-
/// Generate a probestack call.
|
519
|
-
fn gen_probestack(insts: &mut SmallInstVec<Self::I>, frame_size: u32);
|
520
|
-
|
521
|
-
/// Generate a inline stack probe.
|
522
|
-
fn gen_inline_probestack(
|
523
|
-
insts: &mut SmallInstVec<Self::I>,
|
524
|
-
call_conv: isa::CallConv,
|
525
|
-
frame_size: u32,
|
526
|
-
guard_size: u32,
|
527
|
-
);
|
528
|
-
|
529
|
-
/// Generate a clobber-save sequence. The implementation here should return
|
530
|
-
/// a sequence of instructions that "push" or otherwise save to the stack all
|
531
|
-
/// registers written/modified by the function body that are callee-saved.
|
532
|
-
/// The sequence of instructions should adjust the stack pointer downward,
|
533
|
-
/// and should align as necessary according to ABI requirements.
|
534
|
-
fn gen_clobber_save(
|
535
|
-
call_conv: isa::CallConv,
|
536
|
-
flags: &settings::Flags,
|
537
|
-
frame_layout: &FrameLayout,
|
538
|
-
) -> SmallVec<[Self::I; 16]>;
|
539
|
-
|
540
|
-
/// Generate a clobber-restore sequence. This sequence should perform the
|
541
|
-
/// opposite of the clobber-save sequence generated above, assuming that SP
|
542
|
-
/// going into the sequence is at the same point that it was left when the
|
543
|
-
/// clobber-save sequence finished.
|
544
|
-
fn gen_clobber_restore(
|
545
|
-
call_conv: isa::CallConv,
|
546
|
-
flags: &settings::Flags,
|
547
|
-
frame_layout: &FrameLayout,
|
548
|
-
) -> SmallVec<[Self::I; 16]>;
|
549
|
-
|
550
|
-
/// Generate a call instruction/sequence. This method is provided one
|
551
|
-
/// temporary register to use to synthesize the called address, if needed.
|
552
|
-
fn gen_call(
|
553
|
-
dest: &CallDest,
|
554
|
-
uses: CallArgList,
|
555
|
-
defs: CallRetList,
|
556
|
-
clobbers: PRegSet,
|
557
|
-
opcode: ir::Opcode,
|
558
|
-
tmp: Writable<Reg>,
|
559
|
-
callee_conv: isa::CallConv,
|
560
|
-
caller_conv: isa::CallConv,
|
561
|
-
callee_pop_size: u32,
|
562
|
-
) -> SmallVec<[Self::I; 2]>;
|
563
|
-
|
564
|
-
/// Generate a memcpy invocation. Used to set up struct
|
565
|
-
/// args. Takes `src`, `dst` as read-only inputs and passes a temporary
|
566
|
-
/// allocator.
|
567
|
-
fn gen_memcpy<F: FnMut(Type) -> Writable<Reg>>(
|
568
|
-
call_conv: isa::CallConv,
|
569
|
-
dst: Reg,
|
570
|
-
src: Reg,
|
571
|
-
size: usize,
|
572
|
-
alloc_tmp: F,
|
573
|
-
) -> SmallVec<[Self::I; 8]>;
|
574
|
-
|
575
|
-
/// Get the number of spillslots required for the given register-class.
|
576
|
-
fn get_number_of_spillslots_for_value(
|
577
|
-
rc: RegClass,
|
578
|
-
target_vector_bytes: u32,
|
579
|
-
isa_flags: &Self::F,
|
580
|
-
) -> u32;
|
581
|
-
|
582
|
-
/// Get the current virtual-SP offset from an instruction-emission state.
|
583
|
-
fn get_virtual_sp_offset_from_state(s: &<Self::I as MachInstEmit>::State) -> i64;
|
584
|
-
|
585
|
-
/// Get the "nominal SP to FP" offset from an instruction-emission state.
|
586
|
-
fn get_nominal_sp_to_fp(s: &<Self::I as MachInstEmit>::State) -> i64;
|
587
|
-
|
588
|
-
/// Get the ABI-dependent MachineEnv for managing register allocation.
|
589
|
-
fn get_machine_env(flags: &settings::Flags, call_conv: isa::CallConv) -> &MachineEnv;
|
590
|
-
|
591
|
-
/// Get all caller-save registers, that is, registers that we expect
|
592
|
-
/// not to be saved across a call to a callee with the given ABI.
|
593
|
-
fn get_regs_clobbered_by_call(call_conv_of_callee: isa::CallConv) -> PRegSet;
|
594
|
-
|
595
|
-
/// Get the needed extension mode, given the mode attached to the argument
|
596
|
-
/// in the signature and the calling convention. The input (the attribute in
|
597
|
-
/// the signature) specifies what extension type should be done *if* the ABI
|
598
|
-
/// requires extension to the full register; this method's return value
|
599
|
-
/// indicates whether the extension actually *will* be done.
|
600
|
-
fn get_ext_mode(
|
601
|
-
call_conv: isa::CallConv,
|
602
|
-
specified: ir::ArgumentExtension,
|
603
|
-
) -> ir::ArgumentExtension;
|
604
|
-
}
|
605
|
-
|
606
|
-
/// The id of an ABI signature within the `SigSet`.
|
607
|
-
#[derive(Copy, Clone, PartialEq, Eq, Hash, PartialOrd, Ord)]
|
608
|
-
pub struct Sig(u32);
|
609
|
-
cranelift_entity::entity_impl!(Sig);
|
610
|
-
|
611
|
-
impl Sig {
|
612
|
-
fn prev(self) -> Option<Sig> {
|
613
|
-
self.0.checked_sub(1).map(Sig)
|
614
|
-
}
|
615
|
-
}
|
616
|
-
|
617
|
-
/// ABI information shared between body (callee) and caller.
|
618
|
-
#[derive(Clone, Debug)]
|
619
|
-
pub struct SigData {
|
620
|
-
/// Currently both return values and arguments are stored in a continuous space vector
|
621
|
-
/// in `SigSet::abi_args`.
|
622
|
-
///
|
623
|
-
/// ```plain
|
624
|
-
/// +----------------------------------------------+
|
625
|
-
/// | return values |
|
626
|
-
/// | ... |
|
627
|
-
/// rets_end --> +----------------------------------------------+
|
628
|
-
/// | arguments |
|
629
|
-
/// | ... |
|
630
|
-
/// args_end --> +----------------------------------------------+
|
631
|
-
///
|
632
|
-
/// ```
|
633
|
-
///
|
634
|
-
/// Note we only store two offsets as rets_end == args_start, and rets_start == prev.args_end.
|
635
|
-
///
|
636
|
-
/// Argument location ending offset (regs or stack slots). Stack offsets are relative to
|
637
|
-
/// SP on entry to function.
|
638
|
-
///
|
639
|
-
/// This is a index into the `SigSet::abi_args`.
|
640
|
-
args_end: u32,
|
641
|
-
|
642
|
-
/// Return-value location ending offset. Stack offsets are relative to the return-area
|
643
|
-
/// pointer.
|
644
|
-
///
|
645
|
-
/// This is a index into the `SigSet::abi_args`.
|
646
|
-
rets_end: u32,
|
647
|
-
|
648
|
-
/// Space on stack used to store arguments. We're storing the size in u32 to
|
649
|
-
/// reduce the size of the struct.
|
650
|
-
sized_stack_arg_space: u32,
|
651
|
-
|
652
|
-
/// Space on stack used to store return values. We're storing the size in u32 to
|
653
|
-
/// reduce the size of the struct.
|
654
|
-
sized_stack_ret_space: u32,
|
655
|
-
|
656
|
-
/// Index in `args` of the stack-return-value-area argument.
|
657
|
-
stack_ret_arg: Option<u16>,
|
658
|
-
|
659
|
-
/// Calling convention used.
|
660
|
-
call_conv: isa::CallConv,
|
661
|
-
}
|
662
|
-
|
663
|
-
impl SigData {
|
664
|
-
/// Get total stack space required for arguments.
|
665
|
-
pub fn sized_stack_arg_space(&self) -> i64 {
|
666
|
-
self.sized_stack_arg_space.into()
|
667
|
-
}
|
668
|
-
|
669
|
-
/// Get total stack space required for return values.
|
670
|
-
pub fn sized_stack_ret_space(&self) -> i64 {
|
671
|
-
self.sized_stack_ret_space.into()
|
672
|
-
}
|
673
|
-
|
674
|
-
/// Get calling convention used.
|
675
|
-
pub fn call_conv(&self) -> isa::CallConv {
|
676
|
-
self.call_conv
|
677
|
-
}
|
678
|
-
|
679
|
-
/// The index of the stack-return-value-area argument, if any.
|
680
|
-
pub fn stack_ret_arg(&self) -> Option<u16> {
|
681
|
-
self.stack_ret_arg
|
682
|
-
}
|
683
|
-
}
|
684
|
-
|
685
|
-
/// A (mostly) deduplicated set of ABI signatures.
|
686
|
-
///
|
687
|
-
/// We say "mostly" because we do not dedupe between signatures interned via
|
688
|
-
/// `ir::SigRef` (direct and indirect calls; the vast majority of signatures in
|
689
|
-
/// this set) vs via `ir::Signature` (the callee itself and libcalls). Doing
|
690
|
-
/// this final bit of deduplication would require filling out the
|
691
|
-
/// `ir_signature_to_abi_sig`, which is a bunch of allocations (not just the
|
692
|
-
/// hash map itself but params and returns vecs in each signature) that we want
|
693
|
-
/// to avoid.
|
694
|
-
///
|
695
|
-
/// In general, prefer using the `ir::SigRef`-taking methods to the
|
696
|
-
/// `ir::Signature`-taking methods when you can get away with it, as they don't
|
697
|
-
/// require cloning non-copy types that will trigger heap allocations.
|
698
|
-
///
|
699
|
-
/// This type can be indexed by `Sig` to access its associated `SigData`.
|
700
|
-
pub struct SigSet {
|
701
|
-
/// Interned `ir::Signature`s that we already have an ABI signature for.
|
702
|
-
ir_signature_to_abi_sig: FxHashMap<ir::Signature, Sig>,
|
703
|
-
|
704
|
-
/// Interned `ir::SigRef`s that we already have an ABI signature for.
|
705
|
-
ir_sig_ref_to_abi_sig: SecondaryMap<ir::SigRef, Option<Sig>>,
|
706
|
-
|
707
|
-
/// A single, shared allocation for all `ABIArg`s used by all
|
708
|
-
/// `SigData`s. Each `SigData` references its args/rets via indices into
|
709
|
-
/// this allocation.
|
710
|
-
abi_args: Vec<ABIArg>,
|
711
|
-
|
712
|
-
/// The actual ABI signatures, keyed by `Sig`.
|
713
|
-
sigs: PrimaryMap<Sig, SigData>,
|
714
|
-
}
|
715
|
-
|
716
|
-
impl SigSet {
|
717
|
-
/// Construct a new `SigSet`, interning all of the signatures used by the
|
718
|
-
/// given function.
|
719
|
-
pub fn new<M>(func: &ir::Function, flags: &settings::Flags) -> CodegenResult<Self>
|
720
|
-
where
|
721
|
-
M: ABIMachineSpec,
|
722
|
-
{
|
723
|
-
let arg_estimate = func.dfg.signatures.len() * 6;
|
724
|
-
|
725
|
-
let mut sigs = SigSet {
|
726
|
-
ir_signature_to_abi_sig: FxHashMap::default(),
|
727
|
-
ir_sig_ref_to_abi_sig: SecondaryMap::with_capacity(func.dfg.signatures.len()),
|
728
|
-
abi_args: Vec::with_capacity(arg_estimate),
|
729
|
-
sigs: PrimaryMap::with_capacity(1 + func.dfg.signatures.len()),
|
730
|
-
};
|
731
|
-
|
732
|
-
sigs.make_abi_sig_from_ir_signature::<M>(func.signature.clone(), flags)?;
|
733
|
-
for sig_ref in func.dfg.signatures.keys() {
|
734
|
-
sigs.make_abi_sig_from_ir_sig_ref::<M>(sig_ref, &func.dfg, flags)?;
|
735
|
-
}
|
736
|
-
|
737
|
-
Ok(sigs)
|
738
|
-
}
|
739
|
-
|
740
|
-
/// Have we already interned an ABI signature for the given `ir::Signature`?
|
741
|
-
pub fn have_abi_sig_for_signature(&self, signature: &ir::Signature) -> bool {
|
742
|
-
self.ir_signature_to_abi_sig.contains_key(signature)
|
743
|
-
}
|
744
|
-
|
745
|
-
/// Construct and intern an ABI signature for the given `ir::Signature`.
|
746
|
-
pub fn make_abi_sig_from_ir_signature<M>(
|
747
|
-
&mut self,
|
748
|
-
signature: ir::Signature,
|
749
|
-
flags: &settings::Flags,
|
750
|
-
) -> CodegenResult<Sig>
|
751
|
-
where
|
752
|
-
M: ABIMachineSpec,
|
753
|
-
{
|
754
|
-
// Because the `HashMap` entry API requires taking ownership of the
|
755
|
-
// lookup key -- and we want to avoid unnecessary clones of
|
756
|
-
// `ir::Signature`s, even at the cost of duplicate lookups -- we can't
|
757
|
-
// have a single, get-or-create-style method for interning
|
758
|
-
// `ir::Signature`s into ABI signatures. So at least (debug) assert that
|
759
|
-
// we aren't creating duplicate ABI signatures for the same
|
760
|
-
// `ir::Signature`.
|
761
|
-
debug_assert!(!self.have_abi_sig_for_signature(&signature));
|
762
|
-
|
763
|
-
let sig_data = self.from_func_sig::<M>(&signature, flags)?;
|
764
|
-
let sig = self.sigs.push(sig_data);
|
765
|
-
self.ir_signature_to_abi_sig.insert(signature, sig);
|
766
|
-
Ok(sig)
|
767
|
-
}
|
768
|
-
|
769
|
-
fn make_abi_sig_from_ir_sig_ref<M>(
|
770
|
-
&mut self,
|
771
|
-
sig_ref: ir::SigRef,
|
772
|
-
dfg: &ir::DataFlowGraph,
|
773
|
-
flags: &settings::Flags,
|
774
|
-
) -> CodegenResult<Sig>
|
775
|
-
where
|
776
|
-
M: ABIMachineSpec,
|
777
|
-
{
|
778
|
-
if let Some(sig) = self.ir_sig_ref_to_abi_sig[sig_ref] {
|
779
|
-
return Ok(sig);
|
780
|
-
}
|
781
|
-
let signature = &dfg.signatures[sig_ref];
|
782
|
-
let sig_data = self.from_func_sig::<M>(signature, flags)?;
|
783
|
-
let sig = self.sigs.push(sig_data);
|
784
|
-
self.ir_sig_ref_to_abi_sig[sig_ref] = Some(sig);
|
785
|
-
Ok(sig)
|
786
|
-
}
|
787
|
-
|
788
|
-
/// Get the already-interned ABI signature id for the given `ir::SigRef`.
|
789
|
-
pub fn abi_sig_for_sig_ref(&self, sig_ref: ir::SigRef) -> Sig {
|
790
|
-
self.ir_sig_ref_to_abi_sig
|
791
|
-
.get(sig_ref)
|
792
|
-
// Should have a secondary map entry...
|
793
|
-
.expect("must call `make_abi_sig_from_ir_sig_ref` before `get_abi_sig_for_sig_ref`")
|
794
|
-
// ...and that entry should be initialized.
|
795
|
-
.expect("must call `make_abi_sig_from_ir_sig_ref` before `get_abi_sig_for_sig_ref`")
|
796
|
-
}
|
797
|
-
|
798
|
-
/// Get the already-interned ABI signature id for the given `ir::Signature`.
|
799
|
-
pub fn abi_sig_for_signature(&self, signature: &ir::Signature) -> Sig {
|
800
|
-
self.ir_signature_to_abi_sig
|
801
|
-
.get(signature)
|
802
|
-
.copied()
|
803
|
-
.expect("must call `make_abi_sig_from_ir_signature` before `get_abi_sig_for_signature`")
|
804
|
-
}
|
805
|
-
|
806
|
-
pub fn from_func_sig<M: ABIMachineSpec>(
|
807
|
-
&mut self,
|
808
|
-
sig: &ir::Signature,
|
809
|
-
flags: &settings::Flags,
|
810
|
-
) -> CodegenResult<SigData> {
|
811
|
-
use std::borrow::Cow;
|
812
|
-
|
813
|
-
let returns = if let Some(sret) = missing_struct_return(sig) {
|
814
|
-
Cow::from_iter(std::iter::once(&sret).chain(&sig.returns).copied())
|
815
|
-
} else {
|
816
|
-
Cow::from(sig.returns.as_slice())
|
817
|
-
};
|
818
|
-
|
819
|
-
// Compute args and retvals from signature. Handle retvals first,
|
820
|
-
// because we may need to add a return-area arg to the args.
|
821
|
-
|
822
|
-
// NOTE: We rely on the order of the args (rets -> args) inserted to compute the offsets in
|
823
|
-
// `SigSet::args()` and `SigSet::rets()`. Therefore, we cannot change the two
|
824
|
-
// compute_arg_locs order.
|
825
|
-
let (sized_stack_ret_space, _) = M::compute_arg_locs(
|
826
|
-
sig.call_conv,
|
827
|
-
flags,
|
828
|
-
&returns,
|
829
|
-
ArgsOrRets::Rets,
|
830
|
-
/* extra ret-area ptr = */ false,
|
831
|
-
ArgsAccumulator::new(&mut self.abi_args),
|
832
|
-
)?;
|
833
|
-
let rets_end = u32::try_from(self.abi_args.len()).unwrap();
|
834
|
-
|
835
|
-
let need_stack_return_area = sized_stack_ret_space > 0;
|
836
|
-
let (sized_stack_arg_space, stack_ret_arg) = M::compute_arg_locs(
|
837
|
-
sig.call_conv,
|
838
|
-
flags,
|
839
|
-
&sig.params,
|
840
|
-
ArgsOrRets::Args,
|
841
|
-
need_stack_return_area,
|
842
|
-
ArgsAccumulator::new(&mut self.abi_args),
|
843
|
-
)?;
|
844
|
-
let args_end = u32::try_from(self.abi_args.len()).unwrap();
|
845
|
-
|
846
|
-
trace!(
|
847
|
-
"ABISig: sig {:?} => args end = {} rets end = {}
|
848
|
-
arg stack = {} ret stack = {} stack_ret_arg = {:?}",
|
849
|
-
sig,
|
850
|
-
args_end,
|
851
|
-
rets_end,
|
852
|
-
sized_stack_arg_space,
|
853
|
-
sized_stack_ret_space,
|
854
|
-
need_stack_return_area,
|
855
|
-
);
|
856
|
-
|
857
|
-
let stack_ret_arg = stack_ret_arg.map(|s| u16::try_from(s).unwrap());
|
858
|
-
Ok(SigData {
|
859
|
-
args_end,
|
860
|
-
rets_end,
|
861
|
-
sized_stack_arg_space,
|
862
|
-
sized_stack_ret_space,
|
863
|
-
stack_ret_arg,
|
864
|
-
call_conv: sig.call_conv,
|
865
|
-
})
|
866
|
-
}
|
867
|
-
|
868
|
-
/// Get this signature's ABI arguments.
|
869
|
-
pub fn args(&self, sig: Sig) -> &[ABIArg] {
|
870
|
-
let sig_data = &self.sigs[sig];
|
871
|
-
// Please see comments in `SigSet::from_func_sig` of how we store the offsets.
|
872
|
-
let start = usize::try_from(sig_data.rets_end).unwrap();
|
873
|
-
let end = usize::try_from(sig_data.args_end).unwrap();
|
874
|
-
&self.abi_args[start..end]
|
875
|
-
}
|
876
|
-
|
877
|
-
/// Get information specifying how to pass the implicit pointer
|
878
|
-
/// to the return-value area on the stack, if required.
|
879
|
-
pub fn get_ret_arg(&self, sig: Sig) -> Option<ABIArg> {
|
880
|
-
let sig_data = &self.sigs[sig];
|
881
|
-
if let Some(i) = sig_data.stack_ret_arg {
|
882
|
-
Some(self.args(sig)[usize::from(i)].clone())
|
883
|
-
} else {
|
884
|
-
None
|
885
|
-
}
|
886
|
-
}
|
887
|
-
|
888
|
-
/// Get information specifying how to pass one argument.
|
889
|
-
pub fn get_arg(&self, sig: Sig, idx: usize) -> ABIArg {
|
890
|
-
self.args(sig)[idx].clone()
|
891
|
-
}
|
892
|
-
|
893
|
-
/// Get this signature's ABI returns.
|
894
|
-
pub fn rets(&self, sig: Sig) -> &[ABIArg] {
|
895
|
-
let sig_data = &self.sigs[sig];
|
896
|
-
// Please see comments in `SigSet::from_func_sig` of how we store the offsets.
|
897
|
-
let start = usize::try_from(sig.prev().map_or(0, |prev| self.sigs[prev].args_end)).unwrap();
|
898
|
-
let end = usize::try_from(sig_data.rets_end).unwrap();
|
899
|
-
&self.abi_args[start..end]
|
900
|
-
}
|
901
|
-
|
902
|
-
/// Get information specifying how to pass one return value.
|
903
|
-
pub fn get_ret(&self, sig: Sig, idx: usize) -> ABIArg {
|
904
|
-
self.rets(sig)[idx].clone()
|
905
|
-
}
|
906
|
-
|
907
|
-
/// Return all clobbers for the callsite.
|
908
|
-
pub fn call_clobbers<M: ABIMachineSpec>(&self, sig: Sig) -> PRegSet {
|
909
|
-
let sig_data = &self.sigs[sig];
|
910
|
-
// Get clobbers: all caller-saves. These may include return value
|
911
|
-
// regs, which we will remove from the clobber set below.
|
912
|
-
let mut clobbers = M::get_regs_clobbered_by_call(sig_data.call_conv);
|
913
|
-
|
914
|
-
// Remove retval regs from clobbers. Skip StructRets: these
|
915
|
-
// are not, semantically, returns at the CLIF level, so we
|
916
|
-
// treat such a value as a clobber instead.
|
917
|
-
for ret in self.rets(sig) {
|
918
|
-
if let &ABIArg::Slots {
|
919
|
-
ref slots, purpose, ..
|
920
|
-
} = ret
|
921
|
-
{
|
922
|
-
if purpose == ir::ArgumentPurpose::StructReturn {
|
923
|
-
continue;
|
924
|
-
}
|
925
|
-
for slot in slots {
|
926
|
-
match slot {
|
927
|
-
&ABIArgSlot::Reg { reg, .. } => {
|
928
|
-
crate::trace!("call_clobbers: retval reg {:?}", reg);
|
929
|
-
clobbers.remove(PReg::from(reg));
|
930
|
-
}
|
931
|
-
_ => {}
|
932
|
-
}
|
933
|
-
}
|
934
|
-
}
|
935
|
-
}
|
936
|
-
|
937
|
-
clobbers
|
938
|
-
}
|
939
|
-
|
940
|
-
/// Get the number of arguments expected.
|
941
|
-
pub fn num_args(&self, sig: Sig) -> usize {
|
942
|
-
let len = self.args(sig).len();
|
943
|
-
if self.sigs[sig].stack_ret_arg.is_some() {
|
944
|
-
len - 1
|
945
|
-
} else {
|
946
|
-
len
|
947
|
-
}
|
948
|
-
}
|
949
|
-
|
950
|
-
/// Get the number of return values expected.
|
951
|
-
pub fn num_rets(&self, sig: Sig) -> usize {
|
952
|
-
self.rets(sig).len()
|
953
|
-
}
|
954
|
-
}
|
955
|
-
|
956
|
-
// NB: we do _not_ implement `IndexMut` because these signatures are
|
957
|
-
// deduplicated and shared!
|
958
|
-
impl std::ops::Index<Sig> for SigSet {
|
959
|
-
type Output = SigData;
|
960
|
-
|
961
|
-
fn index(&self, sig: Sig) -> &Self::Output {
|
962
|
-
&self.sigs[sig]
|
963
|
-
}
|
964
|
-
}
|
965
|
-
|
966
|
-
/// Structure describing the layout of a function's stack frame.
|
967
|
-
#[derive(Clone, Debug, Default)]
|
968
|
-
pub struct FrameLayout {
|
969
|
-
/// N.B. The areas whose sizes are given in this structure fully
|
970
|
-
/// cover the current function's stack frame, from high to low
|
971
|
-
/// stack addresses in the sequence below. Each size contains
|
972
|
-
/// any alignment padding that may be required by the ABI.
|
973
|
-
|
974
|
-
/// Size of incoming arguments on the stack. This is not technically
|
975
|
-
/// part of this function's frame, but code in the function will still
|
976
|
-
/// need to access it. Depending on the ABI, we may need to set up a
|
977
|
-
/// frame pointer to do so; we also may need to pop this area from the
|
978
|
-
/// stack upon return.
|
979
|
-
pub stack_args_size: u32,
|
980
|
-
|
981
|
-
/// Size of the "setup area", typically holding the return address
|
982
|
-
/// and/or the saved frame pointer. This may be written either during
|
983
|
-
/// the call itself (e.g. a pushed return address) or by code emitted
|
984
|
-
/// from gen_prologue_frame_setup. In any case, after that code has
|
985
|
-
/// completed execution, the stack pointer is expected to point to the
|
986
|
-
/// bottom of this area. The same holds at the start of code emitted
|
987
|
-
/// by gen_epilogue_frame_restore.
|
988
|
-
pub setup_area_size: u32,
|
989
|
-
|
990
|
-
/// Size of the area used to save callee-saved clobbered registers.
|
991
|
-
/// This area is accessed by code emitted from gen_clobber_save and
|
992
|
-
/// gen_clobber_restore.
|
993
|
-
pub clobber_size: u32,
|
994
|
-
|
995
|
-
/// Storage allocated for the fixed part of the stack frame.
|
996
|
-
/// This contains stack slots and spill slots. The "nominal SP"
|
997
|
-
/// during execution of the function points to the bottom of this.
|
998
|
-
pub fixed_frame_storage_size: u32,
|
999
|
-
|
1000
|
-
/// Stack size to be reserved for outgoing arguments, if used by
|
1001
|
-
/// the current ABI, or 0 otherwise. After gen_clobber_save and
|
1002
|
-
/// before gen_clobber_restore, the stack pointer points to the
|
1003
|
-
/// bottom of this area.
|
1004
|
-
pub outgoing_args_size: u32,
|
1005
|
-
|
1006
|
-
/// Sorted list of callee-saved registers that are clobbered
|
1007
|
-
/// according to the ABI. These registers will be saved and
|
1008
|
-
/// restored by gen_clobber_save and gen_clobber_restore.
|
1009
|
-
pub clobbered_callee_saves: Vec<Writable<RealReg>>,
|
1010
|
-
}
|
1011
|
-
|
1012
|
-
/// ABI object for a function body.
|
1013
|
-
pub struct Callee<M: ABIMachineSpec> {
|
1014
|
-
/// CLIF-level signature, possibly normalized.
|
1015
|
-
ir_sig: ir::Signature,
|
1016
|
-
/// Signature: arg and retval regs.
|
1017
|
-
sig: Sig,
|
1018
|
-
/// Defined dynamic types.
|
1019
|
-
dynamic_type_sizes: HashMap<Type, u32>,
|
1020
|
-
/// Offsets to each dynamic stackslot.
|
1021
|
-
dynamic_stackslots: PrimaryMap<DynamicStackSlot, u32>,
|
1022
|
-
/// Offsets to each sized stackslot.
|
1023
|
-
sized_stackslots: PrimaryMap<StackSlot, u32>,
|
1024
|
-
/// Total stack size of all stackslots
|
1025
|
-
stackslots_size: u32,
|
1026
|
-
/// Stack size to be reserved for outgoing arguments.
|
1027
|
-
outgoing_args_size: u32,
|
1028
|
-
/// Register-argument defs, to be provided to the `args`
|
1029
|
-
/// pseudo-inst, and pregs to constrain them to.
|
1030
|
-
reg_args: Vec<ArgPair>,
|
1031
|
-
/// Clobbered registers, from regalloc.
|
1032
|
-
clobbered: Vec<Writable<RealReg>>,
|
1033
|
-
/// Total number of spillslots, including for 'dynamic' types, from regalloc.
|
1034
|
-
spillslots: Option<usize>,
|
1035
|
-
/// Finalized frame layout for this function.
|
1036
|
-
frame_layout: Option<FrameLayout>,
|
1037
|
-
/// The register holding the return-area pointer, if needed.
|
1038
|
-
ret_area_ptr: Option<Writable<Reg>>,
|
1039
|
-
/// Temp registers required for argument setup, if needed.
|
1040
|
-
arg_temp_reg: Vec<Option<Writable<Reg>>>,
|
1041
|
-
/// Calling convention this function expects.
|
1042
|
-
call_conv: isa::CallConv,
|
1043
|
-
/// The settings controlling this function's compilation.
|
1044
|
-
flags: settings::Flags,
|
1045
|
-
/// The ISA-specific flag values controlling this function's compilation.
|
1046
|
-
isa_flags: M::F,
|
1047
|
-
/// Whether or not this function is a "leaf", meaning it calls no other
|
1048
|
-
/// functions
|
1049
|
-
is_leaf: bool,
|
1050
|
-
/// If this function has a stack limit specified, then `Reg` is where the
|
1051
|
-
/// stack limit will be located after the instructions specified have been
|
1052
|
-
/// executed.
|
1053
|
-
///
|
1054
|
-
/// Note that this is intended for insertion into the prologue, if
|
1055
|
-
/// present. Also note that because the instructions here execute in the
|
1056
|
-
/// prologue this happens after legalization/register allocation/etc so we
|
1057
|
-
/// need to be extremely careful with each instruction. The instructions are
|
1058
|
-
/// manually register-allocated and carefully only use caller-saved
|
1059
|
-
/// registers and keep nothing live after this sequence of instructions.
|
1060
|
-
stack_limit: Option<(Reg, SmallInstVec<M::I>)>,
|
1061
|
-
/// Are we to invoke the probestack function in the prologue? If so,
|
1062
|
-
/// what is the minimum size at which we must invoke it?
|
1063
|
-
probestack_min_frame: Option<u32>,
|
1064
|
-
|
1065
|
-
_mach: PhantomData<M>,
|
1066
|
-
}
|
1067
|
-
|
1068
|
-
fn get_special_purpose_param_register(
|
1069
|
-
f: &ir::Function,
|
1070
|
-
sigs: &SigSet,
|
1071
|
-
sig: Sig,
|
1072
|
-
purpose: ir::ArgumentPurpose,
|
1073
|
-
) -> Option<Reg> {
|
1074
|
-
let idx = f.signature.special_param_index(purpose)?;
|
1075
|
-
match &sigs.args(sig)[idx] {
|
1076
|
-
&ABIArg::Slots { ref slots, .. } => match &slots[0] {
|
1077
|
-
&ABIArgSlot::Reg { reg, .. } => Some(reg.into()),
|
1078
|
-
_ => None,
|
1079
|
-
},
|
1080
|
-
_ => None,
|
1081
|
-
}
|
1082
|
-
}
|
1083
|
-
|
1084
|
-
fn checked_round_up(val: u32, mask: u32) -> Option<u32> {
|
1085
|
-
Some(val.checked_add(mask)? & !mask)
|
1086
|
-
}
|
1087
|
-
|
1088
|
-
impl<M: ABIMachineSpec> Callee<M> {
|
1089
|
-
/// Create a new body ABI instance.
|
1090
|
-
pub fn new<'a>(
|
1091
|
-
f: &ir::Function,
|
1092
|
-
isa: &dyn TargetIsa,
|
1093
|
-
isa_flags: &M::F,
|
1094
|
-
sigs: &SigSet,
|
1095
|
-
) -> CodegenResult<Self> {
|
1096
|
-
trace!("ABI: func signature {:?}", f.signature);
|
1097
|
-
|
1098
|
-
let flags = isa.flags().clone();
|
1099
|
-
let sig = sigs.abi_sig_for_signature(&f.signature);
|
1100
|
-
|
1101
|
-
let call_conv = f.signature.call_conv;
|
1102
|
-
// Only these calling conventions are supported.
|
1103
|
-
debug_assert!(
|
1104
|
-
call_conv == isa::CallConv::SystemV
|
1105
|
-
|| call_conv == isa::CallConv::Tail
|
1106
|
-
|| call_conv == isa::CallConv::Fast
|
1107
|
-
|| call_conv == isa::CallConv::Cold
|
1108
|
-
|| call_conv.extends_windows_fastcall()
|
1109
|
-
|| call_conv == isa::CallConv::WasmtimeSystemV
|
1110
|
-
|| call_conv == isa::CallConv::AppleAarch64
|
1111
|
-
|| call_conv == isa::CallConv::Winch,
|
1112
|
-
"Unsupported calling convention: {:?}",
|
1113
|
-
call_conv
|
1114
|
-
);
|
1115
|
-
|
1116
|
-
// Compute sized stackslot locations and total stackslot size.
|
1117
|
-
let mut sized_stack_offset: u32 = 0;
|
1118
|
-
let mut sized_stackslots = PrimaryMap::new();
|
1119
|
-
for (stackslot, data) in f.sized_stack_slots.iter() {
|
1120
|
-
let off = sized_stack_offset;
|
1121
|
-
sized_stack_offset = sized_stack_offset
|
1122
|
-
.checked_add(data.size)
|
1123
|
-
.ok_or(CodegenError::ImplLimitExceeded)?;
|
1124
|
-
let mask = M::word_bytes() - 1;
|
1125
|
-
sized_stack_offset = checked_round_up(sized_stack_offset, mask)
|
1126
|
-
.ok_or(CodegenError::ImplLimitExceeded)?;
|
1127
|
-
debug_assert_eq!(stackslot.as_u32() as usize, sized_stackslots.len());
|
1128
|
-
sized_stackslots.push(off);
|
1129
|
-
}
|
1130
|
-
|
1131
|
-
// Compute dynamic stackslot locations and total stackslot size.
|
1132
|
-
let mut dynamic_stackslots = PrimaryMap::new();
|
1133
|
-
let mut dynamic_stack_offset: u32 = sized_stack_offset;
|
1134
|
-
for (stackslot, data) in f.dynamic_stack_slots.iter() {
|
1135
|
-
debug_assert_eq!(stackslot.as_u32() as usize, dynamic_stackslots.len());
|
1136
|
-
let off = dynamic_stack_offset;
|
1137
|
-
let ty = f.get_concrete_dynamic_ty(data.dyn_ty).ok_or_else(|| {
|
1138
|
-
CodegenError::Unsupported(format!("invalid dynamic vector type: {}", data.dyn_ty))
|
1139
|
-
})?;
|
1140
|
-
dynamic_stack_offset = dynamic_stack_offset
|
1141
|
-
.checked_add(isa.dynamic_vector_bytes(ty))
|
1142
|
-
.ok_or(CodegenError::ImplLimitExceeded)?;
|
1143
|
-
let mask = M::word_bytes() - 1;
|
1144
|
-
dynamic_stack_offset = checked_round_up(dynamic_stack_offset, mask)
|
1145
|
-
.ok_or(CodegenError::ImplLimitExceeded)?;
|
1146
|
-
dynamic_stackslots.push(off);
|
1147
|
-
}
|
1148
|
-
let stackslots_size = dynamic_stack_offset;
|
1149
|
-
|
1150
|
-
let mut dynamic_type_sizes = HashMap::with_capacity(f.dfg.dynamic_types.len());
|
1151
|
-
for (dyn_ty, _data) in f.dfg.dynamic_types.iter() {
|
1152
|
-
let ty = f
|
1153
|
-
.get_concrete_dynamic_ty(dyn_ty)
|
1154
|
-
.unwrap_or_else(|| panic!("invalid dynamic vector type: {}", dyn_ty));
|
1155
|
-
let size = isa.dynamic_vector_bytes(ty);
|
1156
|
-
dynamic_type_sizes.insert(ty, size);
|
1157
|
-
}
|
1158
|
-
|
1159
|
-
// Figure out what instructions, if any, will be needed to check the
|
1160
|
-
// stack limit. This can either be specified as a special-purpose
|
1161
|
-
// argument or as a global value which often calculates the stack limit
|
1162
|
-
// from the arguments.
|
1163
|
-
let stack_limit =
|
1164
|
-
get_special_purpose_param_register(f, sigs, sig, ir::ArgumentPurpose::StackLimit)
|
1165
|
-
.map(|reg| (reg, smallvec![]))
|
1166
|
-
.or_else(|| {
|
1167
|
-
f.stack_limit
|
1168
|
-
.map(|gv| gen_stack_limit::<M>(f, sigs, sig, gv))
|
1169
|
-
});
|
1170
|
-
|
1171
|
-
// Determine whether a probestack call is required for large enough
|
1172
|
-
// frames (and the minimum frame size if so).
|
1173
|
-
let probestack_min_frame = if flags.enable_probestack() {
|
1174
|
-
assert!(
|
1175
|
-
!flags.probestack_func_adjusts_sp(),
|
1176
|
-
"SP-adjusting probestack not supported in new backends"
|
1177
|
-
);
|
1178
|
-
Some(1 << flags.probestack_size_log2())
|
1179
|
-
} else {
|
1180
|
-
None
|
1181
|
-
};
|
1182
|
-
|
1183
|
-
Ok(Self {
|
1184
|
-
ir_sig: ensure_struct_return_ptr_is_returned(&f.signature),
|
1185
|
-
sig,
|
1186
|
-
dynamic_stackslots,
|
1187
|
-
dynamic_type_sizes,
|
1188
|
-
sized_stackslots,
|
1189
|
-
stackslots_size,
|
1190
|
-
outgoing_args_size: 0,
|
1191
|
-
reg_args: vec![],
|
1192
|
-
clobbered: vec![],
|
1193
|
-
spillslots: None,
|
1194
|
-
frame_layout: None,
|
1195
|
-
ret_area_ptr: None,
|
1196
|
-
arg_temp_reg: vec![],
|
1197
|
-
call_conv,
|
1198
|
-
flags,
|
1199
|
-
isa_flags: isa_flags.clone(),
|
1200
|
-
is_leaf: f.is_leaf(),
|
1201
|
-
stack_limit,
|
1202
|
-
probestack_min_frame,
|
1203
|
-
_mach: PhantomData,
|
1204
|
-
})
|
1205
|
-
}
|
1206
|
-
|
1207
|
-
/// Inserts instructions necessary for checking the stack limit into the
|
1208
|
-
/// prologue.
|
1209
|
-
///
|
1210
|
-
/// This function will generate instructions necessary for perform a stack
|
1211
|
-
/// check at the header of a function. The stack check is intended to trap
|
1212
|
-
/// if the stack pointer goes below a particular threshold, preventing stack
|
1213
|
-
/// overflow in wasm or other code. The `stack_limit` argument here is the
|
1214
|
-
/// register which holds the threshold below which we're supposed to trap.
|
1215
|
-
/// This function is known to allocate `stack_size` bytes and we'll push
|
1216
|
-
/// instructions onto `insts`.
|
1217
|
-
///
|
1218
|
-
/// Note that the instructions generated here are special because this is
|
1219
|
-
/// happening so late in the pipeline (e.g. after register allocation). This
|
1220
|
-
/// means that we need to do manual register allocation here and also be
|
1221
|
-
/// careful to not clobber any callee-saved or argument registers. For now
|
1222
|
-
/// this routine makes do with the `spilltmp_reg` as one temporary
|
1223
|
-
/// register, and a second register of `tmp2` which is caller-saved. This
|
1224
|
-
/// should be fine for us since no spills should happen in this sequence of
|
1225
|
-
/// instructions, so our register won't get accidentally clobbered.
|
1226
|
-
///
|
1227
|
-
/// No values can be live after the prologue, but in this case that's ok
|
1228
|
-
/// because we just need to perform a stack check before progressing with
|
1229
|
-
/// the rest of the function.
|
1230
|
-
fn insert_stack_check(
|
1231
|
-
&self,
|
1232
|
-
stack_limit: Reg,
|
1233
|
-
stack_size: u32,
|
1234
|
-
insts: &mut SmallInstVec<M::I>,
|
1235
|
-
) {
|
1236
|
-
// With no explicit stack allocated we can just emit the simple check of
|
1237
|
-
// the stack registers against the stack limit register, and trap if
|
1238
|
-
// it's out of bounds.
|
1239
|
-
if stack_size == 0 {
|
1240
|
-
insts.extend(M::gen_stack_lower_bound_trap(stack_limit));
|
1241
|
-
return;
|
1242
|
-
}
|
1243
|
-
|
1244
|
-
// Note that the 32k stack size here is pretty special. See the
|
1245
|
-
// documentation in x86/abi.rs for why this is here. The general idea is
|
1246
|
-
// that we're protecting against overflow in the addition that happens
|
1247
|
-
// below.
|
1248
|
-
if stack_size >= 32 * 1024 {
|
1249
|
-
insts.extend(M::gen_stack_lower_bound_trap(stack_limit));
|
1250
|
-
}
|
1251
|
-
|
1252
|
-
// Add the `stack_size` to `stack_limit`, placing the result in
|
1253
|
-
// `scratch`.
|
1254
|
-
//
|
1255
|
-
// Note though that `stack_limit`'s register may be the same as
|
1256
|
-
// `scratch`. If our stack size doesn't fit into an immediate this
|
1257
|
-
// means we need a second scratch register for loading the stack size
|
1258
|
-
// into a register.
|
1259
|
-
let scratch = Writable::from_reg(M::get_stacklimit_reg(self.call_conv));
|
1260
|
-
insts.extend(M::gen_add_imm(self.call_conv, scratch, stack_limit, stack_size).into_iter());
|
1261
|
-
insts.extend(M::gen_stack_lower_bound_trap(scratch.to_reg()));
|
1262
|
-
}
|
1263
|
-
}
|
1264
|
-
|
1265
|
-
/// Generates the instructions necessary for the `gv` to be materialized into a
|
1266
|
-
/// register.
|
1267
|
-
///
|
1268
|
-
/// This function will return a register that will contain the result of
|
1269
|
-
/// evaluating `gv`. It will also return any instructions necessary to calculate
|
1270
|
-
/// the value of the register.
|
1271
|
-
///
|
1272
|
-
/// Note that global values are typically lowered to instructions via the
|
1273
|
-
/// standard legalization pass. Unfortunately though prologue generation happens
|
1274
|
-
/// so late in the pipeline that we can't use these legalization passes to
|
1275
|
-
/// generate the instructions for `gv`. As a result we duplicate some lowering
|
1276
|
-
/// of `gv` here and support only some global values. This is similar to what
|
1277
|
-
/// the x86 backend does for now, and hopefully this can be somewhat cleaned up
|
1278
|
-
/// in the future too!
|
1279
|
-
///
|
1280
|
-
/// Also note that this function will make use of `writable_spilltmp_reg()` as a
|
1281
|
-
/// temporary register to store values in if necessary. Currently after we write
|
1282
|
-
/// to this register there's guaranteed to be no spilled values between where
|
1283
|
-
/// it's used, because we're not participating in register allocation anyway!
|
1284
|
-
fn gen_stack_limit<M: ABIMachineSpec>(
|
1285
|
-
f: &ir::Function,
|
1286
|
-
sigs: &SigSet,
|
1287
|
-
sig: Sig,
|
1288
|
-
gv: ir::GlobalValue,
|
1289
|
-
) -> (Reg, SmallInstVec<M::I>) {
|
1290
|
-
let mut insts = smallvec![];
|
1291
|
-
let reg = generate_gv::<M>(f, sigs, sig, gv, &mut insts);
|
1292
|
-
return (reg, insts);
|
1293
|
-
}
|
1294
|
-
|
1295
|
-
fn generate_gv<M: ABIMachineSpec>(
|
1296
|
-
f: &ir::Function,
|
1297
|
-
sigs: &SigSet,
|
1298
|
-
sig: Sig,
|
1299
|
-
gv: ir::GlobalValue,
|
1300
|
-
insts: &mut SmallInstVec<M::I>,
|
1301
|
-
) -> Reg {
|
1302
|
-
match f.global_values[gv] {
|
1303
|
-
// Return the direct register the vmcontext is in
|
1304
|
-
ir::GlobalValueData::VMContext => {
|
1305
|
-
get_special_purpose_param_register(f, sigs, sig, ir::ArgumentPurpose::VMContext)
|
1306
|
-
.expect("no vmcontext parameter found")
|
1307
|
-
}
|
1308
|
-
// Load our base value into a register, then load from that register
|
1309
|
-
// in to a temporary register.
|
1310
|
-
ir::GlobalValueData::Load {
|
1311
|
-
base,
|
1312
|
-
offset,
|
1313
|
-
global_type: _,
|
1314
|
-
flags: _,
|
1315
|
-
} => {
|
1316
|
-
let base = generate_gv::<M>(f, sigs, sig, base, insts);
|
1317
|
-
let into_reg = Writable::from_reg(M::get_stacklimit_reg(f.stencil.signature.call_conv));
|
1318
|
-
insts.push(M::gen_load_base_offset(
|
1319
|
-
into_reg,
|
1320
|
-
base,
|
1321
|
-
offset.into(),
|
1322
|
-
M::word_type(),
|
1323
|
-
));
|
1324
|
-
return into_reg.to_reg();
|
1325
|
-
}
|
1326
|
-
ref other => panic!("global value for stack limit not supported: {}", other),
|
1327
|
-
}
|
1328
|
-
}
|
1329
|
-
|
1330
|
-
/// If the signature needs to be legalized, then return the struct-return
|
1331
|
-
/// parameter that should be prepended to its returns. Otherwise, return `None`.
|
1332
|
-
fn missing_struct_return(sig: &ir::Signature) -> Option<ir::AbiParam> {
|
1333
|
-
let struct_ret_index = sig.special_param_index(ArgumentPurpose::StructReturn)?;
|
1334
|
-
if !sig.uses_special_return(ArgumentPurpose::StructReturn) {
|
1335
|
-
return Some(sig.params[struct_ret_index]);
|
1336
|
-
}
|
1337
|
-
|
1338
|
-
None
|
1339
|
-
}
|
1340
|
-
|
1341
|
-
fn ensure_struct_return_ptr_is_returned(sig: &ir::Signature) -> ir::Signature {
|
1342
|
-
let mut sig = sig.clone();
|
1343
|
-
if let Some(sret) = missing_struct_return(&sig) {
|
1344
|
-
sig.returns.insert(0, sret);
|
1345
|
-
}
|
1346
|
-
sig
|
1347
|
-
}
|
1348
|
-
|
1349
|
-
/// ### Pre-Regalloc Functions
|
1350
|
-
///
|
1351
|
-
/// These methods of `Callee` may only be called before regalloc.
|
1352
|
-
impl<M: ABIMachineSpec> Callee<M> {
|
1353
|
-
/// Access the (possibly legalized) signature.
|
1354
|
-
pub fn signature(&self) -> &ir::Signature {
|
1355
|
-
debug_assert!(
|
1356
|
-
missing_struct_return(&self.ir_sig).is_none(),
|
1357
|
-
"`Callee::ir_sig` is always legalized"
|
1358
|
-
);
|
1359
|
-
&self.ir_sig
|
1360
|
-
}
|
1361
|
-
|
1362
|
-
/// Does the ABI-body code need temp registers (and if so, of what type)?
|
1363
|
-
/// They will be provided to `init()` as the `temps` arg if so.
|
1364
|
-
pub fn temps_needed(&self, sigs: &SigSet) -> Vec<Type> {
|
1365
|
-
let mut temp_tys = vec![];
|
1366
|
-
for arg in sigs.args(self.sig) {
|
1367
|
-
match arg {
|
1368
|
-
&ABIArg::ImplicitPtrArg { pointer, .. } => match &pointer {
|
1369
|
-
&ABIArgSlot::Reg { .. } => {}
|
1370
|
-
&ABIArgSlot::Stack { ty, .. } => {
|
1371
|
-
temp_tys.push(ty);
|
1372
|
-
}
|
1373
|
-
},
|
1374
|
-
_ => {}
|
1375
|
-
}
|
1376
|
-
}
|
1377
|
-
if sigs[self.sig].stack_ret_arg.is_some() {
|
1378
|
-
temp_tys.push(M::word_type());
|
1379
|
-
}
|
1380
|
-
temp_tys
|
1381
|
-
}
|
1382
|
-
|
1383
|
-
/// Initialize. This is called after the Callee is constructed because it
|
1384
|
-
/// may be provided with a vector of temp vregs, which can only be allocated
|
1385
|
-
/// once the lowering context exists.
|
1386
|
-
pub fn init(&mut self, sigs: &SigSet, temps: Vec<Writable<Reg>>) {
|
1387
|
-
let mut temps_iter = temps.into_iter();
|
1388
|
-
for arg in sigs.args(self.sig) {
|
1389
|
-
let temp = match arg {
|
1390
|
-
&ABIArg::ImplicitPtrArg { pointer, .. } => match &pointer {
|
1391
|
-
&ABIArgSlot::Reg { .. } => None,
|
1392
|
-
&ABIArgSlot::Stack { .. } => Some(temps_iter.next().unwrap()),
|
1393
|
-
},
|
1394
|
-
_ => None,
|
1395
|
-
};
|
1396
|
-
self.arg_temp_reg.push(temp);
|
1397
|
-
}
|
1398
|
-
if sigs[self.sig].stack_ret_arg.is_some() {
|
1399
|
-
self.ret_area_ptr = Some(temps_iter.next().unwrap());
|
1400
|
-
}
|
1401
|
-
}
|
1402
|
-
|
1403
|
-
/// Accumulate outgoing arguments.
|
1404
|
-
///
|
1405
|
-
/// This ensures that at least `size` bytes are allocated in the prologue to
|
1406
|
-
/// be available for use in function calls to hold arguments and/or return
|
1407
|
-
/// values. If this function is called multiple times, the maximum of all
|
1408
|
-
/// `size` values will be available.
|
1409
|
-
pub fn accumulate_outgoing_args_size(&mut self, size: u32) {
|
1410
|
-
if size > self.outgoing_args_size {
|
1411
|
-
self.outgoing_args_size = size;
|
1412
|
-
}
|
1413
|
-
}
|
1414
|
-
|
1415
|
-
pub fn is_forward_edge_cfi_enabled(&self) -> bool {
|
1416
|
-
self.isa_flags.is_forward_edge_cfi_enabled()
|
1417
|
-
}
|
1418
|
-
|
1419
|
-
/// Get the calling convention implemented by this ABI object.
|
1420
|
-
pub fn call_conv(&self, sigs: &SigSet) -> isa::CallConv {
|
1421
|
-
sigs[self.sig].call_conv
|
1422
|
-
}
|
1423
|
-
|
1424
|
-
/// Get the ABI-dependent MachineEnv for managing register allocation.
|
1425
|
-
pub fn machine_env(&self, sigs: &SigSet) -> &MachineEnv {
|
1426
|
-
M::get_machine_env(&self.flags, self.call_conv(sigs))
|
1427
|
-
}
|
1428
|
-
|
1429
|
-
/// The offsets of all sized stack slots (not spill slots) for debuginfo purposes.
|
1430
|
-
pub fn sized_stackslot_offsets(&self) -> &PrimaryMap<StackSlot, u32> {
|
1431
|
-
&self.sized_stackslots
|
1432
|
-
}
|
1433
|
-
|
1434
|
-
/// The offsets of all dynamic stack slots (not spill slots) for debuginfo purposes.
|
1435
|
-
pub fn dynamic_stackslot_offsets(&self) -> &PrimaryMap<DynamicStackSlot, u32> {
|
1436
|
-
&self.dynamic_stackslots
|
1437
|
-
}
|
1438
|
-
|
1439
|
-
/// Generate an instruction which copies an argument to a destination
|
1440
|
-
/// register.
|
1441
|
-
pub fn gen_copy_arg_to_regs(
|
1442
|
-
&mut self,
|
1443
|
-
sigs: &SigSet,
|
1444
|
-
idx: usize,
|
1445
|
-
into_regs: ValueRegs<Writable<Reg>>,
|
1446
|
-
vregs: &mut VRegAllocator<M::I>,
|
1447
|
-
) -> SmallInstVec<M::I> {
|
1448
|
-
let mut insts = smallvec![];
|
1449
|
-
let mut copy_arg_slot_to_reg = |slot: &ABIArgSlot, into_reg: &Writable<Reg>| {
|
1450
|
-
match slot {
|
1451
|
-
&ABIArgSlot::Reg { reg, .. } => {
|
1452
|
-
// Add a preg -> def pair to the eventual `args`
|
1453
|
-
// instruction. Extension mode doesn't matter
|
1454
|
-
// (we're copying out, not in; we ignore high bits
|
1455
|
-
// by convention).
|
1456
|
-
let arg = ArgPair {
|
1457
|
-
vreg: *into_reg,
|
1458
|
-
preg: reg.into(),
|
1459
|
-
};
|
1460
|
-
self.reg_args.push(arg);
|
1461
|
-
}
|
1462
|
-
&ABIArgSlot::Stack {
|
1463
|
-
offset,
|
1464
|
-
ty,
|
1465
|
-
extension,
|
1466
|
-
..
|
1467
|
-
} => {
|
1468
|
-
// However, we have to respect the extension mode for stack
|
1469
|
-
// slots, or else we grab the wrong bytes on big-endian.
|
1470
|
-
let ext = M::get_ext_mode(sigs[self.sig].call_conv, extension);
|
1471
|
-
let ty =
|
1472
|
-
if ext != ArgumentExtension::None && M::word_bits() > ty_bits(ty) as u32 {
|
1473
|
-
M::word_type()
|
1474
|
-
} else {
|
1475
|
-
ty
|
1476
|
-
};
|
1477
|
-
insts.push(M::gen_load_stack(
|
1478
|
-
StackAMode::ArgOffset(offset, ty),
|
1479
|
-
*into_reg,
|
1480
|
-
ty,
|
1481
|
-
));
|
1482
|
-
}
|
1483
|
-
}
|
1484
|
-
};
|
1485
|
-
|
1486
|
-
match &sigs.args(self.sig)[idx] {
|
1487
|
-
&ABIArg::Slots { ref slots, .. } => {
|
1488
|
-
assert_eq!(into_regs.len(), slots.len());
|
1489
|
-
for (slot, into_reg) in slots.iter().zip(into_regs.regs().iter()) {
|
1490
|
-
copy_arg_slot_to_reg(&slot, &into_reg);
|
1491
|
-
}
|
1492
|
-
}
|
1493
|
-
&ABIArg::StructArg {
|
1494
|
-
pointer, offset, ..
|
1495
|
-
} => {
|
1496
|
-
let into_reg = into_regs.only_reg().unwrap();
|
1497
|
-
if let Some(slot) = pointer {
|
1498
|
-
// Buffer address is passed in a register or stack slot.
|
1499
|
-
copy_arg_slot_to_reg(&slot, &into_reg);
|
1500
|
-
} else {
|
1501
|
-
// Buffer address is implicitly defined by the ABI.
|
1502
|
-
insts.push(M::gen_get_stack_addr(
|
1503
|
-
StackAMode::ArgOffset(offset, I8),
|
1504
|
-
into_reg,
|
1505
|
-
I8,
|
1506
|
-
));
|
1507
|
-
}
|
1508
|
-
}
|
1509
|
-
&ABIArg::ImplicitPtrArg { pointer, ty, .. } => {
|
1510
|
-
let into_reg = into_regs.only_reg().unwrap();
|
1511
|
-
// We need to dereference the pointer.
|
1512
|
-
let base = match &pointer {
|
1513
|
-
&ABIArgSlot::Reg { reg, ty, .. } => {
|
1514
|
-
let tmp = vregs.alloc_with_deferred_error(ty).only_reg().unwrap();
|
1515
|
-
self.reg_args.push(ArgPair {
|
1516
|
-
vreg: Writable::from_reg(tmp),
|
1517
|
-
preg: reg.into(),
|
1518
|
-
});
|
1519
|
-
tmp
|
1520
|
-
}
|
1521
|
-
&ABIArgSlot::Stack { offset, ty, .. } => {
|
1522
|
-
// In this case we need a temp register to hold the address.
|
1523
|
-
// This was allocated in the `init` routine.
|
1524
|
-
let addr_reg = self.arg_temp_reg[idx].unwrap();
|
1525
|
-
insts.push(M::gen_load_stack(
|
1526
|
-
StackAMode::ArgOffset(offset, ty),
|
1527
|
-
addr_reg,
|
1528
|
-
ty,
|
1529
|
-
));
|
1530
|
-
addr_reg.to_reg()
|
1531
|
-
}
|
1532
|
-
};
|
1533
|
-
insts.push(M::gen_load_base_offset(into_reg, base, 0, ty));
|
1534
|
-
}
|
1535
|
-
}
|
1536
|
-
insts
|
1537
|
-
}
|
1538
|
-
|
1539
|
-
/// Is the given argument needed in the body (as opposed to, e.g., serving
|
1540
|
-
/// only as a special ABI-specific placeholder)? This controls whether
|
1541
|
-
/// lowering will copy it to a virtual reg use by CLIF instructions.
|
1542
|
-
pub fn arg_is_needed_in_body(&self, _idx: usize) -> bool {
|
1543
|
-
true
|
1544
|
-
}
|
1545
|
-
|
1546
|
-
/// Generate an instruction which copies a source register to a return value slot.
|
1547
|
-
pub fn gen_copy_regs_to_retval(
|
1548
|
-
&self,
|
1549
|
-
sigs: &SigSet,
|
1550
|
-
idx: usize,
|
1551
|
-
from_regs: ValueRegs<Reg>,
|
1552
|
-
vregs: &mut VRegAllocator<M::I>,
|
1553
|
-
) -> (SmallVec<[RetPair; 2]>, SmallInstVec<M::I>) {
|
1554
|
-
let mut reg_pairs = smallvec![];
|
1555
|
-
let mut ret = smallvec![];
|
1556
|
-
let word_bits = M::word_bits() as u8;
|
1557
|
-
match &sigs.rets(self.sig)[idx] {
|
1558
|
-
&ABIArg::Slots { ref slots, .. } => {
|
1559
|
-
assert_eq!(from_regs.len(), slots.len());
|
1560
|
-
for (slot, &from_reg) in slots.iter().zip(from_regs.regs().iter()) {
|
1561
|
-
match slot {
|
1562
|
-
&ABIArgSlot::Reg {
|
1563
|
-
reg, ty, extension, ..
|
1564
|
-
} => {
|
1565
|
-
let from_bits = ty_bits(ty) as u8;
|
1566
|
-
let ext = M::get_ext_mode(sigs[self.sig].call_conv, extension);
|
1567
|
-
let vreg = match (ext, from_bits) {
|
1568
|
-
(ir::ArgumentExtension::Uext, n)
|
1569
|
-
| (ir::ArgumentExtension::Sext, n)
|
1570
|
-
if n < word_bits =>
|
1571
|
-
{
|
1572
|
-
let signed = ext == ir::ArgumentExtension::Sext;
|
1573
|
-
let dst =
|
1574
|
-
writable_value_regs(vregs.alloc_with_deferred_error(ty))
|
1575
|
-
.only_reg()
|
1576
|
-
.unwrap();
|
1577
|
-
ret.push(M::gen_extend(
|
1578
|
-
dst, from_reg, signed, from_bits,
|
1579
|
-
/* to_bits = */ word_bits,
|
1580
|
-
));
|
1581
|
-
dst.to_reg()
|
1582
|
-
}
|
1583
|
-
_ => {
|
1584
|
-
// No move needed, regalloc2 will emit it using the constraint
|
1585
|
-
// added by the RetPair.
|
1586
|
-
from_reg
|
1587
|
-
}
|
1588
|
-
};
|
1589
|
-
reg_pairs.push(RetPair {
|
1590
|
-
vreg,
|
1591
|
-
preg: Reg::from(reg),
|
1592
|
-
});
|
1593
|
-
}
|
1594
|
-
&ABIArgSlot::Stack {
|
1595
|
-
offset,
|
1596
|
-
ty,
|
1597
|
-
extension,
|
1598
|
-
..
|
1599
|
-
} => {
|
1600
|
-
let mut ty = ty;
|
1601
|
-
let from_bits = ty_bits(ty) as u8;
|
1602
|
-
// A machine ABI implementation should ensure that stack frames
|
1603
|
-
// have "reasonable" size. All current ABIs for machinst
|
1604
|
-
// backends (aarch64 and x64) enforce a 128MB limit.
|
1605
|
-
let off = i32::try_from(offset).expect(
|
1606
|
-
"Argument stack offset greater than 2GB; should hit impl limit first",
|
1607
|
-
);
|
1608
|
-
let ext = M::get_ext_mode(sigs[self.sig].call_conv, extension);
|
1609
|
-
// Trash the from_reg; it should be its last use.
|
1610
|
-
match (ext, from_bits) {
|
1611
|
-
(ir::ArgumentExtension::Uext, n)
|
1612
|
-
| (ir::ArgumentExtension::Sext, n)
|
1613
|
-
if n < word_bits =>
|
1614
|
-
{
|
1615
|
-
assert_eq!(M::word_reg_class(), from_reg.class());
|
1616
|
-
let signed = ext == ir::ArgumentExtension::Sext;
|
1617
|
-
let dst =
|
1618
|
-
writable_value_regs(vregs.alloc_with_deferred_error(ty))
|
1619
|
-
.only_reg()
|
1620
|
-
.unwrap();
|
1621
|
-
ret.push(M::gen_extend(
|
1622
|
-
dst, from_reg, signed, from_bits,
|
1623
|
-
/* to_bits = */ word_bits,
|
1624
|
-
));
|
1625
|
-
// Store the extended version.
|
1626
|
-
ty = M::word_type();
|
1627
|
-
}
|
1628
|
-
_ => {}
|
1629
|
-
};
|
1630
|
-
ret.push(M::gen_store_base_offset(
|
1631
|
-
self.ret_area_ptr.unwrap().to_reg(),
|
1632
|
-
off,
|
1633
|
-
from_reg,
|
1634
|
-
ty,
|
1635
|
-
));
|
1636
|
-
}
|
1637
|
-
}
|
1638
|
-
}
|
1639
|
-
}
|
1640
|
-
ABIArg::StructArg { .. } => {
|
1641
|
-
panic!("StructArg in return position is unsupported");
|
1642
|
-
}
|
1643
|
-
ABIArg::ImplicitPtrArg { .. } => {
|
1644
|
-
panic!("ImplicitPtrArg in return position is unsupported");
|
1645
|
-
}
|
1646
|
-
}
|
1647
|
-
(reg_pairs, ret)
|
1648
|
-
}
|
1649
|
-
|
1650
|
-
/// Generate any setup instruction needed to save values to the
|
1651
|
-
/// return-value area. This is usually used when were are multiple return
|
1652
|
-
/// values or an otherwise large return value that must be passed on the
|
1653
|
-
/// stack; typically the ABI specifies an extra hidden argument that is a
|
1654
|
-
/// pointer to that memory.
|
1655
|
-
pub fn gen_retval_area_setup(
|
1656
|
-
&mut self,
|
1657
|
-
sigs: &SigSet,
|
1658
|
-
vregs: &mut VRegAllocator<M::I>,
|
1659
|
-
) -> Option<M::I> {
|
1660
|
-
if let Some(i) = sigs[self.sig].stack_ret_arg {
|
1661
|
-
let insts = self.gen_copy_arg_to_regs(
|
1662
|
-
sigs,
|
1663
|
-
i.into(),
|
1664
|
-
ValueRegs::one(self.ret_area_ptr.unwrap()),
|
1665
|
-
vregs,
|
1666
|
-
);
|
1667
|
-
insts.into_iter().next().map(|inst| {
|
1668
|
-
trace!(
|
1669
|
-
"gen_retval_area_setup: inst {:?}; ptr reg is {:?}",
|
1670
|
-
inst,
|
1671
|
-
self.ret_area_ptr.unwrap().to_reg()
|
1672
|
-
);
|
1673
|
-
inst
|
1674
|
-
})
|
1675
|
-
} else {
|
1676
|
-
trace!("gen_retval_area_setup: not needed");
|
1677
|
-
None
|
1678
|
-
}
|
1679
|
-
}
|
1680
|
-
|
1681
|
-
/// Generate a return instruction.
|
1682
|
-
pub fn gen_rets(&self, rets: Vec<RetPair>) -> M::I {
|
1683
|
-
M::gen_rets(rets)
|
1684
|
-
}
|
1685
|
-
|
1686
|
-
/// Produce an instruction that computes a sized stackslot address.
|
1687
|
-
pub fn sized_stackslot_addr(
|
1688
|
-
&self,
|
1689
|
-
slot: StackSlot,
|
1690
|
-
offset: u32,
|
1691
|
-
into_reg: Writable<Reg>,
|
1692
|
-
) -> M::I {
|
1693
|
-
// Offset from beginning of stackslot area, which is at nominal SP (see
|
1694
|
-
// [MemArg::NominalSPOffset] for more details on nominal SP tracking).
|
1695
|
-
let stack_off = self.sized_stackslots[slot] as i64;
|
1696
|
-
let sp_off: i64 = stack_off + (offset as i64);
|
1697
|
-
M::gen_get_stack_addr(StackAMode::NominalSPOffset(sp_off, I8), into_reg, I8)
|
1698
|
-
}
|
1699
|
-
|
1700
|
-
/// Produce an instruction that computes a dynamic stackslot address.
|
1701
|
-
pub fn dynamic_stackslot_addr(&self, slot: DynamicStackSlot, into_reg: Writable<Reg>) -> M::I {
|
1702
|
-
let stack_off = self.dynamic_stackslots[slot] as i64;
|
1703
|
-
M::gen_get_stack_addr(
|
1704
|
-
StackAMode::NominalSPOffset(stack_off, I64X2XN),
|
1705
|
-
into_reg,
|
1706
|
-
I64X2XN,
|
1707
|
-
)
|
1708
|
-
}
|
1709
|
-
|
1710
|
-
/// Get an `args` pseudo-inst, if any, that should appear at the
|
1711
|
-
/// very top of the function body prior to regalloc.
|
1712
|
-
pub fn take_args(&mut self) -> Option<M::I> {
|
1713
|
-
if self.reg_args.len() > 0 {
|
1714
|
-
// Very first instruction is an `args` pseudo-inst that
|
1715
|
-
// establishes live-ranges for in-register arguments and
|
1716
|
-
// constrains them at the start of the function to the
|
1717
|
-
// locations defined by the ABI.
|
1718
|
-
Some(M::gen_args(std::mem::take(&mut self.reg_args)))
|
1719
|
-
} else {
|
1720
|
-
None
|
1721
|
-
}
|
1722
|
-
}
|
1723
|
-
}
|
1724
|
-
|
1725
|
-
/// ### Post-Regalloc Functions
|
1726
|
-
///
|
1727
|
-
/// These methods of `Callee` may only be called after
|
1728
|
-
/// regalloc.
|
1729
|
-
impl<M: ABIMachineSpec> Callee<M> {
|
1730
|
-
/// Update with the number of spillslots, post-regalloc.
|
1731
|
-
pub fn set_num_spillslots(&mut self, slots: usize) {
|
1732
|
-
self.spillslots = Some(slots);
|
1733
|
-
}
|
1734
|
-
|
1735
|
-
/// Update with the clobbered registers, post-regalloc.
|
1736
|
-
pub fn set_clobbered(&mut self, clobbered: Vec<Writable<RealReg>>) {
|
1737
|
-
self.clobbered = clobbered;
|
1738
|
-
}
|
1739
|
-
|
1740
|
-
/// Generate a stack map, given a list of spillslots and the emission state
|
1741
|
-
/// at a given program point (prior to emission of the safepointing
|
1742
|
-
/// instruction).
|
1743
|
-
pub fn spillslots_to_stack_map(
|
1744
|
-
&self,
|
1745
|
-
slots: &[SpillSlot],
|
1746
|
-
state: &<M::I as MachInstEmit>::State,
|
1747
|
-
) -> StackMap {
|
1748
|
-
let virtual_sp_offset = M::get_virtual_sp_offset_from_state(state);
|
1749
|
-
let nominal_sp_to_fp = M::get_nominal_sp_to_fp(state);
|
1750
|
-
assert!(virtual_sp_offset >= 0);
|
1751
|
-
trace!(
|
1752
|
-
"spillslots_to_stackmap: slots = {:?}, state = {:?}",
|
1753
|
-
slots,
|
1754
|
-
state
|
1755
|
-
);
|
1756
|
-
let map_size = (virtual_sp_offset + nominal_sp_to_fp) as u32;
|
1757
|
-
let bytes = M::word_bytes();
|
1758
|
-
let map_words = (map_size + bytes - 1) / bytes;
|
1759
|
-
let mut bits = std::iter::repeat(false)
|
1760
|
-
.take(map_words as usize)
|
1761
|
-
.collect::<Vec<bool>>();
|
1762
|
-
|
1763
|
-
let first_spillslot_word =
|
1764
|
-
((self.stackslots_size + virtual_sp_offset as u32) / bytes) as usize;
|
1765
|
-
for &slot in slots {
|
1766
|
-
let slot = slot.index();
|
1767
|
-
bits[first_spillslot_word + slot] = true;
|
1768
|
-
}
|
1769
|
-
|
1770
|
-
StackMap::from_slice(&bits[..])
|
1771
|
-
}
|
1772
|
-
|
1773
|
-
/// Compute the final frame layout, post-regalloc.
|
1774
|
-
///
|
1775
|
-
/// This must be called before gen_prologue or gen_epilogue.
|
1776
|
-
pub fn compute_frame_layout(&mut self, sigs: &SigSet) {
|
1777
|
-
let bytes = M::word_bytes();
|
1778
|
-
let total_stacksize = self.stackslots_size + bytes * self.spillslots.unwrap() as u32;
|
1779
|
-
let mask = M::stack_align(self.call_conv) - 1;
|
1780
|
-
let total_stacksize = (total_stacksize + mask) & !mask; // 16-align the stack.
|
1781
|
-
self.frame_layout = Some(M::compute_frame_layout(
|
1782
|
-
self.call_conv,
|
1783
|
-
&self.flags,
|
1784
|
-
self.signature(),
|
1785
|
-
&self.clobbered,
|
1786
|
-
self.is_leaf,
|
1787
|
-
self.stack_args_size(sigs),
|
1788
|
-
total_stacksize,
|
1789
|
-
self.outgoing_args_size,
|
1790
|
-
));
|
1791
|
-
}
|
1792
|
-
|
1793
|
-
/// Generate a prologue, post-regalloc.
|
1794
|
-
///
|
1795
|
-
/// This should include any stack frame or other setup necessary to use the
|
1796
|
-
/// other methods (`load_arg`, `store_retval`, and spillslot accesses.)
|
1797
|
-
pub fn gen_prologue(&self) -> SmallInstVec<M::I> {
|
1798
|
-
let frame_layout = self.frame_layout();
|
1799
|
-
let mut insts = smallvec![];
|
1800
|
-
|
1801
|
-
// Set up frame.
|
1802
|
-
insts.extend(M::gen_prologue_frame_setup(
|
1803
|
-
self.call_conv,
|
1804
|
-
&self.flags,
|
1805
|
-
&self.isa_flags,
|
1806
|
-
&frame_layout,
|
1807
|
-
));
|
1808
|
-
|
1809
|
-
// The stack limit check needs to cover all the stack adjustments we
|
1810
|
-
// might make, up to the next stack limit check in any function we
|
1811
|
-
// call. Since this happens after frame setup, the current function's
|
1812
|
-
// setup area needs to be accounted for in the caller's stack limit
|
1813
|
-
// check, but we need to account for any setup area that our callees
|
1814
|
-
// might need. Note that s390x may also use the outgoing args area for
|
1815
|
-
// backtrace support even in leaf functions, so that should be accounted
|
1816
|
-
// for unconditionally.
|
1817
|
-
let total_stacksize = frame_layout.clobber_size
|
1818
|
-
+ frame_layout.fixed_frame_storage_size
|
1819
|
-
+ frame_layout.outgoing_args_size
|
1820
|
-
+ if self.is_leaf {
|
1821
|
-
0
|
1822
|
-
} else {
|
1823
|
-
frame_layout.setup_area_size
|
1824
|
-
};
|
1825
|
-
|
1826
|
-
// Leaf functions with zero stack don't need a stack check if one's
|
1827
|
-
// specified, otherwise always insert the stack check.
|
1828
|
-
if total_stacksize > 0 || !self.is_leaf {
|
1829
|
-
if let Some((reg, stack_limit_load)) = &self.stack_limit {
|
1830
|
-
insts.extend(stack_limit_load.clone());
|
1831
|
-
self.insert_stack_check(*reg, total_stacksize, &mut insts);
|
1832
|
-
}
|
1833
|
-
|
1834
|
-
let needs_probestack = self
|
1835
|
-
.probestack_min_frame
|
1836
|
-
.map_or(false, |min_frame| total_stacksize >= min_frame);
|
1837
|
-
|
1838
|
-
if needs_probestack {
|
1839
|
-
match self.flags.probestack_strategy() {
|
1840
|
-
ProbestackStrategy::Inline => {
|
1841
|
-
let guard_size = 1 << self.flags.probestack_size_log2();
|
1842
|
-
M::gen_inline_probestack(
|
1843
|
-
&mut insts,
|
1844
|
-
self.call_conv,
|
1845
|
-
total_stacksize,
|
1846
|
-
guard_size,
|
1847
|
-
)
|
1848
|
-
}
|
1849
|
-
ProbestackStrategy::Outline => M::gen_probestack(&mut insts, total_stacksize),
|
1850
|
-
}
|
1851
|
-
}
|
1852
|
-
}
|
1853
|
-
|
1854
|
-
// Save clobbered registers.
|
1855
|
-
insts.extend(M::gen_clobber_save(
|
1856
|
-
self.call_conv,
|
1857
|
-
&self.flags,
|
1858
|
-
&frame_layout,
|
1859
|
-
));
|
1860
|
-
|
1861
|
-
// N.B.: "nominal SP", which we use to refer to stackslots and
|
1862
|
-
// spillslots, is defined to be equal to the stack pointer at this point
|
1863
|
-
// in the prologue.
|
1864
|
-
//
|
1865
|
-
// If we push any further data onto the stack in the function
|
1866
|
-
// body, we emit a virtual-SP adjustment meta-instruction so
|
1867
|
-
// that the nominal SP references behave as if SP were still
|
1868
|
-
// at this point. See documentation for
|
1869
|
-
// [crate::machinst::abi](this module) for more details
|
1870
|
-
// on stackframe layout and nominal SP maintenance.
|
1871
|
-
|
1872
|
-
insts
|
1873
|
-
}
|
1874
|
-
|
1875
|
-
/// Generate an epilogue, post-regalloc.
|
1876
|
-
///
|
1877
|
-
/// Note that this must generate the actual return instruction (rather than
|
1878
|
-
/// emitting this in the lowering logic), because the epilogue code comes
|
1879
|
-
/// before the return and the two are likely closely related.
|
1880
|
-
pub fn gen_epilogue(&self) -> SmallInstVec<M::I> {
|
1881
|
-
let frame_layout = self.frame_layout();
|
1882
|
-
let mut insts = smallvec![];
|
1883
|
-
|
1884
|
-
// Restore clobbered registers.
|
1885
|
-
insts.extend(M::gen_clobber_restore(
|
1886
|
-
self.call_conv,
|
1887
|
-
&self.flags,
|
1888
|
-
&frame_layout,
|
1889
|
-
));
|
1890
|
-
|
1891
|
-
// N.B.: we do *not* emit a nominal SP adjustment here, because (i) there will be no
|
1892
|
-
// references to nominal SP offsets before the return below, and (ii) the instruction
|
1893
|
-
// emission tracks running SP offset linearly (in straight-line order), not according to
|
1894
|
-
// the CFG, so early returns in the middle of function bodies would cause an incorrect
|
1895
|
-
// offset for the rest of the body.
|
1896
|
-
|
1897
|
-
// Tear down frame.
|
1898
|
-
insts.extend(M::gen_epilogue_frame_restore(
|
1899
|
-
self.call_conv,
|
1900
|
-
&self.flags,
|
1901
|
-
&self.isa_flags,
|
1902
|
-
&frame_layout,
|
1903
|
-
));
|
1904
|
-
|
1905
|
-
// And return.
|
1906
|
-
insts.extend(M::gen_return(
|
1907
|
-
self.call_conv,
|
1908
|
-
&self.isa_flags,
|
1909
|
-
&frame_layout,
|
1910
|
-
));
|
1911
|
-
|
1912
|
-
trace!("Epilogue: {:?}", insts);
|
1913
|
-
insts
|
1914
|
-
}
|
1915
|
-
|
1916
|
-
/// Return a reference to the computed frame layout information. This
|
1917
|
-
/// function will panic if it's called before [`Self::compute_frame_layout`].
|
1918
|
-
pub fn frame_layout(&self) -> &FrameLayout {
|
1919
|
-
self.frame_layout
|
1920
|
-
.as_ref()
|
1921
|
-
.expect("frame layout not computed before prologue generation")
|
1922
|
-
}
|
1923
|
-
|
1924
|
-
/// Returns the full frame size for the given function, after prologue
|
1925
|
-
/// emission has run. This comprises the spill slots and stack-storage
|
1926
|
-
/// slots as well as storage for clobbered callee-save registers, but
|
1927
|
-
/// not arguments arguments pushed at callsites within this function,
|
1928
|
-
/// or other ephemeral pushes.
|
1929
|
-
pub fn frame_size(&self) -> u32 {
|
1930
|
-
let frame_layout = self.frame_layout();
|
1931
|
-
frame_layout.clobber_size + frame_layout.fixed_frame_storage_size
|
1932
|
-
}
|
1933
|
-
|
1934
|
-
/// Returns offset from the nominal SP to caller's SP.
|
1935
|
-
pub fn nominal_sp_to_caller_sp_offset(&self) -> u32 {
|
1936
|
-
let frame_layout = self.frame_layout();
|
1937
|
-
frame_layout.clobber_size
|
1938
|
-
+ frame_layout.fixed_frame_storage_size
|
1939
|
-
+ frame_layout.setup_area_size
|
1940
|
-
}
|
1941
|
-
|
1942
|
-
/// Returns the size of arguments expected on the stack.
|
1943
|
-
pub fn stack_args_size(&self, sigs: &SigSet) -> u32 {
|
1944
|
-
sigs[self.sig].sized_stack_arg_space
|
1945
|
-
}
|
1946
|
-
|
1947
|
-
/// Get the spill-slot size.
|
1948
|
-
pub fn get_spillslot_size(&self, rc: RegClass) -> u32 {
|
1949
|
-
let max = if self.dynamic_type_sizes.len() == 0 {
|
1950
|
-
16
|
1951
|
-
} else {
|
1952
|
-
*self
|
1953
|
-
.dynamic_type_sizes
|
1954
|
-
.iter()
|
1955
|
-
.max_by(|x, y| x.1.cmp(&y.1))
|
1956
|
-
.map(|(_k, v)| v)
|
1957
|
-
.unwrap()
|
1958
|
-
};
|
1959
|
-
M::get_number_of_spillslots_for_value(rc, max, &self.isa_flags)
|
1960
|
-
}
|
1961
|
-
|
1962
|
-
/// Get the spill slot offset relative to nominal SP.
|
1963
|
-
pub fn get_spillslot_offset(&self, slot: SpillSlot) -> i64 {
|
1964
|
-
// Offset from beginning of spillslot area, which is at nominal SP + stackslots_size.
|
1965
|
-
let islot = slot.index() as i64;
|
1966
|
-
let spill_off = islot * M::word_bytes() as i64;
|
1967
|
-
let sp_off = self.stackslots_size as i64 + spill_off;
|
1968
|
-
|
1969
|
-
sp_off
|
1970
|
-
}
|
1971
|
-
|
1972
|
-
/// Generate a spill.
|
1973
|
-
pub fn gen_spill(&self, to_slot: SpillSlot, from_reg: RealReg) -> M::I {
|
1974
|
-
let ty = M::I::canonical_type_for_rc(from_reg.class());
|
1975
|
-
debug_assert_eq!(<M>::I::rc_for_type(ty).unwrap().1, &[ty]);
|
1976
|
-
|
1977
|
-
let sp_off = self.get_spillslot_offset(to_slot);
|
1978
|
-
trace!("gen_spill: {from_reg:?} into slot {to_slot:?} at offset {sp_off}");
|
1979
|
-
|
1980
|
-
let from = StackAMode::NominalSPOffset(sp_off, ty);
|
1981
|
-
<M>::gen_store_stack(from, Reg::from(from_reg), ty)
|
1982
|
-
}
|
1983
|
-
|
1984
|
-
/// Generate a reload (fill).
|
1985
|
-
pub fn gen_reload(&self, to_reg: Writable<RealReg>, from_slot: SpillSlot) -> M::I {
|
1986
|
-
let ty = M::I::canonical_type_for_rc(to_reg.to_reg().class());
|
1987
|
-
debug_assert_eq!(<M>::I::rc_for_type(ty).unwrap().1, &[ty]);
|
1988
|
-
|
1989
|
-
let sp_off = self.get_spillslot_offset(from_slot);
|
1990
|
-
trace!("gen_reload: {to_reg:?} from slot {from_slot:?} at offset {sp_off}");
|
1991
|
-
|
1992
|
-
let from = StackAMode::NominalSPOffset(sp_off, ty);
|
1993
|
-
<M>::gen_load_stack(from, to_reg.map(Reg::from), ty)
|
1994
|
-
}
|
1995
|
-
}
|
1996
|
-
|
1997
|
-
/// The register or stack slot location of an argument.
|
1998
|
-
#[derive(Clone, Debug)]
|
1999
|
-
pub enum ArgLoc {
|
2000
|
-
/// The physical register that the value will be passed through.
|
2001
|
-
Reg(PReg),
|
2002
|
-
|
2003
|
-
/// The offset into the argument area where this value will be passed. It's up to the consumer
|
2004
|
-
/// of the `ArgLoc::Stack` variant to decide how to find the argument area that the `offset`
|
2005
|
-
/// value is relative to. Depending on the abi, this may end up being relative to SP or FP, for
|
2006
|
-
/// example with a tail call where the frame is reused.
|
2007
|
-
Stack { offset: i64, ty: ir::Type },
|
2008
|
-
}
|
2009
|
-
|
2010
|
-
/// An input argument to a call instruction: the vreg that is used,
|
2011
|
-
/// and the preg it is constrained to (per the ABI).
|
2012
|
-
#[derive(Clone, Debug)]
|
2013
|
-
pub struct CallArgPair {
|
2014
|
-
/// The virtual register to use for the argument.
|
2015
|
-
pub vreg: Reg,
|
2016
|
-
/// The real register into which the arg goes.
|
2017
|
-
pub preg: Reg,
|
2018
|
-
}
|
2019
|
-
|
2020
|
-
/// An output return value from a call instruction: the vreg that is
|
2021
|
-
/// defined, and the preg it is constrained to (per the ABI).
|
2022
|
-
#[derive(Clone, Debug)]
|
2023
|
-
pub struct CallRetPair {
|
2024
|
-
/// The virtual register to define from this return value.
|
2025
|
-
pub vreg: Writable<Reg>,
|
2026
|
-
/// The real register from which the return value is read.
|
2027
|
-
pub preg: Reg,
|
2028
|
-
}
|
2029
|
-
|
2030
|
-
pub type CallArgList = SmallVec<[CallArgPair; 8]>;
|
2031
|
-
pub type CallRetList = SmallVec<[CallRetPair; 8]>;
|
2032
|
-
|
2033
|
-
/// ABI object for a callsite.
|
2034
|
-
pub struct CallSite<M: ABIMachineSpec> {
|
2035
|
-
/// The called function's signature.
|
2036
|
-
sig: Sig,
|
2037
|
-
/// All register uses for the callsite, i.e., function args, with
|
2038
|
-
/// VReg and the physical register it is constrained to.
|
2039
|
-
uses: CallArgList,
|
2040
|
-
/// All defs for the callsite, i.e., return values.
|
2041
|
-
defs: CallRetList,
|
2042
|
-
/// Caller-save clobbers.
|
2043
|
-
clobbers: PRegSet,
|
2044
|
-
/// Call destination.
|
2045
|
-
dest: CallDest,
|
2046
|
-
/// Actual call opcode; used to distinguish various types of calls.
|
2047
|
-
opcode: ir::Opcode,
|
2048
|
-
/// Caller's calling convention.
|
2049
|
-
caller_conv: isa::CallConv,
|
2050
|
-
/// The settings controlling this compilation.
|
2051
|
-
flags: settings::Flags,
|
2052
|
-
|
2053
|
-
_mach: PhantomData<M>,
|
2054
|
-
}
|
2055
|
-
|
2056
|
-
/// Destination for a call.
|
2057
|
-
#[derive(Debug, Clone)]
|
2058
|
-
pub enum CallDest {
|
2059
|
-
/// Call to an ExtName (named function symbol).
|
2060
|
-
ExtName(ir::ExternalName, RelocDistance),
|
2061
|
-
/// Indirect call to a function pointer in a register.
|
2062
|
-
Reg(Reg),
|
2063
|
-
}
|
2064
|
-
|
2065
|
-
impl<M: ABIMachineSpec> CallSite<M> {
|
2066
|
-
/// Create a callsite ABI object for a call directly to the specified function.
|
2067
|
-
pub fn from_func(
|
2068
|
-
sigs: &SigSet,
|
2069
|
-
sig_ref: ir::SigRef,
|
2070
|
-
extname: &ir::ExternalName,
|
2071
|
-
opcode: ir::Opcode,
|
2072
|
-
dist: RelocDistance,
|
2073
|
-
caller_conv: isa::CallConv,
|
2074
|
-
flags: settings::Flags,
|
2075
|
-
) -> CallSite<M> {
|
2076
|
-
let sig = sigs.abi_sig_for_sig_ref(sig_ref);
|
2077
|
-
let clobbers = sigs.call_clobbers::<M>(sig);
|
2078
|
-
CallSite {
|
2079
|
-
sig,
|
2080
|
-
uses: smallvec![],
|
2081
|
-
defs: smallvec![],
|
2082
|
-
clobbers,
|
2083
|
-
dest: CallDest::ExtName(extname.clone(), dist),
|
2084
|
-
opcode,
|
2085
|
-
caller_conv,
|
2086
|
-
flags,
|
2087
|
-
_mach: PhantomData,
|
2088
|
-
}
|
2089
|
-
}
|
2090
|
-
|
2091
|
-
/// Create a callsite ABI object for a call directly to the specified
|
2092
|
-
/// libcall.
|
2093
|
-
pub fn from_libcall(
|
2094
|
-
sigs: &SigSet,
|
2095
|
-
sig: &ir::Signature,
|
2096
|
-
extname: &ir::ExternalName,
|
2097
|
-
dist: RelocDistance,
|
2098
|
-
caller_conv: isa::CallConv,
|
2099
|
-
flags: settings::Flags,
|
2100
|
-
) -> CallSite<M> {
|
2101
|
-
let sig = sigs.abi_sig_for_signature(sig);
|
2102
|
-
let clobbers = sigs.call_clobbers::<M>(sig);
|
2103
|
-
CallSite {
|
2104
|
-
sig,
|
2105
|
-
uses: smallvec![],
|
2106
|
-
defs: smallvec![],
|
2107
|
-
clobbers,
|
2108
|
-
dest: CallDest::ExtName(extname.clone(), dist),
|
2109
|
-
opcode: ir::Opcode::Call,
|
2110
|
-
caller_conv,
|
2111
|
-
flags,
|
2112
|
-
_mach: PhantomData,
|
2113
|
-
}
|
2114
|
-
}
|
2115
|
-
|
2116
|
-
/// Create a callsite ABI object for a call to a function pointer with the
|
2117
|
-
/// given signature.
|
2118
|
-
pub fn from_ptr(
|
2119
|
-
sigs: &SigSet,
|
2120
|
-
sig_ref: ir::SigRef,
|
2121
|
-
ptr: Reg,
|
2122
|
-
opcode: ir::Opcode,
|
2123
|
-
caller_conv: isa::CallConv,
|
2124
|
-
flags: settings::Flags,
|
2125
|
-
) -> CallSite<M> {
|
2126
|
-
let sig = sigs.abi_sig_for_sig_ref(sig_ref);
|
2127
|
-
let clobbers = sigs.call_clobbers::<M>(sig);
|
2128
|
-
CallSite {
|
2129
|
-
sig,
|
2130
|
-
uses: smallvec![],
|
2131
|
-
defs: smallvec![],
|
2132
|
-
clobbers,
|
2133
|
-
dest: CallDest::Reg(ptr),
|
2134
|
-
opcode,
|
2135
|
-
caller_conv,
|
2136
|
-
flags,
|
2137
|
-
_mach: PhantomData,
|
2138
|
-
}
|
2139
|
-
}
|
2140
|
-
|
2141
|
-
pub(crate) fn dest(&self) -> &CallDest {
|
2142
|
-
&self.dest
|
2143
|
-
}
|
2144
|
-
|
2145
|
-
pub(crate) fn opcode(&self) -> ir::Opcode {
|
2146
|
-
self.opcode
|
2147
|
-
}
|
2148
|
-
|
2149
|
-
pub(crate) fn take_uses(self) -> CallArgList {
|
2150
|
-
self.uses
|
2151
|
-
}
|
2152
|
-
|
2153
|
-
pub(crate) fn sig<'a>(&self, sigs: &'a SigSet) -> &'a SigData {
|
2154
|
-
&sigs[self.sig]
|
2155
|
-
}
|
2156
|
-
|
2157
|
-
pub(crate) fn is_tail_call(&self) -> bool {
|
2158
|
-
matches!(
|
2159
|
-
self.opcode,
|
2160
|
-
ir::Opcode::ReturnCall | ir::Opcode::ReturnCallIndirect
|
2161
|
-
)
|
2162
|
-
}
|
2163
|
-
}
|
2164
|
-
|
2165
|
-
fn adjust_stack_and_nominal_sp<M: ABIMachineSpec>(ctx: &mut Lower<M::I>, amount: i32) {
|
2166
|
-
if amount == 0 {
|
2167
|
-
return;
|
2168
|
-
}
|
2169
|
-
for inst in M::gen_sp_reg_adjust(amount) {
|
2170
|
-
ctx.emit(inst);
|
2171
|
-
}
|
2172
|
-
ctx.emit(M::gen_nominal_sp_adj(-amount));
|
2173
|
-
}
|
2174
|
-
|
2175
|
-
impl<M: ABIMachineSpec> CallSite<M> {
|
2176
|
-
/// Get the number of arguments expected.
|
2177
|
-
pub fn num_args(&self, sigs: &SigSet) -> usize {
|
2178
|
-
sigs.num_args(self.sig)
|
2179
|
-
}
|
2180
|
-
|
2181
|
-
/// Allocate space for building a `return_call`'s temporary frame before we
|
2182
|
-
/// copy it over the current frame.
|
2183
|
-
pub fn emit_allocate_tail_call_frame(&self, ctx: &mut Lower<M::I>) -> u32 {
|
2184
|
-
// The necessary stack space is:
|
2185
|
-
//
|
2186
|
-
// sizeof(callee_sig.stack_args)
|
2187
|
-
//
|
2188
|
-
// Note that any stack return space conceptually belongs to our caller
|
2189
|
-
// and the function we are tail calling to has the same return type and
|
2190
|
-
// will reuse that stack return space.
|
2191
|
-
//
|
2192
|
-
// The return address is pushed later on, after the stack arguments are
|
2193
|
-
// filled in.
|
2194
|
-
let frame_size = ctx.sigs()[self.sig].sized_stack_arg_space;
|
2195
|
-
|
2196
|
-
let adjustment = -i32::try_from(frame_size).unwrap();
|
2197
|
-
adjust_stack_and_nominal_sp::<M>(ctx, adjustment);
|
2198
|
-
|
2199
|
-
frame_size
|
2200
|
-
}
|
2201
|
-
|
2202
|
-
/// Emit code to pre-adjust the stack, prior to argument copies and call.
|
2203
|
-
pub fn emit_stack_pre_adjust(&self, ctx: &mut Lower<M::I>) {
|
2204
|
-
let sig = &ctx.sigs()[self.sig];
|
2205
|
-
let stack_space = sig.sized_stack_arg_space + sig.sized_stack_ret_space;
|
2206
|
-
let stack_space = i32::try_from(stack_space).unwrap();
|
2207
|
-
adjust_stack_and_nominal_sp::<M>(ctx, -stack_space);
|
2208
|
-
}
|
2209
|
-
|
2210
|
-
/// Emit code to post-adjust the stack, after call return and return-value copies.
|
2211
|
-
pub fn emit_stack_post_adjust(&self, ctx: &mut Lower<M::I>) {
|
2212
|
-
let sig = &ctx.sigs()[self.sig];
|
2213
|
-
|
2214
|
-
let stack_space = if sig.call_conv() == isa::CallConv::Tail {
|
2215
|
-
// The "tail" calling convention has callees clean up stack
|
2216
|
-
// arguments, not callers. Callers still clean up any stack return
|
2217
|
-
// space, however.
|
2218
|
-
sig.sized_stack_ret_space
|
2219
|
-
} else {
|
2220
|
-
sig.sized_stack_arg_space + sig.sized_stack_ret_space
|
2221
|
-
};
|
2222
|
-
let stack_space = i32::try_from(stack_space).unwrap();
|
2223
|
-
|
2224
|
-
adjust_stack_and_nominal_sp::<M>(ctx, stack_space);
|
2225
|
-
}
|
2226
|
-
|
2227
|
-
/// Emit a copy of a large argument into its associated stack buffer, if
|
2228
|
-
/// any. We must be careful to perform all these copies (as necessary)
|
2229
|
-
/// before setting up the argument registers, since we may have to invoke
|
2230
|
-
/// memcpy(), which could clobber any registers already set up. The
|
2231
|
-
/// back-end should call this routine for all arguments before calling
|
2232
|
-
/// `gen_arg` for all arguments.
|
2233
|
-
pub fn emit_copy_regs_to_buffer(
|
2234
|
-
&self,
|
2235
|
-
ctx: &mut Lower<M::I>,
|
2236
|
-
idx: usize,
|
2237
|
-
from_regs: ValueRegs<Reg>,
|
2238
|
-
) {
|
2239
|
-
match &ctx.sigs().args(self.sig)[idx] {
|
2240
|
-
&ABIArg::Slots { .. } | &ABIArg::ImplicitPtrArg { .. } => {}
|
2241
|
-
&ABIArg::StructArg { offset, size, .. } => {
|
2242
|
-
let src_ptr = from_regs.only_reg().unwrap();
|
2243
|
-
let dst_ptr = ctx.alloc_tmp(M::word_type()).only_reg().unwrap();
|
2244
|
-
ctx.emit(M::gen_get_stack_addr(
|
2245
|
-
StackAMode::SPOffset(offset, I8),
|
2246
|
-
dst_ptr,
|
2247
|
-
I8,
|
2248
|
-
));
|
2249
|
-
// Emit a memcpy from `src_ptr` to `dst_ptr` of `size` bytes.
|
2250
|
-
// N.B.: because we process StructArg params *first*, this is
|
2251
|
-
// safe w.r.t. clobbers: we have not yet filled in any other
|
2252
|
-
// arg regs.
|
2253
|
-
let memcpy_call_conv =
|
2254
|
-
isa::CallConv::for_libcall(&self.flags, ctx.sigs()[self.sig].call_conv);
|
2255
|
-
for insn in M::gen_memcpy(
|
2256
|
-
memcpy_call_conv,
|
2257
|
-
dst_ptr.to_reg(),
|
2258
|
-
src_ptr,
|
2259
|
-
size as usize,
|
2260
|
-
|ty| ctx.alloc_tmp(ty).only_reg().unwrap(),
|
2261
|
-
)
|
2262
|
-
.into_iter()
|
2263
|
-
{
|
2264
|
-
ctx.emit(insn);
|
2265
|
-
}
|
2266
|
-
}
|
2267
|
-
}
|
2268
|
-
}
|
2269
|
-
|
2270
|
-
/// Emit moves or uses for the moves list generated by [`Self::gen_arg`].
|
2271
|
-
pub fn emit_arg_moves(&mut self, ctx: &mut Lower<M::I>, moves: SmallVec<[(VReg, ArgLoc); 2]>) {
|
2272
|
-
for (vreg, loc) in moves {
|
2273
|
-
let vreg = vreg.into();
|
2274
|
-
match loc {
|
2275
|
-
ArgLoc::Reg(preg) => self.uses.push(CallArgPair {
|
2276
|
-
vreg,
|
2277
|
-
preg: preg.into(),
|
2278
|
-
}),
|
2279
|
-
ArgLoc::Stack { offset, ty } => {
|
2280
|
-
let amode = if self.is_tail_call() {
|
2281
|
-
assert!(
|
2282
|
-
self.flags.preserve_frame_pointers(),
|
2283
|
-
"tail calls require frame pointers to be enabled"
|
2284
|
-
);
|
2285
|
-
|
2286
|
-
StackAMode::ArgOffset(offset, ty)
|
2287
|
-
} else {
|
2288
|
-
StackAMode::SPOffset(offset, ty)
|
2289
|
-
};
|
2290
|
-
ctx.emit(M::gen_store_stack(amode, vreg, ty))
|
2291
|
-
}
|
2292
|
-
}
|
2293
|
-
}
|
2294
|
-
}
|
2295
|
-
|
2296
|
-
/// Add a constraint for an argument value from a source register.
|
2297
|
-
/// For large arguments with associated stack buffer, this may
|
2298
|
-
/// load the address of the buffer into the argument register, if
|
2299
|
-
/// required by the ABI.
|
2300
|
-
pub fn gen_arg(
|
2301
|
-
&mut self,
|
2302
|
-
ctx: &mut Lower<M::I>,
|
2303
|
-
idx: usize,
|
2304
|
-
from_regs: ValueRegs<Reg>,
|
2305
|
-
) -> SmallVec<[(VReg, ArgLoc); 2]> {
|
2306
|
-
let mut locs = smallvec![];
|
2307
|
-
let word_rc = M::word_reg_class();
|
2308
|
-
let word_bits = M::word_bits() as usize;
|
2309
|
-
|
2310
|
-
match ctx.sigs().args(self.sig)[idx].clone() {
|
2311
|
-
ABIArg::Slots { ref slots, .. } => {
|
2312
|
-
assert_eq!(from_regs.len(), slots.len());
|
2313
|
-
for (slot, from_reg) in slots.iter().zip(from_regs.regs().iter()) {
|
2314
|
-
match slot {
|
2315
|
-
&ABIArgSlot::Reg {
|
2316
|
-
reg, ty, extension, ..
|
2317
|
-
} => {
|
2318
|
-
let ext = M::get_ext_mode(ctx.sigs()[self.sig].call_conv, extension);
|
2319
|
-
if ext != ir::ArgumentExtension::None && ty_bits(ty) < word_bits {
|
2320
|
-
assert_eq!(word_rc, reg.class());
|
2321
|
-
let signed = match ext {
|
2322
|
-
ir::ArgumentExtension::Uext => false,
|
2323
|
-
ir::ArgumentExtension::Sext => true,
|
2324
|
-
_ => unreachable!(),
|
2325
|
-
};
|
2326
|
-
let extend_result =
|
2327
|
-
ctx.alloc_tmp(M::word_type()).only_reg().unwrap();
|
2328
|
-
ctx.emit(M::gen_extend(
|
2329
|
-
extend_result,
|
2330
|
-
*from_reg,
|
2331
|
-
signed,
|
2332
|
-
ty_bits(ty) as u8,
|
2333
|
-
word_bits as u8,
|
2334
|
-
));
|
2335
|
-
locs.push((extend_result.to_reg().into(), ArgLoc::Reg(reg.into())));
|
2336
|
-
} else if ty.is_ref() {
|
2337
|
-
// Reference-typed args need to be
|
2338
|
-
// passed as a copy; the original vreg
|
2339
|
-
// is constrained to the stack and
|
2340
|
-
// this copy is in a reg.
|
2341
|
-
let ref_copy = ctx.alloc_tmp(M::word_type()).only_reg().unwrap();
|
2342
|
-
ctx.emit(M::gen_move(ref_copy, *from_reg, M::word_type()));
|
2343
|
-
|
2344
|
-
locs.push((ref_copy.to_reg().into(), ArgLoc::Reg(reg.into())));
|
2345
|
-
} else {
|
2346
|
-
locs.push((from_reg.into(), ArgLoc::Reg(reg.into())));
|
2347
|
-
}
|
2348
|
-
}
|
2349
|
-
&ABIArgSlot::Stack {
|
2350
|
-
offset,
|
2351
|
-
ty,
|
2352
|
-
extension,
|
2353
|
-
..
|
2354
|
-
} => {
|
2355
|
-
let ext = M::get_ext_mode(ctx.sigs()[self.sig].call_conv, extension);
|
2356
|
-
let (data, ty) =
|
2357
|
-
if ext != ir::ArgumentExtension::None && ty_bits(ty) < word_bits {
|
2358
|
-
assert_eq!(word_rc, from_reg.class());
|
2359
|
-
let signed = match ext {
|
2360
|
-
ir::ArgumentExtension::Uext => false,
|
2361
|
-
ir::ArgumentExtension::Sext => true,
|
2362
|
-
_ => unreachable!(),
|
2363
|
-
};
|
2364
|
-
let extend_result =
|
2365
|
-
ctx.alloc_tmp(M::word_type()).only_reg().unwrap();
|
2366
|
-
ctx.emit(M::gen_extend(
|
2367
|
-
extend_result,
|
2368
|
-
*from_reg,
|
2369
|
-
signed,
|
2370
|
-
ty_bits(ty) as u8,
|
2371
|
-
word_bits as u8,
|
2372
|
-
));
|
2373
|
-
// Store the extended version.
|
2374
|
-
(extend_result.to_reg(), M::word_type())
|
2375
|
-
} else {
|
2376
|
-
(*from_reg, ty)
|
2377
|
-
};
|
2378
|
-
locs.push((data.into(), ArgLoc::Stack { offset, ty }));
|
2379
|
-
}
|
2380
|
-
}
|
2381
|
-
}
|
2382
|
-
}
|
2383
|
-
ABIArg::StructArg { pointer, .. } => {
|
2384
|
-
assert!(pointer.is_none()); // Only supported via ISLE.
|
2385
|
-
}
|
2386
|
-
ABIArg::ImplicitPtrArg {
|
2387
|
-
offset,
|
2388
|
-
pointer,
|
2389
|
-
ty,
|
2390
|
-
purpose: _,
|
2391
|
-
} => {
|
2392
|
-
assert_eq!(from_regs.len(), 1);
|
2393
|
-
let vreg = from_regs.regs()[0];
|
2394
|
-
let amode = StackAMode::SPOffset(offset, ty);
|
2395
|
-
let tmp = ctx.alloc_tmp(M::word_type()).only_reg().unwrap();
|
2396
|
-
ctx.emit(M::gen_get_stack_addr(amode, tmp, ty));
|
2397
|
-
let tmp = tmp.to_reg();
|
2398
|
-
ctx.emit(M::gen_store_base_offset(tmp, 0, vreg, ty));
|
2399
|
-
let loc = match pointer {
|
2400
|
-
ABIArgSlot::Reg { reg, .. } => ArgLoc::Reg(reg.into()),
|
2401
|
-
ABIArgSlot::Stack { offset, .. } => {
|
2402
|
-
let ty = M::word_type();
|
2403
|
-
ArgLoc::Stack { offset, ty }
|
2404
|
-
}
|
2405
|
-
};
|
2406
|
-
locs.push((tmp.into(), loc));
|
2407
|
-
}
|
2408
|
-
}
|
2409
|
-
|
2410
|
-
locs
|
2411
|
-
}
|
2412
|
-
|
2413
|
-
/// Call `gen_arg` for each non-hidden argument and emit all instructions
|
2414
|
-
/// generated.
|
2415
|
-
pub fn emit_args(&mut self, ctx: &mut Lower<M::I>, (inputs, off): isle::ValueSlice) {
|
2416
|
-
let num_args = self.num_args(ctx.sigs());
|
2417
|
-
assert_eq!(inputs.len(&ctx.dfg().value_lists) - off, num_args);
|
2418
|
-
|
2419
|
-
let mut arg_value_regs: SmallVec<[_; 16]> = smallvec![];
|
2420
|
-
for i in 0..num_args {
|
2421
|
-
let input = inputs.get(off + i, &ctx.dfg().value_lists).unwrap();
|
2422
|
-
arg_value_regs.push(ctx.put_value_in_regs(input));
|
2423
|
-
}
|
2424
|
-
for (i, arg_regs) in arg_value_regs.iter().enumerate() {
|
2425
|
-
self.emit_copy_regs_to_buffer(ctx, i, *arg_regs);
|
2426
|
-
}
|
2427
|
-
for (i, value_regs) in arg_value_regs.iter().enumerate() {
|
2428
|
-
let moves = self.gen_arg(ctx, i, *value_regs);
|
2429
|
-
self.emit_arg_moves(ctx, moves);
|
2430
|
-
}
|
2431
|
-
}
|
2432
|
-
|
2433
|
-
/// Emit the code to forward a stack-return pointer argument through a tail
|
2434
|
-
/// call.
|
2435
|
-
pub fn emit_stack_ret_arg_for_tail_call(&mut self, ctx: &mut Lower<M::I>) {
|
2436
|
-
if let Some(i) = ctx.sigs()[self.sig].stack_ret_arg() {
|
2437
|
-
let ret_area_ptr = ctx.abi().ret_area_ptr.expect(
|
2438
|
-
"if the tail callee has a return pointer, then the tail caller \
|
2439
|
-
must as well",
|
2440
|
-
);
|
2441
|
-
let moves = self.gen_arg(ctx, i.into(), ValueRegs::one(ret_area_ptr.to_reg()));
|
2442
|
-
self.emit_arg_moves(ctx, moves);
|
2443
|
-
}
|
2444
|
-
}
|
2445
|
-
|
2446
|
-
/// Builds a new temporary callee frame for the tail call and puts arguments into
|
2447
|
-
/// registers and stack slots (within the new temporary frame).
|
2448
|
-
///
|
2449
|
-
/// It is the caller's responsibility to move the temporary callee frame on
|
2450
|
-
/// top of the current caller frame before performing the actual tail call.
|
2451
|
-
///
|
2452
|
-
/// Returns a pair of the old caller's stack argument size and the new
|
2453
|
-
/// callee's stack argument size.
|
2454
|
-
pub fn emit_temporary_tail_call_frame(
|
2455
|
-
&mut self,
|
2456
|
-
ctx: &mut Lower<M::I>,
|
2457
|
-
args: isle::ValueSlice,
|
2458
|
-
) -> (u32, u32) {
|
2459
|
-
// Allocate additional stack space for the new stack frame. We will
|
2460
|
-
// build it in the newly allocated space, but then copy it over our
|
2461
|
-
// current frame at the last moment.
|
2462
|
-
let new_stack_arg_size = self.emit_allocate_tail_call_frame(ctx);
|
2463
|
-
let old_stack_arg_size = ctx.abi().stack_args_size(ctx.sigs());
|
2464
|
-
|
2465
|
-
// Put all arguments in registers and stack slots (within that newly
|
2466
|
-
// allocated stack space).
|
2467
|
-
self.emit_args(ctx, args);
|
2468
|
-
self.emit_stack_ret_arg_for_tail_call(ctx);
|
2469
|
-
|
2470
|
-
(new_stack_arg_size, old_stack_arg_size)
|
2471
|
-
}
|
2472
|
-
|
2473
|
-
/// Define a return value after the call returns.
|
2474
|
-
pub fn gen_retval(
|
2475
|
-
&mut self,
|
2476
|
-
ctx: &Lower<M::I>,
|
2477
|
-
idx: usize,
|
2478
|
-
into_regs: ValueRegs<Writable<Reg>>,
|
2479
|
-
) -> SmallInstVec<M::I> {
|
2480
|
-
let mut insts = smallvec![];
|
2481
|
-
match &ctx.sigs().rets(self.sig)[idx] {
|
2482
|
-
&ABIArg::Slots { ref slots, .. } => {
|
2483
|
-
assert_eq!(into_regs.len(), slots.len());
|
2484
|
-
for (slot, into_reg) in slots.iter().zip(into_regs.regs().iter()) {
|
2485
|
-
match slot {
|
2486
|
-
// Extension mode doesn't matter because we're copying out, not in,
|
2487
|
-
// and we ignore high bits in our own registers by convention.
|
2488
|
-
&ABIArgSlot::Reg { reg, .. } => {
|
2489
|
-
self.defs.push(CallRetPair {
|
2490
|
-
vreg: *into_reg,
|
2491
|
-
preg: reg.into(),
|
2492
|
-
});
|
2493
|
-
}
|
2494
|
-
&ABIArgSlot::Stack { offset, ty, .. } => {
|
2495
|
-
let sig_data = &ctx.sigs()[self.sig];
|
2496
|
-
let ret_area_base = if sig_data.call_conv() == isa::CallConv::Tail {
|
2497
|
-
// The callee already popped the stack argument
|
2498
|
-
// space for us, so the return area is on top of
|
2499
|
-
// the stack.
|
2500
|
-
0
|
2501
|
-
} else {
|
2502
|
-
// The return area is just below the stack
|
2503
|
-
// argument area on the stack.
|
2504
|
-
sig_data.sized_stack_arg_space()
|
2505
|
-
};
|
2506
|
-
insts.push(M::gen_load_stack(
|
2507
|
-
StackAMode::SPOffset(offset + ret_area_base, ty),
|
2508
|
-
*into_reg,
|
2509
|
-
ty,
|
2510
|
-
));
|
2511
|
-
}
|
2512
|
-
}
|
2513
|
-
}
|
2514
|
-
}
|
2515
|
-
&ABIArg::StructArg { .. } => {
|
2516
|
-
panic!("StructArg not supported in return position");
|
2517
|
-
}
|
2518
|
-
&ABIArg::ImplicitPtrArg { .. } => {
|
2519
|
-
panic!("ImplicitPtrArg not supported in return position");
|
2520
|
-
}
|
2521
|
-
}
|
2522
|
-
insts
|
2523
|
-
}
|
2524
|
-
|
2525
|
-
/// Emit the call itself.
|
2526
|
-
///
|
2527
|
-
/// The returned instruction should have proper use- and def-sets according
|
2528
|
-
/// to the argument registers, return-value registers, and clobbered
|
2529
|
-
/// registers for this function signature in this ABI.
|
2530
|
-
///
|
2531
|
-
/// (Arg registers are uses, and retval registers are defs. Clobbered
|
2532
|
-
/// registers are also logically defs, but should never be read; their
|
2533
|
-
/// values are "defined" (to the regalloc) but "undefined" in every other
|
2534
|
-
/// sense.)
|
2535
|
-
///
|
2536
|
-
/// This function should only be called once, as it is allowed to re-use
|
2537
|
-
/// parts of the `CallSite` object in emitting instructions.
|
2538
|
-
pub fn emit_call(&mut self, ctx: &mut Lower<M::I>) {
|
2539
|
-
let word_type = M::word_type();
|
2540
|
-
if let Some(i) = ctx.sigs()[self.sig].stack_ret_arg {
|
2541
|
-
let rd = ctx.alloc_tmp(word_type).only_reg().unwrap();
|
2542
|
-
let ret_area_base = ctx.sigs()[self.sig].sized_stack_arg_space();
|
2543
|
-
ctx.emit(M::gen_get_stack_addr(
|
2544
|
-
StackAMode::SPOffset(ret_area_base, I8),
|
2545
|
-
rd,
|
2546
|
-
I8,
|
2547
|
-
));
|
2548
|
-
let moves = self.gen_arg(ctx, i.into(), ValueRegs::one(rd.to_reg()));
|
2549
|
-
self.emit_arg_moves(ctx, moves);
|
2550
|
-
}
|
2551
|
-
|
2552
|
-
let (uses, defs) = (
|
2553
|
-
mem::replace(&mut self.uses, Default::default()),
|
2554
|
-
mem::replace(&mut self.defs, Default::default()),
|
2555
|
-
);
|
2556
|
-
|
2557
|
-
let sig = &ctx.sigs()[self.sig];
|
2558
|
-
let callee_pop_size = if sig.call_conv() == isa::CallConv::Tail {
|
2559
|
-
// The tail calling convention has callees pop stack arguments.
|
2560
|
-
sig.sized_stack_arg_space
|
2561
|
-
} else {
|
2562
|
-
0
|
2563
|
-
};
|
2564
|
-
|
2565
|
-
let tmp = ctx.alloc_tmp(word_type).only_reg().unwrap();
|
2566
|
-
for inst in M::gen_call(
|
2567
|
-
&self.dest,
|
2568
|
-
uses,
|
2569
|
-
defs,
|
2570
|
-
self.clobbers,
|
2571
|
-
self.opcode,
|
2572
|
-
tmp,
|
2573
|
-
ctx.sigs()[self.sig].call_conv,
|
2574
|
-
self.caller_conv,
|
2575
|
-
callee_pop_size,
|
2576
|
-
)
|
2577
|
-
.into_iter()
|
2578
|
-
{
|
2579
|
-
ctx.emit(inst);
|
2580
|
-
}
|
2581
|
-
}
|
2582
|
-
}
|
2583
|
-
|
2584
|
-
#[cfg(test)]
|
2585
|
-
mod tests {
|
2586
|
-
use super::SigData;
|
2587
|
-
|
2588
|
-
#[test]
|
2589
|
-
fn sig_data_size() {
|
2590
|
-
// The size of `SigData` is performance sensitive, so make sure
|
2591
|
-
// we don't regress it unintentionally.
|
2592
|
-
assert_eq!(std::mem::size_of::<SigData>(), 24);
|
2593
|
-
}
|
2594
|
-
}
|