wasmtime 20.0.2 → 21.0.1
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- checksums.yaml +4 -4
- data/Cargo.lock +129 -124
- data/ext/Cargo.toml +8 -6
- data/ext/cargo-vendor/cobs-0.2.3/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cobs-0.2.3/Cargo.toml +39 -0
- data/ext/cargo-vendor/cobs-0.2.3/LICENSE-APACHE +202 -0
- data/ext/cargo-vendor/cobs-0.2.3/LICENSE-MIT +19 -0
- data/ext/cargo-vendor/cobs-0.2.3/README.md +23 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/dec.rs +360 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/enc.rs +216 -0
- data/ext/cargo-vendor/cobs-0.2.3/src/lib.rs +14 -0
- data/ext/cargo-vendor/cobs-0.2.3/tests/test.rs +265 -0
- data/ext/cargo-vendor/cranelift-bforest-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.108.1/Cargo.toml +40 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/Cargo.toml +189 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/build.rs +266 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/alias_analysis.rs +403 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/context.rs +395 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ctxhash.rs +167 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/egraph/elaborate.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/egraph.rs +839 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/incremental_cache.rs +256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ir/instructions.rs +1020 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/abi.rs +1580 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/args.rs +721 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/emit.rs +3846 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/emit_tests.rs +7902 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/imms.rs +1213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/mod.rs +3094 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst/regs.rs +288 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/inst.isle +4225 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/lower/isle.rs +810 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/aarch64/pcc.rs +568 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/mod.rs +449 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/abi.rs +1051 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/args.rs +1938 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/emit.rs +2681 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/emit_tests.rs +2197 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/mod.rs +1975 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/regs.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst/vector.rs +1144 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/inst.isle +2969 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/riscv64/lower/isle.rs +625 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/abi.rs +1037 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/args.rs +314 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/emit.rs +3646 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/imms.rs +202 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/mod.rs +3421 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/s390x/inst/regs.rs +180 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/abi.rs +1410 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/args.rs +2256 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/emit.rs +4311 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/emit_tests.rs +5171 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/mod.rs +2838 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst/regs.rs +276 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/inst.isle +5294 -0
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- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/lower.rs +337 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/isa/x64/pcc.rs +1014 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/abi.rs +2506 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/blockorder.rs +465 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/isle.rs +903 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/lower.rs +1432 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/mod.rs +555 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/reg.rs +522 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/valueregs.rs +138 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/machinst/vcode.rs +1741 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/nan_canonicalization.rs +130 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/opts/arithmetic.isle +240 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/opts/icmp.isle +215 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/ranges.rs +131 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/remove_constant_phis.rs +419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/scoped_hash_map.rs +310 -0
- data/ext/cargo-vendor/cranelift-codegen-0.108.1/src/settings.rs +590 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/Cargo.toml +35 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_inst.rs +1278 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_isle.rs +519 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_settings.rs +508 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/gen_types.rs +75 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isa/riscv64.rs +168 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isa/x86.rs +414 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/isle.rs +126 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/lib.rs +98 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/shared/settings.rs +348 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.108.1/src/srcgen.rs +464 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.108.1/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-control-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.108.1/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/Cargo.toml +52 -0
- data/ext/cargo-vendor/cranelift-entity-0.108.1/src/lib.rs +381 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/Cargo.toml +67 -0
- data/ext/cargo-vendor/cranelift-frontend-0.108.1/src/switch.rs +696 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/Cargo.toml +46 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/codegen.rs +886 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/disjointsets.rs +169 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/lib.rs +33 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/sema.rs +2492 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/serialize.rs +846 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/stablemapset.rs +79 -0
- data/ext/cargo-vendor/cranelift-isle-0.108.1/src/trie_again.rs +684 -0
- data/ext/cargo-vendor/cranelift-native-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.108.1/Cargo.toml +43 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/Cargo.toml +109 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/code_translator.rs +3687 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/environ/dummy.rs +906 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/environ/spec.rs +945 -0
- data/ext/cargo-vendor/cranelift-wasm-0.108.1/src/sections_translator.rs +389 -0
- data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.22/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.22/Cargo.toml +48 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/CHANGELOG.md +28 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/Cargo.toml +73 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/LICENSE-APACHE +201 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/LICENSE-MIT +25 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/README.md +33 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/ci.sh +21 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/rust-toolchain.toml +3 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/futures_io.rs +65 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/mod.rs +40 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/std_io.rs +107 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/adapters/tokio.rs +108 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/asynch.rs +230 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/blocking.rs +309 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/fmt.rs +228 -0
- data/ext/cargo-vendor/embedded-io-0.4.0/src/lib.rs +125 -0
- data/ext/cargo-vendor/libm-0.2.8/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/libm-0.2.8/CHANGELOG.md +123 -0
- data/ext/cargo-vendor/libm-0.2.8/CONTRIBUTING.md +95 -0
- data/ext/cargo-vendor/libm-0.2.8/Cargo.toml +45 -0
- data/ext/cargo-vendor/libm-0.2.8/LICENSE-APACHE +201 -0
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- data/ext/cargo-vendor/libm-0.2.8/README.md +51 -0
- data/ext/cargo-vendor/libm-0.2.8/build.rs +463 -0
- data/ext/cargo-vendor/libm-0.2.8/src/lib.rs +59 -0
- data/ext/cargo-vendor/libm-0.2.8/src/libm_helper.rs +171 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acos.rs +112 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acosf.rs +79 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acosh.rs +27 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/acoshf.rs +26 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asin.rs +119 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinf.rs +72 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinh.rs +40 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/asinhf.rs +39 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan.rs +184 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan2.rs +126 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atan2f.rs +91 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/atanf.rs +112 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/atanhf.rs +37 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cbrt.rs +113 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cbrtf.rs +75 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/ceil.rs +82 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/ceilf.rs +65 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/copysign.rs +12 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/copysignf.rs +12 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cos.rs +73 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cosf.rs +83 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/cosh.rs +38 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/coshf.rs +38 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/erf.rs +318 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/erff.rs +230 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/exp.rs +154 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/exp2.rs +394 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/expo2.rs +14 -0
- data/ext/cargo-vendor/libm-0.2.8/src/math/fabs.rs +41 -0
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- data/ext/cargo-vendor/libm-0.2.8/src/math/fdim.rs +22 -0
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- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/wasi.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/wasi.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-diamond.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-diamond.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-iface-no-collide.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-iface-no-collide.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import1.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import1.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import2.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import2.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import3.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-implicit-import3.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-same-fields4.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-same-fields4.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-top-level-funcs.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/world-top-level-funcs.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/worlds-union-dedup.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/worlds-union-dedup.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/worlds-with-types.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.202.0 → wit-parser-0.207.0}/tests/ui/worlds-with-types.wit.json +0 -0
@@ -0,0 +1,2144 @@
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//! This module is the central place for machine code emission.
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//! It defines an implementation of wasmparser's Visitor trait
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//! for `CodeGen`; which defines a visitor per op-code,
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//! which validates and dispatches to the corresponding
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//! machine code emitter.
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use crate::abi::RetArea;
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use crate::codegen::{control_index, Callee, CodeGen, ControlStackFrame, FnCall};
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use crate::masm::{
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DivKind, ExtendKind, FloatCmpKind, IntCmpKind, MacroAssembler, MemMoveDirection, OperandSize,
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RegImm, RemKind, RoundingMode, SPOffset, ShiftKind, TruncKind,
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};
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use crate::reg::Reg;
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use crate::stack::{TypedReg, Val};
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use cranelift_codegen::ir::TrapCode;
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use regalloc2::RegClass;
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use smallvec::SmallVec;
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use wasmparser::{BlockType, BrTable, Ieee32, Ieee64, MemArg, VisitOperator};
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use wasmtime_environ::{
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FuncIndex, GlobalIndex, MemoryIndex, TableIndex, TableStyle, TypeIndex, WasmHeapType,
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WasmValType, FUNCREF_INIT_BIT,
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};
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/// A macro to define unsupported WebAssembly operators.
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///
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/// This macro calls itself recursively;
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/// 1. It no-ops when matching a supported operator.
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/// 2. Defines the visitor function and panics when
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/// matching an unsupported operator.
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macro_rules! def_unsupported {
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($( @$proposal:ident $op:ident $({ $($arg:ident: $argty:ty),* })? => $visit:ident)*) => {
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$(
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def_unsupported!(
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emit
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$op
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fn $visit(&mut self $($(,$arg: $argty)*)?) -> Self::Output {
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$($(let _ = $arg;)*)?
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todo!(stringify!($op))
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}
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);
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)*
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};
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(emit I32Const $($rest:tt)*) => {};
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(emit I64Const $($rest:tt)*) => {};
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(emit F32Const $($rest:tt)*) => {};
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(emit F64Const $($rest:tt)*) => {};
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(emit F32Add $($rest:tt)*) => {};
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(emit F64Add $($rest:tt)*) => {};
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(emit F32Sub $($rest:tt)*) => {};
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(emit F64Sub $($rest:tt)*) => {};
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(emit F32Mul $($rest:tt)*) => {};
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(emit F64Mul $($rest:tt)*) => {};
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(emit F32Div $($rest:tt)*) => {};
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(emit F64Div $($rest:tt)*) => {};
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(emit F32Min $($rest:tt)*) => {};
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(emit F64Min $($rest:tt)*) => {};
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(emit F32Max $($rest:tt)*) => {};
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(emit F64Max $($rest:tt)*) => {};
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(emit F32Copysign $($rest:tt)*) => {};
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(emit F64Copysign $($rest:tt)*) => {};
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(emit F32Abs $($rest:tt)*) => {};
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(emit F64Abs $($rest:tt)*) => {};
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(emit F32Neg $($rest:tt)*) => {};
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(emit F64Neg $($rest:tt)*) => {};
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(emit F32Floor $($rest:tt)*) => {};
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(emit F64Floor $($rest:tt)*) => {};
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(emit F32Ceil $($rest:tt)*) => {};
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(emit F64Ceil $($rest:tt)*) => {};
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(emit F32Nearest $($rest:tt)*) => {};
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(emit F64Nearest $($rest:tt)*) => {};
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(emit F32Trunc $($rest:tt)*) => {};
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(emit F64Trunc $($rest:tt)*) => {};
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(emit F32Sqrt $($rest:tt)*) => {};
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(emit F64Sqrt $($rest:tt)*) => {};
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(emit F32Eq $($rest:tt)*) => {};
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(emit F64Eq $($rest:tt)*) => {};
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(emit F32Ne $($rest:tt)*) => {};
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(emit F64Ne $($rest:tt)*) => {};
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(emit F32Lt $($rest:tt)*) => {};
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(emit F64Lt $($rest:tt)*) => {};
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(emit F32Gt $($rest:tt)*) => {};
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(emit F64Gt $($rest:tt)*) => {};
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(emit F32Le $($rest:tt)*) => {};
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(emit F64Le $($rest:tt)*) => {};
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(emit F32Ge $($rest:tt)*) => {};
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(emit F64Ge $($rest:tt)*) => {};
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(emit F32ConvertI32S $($rest:tt)*) => {};
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(emit F32ConvertI32U $($rest:tt)*) => {};
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(emit F32ConvertI64S $($rest:tt)*) => {};
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(emit F32ConvertI64U $($rest:tt)*) => {};
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(emit F64ConvertI32S $($rest:tt)*) => {};
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(emit F64ConvertI32U $($rest:tt)*) => {};
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(emit F64ConvertI64S $($rest:tt)*) => {};
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(emit F64ConvertI64U $($rest:tt)*) => {};
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(emit F32ReinterpretI32 $($rest:tt)*) => {};
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(emit F64ReinterpretI64 $($rest:tt)*) => {};
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(emit F32DemoteF64 $($rest:tt)*) => {};
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(emit F64PromoteF32 $($rest:tt)*) => {};
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(emit I32Add $($rest:tt)*) => {};
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(emit I64Add $($rest:tt)*) => {};
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(emit I32Sub $($rest:tt)*) => {};
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(emit I32Mul $($rest:tt)*) => {};
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(emit I32DivS $($rest:tt)*) => {};
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(emit I32DivU $($rest:tt)*) => {};
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(emit I64DivS $($rest:tt)*) => {};
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(emit I64DivU $($rest:tt)*) => {};
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(emit I64RemU $($rest:tt)*) => {};
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(emit I64RemS $($rest:tt)*) => {};
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(emit I32RemU $($rest:tt)*) => {};
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(emit I32RemS $($rest:tt)*) => {};
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(emit I64Mul $($rest:tt)*) => {};
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(emit I64Sub $($rest:tt)*) => {};
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(emit I32Eq $($rest:tt)*) => {};
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(emit I64Eq $($rest:tt)*) => {};
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(emit I32Ne $($rest:tt)*) => {};
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(emit I64Ne $($rest:tt)*) => {};
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(emit I32LtS $($rest:tt)*) => {};
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(emit I64LtS $($rest:tt)*) => {};
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(emit I32LtU $($rest:tt)*) => {};
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(emit I64LtU $($rest:tt)*) => {};
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(emit I32LeS $($rest:tt)*) => {};
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(emit I64LeS $($rest:tt)*) => {};
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(emit I32LeU $($rest:tt)*) => {};
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(emit I64LeU $($rest:tt)*) => {};
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(emit I32GtS $($rest:tt)*) => {};
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(emit I64GtS $($rest:tt)*) => {};
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(emit I32GtU $($rest:tt)*) => {};
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(emit I64GtU $($rest:tt)*) => {};
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(emit I32GeS $($rest:tt)*) => {};
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(emit I64GeS $($rest:tt)*) => {};
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(emit I32GeU $($rest:tt)*) => {};
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(emit I64GeU $($rest:tt)*) => {};
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(emit I32Eqz $($rest:tt)*) => {};
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(emit I64Eqz $($rest:tt)*) => {};
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(emit I32And $($rest:tt)*) => {};
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(emit I64And $($rest:tt)*) => {};
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(emit I32Or $($rest:tt)*) => {};
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(emit I64Or $($rest:tt)*) => {};
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(emit I32Xor $($rest:tt)*) => {};
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(emit I64Xor $($rest:tt)*) => {};
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(emit I32Shl $($rest:tt)*) => {};
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(emit I64Shl $($rest:tt)*) => {};
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(emit I32ShrS $($rest:tt)*) => {};
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(emit I64ShrS $($rest:tt)*) => {};
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(emit I32ShrU $($rest:tt)*) => {};
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(emit I64ShrU $($rest:tt)*) => {};
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(emit I32Rotl $($rest:tt)*) => {};
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(emit I64Rotl $($rest:tt)*) => {};
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(emit I32Rotr $($rest:tt)*) => {};
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(emit I64Rotr $($rest:tt)*) => {};
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(emit I32Clz $($rest:tt)*) => {};
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(emit I64Clz $($rest:tt)*) => {};
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(emit I32Ctz $($rest:tt)*) => {};
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(emit I64Ctz $($rest:tt)*) => {};
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(emit I32Popcnt $($rest:tt)*) => {};
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(emit I64Popcnt $($rest:tt)*) => {};
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(emit I32WrapI64 $($rest:tt)*) => {};
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(emit I64ExtendI32S $($rest:tt)*) => {};
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(emit I64ExtendI32U $($rest:tt)*) => {};
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(emit I32Extend8S $($rest:tt)*) => {};
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(emit I32Extend16S $($rest:tt)*) => {};
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(emit I64Extend8S $($rest:tt)*) => {};
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(emit I64Extend16S $($rest:tt)*) => {};
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(emit I64Extend32S $($rest:tt)*) => {};
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(emit I32TruncF32S $($rest:tt)*) => {};
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(emit I32TruncF32U $($rest:tt)*) => {};
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(emit I32TruncF64S $($rest:tt)*) => {};
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(emit I32TruncF64U $($rest:tt)*) => {};
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(emit I64TruncF32S $($rest:tt)*) => {};
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(emit I64TruncF32U $($rest:tt)*) => {};
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(emit I64TruncF64S $($rest:tt)*) => {};
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(emit I64TruncF64U $($rest:tt)*) => {};
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(emit I32ReinterpretF32 $($rest:tt)*) => {};
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(emit I64ReinterpretF64 $($rest:tt)*) => {};
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(emit LocalGet $($rest:tt)*) => {};
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(emit LocalSet $($rest:tt)*) => {};
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(emit Call $($rest:tt)*) => {};
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(emit End $($rest:tt)*) => {};
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(emit Nop $($rest:tt)*) => {};
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(emit If $($rest:tt)*) => {};
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(emit Else $($rest:tt)*) => {};
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(emit Block $($rest:tt)*) => {};
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(emit Loop $($rest:tt)*) => {};
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(emit Br $($rest:tt)*) => {};
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(emit BrIf $($rest:tt)*) => {};
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(emit Return $($rest:tt)*) => {};
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(emit Unreachable $($rest:tt)*) => {};
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(emit LocalTee $($rest:tt)*) => {};
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(emit GlobalGet $($rest:tt)*) => {};
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(emit GlobalSet $($rest:tt)*) => {};
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(emit Select $($rest:tt)*) => {};
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(emit Drop $($rest:tt)*) => {};
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(emit BrTable $($rest:tt)*) => {};
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(emit CallIndirect $($rest:tt)*) => {};
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(emit TableInit $($rest:tt)*) => {};
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(emit TableCopy $($rest:tt)*) => {};
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(emit TableGet $($rest:tt)*) => {};
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(emit TableSet $($rest:tt)*) => {};
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(emit TableGrow $($rest:tt)*) => {};
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(emit TableSize $($rest:tt)*) => {};
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(emit TableFill $($rest:tt)*) => {};
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(emit ElemDrop $($rest:tt)*) => {};
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(emit MemoryInit $($rest:tt)*) => {};
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(emit MemoryCopy $($rest:tt)*) => {};
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(emit DataDrop $($rest:tt)*) => {};
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(emit MemoryFill $($rest:tt)*) => {};
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(emit MemorySize $($rest:tt)*) => {};
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(emit MemoryGrow $($rest:tt)*) => {};
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(emit I32Load $($rest:tt)*) => {};
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(emit I32Load8S $($rest:tt)*) => {};
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(emit I32Load8U $($rest:tt)*) => {};
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(emit I32Load16S $($rest:tt)*) => {};
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(emit I32Load16U $($rest:tt)*) => {};
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(emit I64Load8S $($rest:tt)*) => {};
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(emit I64Load8U $($rest:tt)*) => {};
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(emit I64Load16S $($rest:tt)*) => {};
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(emit I64Load16U $($rest:tt)*) => {};
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(emit I64Load32S $($rest:tt)*) => {};
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(emit I64Load32U $($rest:tt)*) => {};
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(emit I64Load $($rest:tt)*) => {};
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(emit I32Store $($rest:tt)*) => {};
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(emit I32Store $($rest:tt)*) => {};
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(emit I32Store8 $($rest:tt)*) => {};
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(emit I32Store16 $($rest:tt)*) => {};
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(emit I64Store $($rest:tt)*) => {};
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(emit I64Store8 $($rest:tt)*) => {};
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(emit I64Store16 $($rest:tt)*) => {};
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(emit I64Store32 $($rest:tt)*) => {};
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(emit F32Load $($rest:tt)*) => {};
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(emit F32Store $($rest:tt)*) => {};
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(emit F64Load $($rest:tt)*) => {};
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(emit F64Store $($rest:tt)*) => {};
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(emit I32TruncSatF32S $($rest:tt)*) => {};
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(emit I32TruncSatF32U $($rest:tt)*) => {};
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(emit I32TruncSatF64S $($rest:tt)*) => {};
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(emit I32TruncSatF64U $($rest:tt)*) => {};
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(emit I64TruncSatF32S $($rest:tt)*) => {};
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(emit I64TruncSatF32U $($rest:tt)*) => {};
|
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(emit I64TruncSatF64S $($rest:tt)*) => {};
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(emit I64TruncSatF64U $($rest:tt)*) => {};
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+
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+
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(emit $unsupported:tt $($rest:tt)*) => {$($rest)*};
|
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|
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}
|
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|
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impl<'a, 'translation, 'data, M> VisitOperator<'a> for CodeGen<'a, 'translation, 'data, M>
|
249
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where
|
250
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+
M: MacroAssembler,
|
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{
|
252
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type Output = ();
|
253
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+
|
254
|
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fn visit_i32_const(&mut self, val: i32) {
|
255
|
+
self.context.stack.push(Val::i32(val));
|
256
|
+
}
|
257
|
+
|
258
|
+
fn visit_i64_const(&mut self, val: i64) {
|
259
|
+
self.context.stack.push(Val::i64(val));
|
260
|
+
}
|
261
|
+
|
262
|
+
fn visit_f32_const(&mut self, val: Ieee32) {
|
263
|
+
self.context.stack.push(Val::f32(val));
|
264
|
+
}
|
265
|
+
|
266
|
+
fn visit_f64_const(&mut self, val: Ieee64) {
|
267
|
+
self.context.stack.push(Val::f64(val));
|
268
|
+
}
|
269
|
+
|
270
|
+
fn visit_f32_add(&mut self) {
|
271
|
+
self.context.binop(
|
272
|
+
self.masm,
|
273
|
+
OperandSize::S32,
|
274
|
+
&mut |masm: &mut M, dst, src, size| {
|
275
|
+
masm.float_add(dst, dst, src, size);
|
276
|
+
TypedReg::f32(dst)
|
277
|
+
},
|
278
|
+
);
|
279
|
+
}
|
280
|
+
|
281
|
+
fn visit_f64_add(&mut self) {
|
282
|
+
self.context.binop(
|
283
|
+
self.masm,
|
284
|
+
OperandSize::S64,
|
285
|
+
&mut |masm: &mut M, dst, src, size| {
|
286
|
+
masm.float_add(dst, dst, src, size);
|
287
|
+
TypedReg::f64(dst)
|
288
|
+
},
|
289
|
+
);
|
290
|
+
}
|
291
|
+
|
292
|
+
fn visit_f32_sub(&mut self) {
|
293
|
+
self.context.binop(
|
294
|
+
self.masm,
|
295
|
+
OperandSize::S32,
|
296
|
+
&mut |masm: &mut M, dst, src, size| {
|
297
|
+
masm.float_sub(dst, dst, src, size);
|
298
|
+
TypedReg::f32(dst)
|
299
|
+
},
|
300
|
+
);
|
301
|
+
}
|
302
|
+
|
303
|
+
fn visit_f64_sub(&mut self) {
|
304
|
+
self.context.binop(
|
305
|
+
self.masm,
|
306
|
+
OperandSize::S64,
|
307
|
+
&mut |masm: &mut M, dst, src, size| {
|
308
|
+
masm.float_sub(dst, dst, src, size);
|
309
|
+
TypedReg::f64(dst)
|
310
|
+
},
|
311
|
+
);
|
312
|
+
}
|
313
|
+
|
314
|
+
fn visit_f32_mul(&mut self) {
|
315
|
+
self.context.binop(
|
316
|
+
self.masm,
|
317
|
+
OperandSize::S32,
|
318
|
+
&mut |masm: &mut M, dst, src, size| {
|
319
|
+
masm.float_mul(dst, dst, src, size);
|
320
|
+
TypedReg::f32(dst)
|
321
|
+
},
|
322
|
+
);
|
323
|
+
}
|
324
|
+
|
325
|
+
fn visit_f64_mul(&mut self) {
|
326
|
+
self.context.binop(
|
327
|
+
self.masm,
|
328
|
+
OperandSize::S64,
|
329
|
+
&mut |masm: &mut M, dst, src, size| {
|
330
|
+
masm.float_mul(dst, dst, src, size);
|
331
|
+
TypedReg::f64(dst)
|
332
|
+
},
|
333
|
+
);
|
334
|
+
}
|
335
|
+
|
336
|
+
fn visit_f32_div(&mut self) {
|
337
|
+
self.context.binop(
|
338
|
+
self.masm,
|
339
|
+
OperandSize::S32,
|
340
|
+
&mut |masm: &mut M, dst, src, size| {
|
341
|
+
masm.float_div(dst, dst, src, size);
|
342
|
+
TypedReg::f32(dst)
|
343
|
+
},
|
344
|
+
);
|
345
|
+
}
|
346
|
+
|
347
|
+
fn visit_f64_div(&mut self) {
|
348
|
+
self.context.binop(
|
349
|
+
self.masm,
|
350
|
+
OperandSize::S64,
|
351
|
+
&mut |masm: &mut M, dst, src, size| {
|
352
|
+
masm.float_div(dst, dst, src, size);
|
353
|
+
TypedReg::f64(dst)
|
354
|
+
},
|
355
|
+
);
|
356
|
+
}
|
357
|
+
|
358
|
+
fn visit_f32_min(&mut self) {
|
359
|
+
self.context.binop(
|
360
|
+
self.masm,
|
361
|
+
OperandSize::S32,
|
362
|
+
&mut |masm: &mut M, dst, src, size| {
|
363
|
+
masm.float_min(dst, dst, src, size);
|
364
|
+
TypedReg::f32(dst)
|
365
|
+
},
|
366
|
+
);
|
367
|
+
}
|
368
|
+
|
369
|
+
fn visit_f64_min(&mut self) {
|
370
|
+
self.context.binop(
|
371
|
+
self.masm,
|
372
|
+
OperandSize::S64,
|
373
|
+
&mut |masm: &mut M, dst, src, size| {
|
374
|
+
masm.float_min(dst, dst, src, size);
|
375
|
+
TypedReg::f64(dst)
|
376
|
+
},
|
377
|
+
);
|
378
|
+
}
|
379
|
+
|
380
|
+
fn visit_f32_max(&mut self) {
|
381
|
+
self.context.binop(
|
382
|
+
self.masm,
|
383
|
+
OperandSize::S32,
|
384
|
+
&mut |masm: &mut M, dst, src, size| {
|
385
|
+
masm.float_max(dst, dst, src, size);
|
386
|
+
TypedReg::f32(dst)
|
387
|
+
},
|
388
|
+
);
|
389
|
+
}
|
390
|
+
|
391
|
+
fn visit_f64_max(&mut self) {
|
392
|
+
self.context.binop(
|
393
|
+
self.masm,
|
394
|
+
OperandSize::S64,
|
395
|
+
&mut |masm: &mut M, dst, src, size| {
|
396
|
+
masm.float_max(dst, dst, src, size);
|
397
|
+
TypedReg::f64(dst)
|
398
|
+
},
|
399
|
+
);
|
400
|
+
}
|
401
|
+
|
402
|
+
fn visit_f32_copysign(&mut self) {
|
403
|
+
self.context.binop(
|
404
|
+
self.masm,
|
405
|
+
OperandSize::S32,
|
406
|
+
&mut |masm: &mut M, dst, src, size| {
|
407
|
+
masm.float_copysign(dst, dst, src, size);
|
408
|
+
TypedReg::f32(dst)
|
409
|
+
},
|
410
|
+
);
|
411
|
+
}
|
412
|
+
|
413
|
+
fn visit_f64_copysign(&mut self) {
|
414
|
+
self.context.binop(
|
415
|
+
self.masm,
|
416
|
+
OperandSize::S64,
|
417
|
+
&mut |masm: &mut M, dst, src, size| {
|
418
|
+
masm.float_copysign(dst, dst, src, size);
|
419
|
+
TypedReg::f64(dst)
|
420
|
+
},
|
421
|
+
);
|
422
|
+
}
|
423
|
+
|
424
|
+
fn visit_f32_abs(&mut self) {
|
425
|
+
self.context
|
426
|
+
.unop(self.masm, OperandSize::S32, &mut |masm, reg, size| {
|
427
|
+
masm.float_abs(reg, size);
|
428
|
+
TypedReg::f32(reg)
|
429
|
+
});
|
430
|
+
}
|
431
|
+
|
432
|
+
fn visit_f64_abs(&mut self) {
|
433
|
+
self.context
|
434
|
+
.unop(self.masm, OperandSize::S64, &mut |masm, reg, size| {
|
435
|
+
masm.float_abs(reg, size);
|
436
|
+
TypedReg::f64(reg)
|
437
|
+
});
|
438
|
+
}
|
439
|
+
|
440
|
+
fn visit_f32_neg(&mut self) {
|
441
|
+
self.context
|
442
|
+
.unop(self.masm, OperandSize::S32, &mut |masm, reg, size| {
|
443
|
+
masm.float_neg(reg, size);
|
444
|
+
TypedReg::f32(reg)
|
445
|
+
});
|
446
|
+
}
|
447
|
+
|
448
|
+
fn visit_f64_neg(&mut self) {
|
449
|
+
self.context
|
450
|
+
.unop(self.masm, OperandSize::S64, &mut |masm, reg, size| {
|
451
|
+
masm.float_neg(reg, size);
|
452
|
+
TypedReg::f64(reg)
|
453
|
+
});
|
454
|
+
}
|
455
|
+
|
456
|
+
fn visit_f32_floor(&mut self) {
|
457
|
+
self.masm.float_round(
|
458
|
+
RoundingMode::Down,
|
459
|
+
&mut self.env,
|
460
|
+
&mut self.context,
|
461
|
+
OperandSize::S32,
|
462
|
+
|env, cx, masm| {
|
463
|
+
let builtin = env.builtins.floor_f32::<M::ABI>();
|
464
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
465
|
+
},
|
466
|
+
);
|
467
|
+
}
|
468
|
+
|
469
|
+
fn visit_f64_floor(&mut self) {
|
470
|
+
self.masm.float_round(
|
471
|
+
RoundingMode::Down,
|
472
|
+
&mut self.env,
|
473
|
+
&mut self.context,
|
474
|
+
OperandSize::S64,
|
475
|
+
|env, cx, masm| {
|
476
|
+
let builtin = env.builtins.floor_f64::<M::ABI>();
|
477
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
478
|
+
},
|
479
|
+
);
|
480
|
+
}
|
481
|
+
|
482
|
+
fn visit_f32_ceil(&mut self) {
|
483
|
+
self.masm.float_round(
|
484
|
+
RoundingMode::Up,
|
485
|
+
&mut self.env,
|
486
|
+
&mut self.context,
|
487
|
+
OperandSize::S32,
|
488
|
+
|env, cx, masm| {
|
489
|
+
let builtin = env.builtins.ceil_f32::<M::ABI>();
|
490
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
491
|
+
},
|
492
|
+
);
|
493
|
+
}
|
494
|
+
|
495
|
+
fn visit_f64_ceil(&mut self) {
|
496
|
+
self.masm.float_round(
|
497
|
+
RoundingMode::Up,
|
498
|
+
&mut self.env,
|
499
|
+
&mut self.context,
|
500
|
+
OperandSize::S64,
|
501
|
+
|env, cx, masm| {
|
502
|
+
let builtin = env.builtins.ceil_f64::<M::ABI>();
|
503
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
504
|
+
},
|
505
|
+
);
|
506
|
+
}
|
507
|
+
|
508
|
+
fn visit_f32_nearest(&mut self) {
|
509
|
+
self.masm.float_round(
|
510
|
+
RoundingMode::Nearest,
|
511
|
+
&mut self.env,
|
512
|
+
&mut self.context,
|
513
|
+
OperandSize::S32,
|
514
|
+
|env, cx, masm| {
|
515
|
+
let builtin = env.builtins.nearest_f32::<M::ABI>();
|
516
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin))
|
517
|
+
},
|
518
|
+
);
|
519
|
+
}
|
520
|
+
|
521
|
+
fn visit_f64_nearest(&mut self) {
|
522
|
+
self.masm.float_round(
|
523
|
+
RoundingMode::Nearest,
|
524
|
+
&mut self.env,
|
525
|
+
&mut self.context,
|
526
|
+
OperandSize::S64,
|
527
|
+
|env, cx, masm| {
|
528
|
+
let builtin = env.builtins.nearest_f64::<M::ABI>();
|
529
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
530
|
+
},
|
531
|
+
);
|
532
|
+
}
|
533
|
+
|
534
|
+
fn visit_f32_trunc(&mut self) {
|
535
|
+
self.masm.float_round(
|
536
|
+
RoundingMode::Zero,
|
537
|
+
&mut self.env,
|
538
|
+
&mut self.context,
|
539
|
+
OperandSize::S32,
|
540
|
+
|env, cx, masm| {
|
541
|
+
let builtin = env.builtins.trunc_f32::<M::ABI>();
|
542
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
543
|
+
},
|
544
|
+
);
|
545
|
+
}
|
546
|
+
|
547
|
+
fn visit_f64_trunc(&mut self) {
|
548
|
+
self.masm.float_round(
|
549
|
+
RoundingMode::Zero,
|
550
|
+
&mut self.env,
|
551
|
+
&mut self.context,
|
552
|
+
OperandSize::S64,
|
553
|
+
|env, cx, masm| {
|
554
|
+
let builtin = env.builtins.trunc_f64::<M::ABI>();
|
555
|
+
FnCall::emit::<M>(env, masm, cx, Callee::Builtin(builtin));
|
556
|
+
},
|
557
|
+
);
|
558
|
+
}
|
559
|
+
|
560
|
+
fn visit_f32_sqrt(&mut self) {
|
561
|
+
self.context
|
562
|
+
.unop(self.masm, OperandSize::S32, &mut |masm, reg, size| {
|
563
|
+
masm.float_sqrt(reg, reg, size);
|
564
|
+
TypedReg::f32(reg)
|
565
|
+
});
|
566
|
+
}
|
567
|
+
|
568
|
+
fn visit_f64_sqrt(&mut self) {
|
569
|
+
self.context
|
570
|
+
.unop(self.masm, OperandSize::S64, &mut |masm, reg, size| {
|
571
|
+
masm.float_sqrt(reg, reg, size);
|
572
|
+
TypedReg::f64(reg)
|
573
|
+
});
|
574
|
+
}
|
575
|
+
|
576
|
+
fn visit_f32_eq(&mut self) {
|
577
|
+
self.context.float_cmp_op(
|
578
|
+
self.masm,
|
579
|
+
OperandSize::S32,
|
580
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
581
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Eq, size);
|
582
|
+
},
|
583
|
+
);
|
584
|
+
}
|
585
|
+
|
586
|
+
fn visit_f64_eq(&mut self) {
|
587
|
+
self.context.float_cmp_op(
|
588
|
+
self.masm,
|
589
|
+
OperandSize::S64,
|
590
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
591
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Eq, size);
|
592
|
+
},
|
593
|
+
);
|
594
|
+
}
|
595
|
+
|
596
|
+
fn visit_f32_ne(&mut self) {
|
597
|
+
self.context.float_cmp_op(
|
598
|
+
self.masm,
|
599
|
+
OperandSize::S32,
|
600
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
601
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Ne, size);
|
602
|
+
},
|
603
|
+
);
|
604
|
+
}
|
605
|
+
|
606
|
+
fn visit_f64_ne(&mut self) {
|
607
|
+
self.context.float_cmp_op(
|
608
|
+
self.masm,
|
609
|
+
OperandSize::S64,
|
610
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
611
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Ne, size);
|
612
|
+
},
|
613
|
+
);
|
614
|
+
}
|
615
|
+
|
616
|
+
fn visit_f32_lt(&mut self) {
|
617
|
+
self.context.float_cmp_op(
|
618
|
+
self.masm,
|
619
|
+
OperandSize::S32,
|
620
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
621
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Lt, size);
|
622
|
+
},
|
623
|
+
);
|
624
|
+
}
|
625
|
+
|
626
|
+
fn visit_f64_lt(&mut self) {
|
627
|
+
self.context.float_cmp_op(
|
628
|
+
self.masm,
|
629
|
+
OperandSize::S64,
|
630
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
631
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Lt, size);
|
632
|
+
},
|
633
|
+
);
|
634
|
+
}
|
635
|
+
|
636
|
+
fn visit_f32_gt(&mut self) {
|
637
|
+
self.context.float_cmp_op(
|
638
|
+
self.masm,
|
639
|
+
OperandSize::S32,
|
640
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
641
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Gt, size);
|
642
|
+
},
|
643
|
+
);
|
644
|
+
}
|
645
|
+
|
646
|
+
fn visit_f64_gt(&mut self) {
|
647
|
+
self.context.float_cmp_op(
|
648
|
+
self.masm,
|
649
|
+
OperandSize::S64,
|
650
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
651
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Gt, size);
|
652
|
+
},
|
653
|
+
);
|
654
|
+
}
|
655
|
+
|
656
|
+
fn visit_f32_le(&mut self) {
|
657
|
+
self.context.float_cmp_op(
|
658
|
+
self.masm,
|
659
|
+
OperandSize::S32,
|
660
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
661
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Le, size);
|
662
|
+
},
|
663
|
+
);
|
664
|
+
}
|
665
|
+
|
666
|
+
fn visit_f64_le(&mut self) {
|
667
|
+
self.context.float_cmp_op(
|
668
|
+
self.masm,
|
669
|
+
OperandSize::S64,
|
670
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
671
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Le, size);
|
672
|
+
},
|
673
|
+
);
|
674
|
+
}
|
675
|
+
|
676
|
+
fn visit_f32_ge(&mut self) {
|
677
|
+
self.context.float_cmp_op(
|
678
|
+
self.masm,
|
679
|
+
OperandSize::S32,
|
680
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
681
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Ge, size);
|
682
|
+
},
|
683
|
+
);
|
684
|
+
}
|
685
|
+
|
686
|
+
fn visit_f64_ge(&mut self) {
|
687
|
+
self.context.float_cmp_op(
|
688
|
+
self.masm,
|
689
|
+
OperandSize::S64,
|
690
|
+
&mut |masm: &mut M, dst, src1, src2, size| {
|
691
|
+
masm.float_cmp_with_set(src1, src2, dst, FloatCmpKind::Ge, size);
|
692
|
+
},
|
693
|
+
);
|
694
|
+
}
|
695
|
+
|
696
|
+
fn visit_f32_convert_i32_s(&mut self) {
|
697
|
+
self.context
|
698
|
+
.convert_op(self.masm, WasmValType::F32, |masm, dst, src, dst_size| {
|
699
|
+
masm.signed_convert(src, dst, OperandSize::S32, dst_size);
|
700
|
+
});
|
701
|
+
}
|
702
|
+
|
703
|
+
fn visit_f32_convert_i32_u(&mut self) {
|
704
|
+
self.context.convert_op_with_tmp_reg(
|
705
|
+
self.masm,
|
706
|
+
WasmValType::F32,
|
707
|
+
RegClass::Int,
|
708
|
+
|masm, dst, src, tmp_gpr, dst_size| {
|
709
|
+
masm.unsigned_convert(src, dst, tmp_gpr, OperandSize::S32, dst_size);
|
710
|
+
},
|
711
|
+
);
|
712
|
+
}
|
713
|
+
|
714
|
+
fn visit_f32_convert_i64_s(&mut self) {
|
715
|
+
self.context
|
716
|
+
.convert_op(self.masm, WasmValType::F32, |masm, dst, src, dst_size| {
|
717
|
+
masm.signed_convert(src, dst, OperandSize::S64, dst_size);
|
718
|
+
});
|
719
|
+
}
|
720
|
+
|
721
|
+
fn visit_f32_convert_i64_u(&mut self) {
|
722
|
+
self.context.convert_op_with_tmp_reg(
|
723
|
+
self.masm,
|
724
|
+
WasmValType::F32,
|
725
|
+
RegClass::Int,
|
726
|
+
|masm, dst, src, tmp_gpr, dst_size| {
|
727
|
+
masm.unsigned_convert(src, dst, tmp_gpr, OperandSize::S64, dst_size);
|
728
|
+
},
|
729
|
+
);
|
730
|
+
}
|
731
|
+
|
732
|
+
fn visit_f64_convert_i32_s(&mut self) {
|
733
|
+
self.context
|
734
|
+
.convert_op(self.masm, WasmValType::F64, |masm, dst, src, dst_size| {
|
735
|
+
masm.signed_convert(src, dst, OperandSize::S32, dst_size);
|
736
|
+
});
|
737
|
+
}
|
738
|
+
|
739
|
+
fn visit_f64_convert_i32_u(&mut self) {
|
740
|
+
self.context.convert_op_with_tmp_reg(
|
741
|
+
self.masm,
|
742
|
+
WasmValType::F64,
|
743
|
+
RegClass::Int,
|
744
|
+
|masm, dst, src, tmp_gpr, dst_size| {
|
745
|
+
masm.unsigned_convert(src, dst, tmp_gpr, OperandSize::S32, dst_size);
|
746
|
+
},
|
747
|
+
);
|
748
|
+
}
|
749
|
+
|
750
|
+
fn visit_f64_convert_i64_s(&mut self) {
|
751
|
+
self.context
|
752
|
+
.convert_op(self.masm, WasmValType::F64, |masm, dst, src, dst_size| {
|
753
|
+
masm.signed_convert(src, dst, OperandSize::S64, dst_size);
|
754
|
+
});
|
755
|
+
}
|
756
|
+
|
757
|
+
fn visit_f64_convert_i64_u(&mut self) {
|
758
|
+
self.context.convert_op_with_tmp_reg(
|
759
|
+
self.masm,
|
760
|
+
WasmValType::F64,
|
761
|
+
RegClass::Int,
|
762
|
+
|masm, dst, src, tmp_gpr, dst_size| {
|
763
|
+
masm.unsigned_convert(src, dst, tmp_gpr, OperandSize::S64, dst_size);
|
764
|
+
},
|
765
|
+
);
|
766
|
+
}
|
767
|
+
|
768
|
+
fn visit_f32_reinterpret_i32(&mut self) {
|
769
|
+
self.context
|
770
|
+
.convert_op(self.masm, WasmValType::F32, |masm, dst, src, size| {
|
771
|
+
masm.reinterpret_int_as_float(src.into(), dst, size);
|
772
|
+
});
|
773
|
+
}
|
774
|
+
|
775
|
+
fn visit_f64_reinterpret_i64(&mut self) {
|
776
|
+
self.context
|
777
|
+
.convert_op(self.masm, WasmValType::F64, |masm, dst, src, size| {
|
778
|
+
masm.reinterpret_int_as_float(src.into(), dst, size);
|
779
|
+
});
|
780
|
+
}
|
781
|
+
|
782
|
+
fn visit_f32_demote_f64(&mut self) {
|
783
|
+
self.context
|
784
|
+
.unop(self.masm, OperandSize::S64, &mut |masm, reg, _size| {
|
785
|
+
masm.demote(reg, reg);
|
786
|
+
TypedReg::f32(reg)
|
787
|
+
});
|
788
|
+
}
|
789
|
+
|
790
|
+
fn visit_f64_promote_f32(&mut self) {
|
791
|
+
self.context
|
792
|
+
.unop(self.masm, OperandSize::S32, &mut |masm, reg, _size| {
|
793
|
+
masm.promote(reg, reg);
|
794
|
+
TypedReg::f64(reg)
|
795
|
+
});
|
796
|
+
}
|
797
|
+
|
798
|
+
fn visit_i32_add(&mut self) {
|
799
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
800
|
+
masm.add(dst, dst, src, size);
|
801
|
+
TypedReg::i32(dst)
|
802
|
+
});
|
803
|
+
}
|
804
|
+
|
805
|
+
fn visit_i64_add(&mut self) {
|
806
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
807
|
+
masm.add(dst, dst, src, size);
|
808
|
+
TypedReg::i64(dst)
|
809
|
+
});
|
810
|
+
}
|
811
|
+
|
812
|
+
fn visit_i32_sub(&mut self) {
|
813
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
814
|
+
masm.sub(dst, dst, src, size);
|
815
|
+
TypedReg::i32(dst)
|
816
|
+
});
|
817
|
+
}
|
818
|
+
|
819
|
+
fn visit_i64_sub(&mut self) {
|
820
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
821
|
+
masm.sub(dst, dst, src, size);
|
822
|
+
TypedReg::i64(dst)
|
823
|
+
});
|
824
|
+
}
|
825
|
+
|
826
|
+
fn visit_i32_mul(&mut self) {
|
827
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
828
|
+
masm.mul(dst, dst, src, size);
|
829
|
+
TypedReg::i32(dst)
|
830
|
+
});
|
831
|
+
}
|
832
|
+
|
833
|
+
fn visit_i64_mul(&mut self) {
|
834
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
835
|
+
masm.mul(dst, dst, src, size);
|
836
|
+
TypedReg::i64(dst)
|
837
|
+
});
|
838
|
+
}
|
839
|
+
|
840
|
+
fn visit_i32_div_s(&mut self) {
|
841
|
+
use DivKind::*;
|
842
|
+
use OperandSize::*;
|
843
|
+
|
844
|
+
self.masm.div(&mut self.context, Signed, S32);
|
845
|
+
}
|
846
|
+
|
847
|
+
fn visit_i32_div_u(&mut self) {
|
848
|
+
use DivKind::*;
|
849
|
+
use OperandSize::*;
|
850
|
+
|
851
|
+
self.masm.div(&mut self.context, Unsigned, S32);
|
852
|
+
}
|
853
|
+
|
854
|
+
fn visit_i64_div_s(&mut self) {
|
855
|
+
use DivKind::*;
|
856
|
+
use OperandSize::*;
|
857
|
+
|
858
|
+
self.masm.div(&mut self.context, Signed, S64);
|
859
|
+
}
|
860
|
+
|
861
|
+
fn visit_i64_div_u(&mut self) {
|
862
|
+
use DivKind::*;
|
863
|
+
use OperandSize::*;
|
864
|
+
|
865
|
+
self.masm.div(&mut self.context, Unsigned, S64);
|
866
|
+
}
|
867
|
+
|
868
|
+
fn visit_i32_rem_s(&mut self) {
|
869
|
+
use OperandSize::*;
|
870
|
+
use RemKind::*;
|
871
|
+
|
872
|
+
self.masm.rem(&mut self.context, Signed, S32);
|
873
|
+
}
|
874
|
+
|
875
|
+
fn visit_i32_rem_u(&mut self) {
|
876
|
+
use OperandSize::*;
|
877
|
+
use RemKind::*;
|
878
|
+
|
879
|
+
self.masm.rem(&mut self.context, Unsigned, S32);
|
880
|
+
}
|
881
|
+
|
882
|
+
fn visit_i64_rem_s(&mut self) {
|
883
|
+
use OperandSize::*;
|
884
|
+
use RemKind::*;
|
885
|
+
|
886
|
+
self.masm.rem(&mut self.context, Signed, S64);
|
887
|
+
}
|
888
|
+
|
889
|
+
fn visit_i64_rem_u(&mut self) {
|
890
|
+
use OperandSize::*;
|
891
|
+
use RemKind::*;
|
892
|
+
|
893
|
+
self.masm.rem(&mut self.context, Unsigned, S64);
|
894
|
+
}
|
895
|
+
|
896
|
+
fn visit_i32_eq(&mut self) {
|
897
|
+
self.cmp_i32s(IntCmpKind::Eq);
|
898
|
+
}
|
899
|
+
|
900
|
+
fn visit_i64_eq(&mut self) {
|
901
|
+
self.cmp_i64s(IntCmpKind::Eq);
|
902
|
+
}
|
903
|
+
|
904
|
+
fn visit_i32_ne(&mut self) {
|
905
|
+
self.cmp_i32s(IntCmpKind::Ne);
|
906
|
+
}
|
907
|
+
|
908
|
+
fn visit_i64_ne(&mut self) {
|
909
|
+
self.cmp_i64s(IntCmpKind::Ne);
|
910
|
+
}
|
911
|
+
|
912
|
+
fn visit_i32_lt_s(&mut self) {
|
913
|
+
self.cmp_i32s(IntCmpKind::LtS);
|
914
|
+
}
|
915
|
+
|
916
|
+
fn visit_i64_lt_s(&mut self) {
|
917
|
+
self.cmp_i64s(IntCmpKind::LtS);
|
918
|
+
}
|
919
|
+
|
920
|
+
fn visit_i32_lt_u(&mut self) {
|
921
|
+
self.cmp_i32s(IntCmpKind::LtU);
|
922
|
+
}
|
923
|
+
|
924
|
+
fn visit_i64_lt_u(&mut self) {
|
925
|
+
self.cmp_i64s(IntCmpKind::LtU);
|
926
|
+
}
|
927
|
+
|
928
|
+
fn visit_i32_le_s(&mut self) {
|
929
|
+
self.cmp_i32s(IntCmpKind::LeS);
|
930
|
+
}
|
931
|
+
|
932
|
+
fn visit_i64_le_s(&mut self) {
|
933
|
+
self.cmp_i64s(IntCmpKind::LeS);
|
934
|
+
}
|
935
|
+
|
936
|
+
fn visit_i32_le_u(&mut self) {
|
937
|
+
self.cmp_i32s(IntCmpKind::LeU);
|
938
|
+
}
|
939
|
+
|
940
|
+
fn visit_i64_le_u(&mut self) {
|
941
|
+
self.cmp_i64s(IntCmpKind::LeU);
|
942
|
+
}
|
943
|
+
|
944
|
+
fn visit_i32_gt_s(&mut self) {
|
945
|
+
self.cmp_i32s(IntCmpKind::GtS);
|
946
|
+
}
|
947
|
+
|
948
|
+
fn visit_i64_gt_s(&mut self) {
|
949
|
+
self.cmp_i64s(IntCmpKind::GtS);
|
950
|
+
}
|
951
|
+
|
952
|
+
fn visit_i32_gt_u(&mut self) {
|
953
|
+
self.cmp_i32s(IntCmpKind::GtU);
|
954
|
+
}
|
955
|
+
|
956
|
+
fn visit_i64_gt_u(&mut self) {
|
957
|
+
self.cmp_i64s(IntCmpKind::GtU);
|
958
|
+
}
|
959
|
+
|
960
|
+
fn visit_i32_ge_s(&mut self) {
|
961
|
+
self.cmp_i32s(IntCmpKind::GeS);
|
962
|
+
}
|
963
|
+
|
964
|
+
fn visit_i64_ge_s(&mut self) {
|
965
|
+
self.cmp_i64s(IntCmpKind::GeS);
|
966
|
+
}
|
967
|
+
|
968
|
+
fn visit_i32_ge_u(&mut self) {
|
969
|
+
self.cmp_i32s(IntCmpKind::GeU);
|
970
|
+
}
|
971
|
+
|
972
|
+
fn visit_i64_ge_u(&mut self) {
|
973
|
+
self.cmp_i64s(IntCmpKind::GeU);
|
974
|
+
}
|
975
|
+
|
976
|
+
fn visit_i32_eqz(&mut self) {
|
977
|
+
use OperandSize::*;
|
978
|
+
|
979
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, size| {
|
980
|
+
masm.cmp_with_set(RegImm::i32(0), reg.into(), IntCmpKind::Eq, size);
|
981
|
+
TypedReg::i32(reg)
|
982
|
+
});
|
983
|
+
}
|
984
|
+
|
985
|
+
fn visit_i64_eqz(&mut self) {
|
986
|
+
use OperandSize::*;
|
987
|
+
|
988
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, size| {
|
989
|
+
masm.cmp_with_set(RegImm::i64(0), reg.into(), IntCmpKind::Eq, size);
|
990
|
+
TypedReg::i32(reg) // Return value for `i64.eqz` is an `i32`.
|
991
|
+
});
|
992
|
+
}
|
993
|
+
|
994
|
+
fn visit_i32_clz(&mut self) {
|
995
|
+
use OperandSize::*;
|
996
|
+
|
997
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, size| {
|
998
|
+
masm.clz(reg, reg, size);
|
999
|
+
TypedReg::i32(reg)
|
1000
|
+
});
|
1001
|
+
}
|
1002
|
+
|
1003
|
+
fn visit_i64_clz(&mut self) {
|
1004
|
+
use OperandSize::*;
|
1005
|
+
|
1006
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, size| {
|
1007
|
+
masm.clz(reg, reg, size);
|
1008
|
+
TypedReg::i64(reg)
|
1009
|
+
});
|
1010
|
+
}
|
1011
|
+
|
1012
|
+
fn visit_i32_ctz(&mut self) {
|
1013
|
+
use OperandSize::*;
|
1014
|
+
|
1015
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, size| {
|
1016
|
+
masm.ctz(reg, reg, size);
|
1017
|
+
TypedReg::i32(reg)
|
1018
|
+
});
|
1019
|
+
}
|
1020
|
+
|
1021
|
+
fn visit_i64_ctz(&mut self) {
|
1022
|
+
use OperandSize::*;
|
1023
|
+
|
1024
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, size| {
|
1025
|
+
masm.ctz(reg, reg, size);
|
1026
|
+
TypedReg::i64(reg)
|
1027
|
+
});
|
1028
|
+
}
|
1029
|
+
|
1030
|
+
fn visit_i32_and(&mut self) {
|
1031
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
1032
|
+
masm.and(dst, dst, src, size);
|
1033
|
+
TypedReg::i32(dst)
|
1034
|
+
});
|
1035
|
+
}
|
1036
|
+
|
1037
|
+
fn visit_i64_and(&mut self) {
|
1038
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
1039
|
+
masm.and(dst, dst, src, size);
|
1040
|
+
TypedReg::i64(dst)
|
1041
|
+
});
|
1042
|
+
}
|
1043
|
+
|
1044
|
+
fn visit_i32_or(&mut self) {
|
1045
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
1046
|
+
masm.or(dst, dst, src, size);
|
1047
|
+
TypedReg::i32(dst)
|
1048
|
+
});
|
1049
|
+
}
|
1050
|
+
|
1051
|
+
fn visit_i64_or(&mut self) {
|
1052
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
1053
|
+
masm.or(dst, dst, src, size);
|
1054
|
+
TypedReg::i64(dst)
|
1055
|
+
});
|
1056
|
+
}
|
1057
|
+
|
1058
|
+
fn visit_i32_xor(&mut self) {
|
1059
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
1060
|
+
masm.xor(dst, dst, src, size);
|
1061
|
+
TypedReg::i32(dst)
|
1062
|
+
});
|
1063
|
+
}
|
1064
|
+
|
1065
|
+
fn visit_i64_xor(&mut self) {
|
1066
|
+
self.context.i64_binop(self.masm, |masm, dst, src, size| {
|
1067
|
+
masm.xor(dst, dst, src, size);
|
1068
|
+
TypedReg::i64(dst)
|
1069
|
+
});
|
1070
|
+
}
|
1071
|
+
|
1072
|
+
fn visit_i32_shl(&mut self) {
|
1073
|
+
use OperandSize::*;
|
1074
|
+
use ShiftKind::*;
|
1075
|
+
|
1076
|
+
self.masm.shift(&mut self.context, Shl, S32);
|
1077
|
+
}
|
1078
|
+
|
1079
|
+
fn visit_i64_shl(&mut self) {
|
1080
|
+
use OperandSize::*;
|
1081
|
+
use ShiftKind::*;
|
1082
|
+
|
1083
|
+
self.masm.shift(&mut self.context, Shl, S64);
|
1084
|
+
}
|
1085
|
+
|
1086
|
+
fn visit_i32_shr_s(&mut self) {
|
1087
|
+
use OperandSize::*;
|
1088
|
+
use ShiftKind::*;
|
1089
|
+
|
1090
|
+
self.masm.shift(&mut self.context, ShrS, S32);
|
1091
|
+
}
|
1092
|
+
|
1093
|
+
fn visit_i64_shr_s(&mut self) {
|
1094
|
+
use OperandSize::*;
|
1095
|
+
use ShiftKind::*;
|
1096
|
+
|
1097
|
+
self.masm.shift(&mut self.context, ShrS, S64);
|
1098
|
+
}
|
1099
|
+
|
1100
|
+
fn visit_i32_shr_u(&mut self) {
|
1101
|
+
use OperandSize::*;
|
1102
|
+
use ShiftKind::*;
|
1103
|
+
|
1104
|
+
self.masm.shift(&mut self.context, ShrU, S32);
|
1105
|
+
}
|
1106
|
+
|
1107
|
+
fn visit_i64_shr_u(&mut self) {
|
1108
|
+
use OperandSize::*;
|
1109
|
+
use ShiftKind::*;
|
1110
|
+
|
1111
|
+
self.masm.shift(&mut self.context, ShrU, S64);
|
1112
|
+
}
|
1113
|
+
|
1114
|
+
fn visit_i32_rotl(&mut self) {
|
1115
|
+
use OperandSize::*;
|
1116
|
+
use ShiftKind::*;
|
1117
|
+
|
1118
|
+
self.masm.shift(&mut self.context, Rotl, S32);
|
1119
|
+
}
|
1120
|
+
|
1121
|
+
fn visit_i64_rotl(&mut self) {
|
1122
|
+
use OperandSize::*;
|
1123
|
+
use ShiftKind::*;
|
1124
|
+
|
1125
|
+
self.masm.shift(&mut self.context, Rotl, S64);
|
1126
|
+
}
|
1127
|
+
|
1128
|
+
fn visit_i32_rotr(&mut self) {
|
1129
|
+
use OperandSize::*;
|
1130
|
+
use ShiftKind::*;
|
1131
|
+
|
1132
|
+
self.masm.shift(&mut self.context, Rotr, S32);
|
1133
|
+
}
|
1134
|
+
|
1135
|
+
fn visit_i64_rotr(&mut self) {
|
1136
|
+
use OperandSize::*;
|
1137
|
+
use ShiftKind::*;
|
1138
|
+
|
1139
|
+
self.masm.shift(&mut self.context, Rotr, S64);
|
1140
|
+
}
|
1141
|
+
|
1142
|
+
fn visit_end(&mut self) {
|
1143
|
+
if !self.context.reachable {
|
1144
|
+
self.handle_unreachable_end();
|
1145
|
+
} else {
|
1146
|
+
let mut control = self.control_frames.pop().unwrap();
|
1147
|
+
control.emit_end(self.masm, &mut self.context);
|
1148
|
+
}
|
1149
|
+
}
|
1150
|
+
|
1151
|
+
fn visit_i32_popcnt(&mut self) {
|
1152
|
+
use OperandSize::*;
|
1153
|
+
self.masm.popcnt(&mut self.context, S32);
|
1154
|
+
}
|
1155
|
+
|
1156
|
+
fn visit_i64_popcnt(&mut self) {
|
1157
|
+
use OperandSize::*;
|
1158
|
+
|
1159
|
+
self.masm.popcnt(&mut self.context, S64);
|
1160
|
+
}
|
1161
|
+
|
1162
|
+
fn visit_i32_wrap_i64(&mut self) {
|
1163
|
+
use OperandSize::*;
|
1164
|
+
|
1165
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, _size| {
|
1166
|
+
masm.wrap(reg, reg);
|
1167
|
+
TypedReg::i32(reg)
|
1168
|
+
});
|
1169
|
+
}
|
1170
|
+
|
1171
|
+
fn visit_i64_extend_i32_s(&mut self) {
|
1172
|
+
use OperandSize::*;
|
1173
|
+
|
1174
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, _size| {
|
1175
|
+
masm.extend(reg, reg, ExtendKind::I64ExtendI32S);
|
1176
|
+
TypedReg::i64(reg)
|
1177
|
+
});
|
1178
|
+
}
|
1179
|
+
|
1180
|
+
fn visit_i64_extend_i32_u(&mut self) {
|
1181
|
+
use OperandSize::*;
|
1182
|
+
|
1183
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, _size| {
|
1184
|
+
masm.extend(reg, reg, ExtendKind::I64ExtendI32U);
|
1185
|
+
TypedReg::i64(reg)
|
1186
|
+
});
|
1187
|
+
}
|
1188
|
+
|
1189
|
+
fn visit_i32_extend8_s(&mut self) {
|
1190
|
+
use OperandSize::*;
|
1191
|
+
|
1192
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, _size| {
|
1193
|
+
masm.extend(reg, reg, ExtendKind::I32Extend8S);
|
1194
|
+
TypedReg::i32(reg)
|
1195
|
+
});
|
1196
|
+
}
|
1197
|
+
|
1198
|
+
fn visit_i32_extend16_s(&mut self) {
|
1199
|
+
use OperandSize::*;
|
1200
|
+
|
1201
|
+
self.context.unop(self.masm, S32, &mut |masm, reg, _size| {
|
1202
|
+
masm.extend(reg, reg, ExtendKind::I32Extend16S);
|
1203
|
+
TypedReg::i32(reg)
|
1204
|
+
});
|
1205
|
+
}
|
1206
|
+
|
1207
|
+
fn visit_i64_extend8_s(&mut self) {
|
1208
|
+
use OperandSize::*;
|
1209
|
+
|
1210
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, _size| {
|
1211
|
+
masm.extend(reg, reg, ExtendKind::I64Extend8S);
|
1212
|
+
TypedReg::i64(reg)
|
1213
|
+
});
|
1214
|
+
}
|
1215
|
+
|
1216
|
+
fn visit_i64_extend16_s(&mut self) {
|
1217
|
+
use OperandSize::*;
|
1218
|
+
|
1219
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, _size| {
|
1220
|
+
masm.extend(reg, reg, ExtendKind::I64Extend16S);
|
1221
|
+
TypedReg::i64(reg)
|
1222
|
+
});
|
1223
|
+
}
|
1224
|
+
|
1225
|
+
fn visit_i64_extend32_s(&mut self) {
|
1226
|
+
use OperandSize::*;
|
1227
|
+
|
1228
|
+
self.context.unop(self.masm, S64, &mut |masm, reg, _size| {
|
1229
|
+
masm.extend(reg, reg, ExtendKind::I64Extend32S);
|
1230
|
+
TypedReg::i64(reg)
|
1231
|
+
});
|
1232
|
+
}
|
1233
|
+
|
1234
|
+
fn visit_i32_trunc_f32_s(&mut self) {
|
1235
|
+
use OperandSize::*;
|
1236
|
+
|
1237
|
+
self.context
|
1238
|
+
.convert_op(self.masm, WasmValType::I32, |masm, dst, src, dst_size| {
|
1239
|
+
masm.signed_truncate(src, dst, S32, dst_size, TruncKind::Unchecked);
|
1240
|
+
});
|
1241
|
+
}
|
1242
|
+
|
1243
|
+
fn visit_i32_trunc_f32_u(&mut self) {
|
1244
|
+
use OperandSize::*;
|
1245
|
+
|
1246
|
+
self.context.convert_op_with_tmp_reg(
|
1247
|
+
self.masm,
|
1248
|
+
WasmValType::I32,
|
1249
|
+
RegClass::Float,
|
1250
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
1251
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S32, dst_size, TruncKind::Unchecked);
|
1252
|
+
},
|
1253
|
+
);
|
1254
|
+
}
|
1255
|
+
|
1256
|
+
fn visit_i32_trunc_f64_s(&mut self) {
|
1257
|
+
use OperandSize::*;
|
1258
|
+
|
1259
|
+
self.context
|
1260
|
+
.convert_op(self.masm, WasmValType::I32, |masm, dst, src, dst_size| {
|
1261
|
+
masm.signed_truncate(src, dst, S64, dst_size, TruncKind::Unchecked);
|
1262
|
+
});
|
1263
|
+
}
|
1264
|
+
|
1265
|
+
fn visit_i32_trunc_f64_u(&mut self) {
|
1266
|
+
use OperandSize::*;
|
1267
|
+
|
1268
|
+
self.context.convert_op_with_tmp_reg(
|
1269
|
+
self.masm,
|
1270
|
+
WasmValType::I32,
|
1271
|
+
RegClass::Float,
|
1272
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
1273
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S64, dst_size, TruncKind::Unchecked);
|
1274
|
+
},
|
1275
|
+
);
|
1276
|
+
}
|
1277
|
+
|
1278
|
+
fn visit_i64_trunc_f32_s(&mut self) {
|
1279
|
+
use OperandSize::*;
|
1280
|
+
|
1281
|
+
self.context
|
1282
|
+
.convert_op(self.masm, WasmValType::I64, |masm, dst, src, dst_size| {
|
1283
|
+
masm.signed_truncate(src, dst, S32, dst_size, TruncKind::Unchecked);
|
1284
|
+
});
|
1285
|
+
}
|
1286
|
+
|
1287
|
+
fn visit_i64_trunc_f32_u(&mut self) {
|
1288
|
+
use OperandSize::*;
|
1289
|
+
|
1290
|
+
self.context.convert_op_with_tmp_reg(
|
1291
|
+
self.masm,
|
1292
|
+
WasmValType::I64,
|
1293
|
+
RegClass::Float,
|
1294
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
1295
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S32, dst_size, TruncKind::Unchecked);
|
1296
|
+
},
|
1297
|
+
);
|
1298
|
+
}
|
1299
|
+
|
1300
|
+
fn visit_i64_trunc_f64_s(&mut self) {
|
1301
|
+
use OperandSize::*;
|
1302
|
+
|
1303
|
+
self.context
|
1304
|
+
.convert_op(self.masm, WasmValType::I64, |masm, dst, src, dst_size| {
|
1305
|
+
masm.signed_truncate(src, dst, S64, dst_size, TruncKind::Unchecked);
|
1306
|
+
});
|
1307
|
+
}
|
1308
|
+
|
1309
|
+
fn visit_i64_trunc_f64_u(&mut self) {
|
1310
|
+
use OperandSize::*;
|
1311
|
+
|
1312
|
+
self.context.convert_op_with_tmp_reg(
|
1313
|
+
self.masm,
|
1314
|
+
WasmValType::I64,
|
1315
|
+
RegClass::Float,
|
1316
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
1317
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S64, dst_size, TruncKind::Unchecked);
|
1318
|
+
},
|
1319
|
+
);
|
1320
|
+
}
|
1321
|
+
|
1322
|
+
fn visit_i32_reinterpret_f32(&mut self) {
|
1323
|
+
self.context
|
1324
|
+
.convert_op(self.masm, WasmValType::I32, |masm, dst, src, size| {
|
1325
|
+
masm.reinterpret_float_as_int(src.into(), dst, size);
|
1326
|
+
});
|
1327
|
+
}
|
1328
|
+
|
1329
|
+
fn visit_i64_reinterpret_f64(&mut self) {
|
1330
|
+
self.context
|
1331
|
+
.convert_op(self.masm, WasmValType::I64, |masm, dst, src, size| {
|
1332
|
+
masm.reinterpret_float_as_int(src.into(), dst, size);
|
1333
|
+
});
|
1334
|
+
}
|
1335
|
+
|
1336
|
+
fn visit_local_get(&mut self, index: u32) {
|
1337
|
+
use WasmValType::*;
|
1338
|
+
let context = &mut self.context;
|
1339
|
+
let slot = context.frame.get_wasm_local(index);
|
1340
|
+
match slot.ty {
|
1341
|
+
I32 | I64 | F32 | F64 => context.stack.push(Val::local(index, slot.ty)),
|
1342
|
+
Ref(rt) => match rt.heap_type {
|
1343
|
+
WasmHeapType::Func => context.stack.push(Val::local(index, slot.ty)),
|
1344
|
+
ht => unimplemented!("Support for WasmHeapType: {ht}"),
|
1345
|
+
},
|
1346
|
+
t => unimplemented!("Support local type: {t}"),
|
1347
|
+
}
|
1348
|
+
}
|
1349
|
+
|
1350
|
+
fn visit_local_set(&mut self, index: u32) {
|
1351
|
+
let src = self.emit_set_local(index);
|
1352
|
+
self.context.free_reg(src);
|
1353
|
+
}
|
1354
|
+
|
1355
|
+
fn visit_call(&mut self, index: u32) {
|
1356
|
+
let callee = self.env.callee_from_index(FuncIndex::from_u32(index));
|
1357
|
+
FnCall::emit::<M>(&mut self.env, self.masm, &mut self.context, callee)
|
1358
|
+
}
|
1359
|
+
|
1360
|
+
fn visit_call_indirect(&mut self, type_index: u32, table_index: u32, _: u8) {
|
1361
|
+
// Spill now because `emit_lazy_init_funcref` and the `FnCall::emit`
|
1362
|
+
// invocations will both trigger spills since they both call functions.
|
1363
|
+
// However, the machine instructions for the spill emitted by
|
1364
|
+
// `emit_lazy_funcref` will be jumped over if the funcref was previously
|
1365
|
+
// initialized which may result in the machine stack becoming
|
1366
|
+
// unbalanced.
|
1367
|
+
self.context.spill(self.masm);
|
1368
|
+
|
1369
|
+
let type_index = TypeIndex::from_u32(type_index);
|
1370
|
+
let table_index = TableIndex::from_u32(table_index);
|
1371
|
+
|
1372
|
+
self.emit_lazy_init_funcref(table_index);
|
1373
|
+
|
1374
|
+
// Perform the indirect call.
|
1375
|
+
// This code assumes that [`Self::emit_lazy_init_funcref`] will
|
1376
|
+
// push the funcref to the value stack.
|
1377
|
+
match self.env.translation.module.table_plans[table_index].style {
|
1378
|
+
TableStyle::CallerChecksSignature => {
|
1379
|
+
let funcref_ptr = self.context.stack.peek().map(|v| v.unwrap_reg()).unwrap();
|
1380
|
+
self.masm
|
1381
|
+
.trapz(funcref_ptr.into(), TrapCode::IndirectCallToNull);
|
1382
|
+
self.emit_typecheck_funcref(funcref_ptr.into(), type_index);
|
1383
|
+
}
|
1384
|
+
}
|
1385
|
+
|
1386
|
+
let callee = self.env.funcref(type_index);
|
1387
|
+
FnCall::emit::<M>(&mut self.env, self.masm, &mut self.context, callee)
|
1388
|
+
}
|
1389
|
+
|
1390
|
+
fn visit_table_init(&mut self, elem: u32, table: u32) {
|
1391
|
+
debug_assert!(self.context.stack.len() >= 3);
|
1392
|
+
let at = self.context.stack.len() - 3;
|
1393
|
+
|
1394
|
+
self.context
|
1395
|
+
.stack
|
1396
|
+
.insert_many(at, &[table.try_into().unwrap(), elem.try_into().unwrap()]);
|
1397
|
+
|
1398
|
+
let builtin = self.env.builtins.table_init::<M::ABI, M::Ptr>();
|
1399
|
+
FnCall::emit::<M>(
|
1400
|
+
&mut self.env,
|
1401
|
+
self.masm,
|
1402
|
+
&mut self.context,
|
1403
|
+
Callee::Builtin(builtin.clone()),
|
1404
|
+
)
|
1405
|
+
}
|
1406
|
+
|
1407
|
+
fn visit_table_copy(&mut self, dst: u32, src: u32) {
|
1408
|
+
debug_assert!(self.context.stack.len() >= 3);
|
1409
|
+
let at = self.context.stack.len() - 3;
|
1410
|
+
self.context
|
1411
|
+
.stack
|
1412
|
+
.insert_many(at, &[dst.try_into().unwrap(), src.try_into().unwrap()]);
|
1413
|
+
|
1414
|
+
let builtin = self.env.builtins.table_copy::<M::ABI, M::Ptr>();
|
1415
|
+
FnCall::emit::<M>(
|
1416
|
+
&mut self.env,
|
1417
|
+
self.masm,
|
1418
|
+
&mut self.context,
|
1419
|
+
Callee::Builtin(builtin),
|
1420
|
+
)
|
1421
|
+
}
|
1422
|
+
|
1423
|
+
fn visit_table_get(&mut self, table: u32) {
|
1424
|
+
let table_index = TableIndex::from_u32(table);
|
1425
|
+
let plan = self.env.table_plan(table_index);
|
1426
|
+
let heap_type = plan.table.wasm_ty.heap_type;
|
1427
|
+
let style = &plan.style;
|
1428
|
+
|
1429
|
+
match heap_type {
|
1430
|
+
WasmHeapType::Func => match style {
|
1431
|
+
TableStyle::CallerChecksSignature => self.emit_lazy_init_funcref(table_index),
|
1432
|
+
},
|
1433
|
+
t => unimplemented!("Support for WasmHeapType: {t}"),
|
1434
|
+
}
|
1435
|
+
}
|
1436
|
+
|
1437
|
+
fn visit_table_grow(&mut self, table: u32) {
|
1438
|
+
let table_index = TableIndex::from_u32(table);
|
1439
|
+
let table_plan = self.env.table_plan(table_index);
|
1440
|
+
let builtin = match table_plan.table.wasm_ty.heap_type {
|
1441
|
+
WasmHeapType::Func => self.env.builtins.table_grow_func_ref::<M::ABI, M::Ptr>(),
|
1442
|
+
ty => unimplemented!("Support for HeapType: {ty}"),
|
1443
|
+
};
|
1444
|
+
|
1445
|
+
let len = self.context.stack.len();
|
1446
|
+
// table.grow` requires at least 2 elements on the value stack.
|
1447
|
+
debug_assert!(len >= 2);
|
1448
|
+
let at = len - 2;
|
1449
|
+
|
1450
|
+
// The table_grow builtin expects the parameters in a different
|
1451
|
+
// order.
|
1452
|
+
// The value stack at this point should contain:
|
1453
|
+
// [ init_value | delta ] (stack top)
|
1454
|
+
// but the builtin function expects the init value as the last
|
1455
|
+
// argument.
|
1456
|
+
self.context.stack.inner_mut().swap(len - 1, len - 2);
|
1457
|
+
self.context
|
1458
|
+
.stack
|
1459
|
+
.insert_many(at, &[table.try_into().unwrap()]);
|
1460
|
+
|
1461
|
+
FnCall::emit::<M>(
|
1462
|
+
&mut self.env,
|
1463
|
+
self.masm,
|
1464
|
+
&mut self.context,
|
1465
|
+
Callee::Builtin(builtin.clone()),
|
1466
|
+
)
|
1467
|
+
}
|
1468
|
+
|
1469
|
+
fn visit_table_size(&mut self, table: u32) {
|
1470
|
+
let table_index = TableIndex::from_u32(table);
|
1471
|
+
let table_data = self.env.resolve_table_data(table_index);
|
1472
|
+
self.emit_compute_table_size(&table_data);
|
1473
|
+
}
|
1474
|
+
|
1475
|
+
fn visit_table_fill(&mut self, table: u32) {
|
1476
|
+
let table_index = TableIndex::from_u32(table);
|
1477
|
+
let table_plan = self.env.table_plan(table_index);
|
1478
|
+
let builtin = match table_plan.table.wasm_ty.heap_type {
|
1479
|
+
WasmHeapType::Func => self.env.builtins.table_fill_func_ref::<M::ABI, M::Ptr>(),
|
1480
|
+
ty => unimplemented!("Support for heap type: {ty}"),
|
1481
|
+
};
|
1482
|
+
|
1483
|
+
let len = self.context.stack.len();
|
1484
|
+
debug_assert!(len >= 3);
|
1485
|
+
let at = len - 3;
|
1486
|
+
self.context
|
1487
|
+
.stack
|
1488
|
+
.insert_many(at, &[table.try_into().unwrap()]);
|
1489
|
+
FnCall::emit::<M>(
|
1490
|
+
&mut self.env,
|
1491
|
+
self.masm,
|
1492
|
+
&mut self.context,
|
1493
|
+
Callee::Builtin(builtin.clone()),
|
1494
|
+
)
|
1495
|
+
}
|
1496
|
+
|
1497
|
+
fn visit_table_set(&mut self, table: u32) {
|
1498
|
+
let ptr_type = self.env.ptr_type();
|
1499
|
+
let table_index = TableIndex::from_u32(table);
|
1500
|
+
let table_data = self.env.resolve_table_data(table_index);
|
1501
|
+
let plan = self.env.table_plan(table_index);
|
1502
|
+
match plan.table.wasm_ty.heap_type {
|
1503
|
+
WasmHeapType::Func => match plan.style {
|
1504
|
+
TableStyle::CallerChecksSignature => {
|
1505
|
+
let value = self.context.pop_to_reg(self.masm, None);
|
1506
|
+
let index = self.context.pop_to_reg(self.masm, None);
|
1507
|
+
let base = self.context.any_gpr(self.masm);
|
1508
|
+
let elem_addr =
|
1509
|
+
self.emit_compute_table_elem_addr(index.into(), base, &table_data);
|
1510
|
+
// Set the initialized bit.
|
1511
|
+
self.masm.or(
|
1512
|
+
value.into(),
|
1513
|
+
value.into(),
|
1514
|
+
RegImm::i64(FUNCREF_INIT_BIT as i64),
|
1515
|
+
ptr_type.into(),
|
1516
|
+
);
|
1517
|
+
|
1518
|
+
self.masm.store_ptr(value.into(), elem_addr);
|
1519
|
+
|
1520
|
+
self.context.free_reg(value);
|
1521
|
+
self.context.free_reg(index);
|
1522
|
+
self.context.free_reg(base);
|
1523
|
+
}
|
1524
|
+
},
|
1525
|
+
ty => unimplemented!("Support for WasmHeapType: {ty}"),
|
1526
|
+
};
|
1527
|
+
}
|
1528
|
+
|
1529
|
+
fn visit_elem_drop(&mut self, index: u32) {
|
1530
|
+
let elem_drop = self.env.builtins.elem_drop::<M::ABI, M::Ptr>();
|
1531
|
+
self.context.stack.extend([index.try_into().unwrap()]);
|
1532
|
+
FnCall::emit::<M>(
|
1533
|
+
&mut self.env,
|
1534
|
+
self.masm,
|
1535
|
+
&mut self.context,
|
1536
|
+
Callee::Builtin(elem_drop),
|
1537
|
+
)
|
1538
|
+
}
|
1539
|
+
|
1540
|
+
fn visit_memory_init(&mut self, data_index: u32, mem: u32) {
|
1541
|
+
debug_assert!(self.context.stack.len() >= 3);
|
1542
|
+
let at = self.context.stack.len() - 3;
|
1543
|
+
self.context.stack.insert_many(
|
1544
|
+
at,
|
1545
|
+
&[mem.try_into().unwrap(), data_index.try_into().unwrap()],
|
1546
|
+
);
|
1547
|
+
let builtin = self.env.builtins.memory_init::<M::ABI, M::Ptr>();
|
1548
|
+
FnCall::emit::<M>(
|
1549
|
+
&mut self.env,
|
1550
|
+
self.masm,
|
1551
|
+
&mut self.context,
|
1552
|
+
Callee::Builtin(builtin),
|
1553
|
+
)
|
1554
|
+
}
|
1555
|
+
|
1556
|
+
fn visit_memory_copy(&mut self, dst_mem: u32, src_mem: u32) {
|
1557
|
+
// At this point, the stack is expected to contain:
|
1558
|
+
// [ dst_offset, src_offset, len ]
|
1559
|
+
// The following code inserts the missing params, so that stack contains:
|
1560
|
+
// [ vmctx, dst_mem, dst_offset, src_mem, src_offset, len ]
|
1561
|
+
// Which is the order expected by the builtin function.
|
1562
|
+
debug_assert!(self.context.stack.len() >= 3);
|
1563
|
+
let at = self.context.stack.len() - 2;
|
1564
|
+
self.context
|
1565
|
+
.stack
|
1566
|
+
.insert_many(at, &[src_mem.try_into().unwrap()]);
|
1567
|
+
|
1568
|
+
// One element was inserted above, so instead of 3, we use 4.
|
1569
|
+
let at = self.context.stack.len() - 4;
|
1570
|
+
self.context
|
1571
|
+
.stack
|
1572
|
+
.insert_many(at, &[dst_mem.try_into().unwrap()]);
|
1573
|
+
|
1574
|
+
let builtin = self.env.builtins.memory_copy::<M::ABI, M::Ptr>();
|
1575
|
+
|
1576
|
+
FnCall::emit::<M>(
|
1577
|
+
&mut self.env,
|
1578
|
+
self.masm,
|
1579
|
+
&mut self.context,
|
1580
|
+
Callee::Builtin(builtin),
|
1581
|
+
)
|
1582
|
+
}
|
1583
|
+
|
1584
|
+
fn visit_memory_fill(&mut self, mem: u32) {
|
1585
|
+
debug_assert!(self.context.stack.len() >= 3);
|
1586
|
+
let at = self.context.stack.len() - 3;
|
1587
|
+
|
1588
|
+
self.context
|
1589
|
+
.stack
|
1590
|
+
.insert_many(at, &[mem.try_into().unwrap()]);
|
1591
|
+
|
1592
|
+
let builtin = self.env.builtins.memory_fill::<M::ABI, M::Ptr>();
|
1593
|
+
FnCall::emit::<M>(
|
1594
|
+
&mut self.env,
|
1595
|
+
self.masm,
|
1596
|
+
&mut self.context,
|
1597
|
+
Callee::Builtin(builtin),
|
1598
|
+
)
|
1599
|
+
}
|
1600
|
+
|
1601
|
+
fn visit_memory_size(&mut self, mem: u32, _: u8) {
|
1602
|
+
let heap = self.env.resolve_heap(MemoryIndex::from_u32(mem));
|
1603
|
+
self.emit_compute_memory_size(&heap);
|
1604
|
+
}
|
1605
|
+
|
1606
|
+
fn visit_memory_grow(&mut self, mem: u32, _: u8) {
|
1607
|
+
debug_assert!(self.context.stack.len() >= 1);
|
1608
|
+
// The stack at this point contains: [ delta ]
|
1609
|
+
// The desired state is
|
1610
|
+
// [ vmctx, delta, index ]
|
1611
|
+
self.context.stack.extend([mem.try_into().unwrap()]);
|
1612
|
+
|
1613
|
+
let heap = self.env.resolve_heap(MemoryIndex::from_u32(mem));
|
1614
|
+
let builtin = self.env.builtins.memory32_grow::<M::ABI, M::Ptr>();
|
1615
|
+
FnCall::emit::<M>(
|
1616
|
+
&mut self.env,
|
1617
|
+
self.masm,
|
1618
|
+
&mut self.context,
|
1619
|
+
Callee::Builtin(builtin),
|
1620
|
+
);
|
1621
|
+
|
1622
|
+
// The memory32_grow builtin returns a pointer type, therefore we must
|
1623
|
+
// ensure that the return type is representative of the address space of
|
1624
|
+
// the heap type.
|
1625
|
+
match (self.env.ptr_type(), heap.ty) {
|
1626
|
+
(WasmValType::I64, WasmValType::I64) => {}
|
1627
|
+
// When the heap type is smaller than the pointer type, we adjust
|
1628
|
+
// the result of the memory32_grow builtin.
|
1629
|
+
(WasmValType::I64, WasmValType::I32) => {
|
1630
|
+
let top: Reg = self.context.pop_to_reg(self.masm, None).into();
|
1631
|
+
self.masm.wrap(top.into(), top.into());
|
1632
|
+
self.context.stack.push(TypedReg::i32(top).into());
|
1633
|
+
}
|
1634
|
+
_ => unimplemented!("Support for 32-bit platforms"),
|
1635
|
+
}
|
1636
|
+
}
|
1637
|
+
|
1638
|
+
fn visit_data_drop(&mut self, data_index: u32) {
|
1639
|
+
self.context.stack.extend([data_index.try_into().unwrap()]);
|
1640
|
+
|
1641
|
+
let builtin = self.env.builtins.data_drop::<M::ABI, M::Ptr>();
|
1642
|
+
FnCall::emit::<M>(
|
1643
|
+
&mut self.env,
|
1644
|
+
self.masm,
|
1645
|
+
&mut self.context,
|
1646
|
+
Callee::Builtin(builtin),
|
1647
|
+
)
|
1648
|
+
}
|
1649
|
+
|
1650
|
+
fn visit_nop(&mut self) {}
|
1651
|
+
|
1652
|
+
fn visit_if(&mut self, blockty: BlockType) {
|
1653
|
+
self.control_frames.push(ControlStackFrame::r#if(
|
1654
|
+
self.env.resolve_block_sig(blockty),
|
1655
|
+
self.masm,
|
1656
|
+
&mut self.context,
|
1657
|
+
));
|
1658
|
+
}
|
1659
|
+
|
1660
|
+
fn visit_else(&mut self) {
|
1661
|
+
if !self.context.reachable {
|
1662
|
+
self.handle_unreachable_else();
|
1663
|
+
} else {
|
1664
|
+
let control = self
|
1665
|
+
.control_frames
|
1666
|
+
.last_mut()
|
1667
|
+
.unwrap_or_else(|| panic!("Expected active control stack frame for else"));
|
1668
|
+
control.emit_else(self.masm, &mut self.context);
|
1669
|
+
}
|
1670
|
+
}
|
1671
|
+
|
1672
|
+
fn visit_block(&mut self, blockty: BlockType) {
|
1673
|
+
self.control_frames.push(ControlStackFrame::block(
|
1674
|
+
self.env.resolve_block_sig(blockty),
|
1675
|
+
self.masm,
|
1676
|
+
&mut self.context,
|
1677
|
+
));
|
1678
|
+
}
|
1679
|
+
|
1680
|
+
fn visit_loop(&mut self, blockty: BlockType) {
|
1681
|
+
self.control_frames.push(ControlStackFrame::r#loop(
|
1682
|
+
self.env.resolve_block_sig(blockty),
|
1683
|
+
self.masm,
|
1684
|
+
&mut self.context,
|
1685
|
+
));
|
1686
|
+
}
|
1687
|
+
|
1688
|
+
fn visit_br(&mut self, depth: u32) {
|
1689
|
+
let index = control_index(depth, self.control_frames.len());
|
1690
|
+
let frame = &mut self.control_frames[index];
|
1691
|
+
self.context
|
1692
|
+
.unconditional_jump(frame, self.masm, |masm, cx, frame| {
|
1693
|
+
frame
|
1694
|
+
.pop_abi_results::<M, _>(cx, masm, |results, _, _| results.ret_area().copied());
|
1695
|
+
});
|
1696
|
+
}
|
1697
|
+
|
1698
|
+
fn visit_br_if(&mut self, depth: u32) {
|
1699
|
+
let index = control_index(depth, self.control_frames.len());
|
1700
|
+
let frame = &mut self.control_frames[index];
|
1701
|
+
frame.set_as_target();
|
1702
|
+
|
1703
|
+
let top = {
|
1704
|
+
let top = self.context.without::<TypedReg, M, _>(
|
1705
|
+
frame.results::<M>().regs(),
|
1706
|
+
self.masm,
|
1707
|
+
|ctx, masm| ctx.pop_to_reg(masm, None),
|
1708
|
+
);
|
1709
|
+
frame.top_abi_results::<M, _>(
|
1710
|
+
&mut self.context,
|
1711
|
+
self.masm,
|
1712
|
+
|results, context, masm| {
|
1713
|
+
// In the case of `br_if` theres a possibility that we'll
|
1714
|
+
// exit early from the block or falltrough, for
|
1715
|
+
// a falltrough, we cannot rely on the pre-computed return area;
|
1716
|
+
// it must be recalculated so that any values that are
|
1717
|
+
// generated are correctly placed near the current stack
|
1718
|
+
// pointer.
|
1719
|
+
results.on_stack().then(|| {
|
1720
|
+
let stack_consumed = context.stack.sizeof(results.stack_operands_len());
|
1721
|
+
let base = masm.sp_offset().as_u32() - stack_consumed;
|
1722
|
+
let offs = base + results.size();
|
1723
|
+
RetArea::sp(SPOffset::from_u32(offs))
|
1724
|
+
})
|
1725
|
+
},
|
1726
|
+
);
|
1727
|
+
top
|
1728
|
+
};
|
1729
|
+
|
1730
|
+
// Emit instructions to balance the machine stack if the frame has
|
1731
|
+
// a different offset.
|
1732
|
+
let current_sp_offset = self.masm.sp_offset();
|
1733
|
+
let results_size = frame.results::<M>().size();
|
1734
|
+
let state = frame.stack_state();
|
1735
|
+
let (label, cmp, needs_cleanup) = if current_sp_offset > state.target_offset {
|
1736
|
+
(self.masm.get_label(), IntCmpKind::Eq, true)
|
1737
|
+
} else {
|
1738
|
+
(*frame.label(), IntCmpKind::Ne, false)
|
1739
|
+
};
|
1740
|
+
|
1741
|
+
self.masm
|
1742
|
+
.branch(cmp, top.reg.into(), top.reg.into(), label, OperandSize::S32);
|
1743
|
+
self.context.free_reg(top);
|
1744
|
+
|
1745
|
+
if needs_cleanup {
|
1746
|
+
// Emit instructions to balance the stack and jump if not falling
|
1747
|
+
// through.
|
1748
|
+
self.masm.memmove(
|
1749
|
+
current_sp_offset,
|
1750
|
+
state.target_offset,
|
1751
|
+
results_size,
|
1752
|
+
MemMoveDirection::LowToHigh,
|
1753
|
+
);
|
1754
|
+
self.masm.ensure_sp_for_jump(state.target_offset);
|
1755
|
+
self.masm.jmp(*frame.label());
|
1756
|
+
|
1757
|
+
// Restore sp_offset to what it was for falling through and emit
|
1758
|
+
// fallthrough label.
|
1759
|
+
self.masm.reset_stack_pointer(current_sp_offset);
|
1760
|
+
self.masm.bind(label);
|
1761
|
+
}
|
1762
|
+
}
|
1763
|
+
|
1764
|
+
fn visit_br_table(&mut self, targets: BrTable<'a>) {
|
1765
|
+
// +1 to account for the default target.
|
1766
|
+
let len = targets.len() + 1;
|
1767
|
+
// SmallVec<[_; 5]> to match the binary emission layer (e.g
|
1768
|
+
// see `JmpTableSeq'), but here we use 5 instead since we
|
1769
|
+
// bundle the default target as the last element in the array.
|
1770
|
+
let labels: SmallVec<[_; 5]> = (0..len).map(|_| self.masm.get_label()).collect();
|
1771
|
+
|
1772
|
+
let default_index = control_index(targets.default(), self.control_frames.len());
|
1773
|
+
let default_frame = &mut self.control_frames[default_index];
|
1774
|
+
let default_result = default_frame.results::<M>();
|
1775
|
+
|
1776
|
+
let (index, tmp) = {
|
1777
|
+
let index_and_tmp = self.context.without::<(TypedReg, _), M, _>(
|
1778
|
+
default_result.regs(),
|
1779
|
+
self.masm,
|
1780
|
+
|cx, masm| (cx.pop_to_reg(masm, None), cx.any_gpr(masm)),
|
1781
|
+
);
|
1782
|
+
|
1783
|
+
// Materialize any constants or locals into their result representation,
|
1784
|
+
// so that when reachability is restored, they are correctly located.
|
1785
|
+
default_frame.top_abi_results::<M, _>(&mut self.context, self.masm, |results, _, _| {
|
1786
|
+
results.ret_area().copied()
|
1787
|
+
});
|
1788
|
+
index_and_tmp
|
1789
|
+
};
|
1790
|
+
|
1791
|
+
self.masm.jmp_table(&labels, index.into(), tmp);
|
1792
|
+
// Save the original stack pointer offset; we will reset the stack
|
1793
|
+
// pointer to this offset after jumping to each of the targets. Each
|
1794
|
+
// jump might adjust the stack according to the base offset of the
|
1795
|
+
// target.
|
1796
|
+
let current_sp = self.masm.sp_offset();
|
1797
|
+
|
1798
|
+
for (t, l) in targets
|
1799
|
+
.targets()
|
1800
|
+
.into_iter()
|
1801
|
+
.chain(std::iter::once(Ok(targets.default())))
|
1802
|
+
.zip(labels.iter())
|
1803
|
+
{
|
1804
|
+
let control_index = control_index(t.unwrap(), self.control_frames.len());
|
1805
|
+
let frame = &mut self.control_frames[control_index];
|
1806
|
+
// Reset the stack pointer to its original offset. This is needed
|
1807
|
+
// because each jump will potentially adjust the stack pointer
|
1808
|
+
// according to the base offset of the target.
|
1809
|
+
self.masm.reset_stack_pointer(current_sp);
|
1810
|
+
|
1811
|
+
// NB: We don't perform any result handling as it was
|
1812
|
+
// already taken care of above before jumping to the
|
1813
|
+
// jump table.
|
1814
|
+
self.masm.bind(*l);
|
1815
|
+
// Ensure that the stack pointer is correctly positioned before
|
1816
|
+
// jumping to the jump table code.
|
1817
|
+
let state = frame.stack_state();
|
1818
|
+
self.masm.ensure_sp_for_jump(state.target_offset);
|
1819
|
+
self.masm.jmp(*frame.label());
|
1820
|
+
frame.set_as_target();
|
1821
|
+
}
|
1822
|
+
// Finally reset the stack pointer to the original location.
|
1823
|
+
// The reachability analysis, will ensure it's correctly located
|
1824
|
+
// once reachability is restored.
|
1825
|
+
self.masm.reset_stack_pointer(current_sp);
|
1826
|
+
self.context.reachable = false;
|
1827
|
+
self.context.free_reg(index.reg);
|
1828
|
+
self.context.free_reg(tmp);
|
1829
|
+
}
|
1830
|
+
|
1831
|
+
fn visit_return(&mut self) {
|
1832
|
+
// Grab the outermost frame, which is the function's body
|
1833
|
+
// frame. We don't rely on [`codegen::control_index`] since
|
1834
|
+
// this frame is implicit and we know that it should exist at
|
1835
|
+
// index 0.
|
1836
|
+
let outermost = &mut self.control_frames[0];
|
1837
|
+
self.context
|
1838
|
+
.unconditional_jump(outermost, self.masm, |masm, cx, frame| {
|
1839
|
+
frame
|
1840
|
+
.pop_abi_results::<M, _>(cx, masm, |results, _, _| results.ret_area().copied());
|
1841
|
+
});
|
1842
|
+
}
|
1843
|
+
|
1844
|
+
fn visit_unreachable(&mut self) {
|
1845
|
+
self.masm.unreachable();
|
1846
|
+
self.context.reachable = false;
|
1847
|
+
// Set the implicit outermost frame as target to perform the necessary
|
1848
|
+
// stack clean up.
|
1849
|
+
let outermost = &mut self.control_frames[0];
|
1850
|
+
outermost.set_as_target();
|
1851
|
+
}
|
1852
|
+
|
1853
|
+
fn visit_local_tee(&mut self, index: u32) {
|
1854
|
+
let typed_reg = self.emit_set_local(index);
|
1855
|
+
self.context.stack.push(typed_reg.into());
|
1856
|
+
}
|
1857
|
+
|
1858
|
+
fn visit_global_get(&mut self, global_index: u32) {
|
1859
|
+
let index = GlobalIndex::from_u32(global_index);
|
1860
|
+
let (ty, addr) = self.emit_get_global_addr(index);
|
1861
|
+
let dst = self.context.reg_for_type(ty, self.masm);
|
1862
|
+
self.masm.load(addr, dst, ty.into());
|
1863
|
+
self.context.stack.push(Val::reg(dst, ty));
|
1864
|
+
}
|
1865
|
+
|
1866
|
+
fn visit_global_set(&mut self, global_index: u32) {
|
1867
|
+
let index = GlobalIndex::from_u32(global_index);
|
1868
|
+
let (ty, addr) = self.emit_get_global_addr(index);
|
1869
|
+
|
1870
|
+
let typed_reg = self.context.pop_to_reg(self.masm, None);
|
1871
|
+
self.context.free_reg(typed_reg.reg);
|
1872
|
+
self.masm.store(typed_reg.reg.into(), addr, ty.into());
|
1873
|
+
}
|
1874
|
+
|
1875
|
+
fn visit_drop(&mut self) {
|
1876
|
+
self.context.drop_last(1, |regalloc, val| match val {
|
1877
|
+
Val::Reg(tr) => regalloc.free(tr.reg.into()),
|
1878
|
+
Val::Memory(m) => self.masm.free_stack(m.slot.size),
|
1879
|
+
_ => {}
|
1880
|
+
});
|
1881
|
+
}
|
1882
|
+
|
1883
|
+
fn visit_select(&mut self) {
|
1884
|
+
let cond = self.context.pop_to_reg(self.masm, None);
|
1885
|
+
let val2 = self.context.pop_to_reg(self.masm, None);
|
1886
|
+
let val1 = self.context.pop_to_reg(self.masm, None);
|
1887
|
+
self.masm
|
1888
|
+
.cmp(cond.reg.into(), RegImm::i32(0), OperandSize::S32);
|
1889
|
+
// Conditionally move val1 to val2 if the the comparision is
|
1890
|
+
// not zero.
|
1891
|
+
self.masm
|
1892
|
+
.cmov(val1.into(), val2.into(), IntCmpKind::Ne, val1.ty.into());
|
1893
|
+
self.context.stack.push(val2.into());
|
1894
|
+
self.context.free_reg(val1.reg);
|
1895
|
+
self.context.free_reg(cond);
|
1896
|
+
}
|
1897
|
+
|
1898
|
+
fn visit_i32_load(&mut self, memarg: MemArg) {
|
1899
|
+
self.emit_wasm_load(&memarg, WasmValType::I32, OperandSize::S32, None);
|
1900
|
+
}
|
1901
|
+
|
1902
|
+
fn visit_i32_load8_s(&mut self, memarg: MemArg) {
|
1903
|
+
self.emit_wasm_load(
|
1904
|
+
&memarg,
|
1905
|
+
WasmValType::I32,
|
1906
|
+
OperandSize::S8,
|
1907
|
+
Some(ExtendKind::I32Extend8S),
|
1908
|
+
);
|
1909
|
+
}
|
1910
|
+
|
1911
|
+
fn visit_i32_load8_u(&mut self, memarg: MemArg) {
|
1912
|
+
self.emit_wasm_load(&memarg, WasmValType::I32, OperandSize::S8, None);
|
1913
|
+
}
|
1914
|
+
|
1915
|
+
fn visit_i32_load16_s(&mut self, memarg: MemArg) {
|
1916
|
+
self.emit_wasm_load(
|
1917
|
+
&memarg,
|
1918
|
+
WasmValType::I32,
|
1919
|
+
OperandSize::S16,
|
1920
|
+
Some(ExtendKind::I32Extend16S),
|
1921
|
+
)
|
1922
|
+
}
|
1923
|
+
|
1924
|
+
fn visit_i32_load16_u(&mut self, memarg: MemArg) {
|
1925
|
+
self.emit_wasm_load(&memarg, WasmValType::I32, OperandSize::S16, None)
|
1926
|
+
}
|
1927
|
+
|
1928
|
+
fn visit_i32_store(&mut self, memarg: MemArg) {
|
1929
|
+
self.emit_wasm_store(&memarg, OperandSize::S32);
|
1930
|
+
}
|
1931
|
+
|
1932
|
+
fn visit_i32_store8(&mut self, memarg: MemArg) {
|
1933
|
+
self.emit_wasm_store(&memarg, OperandSize::S8)
|
1934
|
+
}
|
1935
|
+
|
1936
|
+
fn visit_i32_store16(&mut self, memarg: MemArg) {
|
1937
|
+
self.emit_wasm_store(&memarg, OperandSize::S16)
|
1938
|
+
}
|
1939
|
+
|
1940
|
+
fn visit_i64_load8_s(&mut self, memarg: MemArg) {
|
1941
|
+
self.emit_wasm_load(
|
1942
|
+
&memarg,
|
1943
|
+
WasmValType::I64,
|
1944
|
+
OperandSize::S8,
|
1945
|
+
Some(ExtendKind::I64Extend8S),
|
1946
|
+
)
|
1947
|
+
}
|
1948
|
+
|
1949
|
+
fn visit_i64_load8_u(&mut self, memarg: MemArg) {
|
1950
|
+
self.emit_wasm_load(&memarg, WasmValType::I64, OperandSize::S8, None)
|
1951
|
+
}
|
1952
|
+
|
1953
|
+
fn visit_i64_load16_u(&mut self, memarg: MemArg) {
|
1954
|
+
self.emit_wasm_load(&memarg, WasmValType::I64, OperandSize::S16, None)
|
1955
|
+
}
|
1956
|
+
|
1957
|
+
fn visit_i64_load16_s(&mut self, memarg: MemArg) {
|
1958
|
+
self.emit_wasm_load(
|
1959
|
+
&memarg,
|
1960
|
+
WasmValType::I64,
|
1961
|
+
OperandSize::S16,
|
1962
|
+
Some(ExtendKind::I64Extend16S),
|
1963
|
+
)
|
1964
|
+
}
|
1965
|
+
|
1966
|
+
fn visit_i64_load32_u(&mut self, memarg: MemArg) {
|
1967
|
+
self.emit_wasm_load(&memarg, WasmValType::I64, OperandSize::S32, None)
|
1968
|
+
}
|
1969
|
+
|
1970
|
+
fn visit_i64_load32_s(&mut self, memarg: MemArg) {
|
1971
|
+
self.emit_wasm_load(
|
1972
|
+
&memarg,
|
1973
|
+
WasmValType::I64,
|
1974
|
+
OperandSize::S32,
|
1975
|
+
Some(ExtendKind::I64Extend32S),
|
1976
|
+
)
|
1977
|
+
}
|
1978
|
+
|
1979
|
+
fn visit_i64_load(&mut self, memarg: MemArg) {
|
1980
|
+
self.emit_wasm_load(&memarg, WasmValType::I64, OperandSize::S64, None)
|
1981
|
+
}
|
1982
|
+
|
1983
|
+
fn visit_i64_store(&mut self, memarg: MemArg) -> Self::Output {
|
1984
|
+
self.emit_wasm_store(&memarg, OperandSize::S64)
|
1985
|
+
}
|
1986
|
+
|
1987
|
+
fn visit_i64_store8(&mut self, memarg: MemArg) -> Self::Output {
|
1988
|
+
self.emit_wasm_store(&memarg, OperandSize::S8)
|
1989
|
+
}
|
1990
|
+
|
1991
|
+
fn visit_i64_store16(&mut self, memarg: MemArg) -> Self::Output {
|
1992
|
+
self.emit_wasm_store(&memarg, OperandSize::S16)
|
1993
|
+
}
|
1994
|
+
|
1995
|
+
fn visit_i64_store32(&mut self, memarg: MemArg) -> Self::Output {
|
1996
|
+
self.emit_wasm_store(&memarg, OperandSize::S32)
|
1997
|
+
}
|
1998
|
+
|
1999
|
+
fn visit_f32_load(&mut self, memarg: MemArg) {
|
2000
|
+
self.emit_wasm_load(&memarg, WasmValType::F32, OperandSize::S32, None)
|
2001
|
+
}
|
2002
|
+
|
2003
|
+
fn visit_f32_store(&mut self, memarg: MemArg) {
|
2004
|
+
self.emit_wasm_store(&memarg, OperandSize::S32)
|
2005
|
+
}
|
2006
|
+
|
2007
|
+
fn visit_f64_load(&mut self, memarg: MemArg) {
|
2008
|
+
self.emit_wasm_load(&memarg, WasmValType::F64, OperandSize::S64, None)
|
2009
|
+
}
|
2010
|
+
|
2011
|
+
fn visit_f64_store(&mut self, memarg: MemArg) {
|
2012
|
+
self.emit_wasm_store(&memarg, OperandSize::S64)
|
2013
|
+
}
|
2014
|
+
|
2015
|
+
fn visit_i32_trunc_sat_f32_s(&mut self) {
|
2016
|
+
use OperandSize::*;
|
2017
|
+
|
2018
|
+
self.context
|
2019
|
+
.convert_op(self.masm, WasmValType::I32, |masm, dst, src, dst_size| {
|
2020
|
+
masm.signed_truncate(src, dst, S32, dst_size, TruncKind::Checked);
|
2021
|
+
});
|
2022
|
+
}
|
2023
|
+
|
2024
|
+
fn visit_i32_trunc_sat_f32_u(&mut self) {
|
2025
|
+
use OperandSize::*;
|
2026
|
+
|
2027
|
+
self.context.convert_op_with_tmp_reg(
|
2028
|
+
self.masm,
|
2029
|
+
WasmValType::I32,
|
2030
|
+
RegClass::Float,
|
2031
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
2032
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S32, dst_size, TruncKind::Checked);
|
2033
|
+
},
|
2034
|
+
);
|
2035
|
+
}
|
2036
|
+
|
2037
|
+
fn visit_i32_trunc_sat_f64_s(&mut self) {
|
2038
|
+
use OperandSize::*;
|
2039
|
+
|
2040
|
+
self.context
|
2041
|
+
.convert_op(self.masm, WasmValType::I32, |masm, dst, src, dst_size| {
|
2042
|
+
masm.signed_truncate(src, dst, S64, dst_size, TruncKind::Checked);
|
2043
|
+
});
|
2044
|
+
}
|
2045
|
+
|
2046
|
+
fn visit_i32_trunc_sat_f64_u(&mut self) {
|
2047
|
+
use OperandSize::*;
|
2048
|
+
|
2049
|
+
self.context.convert_op_with_tmp_reg(
|
2050
|
+
self.masm,
|
2051
|
+
WasmValType::I32,
|
2052
|
+
RegClass::Float,
|
2053
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
2054
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S64, dst_size, TruncKind::Checked);
|
2055
|
+
},
|
2056
|
+
);
|
2057
|
+
}
|
2058
|
+
|
2059
|
+
fn visit_i64_trunc_sat_f32_s(&mut self) {
|
2060
|
+
use OperandSize::*;
|
2061
|
+
|
2062
|
+
self.context
|
2063
|
+
.convert_op(self.masm, WasmValType::I64, |masm, dst, src, dst_size| {
|
2064
|
+
masm.signed_truncate(src, dst, S32, dst_size, TruncKind::Checked);
|
2065
|
+
});
|
2066
|
+
}
|
2067
|
+
|
2068
|
+
fn visit_i64_trunc_sat_f32_u(&mut self) {
|
2069
|
+
use OperandSize::*;
|
2070
|
+
|
2071
|
+
self.context.convert_op_with_tmp_reg(
|
2072
|
+
self.masm,
|
2073
|
+
WasmValType::I64,
|
2074
|
+
RegClass::Float,
|
2075
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
2076
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S32, dst_size, TruncKind::Checked);
|
2077
|
+
},
|
2078
|
+
);
|
2079
|
+
}
|
2080
|
+
|
2081
|
+
fn visit_i64_trunc_sat_f64_s(&mut self) {
|
2082
|
+
use OperandSize::*;
|
2083
|
+
|
2084
|
+
self.context
|
2085
|
+
.convert_op(self.masm, WasmValType::I64, |masm, dst, src, dst_size| {
|
2086
|
+
masm.signed_truncate(src, dst, S64, dst_size, TruncKind::Checked);
|
2087
|
+
});
|
2088
|
+
}
|
2089
|
+
|
2090
|
+
fn visit_i64_trunc_sat_f64_u(&mut self) {
|
2091
|
+
use OperandSize::*;
|
2092
|
+
|
2093
|
+
self.context.convert_op_with_tmp_reg(
|
2094
|
+
self.masm,
|
2095
|
+
WasmValType::I64,
|
2096
|
+
RegClass::Float,
|
2097
|
+
|masm, dst, src, tmp_fpr, dst_size| {
|
2098
|
+
masm.unsigned_truncate(src, dst, tmp_fpr, S64, dst_size, TruncKind::Checked);
|
2099
|
+
},
|
2100
|
+
);
|
2101
|
+
}
|
2102
|
+
|
2103
|
+
wasmparser::for_each_operator!(def_unsupported);
|
2104
|
+
}
|
2105
|
+
|
2106
|
+
impl<'a, 'translation, 'data, M> CodeGen<'a, 'translation, 'data, M>
|
2107
|
+
where
|
2108
|
+
M: MacroAssembler,
|
2109
|
+
{
|
2110
|
+
fn cmp_i32s(&mut self, kind: IntCmpKind) {
|
2111
|
+
self.context.i32_binop(self.masm, |masm, dst, src, size| {
|
2112
|
+
masm.cmp_with_set(src, dst, kind, size);
|
2113
|
+
TypedReg::i32(dst)
|
2114
|
+
});
|
2115
|
+
}
|
2116
|
+
|
2117
|
+
fn cmp_i64s(&mut self, kind: IntCmpKind) {
|
2118
|
+
self.context
|
2119
|
+
.i64_binop(self.masm, move |masm, dst, src, size| {
|
2120
|
+
masm.cmp_with_set(src, dst, kind, size);
|
2121
|
+
TypedReg::i32(dst) // Return value for comparisons is an `i32`.
|
2122
|
+
});
|
2123
|
+
}
|
2124
|
+
}
|
2125
|
+
|
2126
|
+
impl From<WasmValType> for OperandSize {
|
2127
|
+
fn from(ty: WasmValType) -> OperandSize {
|
2128
|
+
match ty {
|
2129
|
+
WasmValType::I32 | WasmValType::F32 => OperandSize::S32,
|
2130
|
+
WasmValType::I64 | WasmValType::F64 => OperandSize::S64,
|
2131
|
+
WasmValType::Ref(rt) => {
|
2132
|
+
match rt.heap_type {
|
2133
|
+
// TODO: Harcoded size, assuming 64-bit support only. Once
|
2134
|
+
// Wasmtime supports 32-bit architectures, this will need
|
2135
|
+
// to be updated in such a way that the calculation of the
|
2136
|
+
// OperandSize will depend on the target's pointer size.
|
2137
|
+
WasmHeapType::Func => OperandSize::S64,
|
2138
|
+
t => unimplemented!("Support for WasmHeapType: {t}"),
|
2139
|
+
}
|
2140
|
+
}
|
2141
|
+
ty => unimplemented!("Support for WasmValType {ty}"),
|
2142
|
+
}
|
2143
|
+
}
|
2144
|
+
}
|