badline 0.12.0 → 0.13.0

data/lib/badline/drive/sleep.rb

@@ -1,112 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  module Drive
-    # The drive asleep, as Idle and Orbit let it: host_cycle! counts the
-    # host cycles that go by, and waking turns them into drive cycles
-    # through the phase accumulator and runs them. Whole orbits and whole
-    # passes go in bulk, and the rest cycle by cycle, which may find the
-    # idle loop and put the drive back to sleep.
-    #
-    # The drive looks at ATN only when the machine may have moved it, as
-    # it pushes its lines into the bus (IECBus#host_lines=).
-    module Sleep
-      # Whether the drive is skipping its idle loop right now.
-      def asleep? = @asleep
-
-      # Brings the drive up to the present, cycle for cycle, and drops the
-      # pass it was recording and the orbits it found, since whoever called
-      # may change it. Every reader of the drive's parts calls this.
-      def settle!
-        if @asleep
-          wake!
-          @serial_port.latch_host
-          @asleep = false
-          @orbit_cycles = nil
-        end
-        stop_recording if @recording
-        forget_orbits
-      end
-
-      private
-
-      def init_sleep
-        @asleep = false
-        @host_still = false
-        @owed = 0
-        @budget = 0
-        @slept = 0
-        @wake_at = 0
-      end
-
-      # A host cycle asleep that may wake the drive. The next ones need no
-      # look at ATN until the machine pushes its lines again.
-      def doze
-        @host_still = true
-        if @serial_port.atn_moved?
-          settle!
-        elsif @slept == @wake_at
-          wake!
-          @serial_port.latch_host
-          plan_wake if @asleep
-        end
-      end
-
-      # Asleep, host_cycle! counts host cycles, and leaves it to wake! to
-      # turn them into drive cycles through the phase accumulator. This sets
-      # the host cycle that brings the drive cycles owed up to the budget.
-      # On an orbit the drive sleeps until something outside wakes it:
-      # @slept counts from 1, so it never comes to 0.
-      def plan_wake
-        @slept = 0
-        return @wake_at = 0 if @orbit_cycles
-
-        needed = ((@budget - @owed) * @host_clock_hz) - @phase
-        @wake_at = needed.positive? ? (needed + @clock_hz - 1) / @clock_hz : 1
-      end
-
-      # Runs the cycles owed.
-      def wake!
-        phase = @phase + (@slept * @clock_hz)
-        @phase = phase % @host_clock_hz
-        owed = @owed + (phase / @host_clock_hz)
-        @owed = 0
-        @slept = 0
-        catch_up(owed)
-      end
-
-      # Runs +owed+ drive cycles: whole orbits and whole passes in bulk,
-      # passes only up to the budget, and the rest cycle by cycle, which
-      # may put the drive back to sleep.
-      def catch_up(owed)
-        while owed.positive?
-          if @asleep
-            if @orbit_cycles && owed >= @orbit_cycles
-              owed -= skip_orbits(owed / @orbit_cycles)
-              next
-            end
-            @orbit_cycles = nil
-            passes = [owed, @budget].min / @pass_cycles
-            if passes.positive?
-              owed -= skip_passes(passes)
-              next
-            end
-            @asleep = false
-          end
-          run_cycle
-          owed -= 1
-        end
-      end
-
-      # Runs whole passes, moving the counters on. Returns the cycles.
-      def skip_passes(passes)
-        cycles = passes * @pass_cycles
-        @cpu.fast_forward(cycles, passes * @pass_instructions)
-        fast_forward_chips(cycles)
-        @cycles += cycles
-        @budget -= cycles
-        cycles
-      end
-    end
-  end
-end

data/lib/badline/drive/vias.rb

@@ -1,84 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  module Drive
-    # The two VIAs the 1541 and the 1571 share: VIA 1 facing the serial
-    # bus, its CA1 on ATN, and VIA 2 running the GCR Mechanism. A model
-    # includes it beside Core, and it answers Core's, Idle's and Orbit's
-    # questions about the chips: what they hold, how long their counters
-    # leave them quiet, and how to run them a stretch at once. A model with
-    # more chips on its bus runs them in fast_forward_more.
-    module VIAs
-      def via1
-        settle!
-        @via1
-      end
-
-      def via2
-        settle!
-        @via2
-      end
-
-      # Puts in a Disk from the .d64, .g64, .d71 or .g71 image at +path+
-      # (Drive1541::Disk.open), write-protected with `read_only`.
-      def insert_image(path, read_only: false)
-        insert(Drive1541::Disk.open(path, read_only:))
-      end
-
-      # VIA 1's port B as it drives the serial bus. It holds still while the
-      # drive sleeps, so reading it leaves the drive asleep.
-      def serial_output = @via1.port_b_output
-
-      # The serial bus's RESET line reaches the CPU and both VIAs. RAM keeps
-      # its contents.
-      def reset!
-        settle!
-        @via1.reset!
-        @via2.reset!
-        @cpu.reset!
-      end
-
-      private
-
-      # ATN reaches VIA 1's CA1 as the serial port latched it.
-      def hear_atn
-        @via1.ca1 = @serial_port.atn_low?
-      end
-
-      # Whether the drive is doing anything a pass of the idle loop can't
-      # repeat: the motor on, or a VIA pulling IRQ.
-      def busy_for_pass? = @mechanism.motor_on? || @via1.irq? || @via2.irq?
-
-      def quiet_cycles
-        [@via1.quiet_cycles, @via2.quiet_cycles].min
-      end
-
-      def idle_state
-        mechanism = @mechanism
-        [*@cpu.idle_state, *@via1.idle_state, *@via2.idle_state, @bus.data, mechanism.so_pending,
-         *mechanism.idle_state, mechanism.read_a(0xff), mechanism.read_b(0xff)]
-      end
-
-      # The counters an orbit has to bring back (VIA#counter_state).
-      def counter_state(touched)
-        [*@via1.counter_state(touched & 0x03), *@via2.counter_state(touched >> 2)]
-      end
-
-      def fast_forward_chips(cycles)
-        @via1.fast_forward(cycles)
-        @via2.fast_forward(cycles)
-        fast_forward_more(cycles)
-      end
-
-      def skip_chip_orbits(cycles, touched)
-        @via1.skip_orbits(cycles, touched & 0x03)
-        @via2.skip_orbits(cycles, touched >> 2)
-        fast_forward_more(cycles)
-      end
-
-      # Runs the model's chips beyond the VIAs +cycles+ quiet cycles at once
-      # (see quiet_cycles). The 1541 has none.
-      def fast_forward_more(_cycles) = nil
-    end
-  end
-end

data/lib/badline/drive/watch.rb

@@ -1,150 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  module Drive
-    # A drive bus's eye on what the CPU reaches, for Idle and Orbit. While
-    # Idle records a pass of the DOS's idle loop, the bus watches it (see
-    # watch!). While Idle looks for an orbit, the bus guards the drive
-    # (see guard!). The bus calls watch_read and watch_write with the
-    # address folded into $0000-$1FFF, RAM and the two VIAs at $1800 and
-    # $1C00, while @watching.
-    module Watch
-      # VIA registers, as bits by offset, whose access makes a watched
-      # stretch volatile: reads of either VIA's counters and shift register
-      # and of VIA 1's port B, and writes to VIA 2's timers, shift register
-      # and ACR. Any write to VIA 1 does too (watch_write).
-      VOLATILE_VIA1_READS = 0x0731
-      VOLATILE_VIA2_READS = 0x0730
-      VOLATILE_VIA2_WRITES = 0x0ff0
-
-      # The timer each VIA register reaches, by offset, as bits: 1 for
-      # timer 1 and 2 for timer 2.
-      TIMER_REGISTERS = [0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 0, 0, 0, 0, 0, 0].freeze
-
-      # Whether a watched stretch did something that makes it unrepeatable.
-      attr_reader :volatile
-
-      # The RAM a watched stretch read or wrote, as each address's value
-      # from before the first access.
-      attr_reader :touched
-
-      # Whether the drive did something since guard! that reached outside
-      # it, or took something in from outside.
-      attr_reader :tainted
-
-      # The timers the drive read or wrote since guard!, as bits: VIA 1's
-      # timer 1 and timer 2 in bits 0 and 1, and VIA 2's in bits 2 and 3.
-      attr_reader :touched_timers
-
-      # Starts watching: see volatile and touched. The bus stops watching
-      # once the stretch turns volatile.
-      def watch!
-        @recording = true
-        @volatile = false
-        @touched = {}
-        watching!
-      end
-
-      def unwatch!
-        @recording = false
-        watching!
-      end
-
-      # Starts guarding: see tainted and touched_timers. Reading VIA 1's
-      # port B, which reads the serial bus, taints the drive, and so do
-      # any write to VIA 1, whose port B drives the serial bus, a write to
-      # VIA 2's shift register or ACR, and VIA 2 turning the motor on or
-      # changing the LED. The bus stops guarding once the drive is tainted.
-      def guard!
-        @guarding = true
-        @tainted = false
-        @touched_timers = 0
-        @led = @via2.port_b_output & Drive1541::Mechanism::LED
-        watching!
-      end
-
-      private
-
-      def init_watch
-        @recording = @guarding = @watching = false
-        @volatile = @tainted = false
-        @touched = {}
-        @touched_timers = 0
-        @led = 0
-      end
-
-      def watching!
-        @watching = @recording || @guarding
-      end
-
-      # An access to a chip beyond the VIAs, as the 1571's CIA and floppy
-      # controller are: it makes the stretch volatile and taints the
-      # drive.
-      def watch_chip
-        volatile! if @recording
-        taint! if @guarding
-      end
-
-      def touch(addr)
-        @touched[addr] = @ram.peek(addr) unless @touched.key?(addr)
-      end
-
-      def watch_read(addr)
-        if addr < 0x0800
-          touch(addr) if @recording
-        elsif addr >= 0x1800
-          via1 = addr < 0x1c00
-          watch(via1 ? VOLATILE_VIA1_READS : VOLATILE_VIA2_READS, addr) if @recording
-          guard_read(via1, addr & 0x0f) if @guarding
-        end
-      end
-
-      def watch_write(addr)
-        if addr >= 0x1c00
-          watch_via2_write(addr) if @recording
-          guard_via2_write(addr & 0x0f) if @guarding
-        elsif addr >= 0x1800
-          volatile! if @recording
-          taint! if @guarding
-        end
-      end
-
-      # Any write to VIA 1 makes the stretch volatile (watch_write), and so
-      # does a write to VIA 2 that leaves the motor on.
-      def watch_via2_write(addr)
-        watch(VOLATILE_VIA2_WRITES, addr)
-        volatile! if @recording && @via2.port_b_output.anybits?(Drive1541::Mechanism::MOTOR)
-      end
-
-      def watch(volatile, addr)
-        volatile! if volatile.anybits?(1 << (addr & 0x0f))
-      end
-
-      def volatile!
-        @volatile = true
-        @recording = false
-        watching!
-      end
-
-      def guard_read(via1, offset)
-        return taint! if via1 && offset.zero?
-
-        @touched_timers |= via1 ? TIMER_REGISTERS[offset] : TIMER_REGISTERS[offset] << 2
-      end
-
-      def guard_via2_write(offset)
-        return taint! if offset.between?(0x0a, 0x0b)
-
-        @touched_timers |= TIMER_REGISTERS[offset] << 2
-        lines = @via2.port_b_output
-        taint! if lines.anybits?(Drive1541::Mechanism::MOTOR) || (lines & Drive1541::Mechanism::LED) != @led
-      end
-
-      def taint!
-        @tainted = true
-        @guarding = false
-        watching!
-      end
-    end
-  end
-end

data/lib/badline/drive.rb

@@ -1,11 +0,0 @@
-# frozen_string_literal: true
-
-require "badline/drive/sleep"
-require "badline/drive/idle"
-require "badline/drive/orbit"
-require "badline/drive/core"
-require "badline/drive/vias"
-require "badline/drive/fast_serial"
-require "badline/drive/idle_cpu"
-require "badline/drive/watch"
-require "badline/drive/serial_lines"

data/lib/badline/drive1541/bus.rb

@@ -1,86 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  class Drive1541
-    # The drive CPU's bus. The decoder looks at A15, A12, A11 and A10 only:
-    #
-    # $0000-$07FF - 2 KB of RAM
-    # $0800-$17FF - nothing: open bus
-    # $1800-$1BFF - VIA 1, its sixteen registers mirrored
-    # $1C00-$1FFF - VIA 2, its sixteen registers mirrored
-    # $2000-$7FFF - $0000-$1FFF again, since A13 and A14 aren't decoded
-    # $8000-$BFFF - the ROM again, since A14 isn't decoded
-    # $C000-$FFFF - the DOS ROM
-    #
-    # Writes to the ROM and to open bus go nowhere. A read from open bus
-    # finds the last byte on the data bus, which for LDA abs or LDA (zp),Y
-    # is the address's high byte, and for an indexed read that crosses a
-    # page is what its dummy read found. VICE-testprogs drive/openbus pins
-    # both on a real 1541.
-    #
-    # While Idle records a pass of the DOS's idle loop, the bus watches it,
-    # and while Idle looks for an orbit, it guards the drive (see
-    # Drive::Watch).
-    class Bus
-      include Addressable
-      include Drive::Watch
-
-      attr_reader :ram, :rom, :via1, :via2, :data
-
-      def initialize(rom:, via1:, via2:)
-        addressable_at(0, length: 2**16)
-        @ram = Memory.new([], length: 0x0800, start: 0)
-        @rom = rom
-        @via1 = via1
-        @via2 = via2
-        @data = 0
-        init_watch
-      end
-
-      # The last byte on the data bus and the RAM. What a watched stretch
-      # touched is Idle's, and a restored bus isn't watching.
-      def save_state(out)
-        out.int(@data)
-        @ram.save_state(out)
-      end
-
-      def load_state(input)
-        @data = input.int
-        @ram.load_state(input)
-        @watching = false
-      end
-
-      def peek(addr)
-        return @data = @rom.peek(addr | 0x4000) if addr >= 0x8000
-
-        addr &= 0x1fff
-        watch_read(addr) if @watching
-        @data = if addr < 0x0800
-                  @ram.peek(addr)
-                elsif addr < 0x1800
-                  @data
-                elsif addr < 0x1c00
-                  @via1.peek(addr)
-                else
-                  @via2.peek(addr)
-                end
-      end
-
-      def poke(addr, value)
-        @data = value
-        return if addr >= 0x8000
-
-        addr &= 0x1fff
-        if addr < 0x0800
-          touch(addr) if @recording
-          @ram.poke(addr, value)
-        elsif addr >= 0x1c00
-          @via2.poke(addr, value)
-        elsif addr >= 0x1800
-          @via1.poke(addr, value)
-        end
-        watch_write(addr) if @watching
-      end
-    end
-  end
-end

data/lib/badline/drive1541/byte_ready.rb

@@ -1,48 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  class Drive1541
-    # The Mechanism's BYTE READY line: to VIA 2's CA1, to the CPU's SO pin
-    # through SOE, and on the 1571 to a latch VIA 1's PA7 reads.
-    module ByteReady
-      # VIA 2, which DiskVIA plugs in.
-      attr_writer :via
-
-      # Whether BYTE READY reached SO for the CPU to sample on the drive's
-      # next cycle.
-      attr_accessor :so_pending
-
-      # Whether SO is pending, which the drive's cycle samples and clears.
-      def take_so
-        so = @so_pending
-        @so_pending = false
-        so
-      end
-
-      # The read electronics signal a whole GCR byte. BYTE READY pulls VIA
-      # 2's CA1 low, a falling edge that sets its flag and, with latching
-      # on, latches port A. It reaches the CPU's SO pin while VIA 2's CA2
-      # (SOE) is high, which lets the DOS spin on BVC for each byte. The CPU
-      # samples SO on the next cycle.
-      def byte_ready!
-        @byte_latched = true
-        @via.ca1 = false
-        @so_pending = true if @via.ca2_output
-      end
-
-      # BYTE READY lets go of CA1 with the next bit.
-      def byte_ready_ended!
-        @via.ca1 = true
-      end
-
-      # Whether BYTE READY has come since the CPU last read VIA 2, as the
-      # 1571 latches it for VIA 1's PA7.
-      def byte_latched? = @byte_latched
-
-      # A read of VIA 2 clears the 1571's BYTE READY latch.
-      def release_byte_latch
-        @byte_latched = false
-      end
-    end
-  end
-end

data/lib/badline/drive1541/cpu.rb

@@ -1,11 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  class Drive1541
-    # The drive's 6502, on the drive's Bus.
-    class CPU
-      include Badline::CPU::Core
-      include Drive::IdleCPU
-    end
-  end
-end