badline 0.12.0 → 0.13.0

data/lib/badline/vic20/cpu.rb

@@ -4,7 +4,7 @@ module Badline
   class Vic20
     # The VIC-20's 6502, on the Vic20::Bus.
     class CPU
-      include Badline::CPU::Core
+      include Badline::Chips::CPU::Core
     end
   end
 end

data/lib/badline/vic20/port_wiring.rb

@@ -16,12 +16,12 @@ module Badline
     # on VIA 1's PA6, its motor runs while VIA 1's CA2 is low, and VIA 2's
     # PB3 drives its write line, the same pin as a keyboard column.
     module PortWiring
-      # The lines the machine pulls, as IECBus host lines.
+      # The lines the machine pulls, as Drives::SerialBus host lines.
       def serial_lines
         lines = 0
-        lines |= IECBus::HOST_ATN_OUT if @via1.port_a_output.anybits?(0x80)
-        lines |= IECBus::HOST_CLK_OUT if @via2.ca2_output
-        lines |= IECBus::HOST_DATA_OUT if @via2.cb2_output
+        lines |= Drives::SerialBus::HOST_ATN_OUT if @via1.port_a_output.anybits?(0x80)
+        lines |= Drives::SerialBus::HOST_CLK_OUT if @via2.ca2_output
+        lines |= Drives::SerialBus::HOST_DATA_OUT if @via2.cb2_output
         lines
       end
 

data/lib/badline/vic20/saved_state.rb

@@ -1,23 +1,17 @@
 # frozen_string_literal: true
 
+require "badline/snapshot/vic20_setup"
+
 module Badline
   class Vic20
-    MARKER = "VIC20"
-
-    # The RAM expansion of the machine a State from #snapshot was taken
-    # of, a key of Bus::RAM_CONFIGURATIONS.
-    def self.setup(state)
-      input = Snapshot::StateReader.new(state)
-      input.marker(MARKER)
-      input.check_stamp
-      SavedState.read_ram(input)
-    end
+    # How the machine a State from #snapshot was taken of was built.
+    def self.setup(state) = Snapshot::Vic20Setup.from(state)
 
     # A new machine, built as the one a State from #snapshot was taken of,
     # at that state.
-    def self.restored(state) = new(ram: setup(state)).apply_state(state)
+    def self.restored(state) = setup(state).build.apply_state(state)
 
-    # The whole machine's state for a snapshot, as Computer's: the
+    # The whole machine's state for a snapshot, as C64's: the
     # machine's own latches, the bus with its RAM and cartridge ROM, the
     # VIC with its sound, both VIAs, the CPU, the datasette and its tape,
     # the disk device 8 serves through the traps, and a true 1541. The
@@ -26,14 +20,6 @@ module Badline
     # and callbacks, whether the display renders, whether the sound
     # records, and whether the datasette records.
     module SavedState
-      RAM_CONFIGURATIONS = Bus::RAM_CONFIGURATIONS.keys.freeze
-
-      def self.read_ram(input)
-        RAM_CONFIGURATIONS.fetch(input.int)
-      rescue IndexError
-        raise Snapshot::FormatError, "the state names a VIC-20 RAM expansion badline doesn't know"
-      end
-
       # How many more on_init handlers the machine a State was taken of had
       # yet to run than this one has. Nil until the machine is restored.
       attr_reader :init_handlers_lost
@@ -49,7 +35,7 @@ module Badline
       # Raises Snapshot::FormatError for a state of another machine or RAM
       # expansion.
       def restore(state)
-        check_ram(Vic20.setup(state))
+        check_setup(Vic20.setup(state))
         Vic20.restored(state)
         apply_state(state)
       end
@@ -64,8 +50,8 @@ module Badline
       end
 
       def save_state(out)
-        out.marker(MARKER).stamp
-        out.int(RAM_CONFIGURATIONS.index(@ram_configuration))
+        out.marker(Snapshot::Vic20Setup::MARKER).stamp
+        Snapshot::Vic20Setup.new(ram: @ram_configuration).write(out)
         out.int(@cycles).boolean(@nmi_asserted).boolean(!@pending_keys.nil?)
         out.ints(@pending_keys) if @pending_keys
         out.int(@cycles <= @init_threshold ? @init_handlers.length : 0)
@@ -76,15 +62,15 @@ module Badline
         @via2.save_state(out)
         @cpu.save_state(out)
         @datasette.save_state(out)
-        save_trap_drive(out)
+        save_trap_dos(out)
         save_drive1541(out)
         save_drive1581(out)
       end
 
       def load_state(input)
-        input.marker(MARKER)
+        input.marker(Snapshot::Vic20Setup::MARKER)
         input.check_stamp
-        check_ram(SavedState.read_ram(input))
+        check_setup(Snapshot::Vic20Setup.read(input))
         @cycles = input.int
         @nmi_asserted = input.boolean?
         @pending_keys = nil
@@ -98,34 +84,13 @@ module Badline
         @cpu.load_state(input)
         via_written
         @datasette.load_state(input)
-        load_trap_drive(input)
+        load_trap_dos(input)
         load_drive1541(input)
         load_drive1581(input)
       end
 
       private
 
-      # The disk device 8 serves through the traps, with its channels.
-      def save_trap_drive(out)
-        out.boolean(!@drive.nil?)
-        return unless @drive
-
-        @drive.save_state(out)
-        @serial_trap.save_state(out)
-        @save_trap.save_state(out)
-      end
-
-      def load_trap_drive(input)
-        return unmount unless input.boolean?
-
-        storage = Storage.reopen(input)
-        unmount
-        mount(storage)
-        @drive.load_state(input)
-        @serial_trap.load_state(input)
-        @save_trap.load_state(input)
-      end
-
       # A true 1541 on the serial bus, with its device number.
       def save_drive1541(out)
         out.boolean(!@drive1541.nil?)
@@ -135,19 +100,10 @@ module Badline
         @drive1541.save_state(out)
       end
 
-      def load_drive1541(input)
-        return detach_drive1541 unless input.boolean?
-
-        device = input.int
-        detach_drive1541 if @drive1541 && @drive1541.device != device
-        attach_drive1541(Drive1541.new(device:)) unless @drive1541
-        @drive1541.load_state(input)
-      end
-
-      def check_ram(ram)
-        return if ram == @ram_configuration
+      def check_setup(setup)
+        return if setup.ram == @ram_configuration
 
-        raise Snapshot::FormatError, "the state is of a VIC-20 with #{ram} RAM, not #{@ram_configuration}"
+        raise Snapshot::FormatError, "the state is of a VIC-20 with #{setup.ram} RAM, not #{@ram_configuration}"
       end
     end
   end

data/lib/badline/vic20/user_via_ports.rb

@@ -38,8 +38,8 @@ module Badline
       def serial_inputs
         low = @serial_bus.low_lines
         value = 0x03
-        value &= ~0x01 if low.anybits?(IECBus::CLK)
-        value &= ~0x02 if low.anybits?(IECBus::DATA)
+        value &= ~0x01 if low.anybits?(Drives::SerialBus::CLK)
+        value &= ~0x02 if low.anybits?(Drives::SerialBus::DATA)
         value
       end
     end

data/lib/badline/vic20.rb

@@ -6,8 +6,8 @@ require "badline/vic20/cpu"
 require "badline/vic20/keyboard_via_ports"
 require "badline/vic20/port_wiring"
 require "badline/vic20/user_via_ports"
-require "badline/vic20/vic"
-require "badline/vic20/sound"
+require "badline/chips/vic_i"
+require "badline/chips/vic_i/sound"
 require "badline/vic20/saved_state"
 
 module Badline
@@ -23,6 +23,7 @@ module Badline
   class Vic20
     include IntegerHelper
     include KeyboardBuffer
+    include Machine::Clocking
     include Attachments
     include PortWiring
     include SavedState
@@ -33,12 +34,13 @@ module Badline
     # The RAM expansion it was built with, a key of Bus::RAM_CONFIGURATIONS.
     attr_reader :ram_configuration
 
-    # The path of the disk or directory device 8 serves through the traps
-    # (Attachments), or an empty one.
-    def mounted_path = @drive.nil? ? "" : @drive.path
-
     def ram = @bus.ram
 
+    # Reads and writes memory as the CPU sees it, through the bus.
+    def peek(addr) = @bus.peek(addr)
+
+    def poke(addr, value) = @bus.poke(addr, value)
+
     def family = :vic20
 
     # The one control port's joystick, which the front end's second
@@ -51,26 +53,26 @@ module Badline
     # +ram+ names the RAM expansion, one of Bus::RAM_CONFIGURATIONS.
     def initialize(ram: :unexpanded, debug: false)
       @ram_configuration = ram
-      @vic = VIC.new
-      @keyboard = Keyboard.new(matrix: KeyboardVIAPorts::MATRIX)
-      @joystick1 = Joystick.new
-      @iec_bus = IECBus.new
-      @datasette = Datasette.new
-      @via1 = VIA.new(start: 0x9000, peripheral: UserVIAPorts.new(joystick: @joystick1, serial_bus: @iec_bus,
-                                                                  datasette: @datasette))
+      @vic = Chips::VICI.new
+      @keyboard = Input::Keyboard.new(matrix: KeyboardVIAPorts::MATRIX)
+      @joystick1 = Input::Joystick.new
+      @iec_bus = Drives::SerialBus.new
+      @datasette = Drives::Datasette.new
+      @via1 = Chips::VIA.new(start: 0x9000, peripheral: UserVIAPorts.new(joystick: @joystick1, serial_bus: @iec_bus,
+                                                                         datasette: @datasette))
       keyboard_ports = KeyboardVIAPorts.new(keyboard: @keyboard, joystick: @joystick1)
-      @via2 = VIA.new(start: 0x9000, peripheral: keyboard_ports)
+      @via2 = Chips::VIA.new(start: 0x9000, peripheral: keyboard_ports)
       keyboard_ports.connect(@via2)
       @bus = Bus.new(vic: @vic, via1: @via1, via2: @via2, blocks: Bus::RAM_CONFIGURATIONS.fetch(ram))
       @vic.connect(@bus)
       @cpu = CPU.new(@bus, debug:)
       @cycles = 0
-      @sound = Sound.new(self, @vic.profile.clock_hz)
+      @sound = Chips::VICI::Sound.new(self, @vic.profile.clock_hz)
       @vic.sound = @sound
       @nmi_asserted = false
       @init_handlers = []
       @pending_keys = nil
-      @drive = nil
+      @dos = nil
       @serial_trap = nil
       @save_trap = nil
       @capture_output = nil
@@ -100,31 +102,6 @@ module Badline
       @cycles += 1
     end
 
-    # Runs `count` cycles, one #cycle! after another.
-    def run_cycles(count)
-      i = 0
-      while i < count
-        cycle!
-        i += 1
-      end
-    end
-
-    # Runs cycles until the block returns true or the cycle count passes
-    # `limit`, checking before each cycle.
-    def run_until(limit)
-      cycle! until yield || @cycles > limit
-    end
-
-    # Runs the block once the KERNAL has booted (see init_threshold), or
-    # now if it has.
-    def on_init(&block)
-      if @cycles < @init_threshold
-        @init_handlers << block
-      else
-        block.call
-      end
-    end
-
     # The chip whose #display a front end shows.
     def video = @vic
 
@@ -139,7 +116,7 @@ module Badline
     # xvic draws them.
     def timing
       profile = @vic.profile
-      width = profile.cycles_per_line * VIC::PIXELS_PER_CYCLE
+      width = profile.cycles_per_line * Chips::VICI::PIXELS_PER_CYCLE
       blanked = profile.blanked_lines
       Timing.new(clock_hz: profile.clock_hz, cycles_per_line: profile.cycles_per_line,
                  lines_per_frame: profile.lines_per_frame,
@@ -176,7 +153,7 @@ module Badline
       @via1.reset!
       @via2.reset!
       via_written
-      @drive&.reset!
+      @dos&.reset!
       @drive1541&.reset!
       @drive1581&.reset!
       @nmi_asserted = false
@@ -192,10 +169,6 @@ module Badline
       reset!
     end
 
-    def inspect
-      "#<#{self.class.name} cycles=#{@cycles} cpu=(#{@cpu.inspect})>"
-    end
-
     private
 
     # The cycle by which the KERNAL has booted and BASIC printed READY,
@@ -215,9 +188,5 @@ module Badline
       @cpu.nmi = true if nmi && !@nmi_asserted
       @nmi_asserted = nmi
     end
-
-    def handle_init
-      @init_handlers.each(&:call)
-    end
   end
 end