badline 0.12.0 → 0.13.0

data/lib/badline/cartridge.rb

@@ -1,303 +0,0 @@
-# frozen_string_literal: true
-
-require "badline/cartridge/bank"
-require "badline/cartridge/flash"
-require "badline/cartridge/standard"
-require "badline/cartridge/simons_basic"
-require "badline/cartridge/ocean"
-require "badline/cartridge/fun_play"
-require "badline/cartridge/super_games"
-require "badline/cartridge/epyx_fastload"
-require "badline/cartridge/westermann"
-require "badline/cartridge/rex_utility"
-require "badline/cartridge/game_system"
-require "badline/cartridge/dinamic"
-require "badline/cartridge/zaxxon"
-require "badline/cartridge/magic_desk"
-require "badline/cartridge/comal80"
-require "badline/cartridge/easy_flash"
-require "badline/cartridge/mach5"
-require "badline/cartridge/pagefox"
-require "badline/cartridge/rgcd"
-require "badline/cartridge/g_mod2"
-require "badline/cartridge/freezer"
-require "badline/cartridge/action_replay"
-require "badline/cartridge/atomic_power"
-require "badline/cartridge/final_cartridge3"
-require "badline/cartridge/retro_replay"
-require "badline/cartridge/kcs_power"
-require "badline/cartridge/geo_ram"
-
-module Badline
-  class Cartridge
-    class UnsupportedTypeError < StandardError; end
-
-    ROMH_START = 0xa000
-    BANK_SIZE = 0x2000
-
-    HARDWARE_TYPES = {
-      0 => Standard, 1 => ActionReplay, 2 => KCSPower, 3 => FinalCartridge3,
-      4 => SimonsBasic, 5 => Ocean, 7 => FunPlay, 8 => SuperGames,
-      9 => AtomicPower, 10 => EpyxFastload, 11 => Westermann,
-      12 => RexUtility, 15 => GameSystem, 17 => Dinamic, 18 => Zaxxon,
-      19 => MagicDesk, 21 => Comal80, 32 => EasyFlash, 36 => RetroReplay,
-      51 => Mach5, 53 => Pagefox, 57 => RGCD, 60 => GMod2
-    }.freeze
-
-    # The EXROM and GAME line levels of each memory configuration. The lines
-    # are active low.
-    MODES = {
-      rom8k: [0, 1].freeze, rom16k: [0, 0].freeze,
-      ultimax: [1, 0].freeze, off: [1, 1].freeze
-    }.freeze
-
-    attr_reader :name, :exrom, :game, :roml, :romh
-
-    # A callable returning the current cycle, for mappers with timed state.
-    attr_writer :clock
-
-    class << self
-      # Options set the cartridge's jumpers, for the mappers that have them.
-      def from_file(path, **)
-        from_crt(Storage::CRTFile.new(path), **)
-      end
-
-      def from_crt(crt, **)
-        mapper_for(crt).new(crt, **)
-      end
-
-      # A cartridge built afresh from what save_setup wrote, before
-      # load_state puts its state in.
-      def from_setup(input)
-        return GeoRAM.new(size: input.int) if input.int == GEO_RAM_SETUP
-
-        crt = Storage::CRTFile.new(bytes: input.string)
-        mapper_for(crt).from_jumpers(crt, input)
-      end
-
-      # A cartridge from its image and what save_jumpers wrote: whether
-      # there are jumpers, then their settings on a mapper that has them.
-      def from_jumpers(crt, input)
-        input.boolean?
-        new(crt)
-      end
-
-      def mapper_for(crt)
-        HARDWARE_TYPES.fetch(crt.hardware_type) do
-          raise UnsupportedTypeError,
-                "Unsupported cartridge hardware type #{crt.hardware_type}"
-        end
-      end
-    end
-
-    # What save_setup writes first: a cartridge from a CRT image, or a
-    # GEO-RAM.
-    CRT_SETUP = 0
-    GEO_RAM_SETUP = 1
-
-    # Keeps the image it was built from, so a snapshot's machine can build
-    # the same cartridge before the snapshot's state goes into it.
-    def initialize(crt)
-      @crt = crt
-      @name = crt.name
-      @exrom = crt.exrom
-      @game = crt.game
-      @roml = @romh = nil
-      @banks = nil
-      @on_change = nil
-      @on_nmi_change = nil
-      @nmi = false
-      @open_bus = nil
-      @clock = nil
-      install_chips(crt.chips)
-    end
-
-    def on_change(&block)
-      @on_change = block
-    end
-
-    # What builds the same cartridge afresh (Cartridge.from_setup): the CRT
-    # image it was built from, and the jumpers of a mapper that has them.
-    def save_setup(out)
-      out.int(CRT_SETUP).string(Storage::CRTFile.encode(@crt))
-      save_jumpers(out)
-    end
-
-    # The lines, the pull on NMI, the button and the mapper's own state.
-    # Loading sets them without calling back into the machine, which maps
-    # the cartridge again afterwards.
-    def save_state(out)
-      out.marker("CARTRIDGE")
-      out.int(@exrom).int(@game).boolean(@nmi).boolean(@button == true)
-      save_mapper(out)
-    end
-
-    def load_state(input)
-      input.marker("CARTRIDGE")
-      @exrom = input.int
-      @game = input.int
-      @nmi = input.boolean?
-      @button = input.boolean?
-      load_mapper(input)
-    end
-
-    # Called with the level of the cartridge's pull on the NMI line when it
-    # changes. The line is wired-OR with CIA 2's.
-    def on_nmi_change(&block)
-      @on_nmi_change = block
-    end
-
-    def nmi?
-      @nmi
-    end
-
-    # The address bus hands over the C64's RAM, for mappers that write
-    # through to it, and the open bus, for I/O reads the cartridge doesn't
-    # drive.
-    def connect(ram:, open_bus:)
-      @ram = ram
-      @open_bus = open_bus
-    end
-
-    def ultimax?
-      @game.zero? && @exrom == 1
-    end
-
-    # Whether the first half of the cycle, where the VIC does most of its
-    # fetching, sees Ultimax mode. Some cartridges drive GAME and EXROM
-    # differently in the two halves; #ultimax? is the second, the CPU's.
-    def phi1_ultimax?
-      ultimax?
-    end
-
-    # The I/O pages ($de, $df) whose reads the mapper drives. Reads of the
-    # others are open bus.
-    def readable_io_pages
-      []
-    end
-
-    def poke(_addr, _value); end
-
-    # A window taking writes to $E000-$FFFF while reads there see the C64's
-    # memory, for a cartridge that asserts Ultimax on write cycles only.
-    def romh_writes; end
-
-    # A window at $A000-$BFFF in Ultimax mode, where the C64 maps nothing.
-    def ultimax_a000; end
-
-    # The RES line on the expansion port.
-    def reset; end
-
-    # Whether the cartridge has a freeze button.
-    def freezer? = false
-
-    # The freeze button, which cartridges without one ignore.
-    def press_button; end
-
-    def release_button; end
-
-    private
-
-    def save_jumpers(out)
-      out.boolean(false)
-    end
-
-    # The mapper's own state: where its windows point, for a mapper that
-    # moves them, and whatever a mapper adds after calling super.
-    def save_mapper(out)
-      save_windows(out, windows) if windows
-    end
-
-    def load_mapper(input)
-      load_windows(input, windows) if windows
-    end
-
-    # The banks and views ROML and ROMH can point at, which a snapshot
-    # names them by: the mapper's banks, or nothing for a mapper whose
-    # windows stay where install_chips put them.
-    def windows
-      [*@banks, EMPTY_BANK] if @banks
-    end
-
-    # Where the ROML and ROMH windows point, as their places in `windows`,
-    # the banks and views the mapper picks them from, or -1 for none.
-    def save_windows(out, windows)
-      out.int(window_index(@roml, windows)).int(window_index(@romh, windows))
-    end
-
-    def load_windows(input, windows)
-      @roml = window_at(input.int, windows)
-      @romh = window_at(input.int, windows)
-    end
-
-    def window_index(window, windows)
-      return -1 if window.nil?
-
-      windows.index { |candidate| candidate.equal?(window) } ||
-        raise(ArgumentError, "#{self.class.name}: a window that isn't among its banks")
-    end
-
-    def window_at(index, windows) = index.negative? ? nil : windows.fetch(index)
-
-    def nmi=(level)
-      return if @nmi == level
-
-      @nmi = level
-      @on_nmi_change&.call(level)
-    end
-
-    def changed!
-      @on_change&.call
-    end
-
-    def mode=(mode)
-      @exrom, @game = MODES.fetch(mode)
-    end
-
-    # Sets the lines and tells the machine to map the cartridge again.
-    def select_mode(mode)
-      self.mode = mode
-      changed!
-    end
-
-    def open_bus(addr)
-      @open_bus ? @open_bus.peek(addr) : 0xff
-    end
-
-    def install_chips(_chips)
-      raise NotImplementedError
-    end
-
-    def rom_bank(data)
-      Bank.new(data)
-    end
-
-    # A bank the image leaves out reads as erased ROM.
-    def bank(banks, number)
-      banks[number] || EMPTY_BANK
-    end
-
-    # The bank register bits a ROM decodes. The ROM holds the highest bank
-    # in the image, and has address lines for the power of two that covers
-    # it; the register bits above those lines are ignored.
-    def bank_mask(banks)
-      (1 << (banks.length - 1).bit_length) - 1
-    end
-
-    # Sorts the CHIP packets into ROML and ROMH banks by load address. A 16K
-    # chip at $8000 spans both.
-    def banks_from(chips)
-      roml = []
-      romh = []
-      chips.each do |chip|
-        if chip.address >= ROMH_START
-          romh[chip.bank] = rom_bank(chip.data)
-        else
-          roml[chip.bank] = rom_bank(chip.data[0, BANK_SIZE])
-          romh[chip.bank] = rom_bank(chip.data[BANK_SIZE, BANK_SIZE]) if chip.data.length > BANK_SIZE
-        end
-      end
-      [roml, romh]
-    end
-  end
-end

data/lib/badline/checkpoint.rb

@@ -1,98 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  # A digest of the machine's state at one cycle, for comparing two runs of
-  # the same scenario, on two builds or two revisions. Each component is
-  # hashed on its own with 32-bit FNV-1a, so a mismatch names the part of the
-  # machine that went its own way. Nothing is read through a chip's bus
-  # interface, so taking a checkpoint leaves the machine as it was.
-  #
-  # Colour RAM is digested as the four bits each cell stores: the upper
-  # nibble a CPU read sees comes off the open bus.
-  class Checkpoint
-    COMPONENTS = %w[cpu ram color_ram display vic cia1 cia2 sid].freeze
-
-    FNV_OFFSET = 0x811c9dc5
-    FNV_PRIME = 0x01000193
-
-    attr_reader :cycle, :digests
-
-    class << self
-      def take(computer)
-        new(computer.cycles, [
-              fnv1a(cpu_state(computer.cpu)),
-              fnv1a(ram(computer.ram)),
-              fnv1a(color_ram(computer.address_bus.color_ram)),
-              fnv1a(computer.vic.display),
-              fnv1a(vic_state(computer.vic)),
-              fnv1a(cia_state(computer.cia1)),
-              fnv1a(cia_state(computer.cia2)),
-              fnv1a(Array.new(0x20) { |reg| computer.sid.register(reg) })
-            ])
-      end
-
-      # Reads a line written by #to_s.
-      def parse(line)
-        fields = line.split
-        digests = COMPONENTS.map do |name|
-          field = fields.find { |f| f.start_with?("#{name}=") }
-          raise ArgumentError, "no #{name} digest in #{line.inspect}" unless field
-
-          field.split("=").last.to_i(16)
-        end
-        new(fields.first.to_i, digests)
-      end
-
-      def fnv1a(values)
-        hash = FNV_OFFSET
-        values.each { |value| hash = ((hash ^ (value & 0xffffffff)) * FNV_PRIME) & 0xffffffff }
-        hash
-      end
-
-      private
-
-      def cpu_state(cpu)
-        [cpu.program_counter, cpu.a, cpu.x, cpu.y, cpu.stack_pointer, cpu.p, cpu.cycles]
-      end
-
-      def ram(memory)
-        Array.new(0x10000) { |addr| memory.peek(addr) }
-      end
-
-      def color_ram(memory)
-        Array.new(0x400) { |offset| memory.nibble(0xd800 + offset) }
-      end
-
-      def vic_state(vic)
-        vic.register_file + [vic.rasterline, vic.column]
-      end
-
-      def cia_state(cia)
-        start = cia.start
-        [cia.peek(start), cia.peek(start + 1), cia.peek(start + 2), cia.peek(start + 3),
-         cia.timer_a, cia.timer_a_latch, cia.timer_b, cia.timer_b_latch, cia.serial.data,
-         cia.control_a.value, cia.control_b.value, cia.interrupt_status.value,
-         cia.interrupt_control.value] + cia.time_of_day.registers
-      end
-    end
-
-    def initialize(cycle, digests)
-      @cycle = cycle
-      @digests = digests
-    end
-
-    # The components whose digests differ from `other`'s.
-    def differences(other)
-      COMPONENTS.each_index.reject { |i| digests[i] == other.digests[i] }.map { |i| COMPONENTS[i] }
-    end
-
-    def ==(other)
-      other.is_a?(Checkpoint) && cycle == other.cycle && digests == other.digests
-    end
-
-    def to_s
-      fields = COMPONENTS.each_index.map { |i| "#{COMPONENTS[i]}=#{digests[i].to_s(16).rjust(8, '0')}" }
-      "#{cycle} #{fields.join(' ')}"
-    end
-  end
-end

data/lib/badline/cia/fast_forward.rb

@@ -1,60 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  class CIA
-    # Running a CIA a stretch of cycles at once, for Drive::Idle.
-    module FastForward
-      # quiet_cycles for a CIA whose counters will never set a flag.
-      QUIET = 1 << 40
-
-      # Whether fast_forward can run the CIA: timer B stopped with nothing
-      # in its pipeline, no interrupt or acknowledge on its way, CNT where it
-      # was, the TOD clock stopped, and timer A either stopped, or free
-      # running (Timer#free_running?) with its interrupt masked and the
-      # serial port an idle input. Drive::Idle sleeps the 1571's CIA through
-      # such cycles, which its DOS leaves timer A running in.
-      def quiet?
-        return false unless @tb.idle? && @icr.quiet && @tod.quiet? && cnt_steady?
-
-        @ta.idle? ? @serial.idle : timer_a_free_running?
-      end
-
-      # How many cycles the CIA can run with nothing but its counters
-      # moving: as quiet? allows, but with timer B free running too, up to
-      # the cycle before it underflows. The 1581's DOS leaves timer B
-      # interrupting every 10 ms.
-      def quiet_cycles
-        return 0 unless @icr.quiet && @tod.quiet? && cnt_steady? && timer_a_quiet?
-        return QUIET if @tb.idle?
-        return 0 unless @tb.free_running? && @control_b.value.nobits?(0x60)
-
-        @tb.counter - 1
-      end
-
-      # Runs +cycles+ cycles at once while quiet? or for quiet_cycles, as
-      # cycle! would: timer A's underflows flag in the ICR, and reach the
-      # serial port's underflow line.
-      def fast_forward(cycles)
-        @tod.fast_forward(cycles)
-        @tb.fast_forward(cycles) unless @tb.idle?
-        return if @ta.idle?
-
-        @icr.flag(:timer_a) if @ta.fast_forward(cycles).positive?
-        @serial.follow_underflow(@ta.underflowed)
-      end
-
-      private
-
-      def timer_a_quiet? = @ta.idle? ? @serial.idle : timer_a_free_running?
-
-      # Timer A free running with its interrupt masked, and the serial port
-      # an idle input it only clocks.
-      def timer_a_free_running?
-        @ta.free_running? && !@control_a.serial_mode? && @icr.mask.value.nobits?(0x01) && @serial.drained?
-      end
-
-      # Whether CNT holds the level the last cycle sampled.
-      def cnt_steady? = @serial.cnt == @cnt_high && !@cnt_rise
-    end
-  end
-end

data/lib/badline/cia/interrupt_register.rb

@@ -1,143 +0,0 @@
-# frozen_string_literal: true
-
-module Badline
-  class CIA
-    # The interrupt control register: the source flags, their mask and the
-    # IR bit that drives the interrupt line, with the 6526's acknowledge
-    # timing.
-    class InterruptRegister
-      attr_reader :status, :mask, :quiet
-
-      # The 6526A is the faster of the two: see the rules below.
-      def initialize(model = :mos6526)
-        @fast = model == :mos6526a
-        @mask = InterruptFlags.new([:timer_a, :timer_b, :alarm, :serial, :flag, 0, 0, 0])
-        @status = InterruptFlags.new([:timer_a, :timer_b, :alarm, :serial, :flag, 0, 0, :interrupt])
-        @pending = 0
-        @read = @read_last_cycle = @read_two_cycles_ago = nil
-        @timer_b_bug = false
-        @quiet = true
-      end
-
-      # The CIA skips this while quiet: no read is recent enough to matter
-      # and no assert is due.
-      def cycle!
-        @read_two_cycles_ago = @read_last_cycle
-        @read_last_cycle = @read
-        @read = nil
-        if @pending.positive?
-          @pending -= 1
-          status.interrupt = true if @pending.zero?
-        end
-        @quiet = @pending.zero? && @read_last_cycle.nil? && @read_two_cycles_ago.nil?
-      end
-
-      def interrupted? = status.value >= 0x80
-
-      def save_state(out)
-        out.int(@mask.value).int(@status.value).int(@pending)
-        [@read, @read_last_cycle, @read_two_cycles_ago].each { |read| out.optional_int(read) }
-        out.boolean(@timer_b_bug).boolean(@quiet)
-      end
-
-      def load_state(input)
-        @mask.value = input.int
-        @status.value = input.int
-        @pending = input.int
-        @read = input.optional_int
-        @read_last_cycle = input.optional_int
-        @read_two_cycles_ago = input.optional_int
-        @timer_b_bug = input.boolean?
-        @quiet = input.boolean?
-      end
-
-      # Raises IR on this cycle.
-      def assert_now
-        status.interrupt = true
-        @pending = 0
-      end
-
-      # Schedules IR to rise after delay cycles, keeping an earlier one.
-      def assert!(delay = 1)
-        @pending = @pending.positive? ? [@pending, delay].min : delay
-        @quiet = false
-      end
-
-      # Latch a source, pulling the interrupt line if it is armed. The 6526
-      # raises IR a cycle after the flag. The 6526A raises it on the flag's
-      # own cycle, unless the ICR was read on the cycle before.
-      def flag(source)
-        bit = source_bit(source)
-        @status.value |= bit
-        return unless mask.value.anybits?(bit)
-
-        @fast && @read_last_cycle.nil? ? assert_now : assert!
-      end
-
-      # The 6526 timer B bug: an underflow on the cycle after a read still
-      # raises the flag, but the next read drops it unseen. The 6526A has
-      # no such bug.
-      def timer_b_underflow!
-        @timer_b_bug = !@fast && !@read_last_cycle.nil?
-        flag(:timer_b)
-      end
-
-      # A read releases the interrupt line at once, and cancels an assert
-      # due on the next cycle, but its acknowledge lands a cycle late. On
-      # the 6526 that holds only IR: the next cycle still reads IR set if it
-      # was set, or about to be. The 6526A reads an IR about to rise as set
-      # at once, and holds every bit it read: the next cycle reads them all
-      # again, along with anything flagged since.
-      def read
-        status.timer_b = false if @timer_b_bug
-        @timer_b_bug = false
-        value = status.value
-        value |= 0x80 if @fast && @pending == 1
-        @read = @pending == 1 ? value | 0x80 : value
-        @quiet = false
-        value |= held(@read_last_cycle) if @read_last_cycle
-        status.value = 0x0
-        @pending = 0
-        value
-      end
-
-      # Bit 7 picks between setting and clearing the mask bits given.
-      def write(value)
-        if value.nobits?(0x80)
-          @mask.value &= ~(value & 0x1f)
-        else
-          @mask.value |= (value & 0x1f)
-        end
-        if mask.value.anybits?(status.value & 0x1f)
-          assert!(arm_delay) unless interrupted?
-        elsif @pending == 1 && @read_two_cycles_ago
-          # On the 6526, masking the pending source cancels the assert due
-          # on the next cycle only while a read two cycles back is
-          # acknowledging.
-          @pending = 0
-        end
-      end
-
-      private
-
-      # Arming a pending source raises IR two cycles later on the 6526,
-      # and one cycle later on the 6526A.
-      def arm_delay = @fast ? 1 : 2
-
-      # What a read on the cycle before still holds: IR on the 6526, and
-      # every bit it read on the 6526A.
-      def held(last) = @fast ? last : last & 0x80
-
-      def source_bit(source)
-        case source
-        when :timer_a then 0x01
-        when :timer_b then 0x02
-        when :alarm then 0x04
-        when :serial then 0x08
-        when :flag then 0x10
-        else raise ArgumentError, "unknown interrupt source #{source}"
-        end
-      end
-    end
-  end
-end