arduino_ci 0.1.3 → 0.1.4

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Files changed (295) hide show
  1. checksums.yaml +4 -4
  2. data/README.md +77 -1
  3. data/cpp/arduino/Arduino.cpp +17 -7
  4. data/cpp/arduino/Arduino.h +151 -5
  5. data/cpp/arduino/ArduinoDefines.h +90 -0
  6. data/cpp/arduino/AvrMath.h +18 -28
  7. data/cpp/arduino/Godmode.cpp +62 -0
  8. data/cpp/arduino/Godmode.h +74 -0
  9. data/cpp/arduino/HardwareSerial.h +81 -0
  10. data/cpp/arduino/Print.h +67 -0
  11. data/cpp/arduino/Stream.h +210 -0
  12. data/cpp/arduino/WCharacter.h +96 -0
  13. data/cpp/arduino/WString.h +164 -0
  14. data/cpp/arduino/binary.h +518 -0
  15. data/cpp/arduino/include/README.md +3 -0
  16. data/cpp/arduino/include/common.h +333 -0
  17. data/cpp/arduino/include/fuse.h +274 -0
  18. data/cpp/arduino/include/io.h +643 -0
  19. data/cpp/arduino/include/io1200.h +274 -0
  20. data/cpp/arduino/include/io2313.h +385 -0
  21. data/cpp/arduino/include/io2323.h +210 -0
  22. data/cpp/arduino/include/io2333.h +461 -0
  23. data/cpp/arduino/include/io2343.h +214 -0
  24. data/cpp/arduino/include/io43u32x.h +440 -0
  25. data/cpp/arduino/include/io43u35x.h +432 -0
  26. data/cpp/arduino/include/io4414.h +500 -0
  27. data/cpp/arduino/include/io4433.h +489 -0
  28. data/cpp/arduino/include/io4434.h +588 -0
  29. data/cpp/arduino/include/io76c711.h +499 -0
  30. data/cpp/arduino/include/io8515.h +501 -0
  31. data/cpp/arduino/include/io8534.h +217 -0
  32. data/cpp/arduino/include/io8535.h +589 -0
  33. data/cpp/arduino/include/io86r401.h +309 -0
  34. data/cpp/arduino/include/io90pwm1.h +1157 -0
  35. data/cpp/arduino/include/io90pwm161.h +918 -0
  36. data/cpp/arduino/include/io90pwm216.h +1225 -0
  37. data/cpp/arduino/include/io90pwm2b.h +1466 -0
  38. data/cpp/arduino/include/io90pwm316.h +1272 -0
  39. data/cpp/arduino/include/io90pwm3b.h +1466 -0
  40. data/cpp/arduino/include/io90pwm81.h +1036 -0
  41. data/cpp/arduino/include/io90pwmx.h +1415 -0
  42. data/cpp/arduino/include/io90scr100.h +1719 -0
  43. data/cpp/arduino/include/ioa5272.h +803 -0
  44. data/cpp/arduino/include/ioa5505.h +803 -0
  45. data/cpp/arduino/include/ioa5702m322.h +2591 -0
  46. data/cpp/arduino/include/ioa5782.h +1843 -0
  47. data/cpp/arduino/include/ioa5790.h +907 -0
  48. data/cpp/arduino/include/ioa5790n.h +922 -0
  49. data/cpp/arduino/include/ioa5791.h +923 -0
  50. data/cpp/arduino/include/ioa5795.h +756 -0
  51. data/cpp/arduino/include/ioa5831.h +1949 -0
  52. data/cpp/arduino/include/ioa6285.h +740 -0
  53. data/cpp/arduino/include/ioa6286.h +740 -0
  54. data/cpp/arduino/include/ioa6289.h +847 -0
  55. data/cpp/arduino/include/ioa6612c.h +795 -0
  56. data/cpp/arduino/include/ioa6613c.h +795 -0
  57. data/cpp/arduino/include/ioa6614q.h +798 -0
  58. data/cpp/arduino/include/ioa6616c.h +865 -0
  59. data/cpp/arduino/include/ioa6617c.h +865 -0
  60. data/cpp/arduino/include/ioa664251.h +857 -0
  61. data/cpp/arduino/include/ioa8210.h +1843 -0
  62. data/cpp/arduino/include/ioa8510.h +1949 -0
  63. data/cpp/arduino/include/ioat94k.h +565 -0
  64. data/cpp/arduino/include/iocan128.h +100 -0
  65. data/cpp/arduino/include/iocan32.h +100 -0
  66. data/cpp/arduino/include/iocan64.h +100 -0
  67. data/cpp/arduino/include/iocanxx.h +2020 -0
  68. data/cpp/arduino/include/iom103.h +735 -0
  69. data/cpp/arduino/include/iom128.h +1299 -0
  70. data/cpp/arduino/include/iom1280.h +101 -0
  71. data/cpp/arduino/include/iom1281.h +101 -0
  72. data/cpp/arduino/include/iom1284.h +1099 -0
  73. data/cpp/arduino/include/iom1284p.h +1219 -0
  74. data/cpp/arduino/include/iom1284rfr2.h +2690 -0
  75. data/cpp/arduino/include/iom128a.h +1070 -0
  76. data/cpp/arduino/include/iom128rfa1.h +5385 -0
  77. data/cpp/arduino/include/iom128rfr2.h +2706 -0
  78. data/cpp/arduino/include/iom16.h +676 -0
  79. data/cpp/arduino/include/iom161.h +726 -0
  80. data/cpp/arduino/include/iom162.h +1022 -0
  81. data/cpp/arduino/include/iom163.h +686 -0
  82. data/cpp/arduino/include/iom164.h +101 -0
  83. data/cpp/arduino/include/iom164a.h +34 -0
  84. data/cpp/arduino/include/iom164p.h +34 -0
  85. data/cpp/arduino/include/iom164pa.h +1016 -0
  86. data/cpp/arduino/include/iom165.h +887 -0
  87. data/cpp/arduino/include/iom165a.h +832 -0
  88. data/cpp/arduino/include/iom165p.h +889 -0
  89. data/cpp/arduino/include/iom165pa.h +948 -0
  90. data/cpp/arduino/include/iom168.h +97 -0
  91. data/cpp/arduino/include/iom168a.h +35 -0
  92. data/cpp/arduino/include/iom168p.h +942 -0
  93. data/cpp/arduino/include/iom168pa.h +843 -0
  94. data/cpp/arduino/include/iom168pb.h +899 -0
  95. data/cpp/arduino/include/iom169.h +1174 -0
  96. data/cpp/arduino/include/iom169a.h +44 -0
  97. data/cpp/arduino/include/iom169p.h +1097 -0
  98. data/cpp/arduino/include/iom169pa.h +1485 -0
  99. data/cpp/arduino/include/iom16a.h +923 -0
  100. data/cpp/arduino/include/iom16hva.h +80 -0
  101. data/cpp/arduino/include/iom16hva2.h +883 -0
  102. data/cpp/arduino/include/iom16hvb.h +1052 -0
  103. data/cpp/arduino/include/iom16hvbrevb.h +1052 -0
  104. data/cpp/arduino/include/iom16m1.h +1571 -0
  105. data/cpp/arduino/include/iom16u2.h +1000 -0
  106. data/cpp/arduino/include/iom16u4.h +1423 -0
  107. data/cpp/arduino/include/iom2560.h +101 -0
  108. data/cpp/arduino/include/iom2561.h +101 -0
  109. data/cpp/arduino/include/iom2564rfr2.h +2691 -0
  110. data/cpp/arduino/include/iom256rfr2.h +2707 -0
  111. data/cpp/arduino/include/iom3000.h +237 -0
  112. data/cpp/arduino/include/iom32.h +755 -0
  113. data/cpp/arduino/include/iom323.h +744 -0
  114. data/cpp/arduino/include/iom324a.h +1014 -0
  115. data/cpp/arduino/include/iom324p.h +1016 -0
  116. data/cpp/arduino/include/iom324pa.h +1372 -0
  117. data/cpp/arduino/include/iom325.h +886 -0
  118. data/cpp/arduino/include/iom3250.h +982 -0
  119. data/cpp/arduino/include/iom3250a.h +34 -0
  120. data/cpp/arduino/include/iom3250p.h +34 -0
  121. data/cpp/arduino/include/iom3250pa.h +1042 -0
  122. data/cpp/arduino/include/iom325a.h +34 -0
  123. data/cpp/arduino/include/iom325p.h +34 -0
  124. data/cpp/arduino/include/iom325pa.h +937 -0
  125. data/cpp/arduino/include/iom328.h +34 -0
  126. data/cpp/arduino/include/iom328p.h +948 -0
  127. data/cpp/arduino/include/iom329.h +1069 -0
  128. data/cpp/arduino/include/iom3290.h +1227 -0
  129. data/cpp/arduino/include/iom3290a.h +34 -0
  130. data/cpp/arduino/include/iom3290pa.h +1123 -0
  131. data/cpp/arduino/include/iom329a.h +34 -0
  132. data/cpp/arduino/include/iom329p.h +1164 -0
  133. data/cpp/arduino/include/iom329pa.h +34 -0
  134. data/cpp/arduino/include/iom32a.h +686 -0
  135. data/cpp/arduino/include/iom32c1.h +1320 -0
  136. data/cpp/arduino/include/iom32hvb.h +1052 -0
  137. data/cpp/arduino/include/iom32hvbrevb.h +953 -0
  138. data/cpp/arduino/include/iom32m1.h +1625 -0
  139. data/cpp/arduino/include/iom32u2.h +1000 -0
  140. data/cpp/arduino/include/iom32u4.h +1512 -0
  141. data/cpp/arduino/include/iom32u6.h +1431 -0
  142. data/cpp/arduino/include/iom406.h +783 -0
  143. data/cpp/arduino/include/iom48.h +93 -0
  144. data/cpp/arduino/include/iom48a.h +35 -0
  145. data/cpp/arduino/include/iom48p.h +936 -0
  146. data/cpp/arduino/include/iom48pa.h +839 -0
  147. data/cpp/arduino/include/iom48pb.h +890 -0
  148. data/cpp/arduino/include/iom64.h +1311 -0
  149. data/cpp/arduino/include/iom640.h +101 -0
  150. data/cpp/arduino/include/iom644.h +101 -0
  151. data/cpp/arduino/include/iom644a.h +34 -0
  152. data/cpp/arduino/include/iom644p.h +101 -0
  153. data/cpp/arduino/include/iom644pa.h +1387 -0
  154. data/cpp/arduino/include/iom644rfr2.h +2685 -0
  155. data/cpp/arduino/include/iom645.h +881 -0
  156. data/cpp/arduino/include/iom6450.h +978 -0
  157. data/cpp/arduino/include/iom6450a.h +34 -0
  158. data/cpp/arduino/include/iom6450p.h +34 -0
  159. data/cpp/arduino/include/iom645a.h +34 -0
  160. data/cpp/arduino/include/iom645p.h +34 -0
  161. data/cpp/arduino/include/iom649.h +1061 -0
  162. data/cpp/arduino/include/iom6490.h +1182 -0
  163. data/cpp/arduino/include/iom6490a.h +34 -0
  164. data/cpp/arduino/include/iom6490p.h +34 -0
  165. data/cpp/arduino/include/iom649a.h +34 -0
  166. data/cpp/arduino/include/iom649p.h +1490 -0
  167. data/cpp/arduino/include/iom64a.h +1084 -0
  168. data/cpp/arduino/include/iom64c1.h +1321 -0
  169. data/cpp/arduino/include/iom64hve.h +1034 -0
  170. data/cpp/arduino/include/iom64hve2.h +767 -0
  171. data/cpp/arduino/include/iom64m1.h +1572 -0
  172. data/cpp/arduino/include/iom64rfr2.h +2701 -0
  173. data/cpp/arduino/include/iom8.h +665 -0
  174. data/cpp/arduino/include/iom8515.h +687 -0
  175. data/cpp/arduino/include/iom8535.h +772 -0
  176. data/cpp/arduino/include/iom88.h +97 -0
  177. data/cpp/arduino/include/iom88a.h +35 -0
  178. data/cpp/arduino/include/iom88p.h +941 -0
  179. data/cpp/arduino/include/iom88pa.h +1185 -0
  180. data/cpp/arduino/include/iom88pb.h +899 -0
  181. data/cpp/arduino/include/iom8a.h +621 -0
  182. data/cpp/arduino/include/iom8hva.h +76 -0
  183. data/cpp/arduino/include/iom8u2.h +997 -0
  184. data/cpp/arduino/include/iomx8.h +808 -0
  185. data/cpp/arduino/include/iomxx0_1.h +1692 -0
  186. data/cpp/arduino/include/iomxx4.h +954 -0
  187. data/cpp/arduino/include/iomxxhva.h +550 -0
  188. data/cpp/arduino/include/iotn10.h +512 -0
  189. data/cpp/arduino/include/iotn11.h +255 -0
  190. data/cpp/arduino/include/iotn12.h +288 -0
  191. data/cpp/arduino/include/iotn13.h +395 -0
  192. data/cpp/arduino/include/iotn13a.h +394 -0
  193. data/cpp/arduino/include/iotn15.h +363 -0
  194. data/cpp/arduino/include/iotn1634.h +914 -0
  195. data/cpp/arduino/include/iotn167.h +883 -0
  196. data/cpp/arduino/include/iotn20.h +776 -0
  197. data/cpp/arduino/include/iotn22.h +221 -0
  198. data/cpp/arduino/include/iotn2313.h +702 -0
  199. data/cpp/arduino/include/iotn2313a.h +812 -0
  200. data/cpp/arduino/include/iotn24.h +94 -0
  201. data/cpp/arduino/include/iotn24a.h +846 -0
  202. data/cpp/arduino/include/iotn25.h +93 -0
  203. data/cpp/arduino/include/iotn26.h +422 -0
  204. data/cpp/arduino/include/iotn261.h +93 -0
  205. data/cpp/arduino/include/iotn261a.h +987 -0
  206. data/cpp/arduino/include/iotn28.h +297 -0
  207. data/cpp/arduino/include/iotn4.h +477 -0
  208. data/cpp/arduino/include/iotn40.h +767 -0
  209. data/cpp/arduino/include/iotn4313.h +813 -0
  210. data/cpp/arduino/include/iotn43u.h +604 -0
  211. data/cpp/arduino/include/iotn44.h +94 -0
  212. data/cpp/arduino/include/iotn441.h +903 -0
  213. data/cpp/arduino/include/iotn44a.h +844 -0
  214. data/cpp/arduino/include/iotn45.h +93 -0
  215. data/cpp/arduino/include/iotn461.h +94 -0
  216. data/cpp/arduino/include/iotn461a.h +987 -0
  217. data/cpp/arduino/include/iotn48.h +806 -0
  218. data/cpp/arduino/include/iotn5.h +512 -0
  219. data/cpp/arduino/include/iotn828.h +911 -0
  220. data/cpp/arduino/include/iotn84.h +94 -0
  221. data/cpp/arduino/include/iotn841.h +903 -0
  222. data/cpp/arduino/include/iotn84a.h +844 -0
  223. data/cpp/arduino/include/iotn85.h +93 -0
  224. data/cpp/arduino/include/iotn861.h +94 -0
  225. data/cpp/arduino/include/iotn861a.h +988 -0
  226. data/cpp/arduino/include/iotn87.h +859 -0
  227. data/cpp/arduino/include/iotn88.h +806 -0
  228. data/cpp/arduino/include/iotn9.h +477 -0
  229. data/cpp/arduino/include/iotnx4.h +482 -0
  230. data/cpp/arduino/include/iotnx5.h +442 -0
  231. data/cpp/arduino/include/iotnx61.h +541 -0
  232. data/cpp/arduino/include/iousb1286.h +101 -0
  233. data/cpp/arduino/include/iousb1287.h +101 -0
  234. data/cpp/arduino/include/iousb162.h +101 -0
  235. data/cpp/arduino/include/iousb646.h +102 -0
  236. data/cpp/arduino/include/iousb647.h +102 -0
  237. data/cpp/arduino/include/iousb82.h +95 -0
  238. data/cpp/arduino/include/iousbxx2.h +807 -0
  239. data/cpp/arduino/include/iousbxx6_7.h +1336 -0
  240. data/cpp/arduino/include/iox128a1.h +7236 -0
  241. data/cpp/arduino/include/iox128a1u.h +8305 -0
  242. data/cpp/arduino/include/iox128a3.h +6987 -0
  243. data/cpp/arduino/include/iox128a3u.h +7697 -0
  244. data/cpp/arduino/include/iox128a4u.h +7309 -0
  245. data/cpp/arduino/include/iox128b1.h +6872 -0
  246. data/cpp/arduino/include/iox128b3.h +6288 -0
  247. data/cpp/arduino/include/iox128c3.h +6264 -0
  248. data/cpp/arduino/include/iox128d3.h +5749 -0
  249. data/cpp/arduino/include/iox128d4.h +5562 -0
  250. data/cpp/arduino/include/iox16a4.h +6748 -0
  251. data/cpp/arduino/include/iox16a4u.h +7309 -0
  252. data/cpp/arduino/include/iox16c4.h +6078 -0
  253. data/cpp/arduino/include/iox16d4.h +5717 -0
  254. data/cpp/arduino/include/iox16e5.h +7699 -0
  255. data/cpp/arduino/include/iox192a3.h +6987 -0
  256. data/cpp/arduino/include/iox192a3u.h +7697 -0
  257. data/cpp/arduino/include/iox192c3.h +6264 -0
  258. data/cpp/arduino/include/iox192d3.h +5749 -0
  259. data/cpp/arduino/include/iox256a3.h +6987 -0
  260. data/cpp/arduino/include/iox256a3b.h +6983 -0
  261. data/cpp/arduino/include/iox256a3bu.h +7706 -0
  262. data/cpp/arduino/include/iox256a3u.h +7697 -0
  263. data/cpp/arduino/include/iox256c3.h +6264 -0
  264. data/cpp/arduino/include/iox256d3.h +5709 -0
  265. data/cpp/arduino/include/iox32a4.h +6747 -0
  266. data/cpp/arduino/include/iox32a4u.h +7309 -0
  267. data/cpp/arduino/include/iox32c3.h +6264 -0
  268. data/cpp/arduino/include/iox32c4.h +6078 -0
  269. data/cpp/arduino/include/iox32d3.h +5105 -0
  270. data/cpp/arduino/include/iox32d4.h +5685 -0
  271. data/cpp/arduino/include/iox32e5.h +7699 -0
  272. data/cpp/arduino/include/iox384c3.h +6849 -0
  273. data/cpp/arduino/include/iox384d3.h +5833 -0
  274. data/cpp/arduino/include/iox64a1.h +7236 -0
  275. data/cpp/arduino/include/iox64a1u.h +8305 -0
  276. data/cpp/arduino/include/iox64a3.h +6987 -0
  277. data/cpp/arduino/include/iox64a3u.h +7697 -0
  278. data/cpp/arduino/include/iox64a4u.h +7309 -0
  279. data/cpp/arduino/include/iox64b1.h +6454 -0
  280. data/cpp/arduino/include/iox64b3.h +6288 -0
  281. data/cpp/arduino/include/iox64c3.h +6264 -0
  282. data/cpp/arduino/include/iox64d3.h +5764 -0
  283. data/cpp/arduino/include/iox64d4.h +5555 -0
  284. data/cpp/arduino/include/iox8e5.h +7699 -0
  285. data/cpp/arduino/include/lock.h +239 -0
  286. data/cpp/arduino/include/portpins.h +549 -0
  287. data/cpp/arduino/include/version.h +90 -0
  288. data/cpp/arduino/include/xmega.h +71 -0
  289. data/cpp/unittest/Assertion.h +9 -4
  290. data/cpp/unittest/Compare.h +93 -0
  291. data/lib/arduino_ci/arduino_installation.rb +1 -1
  292. data/lib/arduino_ci/cpp_library.rb +4 -1
  293. data/lib/arduino_ci/version.rb +1 -1
  294. data/misc/default.yaml +7 -0
  295. metadata +285 -2
@@ -0,0 +1,1219 @@
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+ /* Copyright (c) 2007 Atmel Corporation
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+ All rights reserved.
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+
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+ Redistribution and use in source and binary forms, with or without
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+ modification, are permitted provided that the following conditions are met:
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+
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+ * Redistributions of source code must retain the above copyright
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+ notice, this list of conditions and the following disclaimer.
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+
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+ * Redistributions in binary form must reproduce the above copyright
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+ notice, this list of conditions and the following disclaimer in
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+ the documentation and/or other materials provided with the
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+ distribution.
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+
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+ * Neither the name of the copyright holders nor the names of
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+ contributors may be used to endorse or promote products derived
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+ from this software without specific prior written permission.
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+
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+ /* $Id: iom1284p.h 2225 2011-03-02 16:27:26Z arcanum $ */
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+
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+ /* avr/iom1284p.h - definitions for ATmega1284P. */
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+
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+ /* This file should only be included from <avr/io.h>, never directly. */
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+
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+ #ifndef _AVR_IO_H_
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+ # error "Include <avr/io.h> instead of this file."
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+ #endif
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+
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+ #ifndef _AVR_IOXXX_H_
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+ # define _AVR_IOXXX_H_ "iom1284p.h"
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+ #else
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+ # error "Attempt to include more than one <avr/ioXXX.h> file."
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+ #endif
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+
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+
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+ #ifndef _AVR_IOM1284P_H_
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+ #define _AVR_IOM1284P_H_ 1
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+
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+
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+ /* Registers and associated bit numbers */
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+
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+ #define PINA _SFR_IO8(0x00)
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+ #define PINA0 0
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+ #define PINA1 1
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+ #define PINA2 2
59
+ #define PINA3 3
60
+ #define PINA4 4
61
+ #define PINA5 5
62
+ #define PINA6 6
63
+ #define PINA7 7
64
+
65
+ #define DDRA _SFR_IO8(0x01)
66
+ #define DDA0 0
67
+ #define DDA1 1
68
+ #define DDA2 2
69
+ #define DDA3 3
70
+ #define DDA4 4
71
+ #define DDA5 5
72
+ #define DDA6 6
73
+ #define DDA7 7
74
+
75
+ #define PORTA _SFR_IO8(0x02)
76
+ #define PORTA0 0
77
+ #define PORTA1 1
78
+ #define PORTA2 2
79
+ #define PORTA3 3
80
+ #define PORTA4 4
81
+ #define PORTA5 5
82
+ #define PORTA6 6
83
+ #define PORTA7 7
84
+
85
+ #define PINB _SFR_IO8(0x03)
86
+ #define PINB0 0
87
+ #define PINB1 1
88
+ #define PINB2 2
89
+ #define PINB3 3
90
+ #define PINB4 4
91
+ #define PINB5 5
92
+ #define PINB6 6
93
+ #define PINB7 7
94
+
95
+ #define DDRB _SFR_IO8(0x04)
96
+ #define DDB0 0
97
+ #define DDB1 1
98
+ #define DDB2 2
99
+ #define DDB3 3
100
+ #define DDB4 4
101
+ #define DDB5 5
102
+ #define DDB6 6
103
+ #define DDB7 7
104
+
105
+ #define PORTB _SFR_IO8(0x05)
106
+ #define PORTB0 0
107
+ #define PORTB1 1
108
+ #define PORTB2 2
109
+ #define PORTB3 3
110
+ #define PORTB4 4
111
+ #define PORTB5 5
112
+ #define PORTB6 6
113
+ #define PORTB7 7
114
+
115
+ #define PINC _SFR_IO8(0x06)
116
+ #define PINC0 0
117
+ #define PINC1 1
118
+ #define PINC2 2
119
+ #define PINC3 3
120
+ #define PINC4 4
121
+ #define PINC5 5
122
+ #define PINC6 6
123
+ #define PINC7 7
124
+
125
+ #define DDRC _SFR_IO8(0x07)
126
+ #define DDC0 0
127
+ #define DDC1 1
128
+ #define DDC2 2
129
+ #define DDC3 3
130
+ #define DDC4 4
131
+ #define DDC5 5
132
+ #define DDC6 6
133
+ #define DDC7 7
134
+
135
+ #define PORTC _SFR_IO8(0x08)
136
+ #define PORTC0 0
137
+ #define PORTC1 1
138
+ #define PORTC2 2
139
+ #define PORTC3 3
140
+ #define PORTC4 4
141
+ #define PORTC5 5
142
+ #define PORTC6 6
143
+ #define PORTC7 7
144
+
145
+ #define PIND _SFR_IO8(0x09)
146
+ #define PIND0 0
147
+ #define PIND1 1
148
+ #define PIND2 2
149
+ #define PIND3 3
150
+ #define PIND4 4
151
+ #define PIND5 5
152
+ #define PIND6 6
153
+ #define PIND7 7
154
+
155
+ #define DDRD _SFR_IO8(0x0A)
156
+ #define DDD0 0
157
+ #define DDD1 1
158
+ #define DDD2 2
159
+ #define DDD3 3
160
+ #define DDD4 4
161
+ #define DDD5 5
162
+ #define DDD6 6
163
+ #define DDD7 7
164
+
165
+ #define PORTD _SFR_IO8(0x0B)
166
+ #define PORTD0 0
167
+ #define PORTD1 1
168
+ #define PORTD2 2
169
+ #define PORTD3 3
170
+ #define PORTD4 4
171
+ #define PORTD5 5
172
+ #define PORTD6 6
173
+ #define PORTD7 7
174
+
175
+ #define TIFR0 _SFR_IO8(0x15)
176
+ #define TOV0 0
177
+ #define OCF0A 1
178
+ #define OCF0B 2
179
+
180
+ #define TIFR1 _SFR_IO8(0x16)
181
+ #define TOV1 0
182
+ #define OCF1A 1
183
+ #define OCF1B 2
184
+ #define ICF1 5
185
+
186
+ #define TIFR2 _SFR_IO8(0x17)
187
+ #define TOV2 0
188
+ #define OCF2A 1
189
+ #define OCF2B 2
190
+
191
+ #define TIFR3 _SFR_IO8(0x18)
192
+ #define TOV3 0
193
+ #define OCF3A 1
194
+ #define OCF3B 2
195
+ #define ICF3 5
196
+
197
+ #define PCIFR _SFR_IO8(0x1B)
198
+ #define PCIF0 0
199
+ #define PCIF1 1
200
+ #define PCIF2 2
201
+ #define PCIF3 3
202
+
203
+ #define EIFR _SFR_IO8(0x1C)
204
+ #define INTF0 0
205
+ #define INTF1 1
206
+ #define INTF2 2
207
+
208
+ #define EIMSK _SFR_IO8(0x1D)
209
+ #define INT0 0
210
+ #define INT1 1
211
+ #define INT2 2
212
+
213
+ #define GPIOR0 _SFR_IO8(0x1E)
214
+ #define GPIOR00 0
215
+ #define GPIOR01 1
216
+ #define GPIOR02 2
217
+ #define GPIOR03 3
218
+ #define GPIOR04 4
219
+ #define GPIOR05 5
220
+ #define GPIOR06 6
221
+ #define GPIOR07 7
222
+
223
+ #define EECR _SFR_IO8(0x1F)
224
+ #define EERE 0
225
+ #define EEPE 1
226
+ #define EEMPE 2
227
+ #define EERIE 3
228
+ #define EEPM0 4
229
+ #define EEPM1 5
230
+
231
+ #define EEDR _SFR_IO8(0x20)
232
+ #define EEDR0 0
233
+ #define EEDR1 1
234
+ #define EEDR2 2
235
+ #define EEDR3 3
236
+ #define EEDR4 4
237
+ #define EEDR5 5
238
+ #define EEDR6 6
239
+ #define EEDR7 7
240
+
241
+ #define EEAR _SFR_IO16(0x21)
242
+
243
+ #define EEARL _SFR_IO8(0x21)
244
+ #define EEAR0 0
245
+ #define EEAR1 1
246
+ #define EEAR2 2
247
+ #define EEAR3 3
248
+ #define EEAR4 4
249
+ #define EEAR5 5
250
+ #define EEAR6 6
251
+ #define EEAR7 7
252
+
253
+ #define EEARH _SFR_IO8(0x22)
254
+ #define EEAR8 0
255
+ #define EEAR9 1
256
+ #define EEAR10 2
257
+ #define EEAR11 3
258
+
259
+ #define GTCCR _SFR_IO8(0x23)
260
+ #define PSRSYNC 0
261
+ #define PSRASY 1
262
+ #define TSM 7
263
+
264
+ #define TCCR0A _SFR_IO8(0x24)
265
+ #define WGM00 0
266
+ #define WGM01 1
267
+ #define COM0B0 4
268
+ #define COM0B1 5
269
+ #define COM0A0 6
270
+ #define COM0A1 7
271
+
272
+ #define TCCR0B _SFR_IO8(0x25)
273
+ #define CS00 0
274
+ #define CS01 1
275
+ #define CS02 2
276
+ #define WGM02 3
277
+ #define FOC0B 6
278
+ #define FOC0A 7
279
+
280
+ #define TCNT0 _SFR_IO8(0x26)
281
+ #define TCNT0_0 0
282
+ #define TCNT0_1 1
283
+ #define TCNT0_2 2
284
+ #define TCNT0_3 3
285
+ #define TCNT0_4 4
286
+ #define TCNT0_5 5
287
+ #define TCNT0_6 6
288
+ #define TCNT0_7 7
289
+
290
+ #define OCR0A _SFR_IO8(0x27)
291
+ #define OCR0A_0 0
292
+ #define OCR0A_1 1
293
+ #define OCR0A_2 2
294
+ #define OCR0A_3 3
295
+ #define OCR0A_4 4
296
+ #define OCR0A_5 5
297
+ #define OCR0A_6 6
298
+ #define OCR0A_7 7
299
+
300
+ #define OCR0B _SFR_IO8(0x28)
301
+ #define OCR0B_0 0
302
+ #define OCR0B_1 1
303
+ #define OCR0B_2 2
304
+ #define OCR0B_3 3
305
+ #define OCR0B_4 4
306
+ #define OCR0B_5 5
307
+ #define OCR0B_6 6
308
+ #define OCR0B_7 7
309
+
310
+ #define GPIOR1 _SFR_IO8(0x2A)
311
+ #define GPIOR10 0
312
+ #define GPIOR11 1
313
+ #define GPIOR12 2
314
+ #define GPIOR13 3
315
+ #define GPIOR14 4
316
+ #define GPIOR15 5
317
+ #define GPIOR16 6
318
+ #define GPIOR17 7
319
+
320
+ #define GPIOR2 _SFR_IO8(0x2B)
321
+ #define GPIOR20 0
322
+ #define GPIOR21 1
323
+ #define GPIOR22 2
324
+ #define GPIOR23 3
325
+ #define GPIOR24 4
326
+ #define GPIOR25 5
327
+ #define GPIOR26 6
328
+ #define GPIOR27 7
329
+
330
+ #define SPCR _SFR_IO8(0x2C)
331
+ #define SPR0 0
332
+ #define SPR1 1
333
+ #define CPHA 2
334
+ #define CPOL 3
335
+ #define MSTR 4
336
+ #define DORD 5
337
+ #define SPE 6
338
+ #define SPIE 7
339
+
340
+ #define SPSR _SFR_IO8(0x2D)
341
+ #define SPI2X 0
342
+ #define WCOL 6
343
+ #define SPIF 7
344
+
345
+ #define SPDR _SFR_IO8(0x2E)
346
+ #define SPDR0 0
347
+ #define SPDR1 1
348
+ #define SPDR2 2
349
+ #define SPDR3 3
350
+ #define SPDR4 4
351
+ #define SPDR5 5
352
+ #define SPDR6 6
353
+ #define SPDR7 7
354
+
355
+ #define ACSR _SFR_IO8(0x30)
356
+ #define ACIS0 0
357
+ #define ACIS1 1
358
+ #define ACIC 2
359
+ #define ACIE 3
360
+ #define ACI 4
361
+ #define ACO 5
362
+ #define ACBG 6
363
+ #define ACD 7
364
+
365
+ #define OCDR _SFR_IO8(0x31)
366
+ #define OCDR0 0
367
+ #define OCDR1 1
368
+ #define OCDR2 2
369
+ #define OCDR3 3
370
+ #define OCDR4 4
371
+ #define OCDR5 5
372
+ #define OCDR6 6
373
+ #define OCDR7 7
374
+
375
+ #define SMCR _SFR_IO8(0x33)
376
+ #define SE 0
377
+ #define SM0 1
378
+ #define SM1 2
379
+ #define SM2 3
380
+
381
+ #define MCUSR _SFR_IO8(0x34)
382
+ #define PORF 0
383
+ #define EXTRF 1
384
+ #define BORF 2
385
+ #define WDRF 3
386
+ #define JTRF 4
387
+
388
+ #define MCUCR _SFR_IO8(0x35)
389
+ #define IVCE 0
390
+ #define IVSEL 1
391
+ #define PUD 4
392
+ #define BODSE 5
393
+ #define BODS 6
394
+ #define JTD 7
395
+
396
+ #define SPMCSR _SFR_IO8(0x37)
397
+ #define SPMEN 0
398
+ #define PGERS 1
399
+ #define PGWRT 2
400
+ #define BLBSET 3
401
+ #define RWWSRE 4
402
+ #define SIGRD 5
403
+ #define RWWSB 6
404
+ #define SPMIE 7
405
+
406
+ #define RAMPZ _SFR_IO8(0x3B)
407
+ #define RAMPZ0 0
408
+
409
+ #define WDTCSR _SFR_MEM8(0x60)
410
+ #define WDP0 0
411
+ #define WDP1 1
412
+ #define WDP2 2
413
+ #define WDE 3
414
+ #define WDCE 4
415
+ #define WDP3 5
416
+ #define WDIE 6
417
+ #define WDIF 7
418
+
419
+ #define CLKPR _SFR_MEM8(0x61)
420
+ #define CLKPS0 0
421
+ #define CLKPS1 1
422
+ #define CLKPS2 2
423
+ #define CLKPS3 3
424
+ #define CLKPCE 7
425
+
426
+ #define PRR0 _SFR_MEM8(0x64)
427
+ #define PRADC 0
428
+ #define PRUSART0 1
429
+ #define PRSPI 2
430
+ #define PRTIM1 3
431
+ #define PRUSART1 4
432
+ #define PRTIM0 5
433
+ #define PRTIM2 6
434
+ #define PRTWI 7
435
+
436
+ #define __AVR_HAVE_PRR0 ((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI))
437
+ #define __AVR_HAVE_PRR0_PRADC
438
+ #define __AVR_HAVE_PRR0_PRSPI
439
+ #define __AVR_HAVE_PRR0_PRTIM1
440
+ #define __AVR_HAVE_PRR0_PRUSART0
441
+ #define __AVR_HAVE_PRR0_PRUSART1
442
+ #define __AVR_HAVE_PRR0_PRTIM0
443
+ #define __AVR_HAVE_PRR0_PRTIM2
444
+ #define __AVR_HAVE_PRR0_PRTWI
445
+
446
+ #define PRR1 _SFR_MEM8(0x65)
447
+ #define PRTIM3 0
448
+
449
+ #define __AVR_HAVE_PRR1 (1<<PRTIM3)
450
+ #define __AVR_HAVE_PRR1_PRTIM3
451
+
452
+ #define OSCCAL _SFR_MEM8(0x66)
453
+ #define CAL0 0
454
+ #define CAL1 1
455
+ #define CAL2 2
456
+ #define CAL3 3
457
+ #define CAL4 4
458
+ #define CAL5 5
459
+ #define CAL6 6
460
+ #define CAL7 7
461
+
462
+ #define PCICR _SFR_MEM8(0x68)
463
+ #define PCIE0 0
464
+ #define PCIE1 1
465
+ #define PCIE2 2
466
+ #define PCIE3 3
467
+
468
+ #define EICRA _SFR_MEM8(0x69)
469
+ #define ISC00 0
470
+ #define ISC01 1
471
+ #define ISC10 2
472
+ #define ISC11 3
473
+ #define ISC20 4
474
+ #define ISC21 5
475
+
476
+ #define PCMSK0 _SFR_MEM8(0x6B)
477
+ #define PCINT0 0
478
+ #define PCINT1 1
479
+ #define PCINT2 2
480
+ #define PCINT3 3
481
+ #define PCINT4 4
482
+ #define PCINT5 5
483
+ #define PCINT6 6
484
+ #define PCINT7 7
485
+
486
+ #define PCMSK1 _SFR_MEM8(0x6C)
487
+ #define PCINT8 0
488
+ #define PCINT9 1
489
+ #define PCINT10 2
490
+ #define PCINT11 3
491
+ #define PCINT12 4
492
+ #define PCINT13 5
493
+ #define PCINT14 6
494
+ #define PCINT15 7
495
+
496
+ #define PCMSK2 _SFR_MEM8(0x6D)
497
+ #define PCINT16 0
498
+ #define PCINT17 1
499
+ #define PCINT18 2
500
+ #define PCINT19 3
501
+ #define PCINT20 4
502
+ #define PCINT21 5
503
+ #define PCINT22 6
504
+ #define PCINT23 7
505
+
506
+ #define TIMSK0 _SFR_MEM8(0x6E)
507
+ #define TOIE0 0
508
+ #define OCIE0A 1
509
+ #define OCIE0B 2
510
+
511
+ #define TIMSK1 _SFR_MEM8(0x6F)
512
+ #define TOIE1 0
513
+ #define OCIE1A 1
514
+ #define OCIE1B 2
515
+ #define ICIE1 5
516
+
517
+ #define TIMSK2 _SFR_MEM8(0x70)
518
+ #define TOIE2 0
519
+ #define OCIE2A 1
520
+ #define OCIE2B 2
521
+
522
+ #define TIMSK3 _SFR_MEM8(0x71)
523
+ #define TOIE3 0
524
+ #define OCIE3A 1
525
+ #define OCIE3B 2
526
+ #define ICIE3 5
527
+
528
+ #define PCMSK3 _SFR_MEM8(0x73)
529
+ #define PCINT24 0
530
+ #define PCINT25 1
531
+ #define PCINT26 2
532
+ #define PCINT27 3
533
+ #define PCINT28 4
534
+ #define PCINT29 5
535
+ #define PCINT30 6
536
+ #define PCINT31 7
537
+
538
+ #ifndef __ASSEMBLER__
539
+ #define ADC _SFR_MEM16(0x78)
540
+ #endif
541
+ #define ADCW _SFR_MEM16(0x78)
542
+
543
+ #define ADCL _SFR_MEM8(0x78)
544
+ #define ADCL0 0
545
+ #define ADCL1 1
546
+ #define ADCL2 2
547
+ #define ADCL3 3
548
+ #define ADCL4 4
549
+ #define ADCL5 5
550
+ #define ADCL6 6
551
+ #define ADCL7 7
552
+
553
+ #define ADCH _SFR_MEM8(0x79)
554
+ #define ADCH0 0
555
+ #define ADCH1 1
556
+ #define ADCH2 2
557
+ #define ADCH3 3
558
+ #define ADCH4 4
559
+ #define ADCH5 5
560
+ #define ADCH6 6
561
+ #define ADCH7 7
562
+
563
+ #define ADCSRA _SFR_MEM8(0x7A)
564
+ #define ADPS0 0
565
+ #define ADPS1 1
566
+ #define ADPS2 2
567
+ #define ADIE 3
568
+ #define ADIF 4
569
+ #define ADATE 5
570
+ #define ADSC 6
571
+ #define ADEN 7
572
+
573
+ #define ADCSRB _SFR_MEM8(0x7B)
574
+ #define ADTS0 0
575
+ #define ADTS1 1
576
+ #define ADTS2 2
577
+ #define ACME 6
578
+
579
+ #define ADMUX _SFR_MEM8(0x7C)
580
+ #define MUX0 0
581
+ #define MUX1 1
582
+ #define MUX2 2
583
+ #define MUX3 3
584
+ #define MUX4 4
585
+ #define ADLAR 5
586
+ #define REFS0 6
587
+ #define REFS1 7
588
+
589
+ #define DIDR0 _SFR_MEM8(0x7E)
590
+ #define ADC0D 0
591
+ #define ADC1D 1
592
+ #define ADC2D 2
593
+ #define ADC3D 3
594
+ #define ADC4D 4
595
+ #define ADC5D 5
596
+ #define ADC6D 6
597
+ #define ADC7D 7
598
+
599
+ #define DIDR1 _SFR_MEM8(0x7F)
600
+ #define AIN0D 0
601
+ #define AIN1D 1
602
+
603
+ #define TCCR1A _SFR_MEM8(0x80)
604
+ #define WGM10 0
605
+ #define WGM11 1
606
+ #define COM1B0 4
607
+ #define COM1B1 5
608
+ #define COM1A0 6
609
+ #define COM1A1 7
610
+
611
+ #define TCCR1B _SFR_MEM8(0x81)
612
+ #define CS10 0
613
+ #define CS11 1
614
+ #define CS12 2
615
+ #define WGM12 3
616
+ #define WGM13 4
617
+ #define ICES1 6
618
+ #define ICNC1 7
619
+
620
+ #define TCCR1C _SFR_MEM8(0x82)
621
+ #define FOC1B 6
622
+ #define FOC1A 7
623
+
624
+ #define TCNT1 _SFR_MEM16(0x84)
625
+
626
+ #define TCNT1L _SFR_MEM8(0x84)
627
+ #define TCNT1L0 0
628
+ #define TCNT1L1 1
629
+ #define TCNT1L2 2
630
+ #define TCNT1L3 3
631
+ #define TCNT1L4 4
632
+ #define TCNT1L5 5
633
+ #define TCNT1L6 6
634
+ #define TCNT1L7 7
635
+
636
+ #define TCNT1H _SFR_MEM8(0x85)
637
+ #define TCNT1H0 0
638
+ #define TCNT1H1 1
639
+ #define TCNT1H2 2
640
+ #define TCNT1H3 3
641
+ #define TCNT1H4 4
642
+ #define TCNT1H5 5
643
+ #define TCNT1H6 6
644
+ #define TCNT1H7 7
645
+
646
+ #define ICR1 _SFR_MEM16(0x86)
647
+
648
+ #define ICR1L _SFR_MEM8(0x86)
649
+ #define ICR1L0 0
650
+ #define ICR1L1 1
651
+ #define ICR1L2 2
652
+ #define ICR1L3 3
653
+ #define ICR1L4 4
654
+ #define ICR1L5 5
655
+ #define ICR1L6 6
656
+ #define ICR1L7 7
657
+
658
+ #define ICR1H _SFR_MEM8(0x87)
659
+ #define ICR1H0 0
660
+ #define ICR1H1 1
661
+ #define ICR1H2 2
662
+ #define ICR1H3 3
663
+ #define ICR1H4 4
664
+ #define ICR1H5 5
665
+ #define ICR1H6 6
666
+ #define ICR1H7 7
667
+
668
+ #define OCR1A _SFR_MEM16(0x88)
669
+
670
+ #define OCR1AL _SFR_MEM8(0x88)
671
+ #define OCR1AL0 0
672
+ #define OCR1AL1 1
673
+ #define OCR1AL2 2
674
+ #define OCR1AL3 3
675
+ #define OCR1AL4 4
676
+ #define OCR1AL5 5
677
+ #define OCR1AL6 6
678
+ #define OCR1AL7 7
679
+
680
+ #define OCR1AH _SFR_MEM8(0x89)
681
+ #define OCR1AH0 0
682
+ #define OCR1AH1 1
683
+ #define OCR1AH2 2
684
+ #define OCR1AH3 3
685
+ #define OCR1AH4 4
686
+ #define OCR1AH5 5
687
+ #define OCR1AH6 6
688
+ #define OCR1AH7 7
689
+
690
+ #define OCR1B _SFR_MEM16(0x8A)
691
+
692
+ #define OCR1BL _SFR_MEM8(0x8A)
693
+ #define OCR1AL0 0
694
+ #define OCR1AL1 1
695
+ #define OCR1AL2 2
696
+ #define OCR1AL3 3
697
+ #define OCR1AL4 4
698
+ #define OCR1AL5 5
699
+ #define OCR1AL6 6
700
+ #define OCR1AL7 7
701
+
702
+ #define OCR1BH _SFR_MEM8(0x8B)
703
+ #define OCR1AH0 0
704
+ #define OCR1AH1 1
705
+ #define OCR1AH2 2
706
+ #define OCR1AH3 3
707
+ #define OCR1AH4 4
708
+ #define OCR1AH5 5
709
+ #define OCR1AH6 6
710
+ #define OCR1AH7 7
711
+
712
+ #define TCCR3A _SFR_MEM8(0x90)
713
+ #define WGM30 0
714
+ #define WGM31 1
715
+ #define COM3B0 4
716
+ #define COM3B1 5
717
+ #define COM3A0 6
718
+ #define COM3A1 7
719
+
720
+ #define TCCR3B _SFR_MEM8(0x91)
721
+ #define CS30 0
722
+ #define CS31 1
723
+ #define CS32 2
724
+ #define WGM32 3
725
+ #define WGM33 4
726
+ #define ICES3 6
727
+ #define ICNC3 7
728
+
729
+ #define TCCR3C _SFR_MEM8(0x92)
730
+ #define FOC3B 6
731
+ #define FOC3A 7
732
+
733
+ #define TCNT3 _SFR_MEM16(0x94)
734
+
735
+ #define TCNT3L _SFR_MEM8(0x94)
736
+ #define TCNT3L0 0
737
+ #define TCNT3L1 1
738
+ #define TCNT3L2 2
739
+ #define TCNT3L3 3
740
+ #define TCNT3L4 4
741
+ #define TCNT3L5 5
742
+ #define TCNT3L6 6
743
+ #define TCNT3L7 7
744
+
745
+ #define TCNT3H _SFR_MEM8(0x95)
746
+ #define TCNT3H0 0
747
+ #define TCNT3H1 1
748
+ #define TCNT3H2 2
749
+ #define TCNT3H3 3
750
+ #define TCNT3H4 4
751
+ #define TCNT3H5 5
752
+ #define TCNT3H6 6
753
+ #define TCNT3H7 7
754
+
755
+ #define ICR3 _SFR_MEM16(0x96)
756
+
757
+ #define ICR3L _SFR_MEM8(0x96)
758
+ #define ICR3L0 0
759
+ #define ICR3L1 1
760
+ #define ICR3L2 2
761
+ #define ICR3L3 3
762
+ #define ICR3L4 4
763
+ #define ICR3L5 5
764
+ #define ICR3L6 6
765
+ #define ICR3L7 7
766
+
767
+ #define ICR3H _SFR_MEM8(0x97)
768
+ #define ICR3H0 0
769
+ #define ICR3H1 1
770
+ #define ICR3H2 2
771
+ #define ICR3H3 3
772
+ #define ICR3H4 4
773
+ #define ICR3H5 5
774
+ #define ICR3H6 6
775
+ #define ICR3H7 7
776
+
777
+ #define OCR3A _SFR_MEM16(0x98)
778
+
779
+ #define OCR3AL _SFR_MEM8(0x98)
780
+ #define OCR3AL0 0
781
+ #define OCR3AL1 1
782
+ #define OCR3AL2 2
783
+ #define OCR3AL3 3
784
+ #define OCR3AL4 4
785
+ #define OCR3AL5 5
786
+ #define OCR3AL6 6
787
+ #define OCR3AL7 7
788
+
789
+ #define OCR3AH _SFR_MEM8(0x99)
790
+ #define OCR3AH0 0
791
+ #define OCR3AH1 1
792
+ #define OCR3AH2 2
793
+ #define OCR3AH3 3
794
+ #define OCR3AH4 4
795
+ #define OCR3AH5 5
796
+ #define OCR3AH6 6
797
+ #define OCR3AH7 7
798
+
799
+ #define OCR3B _SFR_MEM16(0x9A)
800
+
801
+ #define OCR3BL _SFR_MEM8(0x9A)
802
+ #define OCR3AL0 0
803
+ #define OCR3AL1 1
804
+ #define OCR3AL2 2
805
+ #define OCR3AL3 3
806
+ #define OCR3AL4 4
807
+ #define OCR3AL5 5
808
+ #define OCR3AL6 6
809
+ #define OCR3AL7 7
810
+
811
+ #define OCR3BH _SFR_MEM8(0x9B)
812
+ #define OCR3AH0 0
813
+ #define OCR3AH1 1
814
+ #define OCR3AH2 2
815
+ #define OCR3AH3 3
816
+ #define OCR3AH4 4
817
+ #define OCR3AH5 5
818
+ #define OCR3AH6 6
819
+ #define OCR3AH7 7
820
+
821
+ #define TCCR2A _SFR_MEM8(0xB0)
822
+ #define WGM20 0
823
+ #define WGM21 1
824
+ #define COM2B0 4
825
+ #define COM2B1 5
826
+ #define COM2A0 6
827
+ #define COM2A1 7
828
+
829
+ #define TCCR2B _SFR_MEM8(0xB1)
830
+ #define CS20 0
831
+ #define CS21 1
832
+ #define CS22 2
833
+ #define WGM22 3
834
+ #define FOC2B 6
835
+ #define FOC2A 7
836
+
837
+ #define TCNT2 _SFR_MEM8(0xB2)
838
+ #define TCNT2_0 0
839
+ #define TCNT2_1 1
840
+ #define TCNT2_2 2
841
+ #define TCNT2_3 3
842
+ #define TCNT2_4 4
843
+ #define TCNT2_5 5
844
+ #define TCNT2_6 6
845
+ #define TCNT2_7 7
846
+
847
+ #define OCR2A _SFR_MEM8(0xB3)
848
+ #define OCR2_0 0
849
+ #define OCR2_1 1
850
+ #define OCR2_2 2
851
+ #define OCR2_3 3
852
+ #define OCR2_4 4
853
+ #define OCR2_5 5
854
+ #define OCR2_6 6
855
+ #define OCR2_7 7
856
+
857
+ #define OCR2B _SFR_MEM8(0xB4)
858
+ #define OCR2_0 0
859
+ #define OCR2_1 1
860
+ #define OCR2_2 2
861
+ #define OCR2_3 3
862
+ #define OCR2_4 4
863
+ #define OCR2_5 5
864
+ #define OCR2_6 6
865
+ #define OCR2_7 7
866
+
867
+ #define ASSR _SFR_MEM8(0xB6)
868
+ #define TCR2BUB 0
869
+ #define TCR2AUB 1
870
+ #define OCR2BUB 2
871
+ #define OCR2AUB 3
872
+ #define TCN2UB 4
873
+ #define AS2 5
874
+ #define EXCLK 6
875
+
876
+ #define TWBR _SFR_MEM8(0xB8)
877
+ #define TWBR0 0
878
+ #define TWBR1 1
879
+ #define TWBR2 2
880
+ #define TWBR3 3
881
+ #define TWBR4 4
882
+ #define TWBR5 5
883
+ #define TWBR6 6
884
+ #define TWBR7 7
885
+
886
+ #define TWSR _SFR_MEM8(0xB9)
887
+ #define TWPS0 0
888
+ #define TWPS1 1
889
+ #define TWS3 3
890
+ #define TWS4 4
891
+ #define TWS5 5
892
+ #define TWS6 6
893
+ #define TWS7 7
894
+
895
+ #define TWAR _SFR_MEM8(0xBA)
896
+ #define TWGCE 0
897
+ #define TWA0 1
898
+ #define TWA1 2
899
+ #define TWA2 3
900
+ #define TWA3 4
901
+ #define TWA4 5
902
+ #define TWA5 6
903
+ #define TWA6 7
904
+
905
+ #define TWDR _SFR_MEM8(0xBB)
906
+ #define TWD0 0
907
+ #define TWD1 1
908
+ #define TWD2 2
909
+ #define TWD3 3
910
+ #define TWD4 4
911
+ #define TWD5 5
912
+ #define TWD6 6
913
+ #define TWD7 7
914
+
915
+ #define TWCR _SFR_MEM8(0xBC)
916
+ #define TWIE 0
917
+ #define TWEN 2
918
+ #define TWWC 3
919
+ #define TWSTO 4
920
+ #define TWSTA 5
921
+ #define TWEA 6
922
+ #define TWINT 7
923
+
924
+ #define TWAMR _SFR_MEM8(0xBD)
925
+ #define TWAM0 1
926
+ #define TWAM1 2
927
+ #define TWAM2 3
928
+ #define TWAM3 4
929
+ #define TWAM4 5
930
+ #define TWAM5 6
931
+ #define TWAM6 7
932
+
933
+ #define UCSR0A _SFR_MEM8(0xC0)
934
+ #define MPCM0 0
935
+ #define U2X0 1
936
+ #define UPE0 2
937
+ #define DOR0 3
938
+ #define FE0 4
939
+ #define UDRE0 5
940
+ #define TXC0 6
941
+ #define RXC0 7
942
+
943
+ #define UCSR0B _SFR_MEM8(0xC1)
944
+ #define TXB80 0
945
+ #define RXB80 1
946
+ #define UCSZ02 2
947
+ #define TXEN0 3
948
+ #define RXEN0 4
949
+ #define UDRIE0 5
950
+ #define TXCIE0 6
951
+ #define RXCIE0 7
952
+
953
+ #define UCSR0C _SFR_MEM8(0xC2)
954
+ #define UCPOL0 0
955
+ #define UCSZ00 1
956
+ #define UCSZ01 2
957
+ #define USBS0 3
958
+ #define UPM00 4
959
+ #define UPM01 5
960
+ #define UMSEL00 6
961
+ #define UMSEL01 7
962
+
963
+ #define UBRR0 _SFR_MEM16(0xC4)
964
+
965
+ #define UBRR0L _SFR_MEM8(0xC4)
966
+ #define UBRR0_0 0
967
+ #define UBRR0_1 1
968
+ #define UBRR0_2 2
969
+ #define UBRR0_3 3
970
+ #define UBRR0_4 4
971
+ #define UBRR0_5 5
972
+ #define UBRR0_6 6
973
+ #define UBRR0_7 7
974
+
975
+ #define UBRR0H _SFR_MEM8(0xC5)
976
+ #define UBRR0_8 0
977
+ #define UBRR0_9 1
978
+ #define UBRR0_10 2
979
+ #define UBRR0_11 3
980
+
981
+ #define UDR0 _SFR_MEM8(0xC6)
982
+ #define UDR0_0 0
983
+ #define UDR0_1 1
984
+ #define UDR0_2 2
985
+ #define UDR0_3 3
986
+ #define UDR0_4 4
987
+ #define UDR0_5 5
988
+ #define UDR0_6 6
989
+ #define UDR0_7 7
990
+
991
+ #define UCSR1A _SFR_MEM8(0xC8)
992
+ #define MPCM1 0
993
+ #define U2X1 1
994
+ #define UPE1 2
995
+ #define DOR1 3
996
+ #define FE1 4
997
+ #define UDRE1 5
998
+ #define TXC1 6
999
+ #define RXC1 7
1000
+
1001
+ #define UCSR1B _SFR_MEM8(0xC9)
1002
+ #define TXB81 0
1003
+ #define RXB81 1
1004
+ #define UCSZ12 2
1005
+ #define TXEN1 3
1006
+ #define RXEN1 4
1007
+ #define UDRIE1 5
1008
+ #define TXCIE1 6
1009
+ #define RXCIE1 7
1010
+
1011
+ #define UCSR1C _SFR_MEM8(0xCA)
1012
+ #define UCPOL1 0
1013
+ #define UCSZ10 1
1014
+ #define UCSZ11 2
1015
+ #define USBS1 3
1016
+ #define UPM10 4
1017
+ #define UPM11 5
1018
+ #define UMSEL10 6
1019
+ #define UMSEL11 7
1020
+
1021
+ #define UBRR1 _SFR_MEM16(0xCC)
1022
+
1023
+ #define UBRR1L _SFR_MEM8(0xCC)
1024
+ #define UBRR1_0 0
1025
+ #define UBRR1_1 1
1026
+ #define UBRR1_2 2
1027
+ #define UBRR1_3 3
1028
+ #define UBRR1_4 4
1029
+ #define UBRR1_5 5
1030
+ #define UBRR1_6 6
1031
+ #define UBRR1_7 7
1032
+
1033
+ #define UBRR1H _SFR_MEM8(0xCD)
1034
+ #define UBRR1_8 0
1035
+ #define UBRR1_9 1
1036
+ #define UBRR1_10 2
1037
+ #define UBRR1_11 3
1038
+
1039
+ #define UDR1 _SFR_MEM8(0xCE)
1040
+ #define UDR1_0 0
1041
+ #define UDR1_1 1
1042
+ #define UDR1_2 2
1043
+ #define UDR1_3 3
1044
+ #define UDR1_4 4
1045
+ #define UDR1_5 5
1046
+ #define UDR1_6 6
1047
+ #define UDR1_7 7
1048
+
1049
+
1050
+ /* Interrupt Vectors */
1051
+ /* Interrupt Vector 0 is the reset vector. */
1052
+
1053
+ #define INT0_vect_num 1
1054
+ #define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */
1055
+
1056
+ #define INT1_vect_num 2
1057
+ #define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */
1058
+
1059
+ #define INT2_vect_num 3
1060
+ #define INT2_vect _VECTOR(3) /* External Interrupt Request 2 */
1061
+
1062
+ #define PCINT0_vect_num 4
1063
+ #define PCINT0_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */
1064
+
1065
+ #define PCINT1_vect_num 5
1066
+ #define PCINT1_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */
1067
+
1068
+ #define PCINT2_vect_num 6
1069
+ #define PCINT2_vect _VECTOR(6) /* Pin Change Interrupt Request 2 */
1070
+
1071
+ #define PCINT3_vect_num 7
1072
+ #define PCINT3_vect _VECTOR(7) /* Pin Change Interrupt Request 3 */
1073
+
1074
+ #define WDT_vect_num 8
1075
+ #define WDT_vect _VECTOR(8) /* Watchdog Time-out Interrupt */
1076
+
1077
+ #define TIMER2_COMPA_vect_num 9
1078
+ #define TIMER2_COMPA_vect _VECTOR(9) /* Timer/Counter2 Compare Match A */
1079
+
1080
+ #define TIMER2_COMPB_vect_num 10
1081
+ #define TIMER2_COMPB_vect _VECTOR(10) /* Timer/Counter2 Compare Match B */
1082
+
1083
+ #define TIMER2_OVF_vect_num 11
1084
+ #define TIMER2_OVF_vect _VECTOR(11) /* Timer/Counter2 Overflow */
1085
+
1086
+ #define TIMER1_CAPT_vect_num 12
1087
+ #define TIMER1_CAPT_vect _VECTOR(12) /* Timer/Counter1 Capture Event */
1088
+
1089
+ #define TIMER1_COMPA_vect_num 13
1090
+ #define TIMER1_COMPA_vect _VECTOR(13) /* Timer/Counter1 Compare Match A */
1091
+
1092
+ #define TIMER1_COMPB_vect_num 14
1093
+ #define TIMER1_COMPB_vect _VECTOR(14) /* Timer/Counter1 Compare Match B */
1094
+
1095
+ #define TIMER1_OVF_vect_num 15
1096
+ #define TIMER1_OVF_vect _VECTOR(15) /* Timer/Counter1 Overflow */
1097
+
1098
+ #define TIMER0_COMPA_vect_num 16
1099
+ #define TIMER0_COMPA_vect _VECTOR(16) /* Timer/Counter0 Compare Match A */
1100
+
1101
+ #define TIMER0_COMPB_vect_num 17
1102
+ #define TIMER0_COMPB_vect _VECTOR(17) /* Timer/Counter0 Compare Match B */
1103
+
1104
+ #define TIMER0_OVF_vect_num 18
1105
+ #define TIMER0_OVF_vect _VECTOR(18) /* Timer/Counter0 Overflow */
1106
+
1107
+ #define SPI_STC_vect_num 19
1108
+ #define SPI_STC_vect _VECTOR(19) /* SPI Serial Transfer Complete */
1109
+
1110
+ #define USART0_RX_vect_num 20
1111
+ #define USART0_RX_vect _VECTOR(20) /* USART0, Rx Complete */
1112
+
1113
+ #define USART0_UDRE_vect_num 21
1114
+ #define USART0_UDRE_vect _VECTOR(21) /* USART0 Data register Empty */
1115
+
1116
+ #define USART0_TX_vect_num 22
1117
+ #define USART0_TX_vect _VECTOR(22) /* USART0, Tx Complete */
1118
+
1119
+ #define ANALOG_COMP_vect_num 23
1120
+ #define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */
1121
+
1122
+ #define ADC_vect_num 24
1123
+ #define ADC_vect _VECTOR(24) /* ADC Conversion Complete */
1124
+
1125
+ #define EE_READY_vect_num 25
1126
+ #define EE_READY_vect _VECTOR(25) /* EEPROM Ready */
1127
+
1128
+ #define TWI_vect_num 26
1129
+ #define TWI_vect _VECTOR(26) /* 2-wire Serial Interface */
1130
+
1131
+ #define SPM_READY_vect_num 27
1132
+ #define SPM_READY_vect _VECTOR(27) /* Store Program Memory Read */
1133
+
1134
+ #define USART1_RX_vect_num 28
1135
+ #define USART1_RX_vect _VECTOR(28) /* USART1 RX complete */
1136
+
1137
+ #define USART1_UDRE_vect_num 29
1138
+ #define USART1_UDRE_vect _VECTOR(29) /* USART1 Data Register Empty */
1139
+
1140
+ #define USART1_TX_vect_num 30
1141
+ #define USART1_TX_vect _VECTOR(30) /* USART1 TX complete */
1142
+
1143
+ #define TIMER3_CAPT_vect_num 31
1144
+ #define TIMER3_CAPT_vect _VECTOR(31) /* Timer/Counter3 Capture Event */
1145
+
1146
+ #define TIMER3_COMPA_vect_num 32
1147
+ #define TIMER3_COMPA_vect _VECTOR(32) /* Timer/Counter3 Compare Match A */
1148
+
1149
+ #define TIMER3_COMPB_vect_num 33
1150
+ #define TIMER3_COMPB_vect _VECTOR(33) /* Timer/Counter3 Compare Match B */
1151
+
1152
+ #define TIMER3_OVF_vect_num 34
1153
+ #define TIMER3_OVF_vect _VECTOR(34) /* Timer/Counter3 Overflow */
1154
+
1155
+ #define _VECTORS_SIZE (35 * 4)
1156
+
1157
+
1158
+ /* Constants */
1159
+ #define SPM_PAGESIZE 256
1160
+ #define RAMSTART (0x100)
1161
+ #define RAMEND 0x40FF /* Last On-Chip SRAM Location */
1162
+ #define XRAMSIZE 0
1163
+ #define XRAMEND RAMEND
1164
+ #define E2END 0xFFF
1165
+ #define E2PAGESIZE 8
1166
+ #define FLASHEND 0x1FFFF
1167
+
1168
+
1169
+ /* Fuses */
1170
+ #define FUSE_MEMORY_SIZE 3
1171
+
1172
+ /* Low Fuse Byte */
1173
+ #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
1174
+ #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
1175
+ #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
1176
+ #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
1177
+ #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
1178
+ #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
1179
+ #define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */
1180
+ #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
1181
+ #define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8)
1182
+
1183
+ /* High Fuse Byte */
1184
+ #define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */
1185
+ #define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */
1186
+ #define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */
1187
+ #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
1188
+ #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */
1189
+ #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
1190
+ #define FUSE_JTAGEN (unsigned char)~_BV(6) /* Enable JTAG */
1191
+ #define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */
1192
+ #define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_SPIEN & FUSE_JTAGEN)
1193
+
1194
+ /* Extended Fuse Byte */
1195
+ #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */
1196
+ #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */
1197
+ #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */
1198
+ #define EFUSE_DEFAULT (0xFF)
1199
+
1200
+
1201
+ /* Lock Bits */
1202
+ #define __LOCK_BITS_EXIST
1203
+ #define __BOOT_LOCK_BITS_0_EXIST
1204
+ #define __BOOT_LOCK_BITS_1_EXIST
1205
+
1206
+
1207
+ /* Signature */
1208
+ #define SIGNATURE_0 0x1E
1209
+ #define SIGNATURE_1 0x97
1210
+ #define SIGNATURE_2 0x05
1211
+
1212
+ #define SLEEP_MODE_IDLE (0x00<<1)
1213
+ #define SLEEP_MODE_ADC (0x01<<1)
1214
+ #define SLEEP_MODE_PWR_DOWN (0x02<<1)
1215
+ #define SLEEP_MODE_PWR_SAVE (0x03<<1)
1216
+ #define SLEEP_MODE_STANDBY (0x06<<1)
1217
+ #define SLEEP_MODE_EXT_STANDBY (0x07<<1)
1218
+
1219
+ #endif /* _AVR_IOM1284P_H_ */